1 /* Instruction opcode table for m32c.
3 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 Copyright 1996-2007 Free Software Foundation, Inc.
7 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
9 This file is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 It is distributed in the hope that it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
16 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
17 License for more details.
19 You should have received a copy of the GNU General Public License along
20 with this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
29 #include "m32c-desc.h"
31 #include "libiberty.h"
35 m32c_asm_hash (const char *mnem
)
39 /* The length of the mnemonic for the Jcnd insns is 1. Hash jsri. */
40 if (mnem
[0] == 'j' && mnem
[1] != 's')
43 /* Don't hash scCND */
44 if (mnem
[0] == 's' && mnem
[1] == 'c')
47 /* Don't hash bmCND */
48 if (mnem
[0] == 'b' && mnem
[1] == 'm')
51 for (h
= 0; *mnem
&& *mnem
!= ' ' && *mnem
!= ':'; ++mnem
)
53 return h
% CGEN_ASM_HASH_SIZE
;
57 /* The hash functions are recorded here to help keep assembler code out of
58 the disassembler and vice versa. */
60 static int asm_hash_insn_p (const CGEN_INSN
*);
61 static unsigned int asm_hash_insn (const char *);
62 static int dis_hash_insn_p (const CGEN_INSN
*);
63 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
65 /* Instruction formats. */
67 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
68 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
70 #define F(f) & m32c_cgen_ifld_table[M32C_/**/f]
72 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
76 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
77 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
80 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
81 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
84 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
85 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
88 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
89 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
92 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
93 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
96 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
97 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
100 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
101 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
104 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
105 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
108 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
109 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
112 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
113 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
116 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
117 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
120 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
121 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
124 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
125 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
128 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
129 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
132 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
133 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
136 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
137 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
140 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
141 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
144 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
145 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
148 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
149 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
152 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
153 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
156 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
157 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
160 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
161 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
164 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
165 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
168 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
169 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
172 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
173 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
176 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
177 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
180 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
181 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
184 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
185 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
188 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
189 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
192 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
193 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
196 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
197 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
200 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
201 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
204 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
205 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
208 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
209 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
212 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
213 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
216 static const CGEN_IFMT ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
217 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
220 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
221 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
224 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
225 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
228 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
229 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
232 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
233 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
236 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
237 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
240 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
241 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
244 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
245 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
248 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
249 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
252 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
253 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
256 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
257 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
260 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
261 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
264 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
265 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
268 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
269 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
272 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
273 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
276 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
277 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
280 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
281 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
284 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
285 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
288 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
289 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
292 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
293 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
296 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
297 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
300 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
301 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
304 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
305 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
308 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
309 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
312 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
313 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
316 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
317 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
320 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
321 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
324 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
325 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
328 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
329 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
332 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
333 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
336 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
337 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
340 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
341 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
344 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
345 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
348 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
349 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
352 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
353 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
356 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
357 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
360 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
361 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
364 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
365 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
368 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
369 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
372 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
373 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
376 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
377 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
380 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
381 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
384 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
385 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
388 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
389 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
392 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
393 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
396 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
397 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
400 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
401 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
404 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
405 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
408 static const CGEN_IFMT ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
409 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
412 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
413 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
416 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
417 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
420 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
421 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
424 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
425 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
428 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
429 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
432 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
433 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
436 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
437 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
440 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
441 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
444 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
445 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
448 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
449 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
452 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
453 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
456 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
457 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
460 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
461 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
464 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
465 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
468 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
469 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
472 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
473 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
476 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
477 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
480 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
481 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
484 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
485 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
488 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
489 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
492 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
493 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
496 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
497 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
500 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
501 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
504 static const CGEN_IFMT ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
505 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
508 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
509 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
512 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
513 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
516 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
517 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
520 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
521 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
524 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
525 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
528 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
529 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
532 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
533 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
536 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
537 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
540 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
541 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
544 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
545 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
548 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
549 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
552 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
553 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
556 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
557 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
560 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
561 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
564 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
565 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
568 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
569 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
572 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
573 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
576 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
577 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
580 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
581 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
584 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
585 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
588 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
589 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
592 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
593 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
596 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
597 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
600 static const CGEN_IFMT ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
601 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
604 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
605 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_RN_EXT_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
608 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
609 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
612 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
613 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
616 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
617 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
620 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
621 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
624 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
625 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
628 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
629 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
632 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
633 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
636 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
637 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
640 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
641 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
644 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
645 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
648 static const CGEN_IFMT ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_HI ATTRIBUTE_UNUSED
= {
649 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
652 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
653 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_RN_EXT_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
656 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
657 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
660 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
661 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
664 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
665 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
668 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
669 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
672 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
673 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
676 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
677 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
680 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
681 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
684 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
685 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
688 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
689 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
692 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
693 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
696 static const CGEN_IFMT ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_QI ATTRIBUTE_UNUSED
= {
697 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
700 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_Rn_direct_Ext_QI ATTRIBUTE_UNUSED
= {
701 16, 16, 0xfffd, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN_EXT
) }, { F (F_15_1
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
704 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_An_indirect_Ext_QI ATTRIBUTE_UNUSED
= {
705 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
708 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_An_relative_Ext_QI ATTRIBUTE_UNUSED
= {
709 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
712 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_An_relative_Ext_QI ATTRIBUTE_UNUSED
= {
713 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
716 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_SB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
717 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
720 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_SB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
721 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
724 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_8_FB_relative_Ext_QI ATTRIBUTE_UNUSED
= {
725 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
728 static const CGEN_IFMT ifmt_exts16_b_16_Ext_dst16_16_16_absolute_Ext_QI ATTRIBUTE_UNUSED
= {
729 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
732 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
733 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
736 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
737 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
740 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
741 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
744 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
745 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
748 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
749 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
752 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
753 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
756 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
757 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
760 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
761 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
764 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
765 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
768 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
769 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
772 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
773 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
776 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
777 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
780 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
781 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
784 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
785 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
788 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
789 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
792 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
793 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
796 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
797 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
800 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
801 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
804 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
805 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
808 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
809 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
812 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
813 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
816 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
817 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
820 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
821 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
824 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
825 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
828 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
829 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
832 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
833 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
836 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
837 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
840 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
841 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
844 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
845 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
848 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
849 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
852 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
853 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
856 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
857 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
860 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
861 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
864 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
865 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
868 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
869 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
872 static const CGEN_IFMT ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
873 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
876 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
877 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
880 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
881 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
884 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
885 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
888 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
889 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
892 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
893 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
896 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
897 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
900 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
901 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
904 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
905 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
908 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
909 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
912 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
913 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
916 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
917 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
920 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
921 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
924 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
925 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
928 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
929 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
932 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
933 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
936 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
937 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
940 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
941 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
944 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
945 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
948 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
949 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
952 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
953 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
956 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
957 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
960 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
961 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
964 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
965 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
968 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
969 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
972 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
973 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
976 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
977 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
980 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
981 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
984 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
985 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
988 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
989 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
992 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
993 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
996 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
997 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1000 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1001 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1004 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1005 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1008 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1009 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1012 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1013 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1016 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1017 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1020 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1021 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1024 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1025 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1028 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1029 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1032 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1033 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1036 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1037 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1040 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1041 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1044 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1045 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1048 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1049 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1052 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1053 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1056 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1057 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1060 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1061 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1064 static const CGEN_IFMT ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1065 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1068 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1069 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1072 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1073 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1076 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1077 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1080 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1081 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1084 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1085 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1088 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1089 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1092 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1093 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1096 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1097 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1100 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1101 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1104 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1105 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1108 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1109 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1112 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1113 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1116 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1117 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1120 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1121 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1124 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1125 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1128 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1129 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1132 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1133 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1136 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1137 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1140 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1141 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1144 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1145 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1148 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1149 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1152 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1153 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1156 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1157 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1160 static const CGEN_IFMT ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1161 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1164 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1165 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1168 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1169 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1172 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1173 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1176 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1177 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1180 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1181 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1184 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1185 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1188 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1189 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1192 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1193 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1196 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1197 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1200 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1201 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1204 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1205 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1208 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1209 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1212 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1213 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1216 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1217 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1220 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1221 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1224 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1225 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1228 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1229 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1232 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1233 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1236 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1237 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1240 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1241 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1244 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1245 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1248 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1249 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1252 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1253 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1256 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1257 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1260 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1261 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1264 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1265 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1268 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1269 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1272 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1273 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1276 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1277 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1280 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1281 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1284 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1285 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1288 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1289 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1292 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1293 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1296 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1297 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_HI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1300 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1301 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1304 static const CGEN_IFMT ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
1305 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1308 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1309 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1312 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1313 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1316 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1317 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1320 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1321 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1324 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1325 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1328 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1329 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1332 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1333 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1336 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1337 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1340 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1341 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1344 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1345 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1348 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1349 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1352 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1353 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1356 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1357 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1360 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1361 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1364 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1365 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1368 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1369 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1372 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1373 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1376 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1377 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1380 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1381 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1384 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1385 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1388 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1389 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1392 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1393 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1396 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1397 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1400 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1401 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1404 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1405 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1408 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1409 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1412 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1413 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1416 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1417 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1420 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1421 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1424 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1425 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1428 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1429 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1432 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1433 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1436 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1437 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1440 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1441 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1444 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1445 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1448 static const CGEN_IFMT ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1449 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1452 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1453 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1456 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1457 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1460 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1461 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1464 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1465 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1468 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1469 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1472 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1473 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1476 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1477 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1480 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1481 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1484 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1485 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1488 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1489 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1492 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1493 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1496 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1497 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1500 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1501 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1504 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1505 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1508 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1509 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1512 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1513 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1516 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1517 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1520 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1521 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1524 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1525 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1528 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1529 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1532 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1533 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1536 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1537 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1540 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1541 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1544 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1545 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1548 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1549 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1552 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1553 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1556 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1557 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1560 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1561 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1564 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1565 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1568 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1569 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1572 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1573 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1576 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1577 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1580 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1581 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1584 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1585 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1588 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1589 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1592 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1593 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1596 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1597 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1600 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1601 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1604 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1605 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1608 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1609 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1612 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1613 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1616 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1617 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1620 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1621 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1624 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1625 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1628 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1629 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1632 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1633 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1636 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1637 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1640 static const CGEN_IFMT ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1641 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1644 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1645 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1648 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1649 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1652 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1653 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1656 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1657 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1660 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1661 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1664 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1665 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1668 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1669 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1672 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1673 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1676 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1677 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1680 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1681 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1684 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1685 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1688 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1689 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1692 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1693 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1696 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1697 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1700 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1701 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1704 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1705 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1708 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1709 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1712 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1713 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1716 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1717 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1720 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1721 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1724 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1725 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1728 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1729 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1732 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1733 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1736 static const CGEN_IFMT ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1737 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1740 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1741 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1744 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1745 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1748 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1749 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1752 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1753 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1756 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1757 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1760 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1761 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1764 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1765 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1768 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1769 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1772 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1773 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1776 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1777 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1780 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1781 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1784 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1785 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1788 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1789 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1792 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1793 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1796 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1797 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1800 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1801 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1804 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1805 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1808 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1809 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1812 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1813 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1816 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1817 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1820 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1821 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1824 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1825 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1828 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1829 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1832 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1833 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1836 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1837 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1840 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1841 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1844 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1845 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1848 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1849 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1852 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1853 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1856 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1857 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1860 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1861 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1864 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1865 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1868 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1869 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1872 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1873 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1876 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1877 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1880 static const CGEN_IFMT ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
1881 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
1884 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1885 24, 24, 0xffec00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1888 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1889 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1892 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1893 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1896 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1897 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1900 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1901 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1904 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
1905 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1908 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1909 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1912 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1913 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1916 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
1917 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1920 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1921 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1924 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1925 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1928 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI ATTRIBUTE_UNUSED
= {
1929 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1932 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1933 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1936 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1937 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1940 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI ATTRIBUTE_UNUSED
= {
1941 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1944 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1945 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1948 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1949 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1952 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
1953 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1956 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1957 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1960 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1961 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1964 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
1965 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1968 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1969 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1972 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1973 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1976 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
1977 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1980 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1981 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1984 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1985 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1988 static const CGEN_IFMT ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI ATTRIBUTE_UNUSED
= {
1989 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1992 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1993 32, 32, 0xffec0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
1996 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
1997 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2000 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2001 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2004 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2005 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2008 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2009 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2012 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2013 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2016 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2017 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2020 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2021 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2024 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2025 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2028 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2029 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2032 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2033 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2036 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2037 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2040 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2041 32, 48, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2044 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2045 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2048 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2049 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2052 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2053 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2056 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2057 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2060 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2061 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2064 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2065 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2068 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2069 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2072 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2073 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2076 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2077 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2080 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2081 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2084 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2085 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2088 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2089 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2092 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2093 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2096 static const CGEN_IFMT ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI ATTRIBUTE_UNUSED
= {
2097 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2100 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2101 16, 16, 0xffcc, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2104 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2105 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2108 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2109 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2112 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2113 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2116 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2117 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2120 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2121 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2124 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2125 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2128 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2129 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2132 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2133 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2136 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2137 24, 24, 0xffce00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2140 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2141 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2144 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2145 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2148 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2149 32, 32, 0xffce0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2152 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2153 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2156 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2157 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2160 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2161 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2164 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2165 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2168 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2169 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2172 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2173 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2176 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2177 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2180 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2181 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2184 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2185 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2188 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2189 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2192 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2193 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2196 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2197 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2200 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2201 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2204 static const CGEN_IFMT ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2205 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2208 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2209 24, 24, 0xffec00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2212 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2213 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2216 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2217 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2220 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2221 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2224 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2225 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2228 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2229 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2232 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2233 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2236 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2237 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2240 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2241 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2244 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2245 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2248 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2249 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2252 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2253 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2256 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2257 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2260 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2261 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2264 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2265 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2268 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2269 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2272 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2273 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2276 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2277 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2280 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2281 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2284 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2285 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2288 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2289 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2292 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2293 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2296 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2297 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2300 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2301 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2304 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2305 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2308 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2309 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2312 static const CGEN_IFMT ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI ATTRIBUTE_UNUSED
= {
2313 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { F (F_12_4
) }, { F (F_DSP_24_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2316 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2317 32, 32, 0xffec0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2320 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2321 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2324 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2325 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2328 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2329 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2332 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2333 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2336 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2337 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2340 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2341 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2344 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2345 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2348 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2349 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2352 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2353 32, 40, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2356 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2357 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2360 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2361 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2364 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2365 32, 48, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2368 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2369 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2372 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2373 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2376 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2377 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2380 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2381 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2384 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2385 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2388 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2389 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2392 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2393 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2396 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2397 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2400 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2401 32, 40, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2404 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2405 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2408 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2409 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2412 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2413 32, 48, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2416 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2417 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2420 static const CGEN_IFMT ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI ATTRIBUTE_UNUSED
= {
2421 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U16
) }, { F (F_12_4
) }, { F (F_DSP_32_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2424 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2425 16, 16, 0xffcc, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2428 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2429 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2432 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2433 16, 16, 0xffec, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2436 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2437 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2440 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2441 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2444 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2445 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2448 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2449 16, 16, 0xffce, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2452 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2453 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2456 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2457 16, 16, 0xffee, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2460 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2461 24, 24, 0xffce00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2464 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2465 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2468 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2469 24, 24, 0xffee00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2472 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2473 32, 32, 0xffce0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2476 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2477 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2480 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2481 32, 32, 0xffee0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2484 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2485 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2488 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2489 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2492 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2493 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2496 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2497 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2500 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2501 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2504 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2505 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2508 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2509 24, 24, 0xffcf00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2512 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2513 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2516 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2517 24, 24, 0xffef00, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2520 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2521 32, 32, 0xffcf0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_SRC16_RN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2524 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2525 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2528 static const CGEN_IFMT ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2529 32, 32, 0xffef0000, { { F (F_0_4
) }, { F (F_8_2
) }, { F (F_10_1
) }, { F (F_SRC16_AN
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2532 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2533 32, 32, 0xff3f0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2536 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2537 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2540 static const CGEN_IFMT ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2541 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2544 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2545 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2548 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2549 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2552 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2553 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2556 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2557 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2560 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2561 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2564 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2565 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2568 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2569 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2572 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2573 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2576 static const CGEN_IFMT ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2577 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2580 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2581 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2584 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2585 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2588 static const CGEN_IFMT ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2589 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2592 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2593 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2596 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2597 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2600 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2601 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2604 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2605 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2608 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2609 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2612 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2613 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2616 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2617 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2620 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2621 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2624 static const CGEN_IFMT ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2625 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
2628 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2629 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2632 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2633 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2636 static const CGEN_IFMT ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2637 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
2640 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2641 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2644 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2645 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2648 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2649 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2652 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2653 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2656 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2657 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2660 static const CGEN_IFMT ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2661 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2664 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2665 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2668 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2669 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2672 static const CGEN_IFMT ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2673 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
2676 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2677 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2680 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2681 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2684 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2685 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
2688 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2689 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2692 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2693 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2696 static const CGEN_IFMT ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2697 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
2700 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2701 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2704 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2705 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2708 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2709 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2712 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2713 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2716 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2717 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2720 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2721 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2724 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2725 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2728 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2729 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2732 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2733 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2736 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2737 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2740 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2741 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2744 static const CGEN_IFMT ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
2745 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2748 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2749 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2752 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2753 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2756 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2757 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2760 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2761 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2764 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2765 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2768 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2769 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2772 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2773 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2776 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2777 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2780 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2781 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2784 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2785 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2788 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2789 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2792 static const CGEN_IFMT ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
2793 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
2796 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
2797 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2800 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
2801 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2804 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
2805 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2808 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
2809 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2812 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
2813 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2816 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2817 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2820 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
2821 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2824 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2825 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2828 static const CGEN_IFMT ifmt_xchg16w_r3_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
2829 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2832 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
2833 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2836 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
2837 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2840 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
2841 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2844 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
2845 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2848 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
2849 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2852 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2853 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2856 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
2857 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2860 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2861 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2864 static const CGEN_IFMT ifmt_xchg16b_r1h_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
2865 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_2
) }, { F (F_10_2
) }, { 0 } }
2868 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
2869 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S16
) }, { 0 } }
2872 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
2873 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S16
) }, { 0 } }
2876 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
2877 32, 40, 0xff000000, { { F (F_0_2
) }, { F (F_DSP_24_S16
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
2880 static const CGEN_IFMT ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED
= {
2881 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_8_S16
) }, { 0 } }
2884 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
2885 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S8
) }, { 0 } }
2888 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
2889 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_16_S8
) }, { 0 } }
2892 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
2893 32, 32, 0xff000000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_24_S8
) }, { 0 } }
2896 static const CGEN_IFMT ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
2897 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
2900 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2901 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2904 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2905 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2908 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2909 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2912 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2913 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2916 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2917 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2920 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
2921 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2924 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2925 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2928 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2929 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2932 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
2933 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2936 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2937 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2940 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2941 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2944 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2945 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2948 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2949 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2952 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2953 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2956 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2957 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2960 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2961 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2964 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2965 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2968 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2969 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2972 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2973 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2976 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2977 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2980 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2981 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2984 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2985 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2988 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2989 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2992 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2993 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
2996 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
2997 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3000 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3001 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3004 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3005 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3008 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3009 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3012 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3013 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3016 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3017 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3020 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3021 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3024 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3025 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3028 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3029 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3032 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3033 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3036 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3037 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3040 static const CGEN_IFMT ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3041 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3044 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3045 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3048 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3049 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3052 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3053 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3056 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3057 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3060 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3061 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3064 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3065 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3068 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3069 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3072 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3073 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3076 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3077 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3080 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3081 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3084 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3085 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3088 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3089 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3092 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3093 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3096 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3097 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3100 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3101 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3104 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3105 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3108 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3109 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3112 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3113 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3116 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3117 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3120 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3121 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3124 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3125 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3128 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3129 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3132 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3133 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3136 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3137 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3140 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3141 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3144 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3145 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3148 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3149 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3152 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3153 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3156 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3157 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3160 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3161 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3164 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3165 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3168 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3169 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3172 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3173 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3176 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3177 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3180 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3181 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3184 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3185 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3188 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3189 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3192 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3193 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3196 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3197 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3200 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3201 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3204 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3205 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3208 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3209 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3212 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3213 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3216 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3217 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3220 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3221 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3224 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3225 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3228 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3229 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3232 static const CGEN_IFMT ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3233 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3236 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3237 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3240 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3241 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3244 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3245 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3248 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3249 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3252 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3253 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3256 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3257 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3260 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3261 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3264 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3265 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3268 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3269 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3272 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3273 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3276 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3277 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3280 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3281 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3284 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3285 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3288 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3289 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3292 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3293 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3296 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3297 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3300 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3301 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3304 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3305 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3308 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3309 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3312 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3313 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3316 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3317 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3320 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3321 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3324 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3325 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3328 static const CGEN_IFMT ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3329 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3332 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3333 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3336 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3337 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3340 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3341 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3344 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3345 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3348 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3349 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3352 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
3353 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3356 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3357 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3360 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3361 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3364 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
3365 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3368 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3369 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3372 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3373 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3376 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3377 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3380 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3381 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3384 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3385 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3388 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3389 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3392 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3393 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3396 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3397 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3400 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3401 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3404 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3405 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3408 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3409 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3412 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3413 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3416 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3417 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3420 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3421 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3424 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3425 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3428 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3429 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3432 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3433 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3436 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3437 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3440 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3441 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3444 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3445 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3448 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
3449 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3452 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3453 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3456 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3457 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3460 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3461 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3464 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3465 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_HI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3468 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3469 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3472 static const CGEN_IFMT ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
3473 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3476 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3477 32, 32, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3480 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3481 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3484 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3485 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3488 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3489 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3492 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3493 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3496 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3497 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3500 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3501 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3504 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3505 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3508 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3509 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3512 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3513 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3516 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3517 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3520 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3521 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3524 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3525 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3528 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3529 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3532 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3533 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3536 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3537 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3540 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3541 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3544 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3545 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3548 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3549 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3552 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3553 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3556 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3557 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3560 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3561 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3564 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3565 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3568 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3569 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3572 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3573 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3576 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3577 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3580 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3581 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3584 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3585 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3588 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3589 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3592 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3593 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3596 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3597 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3600 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3601 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3604 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3605 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3608 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3609 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U8
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3612 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3613 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3616 static const CGEN_IFMT ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3617 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3620 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3621 32, 40, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3624 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3625 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3628 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3629 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3632 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3633 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3636 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3637 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3640 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3641 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3644 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3645 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3648 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3649 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3652 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3653 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3656 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3657 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3660 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3661 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3664 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3665 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3668 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3669 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3672 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3673 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3676 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3677 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3680 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3681 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3684 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3685 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3688 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3689 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3692 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3693 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3696 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3697 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3700 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3701 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3704 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3705 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3708 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3709 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3712 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3713 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3716 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3717 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3720 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3721 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3724 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3725 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3728 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3729 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3732 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3733 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3736 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3737 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3740 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3741 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3744 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3745 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3748 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3749 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3752 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3753 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3756 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3757 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3760 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3761 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3764 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3765 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3768 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3769 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3772 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3773 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3776 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3777 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3780 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3781 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3784 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3785 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3788 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3789 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3792 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3793 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3796 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3797 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U16
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3800 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3801 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3804 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3805 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3808 static const CGEN_IFMT ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3809 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_40_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3812 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3813 32, 48, 0xffff2f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3816 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3817 32, 48, 0xffff3f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3820 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3821 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3824 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3825 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3828 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3829 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3832 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3833 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3836 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3837 32, 56, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3840 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3841 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3844 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3845 32, 64, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3848 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3849 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3852 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3853 32, 72, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3856 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3857 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_48_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3860 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3861 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3864 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3865 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3868 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3869 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3872 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3873 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3876 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3877 32, 56, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3880 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3881 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3884 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3885 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3888 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3889 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3892 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3893 32, 64, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3896 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3897 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3900 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3901 32, 72, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_DSP_24_U24
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3904 static const CGEN_IFMT ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
3905 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_2
) }, { F (F_DSP_24_U24
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_48_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3908 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3909 24, 24, 0xffff0f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3912 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3913 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3916 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3917 24, 24, 0xffff2f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3920 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3921 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3924 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3925 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3928 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
3929 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3932 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3933 24, 24, 0xffff8f, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3936 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3937 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3940 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
3941 24, 24, 0xffffaf, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3944 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3945 32, 32, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3948 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3949 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3952 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3953 32, 32, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3956 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3957 32, 40, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3960 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3961 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3964 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3965 32, 40, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3968 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3969 32, 48, 0xffff8f00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3972 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3973 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3976 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3977 32, 48, 0xffffaf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3980 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3981 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3984 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3985 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3988 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3989 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3992 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3993 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
3996 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
3997 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4000 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4001 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4004 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4005 32, 32, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4008 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4009 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4012 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4013 32, 32, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4016 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4017 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4020 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4021 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4024 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
4025 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4028 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4029 32, 40, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4032 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4033 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4036 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4037 32, 40, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4040 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4041 32, 48, 0xffffcf00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_SRC32_RN_PREFIXED_QI
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4044 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4045 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4048 static const CGEN_IFMT ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
4049 32, 48, 0xffffef00, { { F (F_0_4
) }, { F (F_9_3
) }, { F (F_18_1
) }, { F (F_SRC32_AN_PREFIXED
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_15_1
) }, { F (F_20_4
) }, { 0 } }
4052 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4053 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4056 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4057 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4060 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4061 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4064 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4065 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4068 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4069 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4072 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4073 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4076 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4077 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4080 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4081 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4084 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4085 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4088 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4089 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4092 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4093 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4096 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4097 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4100 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4101 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4104 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4105 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4108 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4109 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4112 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4113 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4116 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4117 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4120 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4121 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4124 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4125 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4128 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4129 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4132 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4133 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4136 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4137 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4140 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4141 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4144 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4145 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4148 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4149 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4152 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4153 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4156 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4157 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4160 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4161 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4164 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4165 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4168 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4169 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4172 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4173 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4176 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4177 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4180 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4181 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4184 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4185 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4188 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4189 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4192 static const CGEN_IFMT ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4193 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4196 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4197 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4200 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4201 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4204 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4205 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4208 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4209 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4212 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4213 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4216 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4217 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4220 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4221 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4224 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4225 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4228 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4229 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4232 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4233 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4236 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4237 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4240 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4241 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4244 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4245 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4248 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4249 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4252 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4253 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4256 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4257 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4260 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4261 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4264 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4265 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4268 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4269 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4272 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4273 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4276 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4277 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4280 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4281 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4284 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4285 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4288 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4289 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4292 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4293 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4296 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4297 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4300 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4301 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4304 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4305 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4308 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4309 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4312 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4313 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4316 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4317 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4320 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4321 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4324 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4325 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4328 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4329 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4332 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4333 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4336 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4337 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4340 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4341 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4344 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4345 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4348 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4349 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4352 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4353 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4356 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4357 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4360 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4361 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4364 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4365 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4368 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4369 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4372 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4373 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4376 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4377 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4380 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4381 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4384 static const CGEN_IFMT ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4385 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4388 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4389 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4392 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4393 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4396 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4397 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4400 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4401 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4404 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4405 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4408 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4409 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4412 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4413 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4416 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4417 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4420 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4421 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4424 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4425 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4428 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4429 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4432 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4433 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4436 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4437 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4440 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4441 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4444 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4445 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4448 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4449 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4452 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4453 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4456 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4457 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4460 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4461 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4464 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4465 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4468 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4469 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4472 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4473 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4476 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4477 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4480 static const CGEN_IFMT ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4481 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4484 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4485 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4488 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4489 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4492 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4493 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4496 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4497 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4500 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4501 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4504 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4505 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4508 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4509 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4512 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4513 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4516 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4517 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4520 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4521 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4524 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4525 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4528 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4529 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4532 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4533 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4536 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4537 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4540 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4541 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4544 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4545 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4548 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4549 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4552 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4553 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4556 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4557 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4560 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4561 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4564 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4565 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4568 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4569 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4572 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4573 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4576 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4577 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4580 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4581 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4584 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4585 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4588 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4589 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4592 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4593 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4596 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4597 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4600 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4601 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4604 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4605 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4608 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4609 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4612 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4613 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4616 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4617 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_QI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4620 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4621 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4624 static const CGEN_IFMT ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4625 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
4628 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4629 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4632 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4633 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4636 static const CGEN_IFMT ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4637 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
4640 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4641 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4644 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4645 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4648 static const CGEN_IFMT ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4649 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4652 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4653 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4656 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4657 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4660 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4661 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4664 static const CGEN_IFMT ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4665 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4668 static const CGEN_IFMT ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4669 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4672 static const CGEN_IFMT ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4673 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4676 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4677 32, 48, 0xff3f0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4680 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4681 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4684 static const CGEN_IFMT ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4685 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
4688 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4689 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4692 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4693 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4696 static const CGEN_IFMT ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4697 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4700 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4701 32, 64, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4704 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4705 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4708 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4709 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4712 static const CGEN_IFMT ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4713 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S16
) }, { 0 } }
4716 static const CGEN_IFMT ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4717 32, 72, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4720 static const CGEN_IFMT ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4721 32, 72, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S16
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4724 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4725 32, 32, 0xff3f0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4728 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4729 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4732 static const CGEN_IFMT ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4733 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
4736 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4737 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4740 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4741 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4744 static const CGEN_IFMT ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4745 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
4748 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4749 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4752 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4753 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4756 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4757 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4760 static const CGEN_IFMT ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4761 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4764 static const CGEN_IFMT ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4765 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S8
) }, { 0 } }
4768 static const CGEN_IFMT ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4769 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_48_S8
) }, { 0 } }
4772 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
4773 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4776 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED
= {
4777 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4780 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
4781 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_U8
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4784 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
4785 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_S8
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4788 static const CGEN_IFMT ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
4789 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_16_U16
) }, { F (F_4_1
) }, { F (F_DSP_8_S8
) }, { 0 } }
4792 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4793 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4796 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4797 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4800 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4801 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4804 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4805 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4808 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4809 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4812 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4813 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4816 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4817 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4820 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4821 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4824 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4825 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4828 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4829 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4832 static const CGEN_IFMT ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
4833 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4836 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4837 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4840 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4841 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4844 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4845 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4848 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4849 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4852 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4853 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4856 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4857 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4860 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4861 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4864 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4865 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4868 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4869 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4872 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4873 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4876 static const CGEN_IFMT ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
4877 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4880 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4881 16, 16, 0xff3f, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4884 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4885 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4888 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4889 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4892 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4893 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4896 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4897 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4900 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4901 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4904 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4905 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4908 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4909 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4912 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4913 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4916 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4917 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4920 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4921 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4924 static const CGEN_IFMT ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
4925 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
4928 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
4929 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4932 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
4933 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4936 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
4937 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4940 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
4941 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4944 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
4945 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4948 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
4949 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4952 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
4953 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4956 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
4957 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4960 static const CGEN_IFMT ifmt_shl16_w_dst_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
4961 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4964 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
4965 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4968 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
4969 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4972 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
4973 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4976 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
4977 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4980 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
4981 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4984 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
4985 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4988 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
4989 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4992 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
4993 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
4996 static const CGEN_IFMT ifmt_shl16_b_dst_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
4997 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5000 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5001 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5004 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5005 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5008 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5009 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5012 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5013 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5016 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5017 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5020 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5021 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5024 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5025 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5028 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5029 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5032 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5033 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5036 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5037 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5040 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5041 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5044 static const CGEN_IFMT ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5045 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5048 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5049 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5052 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5053 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5056 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5057 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5060 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5061 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5064 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5065 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5068 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5069 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5072 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5073 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5076 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5077 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5080 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5081 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5084 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5085 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5088 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5089 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5092 static const CGEN_IFMT ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5093 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5096 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5097 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5100 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5101 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5104 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5105 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5108 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5109 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5112 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5113 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5116 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5117 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5120 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5121 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5124 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5125 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5128 static const CGEN_IFMT ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5129 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5132 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5133 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5136 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5137 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5140 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5141 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5144 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5145 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5148 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5149 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5152 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5153 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5156 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5157 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5160 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5161 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5164 static const CGEN_IFMT ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5165 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5168 static const CGEN_IFMT ifmt_sccnd_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5169 16, 16, 0xff30, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5172 static const CGEN_IFMT ifmt_sccnd_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5173 16, 16, 0xffb0, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5176 static const CGEN_IFMT ifmt_sccnd_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5177 16, 16, 0xffb0, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5180 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5181 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5184 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5185 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5188 static const CGEN_IFMT ifmt_sccnd_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5189 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5192 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5193 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5196 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5197 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5200 static const CGEN_IFMT ifmt_sccnd_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5201 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5204 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5205 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5208 static const CGEN_IFMT ifmt_sccnd_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5209 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5212 static const CGEN_IFMT ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5213 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_COND16
) }, { 0 } }
5216 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5217 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5220 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5221 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5224 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5225 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5228 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5229 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5232 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5233 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5236 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5237 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5240 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5241 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5244 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5245 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5248 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5249 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5252 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5253 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5256 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5257 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5260 static const CGEN_IFMT ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5261 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5264 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5265 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5268 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5269 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5272 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5273 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5276 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5277 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5280 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5281 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5284 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5285 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5288 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5289 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5292 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5293 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5296 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5297 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
5300 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5301 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5304 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5305 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5308 static const CGEN_IFMT ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5309 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5312 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5313 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5316 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5317 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5320 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5321 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5324 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5325 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5328 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5329 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5332 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5333 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5336 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5337 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5340 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5341 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5344 static const CGEN_IFMT ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5345 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5348 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5349 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5352 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5353 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5356 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5357 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
5360 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5361 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5364 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5365 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5368 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5369 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
5372 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5373 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5376 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5377 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5380 static const CGEN_IFMT ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5381 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
5384 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
5385 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5388 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
5389 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5392 static const CGEN_IFMT ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
5393 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5396 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5397 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5400 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5401 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5404 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5405 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5408 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5409 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5412 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5413 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5416 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5417 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5420 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
5421 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5424 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
5425 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5428 static const CGEN_IFMT ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
5429 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5432 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5433 32, 32, 0xffff3f00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5436 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5437 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5440 static const CGEN_IFMT ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
5441 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5444 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5445 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5448 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5449 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5452 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5453 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5456 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5457 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5460 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5461 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5464 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5465 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5468 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5469 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5472 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5473 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5476 static const CGEN_IFMT ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5477 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5480 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5481 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5484 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5485 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5488 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5489 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5492 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5493 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5496 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5497 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5500 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5501 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5504 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5505 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5508 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5509 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5512 static const CGEN_IFMT ifmt_rorc16_w_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5513 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5516 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5517 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5520 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5521 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5524 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5525 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5528 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5529 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5532 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5533 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5536 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5537 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5540 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5541 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5544 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5545 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5548 static const CGEN_IFMT ifmt_rorc16_b_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5549 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5552 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_An_indirect_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5553 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5556 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5557 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5560 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5561 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5564 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5565 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5568 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5569 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5572 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5573 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5576 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5577 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5580 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5581 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5584 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5585 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5588 static const CGEN_IFMT ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5589 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5592 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI ATTRIBUTE_UNUSED
= {
5593 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5596 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5597 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5600 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5601 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5604 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5605 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5608 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5609 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5612 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI ATTRIBUTE_UNUSED
= {
5613 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5616 static const CGEN_IFMT ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI ATTRIBUTE_UNUSED
= {
5617 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
5620 static const CGEN_IFMT ifmt_push16_b_s_an_An16_push_S_derived ATTRIBUTE_UNUSED
= {
5621 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_5_3
) }, { 0 } }
5624 static const CGEN_IFMT ifmt_push16_b_s_rn_Rn16_push_S_derived ATTRIBUTE_UNUSED
= {
5625 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_5_3
) }, { 0 } }
5628 static const CGEN_IFMT ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived ATTRIBUTE_UNUSED
= {
5629 8, 8, 0xfb, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_5_1
) }, { F (F_4_1
) }, { 0 } }
5632 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5633 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5636 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5637 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5640 static const CGEN_IFMT ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
5641 24, 24, 0xfb0000, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
5644 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
5645 8, 8, 0xff, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { 0 } }
5648 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_R0h_direct_QI ATTRIBUTE_UNUSED
= {
5649 8, 8, 0xff, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_4_1
) }, { 0 } }
5652 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5653 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { 0 } }
5656 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5657 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { 0 } }
5660 static const CGEN_IFMT ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI ATTRIBUTE_UNUSED
= {
5661 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_5_3
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { 0 } }
5664 static const CGEN_IFMT ifmt_mulex_dst32_R3_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5665 16, 16, 0xffff, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5668 static const CGEN_IFMT ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
5669 24, 24, 0xffff3f, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_SI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5672 static const CGEN_IFMT ifmt_mulu_l_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
5673 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5676 static const CGEN_IFMT ifmt_mulu_l_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED
= {
5677 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5680 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5681 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5684 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5685 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5688 static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5689 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5692 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5693 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5696 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5697 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5700 static const CGEN_IFMT ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5701 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5704 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
5705 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5708 static const CGEN_IFMT ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
5709 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5712 static const CGEN_IFMT ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
5713 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5716 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5717 24, 24, 0xffff3f, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5720 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
5721 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5724 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
5725 24, 24, 0xffffbf, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5728 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5729 32, 32, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5732 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5733 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5736 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5737 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5740 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5741 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5744 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5745 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5748 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5749 32, 32, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5752 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
5753 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5756 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5757 32, 40, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5760 static const CGEN_IFMT ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
5761 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
5764 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5765 16, 16, 0xffbf, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5768 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5769 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5772 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5773 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5776 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5777 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5780 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5781 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5784 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5785 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5788 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5789 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5792 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5793 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5796 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5797 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5800 static const CGEN_IFMT ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI ATTRIBUTE_UNUSED
= {
5801 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
5804 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5805 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5808 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5809 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5812 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5813 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5816 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5817 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5820 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5821 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5824 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5825 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5828 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5829 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5832 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5833 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5836 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5837 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5840 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5841 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5844 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5845 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5848 static const CGEN_IFMT ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
5849 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5852 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5853 32, 32, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5856 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5857 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5860 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5861 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5864 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5865 32, 40, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5868 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5869 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5872 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5873 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5876 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5877 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5880 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5881 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5884 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5885 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_DSP_40_S8
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
5888 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5889 24, 24, 0xff3f00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5892 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5893 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5896 static const CGEN_IFMT ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
5897 24, 24, 0xffbf00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5900 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
5901 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5904 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5905 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5908 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5909 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5912 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
5913 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5916 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
5917 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5920 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
5921 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5924 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
5925 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5928 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
5929 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5932 static const CGEN_IFMT ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
5933 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5936 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
5937 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5940 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5941 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5944 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5945 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
5948 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
5949 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5952 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
5953 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5956 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
5957 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
5960 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
5961 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5964 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
5965 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5968 static const CGEN_IFMT ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
5969 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
5972 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI ATTRIBUTE_UNUSED
= {
5973 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5976 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI ATTRIBUTE_UNUSED
= {
5977 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5980 static const CGEN_IFMT ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI ATTRIBUTE_UNUSED
= {
5981 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5984 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
5985 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5988 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
5989 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5992 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
5993 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
5996 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
5997 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6000 static const CGEN_IFMT ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
6001 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6004 static const CGEN_IFMT ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
6005 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6008 static const CGEN_IFMT ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI ATTRIBUTE_UNUSED
= {
6009 8, 8, 0xff, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6012 static const CGEN_IFMT ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI ATTRIBUTE_UNUSED
= {
6013 8, 8, 0xff, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
6016 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6017 24, 24, 0xff2f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6020 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6021 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6024 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6025 24, 24, 0xff3f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6028 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6029 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6032 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6033 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6036 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6037 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6040 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6041 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6044 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6045 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6048 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6049 24, 24, 0xffbf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6052 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6053 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6056 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6057 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6060 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6061 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6064 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6065 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6068 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6069 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6072 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6073 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6076 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6077 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6080 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6081 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6084 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6085 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6088 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6089 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6092 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6093 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6096 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6097 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6100 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6101 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6104 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6105 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6108 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6109 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6112 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6113 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6116 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6117 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6120 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6121 32, 32, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6124 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6125 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6128 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6129 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6132 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6133 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6136 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6137 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6140 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6141 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6144 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6145 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6148 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6149 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U8
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6152 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6153 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6156 static const CGEN_IFMT ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6157 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_24_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6160 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6161 32, 32, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6164 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6165 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6168 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6169 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6172 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6173 32, 32, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6176 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6177 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6180 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6181 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6184 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6185 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6188 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6189 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6192 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6193 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6196 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6197 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6200 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6201 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6204 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6205 32, 32, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6208 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6209 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6212 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6213 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6216 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6217 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6220 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6221 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6224 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6225 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6228 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6229 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6232 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6233 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6236 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6237 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6240 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6241 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6244 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6245 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6248 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6249 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6252 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6253 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_32_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6256 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6257 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6260 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6261 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6264 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6265 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6268 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6269 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6272 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6273 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6276 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6277 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6280 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6281 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6284 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6285 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6288 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6289 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6292 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6293 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6296 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6297 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6300 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6301 32, 40, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6304 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6305 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6308 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6309 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6312 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6313 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6316 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6317 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6320 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6321 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6324 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6325 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6328 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6329 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6332 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6333 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6336 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6337 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U16
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6340 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6341 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6344 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6345 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_S16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6348 static const CGEN_IFMT ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6349 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_32_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6352 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6353 32, 40, 0xff2f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6356 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6357 32, 40, 0xff3f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6360 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6361 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6364 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6365 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6368 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6369 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6372 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6373 32, 40, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6376 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6377 32, 48, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6380 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6381 32, 48, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6384 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6385 32, 56, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6388 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6389 32, 56, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6392 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6393 32, 64, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6396 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6397 32, 64, 0xffbf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_40_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6400 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6401 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6404 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6405 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6408 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6409 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6412 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6413 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6416 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6417 32, 48, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6420 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6421 32, 48, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6424 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6425 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6428 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6429 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6432 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6433 32, 56, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6436 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6437 32, 56, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6440 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6441 32, 64, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_DSP_16_U24
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6444 static const CGEN_IFMT ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6445 32, 64, 0xffff0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_2
) }, { F (F_DSP_16_U24
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_40_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6448 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6449 16, 16, 0xff0f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6452 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6453 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6456 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6457 16, 16, 0xff2f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6460 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6461 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6464 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6465 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6468 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6469 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6472 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6473 16, 16, 0xff8f, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6476 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6477 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6480 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6481 16, 16, 0xffaf, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6484 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6485 24, 24, 0xff8f00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6488 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6489 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6492 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6493 24, 24, 0xffaf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6496 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6497 32, 32, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6500 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6501 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6504 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6505 32, 32, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6508 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6509 32, 40, 0xff8f0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6512 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6513 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6516 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6517 32, 40, 0xffaf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6520 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6521 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6524 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6525 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6528 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6529 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6532 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6533 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6536 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6537 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6540 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6541 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6544 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6545 24, 24, 0xffcf00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6548 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6549 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6552 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6553 24, 24, 0xffef00, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6556 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6557 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6560 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6561 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6564 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6565 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6568 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6569 32, 32, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6572 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6573 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6576 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6577 32, 32, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6580 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6581 32, 40, 0xffcf0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_SRC32_RN_UNPREFIXED_SI
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6584 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6585 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6588 static const CGEN_IFMT ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6589 32, 40, 0xffef0000, { { F (F_0_1
) }, { F (F_1_3
) }, { F (F_10_1
) }, { F (F_SRC32_AN_UNPREFIXED
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_12_4
) }, { 0 } }
6592 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6593 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6596 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6597 16, 16, 0xfb00, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6600 static const CGEN_IFMT ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
6601 24, 24, 0xfb0000, { { F (F_0_4
) }, { F (F_6_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_1
) }, { F (F_DST16_RN_QI_S
) }, { 0 } }
6604 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6605 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6608 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6609 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6612 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6613 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6616 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6617 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6620 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6621 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6624 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6625 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6628 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6629 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6632 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6633 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6636 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6637 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6640 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6641 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6644 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6645 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6648 static const CGEN_IFMT ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
6649 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6652 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6653 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6656 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6657 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6660 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6661 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6664 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6665 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6668 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6669 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6672 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6673 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6676 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6677 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6680 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6681 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6684 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6685 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6688 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6689 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6692 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6693 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6696 static const CGEN_IFMT ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
6697 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
6700 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
6701 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6704 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
6705 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6708 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
6709 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6712 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
6713 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6716 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
6717 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6720 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
6721 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6724 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
6725 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6728 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
6729 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6732 static const CGEN_IFMT ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
6733 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6736 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
6737 16, 16, 0xff0c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6740 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
6741 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6744 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
6745 16, 16, 0xff0e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6748 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
6749 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6752 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
6753 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6756 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6757 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6760 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
6761 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6764 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6765 24, 24, 0xff0f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6768 static const CGEN_IFMT ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
6769 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
6772 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6773 32, 48, 0xff3f0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6776 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6777 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6780 static const CGEN_IFMT ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6781 32, 48, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6784 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6785 32, 56, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6788 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6789 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6792 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6793 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6796 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6797 32, 64, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6800 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6801 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6804 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6805 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6808 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6809 32, 64, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6812 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6813 32, 72, 0xffbf0000, { { F (F_0_4
) }, { F (F_DSP_40_S32
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6816 static const CGEN_IFMT ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6817 32, 72, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_40_S32
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_4
) }, { 0 } }
6820 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
6821 32, 56, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6824 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
6825 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6828 static const CGEN_IFMT ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
6829 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6832 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
6833 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6836 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
6837 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6840 static const CGEN_IFMT ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
6841 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6844 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
6845 32, 40, 0xfffc0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6848 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
6849 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6852 static const CGEN_IFMT ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
6853 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6856 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
6857 32, 56, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6860 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
6861 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6864 static const CGEN_IFMT ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
6865 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6868 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
6869 32, 48, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6872 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
6873 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6876 static const CGEN_IFMT ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
6877 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_24_U24
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6880 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
6881 32, 40, 0xfffc0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6884 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
6885 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6888 static const CGEN_IFMT ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
6889 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { 0 } }
6892 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
6893 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_SI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6896 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI ATTRIBUTE_UNUSED
= {
6897 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6900 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI ATTRIBUTE_UNUSED
= {
6901 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6904 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6905 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6908 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6909 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6912 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6913 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6916 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6917 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6920 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6921 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6924 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6925 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6928 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI ATTRIBUTE_UNUSED
= {
6929 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6932 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
6933 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6936 static const CGEN_IFMT ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI ATTRIBUTE_UNUSED
= {
6937 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6940 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6941 16, 16, 0xff38, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6944 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6945 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6948 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6949 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6952 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6953 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6956 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6957 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6960 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6961 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6964 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6965 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6968 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6969 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6972 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6973 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6976 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6977 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6980 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6981 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6984 static const CGEN_IFMT ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
6985 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
6988 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
6989 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6992 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
6993 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
6996 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
6997 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7000 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7001 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7004 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7005 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7008 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7009 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7012 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7013 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7016 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7017 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7020 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7021 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7024 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7025 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7028 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7029 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7032 static const CGEN_IFMT ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7033 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_1
) }, { F (F_21_3
) }, { 0 } }
7036 static const CGEN_IFMT ifmt_stc16_src_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
7037 16, 16, 0xff8c, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7040 static const CGEN_IFMT ifmt_stc16_src_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
7041 16, 16, 0xff8e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7044 static const CGEN_IFMT ifmt_stc16_src_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
7045 16, 16, 0xff8e, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7048 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
7049 24, 24, 0xff8e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7052 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
7053 32, 32, 0xff8e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7056 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7057 24, 24, 0xff8f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7060 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
7061 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7064 static const CGEN_IFMT ifmt_stc16_src_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7065 24, 24, 0xff8f00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7068 static const CGEN_IFMT ifmt_stc16_src_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
7069 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { 0 } }
7072 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI ATTRIBUTE_UNUSED
= {
7073 16, 16, 0xfffc, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7076 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI ATTRIBUTE_UNUSED
= {
7077 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7080 static const CGEN_IFMT ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI ATTRIBUTE_UNUSED
= {
7081 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7084 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_SB_relative_SI ATTRIBUTE_UNUSED
= {
7085 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7088 static const CGEN_IFMT ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_absolute_SI ATTRIBUTE_UNUSED
= {
7089 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7092 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI ATTRIBUTE_UNUSED
= {
7093 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7096 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI ATTRIBUTE_UNUSED
= {
7097 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7100 static const CGEN_IFMT ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI ATTRIBUTE_UNUSED
= {
7101 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7104 static const CGEN_IFMT ifmt_jsri16a_dst16_16_20ar_SI_dst16_16_20_An_relative_SI ATTRIBUTE_UNUSED
= {
7105 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7108 static const CGEN_IFMT ifmt_jsri16w_dst16_16_20ar_HI_dst16_16_20_An_relative_HI ATTRIBUTE_UNUSED
= {
7109 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7112 static const CGEN_IFMT ifmt_jmpi16_a_16_dst16_16_16_An_relative_SI ATTRIBUTE_UNUSED
= {
7113 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7116 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7117 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7120 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7121 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7124 static const CGEN_IFMT ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_16_absolute_HI ATTRIBUTE_UNUSED
= {
7125 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7128 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
7129 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7132 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
7133 16, 16, 0xff00, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7136 static const CGEN_IFMT ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_16_absolute_QI ATTRIBUTE_UNUSED
= {
7137 24, 24, 0xff0000, { { F (F_0_2
) }, { F (F_2_2
) }, { F (F_DSP_8_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { 0 } }
7140 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
7141 32, 56, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_HI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7144 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_direct_Prefixed_HI ATTRIBUTE_UNUSED
= {
7145 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7148 static const CGEN_IFMT ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_indirect_Prefixed_HI ATTRIBUTE_UNUSED
= {
7149 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_24_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7152 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7153 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7156 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7157 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7160 static const CGEN_IFMT ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7161 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7164 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7165 32, 72, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7168 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7169 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7172 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7173 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7176 static const CGEN_IFMT ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7177 32, 72, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_56_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S16
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7180 static const CGEN_IFMT ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI ATTRIBUTE_UNUSED
= {
7181 32, 80, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_64_S16
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7184 static const CGEN_IFMT ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI ATTRIBUTE_UNUSED
= {
7185 32, 80, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_64_S16
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S16
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7188 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_Rn_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
7189 32, 40, 0xffff3f00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7192 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_direct_Prefixed_QI ATTRIBUTE_UNUSED
= {
7193 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7196 static const CGEN_IFMT ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_indirect_Prefixed_QI ATTRIBUTE_UNUSED
= {
7197 32, 40, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_24_S8
) }, { 0 } }
7200 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7201 32, 48, 0xffffbf00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U8
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7204 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7205 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7208 static const CGEN_IFMT ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7209 32, 48, 0xffffff00, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7212 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7213 32, 56, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U16
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7216 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7217 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7220 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7221 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_S16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7224 static const CGEN_IFMT ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
7225 32, 56, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_40_S8
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { 0 } }
7228 static const CGEN_IFMT ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI ATTRIBUTE_UNUSED
= {
7229 32, 64, 0xffffbf00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DSP_24_U24
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_56_S8
) }, { 0 } }
7232 static const CGEN_IFMT ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI ATTRIBUTE_UNUSED
= {
7233 32, 64, 0xffffff00, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_DSP_24_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_DSP_48_S8
) }, { F (F_18_2
) }, { F (F_20_4
) }, { F (F_DSP_56_S8
) }, { 0 } }
7236 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed ATTRIBUTE_UNUSED
= {
7237 24, 24, 0xffff38, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_DST32_RN_PREFIXED_QI
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7240 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed ATTRIBUTE_UNUSED
= {
7241 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7244 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed ATTRIBUTE_UNUSED
= {
7245 24, 24, 0xffffb8, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_BITNO32_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7248 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7249 32, 32, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U11_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7252 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7253 32, 40, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7256 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed ATTRIBUTE_UNUSED
= {
7257 32, 48, 0xffffb800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_1
) }, { F (F_BITBASE32_24_U27_PREFIXED
) }, { F (F_DST32_AN_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7260 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7261 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U11_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7264 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7265 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7268 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7269 32, 32, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_S11_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7272 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed ATTRIBUTE_UNUSED
= {
7273 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_S19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7276 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed ATTRIBUTE_UNUSED
= {
7277 32, 40, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U19_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7280 static const CGEN_IFMT ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed ATTRIBUTE_UNUSED
= {
7281 32, 48, 0xfffff800, { { F (F_0_4
) }, { F (F_12_3
) }, { F (F_16_2
) }, { F (F_BITBASE32_24_U27_PREFIXED
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_15_1
) }, { F (F_18_3
) }, { 0 } }
7284 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_Rn_direct ATTRIBUTE_UNUSED
= {
7285 24, 24, 0xfffc00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7288 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_An_direct ATTRIBUTE_UNUSED
= {
7289 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7292 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_An_indirect ATTRIBUTE_UNUSED
= {
7293 16, 16, 0xfffe, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7296 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative ATTRIBUTE_UNUSED
= {
7297 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7300 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative ATTRIBUTE_UNUSED
= {
7301 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7304 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative ATTRIBUTE_UNUSED
= {
7305 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7308 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative ATTRIBUTE_UNUSED
= {
7309 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7312 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative ATTRIBUTE_UNUSED
= {
7313 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7316 static const CGEN_IFMT ifmt_bxor16_X_bit16_16_bit16_16_16_absolute ATTRIBUTE_UNUSED
= {
7317 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7320 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7321 16, 16, 0xff38, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7324 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7325 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7328 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed ATTRIBUTE_UNUSED
= {
7329 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7332 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7333 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7336 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7337 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7340 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7341 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7344 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7345 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7348 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7349 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7352 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7353 24, 24, 0xfff800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7356 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7357 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7360 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7361 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7364 static const CGEN_IFMT ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7365 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7368 static const CGEN_IFMT ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S ATTRIBUTE_UNUSED
= {
7369 16, 16, 0xf800, { { F (F_0_2
) }, { F (F_BITBASE16_U11_S
) }, { F (F_2_2
) }, { F (F_4_1
) }, { 0 } }
7372 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_Rn_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7373 24, 24, 0xff3800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7376 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_direct_Unprefixed ATTRIBUTE_UNUSED
= {
7377 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7380 static const CGEN_IFMT ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_indirect_Unprefixed ATTRIBUTE_UNUSED
= {
7381 24, 24, 0xffb800, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_BITNO32_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_16_U8
) }, { 0 } }
7384 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7385 32, 32, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7388 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7389 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7392 static const CGEN_IFMT ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7393 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S11_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { F (F_DSP_24_U8
) }, { 0 } }
7396 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7397 32, 40, 0xffb80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7400 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_SB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7401 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7404 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_FB_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7405 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_S19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7408 static const CGEN_IFMT ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7409 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U19_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_3
) }, { 0 } }
7412 static const CGEN_IFMT ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_An_relative_Unprefixed ATTRIBUTE_UNUSED
= {
7413 32, 48, 0xffb80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_U8
) }, { F (F_10_3
) }, { 0 } }
7416 static const CGEN_IFMT ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_absolute_Unprefixed ATTRIBUTE_UNUSED
= {
7417 32, 48, 0xfff80000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_BITBASE32_16_U27_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_DSP_40_U8
) }, { F (F_10_3
) }, { 0 } }
7420 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_Rn_direct ATTRIBUTE_UNUSED
= {
7421 32, 32, 0xfffc0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7424 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_An_direct ATTRIBUTE_UNUSED
= {
7425 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7428 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_An_relative ATTRIBUTE_UNUSED
= {
7429 32, 32, 0xfffe0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7432 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_SB_relative ATTRIBUTE_UNUSED
= {
7433 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7436 static const CGEN_IFMT ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_FB_relative ATTRIBUTE_UNUSED
= {
7437 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_24_U8
) }, { 0 } }
7440 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_An_relative ATTRIBUTE_UNUSED
= {
7441 32, 40, 0xfffe0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7444 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_SB_relative ATTRIBUTE_UNUSED
= {
7445 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7448 static const CGEN_IFMT ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_absolute ATTRIBUTE_UNUSED
= {
7449 32, 40, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_4
) }, { F (F_8_4
) }, { 0 } }
7452 static const CGEN_IFMT ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect ATTRIBUTE_UNUSED
= {
7453 24, 24, 0xfffe00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_DSP_16_U8
) }, { 0 } }
7456 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7457 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7460 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7461 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7464 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7465 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7468 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7469 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7472 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7473 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7476 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7477 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7480 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7481 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7484 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7485 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7488 static const CGEN_IFMT ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7489 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7492 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7493 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_HI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7496 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7497 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7500 static const CGEN_IFMT ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI ATTRIBUTE_UNUSED
= {
7501 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7504 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7505 32, 32, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7508 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7509 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7512 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7513 32, 32, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7516 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7517 32, 40, 0xffb00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7520 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7521 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7524 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7525 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7528 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7529 32, 40, 0xfff00000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7532 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7533 32, 48, 0xffb00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7536 static const CGEN_IFMT ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7537 32, 48, 0xfff00000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_7_1
) }, { F (F_LAB_40_8
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7540 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7541 24, 24, 0xff3000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_QI
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7544 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7545 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7548 static const CGEN_IFMT ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI ATTRIBUTE_UNUSED
= {
7549 24, 24, 0xffb000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7552 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI ATTRIBUTE_UNUSED
= {
7553 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7556 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI ATTRIBUTE_UNUSED
= {
7557 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7560 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI ATTRIBUTE_UNUSED
= {
7561 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7564 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI ATTRIBUTE_UNUSED
= {
7565 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7568 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI ATTRIBUTE_UNUSED
= {
7569 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7572 static const CGEN_IFMT ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI ATTRIBUTE_UNUSED
= {
7573 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7576 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI ATTRIBUTE_UNUSED
= {
7577 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7580 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI ATTRIBUTE_UNUSED
= {
7581 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7584 static const CGEN_IFMT ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI ATTRIBUTE_UNUSED
= {
7585 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7588 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI ATTRIBUTE_UNUSED
= {
7589 32, 32, 0xff0e0000, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7592 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI ATTRIBUTE_UNUSED
= {
7593 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7596 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI ATTRIBUTE_UNUSED
= {
7597 32, 32, 0xff0f0000, { { F (F_0_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_24_8
) }, { 0 } }
7600 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI ATTRIBUTE_UNUSED
= {
7601 32, 40, 0xff0e0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7604 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI ATTRIBUTE_UNUSED
= {
7605 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7608 static const CGEN_IFMT ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI ATTRIBUTE_UNUSED
= {
7609 32, 40, 0xff0f0000, { { F (F_0_4
) }, { F (F_LAB_32_8
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { 0 } }
7612 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI ATTRIBUTE_UNUSED
= {
7613 24, 24, 0xff0c00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_DST16_RN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7616 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI ATTRIBUTE_UNUSED
= {
7617 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7620 static const CGEN_IFMT ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI ATTRIBUTE_UNUSED
= {
7621 24, 24, 0xff0e00, { { F (F_0_4
) }, { F (F_12_2
) }, { F (F_14_1
) }, { F (F_DST16_AN
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_IMM_8_S4
) }, { F (F_LAB_16_8
) }, { 0 } }
7624 static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI ATTRIBUTE_UNUSED
= {
7625 8, 8, 0xdf, { { F (F_0_2
) }, { F (F_7_1
) }, { F (F_IMM1_S
) }, { F (F_3_4
) }, { 0 } }
7628 static const CGEN_IFMT ifmt_add32_l_s_imm1_S_an_dst32_1_S_A1_direct_HI ATTRIBUTE_UNUSED
= {
7629 8, 8, 0xdf, { { F (F_0_2
) }, { F (F_7_1
) }, { F (F_IMM1_S
) }, { F (F_3_4
) }, { 0 } }
7632 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7633 16, 16, 0xff30, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_DST32_RN_UNPREFIXED_SI
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7636 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7637 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7640 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7641 16, 16, 0xffb0, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7644 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7645 24, 24, 0xffb000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U8
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7648 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7649 32, 32, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U16
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7652 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7653 32, 40, 0xffb00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_1
) }, { F (F_DSP_16_U24
) }, { F (F_DST32_AN_UNPREFIXED
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7656 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7657 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7660 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7661 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7664 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7665 24, 24, 0xfff000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S8
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7668 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7669 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_S16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7672 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7673 32, 32, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U16
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7676 static const CGEN_IFMT ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_SI ATTRIBUTE_UNUSED
= {
7677 32, 40, 0xfff00000, { { F (F_0_3
) }, { F (F_4_3
) }, { F (F_8_2
) }, { F (F_DSP_16_U24
) }, { F (F_3_1
) }, { F (F_7_1
) }, { F (F_10_2
) }, { F (F_IMM_12_S4
) }, { 0 } }
7680 static const CGEN_IFMT ifmt_add16_wQ_sp ATTRIBUTE_UNUSED
= {
7681 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
7684 static const CGEN_IFMT ifmt_add16_b_G_sp ATTRIBUTE_UNUSED
= {
7685 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7688 static const CGEN_IFMT ifmt_add16_w_G_sp ATTRIBUTE_UNUSED
= {
7689 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_3
) }, { F (F_7_1
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7692 static const CGEN_IFMT ifmt_add32_l_imm3_Q ATTRIBUTE_UNUSED
= {
7693 8, 8, 0xce, { { F (F_0_2
) }, { F (F_IMM3_S
) }, { F (F_4_3
) }, { 0 } }
7696 static const CGEN_IFMT ifmt_add32_l_imm8_S ATTRIBUTE_UNUSED
= {
7697 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7700 static const CGEN_IFMT ifmt_add32_l_imm16_G ATTRIBUTE_UNUSED
= {
7701 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7704 static const CGEN_IFMT ifmt_dadc16_b_r0h_r0l ATTRIBUTE_UNUSED
= {
7705 16, 16, 0xffff, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { 0 } }
7708 static const CGEN_IFMT ifmt_bm16_c ATTRIBUTE_UNUSED
= {
7709 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_COND16
) }, { 0 } }
7712 static const CGEN_IFMT ifmt_bm32_c ATTRIBUTE_UNUSED
= {
7713 16, 16, 0xffb8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_COND32
) }, { F (F_10_3
) }, { 0 } }
7716 static const CGEN_IFMT ifmt_brk16 ATTRIBUTE_UNUSED
= {
7717 8, 8, 0xff, { { F (F_0_4
) }, { F (F_4_4
) }, { 0 } }
7720 static const CGEN_IFMT ifmt_btst_s ATTRIBUTE_UNUSED
= {
7721 24, 24, 0xce0000, { { F (F_0_2
) }, { F (F_IMM3_S
) }, { F (F_4_3
) }, { F (F_DSP_8_U16
) }, { 0 } }
7724 static const CGEN_IFMT ifmt_dec16_w ATTRIBUTE_UNUSED
= {
7725 8, 8, 0xf7, { { F (F_0_4
) }, { F (F_DST16_AN_S
) }, { F (F_5_3
) }, { 0 } }
7728 static const CGEN_IFMT ifmt_div32_b_Imm_16_QI ATTRIBUTE_UNUSED
= {
7729 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_3
) }, { F (F_11_1
) }, { F (F_12_4
) }, { F (F_DSP_16_S8
) }, { 0 } }
7732 static const CGEN_IFMT ifmt_div32_w_Imm_16_HI ATTRIBUTE_UNUSED
= {
7733 32, 32, 0xffff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_3
) }, { F (F_11_1
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7736 static const CGEN_IFMT ifmt_enter16 ATTRIBUTE_UNUSED
= {
7737 24, 24, 0xffff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U8
) }, { 0 } }
7740 static const CGEN_IFMT ifmt_enter32 ATTRIBUTE_UNUSED
= {
7741 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_U8
) }, { 0 } }
7744 static const CGEN_IFMT ifmt_fclr16 ATTRIBUTE_UNUSED
= {
7745 16, 16, 0xff8f, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { 0 } }
7748 static const CGEN_IFMT ifmt_fclr ATTRIBUTE_UNUSED
= {
7749 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7752 static const CGEN_IFMT ifmt_int16 ATTRIBUTE_UNUSED
= {
7753 16, 16, 0xffc0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_2
) }, { F (F_DSP_10_U6
) }, { 0 } }
7756 static const CGEN_IFMT ifmt_int32 ATTRIBUTE_UNUSED
= {
7757 16, 16, 0xff03, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_U6
) }, { F (F_14_2
) }, { 0 } }
7760 static const CGEN_IFMT ifmt_jcnd16_5 ATTRIBUTE_UNUSED
= {
7761 16, 16, 0xf800, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_COND16J_5
) }, { F (F_LAB_8_8
) }, { 0 } }
7764 static const CGEN_IFMT ifmt_jcnd16 ATTRIBUTE_UNUSED
= {
7765 24, 24, 0xfff000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_COND16
) }, { F (F_LAB_16_8
) }, { 0 } }
7768 static const CGEN_IFMT ifmt_jcnd32 ATTRIBUTE_UNUSED
= {
7769 16, 16, 0x8e00, { { F (F_0_1
) }, { F (F_COND32J
) }, { F (F_4_3
) }, { F (F_LAB_8_8
) }, { 0 } }
7772 static const CGEN_IFMT ifmt_jmp16_s ATTRIBUTE_UNUSED
= {
7773 8, 8, 0xf8, { { F (F_0_4
) }, { F (F_4_1
) }, { F (F_LAB_5_3
) }, { 0 } }
7776 static const CGEN_IFMT ifmt_jmp16_b ATTRIBUTE_UNUSED
= {
7777 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_8
) }, { 0 } }
7780 static const CGEN_IFMT ifmt_jmp16_w ATTRIBUTE_UNUSED
= {
7781 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_16
) }, { 0 } }
7784 static const CGEN_IFMT ifmt_jmp16_a ATTRIBUTE_UNUSED
= {
7785 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_LAB_8_24
) }, { 0 } }
7788 static const CGEN_IFMT ifmt_jmps16 ATTRIBUTE_UNUSED
= {
7789 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { 0 } }
7792 static const CGEN_IFMT ifmt_jmp32_s ATTRIBUTE_UNUSED
= {
7793 8, 8, 0xce, { { F (F_0_2
) }, { F (F_LAB32_JMP_S
) }, { F (F_4_3
) }, { 0 } }
7796 static const CGEN_IFMT ifmt_ldc16_imm16 ATTRIBUTE_UNUSED
= {
7797 32, 32, 0xff8f0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { F (F_DSP_16_S16
) }, { 0 } }
7800 static const CGEN_IFMT ifmt_ldc32_imm16_cr1 ATTRIBUTE_UNUSED
= {
7801 32, 32, 0xfff80000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { F (F_DSP_16_S16
) }, { 0 } }
7804 static const CGEN_IFMT ifmt_ldc32_imm16_cr2 ATTRIBUTE_UNUSED
= {
7805 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7808 static const CGEN_IFMT ifmt_ldc32_imm16_cr3 ATTRIBUTE_UNUSED
= {
7809 32, 40, 0xfff80000, { { F (F_0_4
) }, { F (F_DSP_16_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7812 static const CGEN_IFMT ifmt_ldctx16 ATTRIBUTE_UNUSED
= {
7813 32, 56, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_32_U24
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { F (F_DSP_16_U16
) }, { 0 } }
7816 static const CGEN_IFMT ifmt_ldipl16_imm ATTRIBUTE_UNUSED
= {
7817 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_IMM_13_U3
) }, { 0 } }
7820 static const CGEN_IFMT ifmt_mov16_w_S_imm_a0 ATTRIBUTE_UNUSED
= {
7821 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S16
) }, { 0 } }
7824 static const CGEN_IFMT ifmt_mov32_l_a0 ATTRIBUTE_UNUSED
= {
7825 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S24
) }, { 0 } }
7828 static const CGEN_IFMT ifmt_popc16_imm16 ATTRIBUTE_UNUSED
= {
7829 16, 16, 0xff8f, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_1
) }, { F (F_9_3
) }, { F (F_12_4
) }, { 0 } }
7832 static const CGEN_IFMT ifmt_popc32_imm16_cr1 ATTRIBUTE_UNUSED
= {
7833 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7836 static const CGEN_IFMT ifmt_popc32_imm16_cr2 ATTRIBUTE_UNUSED
= {
7837 16, 16, 0xfff8, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_1
) }, { F (F_13_3
) }, { 0 } }
7840 static const CGEN_IFMT ifmt_popm16 ATTRIBUTE_UNUSED
= {
7841 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_8
) }, { 0 } }
7844 static const CGEN_IFMT ifmt_pushm16 ATTRIBUTE_UNUSED
= {
7845 16, 16, 0xff00, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_8
) }, { 0 } }
7848 static const CGEN_IFMT ifmt_push32_l_imm ATTRIBUTE_UNUSED
= {
7849 32, 48, 0xffff0000, { { F (F_0_4
) }, { F (F_DSP_16_S32
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_12_4
) }, { 0 } }
7852 static const CGEN_IFMT ifmt_sha16_L_imm_r2r0 ATTRIBUTE_UNUSED
= {
7853 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
7856 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_r0h ATTRIBUTE_UNUSED
= {
7857 24, 24, 0xff0000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_S8
) }, { 0 } }
7860 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8sb ATTRIBUTE_UNUSED
= {
7861 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_U8
) }, { F (F_DSP_24_S8
) }, { 0 } }
7864 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_dsp8fb ATTRIBUTE_UNUSED
= {
7865 32, 32, 0xff000000, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_S8
) }, { F (F_DSP_24_S8
) }, { 0 } }
7868 static const CGEN_IFMT ifmt_stzx16_imm8_imm8_abs16 ATTRIBUTE_UNUSED
= {
7869 32, 40, 0xff000000, { { F (F_0_4
) }, { F (F_DSP_32_S8
) }, { F (F_4_4
) }, { F (F_DSP_8_S8
) }, { F (F_DSP_16_U16
) }, { 0 } }
7874 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
7875 #define A(a) (1 << CGEN_INSN_##a)
7877 #define A(a) (1 << CGEN_INSN_/**/a)
7879 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
7880 #define OPERAND(op) M32C_OPERAND_##op
7882 #define OPERAND(op) M32C_OPERAND_/**/op
7884 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
7885 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
7887 /* The instruction table. */
7889 static const CGEN_OPCODE m32c_cgen_insn_opcode_table
[MAX_INSNS
] =
7891 /* Special null first entry.
7892 A `num' value of zero is thus invalid.
7893 Also, the special `invalid' insn resides here. */
7894 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
7895 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
7898 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7899 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1980b00 }
7901 /* extz ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
7904 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7905 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1982b00 }
7907 /* extz ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
7910 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
7911 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1983b00 }
7913 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
7916 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7917 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1908b00 }
7919 /* extz ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
7922 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7923 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190ab00 }
7925 /* extz ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
7928 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
7929 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190bb00 }
7931 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
7934 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7935 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1900b00 }
7937 /* extz ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
7940 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7941 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1902b00 }
7943 /* extz ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
7946 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
7947 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1903b00 }
7949 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
7952 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7953 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1920b00 }
7955 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
7958 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7959 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1922b00 }
7961 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
7964 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7965 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1923b00 }
7967 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
7970 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7971 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1940b00 }
7973 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
7976 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7977 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1942b00 }
7979 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
7982 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7983 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1943b00 }
7985 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
7988 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7989 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1960b00 }
7991 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
7994 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
7995 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1962b00 }
7997 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8000 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8001 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1963b00 }
8003 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
8006 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8007 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1928b00 }
8009 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
8012 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8013 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192ab00 }
8015 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
8018 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8019 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192bb00 }
8021 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
8024 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8025 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1948b00 }
8027 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
8030 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8031 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194ab00 }
8033 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
8036 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8037 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194bb00 }
8039 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
8042 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8043 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192cb00 }
8045 /* extz ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
8048 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8049 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192eb00 }
8051 /* extz ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
8054 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8055 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192fb00 }
8057 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
8060 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8061 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194cb00 }
8063 /* extz ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
8066 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8067 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194eb00 }
8069 /* extz ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
8072 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8073 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194fb00 }
8075 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
8078 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
8079 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196cb00 }
8081 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u16} */
8084 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8085 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196eb00 }
8087 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u16} */
8090 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8091 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196fb00 }
8093 /* extz ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
8096 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
8097 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x1968b00 }
8099 /* extz ${Dsp-24-u8}[sb],${Dsp-32-u24} */
8102 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8103 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196ab00 }
8105 /* extz ${Dsp-24-s8}[fb],${Dsp-32-u24} */
8108 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8109 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196bb00 }
8111 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8114 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8115 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a80b00 }
8117 /* extz ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
8120 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8121 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a82b00 }
8123 /* extz ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
8126 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8127 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a83b00 }
8129 /* extz ${Dsp-24-u16},$Dst32RnPrefixedHI */
8132 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8133 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b83b00 }
8135 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8138 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8139 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a08b00 }
8141 /* extz ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
8144 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8145 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0ab00 }
8147 /* extz ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
8150 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8151 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0bb00 }
8153 /* extz ${Dsp-24-u16},$Dst32AnPrefixedHI */
8156 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8157 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0bb00 }
8159 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8162 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8163 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a00b00 }
8165 /* extz ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
8168 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8169 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a02b00 }
8171 /* extz ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
8174 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8175 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a03b00 }
8177 /* extz ${Dsp-24-u16},[$Dst32AnPrefixed] */
8180 { { MNEM
, ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8181 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b03b00 }
8183 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
8186 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8187 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a20b00 }
8189 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8192 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8193 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a22b00 }
8195 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8198 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8199 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a23b00 }
8201 /* extz ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
8204 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8205 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b23b00 }
8207 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
8210 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8211 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a40b00 }
8213 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8216 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8217 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a42b00 }
8219 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
8222 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8223 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a43b00 }
8225 /* extz ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
8228 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8229 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b43b00 }
8231 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
8234 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8235 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a60b00 }
8237 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
8240 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8241 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a62b00 }
8243 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
8246 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8247 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a63b00 }
8249 /* extz ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
8252 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8253 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b63b00 }
8255 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
8258 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8259 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a28b00 }
8261 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
8264 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8265 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2ab00 }
8267 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
8270 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8271 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2bb00 }
8273 /* extz ${Dsp-24-u16},${Dsp-40-u8}[sb] */
8276 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
8277 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b2bb00 }
8279 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
8282 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8283 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a48b00 }
8285 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
8288 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8289 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4ab00 }
8291 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
8294 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8295 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4bb00 }
8297 /* extz ${Dsp-24-u16},${Dsp-40-u16}[sb] */
8300 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
8301 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b4bb00 }
8303 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
8306 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8307 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2cb00 }
8309 /* extz ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
8312 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8313 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2eb00 }
8315 /* extz ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
8318 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8319 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2fb00 }
8321 /* extz ${Dsp-24-u16},${Dsp-40-s8}[fb] */
8324 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
8325 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b2fb00 }
8327 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
8330 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8331 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4cb00 }
8333 /* extz ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
8336 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8337 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4eb00 }
8339 /* extz ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
8342 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8343 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4fb00 }
8345 /* extz ${Dsp-24-u16},${Dsp-40-s16}[fb] */
8348 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
8349 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b4fb00 }
8351 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
8354 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
8355 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6cb00 }
8357 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u16} */
8360 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
8361 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6eb00 }
8363 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u16} */
8366 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
8367 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6fb00 }
8369 /* extz ${Dsp-24-u16},${Dsp-40-u16} */
8372 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
8373 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b6fb00 }
8375 /* extz ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
8378 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
8379 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a68b00 }
8381 /* extz ${Dsp-24-u16}[sb],${Dsp-40-u24} */
8384 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
8385 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6ab00 }
8387 /* extz ${Dsp-24-s16}[fb],${Dsp-40-u24} */
8390 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
8391 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6bb00 }
8393 /* extz ${Dsp-24-u16},${Dsp-40-u24} */
8396 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
8397 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b6bb00 }
8399 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8402 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8403 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b80b00 }
8405 /* extz ${Dsp-24-u24},$Dst32RnPrefixedHI */
8408 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8409 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b82b00 }
8411 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8414 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8415 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b08b00 }
8417 /* extz ${Dsp-24-u24},$Dst32AnPrefixedHI */
8420 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8421 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0ab00 }
8423 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8426 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8427 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b00b00 }
8429 /* extz ${Dsp-24-u24},[$Dst32AnPrefixed] */
8432 { { MNEM
, ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8433 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b02b00 }
8435 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
8438 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8439 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b20b00 }
8441 /* extz ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
8444 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8445 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b22b00 }
8447 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
8450 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8451 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b40b00 }
8453 /* extz ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
8456 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8457 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b42b00 }
8459 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
8462 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8463 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b60b00 }
8465 /* extz ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
8468 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8469 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b62b00 }
8471 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
8474 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
8475 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b28b00 }
8477 /* extz ${Dsp-24-u24},${Dsp-48-u8}[sb] */
8480 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
8481 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b2ab00 }
8483 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
8486 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
8487 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b48b00 }
8489 /* extz ${Dsp-24-u24},${Dsp-48-u16}[sb] */
8492 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
8493 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b4ab00 }
8495 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
8498 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
8499 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2cb00 }
8501 /* extz ${Dsp-24-u24},${Dsp-48-s8}[fb] */
8504 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
8505 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2eb00 }
8507 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
8510 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
8511 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4cb00 }
8513 /* extz ${Dsp-24-u24},${Dsp-48-s16}[fb] */
8516 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
8517 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4eb00 }
8519 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
8522 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
8523 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6cb00 }
8525 /* extz ${Dsp-24-u24},${Dsp-48-u16} */
8528 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
8529 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6eb00 }
8531 /* extz ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
8534 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
8535 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b68b00 }
8537 /* extz ${Dsp-24-u24},${Dsp-48-u24} */
8540 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
8541 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b6ab00 }
8543 /* extz $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
8546 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8547 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1c80b }
8549 /* extz [$Src32AnPrefixed],$Dst32RnPrefixedHI */
8552 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8553 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1880b }
8555 /* extz $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
8558 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8559 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1c08b }
8561 /* extz [$Src32AnPrefixed],$Dst32AnPrefixedHI */
8564 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8565 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1808b }
8567 /* extz $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
8570 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8571 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1c00b }
8573 /* extz [$Src32AnPrefixed],[$Dst32AnPrefixed] */
8576 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8577 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1800b }
8579 /* extz $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
8582 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8583 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c20b00 }
8585 /* extz [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
8588 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8589 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1820b00 }
8591 /* extz $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
8594 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8595 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c40b00 }
8597 /* extz [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
8600 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8601 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1840b00 }
8603 /* extz $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
8606 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8607 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c60b00 }
8609 /* extz [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
8612 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8613 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1860b00 }
8615 /* extz $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
8618 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
8619 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c28b00 }
8621 /* extz [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
8624 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
8625 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1828b00 }
8627 /* extz $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
8630 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
8631 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c48b00 }
8633 /* extz [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
8636 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
8637 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1848b00 }
8639 /* extz $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
8642 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
8643 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c2cb00 }
8645 /* extz [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
8648 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
8649 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x182cb00 }
8651 /* extz $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
8654 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
8655 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c4cb00 }
8657 /* extz [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
8660 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
8661 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x184cb00 }
8663 /* extz $Src32RnPrefixedQI,${Dsp-24-u16} */
8666 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
8667 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c6cb00 }
8669 /* extz [$Src32AnPrefixed],${Dsp-24-u16} */
8672 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
8673 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x186cb00 }
8675 /* extz $Src32RnPrefixedQI,${Dsp-24-u24} */
8678 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
8679 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c68b00 }
8681 /* extz [$Src32AnPrefixed],${Dsp-24-u24} */
8684 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
8685 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1868b00 }
8687 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8690 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8691 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1980700 }
8693 /* exts.b ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
8696 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8697 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1982700 }
8699 /* exts.b ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
8702 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8703 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1983700 }
8705 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8708 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8709 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1908700 }
8711 /* exts.b ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
8714 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8715 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190a700 }
8717 /* exts.b ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
8720 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8721 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x190b700 }
8723 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8726 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8727 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1900700 }
8729 /* exts.b ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
8732 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8733 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1902700 }
8735 /* exts.b ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
8738 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8739 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1903700 }
8741 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
8744 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8745 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1920700 }
8747 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
8750 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8751 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1922700 }
8753 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
8756 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8757 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1923700 }
8759 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
8762 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8763 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1940700 }
8765 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
8768 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8769 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1942700 }
8771 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
8774 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8775 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1943700 }
8777 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
8780 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8781 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1960700 }
8783 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8786 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8787 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1962700 }
8789 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
8792 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8793 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1963700 }
8795 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
8798 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8799 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1928700 }
8801 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
8804 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8805 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192a700 }
8807 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
8810 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
8811 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x192b700 }
8813 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
8816 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8817 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1948700 }
8819 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
8822 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8823 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194a700 }
8825 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
8828 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
8829 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x194b700 }
8831 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
8834 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8835 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192c700 }
8837 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
8840 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8841 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192e700 }
8843 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
8846 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
8847 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x192f700 }
8849 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
8852 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8853 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194c700 }
8855 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
8858 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8859 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194e700 }
8861 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
8864 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
8865 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x194f700 }
8867 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
8870 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
8871 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196c700 }
8873 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u16} */
8876 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8877 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196e700 }
8879 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u16} */
8882 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
8883 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_HI
, { 0x196f700 }
8885 /* exts.b ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
8888 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
8889 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x1968700 }
8891 /* exts.b ${Dsp-24-u8}[sb],${Dsp-32-u24} */
8894 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8895 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196a700 }
8897 /* exts.b ${Dsp-24-s8}[fb],${Dsp-32-u24} */
8900 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
8901 & ifmt_extz32_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_HI
, { 0x196b700 }
8903 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
8906 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8907 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a80700 }
8909 /* exts.b ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
8912 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8913 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a82700 }
8915 /* exts.b ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
8918 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
8919 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1a83700 }
8921 /* exts.b ${Dsp-24-u16},$Dst32RnPrefixedHI */
8924 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
8925 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b83700 }
8927 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
8930 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8931 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a08700 }
8933 /* exts.b ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
8936 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8937 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0a700 }
8939 /* exts.b ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
8942 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
8943 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1a0b700 }
8945 /* exts.b ${Dsp-24-u16},$Dst32AnPrefixedHI */
8948 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
8949 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0b700 }
8951 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
8954 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8955 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a00700 }
8957 /* exts.b ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
8960 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8961 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a02700 }
8963 /* exts.b ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
8966 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8967 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1a03700 }
8969 /* exts.b ${Dsp-24-u16},[$Dst32AnPrefixed] */
8972 { { MNEM
, ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
8973 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b03700 }
8975 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
8978 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8979 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a20700 }
8981 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8984 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8985 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a22700 }
8987 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
8990 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8991 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a23700 }
8993 /* exts.b ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
8996 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
8997 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b23700 }
8999 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
9002 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9003 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a40700 }
9005 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
9008 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9009 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a42700 }
9011 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
9014 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9015 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a43700 }
9017 /* exts.b ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
9020 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9021 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b43700 }
9023 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
9026 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9027 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a60700 }
9029 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
9032 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9033 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a62700 }
9035 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
9038 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9039 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a63700 }
9041 /* exts.b ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
9044 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9045 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b63700 }
9047 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
9050 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9051 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a28700 }
9053 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
9056 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9057 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2a700 }
9059 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
9062 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9063 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a2b700 }
9065 /* exts.b ${Dsp-24-u16},${Dsp-40-u8}[sb] */
9068 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
9069 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b2b700 }
9071 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
9074 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9075 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a48700 }
9077 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
9080 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9081 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4a700 }
9083 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
9086 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9087 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a4b700 }
9089 /* exts.b ${Dsp-24-u16},${Dsp-40-u16}[sb] */
9092 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
9093 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b4b700 }
9095 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
9098 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9099 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2c700 }
9101 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
9104 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9105 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2e700 }
9107 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
9110 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9111 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a2f700 }
9113 /* exts.b ${Dsp-24-u16},${Dsp-40-s8}[fb] */
9116 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
9117 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b2f700 }
9119 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
9122 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9123 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4c700 }
9125 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
9128 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9129 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4e700 }
9131 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
9134 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9135 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a4f700 }
9137 /* exts.b ${Dsp-24-u16},${Dsp-40-s16}[fb] */
9140 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
9141 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b4f700 }
9143 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
9146 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
9147 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6c700 }
9149 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u16} */
9152 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
9153 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6e700 }
9155 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u16} */
9158 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
9159 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a6f700 }
9161 /* exts.b ${Dsp-24-u16},${Dsp-40-u16} */
9164 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
9165 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b6f700 }
9167 /* exts.b ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
9170 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
9171 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a68700 }
9173 /* exts.b ${Dsp-24-u16}[sb],${Dsp-40-u24} */
9176 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
9177 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6a700 }
9179 /* exts.b ${Dsp-24-s16}[fb],${Dsp-40-u24} */
9182 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
9183 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a6b700 }
9185 /* exts.b ${Dsp-24-u16},${Dsp-40-u24} */
9188 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
9189 & ifmt_extz32_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b6b700 }
9191 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
9194 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
9195 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b80700 }
9197 /* exts.b ${Dsp-24-u24},$Dst32RnPrefixedHI */
9200 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
9201 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1b82700 }
9203 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
9206 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
9207 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b08700 }
9209 /* exts.b ${Dsp-24-u24},$Dst32AnPrefixedHI */
9212 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
9213 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1b0a700 }
9215 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
9218 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9219 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b00700 }
9221 /* exts.b ${Dsp-24-u24},[$Dst32AnPrefixed] */
9224 { { MNEM
, ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9225 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1b02700 }
9227 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
9230 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9231 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b20700 }
9233 /* exts.b ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
9236 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9237 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b22700 }
9239 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
9242 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9243 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b40700 }
9245 /* exts.b ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
9248 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9249 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b42700 }
9251 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
9254 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9255 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b60700 }
9257 /* exts.b ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
9260 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9261 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b62700 }
9263 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
9266 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
9267 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b28700 }
9269 /* exts.b ${Dsp-24-u24},${Dsp-48-u8}[sb] */
9272 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
9273 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b2a700 }
9275 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
9278 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
9279 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b48700 }
9281 /* exts.b ${Dsp-24-u24},${Dsp-48-u16}[sb] */
9284 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
9285 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b4a700 }
9287 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
9290 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
9291 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2c700 }
9293 /* exts.b ${Dsp-24-u24},${Dsp-48-s8}[fb] */
9296 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
9297 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b2e700 }
9299 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
9302 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
9303 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4c700 }
9305 /* exts.b ${Dsp-24-u24},${Dsp-48-s16}[fb] */
9308 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
9309 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b4e700 }
9311 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
9314 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
9315 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6c700 }
9317 /* exts.b ${Dsp-24-u24},${Dsp-48-u16} */
9320 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
9321 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b6e700 }
9323 /* exts.b ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
9326 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
9327 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b68700 }
9329 /* exts.b ${Dsp-24-u24},${Dsp-48-u24} */
9332 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
9333 & ifmt_extz32_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b6a700 }
9335 /* exts.b $Src32RnPrefixedQI,$Dst32RnPrefixedHI */
9338 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
9339 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x1c807 }
9341 /* exts.b [$Src32AnPrefixed],$Dst32RnPrefixedHI */
9344 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
9345 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_HI
, { 0x18807 }
9347 /* exts.b $Src32RnPrefixedQI,$Dst32AnPrefixedHI */
9350 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
9351 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x1c087 }
9353 /* exts.b [$Src32AnPrefixed],$Dst32AnPrefixedHI */
9356 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
9357 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_HI
, { 0x18087 }
9359 /* exts.b $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
9362 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9363 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x1c007 }
9365 /* exts.b [$Src32AnPrefixed],[$Dst32AnPrefixed] */
9368 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
9369 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_HI
, { 0x18007 }
9371 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
9374 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9375 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c20700 }
9377 /* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
9380 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9381 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1820700 }
9383 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
9386 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9387 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c40700 }
9389 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
9392 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9393 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1840700 }
9395 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
9398 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9399 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c60700 }
9401 /* exts.b [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
9404 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
9405 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1860700 }
9407 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
9410 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9411 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c28700 }
9413 /* exts.b [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
9416 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9417 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1828700 }
9419 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
9422 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9423 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c48700 }
9425 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
9428 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9429 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1848700 }
9431 /* exts.b $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
9434 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9435 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c2c700 }
9437 /* exts.b [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
9440 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9441 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x182c700 }
9443 /* exts.b $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
9446 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9447 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c4c700 }
9449 /* exts.b [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
9452 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9453 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x184c700 }
9455 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u16} */
9458 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
9459 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c6c700 }
9461 /* exts.b [$Src32AnPrefixed],${Dsp-24-u16} */
9464 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
9465 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_HI
, { 0x186c700 }
9467 /* exts.b $Src32RnPrefixedQI,${Dsp-24-u24} */
9470 { { MNEM
, ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
9471 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c68700 }
9473 /* exts.b [$Src32AnPrefixed],${Dsp-24-u24} */
9476 { { MNEM
, ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
9477 & ifmt_extz32_basic_ExtPrefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_HI
, { 0x1868700 }
9479 /* exts.w $Dst32RnExtUnprefixedHI */
9482 { { MNEM
, ' ', OP (DST32RNEXTUNPREFIXEDHI
), 0 } },
9483 & ifmt_exts32_w_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_HI
, { 0xc99e }
9485 /* exts.w $Dst32AnUnprefixedSI */
9488 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
9489 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc19e }
9491 /* exts.w [$Dst32AnExtUnprefixed] */
9494 { { MNEM
, ' ', '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9495 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_HI
, { 0xc11e }
9497 /* exts.w ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
9500 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9501 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_HI
, { 0xc31e00 }
9503 /* exts.w ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
9506 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9507 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_HI
, { 0xc51e0000 }
9509 /* exts.w ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
9512 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9513 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_HI
, { 0xc71e0000 }
9515 /* exts.w ${Dsp-16-u8}[sb] */
9518 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9519 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_HI
, { 0xc39e00 }
9521 /* exts.w ${Dsp-16-u16}[sb] */
9524 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9525 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_HI
, { 0xc59e0000 }
9527 /* exts.w ${Dsp-16-s8}[fb] */
9530 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9531 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_HI
, { 0xc3de00 }
9533 /* exts.w ${Dsp-16-s16}[fb] */
9536 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
9537 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_HI
, { 0xc5de0000 }
9539 /* exts.w ${Dsp-16-u16} */
9542 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9543 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_HI
, { 0xc7de0000 }
9545 /* exts.w ${Dsp-16-u24} */
9548 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
9549 & ifmt_exts32_w_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_HI
, { 0xc79e0000 }
9551 /* exts.b $Dst32RnExtUnprefixedQI */
9554 { { MNEM
, ' ', OP (DST32RNEXTUNPREFIXEDQI
), 0 } },
9555 & ifmt_exts32_b_16_ExtUnprefixed_dst32_Rn_direct_ExtUnprefixed_QI
, { 0xc89e }
9557 /* exts.b $Dst32AnUnprefixedHI */
9560 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
9561 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc09e }
9563 /* exts.b [$Dst32AnExtUnprefixed] */
9566 { { MNEM
, ' ', '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9567 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_indirect_ExtUnprefixed_QI
, { 0xc01e }
9569 /* exts.b ${Dsp-16-u8}[$Dst32AnExtUnprefixed] */
9572 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9573 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_An_relative_ExtUnprefixed_QI
, { 0xc21e00 }
9575 /* exts.b ${Dsp-16-u16}[$Dst32AnExtUnprefixed] */
9578 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9579 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_An_relative_ExtUnprefixed_QI
, { 0xc41e0000 }
9581 /* exts.b ${Dsp-16-u24}[$Dst32AnExtUnprefixed] */
9584 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANEXTUNPREFIXED
), ']', 0 } },
9585 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_An_relative_ExtUnprefixed_QI
, { 0xc61e0000 }
9587 /* exts.b ${Dsp-16-u8}[sb] */
9590 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9591 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_SB_relative_ExtUnprefixed_QI
, { 0xc29e00 }
9593 /* exts.b ${Dsp-16-u16}[sb] */
9596 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9597 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_SB_relative_ExtUnprefixed_QI
, { 0xc49e0000 }
9599 /* exts.b ${Dsp-16-s8}[fb] */
9602 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9603 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_8_FB_relative_ExtUnprefixed_QI
, { 0xc2de00 }
9605 /* exts.b ${Dsp-16-s16}[fb] */
9608 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
9609 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_FB_relative_ExtUnprefixed_QI
, { 0xc4de0000 }
9611 /* exts.b ${Dsp-16-u16} */
9614 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9615 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_16_absolute_ExtUnprefixed_QI
, { 0xc6de0000 }
9617 /* exts.b ${Dsp-16-u24} */
9620 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
9621 & ifmt_exts32_b_16_ExtUnprefixed_dst32_16_24_absolute_ExtUnprefixed_QI
, { 0xc69e0000 }
9623 /* exts.b $Dst16RnExtQI */
9626 { { MNEM
, ' ', OP (DST16RNEXTQI
), 0 } },
9627 & ifmt_exts16_b_16_Ext_dst16_Rn_direct_Ext_QI
, { 0x7c60 }
9629 /* exts.b [$Dst16An] */
9632 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
9633 & ifmt_exts16_b_16_Ext_dst16_An_indirect_Ext_QI
, { 0x7c66 }
9635 /* exts.b ${Dsp-16-u8}[$Dst16An] */
9638 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
9639 & ifmt_exts16_b_16_Ext_dst16_16_8_An_relative_Ext_QI
, { 0x7c6800 }
9641 /* exts.b ${Dsp-16-u16}[$Dst16An] */
9644 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
9645 & ifmt_exts16_b_16_Ext_dst16_16_16_An_relative_Ext_QI
, { 0x7c6c0000 }
9647 /* exts.b ${Dsp-16-u8}[sb] */
9650 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
9651 & ifmt_exts16_b_16_Ext_dst16_16_8_SB_relative_Ext_QI
, { 0x7c6a00 }
9653 /* exts.b ${Dsp-16-u16}[sb] */
9656 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
9657 & ifmt_exts16_b_16_Ext_dst16_16_16_SB_relative_Ext_QI
, { 0x7c6e0000 }
9659 /* exts.b ${Dsp-16-s8}[fb] */
9662 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
9663 & ifmt_exts16_b_16_Ext_dst16_16_8_FB_relative_Ext_QI
, { 0x7c6b00 }
9665 /* exts.b ${Dsp-16-u16} */
9668 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
9669 & ifmt_exts16_b_16_Ext_dst16_16_16_absolute_Ext_QI
, { 0x7c6f0000 }
9671 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
9674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9675 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990900 }
9677 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
9680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9681 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992900 }
9683 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
9686 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9687 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993900 }
9689 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
9692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9693 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918900 }
9695 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
9698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9699 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a900 }
9701 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
9704 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9705 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b900 }
9707 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
9710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9711 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910900 }
9713 /* xor.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
9716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9717 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912900 }
9719 /* xor.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
9722 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9723 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913900 }
9725 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9729 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93090000 }
9731 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9734 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9735 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93290000 }
9737 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
9740 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9741 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93390000 }
9743 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9747 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95090000 }
9749 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9753 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95290000 }
9755 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
9758 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9759 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95390000 }
9761 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9765 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97090000 }
9767 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9771 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97290000 }
9773 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
9776 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9777 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97390000 }
9779 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
9782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9783 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93890000 }
9785 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
9788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9789 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a90000 }
9791 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
9794 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
9795 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b90000 }
9797 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
9800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9801 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95890000 }
9803 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
9806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9807 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a90000 }
9809 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
9812 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
9813 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b90000 }
9815 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
9818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9819 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c90000 }
9821 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
9824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9825 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e90000 }
9827 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
9830 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
9831 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f90000 }
9833 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
9836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9837 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c90000 }
9839 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
9842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9843 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e90000 }
9845 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
9848 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
9849 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f90000 }
9851 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
9854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
9855 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c90000 }
9857 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
9860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
9861 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e90000 }
9863 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
9866 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
9867 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f90000 }
9869 /* xor.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
9872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
9873 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97890000 }
9875 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
9878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
9879 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a90000 }
9881 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
9884 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
9885 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b90000 }
9887 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
9890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9891 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9090000 }
9893 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
9896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9897 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9290000 }
9899 /* xor.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
9902 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9903 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9390000 }
9905 /* xor.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
9908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
9909 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9390000 }
9911 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
9914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9915 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1890000 }
9917 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
9920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9921 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a90000 }
9923 /* xor.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
9926 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9927 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b90000 }
9929 /* xor.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
9932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
9933 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b90000 }
9935 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
9938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9939 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1090000 }
9941 /* xor.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
9944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9945 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1290000 }
9947 /* xor.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
9950 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9951 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1390000 }
9953 /* xor.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
9956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9957 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1390000 }
9959 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9963 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3090000 }
9965 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9969 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3290000 }
9971 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
9974 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9975 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3390000 }
9977 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
9980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9981 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3390000 }
9983 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9987 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5090000 }
9989 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9993 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5290000 }
9995 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
9998 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
9999 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5390000 }
10001 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
10004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10005 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5390000 }
10007 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10011 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7090000 }
10013 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10017 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7290000 }
10019 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10022 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10023 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7390000 }
10025 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
10028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10029 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7390000 }
10031 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
10034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10035 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3890000 }
10037 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
10040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10041 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a90000 }
10043 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
10046 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10047 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b90000 }
10049 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
10052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10053 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b90000 }
10055 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
10058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10059 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5890000 }
10061 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
10064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10065 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a90000 }
10067 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
10070 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10071 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b90000 }
10073 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
10076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10077 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b90000 }
10079 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
10082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10083 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c90000 }
10085 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
10088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10089 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e90000 }
10091 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
10094 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10095 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f90000 }
10097 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
10100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10101 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f90000 }
10103 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
10106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10107 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c90000 }
10109 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
10112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10113 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e90000 }
10115 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
10118 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10119 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f90000 }
10121 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
10124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10125 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f90000 }
10127 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
10130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
10131 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c90000 }
10133 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
10136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10137 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e90000 }
10139 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
10142 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
10143 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f90000 }
10145 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
10148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
10149 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f90000 }
10151 /* xor.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
10154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
10155 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7890000 }
10157 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
10160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
10161 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a90000 }
10163 /* xor.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
10166 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
10167 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b90000 }
10169 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
10172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
10173 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b90000 }
10175 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
10178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10179 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9090000 }
10181 /* xor.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
10184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10185 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9290000 }
10187 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
10190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10191 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1890000 }
10193 /* xor.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
10196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10197 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a90000 }
10199 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10203 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1090000 }
10205 /* xor.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
10208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10209 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1290000 }
10211 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
10214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10215 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3090000 }
10217 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
10220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10221 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3290000 }
10223 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
10226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10227 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5090000 }
10229 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
10232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10233 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5290000 }
10235 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
10238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10239 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7090000 }
10241 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
10244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10245 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7290000 }
10247 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
10250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
10251 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3890000 }
10253 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
10256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
10257 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a90000 }
10259 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
10262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
10263 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5890000 }
10265 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
10268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
10269 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a90000 }
10271 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
10274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
10275 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c90000 }
10277 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
10280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
10281 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e90000 }
10283 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
10286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
10287 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c90000 }
10289 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
10292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
10293 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e90000 }
10295 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
10298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
10299 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c90000 }
10301 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
10304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
10305 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e90000 }
10307 /* xor.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
10310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
10311 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7890000 }
10313 /* xor.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
10316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
10317 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a90000 }
10319 /* xor.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
10322 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10323 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc909 }
10325 /* xor.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
10328 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10329 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8929 }
10331 /* xor.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
10334 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
10335 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8909 }
10337 /* xor.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
10340 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10341 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc189 }
10343 /* xor.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
10346 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10347 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a9 }
10349 /* xor.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
10352 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
10353 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8189 }
10355 /* xor.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
10358 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10359 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc109 }
10361 /* xor.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
10364 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10365 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8129 }
10367 /* xor.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10370 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10371 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8109 }
10373 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
10376 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10377 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30900 }
10379 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
10382 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10383 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832900 }
10385 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
10388 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10389 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830900 }
10391 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
10394 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10395 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5090000 }
10397 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
10400 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10401 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85290000 }
10403 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
10406 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10407 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85090000 }
10409 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
10412 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10413 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7090000 }
10415 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
10418 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10419 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87290000 }
10421 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
10424 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10425 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87090000 }
10427 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
10430 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10431 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38900 }
10433 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
10436 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10437 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a900 }
10439 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
10442 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
10443 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838900 }
10445 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
10448 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10449 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5890000 }
10451 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
10454 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10455 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a90000 }
10457 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
10460 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
10461 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85890000 }
10463 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
10466 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10467 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c900 }
10469 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
10472 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10473 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e900 }
10475 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
10478 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
10479 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c900 }
10481 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
10484 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10485 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c90000 }
10487 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
10490 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10491 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e90000 }
10493 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
10496 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
10497 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c90000 }
10499 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
10502 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
10503 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c90000 }
10505 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
10508 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
10509 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e90000 }
10511 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
10514 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
10515 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c90000 }
10517 /* xor.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
10520 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
10521 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7890000 }
10523 /* xor.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
10526 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
10527 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a90000 }
10529 /* xor.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
10532 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
10533 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87890000 }
10535 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
10538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10539 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980900 }
10541 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
10544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10545 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982900 }
10547 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
10550 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10551 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983900 }
10553 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
10556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10557 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908900 }
10559 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
10562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10563 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a900 }
10565 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
10568 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10569 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b900 }
10571 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10575 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900900 }
10577 /* xor.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
10580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10581 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902900 }
10583 /* xor.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
10586 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10587 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903900 }
10589 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10593 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92090000 }
10595 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10599 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92290000 }
10601 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
10604 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10605 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92390000 }
10607 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10611 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94090000 }
10613 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10617 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94290000 }
10619 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
10622 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10623 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94390000 }
10625 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10629 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96090000 }
10631 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10635 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96290000 }
10637 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
10640 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10641 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96390000 }
10643 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
10646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10647 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92890000 }
10649 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
10652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10653 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a90000 }
10655 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
10658 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
10659 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b90000 }
10661 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
10664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10665 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94890000 }
10667 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
10670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10671 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a90000 }
10673 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
10676 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
10677 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b90000 }
10679 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
10682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10683 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c90000 }
10685 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
10688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10689 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e90000 }
10691 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
10694 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
10695 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f90000 }
10697 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
10700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10701 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c90000 }
10703 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
10706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10707 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e90000 }
10709 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
10712 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
10713 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f90000 }
10715 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
10718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
10719 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c90000 }
10721 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
10724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
10725 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e90000 }
10727 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
10730 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
10731 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f90000 }
10733 /* xor.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
10736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
10737 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96890000 }
10739 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
10742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
10743 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a90000 }
10745 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
10748 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
10749 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b90000 }
10751 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
10754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10755 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8090000 }
10757 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
10760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10761 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8290000 }
10763 /* xor.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
10766 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10767 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8390000 }
10769 /* xor.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
10772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
10773 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8390000 }
10775 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
10778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10779 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0890000 }
10781 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
10784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10785 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a90000 }
10787 /* xor.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
10790 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10791 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b90000 }
10793 /* xor.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
10796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
10797 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b90000 }
10799 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
10802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10803 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0090000 }
10805 /* xor.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
10808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10809 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0290000 }
10811 /* xor.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
10814 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10815 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0390000 }
10817 /* xor.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
10820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10821 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0390000 }
10823 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10827 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2090000 }
10829 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10833 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2290000 }
10835 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
10838 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10839 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2390000 }
10841 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
10844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10845 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2390000 }
10847 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10851 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4090000 }
10853 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10857 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4290000 }
10859 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
10862 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10863 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4390000 }
10865 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
10868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10869 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4390000 }
10871 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10875 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6090000 }
10877 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10881 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6290000 }
10883 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
10886 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10887 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6390000 }
10889 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
10892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
10893 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6390000 }
10895 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
10898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10899 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2890000 }
10901 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
10904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10905 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a90000 }
10907 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
10910 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10911 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b90000 }
10913 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
10916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
10917 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b90000 }
10919 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
10922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10923 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4890000 }
10925 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
10928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10929 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a90000 }
10931 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
10934 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10935 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b90000 }
10937 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
10940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
10941 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b90000 }
10943 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
10946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10947 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c90000 }
10949 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
10952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10953 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e90000 }
10955 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
10958 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10959 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f90000 }
10961 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
10964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
10965 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f90000 }
10967 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
10970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10971 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c90000 }
10973 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
10976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10977 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e90000 }
10979 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
10982 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10983 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f90000 }
10985 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
10988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
10989 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f90000 }
10991 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
10994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
10995 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c90000 }
10997 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
11000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
11001 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e90000 }
11003 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
11006 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
11007 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f90000 }
11009 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
11012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
11013 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f90000 }
11015 /* xor.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
11018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
11019 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6890000 }
11021 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
11024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
11025 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a90000 }
11027 /* xor.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
11030 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
11031 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b90000 }
11033 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
11036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
11037 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b90000 }
11039 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
11042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11043 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8090000 }
11045 /* xor.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
11048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11049 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8290000 }
11051 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
11054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11055 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0890000 }
11057 /* xor.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
11060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11061 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a90000 }
11063 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
11066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11067 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0090000 }
11069 /* xor.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
11072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11073 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0290000 }
11075 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
11078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11079 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2090000 }
11081 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
11084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11085 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2290000 }
11087 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
11090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11091 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4090000 }
11093 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
11096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11097 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4290000 }
11099 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
11102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11103 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6090000 }
11105 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
11108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11109 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6290000 }
11111 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
11114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
11115 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2890000 }
11117 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
11120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
11121 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a90000 }
11123 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
11126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
11127 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4890000 }
11129 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
11132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
11133 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a90000 }
11135 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
11138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
11139 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c90000 }
11141 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
11144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
11145 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e90000 }
11147 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
11150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
11151 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c90000 }
11153 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
11156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
11157 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e90000 }
11159 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
11162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
11163 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c90000 }
11165 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
11168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
11169 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e90000 }
11171 /* xor.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
11174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
11175 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6890000 }
11177 /* xor.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
11180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
11181 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a90000 }
11183 /* xor.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
11186 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11187 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc809 }
11189 /* xor.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
11192 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11193 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8829 }
11195 /* xor.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
11198 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
11199 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8809 }
11201 /* xor.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
11204 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11205 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc089 }
11207 /* xor.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
11210 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11211 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a9 }
11213 /* xor.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
11216 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
11217 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8089 }
11219 /* xor.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
11222 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11223 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc009 }
11225 /* xor.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
11228 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11229 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8029 }
11231 /* xor.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
11234 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11235 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8009 }
11237 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
11240 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11241 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20900 }
11243 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
11246 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11247 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822900 }
11249 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
11252 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11253 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820900 }
11255 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
11258 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11259 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4090000 }
11261 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
11264 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11265 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84290000 }
11267 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
11270 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11271 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84090000 }
11273 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
11276 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11277 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6090000 }
11279 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
11282 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11283 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86290000 }
11285 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
11288 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
11289 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86090000 }
11291 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
11294 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11295 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28900 }
11297 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
11300 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11301 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a900 }
11303 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
11306 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11307 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828900 }
11309 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
11312 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11313 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4890000 }
11315 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
11318 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11319 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a90000 }
11321 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
11324 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11325 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84890000 }
11327 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
11330 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11331 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c900 }
11333 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
11336 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11337 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e900 }
11339 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
11342 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11343 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c900 }
11345 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
11348 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11349 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c90000 }
11351 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
11354 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11355 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e90000 }
11357 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
11360 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
11361 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c90000 }
11363 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
11366 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
11367 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c90000 }
11369 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
11372 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
11373 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e90000 }
11375 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
11378 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
11379 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c90000 }
11381 /* xor.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
11384 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
11385 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6890000 }
11387 /* xor.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
11390 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
11391 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a90000 }
11393 /* xor.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
11396 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
11397 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86890000 }
11399 /* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
11402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11403 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x898000 }
11405 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
11408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11409 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x89a000 }
11411 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
11414 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11415 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x89b000 }
11417 /* xor.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
11420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11421 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x898400 }
11423 /* xor.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
11426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11427 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x89a400 }
11429 /* xor.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
11432 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11433 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x89b400 }
11435 /* xor.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
11438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11439 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x898600 }
11441 /* xor.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
11444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11445 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x89a600 }
11447 /* xor.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
11450 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11451 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x89b600 }
11453 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
11456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11457 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x89880000 }
11459 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
11462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11463 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x89a80000 }
11465 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
11468 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11469 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x89b80000 }
11471 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
11474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11475 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x898c0000 }
11477 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
11480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11481 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x89ac0000 }
11483 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
11486 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11487 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x89bc0000 }
11489 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
11492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11493 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x898a0000 }
11495 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
11498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11499 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x89aa0000 }
11501 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
11504 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11505 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x89ba0000 }
11507 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
11510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11511 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x898e0000 }
11513 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
11516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11517 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x89ae0000 }
11519 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
11522 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11523 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x89be0000 }
11525 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
11528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11529 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x898b0000 }
11531 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
11534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11535 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x89ab0000 }
11537 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
11540 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
11541 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x89bb0000 }
11543 /* xor.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
11546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
11547 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x898f0000 }
11549 /* xor.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
11552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
11553 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x89af0000 }
11555 /* xor.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
11558 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
11559 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x89bf0000 }
11561 /* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
11564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11565 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x89c00000 }
11567 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
11570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
11571 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x89e00000 }
11573 /* xor.w${G} ${Dsp-16-u16},$Dst16RnHI */
11576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
11577 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x89f00000 }
11579 /* xor.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
11582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11583 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x89c40000 }
11585 /* xor.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
11588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
11589 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x89e40000 }
11591 /* xor.w${G} ${Dsp-16-u16},$Dst16AnHI */
11594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
11595 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x89f40000 }
11597 /* xor.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
11600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11601 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x89c60000 }
11603 /* xor.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
11606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11607 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x89e60000 }
11609 /* xor.w${G} ${Dsp-16-u16},[$Dst16An] */
11612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
11613 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x89f60000 }
11615 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
11618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11619 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x89c80000 }
11621 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
11624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11625 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x89e80000 }
11627 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
11630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
11631 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x89f80000 }
11633 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
11636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11637 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x89cc0000 }
11639 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
11642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11643 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x89ec0000 }
11645 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
11648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
11649 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x89fc0000 }
11651 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
11654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11655 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x89ca0000 }
11657 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
11660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11661 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x89ea0000 }
11663 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
11666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
11667 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x89fa0000 }
11669 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
11672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11673 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x89ce0000 }
11675 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
11678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11679 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x89ee0000 }
11681 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
11684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
11685 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x89fe0000 }
11687 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
11690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11691 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x89cb0000 }
11693 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
11696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11697 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x89eb0000 }
11699 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
11702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
11703 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x89fb0000 }
11705 /* xor.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
11708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
11709 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x89cf0000 }
11711 /* xor.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
11714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
11715 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x89ef0000 }
11717 /* xor.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
11720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
11721 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x89ff0000 }
11723 /* xor.w${G} $Src16RnHI,$Dst16RnHI */
11726 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
11727 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x8900 }
11729 /* xor.w${G} $Src16AnHI,$Dst16RnHI */
11732 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
11733 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x8940 }
11735 /* xor.w${G} [$Src16An],$Dst16RnHI */
11738 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
11739 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x8960 }
11741 /* xor.w${G} $Src16RnHI,$Dst16AnHI */
11744 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
11745 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x8904 }
11747 /* xor.w${G} $Src16AnHI,$Dst16AnHI */
11750 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
11751 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x8944 }
11753 /* xor.w${G} [$Src16An],$Dst16AnHI */
11756 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
11757 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x8964 }
11759 /* xor.w${G} $Src16RnHI,[$Dst16An] */
11762 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
11763 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x8906 }
11765 /* xor.w${G} $Src16AnHI,[$Dst16An] */
11768 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
11769 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x8946 }
11771 /* xor.w${G} [$Src16An],[$Dst16An] */
11774 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11775 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x8966 }
11777 /* xor.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
11780 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11781 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x890800 }
11783 /* xor.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
11786 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11787 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x894800 }
11789 /* xor.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
11792 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
11793 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x896800 }
11795 /* xor.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
11798 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11799 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x890c0000 }
11801 /* xor.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
11804 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11805 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x894c0000 }
11807 /* xor.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
11810 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
11811 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x896c0000 }
11813 /* xor.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
11816 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11817 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x890a00 }
11819 /* xor.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
11822 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11823 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x894a00 }
11825 /* xor.w${G} [$Src16An],${Dsp-16-u8}[sb] */
11828 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
11829 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x896a00 }
11831 /* xor.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
11834 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11835 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x890e0000 }
11837 /* xor.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
11840 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11841 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x894e0000 }
11843 /* xor.w${G} [$Src16An],${Dsp-16-u16}[sb] */
11846 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
11847 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x896e0000 }
11849 /* xor.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
11852 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11853 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x890b00 }
11855 /* xor.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
11858 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11859 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x894b00 }
11861 /* xor.w${G} [$Src16An],${Dsp-16-s8}[fb] */
11864 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
11865 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x896b00 }
11867 /* xor.w${G} $Src16RnHI,${Dsp-16-u16} */
11870 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
11871 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x890f0000 }
11873 /* xor.w${G} $Src16AnHI,${Dsp-16-u16} */
11876 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
11877 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x894f0000 }
11879 /* xor.w${G} [$Src16An],${Dsp-16-u16} */
11882 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
11883 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x896f0000 }
11885 /* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
11888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
11889 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x888000 }
11891 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
11894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
11895 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x88a000 }
11897 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
11900 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
11901 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x88b000 }
11903 /* xor.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
11906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
11907 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x888400 }
11909 /* xor.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
11912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
11913 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x88a400 }
11915 /* xor.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
11918 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
11919 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x88b400 }
11921 /* xor.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
11924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
11925 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x888600 }
11927 /* xor.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
11930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11931 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x88a600 }
11933 /* xor.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
11936 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
11937 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x88b600 }
11939 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
11942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11943 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x88880000 }
11945 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
11948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11949 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x88a80000 }
11951 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
11954 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
11955 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x88b80000 }
11957 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
11960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11961 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x888c0000 }
11963 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
11966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11967 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x88ac0000 }
11969 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
11972 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
11973 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x88bc0000 }
11975 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
11978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11979 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x888a0000 }
11981 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
11984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11985 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x88aa0000 }
11987 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
11990 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
11991 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x88ba0000 }
11993 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
11996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
11997 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x888e0000 }
11999 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
12002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
12003 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x88ae0000 }
12005 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
12008 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
12009 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x88be0000 }
12011 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
12014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12015 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x888b0000 }
12017 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
12020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12021 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x88ab0000 }
12023 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
12026 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
12027 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x88bb0000 }
12029 /* xor.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
12032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
12033 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x888f0000 }
12035 /* xor.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
12038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
12039 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x88af0000 }
12041 /* xor.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
12044 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
12045 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x88bf0000 }
12047 /* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
12050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
12051 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x88c00000 }
12053 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
12056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
12057 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x88e00000 }
12059 /* xor.b${G} ${Dsp-16-u16},$Dst16RnQI */
12062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
12063 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x88f00000 }
12065 /* xor.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
12068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
12069 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x88c40000 }
12071 /* xor.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
12074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
12075 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x88e40000 }
12077 /* xor.b${G} ${Dsp-16-u16},$Dst16AnQI */
12080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
12081 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x88f40000 }
12083 /* xor.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
12086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
12087 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x88c60000 }
12089 /* xor.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
12092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
12093 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x88e60000 }
12095 /* xor.b${G} ${Dsp-16-u16},[$Dst16An] */
12098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
12099 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x88f60000 }
12101 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
12104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12105 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x88c80000 }
12107 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
12110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12111 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x88e80000 }
12113 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
12116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
12117 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x88f80000 }
12119 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
12122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12123 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x88cc0000 }
12125 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
12128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12129 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x88ec0000 }
12131 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
12134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
12135 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x88fc0000 }
12137 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
12140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12141 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x88ca0000 }
12143 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
12146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12147 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x88ea0000 }
12149 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
12152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
12153 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x88fa0000 }
12155 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
12158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12159 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x88ce0000 }
12161 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
12164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12165 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x88ee0000 }
12167 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
12170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
12171 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x88fe0000 }
12173 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
12176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12177 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x88cb0000 }
12179 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
12182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12183 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x88eb0000 }
12185 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
12188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
12189 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x88fb0000 }
12191 /* xor.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
12194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
12195 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x88cf0000 }
12197 /* xor.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
12200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
12201 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x88ef0000 }
12203 /* xor.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
12206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
12207 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x88ff0000 }
12209 /* xor.b${G} $Src16RnQI,$Dst16RnQI */
12212 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
12213 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x8800 }
12215 /* xor.b${G} $Src16AnQI,$Dst16RnQI */
12218 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
12219 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x8840 }
12221 /* xor.b${G} [$Src16An],$Dst16RnQI */
12224 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
12225 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x8860 }
12227 /* xor.b${G} $Src16RnQI,$Dst16AnQI */
12230 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
12231 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x8804 }
12233 /* xor.b${G} $Src16AnQI,$Dst16AnQI */
12236 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
12237 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x8844 }
12239 /* xor.b${G} [$Src16An],$Dst16AnQI */
12242 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
12243 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x8864 }
12245 /* xor.b${G} $Src16RnQI,[$Dst16An] */
12248 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
12249 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x8806 }
12251 /* xor.b${G} $Src16AnQI,[$Dst16An] */
12254 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
12255 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x8846 }
12257 /* xor.b${G} [$Src16An],[$Dst16An] */
12260 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
12261 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x8866 }
12263 /* xor.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
12266 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12267 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x880800 }
12269 /* xor.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
12272 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12273 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x884800 }
12275 /* xor.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
12278 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12279 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x886800 }
12281 /* xor.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
12284 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12285 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x880c0000 }
12287 /* xor.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
12290 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12291 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x884c0000 }
12293 /* xor.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
12296 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12297 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x886c0000 }
12299 /* xor.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
12302 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12303 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x880a00 }
12305 /* xor.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
12308 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12309 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x884a00 }
12311 /* xor.b${G} [$Src16An],${Dsp-16-u8}[sb] */
12314 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12315 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x886a00 }
12317 /* xor.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
12320 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12321 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x880e0000 }
12323 /* xor.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
12326 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12327 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x884e0000 }
12329 /* xor.b${G} [$Src16An],${Dsp-16-u16}[sb] */
12332 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12333 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x886e0000 }
12335 /* xor.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
12338 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12339 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x880b00 }
12341 /* xor.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
12344 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12345 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x884b00 }
12347 /* xor.b${G} [$Src16An],${Dsp-16-s8}[fb] */
12350 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12351 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x886b00 }
12353 /* xor.b${G} $Src16RnQI,${Dsp-16-u16} */
12356 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
12357 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x880f0000 }
12359 /* xor.b${G} $Src16AnQI,${Dsp-16-u16} */
12362 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
12363 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x884f0000 }
12365 /* xor.b${G} [$Src16An],${Dsp-16-u16} */
12368 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
12369 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x886f0000 }
12371 /* xor.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
12374 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12375 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x990e0000 }
12377 /* xor.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
12380 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12381 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x918e0000 }
12383 /* xor.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
12386 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12387 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x910e0000 }
12389 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
12392 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12393 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x930e0000 }
12395 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
12398 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12399 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x938e0000 }
12401 /* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
12404 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12405 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ce0000 }
12407 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
12410 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12411 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x950e0000 }
12413 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
12416 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12417 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x958e0000 }
12419 /* xor.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
12422 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12423 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ce0000 }
12425 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
12428 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
12429 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ce0000 }
12431 /* xor.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
12434 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12435 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x970e0000 }
12437 /* xor.w${G} #${Imm-40-HI},${Dsp-16-u24} */
12440 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
12441 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x978e0000 }
12443 /* xor.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
12446 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
12447 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x980e00 }
12449 /* xor.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
12452 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
12453 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x908e00 }
12455 /* xor.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
12458 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12459 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x900e00 }
12461 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
12464 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12465 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920e0000 }
12467 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
12470 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12471 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928e0000 }
12473 /* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
12476 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12477 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ce0000 }
12479 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
12482 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12483 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x940e0000 }
12485 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
12488 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12489 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x948e0000 }
12491 /* xor.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
12494 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12495 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ce0000 }
12497 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
12500 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
12501 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ce0000 }
12503 /* xor.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
12506 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12507 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x960e0000 }
12509 /* xor.b${G} #${Imm-40-QI},${Dsp-16-u24} */
12512 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
12513 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x968e0000 }
12515 /* xor.w${G} #${Imm-16-HI},$Dst16RnHI */
12518 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
12519 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77100000 }
12521 /* xor.w${G} #${Imm-16-HI},$Dst16AnHI */
12524 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
12525 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77140000 }
12527 /* xor.w${G} #${Imm-16-HI},[$Dst16An] */
12530 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
12531 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77160000 }
12533 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
12536 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12537 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77180000 }
12539 /* xor.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
12542 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12543 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x771a0000 }
12545 /* xor.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
12548 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12549 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x771b0000 }
12551 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
12554 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12555 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x771c0000 }
12557 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
12560 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12561 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x771e0000 }
12563 /* xor.w${G} #${Imm-32-HI},${Dsp-16-u16} */
12566 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
12567 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x771f0000 }
12569 /* xor.b${G} #${Imm-16-QI},$Dst16RnQI */
12572 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
12573 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x761000 }
12575 /* xor.b${G} #${Imm-16-QI},$Dst16AnQI */
12578 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
12579 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x761400 }
12581 /* xor.b${G} #${Imm-16-QI},[$Dst16An] */
12584 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
12585 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x761600 }
12587 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
12590 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
12591 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76180000 }
12593 /* xor.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
12596 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12597 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x761a0000 }
12599 /* xor.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
12602 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12603 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x761b0000 }
12605 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
12608 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
12609 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x761c0000 }
12611 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
12614 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12615 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x761e0000 }
12617 /* xor.b${G} #${Imm-32-QI},${Dsp-16-u16} */
12620 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
12621 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x761f0000 }
12623 /* xchg.w r3,$Dst32RnUnprefixedHI */
12626 { { MNEM
, ' ', 'r', '3', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12627 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90d }
12629 /* xchg.w r3,$Dst32AnUnprefixedHI */
12632 { { MNEM
, ' ', 'r', '3', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12633 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18d }
12635 /* xchg.w r3,[$Dst32AnUnprefixed] */
12638 { { MNEM
, ' ', 'r', '3', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12639 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10d }
12641 /* xchg.w r3,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12644 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12645 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30d00 }
12647 /* xchg.w r3,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12650 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12651 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50d0000 }
12653 /* xchg.w r3,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12656 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12657 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70d0000 }
12659 /* xchg.w r3,${Dsp-16-u8}[sb] */
12662 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12663 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38d00 }
12665 /* xchg.w r3,${Dsp-16-u16}[sb] */
12668 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12669 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58d0000 }
12671 /* xchg.w r3,${Dsp-16-s8}[fb] */
12674 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12675 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cd00 }
12677 /* xchg.w r3,${Dsp-16-s16}[fb] */
12680 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12681 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cd0000 }
12683 /* xchg.w r3,${Dsp-16-u16} */
12686 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), 0 } },
12687 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cd0000 }
12689 /* xchg.w r3,${Dsp-16-u24} */
12692 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U24
), 0 } },
12693 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78d0000 }
12695 /* xchg.w r2,$Dst32RnUnprefixedHI */
12698 { { MNEM
, ' ', 'r', '2', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12699 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90c }
12701 /* xchg.w r2,$Dst32AnUnprefixedHI */
12704 { { MNEM
, ' ', 'r', '2', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12705 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18c }
12707 /* xchg.w r2,[$Dst32AnUnprefixed] */
12710 { { MNEM
, ' ', 'r', '2', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12711 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10c }
12713 /* xchg.w r2,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12716 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12717 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30c00 }
12719 /* xchg.w r2,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12722 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12723 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50c0000 }
12725 /* xchg.w r2,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12728 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12729 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70c0000 }
12731 /* xchg.w r2,${Dsp-16-u8}[sb] */
12734 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12735 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38c00 }
12737 /* xchg.w r2,${Dsp-16-u16}[sb] */
12740 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12741 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58c0000 }
12743 /* xchg.w r2,${Dsp-16-s8}[fb] */
12746 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12747 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cc00 }
12749 /* xchg.w r2,${Dsp-16-s16}[fb] */
12752 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12753 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cc0000 }
12755 /* xchg.w r2,${Dsp-16-u16} */
12758 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), 0 } },
12759 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cc0000 }
12761 /* xchg.w r2,${Dsp-16-u24} */
12764 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U24
), 0 } },
12765 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78c0000 }
12767 /* xchg.w a1,$Dst32RnUnprefixedHI */
12770 { { MNEM
, ' ', 'a', '1', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12771 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90b }
12773 /* xchg.w a1,$Dst32AnUnprefixedHI */
12776 { { MNEM
, ' ', 'a', '1', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12777 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18b }
12779 /* xchg.w a1,[$Dst32AnUnprefixed] */
12782 { { MNEM
, ' ', 'a', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12783 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10b }
12785 /* xchg.w a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12788 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12789 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30b00 }
12791 /* xchg.w a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12794 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12795 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50b0000 }
12797 /* xchg.w a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12800 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12801 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70b0000 }
12803 /* xchg.w a1,${Dsp-16-u8}[sb] */
12806 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12807 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38b00 }
12809 /* xchg.w a1,${Dsp-16-u16}[sb] */
12812 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12813 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58b0000 }
12815 /* xchg.w a1,${Dsp-16-s8}[fb] */
12818 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12819 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3cb00 }
12821 /* xchg.w a1,${Dsp-16-s16}[fb] */
12824 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12825 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5cb0000 }
12827 /* xchg.w a1,${Dsp-16-u16} */
12830 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), 0 } },
12831 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7cb0000 }
12833 /* xchg.w a1,${Dsp-16-u24} */
12836 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), 0 } },
12837 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78b0000 }
12839 /* xchg.w a0,$Dst32RnUnprefixedHI */
12842 { { MNEM
, ' ', 'a', '0', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12843 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd90a }
12845 /* xchg.w a0,$Dst32AnUnprefixedHI */
12848 { { MNEM
, ' ', 'a', '0', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12849 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd18a }
12851 /* xchg.w a0,[$Dst32AnUnprefixed] */
12854 { { MNEM
, ' ', 'a', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12855 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd10a }
12857 /* xchg.w a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12860 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12861 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30a00 }
12863 /* xchg.w a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12866 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12867 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd50a0000 }
12869 /* xchg.w a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12872 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12873 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd70a0000 }
12875 /* xchg.w a0,${Dsp-16-u8}[sb] */
12878 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12879 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38a00 }
12881 /* xchg.w a0,${Dsp-16-u16}[sb] */
12884 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12885 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd58a0000 }
12887 /* xchg.w a0,${Dsp-16-s8}[fb] */
12890 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12891 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3ca00 }
12893 /* xchg.w a0,${Dsp-16-s16}[fb] */
12896 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12897 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5ca0000 }
12899 /* xchg.w a0,${Dsp-16-u16} */
12902 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), 0 } },
12903 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7ca0000 }
12905 /* xchg.w a0,${Dsp-16-u24} */
12908 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), 0 } },
12909 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd78a0000 }
12911 /* xchg.w r1,$Dst32RnUnprefixedHI */
12914 { { MNEM
, ' ', 'r', '1', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12915 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd909 }
12917 /* xchg.w r1,$Dst32AnUnprefixedHI */
12920 { { MNEM
, ' ', 'r', '1', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12921 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd189 }
12923 /* xchg.w r1,[$Dst32AnUnprefixed] */
12926 { { MNEM
, ' ', 'r', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12927 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd109 }
12929 /* xchg.w r1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
12932 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12933 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30900 }
12935 /* xchg.w r1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
12938 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12939 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5090000 }
12941 /* xchg.w r1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
12944 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12945 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7090000 }
12947 /* xchg.w r1,${Dsp-16-u8}[sb] */
12950 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
12951 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38900 }
12953 /* xchg.w r1,${Dsp-16-u16}[sb] */
12956 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
12957 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5890000 }
12959 /* xchg.w r1,${Dsp-16-s8}[fb] */
12962 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
12963 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3c900 }
12965 /* xchg.w r1,${Dsp-16-s16}[fb] */
12968 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
12969 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5c90000 }
12971 /* xchg.w r1,${Dsp-16-u16} */
12974 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), 0 } },
12975 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7c90000 }
12977 /* xchg.w r1,${Dsp-16-u24} */
12980 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U24
), 0 } },
12981 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7890000 }
12983 /* xchg.w r0,$Dst32RnUnprefixedHI */
12986 { { MNEM
, ' ', 'r', '0', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
12987 & ifmt_xchg32w_r3_dst32_Rn_direct_Unprefixed_HI
, { 0xd908 }
12989 /* xchg.w r0,$Dst32AnUnprefixedHI */
12992 { { MNEM
, ' ', 'r', '0', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
12993 & ifmt_xchg32w_r3_dst32_An_direct_Unprefixed_HI
, { 0xd188 }
12995 /* xchg.w r0,[$Dst32AnUnprefixed] */
12998 { { MNEM
, ' ', 'r', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
12999 & ifmt_xchg32w_r3_dst32_An_indirect_Unprefixed_HI
, { 0xd108 }
13001 /* xchg.w r0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13004 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13005 & ifmt_xchg32w_r3_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd30800 }
13007 /* xchg.w r0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13010 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13011 & ifmt_xchg32w_r3_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5080000 }
13013 /* xchg.w r0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13016 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13017 & ifmt_xchg32w_r3_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7080000 }
13019 /* xchg.w r0,${Dsp-16-u8}[sb] */
13022 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13023 & ifmt_xchg32w_r3_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd38800 }
13025 /* xchg.w r0,${Dsp-16-u16}[sb] */
13028 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13029 & ifmt_xchg32w_r3_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5880000 }
13031 /* xchg.w r0,${Dsp-16-s8}[fb] */
13034 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13035 & ifmt_xchg32w_r3_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3c800 }
13037 /* xchg.w r0,${Dsp-16-s16}[fb] */
13040 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13041 & ifmt_xchg32w_r3_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5c80000 }
13043 /* xchg.w r0,${Dsp-16-u16} */
13046 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), 0 } },
13047 & ifmt_xchg32w_r3_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7c80000 }
13049 /* xchg.w r0,${Dsp-16-u24} */
13052 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U24
), 0 } },
13053 & ifmt_xchg32w_r3_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7880000 }
13055 /* xchg.b r1h,$Dst32RnUnprefixedQI */
13058 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13059 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80d }
13061 /* xchg.b r1h,$Dst32AnUnprefixedQI */
13064 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13065 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08d }
13067 /* xchg.b r1h,[$Dst32AnUnprefixed] */
13070 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13071 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00d }
13073 /* xchg.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13076 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13077 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20d00 }
13079 /* xchg.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13082 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13083 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40d0000 }
13085 /* xchg.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13088 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13089 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60d0000 }
13091 /* xchg.b r1h,${Dsp-16-u8}[sb] */
13094 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13095 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28d00 }
13097 /* xchg.b r1h,${Dsp-16-u16}[sb] */
13100 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13101 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48d0000 }
13103 /* xchg.b r1h,${Dsp-16-s8}[fb] */
13106 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13107 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cd00 }
13109 /* xchg.b r1h,${Dsp-16-s16}[fb] */
13112 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13113 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cd0000 }
13115 /* xchg.b r1h,${Dsp-16-u16} */
13118 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
13119 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cd0000 }
13121 /* xchg.b r1h,${Dsp-16-u24} */
13124 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
13125 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68d0000 }
13127 /* xchg.b r0h,$Dst32RnUnprefixedQI */
13130 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13131 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80c }
13133 /* xchg.b r0h,$Dst32AnUnprefixedQI */
13136 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13137 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08c }
13139 /* xchg.b r0h,[$Dst32AnUnprefixed] */
13142 { { MNEM
, ' ', 'r', '0', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13143 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00c }
13145 /* xchg.b r0h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13148 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13149 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20c00 }
13151 /* xchg.b r0h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13154 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13155 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40c0000 }
13157 /* xchg.b r0h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13160 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13161 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60c0000 }
13163 /* xchg.b r0h,${Dsp-16-u8}[sb] */
13166 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13167 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28c00 }
13169 /* xchg.b r0h,${Dsp-16-u16}[sb] */
13172 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13173 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48c0000 }
13175 /* xchg.b r0h,${Dsp-16-s8}[fb] */
13178 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13179 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cc00 }
13181 /* xchg.b r0h,${Dsp-16-s16}[fb] */
13184 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13185 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cc0000 }
13187 /* xchg.b r0h,${Dsp-16-u16} */
13190 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), 0 } },
13191 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cc0000 }
13193 /* xchg.b r0h,${Dsp-16-u24} */
13196 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U24
), 0 } },
13197 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68c0000 }
13199 /* xchg.b a1,$Dst32RnUnprefixedQI */
13202 { { MNEM
, ' ', 'a', '1', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13203 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80b }
13205 /* xchg.b a1,$Dst32AnUnprefixedQI */
13208 { { MNEM
, ' ', 'a', '1', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13209 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08b }
13211 /* xchg.b a1,[$Dst32AnUnprefixed] */
13214 { { MNEM
, ' ', 'a', '1', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13215 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00b }
13217 /* xchg.b a1,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13220 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13221 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20b00 }
13223 /* xchg.b a1,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13226 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13227 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40b0000 }
13229 /* xchg.b a1,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13232 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13233 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60b0000 }
13235 /* xchg.b a1,${Dsp-16-u8}[sb] */
13238 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13239 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28b00 }
13241 /* xchg.b a1,${Dsp-16-u16}[sb] */
13244 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13245 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48b0000 }
13247 /* xchg.b a1,${Dsp-16-s8}[fb] */
13250 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13251 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2cb00 }
13253 /* xchg.b a1,${Dsp-16-s16}[fb] */
13256 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13257 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4cb0000 }
13259 /* xchg.b a1,${Dsp-16-u16} */
13262 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U16
), 0 } },
13263 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6cb0000 }
13265 /* xchg.b a1,${Dsp-16-u24} */
13268 { { MNEM
, ' ', 'a', '1', ',', OP (DSP_16_U24
), 0 } },
13269 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68b0000 }
13271 /* xchg.b a0,$Dst32RnUnprefixedQI */
13274 { { MNEM
, ' ', 'a', '0', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13275 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd80a }
13277 /* xchg.b a0,$Dst32AnUnprefixedQI */
13280 { { MNEM
, ' ', 'a', '0', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13281 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd08a }
13283 /* xchg.b a0,[$Dst32AnUnprefixed] */
13286 { { MNEM
, ' ', 'a', '0', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13287 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd00a }
13289 /* xchg.b a0,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13292 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13293 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20a00 }
13295 /* xchg.b a0,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13298 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13299 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd40a0000 }
13301 /* xchg.b a0,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13304 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13305 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd60a0000 }
13307 /* xchg.b a0,${Dsp-16-u8}[sb] */
13310 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13311 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28a00 }
13313 /* xchg.b a0,${Dsp-16-u16}[sb] */
13316 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13317 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd48a0000 }
13319 /* xchg.b a0,${Dsp-16-s8}[fb] */
13322 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13323 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2ca00 }
13325 /* xchg.b a0,${Dsp-16-s16}[fb] */
13328 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13329 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4ca0000 }
13331 /* xchg.b a0,${Dsp-16-u16} */
13334 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U16
), 0 } },
13335 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6ca0000 }
13337 /* xchg.b a0,${Dsp-16-u24} */
13340 { { MNEM
, ' ', 'a', '0', ',', OP (DSP_16_U24
), 0 } },
13341 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd68a0000 }
13343 /* xchg.b r1l,$Dst32RnUnprefixedQI */
13346 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13347 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd809 }
13349 /* xchg.b r1l,$Dst32AnUnprefixedQI */
13352 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13353 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd089 }
13355 /* xchg.b r1l,[$Dst32AnUnprefixed] */
13358 { { MNEM
, ' ', 'r', '1', 'l', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13359 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd009 }
13361 /* xchg.b r1l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13364 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13365 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20900 }
13367 /* xchg.b r1l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13370 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13371 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd4090000 }
13373 /* xchg.b r1l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13376 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13377 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd6090000 }
13379 /* xchg.b r1l,${Dsp-16-u8}[sb] */
13382 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13383 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28900 }
13385 /* xchg.b r1l,${Dsp-16-u16}[sb] */
13388 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13389 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd4890000 }
13391 /* xchg.b r1l,${Dsp-16-s8}[fb] */
13394 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13395 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2c900 }
13397 /* xchg.b r1l,${Dsp-16-s16}[fb] */
13400 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13401 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4c90000 }
13403 /* xchg.b r1l,${Dsp-16-u16} */
13406 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), 0 } },
13407 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6c90000 }
13409 /* xchg.b r1l,${Dsp-16-u24} */
13412 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U24
), 0 } },
13413 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd6890000 }
13415 /* xchg.b r0l,$Dst32RnUnprefixedQI */
13418 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
13419 & ifmt_xchg32b_r1h_dst32_Rn_direct_Unprefixed_QI
, { 0xd808 }
13421 /* xchg.b r0l,$Dst32AnUnprefixedQI */
13424 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
13425 & ifmt_xchg32b_r1h_dst32_An_direct_Unprefixed_QI
, { 0xd088 }
13427 /* xchg.b r0l,[$Dst32AnUnprefixed] */
13430 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13431 & ifmt_xchg32b_r1h_dst32_An_indirect_Unprefixed_QI
, { 0xd008 }
13433 /* xchg.b r0l,${Dsp-16-u8}[$Dst32AnUnprefixed] */
13436 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13437 & ifmt_xchg32b_r1h_dst32_16_8_An_relative_Unprefixed_QI
, { 0xd20800 }
13439 /* xchg.b r0l,${Dsp-16-u16}[$Dst32AnUnprefixed] */
13442 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13443 & ifmt_xchg32b_r1h_dst32_16_16_An_relative_Unprefixed_QI
, { 0xd4080000 }
13445 /* xchg.b r0l,${Dsp-16-u24}[$Dst32AnUnprefixed] */
13448 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
13449 & ifmt_xchg32b_r1h_dst32_16_24_An_relative_Unprefixed_QI
, { 0xd6080000 }
13451 /* xchg.b r0l,${Dsp-16-u8}[sb] */
13454 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13455 & ifmt_xchg32b_r1h_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xd28800 }
13457 /* xchg.b r0l,${Dsp-16-u16}[sb] */
13460 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13461 & ifmt_xchg32b_r1h_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xd4880000 }
13463 /* xchg.b r0l,${Dsp-16-s8}[fb] */
13466 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13467 & ifmt_xchg32b_r1h_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xd2c800 }
13469 /* xchg.b r0l,${Dsp-16-s16}[fb] */
13472 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
13473 & ifmt_xchg32b_r1h_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xd4c80000 }
13475 /* xchg.b r0l,${Dsp-16-u16} */
13478 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
13479 & ifmt_xchg32b_r1h_dst32_16_16_absolute_Unprefixed_QI
, { 0xd6c80000 }
13481 /* xchg.b r0l,${Dsp-16-u24} */
13484 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U24
), 0 } },
13485 & ifmt_xchg32b_r1h_dst32_16_24_absolute_Unprefixed_QI
, { 0xd6880000 }
13487 /* xchg.w r3,$Dst16RnHI */
13490 { { MNEM
, ' ', 'r', '3', ',', OP (DST16RNHI
), 0 } },
13491 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b30 }
13493 /* xchg.w r3,$Dst16AnHI */
13496 { { MNEM
, ' ', 'r', '3', ',', OP (DST16ANHI
), 0 } },
13497 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b34 }
13499 /* xchg.w r3,[$Dst16An] */
13502 { { MNEM
, ' ', 'r', '3', ',', '[', OP (DST16AN
), ']', 0 } },
13503 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b36 }
13505 /* xchg.w r3,${Dsp-16-u8}[$Dst16An] */
13508 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13509 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b3800 }
13511 /* xchg.w r3,${Dsp-16-u16}[$Dst16An] */
13514 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13515 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b3c0000 }
13517 /* xchg.w r3,${Dsp-16-u8}[sb] */
13520 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13521 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b3a00 }
13523 /* xchg.w r3,${Dsp-16-u16}[sb] */
13526 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13527 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b3e0000 }
13529 /* xchg.w r3,${Dsp-16-s8}[fb] */
13532 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13533 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b3b00 }
13535 /* xchg.w r3,${Dsp-16-u16} */
13538 { { MNEM
, ' ', 'r', '3', ',', OP (DSP_16_U16
), 0 } },
13539 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b3f0000 }
13541 /* xchg.w r2,$Dst16RnHI */
13544 { { MNEM
, ' ', 'r', '2', ',', OP (DST16RNHI
), 0 } },
13545 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b20 }
13547 /* xchg.w r2,$Dst16AnHI */
13550 { { MNEM
, ' ', 'r', '2', ',', OP (DST16ANHI
), 0 } },
13551 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b24 }
13553 /* xchg.w r2,[$Dst16An] */
13556 { { MNEM
, ' ', 'r', '2', ',', '[', OP (DST16AN
), ']', 0 } },
13557 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b26 }
13559 /* xchg.w r2,${Dsp-16-u8}[$Dst16An] */
13562 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13563 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b2800 }
13565 /* xchg.w r2,${Dsp-16-u16}[$Dst16An] */
13568 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13569 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b2c0000 }
13571 /* xchg.w r2,${Dsp-16-u8}[sb] */
13574 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13575 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b2a00 }
13577 /* xchg.w r2,${Dsp-16-u16}[sb] */
13580 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13581 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b2e0000 }
13583 /* xchg.w r2,${Dsp-16-s8}[fb] */
13586 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13587 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b2b00 }
13589 /* xchg.w r2,${Dsp-16-u16} */
13592 { { MNEM
, ' ', 'r', '2', ',', OP (DSP_16_U16
), 0 } },
13593 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b2f0000 }
13595 /* xchg.w r1,$Dst16RnHI */
13598 { { MNEM
, ' ', 'r', '1', ',', OP (DST16RNHI
), 0 } },
13599 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b10 }
13601 /* xchg.w r1,$Dst16AnHI */
13604 { { MNEM
, ' ', 'r', '1', ',', OP (DST16ANHI
), 0 } },
13605 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b14 }
13607 /* xchg.w r1,[$Dst16An] */
13610 { { MNEM
, ' ', 'r', '1', ',', '[', OP (DST16AN
), ']', 0 } },
13611 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b16 }
13613 /* xchg.w r1,${Dsp-16-u8}[$Dst16An] */
13616 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13617 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b1800 }
13619 /* xchg.w r1,${Dsp-16-u16}[$Dst16An] */
13622 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13623 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b1c0000 }
13625 /* xchg.w r1,${Dsp-16-u8}[sb] */
13628 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13629 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b1a00 }
13631 /* xchg.w r1,${Dsp-16-u16}[sb] */
13634 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13635 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b1e0000 }
13637 /* xchg.w r1,${Dsp-16-s8}[fb] */
13640 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13641 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b1b00 }
13643 /* xchg.w r1,${Dsp-16-u16} */
13646 { { MNEM
, ' ', 'r', '1', ',', OP (DSP_16_U16
), 0 } },
13647 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b1f0000 }
13649 /* xchg.w r0,$Dst16RnHI */
13652 { { MNEM
, ' ', 'r', '0', ',', OP (DST16RNHI
), 0 } },
13653 & ifmt_xchg16w_r3_dst16_Rn_direct_HI
, { 0x7b00 }
13655 /* xchg.w r0,$Dst16AnHI */
13658 { { MNEM
, ' ', 'r', '0', ',', OP (DST16ANHI
), 0 } },
13659 & ifmt_xchg16w_r3_dst16_An_direct_HI
, { 0x7b04 }
13661 /* xchg.w r0,[$Dst16An] */
13664 { { MNEM
, ' ', 'r', '0', ',', '[', OP (DST16AN
), ']', 0 } },
13665 & ifmt_xchg16w_r3_dst16_An_indirect_HI
, { 0x7b06 }
13667 /* xchg.w r0,${Dsp-16-u8}[$Dst16An] */
13670 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13671 & ifmt_xchg16w_r3_dst16_16_8_An_relative_HI
, { 0x7b0800 }
13673 /* xchg.w r0,${Dsp-16-u16}[$Dst16An] */
13676 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13677 & ifmt_xchg16w_r3_dst16_16_16_An_relative_HI
, { 0x7b0c0000 }
13679 /* xchg.w r0,${Dsp-16-u8}[sb] */
13682 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13683 & ifmt_xchg16w_r3_dst16_16_8_SB_relative_HI
, { 0x7b0a00 }
13685 /* xchg.w r0,${Dsp-16-u16}[sb] */
13688 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13689 & ifmt_xchg16w_r3_dst16_16_16_SB_relative_HI
, { 0x7b0e0000 }
13691 /* xchg.w r0,${Dsp-16-s8}[fb] */
13694 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13695 & ifmt_xchg16w_r3_dst16_16_8_FB_relative_HI
, { 0x7b0b00 }
13697 /* xchg.w r0,${Dsp-16-u16} */
13700 { { MNEM
, ' ', 'r', '0', ',', OP (DSP_16_U16
), 0 } },
13701 & ifmt_xchg16w_r3_dst16_16_16_absolute_HI
, { 0x7b0f0000 }
13703 /* xchg.b r1h,$Dst16RnQI */
13706 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
13707 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a30 }
13709 /* xchg.b r1h,$Dst16AnQI */
13712 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
13713 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a34 }
13715 /* xchg.b r1h,[$Dst16An] */
13718 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
13719 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a36 }
13721 /* xchg.b r1h,${Dsp-16-u8}[$Dst16An] */
13724 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13725 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a3800 }
13727 /* xchg.b r1h,${Dsp-16-u16}[$Dst16An] */
13730 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13731 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a3c0000 }
13733 /* xchg.b r1h,${Dsp-16-u8}[sb] */
13736 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13737 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a3a00 }
13739 /* xchg.b r1h,${Dsp-16-u16}[sb] */
13742 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13743 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a3e0000 }
13745 /* xchg.b r1h,${Dsp-16-s8}[fb] */
13748 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13749 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a3b00 }
13751 /* xchg.b r1h,${Dsp-16-u16} */
13754 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
13755 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a3f0000 }
13757 /* xchg.b r1l,$Dst16RnQI */
13760 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST16RNQI
), 0 } },
13761 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a20 }
13763 /* xchg.b r1l,$Dst16AnQI */
13766 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DST16ANQI
), 0 } },
13767 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a24 }
13769 /* xchg.b r1l,[$Dst16An] */
13772 { { MNEM
, ' ', 'r', '1', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
13773 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a26 }
13775 /* xchg.b r1l,${Dsp-16-u8}[$Dst16An] */
13778 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13779 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a2800 }
13781 /* xchg.b r1l,${Dsp-16-u16}[$Dst16An] */
13784 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13785 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a2c0000 }
13787 /* xchg.b r1l,${Dsp-16-u8}[sb] */
13790 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13791 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a2a00 }
13793 /* xchg.b r1l,${Dsp-16-u16}[sb] */
13796 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13797 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a2e0000 }
13799 /* xchg.b r1l,${Dsp-16-s8}[fb] */
13802 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13803 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a2b00 }
13805 /* xchg.b r1l,${Dsp-16-u16} */
13808 { { MNEM
, ' ', 'r', '1', 'l', ',', OP (DSP_16_U16
), 0 } },
13809 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a2f0000 }
13811 /* xchg.b r0h,$Dst16RnQI */
13814 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST16RNQI
), 0 } },
13815 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a10 }
13817 /* xchg.b r0h,$Dst16AnQI */
13820 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DST16ANQI
), 0 } },
13821 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a14 }
13823 /* xchg.b r0h,[$Dst16An] */
13826 { { MNEM
, ' ', 'r', '0', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
13827 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a16 }
13829 /* xchg.b r0h,${Dsp-16-u8}[$Dst16An] */
13832 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13833 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a1800 }
13835 /* xchg.b r0h,${Dsp-16-u16}[$Dst16An] */
13838 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13839 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a1c0000 }
13841 /* xchg.b r0h,${Dsp-16-u8}[sb] */
13844 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13845 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a1a00 }
13847 /* xchg.b r0h,${Dsp-16-u16}[sb] */
13850 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13851 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a1e0000 }
13853 /* xchg.b r0h,${Dsp-16-s8}[fb] */
13856 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13857 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a1b00 }
13859 /* xchg.b r0h,${Dsp-16-u16} */
13862 { { MNEM
, ' ', 'r', '0', 'h', ',', OP (DSP_16_U16
), 0 } },
13863 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a1f0000 }
13865 /* xchg.b r0l,$Dst16RnQI */
13868 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
13869 & ifmt_xchg16b_r1h_dst16_Rn_direct_QI
, { 0x7a00 }
13871 /* xchg.b r0l,$Dst16AnQI */
13874 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
13875 & ifmt_xchg16b_r1h_dst16_An_direct_QI
, { 0x7a04 }
13877 /* xchg.b r0l,[$Dst16An] */
13880 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
13881 & ifmt_xchg16b_r1h_dst16_An_indirect_QI
, { 0x7a06 }
13883 /* xchg.b r0l,${Dsp-16-u8}[$Dst16An] */
13886 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
13887 & ifmt_xchg16b_r1h_dst16_16_8_An_relative_QI
, { 0x7a0800 }
13889 /* xchg.b r0l,${Dsp-16-u16}[$Dst16An] */
13892 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
13893 & ifmt_xchg16b_r1h_dst16_16_16_An_relative_QI
, { 0x7a0c0000 }
13895 /* xchg.b r0l,${Dsp-16-u8}[sb] */
13898 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
13899 & ifmt_xchg16b_r1h_dst16_16_8_SB_relative_QI
, { 0x7a0a00 }
13901 /* xchg.b r0l,${Dsp-16-u16}[sb] */
13904 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
13905 & ifmt_xchg16b_r1h_dst16_16_16_SB_relative_QI
, { 0x7a0e0000 }
13907 /* xchg.b r0l,${Dsp-16-s8}[fb] */
13910 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
13911 & ifmt_xchg16b_r1h_dst16_16_8_FB_relative_QI
, { 0x7a0b00 }
13913 /* xchg.b r0l,${Dsp-16-u16} */
13916 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
13917 & ifmt_xchg16b_r1h_dst16_16_16_absolute_QI
, { 0x7a0f0000 }
13919 /* tst.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
13922 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
13923 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2d000000 }
13925 /* tst.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
13928 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
13929 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3d000000 }
13931 /* tst.w${S} #${Imm-24-HI},${Dsp-8-u16} */
13934 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
13935 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x1d000000 }
13937 /* tst.w${S} #${Imm-8-HI},r0 */
13940 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
13941 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0xd0000 }
13943 /* tst.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
13946 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
13947 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2c0000 }
13949 /* tst.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
13952 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
13953 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3c0000 }
13955 /* tst.b${S} #${Imm-24-QI},${Dsp-8-u16} */
13958 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
13959 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x1c000000 }
13961 /* tst.b${S} #${Imm-8-QI},r0l */
13964 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
13965 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0xc00 }
13967 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
13970 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13971 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990900 }
13973 /* tst.w${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
13976 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13977 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992900 }
13979 /* tst.w${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
13982 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
13983 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993900 }
13985 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
13988 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13989 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918900 }
13991 /* tst.w${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
13994 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
13995 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a900 }
13997 /* tst.w${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
14000 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14001 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b900 }
14003 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14006 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14007 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910900 }
14009 /* tst.w${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
14012 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14013 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912900 }
14015 /* tst.w${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
14018 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14019 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913900 }
14021 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
14024 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14025 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930900 }
14027 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14030 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14031 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932900 }
14033 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14036 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14037 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933900 }
14039 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
14042 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14043 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950900 }
14045 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14048 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14049 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952900 }
14051 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14054 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14055 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953900 }
14057 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
14060 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14061 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970900 }
14063 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14066 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14067 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972900 }
14069 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14072 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14073 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973900 }
14075 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
14078 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14079 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938900 }
14081 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
14084 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14085 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a900 }
14087 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
14090 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14091 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b900 }
14093 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
14096 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14097 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958900 }
14099 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
14102 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14103 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a900 }
14105 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
14108 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14109 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b900 }
14111 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
14114 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14115 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c900 }
14117 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
14120 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14121 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e900 }
14123 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
14126 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14127 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f900 }
14129 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
14132 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14133 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c900 }
14135 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
14138 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14139 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e900 }
14141 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
14144 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14145 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f900 }
14147 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
14150 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
14151 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c900 }
14153 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
14156 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
14157 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e900 }
14159 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
14162 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
14163 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f900 }
14165 /* tst.w${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
14168 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
14169 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978900 }
14171 /* tst.w${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
14174 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
14175 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a900 }
14177 /* tst.w${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
14180 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
14181 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b900 }
14183 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
14186 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14187 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90900 }
14189 /* tst.w${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
14192 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14193 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92900 }
14195 /* tst.w${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
14198 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14199 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93900 }
14201 /* tst.w${G} ${Dsp-24-u16},$Dst32RnPrefixedHI */
14204 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14205 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93900 }
14207 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
14210 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14211 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18900 }
14213 /* tst.w${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
14216 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14217 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a900 }
14219 /* tst.w${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
14222 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14223 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b900 }
14225 /* tst.w${G} ${Dsp-24-u16},$Dst32AnPrefixedHI */
14228 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14229 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b900 }
14231 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14234 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14235 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10900 }
14237 /* tst.w${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
14240 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14241 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12900 }
14243 /* tst.w${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
14246 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14247 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13900 }
14249 /* tst.w${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
14252 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14253 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13900 }
14255 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
14258 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14259 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30900 }
14261 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
14264 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14265 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32900 }
14267 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
14270 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14271 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33900 }
14273 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
14276 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14277 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33900 }
14279 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
14282 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14283 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50900 }
14285 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
14288 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14289 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52900 }
14291 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
14294 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14295 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53900 }
14297 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
14300 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14301 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53900 }
14303 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
14306 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14307 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70900 }
14309 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
14312 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14313 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72900 }
14315 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
14318 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14319 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73900 }
14321 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
14324 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14325 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73900 }
14327 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
14330 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14331 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38900 }
14333 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
14336 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14337 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a900 }
14339 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
14342 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14343 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b900 }
14345 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
14348 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
14349 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b900 }
14351 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
14354 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14355 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58900 }
14357 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
14360 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14361 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a900 }
14363 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
14366 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14367 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b900 }
14369 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
14372 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
14373 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b900 }
14375 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
14378 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14379 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c900 }
14381 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
14384 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14385 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e900 }
14387 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
14390 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14391 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f900 }
14393 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
14396 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
14397 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f900 }
14399 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
14402 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14403 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c900 }
14405 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
14408 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14409 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e900 }
14411 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
14414 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14415 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f900 }
14417 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
14420 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
14421 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f900 }
14423 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
14426 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
14427 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c900 }
14429 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
14432 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
14433 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e900 }
14435 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
14438 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
14439 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f900 }
14441 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u16} */
14444 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
14445 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f900 }
14447 /* tst.w${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
14450 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
14451 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78900 }
14453 /* tst.w${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
14456 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
14457 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a900 }
14459 /* tst.w${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
14462 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
14463 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b900 }
14465 /* tst.w${G} ${Dsp-24-u16},${Dsp-40-u24} */
14468 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
14469 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b900 }
14471 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
14474 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14475 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90900 }
14477 /* tst.w${G} ${Dsp-24-u24},$Dst32RnPrefixedHI */
14480 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14481 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92900 }
14483 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
14486 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14487 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18900 }
14489 /* tst.w${G} ${Dsp-24-u24},$Dst32AnPrefixedHI */
14492 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14493 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a900 }
14495 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14498 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14499 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10900 }
14501 /* tst.w${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
14504 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14505 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12900 }
14507 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
14510 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14511 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30900 }
14513 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
14516 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14517 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32900 }
14519 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
14522 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14523 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50900 }
14525 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
14528 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14529 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52900 }
14531 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
14534 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14535 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70900 }
14537 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
14540 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14541 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72900 }
14543 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
14546 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
14547 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38900 }
14549 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
14552 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
14553 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a900 }
14555 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
14558 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
14559 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58900 }
14561 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
14564 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
14565 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a900 }
14567 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
14570 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
14571 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c900 }
14573 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
14576 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
14577 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e900 }
14579 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
14582 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
14583 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c900 }
14585 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
14588 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
14589 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e900 }
14591 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
14594 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
14595 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c900 }
14597 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u16} */
14600 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
14601 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e900 }
14603 /* tst.w${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
14606 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
14607 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78900 }
14609 /* tst.w${G} ${Dsp-24-u24},${Dsp-48-u24} */
14612 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
14613 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a900 }
14615 /* tst.w${G} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
14618 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14619 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c909 }
14621 /* tst.w${G} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
14624 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
14625 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18929 }
14627 /* tst.w${G} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
14630 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
14631 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18909 }
14633 /* tst.w${G} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
14636 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14637 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c189 }
14639 /* tst.w${G} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
14642 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
14643 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a9 }
14645 /* tst.w${G} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
14648 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
14649 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18189 }
14651 /* tst.w${G} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
14654 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14655 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c109 }
14657 /* tst.w${G} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
14660 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14661 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18129 }
14663 /* tst.w${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
14666 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14667 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18109 }
14669 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
14672 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14673 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30900 }
14675 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
14678 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14679 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832900 }
14681 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
14684 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14685 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830900 }
14687 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
14690 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14691 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50900 }
14693 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
14696 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14697 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852900 }
14699 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
14702 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14703 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850900 }
14705 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
14708 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14709 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70900 }
14711 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
14714 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14715 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872900 }
14717 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
14720 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14721 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870900 }
14723 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
14726 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14727 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38900 }
14729 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
14732 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14733 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a900 }
14735 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
14738 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
14739 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838900 }
14741 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
14744 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14745 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58900 }
14747 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
14750 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14751 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a900 }
14753 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
14756 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
14757 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858900 }
14759 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
14762 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14763 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c900 }
14765 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
14768 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14769 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e900 }
14771 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
14774 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
14775 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c900 }
14777 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
14780 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14781 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c900 }
14783 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
14786 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14787 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e900 }
14789 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
14792 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
14793 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c900 }
14795 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u16} */
14798 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
14799 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c900 }
14801 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u16} */
14804 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
14805 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e900 }
14807 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u16} */
14810 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
14811 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c900 }
14813 /* tst.w${G} $Src32RnPrefixedHI,${Dsp-24-u24} */
14816 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
14817 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78900 }
14819 /* tst.w${G} $Src32AnPrefixedHI,${Dsp-24-u24} */
14822 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
14823 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a900 }
14825 /* tst.w${G} [$Src32AnPrefixed],${Dsp-24-u24} */
14828 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
14829 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878900 }
14831 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
14834 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14835 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980900 }
14837 /* tst.b${G} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
14840 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14841 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982900 }
14843 /* tst.b${G} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
14846 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
14847 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983900 }
14849 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
14852 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14853 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908900 }
14855 /* tst.b${G} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
14858 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14859 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a900 }
14861 /* tst.b${G} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
14864 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
14865 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b900 }
14867 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
14870 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14871 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900900 }
14873 /* tst.b${G} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
14876 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14877 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902900 }
14879 /* tst.b${G} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
14882 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
14883 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903900 }
14885 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
14888 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14889 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920900 }
14891 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14894 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14895 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922900 }
14897 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
14900 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14901 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923900 }
14903 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
14906 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14907 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940900 }
14909 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14912 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14913 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942900 }
14915 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
14918 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14919 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943900 }
14921 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
14924 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14925 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960900 }
14927 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14930 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14931 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962900 }
14933 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
14936 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
14937 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963900 }
14939 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
14942 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14943 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928900 }
14945 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
14948 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14949 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a900 }
14951 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
14954 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
14955 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b900 }
14957 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
14960 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14961 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948900 }
14963 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
14966 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14967 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a900 }
14969 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
14972 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
14973 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b900 }
14975 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
14978 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14979 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c900 }
14981 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
14984 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14985 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e900 }
14987 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
14990 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
14991 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f900 }
14993 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
14996 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
14997 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c900 }
14999 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
15002 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
15003 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e900 }
15005 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
15008 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
15009 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f900 }
15011 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
15014 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
15015 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c900 }
15017 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
15020 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
15021 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e900 }
15023 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
15026 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
15027 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f900 }
15029 /* tst.b${G} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
15032 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
15033 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968900 }
15035 /* tst.b${G} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
15038 { { MNEM
, OP (G
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
15039 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a900 }
15041 /* tst.b${G} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
15044 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
15045 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b900 }
15047 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
15050 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15051 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80900 }
15053 /* tst.b${G} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
15056 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15057 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82900 }
15059 /* tst.b${G} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
15062 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15063 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83900 }
15065 /* tst.b${G} ${Dsp-24-u16},$Dst32RnPrefixedQI */
15068 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15069 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83900 }
15071 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
15074 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15075 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08900 }
15077 /* tst.b${G} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
15080 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15081 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a900 }
15083 /* tst.b${G} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
15086 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15087 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b900 }
15089 /* tst.b${G} ${Dsp-24-u16},$Dst32AnPrefixedQI */
15092 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15093 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b900 }
15095 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
15098 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15099 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00900 }
15101 /* tst.b${G} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
15104 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15105 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02900 }
15107 /* tst.b${G} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
15110 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15111 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03900 }
15113 /* tst.b${G} ${Dsp-24-u16},[$Dst32AnPrefixed] */
15116 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15117 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03900 }
15119 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
15122 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15123 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20900 }
15125 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
15128 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15129 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22900 }
15131 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
15134 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15135 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23900 }
15137 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
15140 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15141 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23900 }
15143 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
15146 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15147 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40900 }
15149 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
15152 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15153 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42900 }
15155 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
15158 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15159 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43900 }
15161 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
15164 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15165 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43900 }
15167 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
15170 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15171 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60900 }
15173 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
15176 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15177 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62900 }
15179 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
15182 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15183 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63900 }
15185 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
15188 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15189 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63900 }
15191 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
15194 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15195 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28900 }
15197 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
15200 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15201 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a900 }
15203 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
15206 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15207 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b900 }
15209 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
15212 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
15213 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b900 }
15215 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
15218 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15219 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48900 }
15221 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
15224 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15225 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a900 }
15227 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
15230 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15231 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b900 }
15233 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
15236 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
15237 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b900 }
15239 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
15242 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15243 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c900 }
15245 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
15248 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15249 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e900 }
15251 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
15254 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15255 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f900 }
15257 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
15260 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
15261 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f900 }
15263 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
15266 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15267 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c900 }
15269 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
15272 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15273 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e900 }
15275 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
15278 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15279 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f900 }
15281 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
15284 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
15285 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f900 }
15287 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
15290 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
15291 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c900 }
15293 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
15296 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
15297 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e900 }
15299 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
15302 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
15303 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f900 }
15305 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u16} */
15308 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
15309 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f900 }
15311 /* tst.b${G} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
15314 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
15315 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68900 }
15317 /* tst.b${G} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
15320 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
15321 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a900 }
15323 /* tst.b${G} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
15326 { { MNEM
, OP (G
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
15327 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b900 }
15329 /* tst.b${G} ${Dsp-24-u16},${Dsp-40-u24} */
15332 { { MNEM
, OP (G
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
15333 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b900 }
15335 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
15338 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15339 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80900 }
15341 /* tst.b${G} ${Dsp-24-u24},$Dst32RnPrefixedQI */
15344 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15345 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82900 }
15347 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
15350 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15351 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08900 }
15353 /* tst.b${G} ${Dsp-24-u24},$Dst32AnPrefixedQI */
15356 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15357 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a900 }
15359 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
15362 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15363 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00900 }
15365 /* tst.b${G} ${Dsp-24-u24},[$Dst32AnPrefixed] */
15368 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15369 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02900 }
15371 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
15374 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15375 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20900 }
15377 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
15380 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15381 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22900 }
15383 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
15386 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15387 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40900 }
15389 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
15392 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15393 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42900 }
15395 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
15398 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15399 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60900 }
15401 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
15404 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15405 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62900 }
15407 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
15410 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
15411 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28900 }
15413 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
15416 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
15417 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a900 }
15419 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
15422 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
15423 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48900 }
15425 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
15428 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
15429 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a900 }
15431 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
15434 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
15435 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c900 }
15437 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
15440 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
15441 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e900 }
15443 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
15446 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
15447 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c900 }
15449 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
15452 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
15453 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e900 }
15455 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
15458 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
15459 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c900 }
15461 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u16} */
15464 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
15465 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e900 }
15467 /* tst.b${G} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
15470 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
15471 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68900 }
15473 /* tst.b${G} ${Dsp-24-u24},${Dsp-48-u24} */
15476 { { MNEM
, OP (G
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
15477 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a900 }
15479 /* tst.b${G} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
15482 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15483 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c809 }
15485 /* tst.b${G} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
15488 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
15489 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18829 }
15491 /* tst.b${G} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
15494 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
15495 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18809 }
15497 /* tst.b${G} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
15500 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15501 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c089 }
15503 /* tst.b${G} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
15506 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
15507 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a9 }
15509 /* tst.b${G} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
15512 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
15513 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18089 }
15515 /* tst.b${G} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
15518 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15519 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c009 }
15521 /* tst.b${G} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
15524 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15525 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18029 }
15527 /* tst.b${G} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
15530 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
15531 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18009 }
15533 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
15536 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15537 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20900 }
15539 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
15542 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15543 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822900 }
15545 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
15548 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15549 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820900 }
15551 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
15554 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15555 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40900 }
15557 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
15560 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15561 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842900 }
15563 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
15566 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15567 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840900 }
15569 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
15572 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15573 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60900 }
15575 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
15578 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15579 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862900 }
15581 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
15584 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
15585 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860900 }
15587 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
15590 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15591 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28900 }
15593 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
15596 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15597 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a900 }
15599 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
15602 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15603 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828900 }
15605 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
15608 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15609 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48900 }
15611 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
15614 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15615 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a900 }
15617 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
15620 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15621 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848900 }
15623 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
15626 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15627 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c900 }
15629 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
15632 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15633 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e900 }
15635 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
15638 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15639 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c900 }
15641 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
15644 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15645 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c900 }
15647 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
15650 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15651 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e900 }
15653 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
15656 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
15657 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c900 }
15659 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u16} */
15662 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
15663 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c900 }
15665 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u16} */
15668 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
15669 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e900 }
15671 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u16} */
15674 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
15675 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c900 }
15677 /* tst.b${G} $Src32RnPrefixedQI,${Dsp-24-u24} */
15680 { { MNEM
, OP (G
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
15681 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68900 }
15683 /* tst.b${G} $Src32AnPrefixedQI,${Dsp-24-u24} */
15686 { { MNEM
, OP (G
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
15687 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a900 }
15689 /* tst.b${G} [$Src32AnPrefixed],${Dsp-24-u24} */
15692 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
15693 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868900 }
15695 /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
15698 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
15699 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x818000 }
15701 /* tst.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
15704 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15705 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x81a000 }
15707 /* tst.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
15710 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15711 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x81b000 }
15713 /* tst.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
15716 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
15717 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x818400 }
15719 /* tst.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
15722 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15723 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x81a400 }
15725 /* tst.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
15728 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15729 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x81b400 }
15731 /* tst.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
15734 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
15735 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x818600 }
15737 /* tst.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
15740 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15741 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x81a600 }
15743 /* tst.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
15746 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15747 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x81b600 }
15749 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
15752 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15753 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x81880000 }
15755 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
15758 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15759 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x81a80000 }
15761 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
15764 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
15765 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x81b80000 }
15767 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
15770 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15771 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x818c0000 }
15773 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
15776 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15777 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x81ac0000 }
15779 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
15782 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
15783 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x81bc0000 }
15785 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
15788 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15789 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x818a0000 }
15791 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
15794 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15795 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x81aa0000 }
15797 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
15800 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
15801 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x81ba0000 }
15803 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
15806 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15807 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x818e0000 }
15809 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
15812 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15813 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x81ae0000 }
15815 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
15818 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
15819 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x81be0000 }
15821 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
15824 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15825 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x818b0000 }
15827 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
15830 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15831 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x81ab0000 }
15833 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
15836 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
15837 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x81bb0000 }
15839 /* tst.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
15842 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
15843 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x818f0000 }
15845 /* tst.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
15848 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
15849 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x81af0000 }
15851 /* tst.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
15854 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
15855 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x81bf0000 }
15857 /* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
15860 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
15861 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x81c00000 }
15863 /* tst.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
15866 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
15867 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x81e00000 }
15869 /* tst.w${X} ${Dsp-16-u16},$Dst16RnHI */
15872 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
15873 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x81f00000 }
15875 /* tst.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
15878 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
15879 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x81c40000 }
15881 /* tst.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
15884 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
15885 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x81e40000 }
15887 /* tst.w${X} ${Dsp-16-u16},$Dst16AnHI */
15890 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
15891 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x81f40000 }
15893 /* tst.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
15896 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
15897 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x81c60000 }
15899 /* tst.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
15902 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
15903 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x81e60000 }
15905 /* tst.w${X} ${Dsp-16-u16},[$Dst16An] */
15908 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
15909 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x81f60000 }
15911 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
15914 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15915 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x81c80000 }
15917 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
15920 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15921 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x81e80000 }
15923 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
15926 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
15927 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x81f80000 }
15929 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
15932 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15933 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x81cc0000 }
15935 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
15938 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15939 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x81ec0000 }
15941 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
15944 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
15945 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x81fc0000 }
15947 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
15950 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15951 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x81ca0000 }
15953 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
15956 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15957 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x81ea0000 }
15959 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
15962 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
15963 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x81fa0000 }
15965 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
15968 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15969 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x81ce0000 }
15971 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
15974 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15975 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x81ee0000 }
15977 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
15980 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
15981 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x81fe0000 }
15983 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
15986 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15987 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x81cb0000 }
15989 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
15992 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15993 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x81eb0000 }
15995 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
15998 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
15999 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x81fb0000 }
16001 /* tst.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
16004 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
16005 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x81cf0000 }
16007 /* tst.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
16010 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
16011 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x81ef0000 }
16013 /* tst.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
16016 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
16017 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x81ff0000 }
16019 /* tst.w${X} $Src16RnHI,$Dst16RnHI */
16022 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
16023 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x8100 }
16025 /* tst.w${X} $Src16AnHI,$Dst16RnHI */
16028 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
16029 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x8140 }
16031 /* tst.w${X} [$Src16An],$Dst16RnHI */
16034 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
16035 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x8160 }
16037 /* tst.w${X} $Src16RnHI,$Dst16AnHI */
16040 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
16041 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x8104 }
16043 /* tst.w${X} $Src16AnHI,$Dst16AnHI */
16046 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
16047 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x8144 }
16049 /* tst.w${X} [$Src16An],$Dst16AnHI */
16052 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
16053 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x8164 }
16055 /* tst.w${X} $Src16RnHI,[$Dst16An] */
16058 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
16059 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x8106 }
16061 /* tst.w${X} $Src16AnHI,[$Dst16An] */
16064 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
16065 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x8146 }
16067 /* tst.w${X} [$Src16An],[$Dst16An] */
16070 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16071 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x8166 }
16073 /* tst.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
16076 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16077 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x810800 }
16079 /* tst.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
16082 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16083 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x814800 }
16085 /* tst.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
16088 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16089 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x816800 }
16091 /* tst.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
16094 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16095 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x810c0000 }
16097 /* tst.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
16100 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16101 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x814c0000 }
16103 /* tst.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
16106 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16107 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x816c0000 }
16109 /* tst.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
16112 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16113 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x810a00 }
16115 /* tst.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
16118 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16119 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x814a00 }
16121 /* tst.w${X} [$Src16An],${Dsp-16-u8}[sb] */
16124 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16125 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x816a00 }
16127 /* tst.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
16130 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16131 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x810e0000 }
16133 /* tst.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
16136 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16137 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x814e0000 }
16139 /* tst.w${X} [$Src16An],${Dsp-16-u16}[sb] */
16142 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16143 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x816e0000 }
16145 /* tst.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
16148 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16149 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x810b00 }
16151 /* tst.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
16154 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16155 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x814b00 }
16157 /* tst.w${X} [$Src16An],${Dsp-16-s8}[fb] */
16160 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16161 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x816b00 }
16163 /* tst.w${X} $Src16RnHI,${Dsp-16-u16} */
16166 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
16167 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x810f0000 }
16169 /* tst.w${X} $Src16AnHI,${Dsp-16-u16} */
16172 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
16173 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x814f0000 }
16175 /* tst.w${X} [$Src16An],${Dsp-16-u16} */
16178 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
16179 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x816f0000 }
16181 /* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
16184 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16185 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x808000 }
16187 /* tst.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
16190 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16191 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x80a000 }
16193 /* tst.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
16196 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16197 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x80b000 }
16199 /* tst.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
16202 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16203 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x808400 }
16205 /* tst.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
16208 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16209 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x80a400 }
16211 /* tst.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
16214 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16215 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x80b400 }
16217 /* tst.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
16220 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16221 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x808600 }
16223 /* tst.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
16226 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16227 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x80a600 }
16229 /* tst.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
16232 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16233 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x80b600 }
16235 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
16238 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16239 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x80880000 }
16241 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
16244 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16245 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x80a80000 }
16247 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
16250 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
16251 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x80b80000 }
16253 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
16256 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16257 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x808c0000 }
16259 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
16262 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16263 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x80ac0000 }
16265 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
16268 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
16269 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x80bc0000 }
16271 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
16274 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16275 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x808a0000 }
16277 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
16280 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16281 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x80aa0000 }
16283 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
16286 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
16287 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x80ba0000 }
16289 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
16292 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16293 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x808e0000 }
16295 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
16298 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16299 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x80ae0000 }
16301 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
16304 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
16305 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x80be0000 }
16307 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
16310 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16311 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x808b0000 }
16313 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
16316 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16317 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x80ab0000 }
16319 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
16322 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
16323 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x80bb0000 }
16325 /* tst.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
16328 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
16329 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x808f0000 }
16331 /* tst.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
16334 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
16335 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x80af0000 }
16337 /* tst.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
16340 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
16341 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x80bf0000 }
16343 /* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
16346 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16347 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x80c00000 }
16349 /* tst.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
16352 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
16353 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x80e00000 }
16355 /* tst.b${X} ${Dsp-16-u16},$Dst16RnQI */
16358 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
16359 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x80f00000 }
16361 /* tst.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
16364 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16365 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x80c40000 }
16367 /* tst.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
16370 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
16371 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x80e40000 }
16373 /* tst.b${X} ${Dsp-16-u16},$Dst16AnQI */
16376 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
16377 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x80f40000 }
16379 /* tst.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
16382 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16383 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x80c60000 }
16385 /* tst.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
16388 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
16389 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x80e60000 }
16391 /* tst.b${X} ${Dsp-16-u16},[$Dst16An] */
16394 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
16395 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x80f60000 }
16397 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
16400 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16401 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x80c80000 }
16403 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
16406 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16407 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x80e80000 }
16409 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
16412 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
16413 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x80f80000 }
16415 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
16418 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16419 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x80cc0000 }
16421 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
16424 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16425 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x80ec0000 }
16427 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
16430 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
16431 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x80fc0000 }
16433 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
16436 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16437 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x80ca0000 }
16439 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
16442 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16443 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x80ea0000 }
16445 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
16448 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
16449 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x80fa0000 }
16451 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
16454 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16455 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x80ce0000 }
16457 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
16460 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16461 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x80ee0000 }
16463 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
16466 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
16467 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x80fe0000 }
16469 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
16472 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16473 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x80cb0000 }
16475 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
16478 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16479 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x80eb0000 }
16481 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
16484 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
16485 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x80fb0000 }
16487 /* tst.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
16490 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
16491 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x80cf0000 }
16493 /* tst.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
16496 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
16497 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x80ef0000 }
16499 /* tst.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
16502 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
16503 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x80ff0000 }
16505 /* tst.b${X} $Src16RnQI,$Dst16RnQI */
16508 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
16509 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x8000 }
16511 /* tst.b${X} $Src16AnQI,$Dst16RnQI */
16514 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
16515 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x8040 }
16517 /* tst.b${X} [$Src16An],$Dst16RnQI */
16520 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
16521 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x8060 }
16523 /* tst.b${X} $Src16RnQI,$Dst16AnQI */
16526 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
16527 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x8004 }
16529 /* tst.b${X} $Src16AnQI,$Dst16AnQI */
16532 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
16533 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x8044 }
16535 /* tst.b${X} [$Src16An],$Dst16AnQI */
16538 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
16539 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x8064 }
16541 /* tst.b${X} $Src16RnQI,[$Dst16An] */
16544 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
16545 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x8006 }
16547 /* tst.b${X} $Src16AnQI,[$Dst16An] */
16550 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
16551 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x8046 }
16553 /* tst.b${X} [$Src16An],[$Dst16An] */
16556 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
16557 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x8066 }
16559 /* tst.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
16562 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16563 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x800800 }
16565 /* tst.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
16568 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16569 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x804800 }
16571 /* tst.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
16574 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16575 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x806800 }
16577 /* tst.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
16580 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16581 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x800c0000 }
16583 /* tst.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
16586 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16587 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x804c0000 }
16589 /* tst.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
16592 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16593 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x806c0000 }
16595 /* tst.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
16598 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16599 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x800a00 }
16601 /* tst.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
16604 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16605 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x804a00 }
16607 /* tst.b${X} [$Src16An],${Dsp-16-u8}[sb] */
16610 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16611 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x806a00 }
16613 /* tst.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
16616 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16617 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x800e0000 }
16619 /* tst.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
16622 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16623 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x804e0000 }
16625 /* tst.b${X} [$Src16An],${Dsp-16-u16}[sb] */
16628 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16629 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x806e0000 }
16631 /* tst.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
16634 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16635 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x800b00 }
16637 /* tst.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
16640 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16641 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x804b00 }
16643 /* tst.b${X} [$Src16An],${Dsp-16-s8}[fb] */
16646 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16647 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x806b00 }
16649 /* tst.b${X} $Src16RnQI,${Dsp-16-u16} */
16652 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
16653 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x800f0000 }
16655 /* tst.b${X} $Src16AnQI,${Dsp-16-u16} */
16658 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
16659 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x804f0000 }
16661 /* tst.b${X} [$Src16An],${Dsp-16-u16} */
16664 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
16665 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x806f0000 }
16667 /* tst.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
16670 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
16671 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x993e0000 }
16673 /* tst.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
16676 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
16677 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91be0000 }
16679 /* tst.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
16682 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16683 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x913e0000 }
16685 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
16688 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16689 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x933e0000 }
16691 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
16694 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16695 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93be0000 }
16697 /* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
16700 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16701 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93fe0000 }
16703 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
16706 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16707 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x953e0000 }
16709 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
16712 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16713 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95be0000 }
16715 /* tst.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
16718 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
16719 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95fe0000 }
16721 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
16724 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
16725 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97fe0000 }
16727 /* tst.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
16730 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16731 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x973e0000 }
16733 /* tst.w${G} #${Imm-40-HI},${Dsp-16-u24} */
16736 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
16737 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97be0000 }
16739 /* tst.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
16742 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
16743 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x983e00 }
16745 /* tst.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
16748 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
16749 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90be00 }
16751 /* tst.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
16754 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16755 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x903e00 }
16757 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
16760 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16761 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x923e0000 }
16763 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
16766 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16767 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92be0000 }
16769 /* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
16772 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16773 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92fe0000 }
16775 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
16778 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16779 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x943e0000 }
16781 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
16784 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16785 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94be0000 }
16787 /* tst.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
16790 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
16791 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94fe0000 }
16793 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
16796 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
16797 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96fe0000 }
16799 /* tst.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
16802 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16803 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x963e0000 }
16805 /* tst.b${G} #${Imm-40-QI},${Dsp-16-u24} */
16808 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
16809 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96be0000 }
16811 /* tst.w${G} #${Imm-16-HI},$Dst16RnHI */
16814 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
16815 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77000000 }
16817 /* tst.w${G} #${Imm-16-HI},$Dst16AnHI */
16820 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
16821 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77040000 }
16823 /* tst.w${G} #${Imm-16-HI},[$Dst16An] */
16826 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
16827 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77060000 }
16829 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
16832 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16833 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77080000 }
16835 /* tst.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
16838 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16839 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x770a0000 }
16841 /* tst.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
16844 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16845 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x770b0000 }
16847 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
16850 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16851 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x770c0000 }
16853 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
16856 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16857 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x770e0000 }
16859 /* tst.w${G} #${Imm-32-HI},${Dsp-16-u16} */
16862 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
16863 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x770f0000 }
16865 /* tst.b${G} #${Imm-16-QI},$Dst16RnQI */
16868 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
16869 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x760000 }
16871 /* tst.b${G} #${Imm-16-QI},$Dst16AnQI */
16874 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
16875 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x760400 }
16877 /* tst.b${G} #${Imm-16-QI},[$Dst16An] */
16880 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
16881 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x760600 }
16883 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
16886 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
16887 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76080000 }
16889 /* tst.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
16892 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
16893 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x760a0000 }
16895 /* tst.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
16898 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
16899 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x760b0000 }
16901 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
16904 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
16905 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x760c0000 }
16907 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
16910 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
16911 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x760e0000 }
16913 /* tst.b${G} #${Imm-32-QI},${Dsp-16-u16} */
16916 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
16917 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x760f0000 }
16919 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
16922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16923 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x980000 }
16925 /* subx${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
16928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16929 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x982000 }
16931 /* subx${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
16934 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
16935 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x983000 }
16937 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
16940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16941 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x908000 }
16943 /* subx${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
16946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16947 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90a000 }
16949 /* subx${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
16952 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
16953 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90b000 }
16955 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
16958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16959 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x900000 }
16961 /* subx${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
16964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16965 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x902000 }
16967 /* subx${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
16970 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16971 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x903000 }
16973 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16977 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92000000 }
16979 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16983 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92200000 }
16985 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
16988 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16989 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92300000 }
16991 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
16994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
16995 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94000000 }
16997 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
17000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17001 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94200000 }
17003 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
17006 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17007 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94300000 }
17009 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17013 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96000000 }
17015 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17019 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96200000 }
17021 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
17024 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17025 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96300000 }
17027 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
17030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17031 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92800000 }
17033 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
17036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17037 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92a00000 }
17039 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
17042 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
17043 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92b00000 }
17045 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
17048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17049 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94800000 }
17051 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
17054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17055 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94a00000 }
17057 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
17060 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
17061 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94b00000 }
17063 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
17066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17067 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92c00000 }
17069 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
17072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17073 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92e00000 }
17075 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
17078 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
17079 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92f00000 }
17081 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
17084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17085 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94c00000 }
17087 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
17090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17091 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94e00000 }
17093 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
17096 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
17097 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94f00000 }
17099 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
17102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
17103 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96c00000 }
17105 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
17108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
17109 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96e00000 }
17111 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
17114 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
17115 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96f00000 }
17117 /* subx${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
17120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
17121 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96800000 }
17123 /* subx${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
17126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
17127 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96a00000 }
17129 /* subx${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
17132 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
17133 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96b00000 }
17135 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17139 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8000000 }
17141 /* subx${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
17144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17145 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8200000 }
17147 /* subx${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
17150 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17151 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8300000 }
17153 /* subx${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
17156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17157 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8300000 }
17159 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17163 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0800000 }
17165 /* subx${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
17168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17169 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0a00000 }
17171 /* subx${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
17174 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17175 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0b00000 }
17177 /* subx${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
17180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17181 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0b00000 }
17183 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17187 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0000000 }
17189 /* subx${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
17192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17193 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0200000 }
17195 /* subx${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
17198 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17199 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0300000 }
17201 /* subx${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
17204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17205 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0300000 }
17207 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17211 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2000000 }
17213 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17217 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2200000 }
17219 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
17222 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17223 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2300000 }
17225 /* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
17228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17229 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb2300000 }
17231 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17235 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4000000 }
17237 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17241 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4200000 }
17243 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
17246 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17247 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4300000 }
17249 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
17252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17253 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb4300000 }
17255 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17259 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6000000 }
17261 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17265 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6200000 }
17267 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
17270 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17271 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6300000 }
17273 /* subx${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
17276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17277 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb6300000 }
17279 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
17282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17283 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2800000 }
17285 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
17288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17289 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2a00000 }
17291 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
17294 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17295 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2b00000 }
17297 /* subx${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
17300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
17301 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb2b00000 }
17303 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
17306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17307 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4800000 }
17309 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
17312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17313 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4a00000 }
17315 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
17318 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17319 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4b00000 }
17321 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
17324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
17325 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb4b00000 }
17327 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
17330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17331 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2c00000 }
17333 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
17336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17337 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2e00000 }
17339 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
17342 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17343 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2f00000 }
17345 /* subx${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
17348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
17349 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb2f00000 }
17351 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
17354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17355 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4c00000 }
17357 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
17360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17361 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4e00000 }
17363 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
17366 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17367 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4f00000 }
17369 /* subx${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
17372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
17373 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb4f00000 }
17375 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
17378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
17379 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6c00000 }
17381 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
17384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
17385 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6e00000 }
17387 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
17390 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
17391 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6f00000 }
17393 /* subx${G} ${Dsp-16-u16},${Dsp-32-u16} */
17396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
17397 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb6f00000 }
17399 /* subx${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
17402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
17403 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6800000 }
17405 /* subx${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
17408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
17409 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6a00000 }
17411 /* subx${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
17414 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
17415 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6b00000 }
17417 /* subx${G} ${Dsp-16-u16},${Dsp-32-u24} */
17420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
17421 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb6b00000 }
17423 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17427 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8000000 }
17429 /* subx${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
17432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17433 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8200000 }
17435 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17439 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0800000 }
17441 /* subx${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
17444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17445 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0a00000 }
17447 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17451 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0000000 }
17453 /* subx${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
17456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17457 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0200000 }
17459 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
17462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17463 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2000000 }
17465 /* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
17468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17469 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2200000 }
17471 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
17474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17475 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4000000 }
17477 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
17480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17481 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4200000 }
17483 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
17486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17487 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6000000 }
17489 /* subx${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
17492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17493 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6200000 }
17495 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
17498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
17499 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2800000 }
17501 /* subx${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
17504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
17505 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2a00000 }
17507 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
17510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
17511 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4800000 }
17513 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
17516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
17517 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4a00000 }
17519 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
17522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
17523 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2c00000 }
17525 /* subx${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
17528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
17529 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2e00000 }
17531 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
17534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
17535 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4c00000 }
17537 /* subx${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
17540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
17541 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4e00000 }
17543 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
17546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
17547 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6c00000 }
17549 /* subx${G} ${Dsp-16-u24},${Dsp-40-u16} */
17552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
17553 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6e00000 }
17555 /* subx${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
17558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
17559 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6800000 }
17561 /* subx${G} ${Dsp-16-u24},${Dsp-40-u24} */
17564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
17565 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6a00000 }
17567 /* subx${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
17570 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17571 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xc800 }
17573 /* subx${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
17576 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17577 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8820 }
17579 /* subx${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
17582 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17583 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8800 }
17585 /* subx${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
17588 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17589 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xc080 }
17591 /* subx${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
17594 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17595 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x80a0 }
17597 /* subx${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
17600 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17601 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x8080 }
17603 /* subx${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
17606 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17607 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xc000 }
17609 /* subx${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
17612 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17613 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8020 }
17615 /* subx${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
17618 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17619 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8000 }
17621 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
17624 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17625 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20000 }
17627 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
17630 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17631 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x822000 }
17633 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
17636 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17637 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820000 }
17639 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
17642 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17643 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4000000 }
17645 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
17648 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17649 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84200000 }
17651 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
17654 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17655 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84000000 }
17657 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
17660 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17661 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6000000 }
17663 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
17666 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17667 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86200000 }
17669 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
17672 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17673 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86000000 }
17675 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
17678 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17679 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28000 }
17681 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
17684 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17685 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a000 }
17687 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
17690 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17691 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828000 }
17693 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
17696 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17697 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4800000 }
17699 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
17702 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17703 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a00000 }
17705 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
17708 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17709 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84800000 }
17711 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
17714 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17715 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c000 }
17717 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
17720 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17721 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e000 }
17723 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
17726 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17727 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c000 }
17729 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
17732 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17733 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c00000 }
17735 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
17738 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17739 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e00000 }
17741 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
17744 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17745 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c00000 }
17747 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
17750 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
17751 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c00000 }
17753 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
17756 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
17757 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e00000 }
17759 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
17762 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
17763 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c00000 }
17765 /* subx${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
17768 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
17769 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6800000 }
17771 /* subx${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
17774 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
17775 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a00000 }
17777 /* subx${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
17780 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
17781 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86800000 }
17783 /* subx${G} #${Imm-16-QI},$Dst32RnUnprefixedSI */
17786 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
17787 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x981100 }
17789 /* subx${G} #${Imm-16-QI},$Dst32AnUnprefixedSI */
17792 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
17793 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x909100 }
17795 /* subx${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
17798 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17799 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x901100 }
17801 /* subx${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17804 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17805 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92110000 }
17807 /* subx${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
17810 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17811 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92910000 }
17813 /* subx${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
17816 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17817 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92d10000 }
17819 /* subx${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17822 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17823 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94110000 }
17825 /* subx${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
17828 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17829 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94910000 }
17831 /* subx${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
17834 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17835 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94d10000 }
17837 /* subx${G} #${Imm-32-QI},${Dsp-16-u16} */
17840 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
17841 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96d10000 }
17843 /* subx${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17846 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17847 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96110000 }
17849 /* subx${G} #${Imm-40-QI},${Dsp-16-u24} */
17852 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
17853 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96910000 }
17855 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32RnUnprefixedHI */
17858 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
17859 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x993f0000 }
17861 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},$Dst32AnUnprefixedHI */
17864 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
17865 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91bf0000 }
17867 /* stzx.w #${Imm-16-HI},#${Imm-32-HI},[$Dst32AnUnprefixed] */
17870 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', '#', OP (IMM_32_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17871 & ifmt_stzx32_w_Imm_16_HI_Imm_32_HI_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x913f0000 }
17873 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17876 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17877 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x933f0000 }
17879 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-u8}[sb] */
17882 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17883 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93bf0000 }
17885 /* stzx.w #${Imm-24-HI},#${Imm-40-HI},${Dsp-16-s8}[fb] */
17888 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17889 & ifmt_stzx32_w_Imm_24_HI_Imm_40_HI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ff0000 }
17891 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17894 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17895 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x953f0000 }
17897 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16}[sb] */
17900 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17901 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95bf0000 }
17903 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-s16}[fb] */
17906 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17907 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ff0000 }
17909 /* stzx.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-16-u16} */
17912 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_16_U16
), 0 } },
17913 & ifmt_stzx32_w_Imm_32_HI_Imm_48_HI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ff0000 }
17915 /* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17918 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17919 & ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x973f0000 }
17921 /* stzx.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-16-u24} */
17924 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_16_U24
), 0 } },
17925 & ifmt_stzx32_w_Imm_40_HI_Imm_56_HI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97bf0000 }
17927 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32RnUnprefixedQI */
17930 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
17931 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x983f0000 }
17933 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},$Dst32AnUnprefixedQI */
17936 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
17937 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90bf0000 }
17939 /* stzx.b #${Imm-16-QI},#${Imm-24-QI},[$Dst32AnUnprefixed] */
17942 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17943 & ifmt_stzx32_b_Imm_16_QI_Imm_24_QI_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x903f0000 }
17945 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
17948 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17949 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x923f0000 }
17951 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-u8}[sb] */
17954 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
17955 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92bf0000 }
17957 /* stzx.b #${Imm-24-QI},#${Imm-32-QI},${Dsp-16-s8}[fb] */
17960 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
17961 & ifmt_stzx32_b_Imm_24_QI_Imm_32_QI_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ff0000 }
17963 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
17966 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17967 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x943f0000 }
17969 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16}[sb] */
17972 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
17973 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94bf0000 }
17975 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-s16}[fb] */
17978 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
17979 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ff0000 }
17981 /* stzx.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-16-u16} */
17984 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U16
), 0 } },
17985 & ifmt_stzx32_b_Imm_32_QI_Imm_40_QI_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ff0000 }
17987 /* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
17990 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
17991 & ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x963f0000 }
17993 /* stzx.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-16-u24} */
17996 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_16_U24
), 0 } },
17997 & ifmt_stzx32_b_Imm_40_QI_Imm_48_QI_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96bf0000 }
17999 /* stz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
18002 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18003 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x990f0000 }
18005 /* stz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
18008 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18009 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x918f0000 }
18011 /* stz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
18014 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18015 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x910f0000 }
18017 /* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18020 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18021 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x930f0000 }
18023 /* stz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
18026 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18027 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x938f0000 }
18029 /* stz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
18032 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18033 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93cf0000 }
18035 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18038 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18039 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x950f0000 }
18041 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
18044 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18045 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x958f0000 }
18047 /* stz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
18050 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18051 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95cf0000 }
18053 /* stz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
18056 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
18057 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97cf0000 }
18059 /* stz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18062 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18063 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x970f0000 }
18065 /* stz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
18068 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
18069 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x978f0000 }
18071 /* stz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
18074 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18075 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x980f00 }
18077 /* stz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
18080 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18081 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x908f00 }
18083 /* stz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18086 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18087 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x900f00 }
18089 /* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18092 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18093 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920f0000 }
18095 /* stz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18098 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18099 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928f0000 }
18101 /* stz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18104 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18105 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92cf0000 }
18107 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18110 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18111 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x940f0000 }
18113 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18116 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18117 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x948f0000 }
18119 /* stz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18122 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18123 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94cf0000 }
18125 /* stz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
18128 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18129 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96cf0000 }
18131 /* stz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18134 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18135 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x960f0000 }
18137 /* stz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
18140 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18141 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x968f0000 }
18143 /* stz${S} #${Imm-8-QI},r0l */
18146 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
18147 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xcc00 }
18149 /* stz${S} #${Imm-8-QI},r0h */
18152 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
18153 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xcb00 }
18155 /* stz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
18158 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18159 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xcd0000 }
18161 /* stz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
18164 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18165 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xce0000 }
18167 /* stz${S} #${Imm-8-QI},${Dsp-16-u16} */
18170 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
18171 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xcf000000 }
18173 /* stnz.w${X} #${Imm-16-HI},$Dst32RnUnprefixedHI */
18176 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18177 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x991f0000 }
18179 /* stnz.w${X} #${Imm-16-HI},$Dst32AnUnprefixedHI */
18182 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18183 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x919f0000 }
18185 /* stnz.w${X} #${Imm-16-HI},[$Dst32AnUnprefixed] */
18188 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18189 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x911f0000 }
18191 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18194 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18195 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x931f0000 }
18197 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
18200 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18201 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x939f0000 }
18203 /* stnz.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
18206 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18207 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93df0000 }
18209 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18212 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18213 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x951f0000 }
18215 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
18218 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18219 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x959f0000 }
18221 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-s16}[fb] */
18224 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18225 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95df0000 }
18227 /* stnz.w${X} #${Imm-32-HI},${Dsp-16-u16} */
18230 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
18231 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97df0000 }
18233 /* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18236 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18237 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x971f0000 }
18239 /* stnz.w${X} #${Imm-40-HI},${Dsp-16-u24} */
18242 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
18243 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x979f0000 }
18245 /* stnz.b${X} #${Imm-16-QI},$Dst32RnUnprefixedQI */
18248 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18249 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x981f00 }
18251 /* stnz.b${X} #${Imm-16-QI},$Dst32AnUnprefixedQI */
18254 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18255 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x909f00 }
18257 /* stnz.b${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18260 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18261 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x901f00 }
18263 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18266 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18267 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x921f0000 }
18269 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18272 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18273 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x929f0000 }
18275 /* stnz.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18278 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18279 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92df0000 }
18281 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18284 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18285 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x941f0000 }
18287 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18290 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18291 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x949f0000 }
18293 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18296 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18297 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94df0000 }
18299 /* stnz.b${X} #${Imm-32-QI},${Dsp-16-u16} */
18302 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18303 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96df0000 }
18305 /* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18308 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18309 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x961f0000 }
18311 /* stnz.b${X} #${Imm-40-QI},${Dsp-16-u24} */
18314 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18315 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x969f0000 }
18317 /* stnz${S} #${Imm-8-QI},r0l */
18320 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
18321 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xd400 }
18323 /* stnz${S} #${Imm-8-QI},r0h */
18326 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
18327 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xd300 }
18329 /* stnz${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
18332 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18333 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xd50000 }
18335 /* stnz${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
18338 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18339 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xd60000 }
18341 /* stnz${S} #${Imm-8-QI},${Dsp-16-u16} */
18344 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
18345 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xd7000000 }
18347 /* shlnc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
18350 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18351 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x882100 }
18353 /* shlnc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
18356 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18357 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x80a100 }
18359 /* shlnc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18362 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18363 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x802100 }
18365 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18368 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18369 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82210000 }
18371 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18374 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18375 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a10000 }
18377 /* shlnc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18380 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18381 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e10000 }
18383 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18386 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18387 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84210000 }
18389 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18392 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18393 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a10000 }
18395 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18398 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18399 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e10000 }
18401 /* shlnc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
18404 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18405 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e10000 }
18407 /* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18410 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18411 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86210000 }
18413 /* shlnc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
18416 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18417 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a10000 }
18419 /* shl.l r1h,$Dst32RnUnprefixedSI */
18422 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18423 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xc801 }
18425 /* shl.l r1h,$Dst32AnUnprefixedSI */
18428 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18429 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc081 }
18431 /* shl.l r1h,[$Dst32AnUnprefixed] */
18434 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18435 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xc001 }
18437 /* shl.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18440 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18441 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20100 }
18443 /* shl.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18446 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18447 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4010000 }
18449 /* shl.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18452 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18453 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6010000 }
18455 /* shl.l r1h,${Dsp-16-u8}[sb] */
18458 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18459 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28100 }
18461 /* shl.l r1h,${Dsp-16-u16}[sb] */
18464 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18465 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4810000 }
18467 /* shl.l r1h,${Dsp-16-s8}[fb] */
18470 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18471 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c100 }
18473 /* shl.l r1h,${Dsp-16-s16}[fb] */
18476 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18477 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c10000 }
18479 /* shl.l r1h,${Dsp-16-u16} */
18482 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18483 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c10000 }
18485 /* shl.l r1h,${Dsp-16-u24} */
18488 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18489 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6810000 }
18491 /* shl.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
18494 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
18495 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x982100 }
18497 /* shl.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
18500 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
18501 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x90a100 }
18503 /* shl.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
18506 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18507 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x902100 }
18509 /* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18512 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18513 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92210000 }
18515 /* shl.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
18518 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18519 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92a10000 }
18521 /* shl.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
18524 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18525 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92e10000 }
18527 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18530 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18531 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94210000 }
18533 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
18536 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18537 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94a10000 }
18539 /* shl.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
18542 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18543 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94e10000 }
18545 /* shl.l${X} #${Imm-32-QI},${Dsp-16-u16} */
18548 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
18549 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96e10000 }
18551 /* shl.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18554 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18555 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96210000 }
18557 /* shl.l${X} #${Imm-40-QI},${Dsp-16-u24} */
18560 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
18561 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96a10000 }
18563 /* shl.w r1h,$Dst32RnUnprefixedHI */
18566 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18567 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa93e }
18569 /* shl.w r1h,$Dst32AnUnprefixedHI */
18572 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18573 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1be }
18575 /* shl.w r1h,[$Dst32AnUnprefixed] */
18578 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18579 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa13e }
18581 /* shl.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18584 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18585 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa33e00 }
18587 /* shl.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18590 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18591 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa53e0000 }
18593 /* shl.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18596 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18597 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa73e0000 }
18599 /* shl.w r1h,${Dsp-16-u8}[sb] */
18602 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18603 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3be00 }
18605 /* shl.w r1h,${Dsp-16-u16}[sb] */
18608 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18609 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5be0000 }
18611 /* shl.w r1h,${Dsp-16-s8}[fb] */
18614 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18615 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3fe00 }
18617 /* shl.w r1h,${Dsp-16-s16}[fb] */
18620 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18621 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5fe0000 }
18623 /* shl.w r1h,${Dsp-16-u16} */
18626 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18627 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7fe0000 }
18629 /* shl.w r1h,${Dsp-16-u24} */
18632 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18633 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7be0000 }
18635 /* shl.b r1h,$Dst32RnUnprefixedQI */
18638 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18639 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa83e }
18641 /* shl.b r1h,$Dst32AnUnprefixedQI */
18644 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18645 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0be }
18647 /* shl.b r1h,[$Dst32AnUnprefixed] */
18650 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18651 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa03e }
18653 /* shl.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
18656 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18657 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa23e00 }
18659 /* shl.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
18662 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18663 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa43e0000 }
18665 /* shl.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
18668 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18669 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa63e0000 }
18671 /* shl.b r1h,${Dsp-16-u8}[sb] */
18674 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18675 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2be00 }
18677 /* shl.b r1h,${Dsp-16-u16}[sb] */
18680 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18681 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4be0000 }
18683 /* shl.b r1h,${Dsp-16-s8}[fb] */
18686 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18687 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2fe00 }
18689 /* shl.b r1h,${Dsp-16-s16}[fb] */
18692 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18693 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4fe0000 }
18695 /* shl.b r1h,${Dsp-16-u16} */
18698 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18699 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6fe0000 }
18701 /* shl.b r1h,${Dsp-16-u24} */
18704 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
18705 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6be0000 }
18707 /* shl.w r1h,$Dst16RnHI */
18710 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
18711 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x75e0 }
18713 /* shl.w r1h,$Dst16AnHI */
18716 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
18717 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x75e4 }
18719 /* shl.w r1h,[$Dst16An] */
18722 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
18723 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x75e6 }
18725 /* shl.w r1h,${Dsp-16-u8}[$Dst16An] */
18728 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18729 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x75e800 }
18731 /* shl.w r1h,${Dsp-16-u16}[$Dst16An] */
18734 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18735 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x75ec0000 }
18737 /* shl.w r1h,${Dsp-16-u8}[sb] */
18740 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18741 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x75ea00 }
18743 /* shl.w r1h,${Dsp-16-u16}[sb] */
18746 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18747 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x75ee0000 }
18749 /* shl.w r1h,${Dsp-16-s8}[fb] */
18752 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18753 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x75eb00 }
18755 /* shl.w r1h,${Dsp-16-u16} */
18758 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18759 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x75ef0000 }
18761 /* shl.b r1h,$Dst16RnQI */
18764 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
18765 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x74e0 }
18767 /* shl.b r1h,$Dst16AnQI */
18770 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
18771 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x74e4 }
18773 /* shl.b r1h,[$Dst16An] */
18776 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
18777 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x74e6 }
18779 /* shl.b r1h,${Dsp-16-u8}[$Dst16An] */
18782 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18783 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x74e800 }
18785 /* shl.b r1h,${Dsp-16-u16}[$Dst16An] */
18788 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18789 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x74ec0000 }
18791 /* shl.b r1h,${Dsp-16-u8}[sb] */
18794 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18795 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x74ea00 }
18797 /* shl.b r1h,${Dsp-16-u16}[sb] */
18800 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18801 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x74ee0000 }
18803 /* shl.b r1h,${Dsp-16-s8}[fb] */
18806 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18807 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x74eb00 }
18809 /* shl.b r1h,${Dsp-16-u16} */
18812 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
18813 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x74ef0000 }
18815 /* shl.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
18818 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
18819 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe900 }
18821 /* shl.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
18824 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
18825 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe180 }
18827 /* shl.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
18830 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18831 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe100 }
18833 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18836 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18837 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe30000 }
18839 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18842 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18843 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5000000 }
18845 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18848 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18849 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7000000 }
18851 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
18854 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18855 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe38000 }
18857 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
18860 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18861 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5800000 }
18863 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
18866 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18867 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3c000 }
18869 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
18872 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18873 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5c00000 }
18875 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
18878 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
18879 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7c00000 }
18881 /* shl.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
18884 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
18885 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7800000 }
18887 /* shl.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
18890 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
18891 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe800 }
18893 /* shl.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
18896 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
18897 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe080 }
18899 /* shl.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
18902 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18903 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe000 }
18905 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
18908 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18909 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe20000 }
18911 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
18914 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18915 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4000000 }
18917 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
18920 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
18921 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6000000 }
18923 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
18926 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18927 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe28000 }
18929 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
18932 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18933 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4800000 }
18935 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
18938 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
18939 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2c000 }
18941 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
18944 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
18945 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4c00000 }
18947 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
18950 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
18951 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6c00000 }
18953 /* shl.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
18956 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
18957 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6800000 }
18959 /* shl.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
18962 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
18963 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xe900 }
18965 /* shl.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
18968 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
18969 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xe904 }
18971 /* shl.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
18974 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
18975 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xe906 }
18977 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
18980 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
18981 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xe90800 }
18983 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
18986 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
18987 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xe90c0000 }
18989 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
18992 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
18993 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xe90a00 }
18995 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
18998 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
18999 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xe90e0000 }
19001 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19004 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19005 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xe90b00 }
19007 /* shl.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19010 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19011 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xe90f0000 }
19013 /* shl.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
19016 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
19017 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xe800 }
19019 /* shl.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
19022 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
19023 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xe804 }
19025 /* shl.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
19028 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19029 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xe806 }
19031 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19034 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19035 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xe80800 }
19037 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19040 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19041 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xe80c0000 }
19043 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19046 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19047 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xe80a00 }
19049 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19052 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19053 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xe80e0000 }
19055 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19058 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19059 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xe80b00 }
19061 /* shl.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19064 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19065 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xe80f0000 }
19067 /* shanc.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
19070 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19071 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xc82100 }
19073 /* shanc.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
19076 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19077 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc0a100 }
19079 /* shanc.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
19082 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19083 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xc02100 }
19085 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19088 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19089 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc2210000 }
19091 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
19094 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19095 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc2a10000 }
19097 /* shanc.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
19100 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19101 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2e10000 }
19103 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19106 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19107 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4210000 }
19109 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
19112 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19113 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4a10000 }
19115 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
19118 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19119 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4e10000 }
19121 /* shanc.l${X} #${Imm-32-QI},${Dsp-16-u16} */
19124 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
19125 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6e10000 }
19127 /* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19130 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19131 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6210000 }
19133 /* shanc.l${X} #${Imm-40-QI},${Dsp-16-u24} */
19136 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
19137 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6a10000 }
19139 /* sha.l r1h,$Dst32RnUnprefixedSI */
19142 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19143 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xc811 }
19145 /* sha.l r1h,$Dst32AnUnprefixedSI */
19148 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19149 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xc091 }
19151 /* sha.l r1h,[$Dst32AnUnprefixed] */
19154 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19155 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xc011 }
19157 /* sha.l r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19160 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19161 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc21100 }
19163 /* sha.l r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19166 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19167 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4110000 }
19169 /* sha.l r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19172 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19173 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6110000 }
19175 /* sha.l r1h,${Dsp-16-u8}[sb] */
19178 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19179 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc29100 }
19181 /* sha.l r1h,${Dsp-16-u16}[sb] */
19184 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19185 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4910000 }
19187 /* sha.l r1h,${Dsp-16-s8}[fb] */
19190 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19191 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2d100 }
19193 /* sha.l r1h,${Dsp-16-s16}[fb] */
19196 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19197 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4d10000 }
19199 /* sha.l r1h,${Dsp-16-u16} */
19202 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19203 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6d10000 }
19205 /* sha.l r1h,${Dsp-16-u24} */
19208 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19209 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6910000 }
19211 /* sha.l${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
19214 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
19215 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa82100 }
19217 /* sha.l${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
19220 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
19221 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa0a100 }
19223 /* sha.l${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
19226 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19227 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa02100 }
19229 /* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19232 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19233 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2210000 }
19235 /* sha.l${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
19238 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19239 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2a10000 }
19241 /* sha.l${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
19244 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19245 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2e10000 }
19247 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19250 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19251 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4210000 }
19253 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
19256 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19257 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4a10000 }
19259 /* sha.l${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
19262 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19263 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4e10000 }
19265 /* sha.l${X} #${Imm-32-QI},${Dsp-16-u16} */
19268 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
19269 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6e10000 }
19271 /* sha.l${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19274 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19275 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6210000 }
19277 /* sha.l${X} #${Imm-40-QI},${Dsp-16-u24} */
19280 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
19281 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6a10000 }
19283 /* sha.w r1h,$Dst32RnUnprefixedHI */
19286 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
19287 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb93e }
19289 /* sha.w r1h,$Dst32AnUnprefixedHI */
19292 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
19293 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1be }
19295 /* sha.w r1h,[$Dst32AnUnprefixed] */
19298 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19299 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb13e }
19301 /* sha.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19304 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19305 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb33e00 }
19307 /* sha.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19310 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19311 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb53e0000 }
19313 /* sha.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19316 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19317 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb73e0000 }
19319 /* sha.w r1h,${Dsp-16-u8}[sb] */
19322 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19323 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3be00 }
19325 /* sha.w r1h,${Dsp-16-u16}[sb] */
19328 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19329 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5be0000 }
19331 /* sha.w r1h,${Dsp-16-s8}[fb] */
19334 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19335 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3fe00 }
19337 /* sha.w r1h,${Dsp-16-s16}[fb] */
19340 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19341 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5fe0000 }
19343 /* sha.w r1h,${Dsp-16-u16} */
19346 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19347 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7fe0000 }
19349 /* sha.w r1h,${Dsp-16-u24} */
19352 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19353 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7be0000 }
19355 /* sha.b r1h,$Dst32RnUnprefixedQI */
19358 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
19359 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb83e }
19361 /* sha.b r1h,$Dst32AnUnprefixedQI */
19364 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
19365 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0be }
19367 /* sha.b r1h,[$Dst32AnUnprefixed] */
19370 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19371 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb03e }
19373 /* sha.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
19376 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19377 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb23e00 }
19379 /* sha.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
19382 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19383 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb43e0000 }
19385 /* sha.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
19388 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19389 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb63e0000 }
19391 /* sha.b r1h,${Dsp-16-u8}[sb] */
19394 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19395 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2be00 }
19397 /* sha.b r1h,${Dsp-16-u16}[sb] */
19400 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19401 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4be0000 }
19403 /* sha.b r1h,${Dsp-16-s8}[fb] */
19406 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19407 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2fe00 }
19409 /* sha.b r1h,${Dsp-16-s16}[fb] */
19412 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19413 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4fe0000 }
19415 /* sha.b r1h,${Dsp-16-u16} */
19418 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19419 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6fe0000 }
19421 /* sha.b r1h,${Dsp-16-u24} */
19424 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
19425 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6be0000 }
19427 /* sha.w r1h,$Dst16RnHI */
19430 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
19431 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x75f0 }
19433 /* sha.w r1h,$Dst16AnHI */
19436 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
19437 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x75f4 }
19439 /* sha.w r1h,[$Dst16An] */
19442 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
19443 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x75f6 }
19445 /* sha.w r1h,${Dsp-16-u8}[$Dst16An] */
19448 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19449 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x75f800 }
19451 /* sha.w r1h,${Dsp-16-u16}[$Dst16An] */
19454 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19455 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x75fc0000 }
19457 /* sha.w r1h,${Dsp-16-u8}[sb] */
19460 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19461 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x75fa00 }
19463 /* sha.w r1h,${Dsp-16-u16}[sb] */
19466 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19467 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x75fe0000 }
19469 /* sha.w r1h,${Dsp-16-s8}[fb] */
19472 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19473 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x75fb00 }
19475 /* sha.w r1h,${Dsp-16-u16} */
19478 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19479 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x75ff0000 }
19481 /* sha.b r1h,$Dst16RnQI */
19484 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
19485 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x74f0 }
19487 /* sha.b r1h,$Dst16AnQI */
19490 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
19491 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x74f4 }
19493 /* sha.b r1h,[$Dst16An] */
19496 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
19497 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x74f6 }
19499 /* sha.b r1h,${Dsp-16-u8}[$Dst16An] */
19502 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19503 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x74f800 }
19505 /* sha.b r1h,${Dsp-16-u16}[$Dst16An] */
19508 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19509 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x74fc0000 }
19511 /* sha.b r1h,${Dsp-16-u8}[sb] */
19514 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19515 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x74fa00 }
19517 /* sha.b r1h,${Dsp-16-u16}[sb] */
19520 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19521 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x74fe0000 }
19523 /* sha.b r1h,${Dsp-16-s8}[fb] */
19526 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19527 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x74fb00 }
19529 /* sha.b r1h,${Dsp-16-u16} */
19532 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
19533 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x74ff0000 }
19535 /* sha.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
19538 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
19539 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf900 }
19541 /* sha.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
19544 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
19545 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf180 }
19547 /* sha.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
19550 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19551 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf100 }
19553 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19556 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19557 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf30000 }
19559 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19562 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19563 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5000000 }
19565 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19568 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19569 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7000000 }
19571 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
19574 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19575 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf38000 }
19577 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
19580 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19581 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5800000 }
19583 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
19586 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19587 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3c000 }
19589 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
19592 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19593 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5c00000 }
19595 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
19598 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
19599 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7c00000 }
19601 /* sha.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
19604 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
19605 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7800000 }
19607 /* sha.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
19610 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
19611 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf800 }
19613 /* sha.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
19616 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
19617 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf080 }
19619 /* sha.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
19622 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19623 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf000 }
19625 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
19628 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19629 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf20000 }
19631 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
19634 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19635 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4000000 }
19637 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
19640 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19641 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6000000 }
19643 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
19646 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19647 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf28000 }
19649 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
19652 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19653 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4800000 }
19655 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
19658 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19659 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2c000 }
19661 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
19664 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19665 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4c00000 }
19667 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
19670 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
19671 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6c00000 }
19673 /* sha.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
19676 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
19677 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6800000 }
19679 /* sha.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
19682 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
19683 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xf100 }
19685 /* sha.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
19688 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
19689 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xf104 }
19691 /* sha.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
19694 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19695 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xf106 }
19697 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19700 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19701 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xf10800 }
19703 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19706 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19707 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xf10c0000 }
19709 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19712 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19713 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xf10a00 }
19715 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19718 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19719 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xf10e0000 }
19721 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19724 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19725 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xf10b00 }
19727 /* sha.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19730 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19731 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xf10f0000 }
19733 /* sha.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
19736 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
19737 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xf000 }
19739 /* sha.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
19742 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
19743 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xf004 }
19745 /* sha.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
19748 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
19749 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xf006 }
19751 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
19754 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
19755 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xf00800 }
19757 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
19760 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
19761 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xf00c0000 }
19763 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
19766 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19767 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xf00a00 }
19769 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
19772 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19773 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xf00e0000 }
19775 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
19778 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19779 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xf00b00 }
19781 /* sha.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
19784 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
19785 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xf00f0000 }
19787 /* sc${sccond32} $Dst32RnUnprefixedHI */
19790 { { MNEM
, OP (SCCOND32
), ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
19791 & ifmt_sccnd_dst32_Rn_direct_Unprefixed_HI
, { 0xd930 }
19793 /* sc${sccond32} $Dst32AnUnprefixedHI */
19796 { { MNEM
, OP (SCCOND32
), ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
19797 & ifmt_sccnd_dst32_An_direct_Unprefixed_HI
, { 0xd1b0 }
19799 /* sc${sccond32} [$Dst32AnUnprefixed] */
19802 { { MNEM
, OP (SCCOND32
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19803 & ifmt_sccnd_dst32_An_indirect_Unprefixed_HI
, { 0xd130 }
19805 /* sc${sccond32} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
19808 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19809 & ifmt_sccnd_dst32_16_8_An_relative_Unprefixed_HI
, { 0xd33000 }
19811 /* sc${sccond32} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
19814 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19815 & ifmt_sccnd_dst32_16_16_An_relative_Unprefixed_HI
, { 0xd5300000 }
19817 /* sc${sccond32} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
19820 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
19821 & ifmt_sccnd_dst32_16_24_An_relative_Unprefixed_HI
, { 0xd7300000 }
19823 /* sc${sccond32} ${Dsp-16-u8}[sb] */
19826 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
19827 & ifmt_sccnd_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xd3b000 }
19829 /* sc${sccond32} ${Dsp-16-u16}[sb] */
19832 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
19833 & ifmt_sccnd_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xd5b00000 }
19835 /* sc${sccond32} ${Dsp-16-s8}[fb] */
19838 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
19839 & ifmt_sccnd_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xd3f000 }
19841 /* sc${sccond32} ${Dsp-16-s16}[fb] */
19844 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
19845 & ifmt_sccnd_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xd5f00000 }
19847 /* sc${sccond32} ${Dsp-16-u16} */
19850 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U16
), 0 } },
19851 & ifmt_sccnd_dst32_16_16_absolute_Unprefixed_HI
, { 0xd7f00000 }
19853 /* sc${sccond32} ${Dsp-16-u24} */
19856 { { MNEM
, OP (SCCOND32
), ' ', OP (DSP_16_U24
), 0 } },
19857 & ifmt_sccnd_dst32_16_24_absolute_Unprefixed_HI
, { 0xd7b00000 }
19859 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
19862 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
19863 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf3100000 }
19865 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
19868 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19869 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3900000 }
19871 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
19874 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19875 & ifmt_sbjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3d00000 }
19877 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
19880 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
19881 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5100000 }
19883 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
19886 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19887 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5900000 }
19889 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
19892 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19893 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5d00000 }
19895 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
19898 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
19899 & ifmt_sbjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7d00000 }
19901 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
19904 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
19905 & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7100000 }
19907 /* sbjnz.w #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
19910 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
19911 & ifmt_sbjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7900000 }
19913 /* sbjnz.w #${Imm-12-s4n},$Dst32RnUnprefixedHI,${Lab-16-8} */
19916 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32RNUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
19917 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf91000 }
19919 /* sbjnz.w #${Imm-12-s4n},$Dst32AnUnprefixedHI,${Lab-16-8} */
19922 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32ANUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
19923 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf19000 }
19925 /* sbjnz.w #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
19928 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
19929 & ifmt_sbjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf11000 }
19931 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
19934 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
19935 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf2100000 }
19937 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
19940 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19941 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2900000 }
19943 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
19946 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
19947 & ifmt_sbjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2d00000 }
19949 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
19952 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
19953 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4100000 }
19955 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
19958 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19959 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4900000 }
19961 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-s16}[fb],${Lab-32-8} */
19964 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
19965 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4d00000 }
19967 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u16},${Lab-32-8} */
19970 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
19971 & ifmt_sbjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6d00000 }
19973 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
19976 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
19977 & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6100000 }
19979 /* sbjnz.b #${Imm-12-s4n},${Dsp-16-u24},${Lab-40-8} */
19982 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
19983 & ifmt_sbjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6900000 }
19985 /* sbjnz.b #${Imm-12-s4n},$Dst32RnUnprefixedQI,${Lab-16-8} */
19988 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32RNUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
19989 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf81000 }
19991 /* sbjnz.b #${Imm-12-s4n},$Dst32AnUnprefixedQI,${Lab-16-8} */
19994 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', OP (DST32ANUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
19995 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf09000 }
19997 /* sbjnz.b #${Imm-12-s4n},[$Dst32AnUnprefixed],${Lab-16-8} */
20000 { { MNEM
, ' ', '#', OP (IMM_12_S4N
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
20001 & ifmt_sbjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf01000 }
20003 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
20006 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
20007 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI
, { 0xf9080000 }
20009 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
20012 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20013 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI
, { 0xf90a0000 }
20015 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
20018 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20019 & ifmt_sbjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI
, { 0xf90b0000 }
20021 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
20024 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
20025 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI
, { 0xf90c0000 }
20027 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
20030 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
20031 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI
, { 0xf90e0000 }
20033 /* sbjnz.w #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
20036 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
20037 & ifmt_sbjnz16_w_imm4_16_16_dst16_16_16_absolute_HI
, { 0xf90f0000 }
20039 /* sbjnz.w #${Imm-8-s4n},$Dst16RnHI,${Lab-16-8} */
20042 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16RNHI
), ',', OP (LAB_16_8
), 0 } },
20043 & ifmt_sbjnz16_w_imm4_basic_dst16_Rn_direct_HI
, { 0xf90000 }
20045 /* sbjnz.w #${Imm-8-s4n},$Dst16AnHI,${Lab-16-8} */
20048 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16ANHI
), ',', OP (LAB_16_8
), 0 } },
20049 & ifmt_sbjnz16_w_imm4_basic_dst16_An_direct_HI
, { 0xf90400 }
20051 /* sbjnz.w #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
20054 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
20055 & ifmt_sbjnz16_w_imm4_basic_dst16_An_indirect_HI
, { 0xf90600 }
20057 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
20060 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
20061 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI
, { 0xf8080000 }
20063 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u8}[sb],${Lab-24-8} */
20066 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20067 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI
, { 0xf80a0000 }
20069 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-s8}[fb],${Lab-24-8} */
20072 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
20073 & ifmt_sbjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI
, { 0xf80b0000 }
20075 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
20078 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
20079 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI
, { 0xf80c0000 }
20081 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16}[sb],${Lab-32-8} */
20084 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
20085 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI
, { 0xf80e0000 }
20087 /* sbjnz.b #${Imm-8-s4n},${Dsp-16-u16},${Lab-32-8} */
20090 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
20091 & ifmt_sbjnz16_b_imm4_16_16_dst16_16_16_absolute_QI
, { 0xf80f0000 }
20093 /* sbjnz.b #${Imm-8-s4n},$Dst16RnQI,${Lab-16-8} */
20096 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16RNQI
), ',', OP (LAB_16_8
), 0 } },
20097 & ifmt_sbjnz16_b_imm4_basic_dst16_Rn_direct_QI
, { 0xf80000 }
20099 /* sbjnz.b #${Imm-8-s4n},$Dst16AnQI,${Lab-16-8} */
20102 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', OP (DST16ANQI
), ',', OP (LAB_16_8
), 0 } },
20103 & ifmt_sbjnz16_b_imm4_basic_dst16_An_direct_QI
, { 0xf80400 }
20105 /* sbjnz.b #${Imm-8-s4n},[$Dst16An],${Lab-16-8} */
20108 { { MNEM
, ' ', '#', OP (IMM_8_S4N
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
20109 & ifmt_sbjnz16_b_imm4_basic_dst16_An_indirect_QI
, { 0xf80600 }
20111 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20114 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20115 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990600 }
20117 /* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
20120 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20121 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992600 }
20123 /* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
20126 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20127 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993600 }
20129 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20133 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918600 }
20135 /* sbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
20138 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20139 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a600 }
20141 /* sbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
20144 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20145 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b600 }
20147 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20151 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910600 }
20153 /* sbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
20156 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20157 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912600 }
20159 /* sbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
20162 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20163 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913600 }
20165 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
20168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20169 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930600 }
20171 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
20174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20175 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932600 }
20177 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
20180 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20181 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933600 }
20183 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
20186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20187 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950600 }
20189 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
20192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20193 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952600 }
20195 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
20198 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20199 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953600 }
20201 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
20204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20205 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970600 }
20207 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
20210 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20211 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972600 }
20213 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
20216 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20217 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973600 }
20219 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
20222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20223 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938600 }
20225 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
20228 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20229 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a600 }
20231 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
20234 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
20235 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b600 }
20237 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
20240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20241 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958600 }
20243 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
20246 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20247 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a600 }
20249 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
20252 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
20253 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b600 }
20255 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
20258 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20259 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c600 }
20261 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
20264 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20265 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e600 }
20267 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
20270 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
20271 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f600 }
20273 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
20276 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20277 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c600 }
20279 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
20282 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20283 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e600 }
20285 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
20288 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
20289 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f600 }
20291 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
20294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
20295 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c600 }
20297 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
20300 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
20301 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e600 }
20303 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
20306 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
20307 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f600 }
20309 /* sbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
20312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
20313 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978600 }
20315 /* sbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
20318 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
20319 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a600 }
20321 /* sbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
20324 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
20325 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b600 }
20327 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20331 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90600 }
20333 /* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
20336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20337 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92600 }
20339 /* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
20342 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20343 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93600 }
20345 /* sbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
20348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20349 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93600 }
20351 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20354 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20355 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18600 }
20357 /* sbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
20360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20361 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a600 }
20363 /* sbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
20366 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20367 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b600 }
20369 /* sbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
20372 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20373 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b600 }
20375 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20379 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10600 }
20381 /* sbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
20384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20385 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12600 }
20387 /* sbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
20390 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20391 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13600 }
20393 /* sbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
20396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20397 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13600 }
20399 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
20402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20403 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30600 }
20405 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
20408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20409 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32600 }
20411 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
20414 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20415 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33600 }
20417 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
20420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20421 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33600 }
20423 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
20426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20427 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50600 }
20429 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
20432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20433 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52600 }
20435 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
20438 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20439 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53600 }
20441 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
20444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20445 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53600 }
20447 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
20450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20451 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70600 }
20453 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
20456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20457 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72600 }
20459 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
20462 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20463 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73600 }
20465 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
20468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20469 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73600 }
20471 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
20474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20475 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38600 }
20477 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
20480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20481 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a600 }
20483 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
20486 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20487 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b600 }
20489 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
20492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
20493 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b600 }
20495 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
20498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20499 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58600 }
20501 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
20504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20505 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a600 }
20507 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
20510 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20511 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b600 }
20513 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
20516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
20517 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b600 }
20519 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
20522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20523 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c600 }
20525 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
20528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20529 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e600 }
20531 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
20534 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20535 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f600 }
20537 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
20540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
20541 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f600 }
20543 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
20546 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20547 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c600 }
20549 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
20552 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20553 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e600 }
20555 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
20558 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20559 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f600 }
20561 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
20564 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
20565 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f600 }
20567 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
20570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
20571 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c600 }
20573 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
20576 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
20577 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e600 }
20579 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
20582 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
20583 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f600 }
20585 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
20588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
20589 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f600 }
20591 /* sbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
20594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
20595 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78600 }
20597 /* sbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
20600 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
20601 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a600 }
20603 /* sbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
20606 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
20607 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b600 }
20609 /* sbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
20612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
20613 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b600 }
20615 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
20618 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20619 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90600 }
20621 /* sbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
20624 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20625 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92600 }
20627 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
20630 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20631 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18600 }
20633 /* sbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
20636 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20637 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a600 }
20639 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
20642 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20643 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10600 }
20645 /* sbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
20648 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20649 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12600 }
20651 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
20654 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20655 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30600 }
20657 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
20660 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20661 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32600 }
20663 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
20666 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20667 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50600 }
20669 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
20672 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20673 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52600 }
20675 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
20678 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20679 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70600 }
20681 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
20684 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20685 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72600 }
20687 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
20690 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
20691 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38600 }
20693 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
20696 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
20697 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a600 }
20699 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
20702 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
20703 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58600 }
20705 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
20708 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
20709 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a600 }
20711 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
20714 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
20715 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c600 }
20717 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
20720 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
20721 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e600 }
20723 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
20726 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
20727 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c600 }
20729 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
20732 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
20733 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e600 }
20735 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
20738 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
20739 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c600 }
20741 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
20744 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
20745 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e600 }
20747 /* sbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
20750 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
20751 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78600 }
20753 /* sbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
20756 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
20757 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a600 }
20759 /* sbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
20762 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20763 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c906 }
20765 /* sbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
20768 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
20769 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18926 }
20771 /* sbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
20774 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
20775 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18906 }
20777 /* sbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
20780 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20781 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c186 }
20783 /* sbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
20786 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
20787 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a6 }
20789 /* sbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
20792 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
20793 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18186 }
20795 /* sbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
20798 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20799 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c106 }
20801 /* sbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
20804 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20805 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18126 }
20807 /* sbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
20810 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
20811 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18106 }
20813 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
20816 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20817 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30600 }
20819 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
20822 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20823 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832600 }
20825 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
20828 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20829 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830600 }
20831 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
20834 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20835 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50600 }
20837 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
20840 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20841 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852600 }
20843 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
20846 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20847 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850600 }
20849 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
20852 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20853 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70600 }
20855 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
20858 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20859 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872600 }
20861 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
20864 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
20865 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870600 }
20867 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
20870 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20871 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38600 }
20873 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
20876 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20877 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a600 }
20879 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
20882 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
20883 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838600 }
20885 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
20888 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20889 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58600 }
20891 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
20894 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20895 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a600 }
20897 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
20900 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
20901 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858600 }
20903 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
20906 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20907 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c600 }
20909 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
20912 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20913 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e600 }
20915 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
20918 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
20919 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c600 }
20921 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
20924 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20925 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c600 }
20927 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
20930 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20931 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e600 }
20933 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
20936 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
20937 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c600 }
20939 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
20942 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
20943 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c600 }
20945 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
20948 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
20949 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e600 }
20951 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
20954 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
20955 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c600 }
20957 /* sbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
20960 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
20961 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78600 }
20963 /* sbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
20966 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
20967 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a600 }
20969 /* sbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
20972 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
20973 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878600 }
20975 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
20978 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20979 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980600 }
20981 /* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
20984 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20985 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982600 }
20987 /* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
20990 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
20991 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983600 }
20993 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
20996 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
20997 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908600 }
20999 /* sbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
21002 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21003 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a600 }
21005 /* sbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
21008 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21009 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b600 }
21011 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21015 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900600 }
21017 /* sbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
21020 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21021 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902600 }
21023 /* sbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
21026 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21027 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903600 }
21029 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
21032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21033 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920600 }
21035 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
21038 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21039 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922600 }
21041 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
21044 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21045 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923600 }
21047 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
21050 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21051 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940600 }
21053 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
21056 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21057 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942600 }
21059 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
21062 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21063 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943600 }
21065 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
21068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21069 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960600 }
21071 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
21074 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21075 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962600 }
21077 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
21080 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21081 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963600 }
21083 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
21086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21087 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928600 }
21089 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
21092 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21093 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a600 }
21095 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
21098 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
21099 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b600 }
21101 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
21104 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21105 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948600 }
21107 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
21110 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21111 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a600 }
21113 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
21116 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
21117 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b600 }
21119 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
21122 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21123 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c600 }
21125 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
21128 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21129 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e600 }
21131 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
21134 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
21135 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f600 }
21137 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
21140 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21141 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c600 }
21143 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
21146 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21147 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e600 }
21149 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
21152 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
21153 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f600 }
21155 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
21158 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
21159 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c600 }
21161 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
21164 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
21165 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e600 }
21167 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
21170 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
21171 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f600 }
21173 /* sbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
21176 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
21177 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968600 }
21179 /* sbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
21182 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
21183 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a600 }
21185 /* sbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
21188 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
21189 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b600 }
21191 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
21194 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21195 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80600 }
21197 /* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
21200 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21201 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82600 }
21203 /* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
21206 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21207 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83600 }
21209 /* sbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
21212 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21213 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83600 }
21215 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
21218 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21219 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08600 }
21221 /* sbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
21224 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21225 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a600 }
21227 /* sbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
21230 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21231 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b600 }
21233 /* sbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
21236 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21237 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b600 }
21239 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21242 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21243 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00600 }
21245 /* sbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
21248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21249 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02600 }
21251 /* sbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
21254 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21255 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03600 }
21257 /* sbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
21260 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21261 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03600 }
21263 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
21266 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21267 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20600 }
21269 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
21272 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21273 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22600 }
21275 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
21278 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21279 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23600 }
21281 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
21284 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21285 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23600 }
21287 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
21290 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21291 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40600 }
21293 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
21296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21297 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42600 }
21299 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
21302 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21303 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43600 }
21305 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
21308 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21309 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43600 }
21311 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
21314 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21315 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60600 }
21317 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
21320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21321 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62600 }
21323 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
21326 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21327 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63600 }
21329 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
21332 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21333 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63600 }
21335 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
21338 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21339 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28600 }
21341 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
21344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21345 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a600 }
21347 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
21350 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21351 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b600 }
21353 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
21356 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
21357 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b600 }
21359 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
21362 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21363 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48600 }
21365 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
21368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21369 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a600 }
21371 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
21374 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21375 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b600 }
21377 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
21380 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
21381 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b600 }
21383 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
21386 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21387 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c600 }
21389 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
21392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21393 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e600 }
21395 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
21398 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21399 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f600 }
21401 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
21404 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
21405 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f600 }
21407 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
21410 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21411 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c600 }
21413 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
21416 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21417 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e600 }
21419 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
21422 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21423 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f600 }
21425 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
21428 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
21429 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f600 }
21431 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
21434 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
21435 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c600 }
21437 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
21440 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
21441 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e600 }
21443 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
21446 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
21447 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f600 }
21449 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
21452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
21453 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f600 }
21455 /* sbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
21458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
21459 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68600 }
21461 /* sbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
21464 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
21465 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a600 }
21467 /* sbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
21470 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
21471 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b600 }
21473 /* sbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
21476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
21477 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b600 }
21479 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
21482 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21483 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80600 }
21485 /* sbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
21488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21489 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82600 }
21491 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
21494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21495 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08600 }
21497 /* sbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
21500 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21501 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a600 }
21503 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
21506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21507 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00600 }
21509 /* sbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
21512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21513 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02600 }
21515 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
21518 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21519 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20600 }
21521 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
21524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21525 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22600 }
21527 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
21530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21531 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40600 }
21533 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
21536 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21537 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42600 }
21539 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
21542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21543 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60600 }
21545 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
21548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21549 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62600 }
21551 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
21554 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
21555 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28600 }
21557 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
21560 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
21561 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a600 }
21563 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
21566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
21567 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48600 }
21569 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
21572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
21573 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a600 }
21575 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
21578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
21579 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c600 }
21581 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
21584 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
21585 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e600 }
21587 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
21590 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
21591 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c600 }
21593 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
21596 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
21597 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e600 }
21599 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
21602 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
21603 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c600 }
21605 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
21608 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
21609 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e600 }
21611 /* sbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
21614 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
21615 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68600 }
21617 /* sbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
21620 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
21621 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a600 }
21623 /* sbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
21626 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21627 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c806 }
21629 /* sbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
21632 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
21633 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18826 }
21635 /* sbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
21638 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
21639 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18806 }
21641 /* sbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
21644 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21645 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c086 }
21647 /* sbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
21650 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
21651 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a6 }
21653 /* sbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
21656 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
21657 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18086 }
21659 /* sbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
21662 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21663 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c006 }
21665 /* sbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
21668 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21669 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18026 }
21671 /* sbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
21674 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
21675 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18006 }
21677 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
21680 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21681 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20600 }
21683 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
21686 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21687 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822600 }
21689 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
21692 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21693 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820600 }
21695 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
21698 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21699 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40600 }
21701 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
21704 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21705 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842600 }
21707 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
21710 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21711 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840600 }
21713 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
21716 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21717 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60600 }
21719 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
21722 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21723 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862600 }
21725 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
21728 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
21729 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860600 }
21731 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
21734 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21735 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28600 }
21737 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
21740 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21741 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a600 }
21743 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
21746 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21747 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828600 }
21749 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
21752 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21753 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48600 }
21755 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
21758 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21759 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a600 }
21761 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
21764 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21765 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848600 }
21767 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
21770 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21771 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c600 }
21773 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
21776 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21777 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e600 }
21779 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
21782 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21783 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c600 }
21785 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
21788 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21789 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c600 }
21791 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
21794 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21795 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e600 }
21797 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
21800 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
21801 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c600 }
21803 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
21806 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
21807 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c600 }
21809 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
21812 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
21813 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e600 }
21815 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
21818 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
21819 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c600 }
21821 /* sbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
21824 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
21825 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68600 }
21827 /* sbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
21830 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
21831 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a600 }
21833 /* sbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
21836 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
21837 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868600 }
21839 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
21842 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
21843 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xb98000 }
21845 /* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
21848 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
21849 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb9a000 }
21851 /* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
21854 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
21855 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xb9b000 }
21857 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
21860 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
21861 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xb98400 }
21863 /* sbb.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
21866 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
21867 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xb9a400 }
21869 /* sbb.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
21872 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
21873 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xb9b400 }
21875 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
21878 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
21879 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xb98600 }
21881 /* sbb.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
21884 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
21885 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xb9a600 }
21887 /* sbb.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
21890 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
21891 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xb9b600 }
21893 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
21896 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21897 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9880000 }
21899 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
21902 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21903 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9a80000 }
21905 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
21908 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
21909 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb9b80000 }
21911 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
21914 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21915 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xb98c0000 }
21917 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
21920 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21921 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb9ac0000 }
21923 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
21926 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
21927 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb9bc0000 }
21929 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
21932 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21933 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb98a0000 }
21935 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
21938 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21939 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb9aa0000 }
21941 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
21944 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
21945 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb9ba0000 }
21947 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
21950 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21951 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb98e0000 }
21953 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
21956 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21957 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb9ae0000 }
21959 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
21962 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
21963 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb9be0000 }
21965 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
21968 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21969 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb98b0000 }
21971 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
21974 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21975 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb9ab0000 }
21977 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
21980 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
21981 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb9bb0000 }
21983 /* sbb.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
21986 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
21987 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xb98f0000 }
21989 /* sbb.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
21992 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
21993 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xb9af0000 }
21995 /* sbb.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
21998 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
21999 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xb9bf0000 }
22001 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
22004 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
22005 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xb9c00000 }
22007 /* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
22010 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
22011 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb9e00000 }
22013 /* sbb.w${X} ${Dsp-16-u16},$Dst16RnHI */
22016 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
22017 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xb9f00000 }
22019 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
22022 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
22023 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xb9c40000 }
22025 /* sbb.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
22028 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
22029 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xb9e40000 }
22031 /* sbb.w${X} ${Dsp-16-u16},$Dst16AnHI */
22034 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
22035 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xb9f40000 }
22037 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
22040 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22041 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xb9c60000 }
22043 /* sbb.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
22046 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22047 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xb9e60000 }
22049 /* sbb.w${X} ${Dsp-16-u16},[$Dst16An] */
22052 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
22053 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xb9f60000 }
22055 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
22058 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22059 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xb9c80000 }
22061 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
22064 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22065 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xb9e80000 }
22067 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
22070 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22071 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xb9f80000 }
22073 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
22076 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22077 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xb9cc0000 }
22079 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
22082 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22083 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xb9ec0000 }
22085 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
22088 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22089 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xb9fc0000 }
22091 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
22094 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22095 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb9ca0000 }
22097 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
22100 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22101 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb9ea0000 }
22103 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
22106 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22107 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xb9fa0000 }
22109 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
22112 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22113 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb9ce0000 }
22115 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
22118 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22119 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb9ee0000 }
22121 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
22124 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22125 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xb9fe0000 }
22127 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
22130 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22131 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb9cb0000 }
22133 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
22136 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22137 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb9eb0000 }
22139 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
22142 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22143 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xb9fb0000 }
22145 /* sbb.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
22148 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
22149 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xb9cf0000 }
22151 /* sbb.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
22154 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
22155 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xb9ef0000 }
22157 /* sbb.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
22160 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
22161 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xb9ff0000 }
22163 /* sbb.w${X} $Src16RnHI,$Dst16RnHI */
22166 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
22167 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xb900 }
22169 /* sbb.w${X} $Src16AnHI,$Dst16RnHI */
22172 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
22173 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xb940 }
22175 /* sbb.w${X} [$Src16An],$Dst16RnHI */
22178 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
22179 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xb960 }
22181 /* sbb.w${X} $Src16RnHI,$Dst16AnHI */
22184 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
22185 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xb904 }
22187 /* sbb.w${X} $Src16AnHI,$Dst16AnHI */
22190 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
22191 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xb944 }
22193 /* sbb.w${X} [$Src16An],$Dst16AnHI */
22196 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
22197 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xb964 }
22199 /* sbb.w${X} $Src16RnHI,[$Dst16An] */
22202 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
22203 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xb906 }
22205 /* sbb.w${X} $Src16AnHI,[$Dst16An] */
22208 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
22209 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xb946 }
22211 /* sbb.w${X} [$Src16An],[$Dst16An] */
22214 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22215 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xb966 }
22217 /* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
22220 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22221 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xb90800 }
22223 /* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
22226 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22227 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xb94800 }
22229 /* sbb.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
22232 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22233 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xb96800 }
22235 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
22238 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22239 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xb90c0000 }
22241 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
22244 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22245 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xb94c0000 }
22247 /* sbb.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
22250 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22251 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xb96c0000 }
22253 /* sbb.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
22256 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22257 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb90a00 }
22259 /* sbb.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
22262 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22263 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb94a00 }
22265 /* sbb.w${X} [$Src16An],${Dsp-16-u8}[sb] */
22268 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22269 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xb96a00 }
22271 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
22274 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22275 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb90e0000 }
22277 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
22280 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22281 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb94e0000 }
22283 /* sbb.w${X} [$Src16An],${Dsp-16-u16}[sb] */
22286 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22287 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xb96e0000 }
22289 /* sbb.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
22292 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22293 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb90b00 }
22295 /* sbb.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
22298 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22299 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb94b00 }
22301 /* sbb.w${X} [$Src16An],${Dsp-16-s8}[fb] */
22304 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22305 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xb96b00 }
22307 /* sbb.w${X} $Src16RnHI,${Dsp-16-u16} */
22310 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
22311 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xb90f0000 }
22313 /* sbb.w${X} $Src16AnHI,${Dsp-16-u16} */
22316 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
22317 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xb94f0000 }
22319 /* sbb.w${X} [$Src16An],${Dsp-16-u16} */
22322 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
22323 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xb96f0000 }
22325 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
22328 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22329 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xb88000 }
22331 /* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
22334 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22335 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb8a000 }
22337 /* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
22340 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22341 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xb8b000 }
22343 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
22346 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22347 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xb88400 }
22349 /* sbb.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
22352 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22353 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xb8a400 }
22355 /* sbb.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
22358 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22359 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xb8b400 }
22361 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
22364 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22365 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xb88600 }
22367 /* sbb.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
22370 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22371 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xb8a600 }
22373 /* sbb.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
22376 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22377 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xb8b600 }
22379 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
22382 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22383 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8880000 }
22385 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
22388 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22389 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8a80000 }
22391 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
22394 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
22395 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb8b80000 }
22397 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
22400 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22401 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xb88c0000 }
22403 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
22406 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22407 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb8ac0000 }
22409 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
22412 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
22413 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb8bc0000 }
22415 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
22418 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22419 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb88a0000 }
22421 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
22424 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22425 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb8aa0000 }
22427 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
22430 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22431 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb8ba0000 }
22433 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
22436 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22437 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb88e0000 }
22439 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
22442 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22443 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb8ae0000 }
22445 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
22448 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22449 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb8be0000 }
22451 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
22454 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22455 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb88b0000 }
22457 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
22460 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22461 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb8ab0000 }
22463 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
22466 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22467 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb8bb0000 }
22469 /* sbb.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
22472 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
22473 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xb88f0000 }
22475 /* sbb.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
22478 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
22479 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xb8af0000 }
22481 /* sbb.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
22484 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
22485 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xb8bf0000 }
22487 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
22490 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22491 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xb8c00000 }
22493 /* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
22496 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
22497 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb8e00000 }
22499 /* sbb.b${X} ${Dsp-16-u16},$Dst16RnQI */
22502 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
22503 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xb8f00000 }
22505 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
22508 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22509 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xb8c40000 }
22511 /* sbb.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
22514 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
22515 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xb8e40000 }
22517 /* sbb.b${X} ${Dsp-16-u16},$Dst16AnQI */
22520 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
22521 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xb8f40000 }
22523 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
22526 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22527 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xb8c60000 }
22529 /* sbb.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
22532 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
22533 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xb8e60000 }
22535 /* sbb.b${X} ${Dsp-16-u16},[$Dst16An] */
22538 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
22539 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xb8f60000 }
22541 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
22544 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22545 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xb8c80000 }
22547 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
22550 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22551 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xb8e80000 }
22553 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
22556 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
22557 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xb8f80000 }
22559 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
22562 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22563 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xb8cc0000 }
22565 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
22568 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22569 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xb8ec0000 }
22571 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
22574 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
22575 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xb8fc0000 }
22577 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
22580 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22581 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb8ca0000 }
22583 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
22586 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22587 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb8ea0000 }
22589 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
22592 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
22593 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xb8fa0000 }
22595 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
22598 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22599 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb8ce0000 }
22601 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
22604 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22605 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb8ee0000 }
22607 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
22610 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
22611 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xb8fe0000 }
22613 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
22616 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22617 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb8cb0000 }
22619 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
22622 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22623 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb8eb0000 }
22625 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
22628 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
22629 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xb8fb0000 }
22631 /* sbb.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
22634 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
22635 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xb8cf0000 }
22637 /* sbb.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
22640 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
22641 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xb8ef0000 }
22643 /* sbb.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
22646 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
22647 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xb8ff0000 }
22649 /* sbb.b${X} $Src16RnQI,$Dst16RnQI */
22652 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
22653 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xb800 }
22655 /* sbb.b${X} $Src16AnQI,$Dst16RnQI */
22658 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
22659 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xb840 }
22661 /* sbb.b${X} [$Src16An],$Dst16RnQI */
22664 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
22665 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xb860 }
22667 /* sbb.b${X} $Src16RnQI,$Dst16AnQI */
22670 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
22671 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xb804 }
22673 /* sbb.b${X} $Src16AnQI,$Dst16AnQI */
22676 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
22677 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xb844 }
22679 /* sbb.b${X} [$Src16An],$Dst16AnQI */
22682 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
22683 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xb864 }
22685 /* sbb.b${X} $Src16RnQI,[$Dst16An] */
22688 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
22689 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xb806 }
22691 /* sbb.b${X} $Src16AnQI,[$Dst16An] */
22694 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
22695 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xb846 }
22697 /* sbb.b${X} [$Src16An],[$Dst16An] */
22700 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
22701 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xb866 }
22703 /* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
22706 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22707 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xb80800 }
22709 /* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
22712 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22713 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xb84800 }
22715 /* sbb.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
22718 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22719 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xb86800 }
22721 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
22724 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22725 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xb80c0000 }
22727 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
22730 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22731 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xb84c0000 }
22733 /* sbb.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
22736 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22737 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xb86c0000 }
22739 /* sbb.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
22742 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22743 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb80a00 }
22745 /* sbb.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
22748 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22749 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb84a00 }
22751 /* sbb.b${X} [$Src16An],${Dsp-16-u8}[sb] */
22754 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22755 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xb86a00 }
22757 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
22760 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22761 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb80e0000 }
22763 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
22766 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22767 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb84e0000 }
22769 /* sbb.b${X} [$Src16An],${Dsp-16-u16}[sb] */
22772 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
22773 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xb86e0000 }
22775 /* sbb.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
22778 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22779 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb80b00 }
22781 /* sbb.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
22784 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22785 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb84b00 }
22787 /* sbb.b${X} [$Src16An],${Dsp-16-s8}[fb] */
22790 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22791 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xb86b00 }
22793 /* sbb.b${X} $Src16RnQI,${Dsp-16-u16} */
22796 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
22797 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xb80f0000 }
22799 /* sbb.b${X} $Src16AnQI,${Dsp-16-u16} */
22802 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
22803 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xb84f0000 }
22805 /* sbb.b${X} [$Src16An],${Dsp-16-u16} */
22808 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
22809 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xb86f0000 }
22811 /* sbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
22814 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
22815 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1992e00 }
22817 /* sbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
22820 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
22821 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x191ae00 }
22823 /* sbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
22826 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
22827 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1912e00 }
22829 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
22832 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22833 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1932e00 }
22835 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
22838 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22839 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x193ae00 }
22841 /* sbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
22844 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22845 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193ee00 }
22847 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
22850 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22851 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1952e00 }
22853 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
22856 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22857 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x195ae00 }
22859 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
22862 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
22863 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195ee00 }
22865 /* sbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
22868 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
22869 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197ee00 }
22871 /* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
22874 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22875 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1972e00 }
22877 /* sbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
22880 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
22881 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x197ae00 }
22883 /* sbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
22886 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
22887 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1982e00 }
22889 /* sbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
22892 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
22893 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x190ae00 }
22895 /* sbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
22898 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
22899 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1902e00 }
22901 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
22904 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22905 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1922e00 }
22907 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
22910 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
22911 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x192ae00 }
22913 /* sbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
22916 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
22917 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192ee00 }
22919 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
22922 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22923 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1942e00 }
22925 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
22928 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
22929 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x194ae00 }
22931 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
22934 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
22935 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194ee00 }
22937 /* sbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
22940 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
22941 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196ee00 }
22943 /* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
22946 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
22947 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1962e00 }
22949 /* sbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
22952 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
22953 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x196ae00 }
22955 /* sbb.w${X} #${Imm-16-HI},$Dst16RnHI */
22958 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
22959 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77700000 }
22961 /* sbb.w${X} #${Imm-16-HI},$Dst16AnHI */
22964 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
22965 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77740000 }
22967 /* sbb.w${X} #${Imm-16-HI},[$Dst16An] */
22970 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
22971 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77760000 }
22973 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
22976 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
22977 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77780000 }
22979 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
22982 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
22983 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x777a0000 }
22985 /* sbb.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
22988 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
22989 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x777b0000 }
22991 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
22994 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
22995 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x777c0000 }
22997 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
23000 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23001 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x777e0000 }
23003 /* sbb.w${X} #${Imm-32-HI},${Dsp-16-u16} */
23006 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
23007 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x777f0000 }
23009 /* sbb.b${X} #${Imm-16-QI},$Dst16RnQI */
23012 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
23013 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x767000 }
23015 /* sbb.b${X} #${Imm-16-QI},$Dst16AnQI */
23018 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
23019 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x767400 }
23021 /* sbb.b${X} #${Imm-16-QI},[$Dst16An] */
23024 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
23025 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x767600 }
23027 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
23030 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23031 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76780000 }
23033 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
23036 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23037 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x767a0000 }
23039 /* sbb.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
23042 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23043 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x767b0000 }
23045 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
23048 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23049 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x767c0000 }
23051 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
23054 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23055 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x767e0000 }
23057 /* sbb.b${X} #${Imm-32-QI},${Dsp-16-u16} */
23060 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
23061 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x767f0000 }
23063 /* rot.w r1h,$Dst32RnUnprefixedHI */
23066 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
23067 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa93f }
23069 /* rot.w r1h,$Dst32AnUnprefixedHI */
23072 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
23073 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1bf }
23075 /* rot.w r1h,[$Dst32AnUnprefixed] */
23078 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23079 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa13f }
23081 /* rot.w r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
23084 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23085 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa33f00 }
23087 /* rot.w r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
23090 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23091 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa53f0000 }
23093 /* rot.w r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
23096 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23097 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa73f0000 }
23099 /* rot.w r1h,${Dsp-16-u8}[sb] */
23102 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23103 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3bf00 }
23105 /* rot.w r1h,${Dsp-16-u16}[sb] */
23108 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23109 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5bf0000 }
23111 /* rot.w r1h,${Dsp-16-s8}[fb] */
23114 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23115 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ff00 }
23117 /* rot.w r1h,${Dsp-16-s16}[fb] */
23120 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23121 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ff0000 }
23123 /* rot.w r1h,${Dsp-16-u16} */
23126 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23127 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ff0000 }
23129 /* rot.w r1h,${Dsp-16-u24} */
23132 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
23133 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7bf0000 }
23135 /* rot.b r1h,$Dst32RnUnprefixedQI */
23138 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
23139 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa83f }
23141 /* rot.b r1h,$Dst32AnUnprefixedQI */
23144 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
23145 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0bf }
23147 /* rot.b r1h,[$Dst32AnUnprefixed] */
23150 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23151 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa03f }
23153 /* rot.b r1h,${Dsp-16-u8}[$Dst32AnUnprefixed] */
23156 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23157 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa23f00 }
23159 /* rot.b r1h,${Dsp-16-u16}[$Dst32AnUnprefixed] */
23162 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23163 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa43f0000 }
23165 /* rot.b r1h,${Dsp-16-u24}[$Dst32AnUnprefixed] */
23168 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23169 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa63f0000 }
23171 /* rot.b r1h,${Dsp-16-u8}[sb] */
23174 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23175 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2bf00 }
23177 /* rot.b r1h,${Dsp-16-u16}[sb] */
23180 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23181 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4bf0000 }
23183 /* rot.b r1h,${Dsp-16-s8}[fb] */
23186 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23187 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ff00 }
23189 /* rot.b r1h,${Dsp-16-s16}[fb] */
23192 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23193 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ff0000 }
23195 /* rot.b r1h,${Dsp-16-u16} */
23198 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23199 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ff0000 }
23201 /* rot.b r1h,${Dsp-16-u24} */
23204 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U24
), 0 } },
23205 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6bf0000 }
23207 /* rot.w r1h,$Dst16RnHI */
23210 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNHI
), 0 } },
23211 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7560 }
23213 /* rot.w r1h,$Dst16AnHI */
23216 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANHI
), 0 } },
23217 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7564 }
23219 /* rot.w r1h,[$Dst16An] */
23222 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
23223 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7566 }
23225 /* rot.w r1h,${Dsp-16-u8}[$Dst16An] */
23228 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23229 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x756800 }
23231 /* rot.w r1h,${Dsp-16-u16}[$Dst16An] */
23234 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23235 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x756c0000 }
23237 /* rot.w r1h,${Dsp-16-u8}[sb] */
23240 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23241 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x756a00 }
23243 /* rot.w r1h,${Dsp-16-u16}[sb] */
23246 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23247 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x756e0000 }
23249 /* rot.w r1h,${Dsp-16-s8}[fb] */
23252 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23253 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x756b00 }
23255 /* rot.w r1h,${Dsp-16-u16} */
23258 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23259 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x756f0000 }
23261 /* rot.b r1h,$Dst16RnQI */
23264 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16RNQI
), 0 } },
23265 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7460 }
23267 /* rot.b r1h,$Dst16AnQI */
23270 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DST16ANQI
), 0 } },
23271 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7464 }
23273 /* rot.b r1h,[$Dst16An] */
23276 { { MNEM
, ' ', 'r', '1', 'h', ',', '[', OP (DST16AN
), ']', 0 } },
23277 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7466 }
23279 /* rot.b r1h,${Dsp-16-u8}[$Dst16An] */
23282 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23283 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x746800 }
23285 /* rot.b r1h,${Dsp-16-u16}[$Dst16An] */
23288 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23289 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x746c0000 }
23291 /* rot.b r1h,${Dsp-16-u8}[sb] */
23294 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23295 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x746a00 }
23297 /* rot.b r1h,${Dsp-16-u16}[sb] */
23300 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23301 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x746e0000 }
23303 /* rot.b r1h,${Dsp-16-s8}[fb] */
23306 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23307 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x746b00 }
23309 /* rot.b r1h,${Dsp-16-u16} */
23312 { { MNEM
, ' ', 'r', '1', 'h', ',', OP (DSP_16_U16
), 0 } },
23313 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x746f0000 }
23315 /* rot.w${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedHI */
23318 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
23319 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe920 }
23321 /* rot.w${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedHI */
23324 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
23325 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe1a0 }
23327 /* rot.w${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
23330 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23331 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe120 }
23333 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
23336 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23337 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe32000 }
23339 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
23342 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23343 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5200000 }
23345 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
23348 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23349 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7200000 }
23351 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
23354 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23355 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe3a000 }
23357 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
23360 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23361 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5a00000 }
23363 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
23366 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23367 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3e000 }
23369 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
23372 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23373 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5e00000 }
23375 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
23378 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
23379 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7e00000 }
23381 /* rot.w${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
23384 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
23385 & ifmt_shl32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7a00000 }
23387 /* rot.b${Q} #${Imm-sh-12-s4},$Dst32RnUnprefixedQI */
23390 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
23391 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe820 }
23393 /* rot.b${Q} #${Imm-sh-12-s4},$Dst32AnUnprefixedQI */
23396 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
23397 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe0a0 }
23399 /* rot.b${Q} #${Imm-sh-12-s4},[$Dst32AnUnprefixed] */
23402 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23403 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe020 }
23405 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
23408 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23409 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe22000 }
23411 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
23414 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23415 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4200000 }
23417 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
23420 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23421 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6200000 }
23423 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u8}[sb] */
23426 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23427 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe2a000 }
23429 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16}[sb] */
23432 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23433 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4a00000 }
23435 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s8}[fb] */
23438 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23439 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2e000 }
23441 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-s16}[fb] */
23444 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23445 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4e00000 }
23447 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u16} */
23450 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U16
), 0 } },
23451 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6e00000 }
23453 /* rot.b${Q} #${Imm-sh-12-s4},${Dsp-16-u24} */
23456 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_12_S4
), ',', OP (DSP_16_U24
), 0 } },
23457 & ifmt_shl32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6a00000 }
23459 /* rot.w${Q} #${Imm-sh-8-s4},$Dst16RnHI */
23462 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNHI
), 0 } },
23463 & ifmt_shl16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xe100 }
23465 /* rot.w${Q} #${Imm-sh-8-s4},$Dst16AnHI */
23468 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANHI
), 0 } },
23469 & ifmt_shl16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xe104 }
23471 /* rot.w${Q} #${Imm-sh-8-s4},[$Dst16An] */
23474 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
23475 & ifmt_shl16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xe106 }
23477 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
23480 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23481 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xe10800 }
23483 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
23486 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23487 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xe10c0000 }
23489 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
23492 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23493 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xe10a00 }
23495 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
23498 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23499 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xe10e0000 }
23501 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
23504 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23505 & ifmt_shl16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xe10b00 }
23507 /* rot.w${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
23510 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
23511 & ifmt_shl16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xe10f0000 }
23513 /* rot.b${Q} #${Imm-sh-8-s4},$Dst16RnQI */
23516 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16RNQI
), 0 } },
23517 & ifmt_shl16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xe000 }
23519 /* rot.b${Q} #${Imm-sh-8-s4},$Dst16AnQI */
23522 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DST16ANQI
), 0 } },
23523 & ifmt_shl16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xe004 }
23525 /* rot.b${Q} #${Imm-sh-8-s4},[$Dst16An] */
23528 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
23529 & ifmt_shl16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xe006 }
23531 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[$Dst16An] */
23534 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23535 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xe00800 }
23537 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[$Dst16An] */
23540 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23541 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xe00c0000 }
23543 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u8}[sb] */
23546 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23547 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xe00a00 }
23549 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16}[sb] */
23552 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23553 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xe00e0000 }
23555 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-s8}[fb] */
23558 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23559 & ifmt_shl16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xe00b00 }
23561 /* rot.b${Q} #${Imm-sh-8-s4},${Dsp-16-u16} */
23564 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_SH_8_S4
), ',', OP (DSP_16_U16
), 0 } },
23565 & ifmt_shl16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xe00f0000 }
23567 /* rorc.w $Dst32RnUnprefixedHI */
23570 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
23571 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa92e }
23573 /* rorc.w $Dst32AnUnprefixedHI */
23576 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
23577 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1ae }
23579 /* rorc.w [$Dst32AnUnprefixed] */
23582 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23583 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa12e }
23585 /* rorc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23588 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23589 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa32e00 }
23591 /* rorc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23594 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23595 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa52e0000 }
23597 /* rorc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23600 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23601 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa72e0000 }
23603 /* rorc.w ${Dsp-16-u8}[sb] */
23606 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23607 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3ae00 }
23609 /* rorc.w ${Dsp-16-u16}[sb] */
23612 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23613 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5ae0000 }
23615 /* rorc.w ${Dsp-16-s8}[fb] */
23618 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23619 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ee00 }
23621 /* rorc.w ${Dsp-16-s16}[fb] */
23624 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23625 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ee0000 }
23627 /* rorc.w ${Dsp-16-u16} */
23630 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23631 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ee0000 }
23633 /* rorc.w ${Dsp-16-u24} */
23636 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23637 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7ae0000 }
23639 /* rorc.b $Dst32RnUnprefixedQI */
23642 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
23643 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa82e }
23645 /* rorc.b $Dst32AnUnprefixedQI */
23648 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
23649 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0ae }
23651 /* rorc.b [$Dst32AnUnprefixed] */
23654 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23655 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa02e }
23657 /* rorc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23660 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23661 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22e00 }
23663 /* rorc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23666 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23667 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa42e0000 }
23669 /* rorc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23672 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23673 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa62e0000 }
23675 /* rorc.b ${Dsp-16-u8}[sb] */
23678 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23679 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2ae00 }
23681 /* rorc.b ${Dsp-16-u16}[sb] */
23684 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23685 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4ae0000 }
23687 /* rorc.b ${Dsp-16-s8}[fb] */
23690 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23691 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ee00 }
23693 /* rorc.b ${Dsp-16-s16}[fb] */
23696 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23697 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ee0000 }
23699 /* rorc.b ${Dsp-16-u16} */
23702 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23703 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ee0000 }
23705 /* rorc.b ${Dsp-16-u24} */
23708 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23709 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6ae0000 }
23711 /* rorc.w $Dst16RnHI */
23714 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
23715 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77b0 }
23717 /* rorc.w $Dst16AnHI */
23720 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
23721 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77b4 }
23723 /* rorc.w [$Dst16An] */
23726 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23727 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77b6 }
23729 /* rorc.w ${Dsp-16-u8}[$Dst16An] */
23732 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23733 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77b800 }
23735 /* rorc.w ${Dsp-16-u16}[$Dst16An] */
23738 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23739 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77bc0000 }
23741 /* rorc.w ${Dsp-16-u8}[sb] */
23744 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23745 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ba00 }
23747 /* rorc.w ${Dsp-16-u16}[sb] */
23750 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23751 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77be0000 }
23753 /* rorc.w ${Dsp-16-s8}[fb] */
23756 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23757 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77bb00 }
23759 /* rorc.w ${Dsp-16-u16} */
23762 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23763 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77bf0000 }
23765 /* rorc.b $Dst16RnQI */
23768 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
23769 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76b0 }
23771 /* rorc.b $Dst16AnQI */
23774 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
23775 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76b4 }
23777 /* rorc.b [$Dst16An] */
23780 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23781 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76b6 }
23783 /* rorc.b ${Dsp-16-u8}[$Dst16An] */
23786 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23787 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76b800 }
23789 /* rorc.b ${Dsp-16-u16}[$Dst16An] */
23792 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23793 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76bc0000 }
23795 /* rorc.b ${Dsp-16-u8}[sb] */
23798 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23799 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ba00 }
23801 /* rorc.b ${Dsp-16-u16}[sb] */
23804 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23805 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76be0000 }
23807 /* rorc.b ${Dsp-16-s8}[fb] */
23810 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23811 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76bb00 }
23813 /* rorc.b ${Dsp-16-u16} */
23816 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23817 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76bf0000 }
23819 /* rolc.w $Dst32RnUnprefixedHI */
23822 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
23823 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb92e }
23825 /* rolc.w $Dst32AnUnprefixedHI */
23828 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
23829 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1ae }
23831 /* rolc.w [$Dst32AnUnprefixed] */
23834 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23835 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb12e }
23837 /* rolc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23840 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23841 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb32e00 }
23843 /* rolc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23846 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23847 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb52e0000 }
23849 /* rolc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23852 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23853 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb72e0000 }
23855 /* rolc.w ${Dsp-16-u8}[sb] */
23858 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23859 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3ae00 }
23861 /* rolc.w ${Dsp-16-u16}[sb] */
23864 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23865 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5ae0000 }
23867 /* rolc.w ${Dsp-16-s8}[fb] */
23870 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23871 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ee00 }
23873 /* rolc.w ${Dsp-16-s16}[fb] */
23876 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23877 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ee0000 }
23879 /* rolc.w ${Dsp-16-u16} */
23882 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23883 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ee0000 }
23885 /* rolc.w ${Dsp-16-u24} */
23888 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23889 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7ae0000 }
23891 /* rolc.b $Dst32RnUnprefixedQI */
23894 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
23895 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb82e }
23897 /* rolc.b $Dst32AnUnprefixedQI */
23900 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
23901 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0ae }
23903 /* rolc.b [$Dst32AnUnprefixed] */
23906 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23907 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb02e }
23909 /* rolc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
23912 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23913 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22e00 }
23915 /* rolc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
23918 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23919 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb42e0000 }
23921 /* rolc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
23924 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
23925 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb62e0000 }
23927 /* rolc.b ${Dsp-16-u8}[sb] */
23930 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23931 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2ae00 }
23933 /* rolc.b ${Dsp-16-u16}[sb] */
23936 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
23937 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4ae0000 }
23939 /* rolc.b ${Dsp-16-s8}[fb] */
23942 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
23943 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ee00 }
23945 /* rolc.b ${Dsp-16-s16}[fb] */
23948 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
23949 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ee0000 }
23951 /* rolc.b ${Dsp-16-u16} */
23954 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
23955 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ee0000 }
23957 /* rolc.b ${Dsp-16-u24} */
23960 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
23961 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6ae0000 }
23963 /* rolc.w $Dst16RnHI */
23966 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
23967 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77a0 }
23969 /* rolc.w $Dst16AnHI */
23972 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
23973 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77a4 }
23975 /* rolc.w [$Dst16An] */
23978 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
23979 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77a6 }
23981 /* rolc.w ${Dsp-16-u8}[$Dst16An] */
23984 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
23985 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77a800 }
23987 /* rolc.w ${Dsp-16-u16}[$Dst16An] */
23990 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
23991 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77ac0000 }
23993 /* rolc.w ${Dsp-16-u8}[sb] */
23996 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
23997 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77aa00 }
23999 /* rolc.w ${Dsp-16-u16}[sb] */
24002 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24003 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ae0000 }
24005 /* rolc.w ${Dsp-16-s8}[fb] */
24008 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24009 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77ab00 }
24011 /* rolc.w ${Dsp-16-u16} */
24014 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24015 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77af0000 }
24017 /* rolc.b $Dst16RnQI */
24020 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
24021 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76a0 }
24023 /* rolc.b $Dst16AnQI */
24026 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
24027 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76a4 }
24029 /* rolc.b [$Dst16An] */
24032 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
24033 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76a6 }
24035 /* rolc.b ${Dsp-16-u8}[$Dst16An] */
24038 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24039 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76a800 }
24041 /* rolc.b ${Dsp-16-u16}[$Dst16An] */
24044 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24045 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76ac0000 }
24047 /* rolc.b ${Dsp-16-u8}[sb] */
24050 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24051 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76aa00 }
24053 /* rolc.b ${Dsp-16-u16}[sb] */
24056 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24057 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ae0000 }
24059 /* rolc.b ${Dsp-16-s8}[fb] */
24062 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24063 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76ab00 }
24065 /* rolc.b ${Dsp-16-u16} */
24068 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24069 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76af0000 }
24071 /* pusha [$Dst32AnUnprefixed] */
24074 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24075 & ifmt_pusha32_16_Unprefixed_Mova_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xb001 }
24077 /* pusha ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24080 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24081 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xb20100 }
24083 /* pusha ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24086 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24087 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xb4010000 }
24089 /* pusha ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24092 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24093 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xb6010000 }
24095 /* pusha ${Dsp-16-u8}[sb] */
24098 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24099 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xb28100 }
24101 /* pusha ${Dsp-16-u16}[sb] */
24104 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24105 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xb4810000 }
24107 /* pusha ${Dsp-16-s8}[fb] */
24110 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24111 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xb2c100 }
24113 /* pusha ${Dsp-16-s16}[fb] */
24116 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24117 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xb4c10000 }
24119 /* pusha ${Dsp-16-u16} */
24122 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24123 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xb6c10000 }
24125 /* pusha ${Dsp-16-u24} */
24128 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24129 & ifmt_pusha32_16_Unprefixed_Mova_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xb6810000 }
24131 /* pusha [$Dst16An] */
24134 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
24135 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0x7d96 }
24137 /* pusha ${Dsp-16-u8}[$Dst16An] */
24140 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24141 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0x7d9800 }
24143 /* pusha ${Dsp-16-u16}[$Dst16An] */
24146 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24147 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0x7d9c0000 }
24149 /* pusha ${Dsp-16-u8}[sb] */
24152 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24153 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0x7d9a00 }
24155 /* pusha ${Dsp-16-u16}[sb] */
24158 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24159 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0x7d9e0000 }
24161 /* pusha ${Dsp-16-s8}[fb] */
24164 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24165 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0x7d9b00 }
24167 /* pusha ${Dsp-16-u16} */
24170 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24171 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0x7d9f0000 }
24173 /* push.l $Dst32RnUnprefixedSI */
24176 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
24177 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0xa801 }
24179 /* push.l $Dst32AnUnprefixedSI */
24182 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
24183 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa081 }
24185 /* push.l [$Dst32AnUnprefixed] */
24188 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24189 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0xa001 }
24191 /* push.l ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24194 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24195 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa20100 }
24197 /* push.l ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24200 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24201 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4010000 }
24203 /* push.l ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24206 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24207 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6010000 }
24209 /* push.l ${Dsp-16-u8}[sb] */
24212 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24213 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa28100 }
24215 /* push.l ${Dsp-16-u16}[sb] */
24218 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24219 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4810000 }
24221 /* push.l ${Dsp-16-s8}[fb] */
24224 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24225 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2c100 }
24227 /* push.l ${Dsp-16-s16}[fb] */
24230 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24231 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4c10000 }
24233 /* push.l ${Dsp-16-u16} */
24236 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24237 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6c10000 }
24239 /* push.l ${Dsp-16-u24} */
24242 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24243 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6810000 }
24245 /* push.w${S} ${An16-push-S} */
24248 { { MNEM
, OP (S
), ' ', OP (AN16_PUSH_S
), 0 } },
24249 & ifmt_push16_b_s_an_An16_push_S_derived
, { 0xc2 }
24251 /* push.b${S} ${Rn16-push-S} */
24254 { { MNEM
, OP (S
), ' ', OP (RN16_PUSH_S
), 0 } },
24255 & ifmt_push16_b_s_rn_Rn16_push_S_derived
, { 0x82 }
24257 /* push.w $Dst32RnUnprefixedHI */
24260 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
24261 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc90e }
24263 /* push.w $Dst32AnUnprefixedHI */
24266 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
24267 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc18e }
24269 /* push.w [$Dst32AnUnprefixed] */
24272 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24273 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc10e }
24275 /* push.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24278 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24279 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30e00 }
24281 /* push.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24284 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24285 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50e0000 }
24287 /* push.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24290 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24291 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70e0000 }
24293 /* push.w ${Dsp-16-u8}[sb] */
24296 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24297 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38e00 }
24299 /* push.w ${Dsp-16-u16}[sb] */
24302 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24303 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58e0000 }
24305 /* push.w ${Dsp-16-s8}[fb] */
24308 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24309 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ce00 }
24311 /* push.w ${Dsp-16-s16}[fb] */
24314 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24315 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ce0000 }
24317 /* push.w ${Dsp-16-u16} */
24320 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24321 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ce0000 }
24323 /* push.w ${Dsp-16-u24} */
24326 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24327 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78e0000 }
24329 /* push.b $Dst32RnUnprefixedQI */
24332 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
24333 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc80e }
24335 /* push.b $Dst32AnUnprefixedQI */
24338 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
24339 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc08e }
24341 /* push.b [$Dst32AnUnprefixed] */
24344 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24345 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc00e }
24347 /* push.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24350 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24351 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20e00 }
24353 /* push.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24356 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24357 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40e0000 }
24359 /* push.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24362 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24363 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60e0000 }
24365 /* push.b ${Dsp-16-u8}[sb] */
24368 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24369 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28e00 }
24371 /* push.b ${Dsp-16-u16}[sb] */
24374 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24375 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48e0000 }
24377 /* push.b ${Dsp-16-s8}[fb] */
24380 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24381 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ce00 }
24383 /* push.b ${Dsp-16-s16}[fb] */
24386 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24387 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ce0000 }
24389 /* push.b ${Dsp-16-u16} */
24392 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24393 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ce0000 }
24395 /* push.b ${Dsp-16-u24} */
24398 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24399 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68e0000 }
24401 /* push.w${G} $Dst16RnHI */
24404 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
24405 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7540 }
24407 /* push.w${G} $Dst16AnHI */
24410 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
24411 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7544 }
24413 /* push.w${G} [$Dst16An] */
24416 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24417 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7546 }
24419 /* push.w${G} ${Dsp-16-u8}[$Dst16An] */
24422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24423 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x754800 }
24425 /* push.w${G} ${Dsp-16-u16}[$Dst16An] */
24428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24429 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x754c0000 }
24431 /* push.w${G} ${Dsp-16-u8}[sb] */
24434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24435 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x754a00 }
24437 /* push.w${G} ${Dsp-16-u16}[sb] */
24440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24441 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x754e0000 }
24443 /* push.w${G} ${Dsp-16-s8}[fb] */
24446 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24447 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x754b00 }
24449 /* push.w${G} ${Dsp-16-u16} */
24452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24453 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x754f0000 }
24455 /* push.b${G} $Dst16RnQI */
24458 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
24459 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7440 }
24461 /* push.b${G} $Dst16AnQI */
24464 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
24465 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7444 }
24467 /* push.b${G} [$Dst16An] */
24470 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24471 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7446 }
24473 /* push.b${G} ${Dsp-16-u8}[$Dst16An] */
24476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24477 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x744800 }
24479 /* push.b${G} ${Dsp-16-u16}[$Dst16An] */
24482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24483 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x744c0000 }
24485 /* push.b${G} ${Dsp-16-u8}[sb] */
24488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24489 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x744a00 }
24491 /* push.b${G} ${Dsp-16-u16}[sb] */
24494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24495 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x744e0000 }
24497 /* push.b${G} ${Dsp-16-s8}[fb] */
24500 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24501 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x744b00 }
24503 /* push.b${G} ${Dsp-16-u16} */
24506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24507 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x744f0000 }
24509 /* pop.w${S} ${An16-push-S} */
24512 { { MNEM
, OP (S
), ' ', OP (AN16_PUSH_S
), 0 } },
24513 & ifmt_push16_b_s_an_An16_push_S_derived
, { 0xd2 }
24515 /* pop.b${S} ${Rn16-push-S} */
24518 { { MNEM
, OP (S
), ' ', OP (RN16_PUSH_S
), 0 } },
24519 & ifmt_push16_b_s_rn_Rn16_push_S_derived
, { 0x92 }
24521 /* pop.w $Dst32RnUnprefixedHI */
24524 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
24525 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb92f }
24527 /* pop.w $Dst32AnUnprefixedHI */
24530 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
24531 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb1af }
24533 /* pop.w [$Dst32AnUnprefixed] */
24536 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24537 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb12f }
24539 /* pop.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24542 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24543 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb32f00 }
24545 /* pop.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24548 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24549 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb52f0000 }
24551 /* pop.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24554 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24555 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb72f0000 }
24557 /* pop.w ${Dsp-16-u8}[sb] */
24560 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24561 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb3af00 }
24563 /* pop.w ${Dsp-16-u16}[sb] */
24566 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24567 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb5af0000 }
24569 /* pop.w ${Dsp-16-s8}[fb] */
24572 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24573 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ef00 }
24575 /* pop.w ${Dsp-16-s16}[fb] */
24578 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24579 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ef0000 }
24581 /* pop.w ${Dsp-16-u16} */
24584 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24585 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ef0000 }
24587 /* pop.w ${Dsp-16-u24} */
24590 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24591 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb7af0000 }
24593 /* pop.b $Dst32RnUnprefixedQI */
24596 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
24597 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb82f }
24599 /* pop.b $Dst32AnUnprefixedQI */
24602 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
24603 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0af }
24605 /* pop.b [$Dst32AnUnprefixed] */
24608 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24609 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb02f }
24611 /* pop.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
24614 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24615 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22f00 }
24617 /* pop.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
24620 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24621 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb42f0000 }
24623 /* pop.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
24626 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24627 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb62f0000 }
24629 /* pop.b ${Dsp-16-u8}[sb] */
24632 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24633 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2af00 }
24635 /* pop.b ${Dsp-16-u16}[sb] */
24638 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24639 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4af0000 }
24641 /* pop.b ${Dsp-16-s8}[fb] */
24644 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24645 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ef00 }
24647 /* pop.b ${Dsp-16-s16}[fb] */
24650 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
24651 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ef0000 }
24653 /* pop.b ${Dsp-16-u16} */
24656 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
24657 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ef0000 }
24659 /* pop.b ${Dsp-16-u24} */
24662 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
24663 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6af0000 }
24665 /* pop.w${G} $Dst16RnHI */
24668 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
24669 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x75d0 }
24671 /* pop.w${G} $Dst16AnHI */
24674 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
24675 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x75d4 }
24677 /* pop.w${G} [$Dst16An] */
24680 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24681 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x75d6 }
24683 /* pop.w${G} ${Dsp-16-u8}[$Dst16An] */
24686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24687 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x75d800 }
24689 /* pop.w${G} ${Dsp-16-u16}[$Dst16An] */
24692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24693 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x75dc0000 }
24695 /* pop.w${G} ${Dsp-16-u8}[sb] */
24698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24699 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x75da00 }
24701 /* pop.w${G} ${Dsp-16-u16}[sb] */
24704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24705 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x75de0000 }
24707 /* pop.w${G} ${Dsp-16-s8}[fb] */
24710 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24711 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x75db00 }
24713 /* pop.w${G} ${Dsp-16-u16} */
24716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24717 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x75df0000 }
24719 /* pop.b${G} $Dst16RnQI */
24722 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
24723 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x74d0 }
24725 /* pop.b${G} $Dst16AnQI */
24728 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
24729 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x74d4 }
24731 /* pop.b${G} [$Dst16An] */
24734 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
24735 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x74d6 }
24737 /* pop.b${G} ${Dsp-16-u8}[$Dst16An] */
24740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
24741 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x74d800 }
24743 /* pop.b${G} ${Dsp-16-u16}[$Dst16An] */
24746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
24747 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x74dc0000 }
24749 /* pop.b${G} ${Dsp-16-u8}[sb] */
24752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
24753 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x74da00 }
24755 /* pop.b${G} ${Dsp-16-u16}[sb] */
24758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
24759 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x74de0000 }
24761 /* pop.b${G} ${Dsp-16-s8}[fb] */
24764 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
24765 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x74db00 }
24767 /* pop.b${G} ${Dsp-16-u16} */
24770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
24771 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x74df0000 }
24773 /* or.b${S} ${SrcDst16-r0l-r0h-S-normal} */
24776 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
24777 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x18 }
24779 /* or.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
24782 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
24783 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x1900 }
24785 /* or.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
24788 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
24789 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x1a00 }
24791 /* or.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
24794 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
24795 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x1b0000 }
24797 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
24800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24801 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990500 }
24803 /* or.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
24806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24807 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992500 }
24809 /* or.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
24812 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
24813 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993500 }
24815 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
24818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24819 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918500 }
24821 /* or.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
24824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24825 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a500 }
24827 /* or.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
24830 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
24831 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b500 }
24833 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
24836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24837 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910500 }
24839 /* or.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
24842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24843 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912500 }
24845 /* or.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
24848 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24849 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913500 }
24851 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24855 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93050000 }
24857 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24861 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93250000 }
24863 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
24866 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24867 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93350000 }
24869 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24873 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95050000 }
24875 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24879 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95250000 }
24881 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
24884 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24885 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95350000 }
24887 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24891 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97050000 }
24893 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24897 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97250000 }
24899 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
24902 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
24903 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97350000 }
24905 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
24908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24909 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93850000 }
24911 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
24914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24915 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a50000 }
24917 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
24920 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
24921 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b50000 }
24923 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
24926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24927 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95850000 }
24929 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
24932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24933 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a50000 }
24935 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
24938 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
24939 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b50000 }
24941 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
24944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24945 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c50000 }
24947 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
24950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24951 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e50000 }
24953 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
24956 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
24957 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f50000 }
24959 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
24962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24963 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c50000 }
24965 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
24968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24969 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e50000 }
24971 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
24974 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
24975 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f50000 }
24977 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
24980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
24981 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c50000 }
24983 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
24986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
24987 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e50000 }
24989 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
24992 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
24993 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f50000 }
24995 /* or.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
24998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
24999 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97850000 }
25001 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
25004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25005 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a50000 }
25007 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
25010 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25011 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b50000 }
25013 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25017 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9050000 }
25019 /* or.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
25022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25023 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9250000 }
25025 /* or.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
25028 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25029 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9350000 }
25031 /* or.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
25034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25035 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9350000 }
25037 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25041 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1850000 }
25043 /* or.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
25046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25047 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a50000 }
25049 /* or.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
25052 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25053 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b50000 }
25055 /* or.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
25058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25059 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b50000 }
25061 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25065 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1050000 }
25067 /* or.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
25070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25071 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1250000 }
25073 /* or.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
25076 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25077 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1350000 }
25079 /* or.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
25082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25083 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1350000 }
25085 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25089 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3050000 }
25091 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25095 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3250000 }
25097 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25100 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25101 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3350000 }
25103 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
25106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25107 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3350000 }
25109 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25113 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5050000 }
25115 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25119 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5250000 }
25121 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25124 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25125 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5350000 }
25127 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
25130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25131 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5350000 }
25133 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25137 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7050000 }
25139 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25143 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7250000 }
25145 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
25148 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25149 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7350000 }
25151 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
25154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25155 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7350000 }
25157 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
25160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25161 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3850000 }
25163 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
25166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25167 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a50000 }
25169 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
25172 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25173 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b50000 }
25175 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
25178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
25179 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b50000 }
25181 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
25184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25185 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5850000 }
25187 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
25190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25191 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a50000 }
25193 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
25196 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25197 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b50000 }
25199 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
25202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
25203 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b50000 }
25205 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
25208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25209 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c50000 }
25211 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
25214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25215 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e50000 }
25217 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
25220 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25221 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f50000 }
25223 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
25226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
25227 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f50000 }
25229 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
25232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25233 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c50000 }
25235 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
25238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25239 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e50000 }
25241 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
25244 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25245 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f50000 }
25247 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
25250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
25251 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f50000 }
25253 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
25256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
25257 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c50000 }
25259 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
25262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
25263 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e50000 }
25265 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
25268 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
25269 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f50000 }
25271 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
25274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
25275 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f50000 }
25277 /* or.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
25280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
25281 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7850000 }
25283 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
25286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
25287 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a50000 }
25289 /* or.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
25292 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
25293 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b50000 }
25295 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
25298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
25299 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b50000 }
25301 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25305 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9050000 }
25307 /* or.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
25310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25311 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9250000 }
25313 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25317 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1850000 }
25319 /* or.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
25322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25323 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a50000 }
25325 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25329 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1050000 }
25331 /* or.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
25334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25335 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1250000 }
25337 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
25340 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25341 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3050000 }
25343 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
25346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25347 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3250000 }
25349 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
25352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25353 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5050000 }
25355 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
25358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25359 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5250000 }
25361 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
25364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25365 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7050000 }
25367 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
25370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25371 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7250000 }
25373 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
25376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
25377 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3850000 }
25379 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
25382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
25383 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a50000 }
25385 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
25388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
25389 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5850000 }
25391 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
25394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
25395 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a50000 }
25397 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
25400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
25401 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c50000 }
25403 /* or.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
25406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
25407 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e50000 }
25409 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
25412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
25413 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c50000 }
25415 /* or.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
25418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
25419 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e50000 }
25421 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
25424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
25425 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c50000 }
25427 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
25430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
25431 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e50000 }
25433 /* or.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
25436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
25437 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7850000 }
25439 /* or.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
25442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
25443 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a50000 }
25445 /* or.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
25448 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25449 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc905 }
25451 /* or.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
25454 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25455 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8925 }
25457 /* or.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
25460 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
25461 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8905 }
25463 /* or.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
25466 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25467 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc185 }
25469 /* or.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
25472 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25473 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a5 }
25475 /* or.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
25478 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
25479 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8185 }
25481 /* or.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
25484 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25485 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc105 }
25487 /* or.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
25490 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25491 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8125 }
25493 /* or.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25496 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25497 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8105 }
25499 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
25502 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25503 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30500 }
25505 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
25508 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25509 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832500 }
25511 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
25514 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25515 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830500 }
25517 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
25520 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25521 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5050000 }
25523 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
25526 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25527 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85250000 }
25529 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
25532 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25533 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85050000 }
25535 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
25538 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25539 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7050000 }
25541 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
25544 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25545 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87250000 }
25547 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
25550 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25551 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87050000 }
25553 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
25556 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25557 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38500 }
25559 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
25562 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25563 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a500 }
25565 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
25568 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
25569 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838500 }
25571 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
25574 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25575 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5850000 }
25577 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
25580 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25581 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a50000 }
25583 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
25586 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
25587 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85850000 }
25589 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
25592 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25593 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c500 }
25595 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
25598 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25599 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e500 }
25601 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
25604 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
25605 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c500 }
25607 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
25610 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25611 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c50000 }
25613 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
25616 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25617 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e50000 }
25619 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
25622 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
25623 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c50000 }
25625 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
25628 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
25629 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c50000 }
25631 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
25634 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
25635 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e50000 }
25637 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
25640 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
25641 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c50000 }
25643 /* or.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
25646 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
25647 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7850000 }
25649 /* or.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
25652 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
25653 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a50000 }
25655 /* or.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
25658 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
25659 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87850000 }
25661 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
25664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25665 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980500 }
25667 /* or.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
25670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25671 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982500 }
25673 /* or.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
25676 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25677 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983500 }
25679 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
25682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25683 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908500 }
25685 /* or.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
25688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25689 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a500 }
25691 /* or.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
25694 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25695 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b500 }
25697 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25701 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900500 }
25703 /* or.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
25706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25707 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902500 }
25709 /* or.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
25712 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25713 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903500 }
25715 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25719 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92050000 }
25721 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25725 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92250000 }
25727 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
25730 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25731 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92350000 }
25733 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25737 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94050000 }
25739 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25743 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94250000 }
25745 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
25748 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25749 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94350000 }
25751 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25755 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96050000 }
25757 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25761 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96250000 }
25763 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
25766 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25767 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96350000 }
25769 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
25772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25773 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92850000 }
25775 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
25778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25779 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a50000 }
25781 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
25784 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
25785 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b50000 }
25787 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
25790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25791 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94850000 }
25793 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
25796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25797 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a50000 }
25799 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
25802 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
25803 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b50000 }
25805 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
25808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25809 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c50000 }
25811 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
25814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25815 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e50000 }
25817 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
25820 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
25821 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f50000 }
25823 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
25826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25827 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c50000 }
25829 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
25832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25833 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e50000 }
25835 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
25838 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
25839 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f50000 }
25841 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
25844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
25845 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c50000 }
25847 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
25850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
25851 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e50000 }
25853 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
25856 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
25857 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f50000 }
25859 /* or.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
25862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
25863 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96850000 }
25865 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
25868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25869 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a50000 }
25871 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
25874 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
25875 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b50000 }
25877 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
25880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25881 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8050000 }
25883 /* or.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
25886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25887 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8250000 }
25889 /* or.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
25892 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25893 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8350000 }
25895 /* or.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
25898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
25899 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8350000 }
25901 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
25904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25905 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0850000 }
25907 /* or.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
25910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25911 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a50000 }
25913 /* or.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
25916 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25917 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b50000 }
25919 /* or.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
25922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
25923 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b50000 }
25925 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
25928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25929 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0050000 }
25931 /* or.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
25934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25935 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0250000 }
25937 /* or.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
25940 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25941 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0350000 }
25943 /* or.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
25946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25947 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0350000 }
25949 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25953 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2050000 }
25955 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25959 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2250000 }
25961 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
25964 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25965 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2350000 }
25967 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
25970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25971 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2350000 }
25973 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25977 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4050000 }
25979 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25983 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4250000 }
25985 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
25988 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25989 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4350000 }
25991 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
25994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
25995 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4350000 }
25997 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
26000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26001 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6050000 }
26003 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
26006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26007 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6250000 }
26009 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
26012 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26013 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6350000 }
26015 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
26018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26019 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6350000 }
26021 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
26024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26025 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2850000 }
26027 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
26030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26031 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a50000 }
26033 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
26036 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26037 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b50000 }
26039 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
26042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26043 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b50000 }
26045 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
26048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26049 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4850000 }
26051 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
26054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26055 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a50000 }
26057 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
26060 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26061 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b50000 }
26063 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
26066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26067 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b50000 }
26069 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
26072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26073 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c50000 }
26075 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
26078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26079 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e50000 }
26081 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
26084 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26085 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f50000 }
26087 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
26090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26091 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f50000 }
26093 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
26096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26097 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c50000 }
26099 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
26102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26103 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e50000 }
26105 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
26108 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26109 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f50000 }
26111 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
26114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
26115 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f50000 }
26117 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
26120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
26121 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c50000 }
26123 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
26126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26127 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e50000 }
26129 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
26132 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26133 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f50000 }
26135 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
26138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
26139 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f50000 }
26141 /* or.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
26144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
26145 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6850000 }
26147 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
26150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
26151 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a50000 }
26153 /* or.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
26156 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
26157 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b50000 }
26159 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
26162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
26163 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b50000 }
26165 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
26168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26169 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8050000 }
26171 /* or.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
26174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26175 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8250000 }
26177 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
26180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26181 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0850000 }
26183 /* or.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
26186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26187 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a50000 }
26189 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
26192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26193 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0050000 }
26195 /* or.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
26198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26199 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0250000 }
26201 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
26204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26205 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2050000 }
26207 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
26210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26211 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2250000 }
26213 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
26216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26217 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4050000 }
26219 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
26222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26223 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4250000 }
26225 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
26228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26229 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6050000 }
26231 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
26234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26235 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6250000 }
26237 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
26240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
26241 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2850000 }
26243 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
26246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
26247 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a50000 }
26249 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
26252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
26253 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4850000 }
26255 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
26258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
26259 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a50000 }
26261 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
26264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
26265 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c50000 }
26267 /* or.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
26270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
26271 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e50000 }
26273 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
26276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
26277 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c50000 }
26279 /* or.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
26282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
26283 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e50000 }
26285 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
26288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
26289 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c50000 }
26291 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
26294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
26295 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e50000 }
26297 /* or.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
26300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
26301 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6850000 }
26303 /* or.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
26306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
26307 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a50000 }
26309 /* or.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
26312 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26313 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc805 }
26315 /* or.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
26318 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26319 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8825 }
26321 /* or.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
26324 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
26325 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8805 }
26327 /* or.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
26330 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26331 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc085 }
26333 /* or.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
26336 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26337 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a5 }
26339 /* or.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
26342 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
26343 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8085 }
26345 /* or.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
26348 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26349 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc005 }
26351 /* or.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
26354 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26355 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8025 }
26357 /* or.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
26360 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26361 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8005 }
26363 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
26366 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26367 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20500 }
26369 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
26372 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26373 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822500 }
26375 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
26378 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26379 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820500 }
26381 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
26384 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26385 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4050000 }
26387 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
26390 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26391 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84250000 }
26393 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
26396 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26397 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84050000 }
26399 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
26402 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26403 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6050000 }
26405 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
26408 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26409 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86250000 }
26411 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
26414 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
26415 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86050000 }
26417 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
26420 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26421 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28500 }
26423 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
26426 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26427 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a500 }
26429 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
26432 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26433 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828500 }
26435 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
26438 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26439 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4850000 }
26441 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
26444 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26445 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a50000 }
26447 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
26450 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26451 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84850000 }
26453 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
26456 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26457 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c500 }
26459 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
26462 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26463 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e500 }
26465 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
26468 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26469 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c500 }
26471 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
26474 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26475 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c50000 }
26477 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
26480 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26481 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e50000 }
26483 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
26486 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
26487 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c50000 }
26489 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
26492 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
26493 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c50000 }
26495 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
26498 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
26499 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e50000 }
26501 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
26504 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
26505 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c50000 }
26507 /* or.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
26510 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
26511 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6850000 }
26513 /* or.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
26516 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
26517 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a50000 }
26519 /* or.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
26522 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
26523 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86850000 }
26525 /* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
26528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26529 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x998000 }
26531 /* or.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
26534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26535 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x99a000 }
26537 /* or.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
26540 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26541 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x99b000 }
26543 /* or.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
26546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26547 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x998400 }
26549 /* or.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
26552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26553 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x99a400 }
26555 /* or.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
26558 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26559 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x99b400 }
26561 /* or.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
26564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26565 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x998600 }
26567 /* or.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
26570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26571 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x99a600 }
26573 /* or.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
26576 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26577 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x99b600 }
26579 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
26582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26583 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x99880000 }
26585 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
26588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26589 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x99a80000 }
26591 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
26594 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
26595 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x99b80000 }
26597 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
26600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26601 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x998c0000 }
26603 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
26606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26607 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x99ac0000 }
26609 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
26612 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
26613 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x99bc0000 }
26615 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
26618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26619 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x998a0000 }
26621 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
26624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26625 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x99aa0000 }
26627 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
26630 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
26631 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x99ba0000 }
26633 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
26636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26637 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x998e0000 }
26639 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
26642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26643 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x99ae0000 }
26645 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
26648 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
26649 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x99be0000 }
26651 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
26654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26655 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x998b0000 }
26657 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
26660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26661 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x99ab0000 }
26663 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
26666 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
26667 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x99bb0000 }
26669 /* or.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
26672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
26673 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x998f0000 }
26675 /* or.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
26678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
26679 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x99af0000 }
26681 /* or.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
26684 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
26685 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x99bf0000 }
26687 /* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
26690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26691 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x99c00000 }
26693 /* or.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
26696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
26697 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x99e00000 }
26699 /* or.w${G} ${Dsp-16-u16},$Dst16RnHI */
26702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
26703 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x99f00000 }
26705 /* or.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
26708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26709 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x99c40000 }
26711 /* or.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
26714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
26715 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x99e40000 }
26717 /* or.w${G} ${Dsp-16-u16},$Dst16AnHI */
26720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
26721 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x99f40000 }
26723 /* or.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
26726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26727 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x99c60000 }
26729 /* or.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
26732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
26733 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x99e60000 }
26735 /* or.w${G} ${Dsp-16-u16},[$Dst16An] */
26738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
26739 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x99f60000 }
26741 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
26744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26745 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x99c80000 }
26747 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
26750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26751 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x99e80000 }
26753 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
26756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
26757 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x99f80000 }
26759 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
26762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26763 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x99cc0000 }
26765 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
26768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26769 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x99ec0000 }
26771 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
26774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
26775 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x99fc0000 }
26777 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
26780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26781 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x99ca0000 }
26783 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
26786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26787 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x99ea0000 }
26789 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
26792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
26793 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x99fa0000 }
26795 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
26798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26799 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x99ce0000 }
26801 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
26804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26805 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x99ee0000 }
26807 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
26810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
26811 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x99fe0000 }
26813 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
26816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26817 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x99cb0000 }
26819 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
26822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26823 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x99eb0000 }
26825 /* or.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
26828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
26829 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x99fb0000 }
26831 /* or.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
26834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
26835 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x99cf0000 }
26837 /* or.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
26840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
26841 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x99ef0000 }
26843 /* or.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
26846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
26847 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x99ff0000 }
26849 /* or.w${G} $Src16RnHI,$Dst16RnHI */
26852 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
26853 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x9900 }
26855 /* or.w${G} $Src16AnHI,$Dst16RnHI */
26858 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
26859 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x9940 }
26861 /* or.w${G} [$Src16An],$Dst16RnHI */
26864 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
26865 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x9960 }
26867 /* or.w${G} $Src16RnHI,$Dst16AnHI */
26870 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
26871 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x9904 }
26873 /* or.w${G} $Src16AnHI,$Dst16AnHI */
26876 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
26877 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x9944 }
26879 /* or.w${G} [$Src16An],$Dst16AnHI */
26882 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
26883 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x9964 }
26885 /* or.w${G} $Src16RnHI,[$Dst16An] */
26888 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
26889 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x9906 }
26891 /* or.w${G} $Src16AnHI,[$Dst16An] */
26894 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
26895 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x9946 }
26897 /* or.w${G} [$Src16An],[$Dst16An] */
26900 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
26901 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x9966 }
26903 /* or.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
26906 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26907 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x990800 }
26909 /* or.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
26912 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26913 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x994800 }
26915 /* or.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
26918 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
26919 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x996800 }
26921 /* or.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
26924 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26925 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x990c0000 }
26927 /* or.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
26930 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26931 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x994c0000 }
26933 /* or.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
26936 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
26937 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x996c0000 }
26939 /* or.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
26942 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26943 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x990a00 }
26945 /* or.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
26948 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26949 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x994a00 }
26951 /* or.w${G} [$Src16An],${Dsp-16-u8}[sb] */
26954 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
26955 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x996a00 }
26957 /* or.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
26960 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26961 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x990e0000 }
26963 /* or.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
26966 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26967 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x994e0000 }
26969 /* or.w${G} [$Src16An],${Dsp-16-u16}[sb] */
26972 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
26973 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x996e0000 }
26975 /* or.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
26978 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26979 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x990b00 }
26981 /* or.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
26984 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26985 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x994b00 }
26987 /* or.w${G} [$Src16An],${Dsp-16-s8}[fb] */
26990 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
26991 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x996b00 }
26993 /* or.w${G} $Src16RnHI,${Dsp-16-u16} */
26996 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
26997 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x990f0000 }
26999 /* or.w${G} $Src16AnHI,${Dsp-16-u16} */
27002 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
27003 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x994f0000 }
27005 /* or.w${G} [$Src16An],${Dsp-16-u16} */
27008 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
27009 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x996f0000 }
27011 /* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
27014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27015 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x988000 }
27017 /* or.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
27020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27021 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x98a000 }
27023 /* or.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
27026 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27027 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x98b000 }
27029 /* or.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
27032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27033 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x988400 }
27035 /* or.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
27038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27039 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x98a400 }
27041 /* or.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
27044 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27045 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x98b400 }
27047 /* or.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
27050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27051 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x988600 }
27053 /* or.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
27056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27057 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x98a600 }
27059 /* or.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
27062 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27063 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x98b600 }
27065 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
27068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27069 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x98880000 }
27071 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
27074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27075 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x98a80000 }
27077 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
27080 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
27081 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x98b80000 }
27083 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
27086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27087 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x988c0000 }
27089 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
27092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27093 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x98ac0000 }
27095 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
27098 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
27099 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x98bc0000 }
27101 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
27104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27105 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x988a0000 }
27107 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
27110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27111 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x98aa0000 }
27113 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
27116 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
27117 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x98ba0000 }
27119 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
27122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27123 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x988e0000 }
27125 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
27128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27129 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x98ae0000 }
27131 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
27134 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
27135 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x98be0000 }
27137 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
27140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27141 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x988b0000 }
27143 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
27146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27147 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x98ab0000 }
27149 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
27152 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
27153 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x98bb0000 }
27155 /* or.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
27158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
27159 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x988f0000 }
27161 /* or.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
27164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
27165 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x98af0000 }
27167 /* or.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
27170 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
27171 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x98bf0000 }
27173 /* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
27176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27177 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x98c00000 }
27179 /* or.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
27182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
27183 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x98e00000 }
27185 /* or.b${G} ${Dsp-16-u16},$Dst16RnQI */
27188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
27189 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x98f00000 }
27191 /* or.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
27194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27195 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x98c40000 }
27197 /* or.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
27200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
27201 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x98e40000 }
27203 /* or.b${G} ${Dsp-16-u16},$Dst16AnQI */
27206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
27207 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x98f40000 }
27209 /* or.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
27212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27213 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x98c60000 }
27215 /* or.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
27218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
27219 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x98e60000 }
27221 /* or.b${G} ${Dsp-16-u16},[$Dst16An] */
27224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
27225 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x98f60000 }
27227 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
27230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27231 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x98c80000 }
27233 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
27236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27237 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x98e80000 }
27239 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
27242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
27243 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x98f80000 }
27245 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
27248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27249 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x98cc0000 }
27251 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
27254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27255 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x98ec0000 }
27257 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
27260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
27261 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x98fc0000 }
27263 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
27266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27267 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x98ca0000 }
27269 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
27272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27273 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x98ea0000 }
27275 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
27278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
27279 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x98fa0000 }
27281 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
27284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27285 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x98ce0000 }
27287 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
27290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27291 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x98ee0000 }
27293 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
27296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
27297 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x98fe0000 }
27299 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
27302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27303 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x98cb0000 }
27305 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
27308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27309 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x98eb0000 }
27311 /* or.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
27314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
27315 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x98fb0000 }
27317 /* or.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
27320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
27321 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x98cf0000 }
27323 /* or.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
27326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
27327 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x98ef0000 }
27329 /* or.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
27332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
27333 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x98ff0000 }
27335 /* or.b${G} $Src16RnQI,$Dst16RnQI */
27338 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
27339 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x9800 }
27341 /* or.b${G} $Src16AnQI,$Dst16RnQI */
27344 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
27345 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x9840 }
27347 /* or.b${G} [$Src16An],$Dst16RnQI */
27350 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
27351 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x9860 }
27353 /* or.b${G} $Src16RnQI,$Dst16AnQI */
27356 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
27357 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x9804 }
27359 /* or.b${G} $Src16AnQI,$Dst16AnQI */
27362 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
27363 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x9844 }
27365 /* or.b${G} [$Src16An],$Dst16AnQI */
27368 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
27369 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x9864 }
27371 /* or.b${G} $Src16RnQI,[$Dst16An] */
27374 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
27375 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x9806 }
27377 /* or.b${G} $Src16AnQI,[$Dst16An] */
27380 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
27381 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x9846 }
27383 /* or.b${G} [$Src16An],[$Dst16An] */
27386 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
27387 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x9866 }
27389 /* or.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
27392 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27393 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x980800 }
27395 /* or.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
27398 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27399 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x984800 }
27401 /* or.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
27404 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27405 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x986800 }
27407 /* or.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
27410 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27411 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x980c0000 }
27413 /* or.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
27416 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27417 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x984c0000 }
27419 /* or.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
27422 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27423 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x986c0000 }
27425 /* or.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
27428 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27429 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x980a00 }
27431 /* or.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
27434 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27435 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x984a00 }
27437 /* or.b${G} [$Src16An],${Dsp-16-u8}[sb] */
27440 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27441 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x986a00 }
27443 /* or.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
27446 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27447 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x980e0000 }
27449 /* or.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
27452 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27453 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x984e0000 }
27455 /* or.b${G} [$Src16An],${Dsp-16-u16}[sb] */
27458 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27459 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x986e0000 }
27461 /* or.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
27464 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27465 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x980b00 }
27467 /* or.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
27470 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27471 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x984b00 }
27473 /* or.b${G} [$Src16An],${Dsp-16-s8}[fb] */
27476 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27477 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x986b00 }
27479 /* or.b${G} $Src16RnQI,${Dsp-16-u16} */
27482 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
27483 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x980f0000 }
27485 /* or.b${G} $Src16AnQI,${Dsp-16-u16} */
27488 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
27489 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x984f0000 }
27491 /* or.b${G} [$Src16An],${Dsp-16-u16} */
27494 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
27495 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x986f0000 }
27497 /* or.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
27500 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27501 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x65000000 }
27503 /* or.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
27506 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27507 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x75000000 }
27509 /* or.w${S} #${Imm-24-HI},${Dsp-8-u16} */
27512 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
27513 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x55000000 }
27515 /* or.w${S} #${Imm-8-HI},r0 */
27518 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
27519 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x450000 }
27521 /* or.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
27524 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27525 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x640000 }
27527 /* or.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
27530 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27531 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x740000 }
27533 /* or.b${S} #${Imm-24-QI},${Dsp-8-u16} */
27536 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
27537 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x54000000 }
27539 /* or.b${S} #${Imm-8-QI},r0l */
27542 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
27543 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4400 }
27545 /* or.b${S} #${Imm-8-QI},r0l */
27548 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
27549 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x9c00 }
27551 /* or.b${S} #${Imm-8-QI},r0h */
27554 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
27555 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x9b00 }
27557 /* or.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
27560 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27561 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x9d0000 }
27563 /* or.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
27566 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27567 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x9e0000 }
27569 /* or.b${S} #${Imm-8-QI},${Dsp-16-u16} */
27572 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
27573 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x9f000000 }
27575 /* or.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
27578 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
27579 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x892f0000 }
27581 /* or.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
27584 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
27585 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81af0000 }
27587 /* or.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
27590 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27591 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x812f0000 }
27593 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
27596 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27597 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832f0000 }
27599 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
27602 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27603 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83af0000 }
27605 /* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
27608 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27609 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ef0000 }
27611 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
27614 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27615 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852f0000 }
27617 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
27620 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27621 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85af0000 }
27623 /* or.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
27626 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27627 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ef0000 }
27629 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
27632 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
27633 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ef0000 }
27635 /* or.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
27638 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27639 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872f0000 }
27641 /* or.w${G} #${Imm-40-HI},${Dsp-16-u24} */
27644 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
27645 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87af0000 }
27647 /* or.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
27650 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
27651 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x882f00 }
27653 /* or.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
27656 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
27657 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80af00 }
27659 /* or.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
27662 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27663 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x802f00 }
27665 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
27668 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27669 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822f0000 }
27671 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
27674 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27675 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82af0000 }
27677 /* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
27680 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27681 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ef0000 }
27683 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
27686 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27687 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842f0000 }
27689 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
27692 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27693 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84af0000 }
27695 /* or.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
27698 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27699 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ef0000 }
27701 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
27704 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
27705 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ef0000 }
27707 /* or.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
27710 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27711 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862f0000 }
27713 /* or.b${G} #${Imm-40-QI},${Dsp-16-u24} */
27716 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
27717 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86af0000 }
27719 /* or.w${G} #${Imm-16-HI},$Dst16RnHI */
27722 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
27723 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77300000 }
27725 /* or.w${G} #${Imm-16-HI},$Dst16AnHI */
27728 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
27729 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77340000 }
27731 /* or.w${G} #${Imm-16-HI},[$Dst16An] */
27734 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
27735 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77360000 }
27737 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
27740 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27741 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77380000 }
27743 /* or.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
27746 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27747 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x773a0000 }
27749 /* or.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
27752 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27753 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x773b0000 }
27755 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
27758 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27759 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x773c0000 }
27761 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
27764 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27765 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x773e0000 }
27767 /* or.w${G} #${Imm-32-HI},${Dsp-16-u16} */
27770 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
27771 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x773f0000 }
27773 /* or.b${G} #${Imm-16-QI},$Dst16RnQI */
27776 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
27777 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x763000 }
27779 /* or.b${G} #${Imm-16-QI},$Dst16AnQI */
27782 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
27783 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x763400 }
27785 /* or.b${G} #${Imm-16-QI},[$Dst16An] */
27788 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
27789 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x763600 }
27791 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
27794 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
27795 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76380000 }
27797 /* or.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
27800 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27801 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x763a0000 }
27803 /* or.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
27806 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27807 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x763b0000 }
27809 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
27812 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
27813 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x763c0000 }
27815 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
27818 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27819 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x763e0000 }
27821 /* or.b${G} #${Imm-32-QI},${Dsp-16-u16} */
27824 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
27825 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x763f0000 }
27830 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
27831 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xbc }
27836 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
27837 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xbb }
27839 /* not.b:s ${Dsp-8-u8}[sb] */
27842 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
27843 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xbd00 }
27845 /* not.b:s ${Dsp-8-s8}[fb] */
27848 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
27849 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xbe00 }
27851 /* not.b:s ${Dsp-8-u16} */
27854 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
27855 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xbf0000 }
27857 /* not.w${G} $Dst32RnUnprefixedHI */
27860 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
27861 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa91e }
27863 /* not.w${G} $Dst32AnUnprefixedHI */
27866 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
27867 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa19e }
27869 /* not.w${G} [$Dst32AnUnprefixed] */
27872 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27873 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa11e }
27875 /* not.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
27878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27879 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa31e00 }
27881 /* not.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
27884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27885 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa51e0000 }
27887 /* not.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
27890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27891 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa71e0000 }
27893 /* not.w${G} ${Dsp-16-u8}[sb] */
27896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27897 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa39e00 }
27899 /* not.w${G} ${Dsp-16-u16}[sb] */
27902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27903 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa59e0000 }
27905 /* not.w${G} ${Dsp-16-s8}[fb] */
27908 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27909 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3de00 }
27911 /* not.w${G} ${Dsp-16-s16}[fb] */
27914 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27915 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5de0000 }
27917 /* not.w${G} ${Dsp-16-u16} */
27920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
27921 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7de0000 }
27923 /* not.w${G} ${Dsp-16-u24} */
27926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), 0 } },
27927 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa79e0000 }
27929 /* not.b${G} $Dst32RnUnprefixedQI */
27932 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
27933 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa81e }
27935 /* not.b${G} $Dst32AnUnprefixedQI */
27938 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
27939 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa09e }
27941 /* not.b${G} [$Dst32AnUnprefixed] */
27944 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27945 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa01e }
27947 /* not.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed] */
27950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27951 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa21e00 }
27953 /* not.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed] */
27956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27957 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa41e0000 }
27959 /* not.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed] */
27962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
27963 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa61e0000 }
27965 /* not.b${G} ${Dsp-16-u8}[sb] */
27968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
27969 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa29e00 }
27971 /* not.b${G} ${Dsp-16-u16}[sb] */
27974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
27975 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa49e0000 }
27977 /* not.b${G} ${Dsp-16-s8}[fb] */
27980 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
27981 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2de00 }
27983 /* not.b${G} ${Dsp-16-s16}[fb] */
27986 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
27987 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4de0000 }
27989 /* not.b${G} ${Dsp-16-u16} */
27992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
27993 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6de0000 }
27995 /* not.b${G} ${Dsp-16-u24} */
27998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), 0 } },
27999 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa69e0000 }
28001 /* not.w${G} $Dst16RnHI */
28004 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), 0 } },
28005 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7570 }
28007 /* not.w${G} $Dst16AnHI */
28010 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), 0 } },
28011 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7574 }
28013 /* not.w${G} [$Dst16An] */
28016 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
28017 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7576 }
28019 /* not.w${G} ${Dsp-16-u8}[$Dst16An] */
28022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28023 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x757800 }
28025 /* not.w${G} ${Dsp-16-u16}[$Dst16An] */
28028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28029 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x757c0000 }
28031 /* not.w${G} ${Dsp-16-u8}[sb] */
28034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28035 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x757a00 }
28037 /* not.w${G} ${Dsp-16-u16}[sb] */
28040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28041 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x757e0000 }
28043 /* not.w${G} ${Dsp-16-s8}[fb] */
28046 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28047 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x757b00 }
28049 /* not.w${G} ${Dsp-16-u16} */
28052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
28053 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x757f0000 }
28055 /* not.b${G} $Dst16RnQI */
28058 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), 0 } },
28059 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7470 }
28061 /* not.b${G} $Dst16AnQI */
28064 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), 0 } },
28065 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7474 }
28067 /* not.b${G} [$Dst16An] */
28070 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', 0 } },
28071 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7476 }
28073 /* not.b${G} ${Dsp-16-u8}[$Dst16An] */
28076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28077 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x747800 }
28079 /* not.b${G} ${Dsp-16-u16}[$Dst16An] */
28082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28083 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x747c0000 }
28085 /* not.b${G} ${Dsp-16-u8}[sb] */
28088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28089 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x747a00 }
28091 /* not.b${G} ${Dsp-16-u16}[sb] */
28094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28095 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x747e0000 }
28097 /* not.b${G} ${Dsp-16-s8}[fb] */
28100 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28101 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x747b00 }
28103 /* not.b${G} ${Dsp-16-u16} */
28106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), 0 } },
28107 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x747f0000 }
28109 /* neg.w $Dst32RnUnprefixedHI */
28112 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
28113 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa92f }
28115 /* neg.w $Dst32AnUnprefixedHI */
28118 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
28119 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa1af }
28121 /* neg.w [$Dst32AnUnprefixed] */
28124 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28125 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa12f }
28127 /* neg.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
28130 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28131 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa32f00 }
28133 /* neg.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
28136 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28137 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa52f0000 }
28139 /* neg.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
28142 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28143 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa72f0000 }
28145 /* neg.w ${Dsp-16-u8}[sb] */
28148 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28149 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa3af00 }
28151 /* neg.w ${Dsp-16-u16}[sb] */
28154 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28155 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa5af0000 }
28157 /* neg.w ${Dsp-16-s8}[fb] */
28160 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28161 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ef00 }
28163 /* neg.w ${Dsp-16-s16}[fb] */
28166 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
28167 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ef0000 }
28169 /* neg.w ${Dsp-16-u16} */
28172 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28173 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ef0000 }
28175 /* neg.w ${Dsp-16-u24} */
28178 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
28179 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa7af0000 }
28181 /* neg.b $Dst32RnUnprefixedQI */
28184 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
28185 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa82f }
28187 /* neg.b $Dst32AnUnprefixedQI */
28190 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
28191 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0af }
28193 /* neg.b [$Dst32AnUnprefixed] */
28196 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28197 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa02f }
28199 /* neg.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
28202 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28203 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22f00 }
28205 /* neg.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
28208 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28209 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa42f0000 }
28211 /* neg.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
28214 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28215 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa62f0000 }
28217 /* neg.b ${Dsp-16-u8}[sb] */
28220 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28221 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2af00 }
28223 /* neg.b ${Dsp-16-u16}[sb] */
28226 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28227 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4af0000 }
28229 /* neg.b ${Dsp-16-s8}[fb] */
28232 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28233 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ef00 }
28235 /* neg.b ${Dsp-16-s16}[fb] */
28238 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
28239 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ef0000 }
28241 /* neg.b ${Dsp-16-u16} */
28244 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28245 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ef0000 }
28247 /* neg.b ${Dsp-16-u24} */
28250 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
28251 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6af0000 }
28253 /* neg.w $Dst16RnHI */
28256 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
28257 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7550 }
28259 /* neg.w $Dst16AnHI */
28262 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
28263 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7554 }
28265 /* neg.w [$Dst16An] */
28268 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
28269 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7556 }
28271 /* neg.w ${Dsp-16-u8}[$Dst16An] */
28274 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28275 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x755800 }
28277 /* neg.w ${Dsp-16-u16}[$Dst16An] */
28280 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28281 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x755c0000 }
28283 /* neg.w ${Dsp-16-u8}[sb] */
28286 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28287 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x755a00 }
28289 /* neg.w ${Dsp-16-u16}[sb] */
28292 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28293 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x755e0000 }
28295 /* neg.w ${Dsp-16-s8}[fb] */
28298 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28299 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x755b00 }
28301 /* neg.w ${Dsp-16-u16} */
28304 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28305 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x755f0000 }
28307 /* neg.b $Dst16RnQI */
28310 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
28311 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7450 }
28313 /* neg.b $Dst16AnQI */
28316 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
28317 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7454 }
28319 /* neg.b [$Dst16An] */
28322 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
28323 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7456 }
28325 /* neg.b ${Dsp-16-u8}[$Dst16An] */
28328 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
28329 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x745800 }
28331 /* neg.b ${Dsp-16-u16}[$Dst16An] */
28334 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
28335 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x745c0000 }
28337 /* neg.b ${Dsp-16-u8}[sb] */
28340 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
28341 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x745a00 }
28343 /* neg.b ${Dsp-16-u16}[sb] */
28346 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
28347 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x745e0000 }
28349 /* neg.b ${Dsp-16-s8}[fb] */
28352 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
28353 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x745b00 }
28355 /* neg.b ${Dsp-16-u16} */
28358 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
28359 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x745f0000 }
28361 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28365 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990400 }
28367 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
28370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28371 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992400 }
28373 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
28376 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28377 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993400 }
28379 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28383 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918400 }
28385 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
28388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28389 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a400 }
28391 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
28394 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28395 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b400 }
28397 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28401 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910400 }
28403 /* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
28406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28407 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912400 }
28409 /* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
28412 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28413 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913400 }
28415 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28419 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93040000 }
28421 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28425 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93240000 }
28427 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
28430 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28431 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93340000 }
28433 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28437 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95040000 }
28439 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28443 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95240000 }
28445 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
28448 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28449 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95340000 }
28451 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28455 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97040000 }
28457 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28461 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97240000 }
28463 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
28466 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28467 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97340000 }
28469 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
28472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28473 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93840000 }
28475 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
28478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28479 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a40000 }
28481 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
28484 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
28485 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b40000 }
28487 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
28490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28491 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95840000 }
28493 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
28496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28497 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a40000 }
28499 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
28502 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
28503 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b40000 }
28505 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
28508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28509 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c40000 }
28511 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
28514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28515 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e40000 }
28517 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
28520 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
28521 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f40000 }
28523 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
28526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28527 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c40000 }
28529 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
28532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28533 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e40000 }
28535 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
28538 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
28539 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f40000 }
28541 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
28544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
28545 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c40000 }
28547 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
28550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
28551 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e40000 }
28553 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
28556 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
28557 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f40000 }
28559 /* mulu.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
28562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
28563 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97840000 }
28565 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
28568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
28569 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a40000 }
28571 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
28574 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
28575 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b40000 }
28577 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28581 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9040000 }
28583 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
28586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28587 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9240000 }
28589 /* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
28592 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28593 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9340000 }
28595 /* mulu.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
28598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28599 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9340000 }
28601 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28605 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1840000 }
28607 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
28610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28611 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a40000 }
28613 /* mulu.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
28616 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28617 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b40000 }
28619 /* mulu.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
28622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28623 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b40000 }
28625 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28629 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1040000 }
28631 /* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
28634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28635 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1240000 }
28637 /* mulu.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
28640 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28641 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1340000 }
28643 /* mulu.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
28646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28647 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1340000 }
28649 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28653 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3040000 }
28655 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28659 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3240000 }
28661 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
28664 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28665 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3340000 }
28667 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
28670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28671 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3340000 }
28673 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28677 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5040000 }
28679 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28683 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5240000 }
28685 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
28688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28689 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5340000 }
28691 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
28694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28695 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5340000 }
28697 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28701 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7040000 }
28703 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28707 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7240000 }
28709 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
28712 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28713 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7340000 }
28715 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
28718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28719 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7340000 }
28721 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
28724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28725 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3840000 }
28727 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
28730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28731 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a40000 }
28733 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
28736 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28737 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b40000 }
28739 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
28742 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
28743 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b40000 }
28745 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
28748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28749 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5840000 }
28751 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
28754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28755 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a40000 }
28757 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
28760 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28761 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b40000 }
28763 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
28766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
28767 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b40000 }
28769 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
28772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28773 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c40000 }
28775 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
28778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28779 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e40000 }
28781 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
28784 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28785 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f40000 }
28787 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
28790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
28791 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f40000 }
28793 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
28796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28797 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c40000 }
28799 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
28802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28803 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e40000 }
28805 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
28808 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28809 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f40000 }
28811 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
28814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
28815 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f40000 }
28817 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
28820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
28821 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c40000 }
28823 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
28826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
28827 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e40000 }
28829 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
28832 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
28833 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f40000 }
28835 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
28838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
28839 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f40000 }
28841 /* mulu.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
28844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
28845 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7840000 }
28847 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
28850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
28851 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a40000 }
28853 /* mulu.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
28856 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
28857 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b40000 }
28859 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
28862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
28863 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b40000 }
28865 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
28868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28869 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9040000 }
28871 /* mulu.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
28874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
28875 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9240000 }
28877 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
28880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28881 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1840000 }
28883 /* mulu.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
28886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
28887 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a40000 }
28889 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
28892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28893 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1040000 }
28895 /* mulu.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
28898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28899 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1240000 }
28901 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
28904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28905 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3040000 }
28907 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
28910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28911 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3240000 }
28913 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
28916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28917 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5040000 }
28919 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
28922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28923 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5240000 }
28925 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
28928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28929 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7040000 }
28931 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
28934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
28935 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7240000 }
28937 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
28940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
28941 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3840000 }
28943 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
28946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
28947 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a40000 }
28949 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
28952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
28953 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5840000 }
28955 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
28958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
28959 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a40000 }
28961 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
28964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
28965 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c40000 }
28967 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
28970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
28971 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e40000 }
28973 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
28976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
28977 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c40000 }
28979 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
28982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
28983 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e40000 }
28985 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
28988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
28989 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c40000 }
28991 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
28994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
28995 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e40000 }
28997 /* mulu.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
29000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
29001 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7840000 }
29003 /* mulu.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
29006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
29007 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a40000 }
29009 /* mulu.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
29012 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29013 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc904 }
29015 /* mulu.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
29018 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29019 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8924 }
29021 /* mulu.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
29024 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
29025 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8904 }
29027 /* mulu.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
29030 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29031 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc184 }
29033 /* mulu.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
29036 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29037 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a4 }
29039 /* mulu.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
29042 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
29043 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8184 }
29045 /* mulu.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
29048 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29049 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc104 }
29051 /* mulu.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
29054 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29055 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8124 }
29057 /* mulu.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29060 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29061 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8104 }
29063 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29066 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29067 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30400 }
29069 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29072 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29073 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832400 }
29075 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
29078 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29079 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830400 }
29081 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29084 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29085 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5040000 }
29087 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29090 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29091 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85240000 }
29093 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
29096 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29097 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85040000 }
29099 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29102 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29103 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7040000 }
29105 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29108 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29109 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87240000 }
29111 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
29114 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29115 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87040000 }
29117 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
29120 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29121 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38400 }
29123 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
29126 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29127 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a400 }
29129 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
29132 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29133 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838400 }
29135 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
29138 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29139 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5840000 }
29141 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
29144 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29145 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a40000 }
29147 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
29150 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
29151 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85840000 }
29153 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
29156 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29157 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c400 }
29159 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
29162 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29163 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e400 }
29165 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
29168 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
29169 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c400 }
29171 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
29174 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29175 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c40000 }
29177 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
29180 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29181 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e40000 }
29183 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
29186 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
29187 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c40000 }
29189 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
29192 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
29193 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c40000 }
29195 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
29198 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
29199 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e40000 }
29201 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
29204 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
29205 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c40000 }
29207 /* mulu.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
29210 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
29211 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7840000 }
29213 /* mulu.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
29216 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
29217 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a40000 }
29219 /* mulu.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
29222 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
29223 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87840000 }
29225 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29229 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980400 }
29231 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
29234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29235 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982400 }
29237 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
29240 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29241 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983400 }
29243 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29247 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908400 }
29249 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
29252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29253 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a400 }
29255 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
29258 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29259 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b400 }
29261 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29265 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900400 }
29267 /* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
29270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29271 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902400 }
29273 /* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
29276 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29277 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903400 }
29279 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29283 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92040000 }
29285 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29289 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92240000 }
29291 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
29294 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29295 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92340000 }
29297 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29301 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94040000 }
29303 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29307 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94240000 }
29309 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
29312 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29313 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94340000 }
29315 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29319 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96040000 }
29321 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29325 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96240000 }
29327 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
29330 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29331 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96340000 }
29333 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
29336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29337 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92840000 }
29339 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
29342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29343 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a40000 }
29345 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
29348 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
29349 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b40000 }
29351 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
29354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29355 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94840000 }
29357 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
29360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29361 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a40000 }
29363 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
29366 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
29367 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b40000 }
29369 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
29372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29373 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c40000 }
29375 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
29378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29379 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e40000 }
29381 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
29384 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
29385 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f40000 }
29387 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
29390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29391 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c40000 }
29393 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
29396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29397 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e40000 }
29399 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
29402 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
29403 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f40000 }
29405 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
29408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
29409 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c40000 }
29411 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
29414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
29415 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e40000 }
29417 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
29420 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
29421 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f40000 }
29423 /* mulu.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
29426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
29427 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96840000 }
29429 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
29432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
29433 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a40000 }
29435 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
29438 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
29439 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b40000 }
29441 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29445 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8040000 }
29447 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
29450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29451 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8240000 }
29453 /* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
29456 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29457 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8340000 }
29459 /* mulu.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
29462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29463 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8340000 }
29465 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29469 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0840000 }
29471 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
29474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29475 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a40000 }
29477 /* mulu.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
29480 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29481 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b40000 }
29483 /* mulu.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
29486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29487 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b40000 }
29489 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29493 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0040000 }
29495 /* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
29498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29499 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0240000 }
29501 /* mulu.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
29504 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29505 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0340000 }
29507 /* mulu.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
29510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29511 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0340000 }
29513 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29517 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2040000 }
29519 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29523 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2240000 }
29525 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
29528 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29529 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2340000 }
29531 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
29534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29535 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2340000 }
29537 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29541 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4040000 }
29543 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29547 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4240000 }
29549 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
29552 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29553 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4340000 }
29555 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
29558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29559 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4340000 }
29561 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29565 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6040000 }
29567 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29571 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6240000 }
29573 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
29576 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29577 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6340000 }
29579 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
29582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29583 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6340000 }
29585 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
29588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29589 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2840000 }
29591 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
29594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29595 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a40000 }
29597 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
29600 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29601 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b40000 }
29603 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
29606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
29607 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b40000 }
29609 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
29612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29613 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4840000 }
29615 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
29618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29619 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a40000 }
29621 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
29624 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29625 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b40000 }
29627 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
29630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
29631 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b40000 }
29633 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
29636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29637 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c40000 }
29639 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
29642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29643 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e40000 }
29645 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
29648 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29649 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f40000 }
29651 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
29654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
29655 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f40000 }
29657 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
29660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29661 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c40000 }
29663 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
29666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29667 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e40000 }
29669 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
29672 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29673 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f40000 }
29675 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
29678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
29679 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f40000 }
29681 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
29684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
29685 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c40000 }
29687 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
29690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
29691 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e40000 }
29693 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
29696 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
29697 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f40000 }
29699 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
29702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
29703 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f40000 }
29705 /* mulu.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
29708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
29709 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6840000 }
29711 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
29714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
29715 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a40000 }
29717 /* mulu.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
29720 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
29721 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b40000 }
29723 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
29726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
29727 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b40000 }
29729 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29733 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8040000 }
29735 /* mulu.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
29738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29739 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8240000 }
29741 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29745 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0840000 }
29747 /* mulu.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
29750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29751 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a40000 }
29753 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29757 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0040000 }
29759 /* mulu.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
29762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29763 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0240000 }
29765 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
29768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29769 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2040000 }
29771 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
29774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29775 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2240000 }
29777 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
29780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29781 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4040000 }
29783 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
29786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29787 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4240000 }
29789 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
29792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29793 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6040000 }
29795 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
29798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29799 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6240000 }
29801 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
29804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
29805 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2840000 }
29807 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
29810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
29811 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a40000 }
29813 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
29816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
29817 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4840000 }
29819 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
29822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
29823 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a40000 }
29825 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
29828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
29829 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c40000 }
29831 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
29834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
29835 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e40000 }
29837 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
29840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
29841 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c40000 }
29843 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
29846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
29847 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e40000 }
29849 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
29852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
29853 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c40000 }
29855 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
29858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
29859 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e40000 }
29861 /* mulu.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
29864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
29865 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6840000 }
29867 /* mulu.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
29870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
29871 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a40000 }
29873 /* mulu.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
29876 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29877 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc804 }
29879 /* mulu.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
29882 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29883 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8824 }
29885 /* mulu.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
29888 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
29889 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8804 }
29891 /* mulu.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
29894 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29895 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc084 }
29897 /* mulu.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
29900 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29901 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a4 }
29903 /* mulu.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
29906 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
29907 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8084 }
29909 /* mulu.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
29912 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29913 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc004 }
29915 /* mulu.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
29918 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29919 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8024 }
29921 /* mulu.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
29924 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29925 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8004 }
29927 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29930 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29931 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20400 }
29933 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
29936 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29937 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822400 }
29939 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
29942 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29943 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820400 }
29945 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29948 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29949 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4040000 }
29951 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
29954 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29955 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84240000 }
29957 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
29960 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29961 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84040000 }
29963 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29966 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29967 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6040000 }
29969 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
29972 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29973 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86240000 }
29975 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
29978 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
29979 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86040000 }
29981 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
29984 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29985 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28400 }
29987 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
29990 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29991 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a400 }
29993 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
29996 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
29997 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828400 }
29999 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
30002 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30003 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4840000 }
30005 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
30008 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30009 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a40000 }
30011 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
30014 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30015 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84840000 }
30017 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
30020 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30021 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c400 }
30023 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
30026 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30027 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e400 }
30029 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
30032 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30033 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c400 }
30035 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
30038 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30039 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c40000 }
30041 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
30044 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30045 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e40000 }
30047 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
30050 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
30051 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c40000 }
30053 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
30056 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
30057 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c40000 }
30059 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
30062 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
30063 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e40000 }
30065 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
30068 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
30069 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c40000 }
30071 /* mulu.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
30074 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
30075 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6840000 }
30077 /* mulu.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
30080 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
30081 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a40000 }
30083 /* mulu.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
30086 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
30087 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86840000 }
30089 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
30092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30093 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x718000 }
30095 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
30098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30099 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x71a000 }
30101 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
30104 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30105 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x71b000 }
30107 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
30110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30111 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x718400 }
30113 /* mulu.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
30116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30117 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x71a400 }
30119 /* mulu.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
30122 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30123 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x71b400 }
30125 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
30128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30129 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x718600 }
30131 /* mulu.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
30134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30135 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x71a600 }
30137 /* mulu.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
30140 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30141 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x71b600 }
30143 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
30146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30147 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x71880000 }
30149 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
30152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30153 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x71a80000 }
30155 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
30158 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30159 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x71b80000 }
30161 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
30164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30165 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x718c0000 }
30167 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
30170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30171 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x71ac0000 }
30173 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
30176 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30177 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x71bc0000 }
30179 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
30182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30183 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x718a0000 }
30185 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
30188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30189 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x71aa0000 }
30191 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
30194 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30195 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x71ba0000 }
30197 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
30200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30201 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x718e0000 }
30203 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
30206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30207 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x71ae0000 }
30209 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
30212 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30213 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x71be0000 }
30215 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
30218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30219 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x718b0000 }
30221 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
30224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30225 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x71ab0000 }
30227 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
30230 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30231 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x71bb0000 }
30233 /* mulu.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
30236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
30237 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x718f0000 }
30239 /* mulu.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
30242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30243 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x71af0000 }
30245 /* mulu.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
30248 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30249 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x71bf0000 }
30251 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
30254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30255 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x71c00000 }
30257 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
30260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
30261 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x71e00000 }
30263 /* mulu.w${G} ${Dsp-16-u16},$Dst16RnHI */
30266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
30267 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x71f00000 }
30269 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
30272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30273 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x71c40000 }
30275 /* mulu.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
30278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
30279 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x71e40000 }
30281 /* mulu.w${G} ${Dsp-16-u16},$Dst16AnHI */
30284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
30285 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x71f40000 }
30287 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
30290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30291 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x71c60000 }
30293 /* mulu.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
30296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30297 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x71e60000 }
30299 /* mulu.w${G} ${Dsp-16-u16},[$Dst16An] */
30302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
30303 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x71f60000 }
30305 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
30308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30309 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x71c80000 }
30311 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
30314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30315 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x71e80000 }
30317 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
30320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30321 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x71f80000 }
30323 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
30326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30327 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x71cc0000 }
30329 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
30332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30333 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x71ec0000 }
30335 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
30338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30339 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x71fc0000 }
30341 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
30344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30345 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x71ca0000 }
30347 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
30350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30351 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x71ea0000 }
30353 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
30356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30357 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x71fa0000 }
30359 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
30362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30363 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x71ce0000 }
30365 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
30368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30369 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x71ee0000 }
30371 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
30374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30375 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x71fe0000 }
30377 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
30380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30381 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x71cb0000 }
30383 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
30386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30387 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x71eb0000 }
30389 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
30392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30393 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x71fb0000 }
30395 /* mulu.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
30398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
30399 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x71cf0000 }
30401 /* mulu.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
30404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
30405 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x71ef0000 }
30407 /* mulu.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
30410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
30411 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x71ff0000 }
30413 /* mulu.w${G} $Src16RnHI,$Dst16RnHI */
30416 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
30417 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7100 }
30419 /* mulu.w${G} $Src16AnHI,$Dst16RnHI */
30422 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
30423 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7140 }
30425 /* mulu.w${G} [$Src16An],$Dst16RnHI */
30428 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
30429 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7160 }
30431 /* mulu.w${G} $Src16RnHI,$Dst16AnHI */
30434 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
30435 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7104 }
30437 /* mulu.w${G} $Src16AnHI,$Dst16AnHI */
30440 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
30441 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7144 }
30443 /* mulu.w${G} [$Src16An],$Dst16AnHI */
30446 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
30447 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7164 }
30449 /* mulu.w${G} $Src16RnHI,[$Dst16An] */
30452 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
30453 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7106 }
30455 /* mulu.w${G} $Src16AnHI,[$Dst16An] */
30458 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
30459 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7146 }
30461 /* mulu.w${G} [$Src16An],[$Dst16An] */
30464 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30465 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7166 }
30467 /* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
30470 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30471 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x710800 }
30473 /* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
30476 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30477 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x714800 }
30479 /* mulu.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
30482 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30483 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x716800 }
30485 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
30488 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30489 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x710c0000 }
30491 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
30494 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30495 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x714c0000 }
30497 /* mulu.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
30500 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30501 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x716c0000 }
30503 /* mulu.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
30506 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30507 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x710a00 }
30509 /* mulu.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
30512 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30513 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x714a00 }
30515 /* mulu.w${G} [$Src16An],${Dsp-16-u8}[sb] */
30518 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30519 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x716a00 }
30521 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
30524 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30525 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x710e0000 }
30527 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
30530 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30531 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x714e0000 }
30533 /* mulu.w${G} [$Src16An],${Dsp-16-u16}[sb] */
30536 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
30537 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x716e0000 }
30539 /* mulu.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
30542 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30543 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x710b00 }
30545 /* mulu.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
30548 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30549 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x714b00 }
30551 /* mulu.w${G} [$Src16An],${Dsp-16-s8}[fb] */
30554 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
30555 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x716b00 }
30557 /* mulu.w${G} $Src16RnHI,${Dsp-16-u16} */
30560 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
30561 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x710f0000 }
30563 /* mulu.w${G} $Src16AnHI,${Dsp-16-u16} */
30566 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
30567 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x714f0000 }
30569 /* mulu.w${G} [$Src16An],${Dsp-16-u16} */
30572 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
30573 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x716f0000 }
30575 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
30578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30579 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x708000 }
30581 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
30584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30585 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x70a000 }
30587 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
30590 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30591 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x70b000 }
30593 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
30596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30597 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x708400 }
30599 /* mulu.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
30602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30603 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x70a400 }
30605 /* mulu.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
30608 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30609 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x70b400 }
30611 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
30614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30615 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x708600 }
30617 /* mulu.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
30620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30621 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x70a600 }
30623 /* mulu.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
30626 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30627 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x70b600 }
30629 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
30632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30633 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x70880000 }
30635 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
30638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30639 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x70a80000 }
30641 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
30644 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
30645 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x70b80000 }
30647 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
30650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30651 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x708c0000 }
30653 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
30656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30657 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x70ac0000 }
30659 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
30662 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
30663 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x70bc0000 }
30665 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
30668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30669 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x708a0000 }
30671 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
30674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30675 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x70aa0000 }
30677 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
30680 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
30681 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x70ba0000 }
30683 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
30686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30687 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x708e0000 }
30689 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
30692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30693 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x70ae0000 }
30695 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
30698 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
30699 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x70be0000 }
30701 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
30704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30705 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x708b0000 }
30707 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
30710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30711 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x70ab0000 }
30713 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
30716 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
30717 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x70bb0000 }
30719 /* mulu.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
30722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
30723 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x708f0000 }
30725 /* mulu.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
30728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30729 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x70af0000 }
30731 /* mulu.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
30734 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
30735 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x70bf0000 }
30737 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
30740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30741 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x70c00000 }
30743 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
30746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
30747 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x70e00000 }
30749 /* mulu.b${G} ${Dsp-16-u16},$Dst16RnQI */
30752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
30753 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x70f00000 }
30755 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
30758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30759 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x70c40000 }
30761 /* mulu.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
30764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
30765 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x70e40000 }
30767 /* mulu.b${G} ${Dsp-16-u16},$Dst16AnQI */
30770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
30771 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x70f40000 }
30773 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
30776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30777 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x70c60000 }
30779 /* mulu.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
30782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
30783 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x70e60000 }
30785 /* mulu.b${G} ${Dsp-16-u16},[$Dst16An] */
30788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
30789 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x70f60000 }
30791 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
30794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30795 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x70c80000 }
30797 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
30800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30801 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x70e80000 }
30803 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
30806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
30807 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x70f80000 }
30809 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
30812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30813 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x70cc0000 }
30815 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
30818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30819 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x70ec0000 }
30821 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
30824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
30825 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x70fc0000 }
30827 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
30830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30831 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x70ca0000 }
30833 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
30836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30837 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x70ea0000 }
30839 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
30842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
30843 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x70fa0000 }
30845 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
30848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30849 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x70ce0000 }
30851 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
30854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30855 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x70ee0000 }
30857 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
30860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
30861 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x70fe0000 }
30863 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
30866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30867 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x70cb0000 }
30869 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
30872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30873 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x70eb0000 }
30875 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
30878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
30879 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x70fb0000 }
30881 /* mulu.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
30884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
30885 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x70cf0000 }
30887 /* mulu.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
30890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
30891 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x70ef0000 }
30893 /* mulu.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
30896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
30897 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x70ff0000 }
30899 /* mulu.b${G} $Src16RnQI,$Dst16RnQI */
30902 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
30903 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7000 }
30905 /* mulu.b${G} $Src16AnQI,$Dst16RnQI */
30908 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
30909 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7040 }
30911 /* mulu.b${G} [$Src16An],$Dst16RnQI */
30914 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
30915 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7060 }
30917 /* mulu.b${G} $Src16RnQI,$Dst16AnQI */
30920 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
30921 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7004 }
30923 /* mulu.b${G} $Src16AnQI,$Dst16AnQI */
30926 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
30927 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7044 }
30929 /* mulu.b${G} [$Src16An],$Dst16AnQI */
30932 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
30933 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7064 }
30935 /* mulu.b${G} $Src16RnQI,[$Dst16An] */
30938 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
30939 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7006 }
30941 /* mulu.b${G} $Src16AnQI,[$Dst16An] */
30944 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
30945 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7046 }
30947 /* mulu.b${G} [$Src16An],[$Dst16An] */
30950 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
30951 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7066 }
30953 /* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
30956 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30957 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x700800 }
30959 /* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
30962 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30963 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x704800 }
30965 /* mulu.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
30968 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
30969 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x706800 }
30971 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
30974 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30975 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x700c0000 }
30977 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
30980 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30981 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x704c0000 }
30983 /* mulu.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
30986 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
30987 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x706c0000 }
30989 /* mulu.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
30992 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30993 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x700a00 }
30995 /* mulu.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
30998 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
30999 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x704a00 }
31001 /* mulu.b${G} [$Src16An],${Dsp-16-u8}[sb] */
31004 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31005 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x706a00 }
31007 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
31010 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31011 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x700e0000 }
31013 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
31016 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31017 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x704e0000 }
31019 /* mulu.b${G} [$Src16An],${Dsp-16-u16}[sb] */
31022 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31023 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x706e0000 }
31025 /* mulu.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
31028 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31029 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x700b00 }
31031 /* mulu.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
31034 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31035 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x704b00 }
31037 /* mulu.b${G} [$Src16An],${Dsp-16-s8}[fb] */
31040 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31041 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x706b00 }
31043 /* mulu.b${G} $Src16RnQI,${Dsp-16-u16} */
31046 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
31047 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x700f0000 }
31049 /* mulu.b${G} $Src16AnQI,${Dsp-16-u16} */
31052 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
31053 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x704f0000 }
31055 /* mulu.b${G} [$Src16An],${Dsp-16-u16} */
31058 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
31059 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x706f0000 }
31061 /* mulu.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
31064 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31065 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x890f0000 }
31067 /* mulu.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
31070 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31071 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x818f0000 }
31073 /* mulu.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
31076 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31077 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x810f0000 }
31079 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
31082 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31083 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830f0000 }
31085 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
31088 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31089 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838f0000 }
31091 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
31094 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31095 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cf0000 }
31097 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
31100 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31101 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850f0000 }
31103 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
31106 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31107 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858f0000 }
31109 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
31112 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31113 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cf0000 }
31115 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
31118 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
31119 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cf0000 }
31121 /* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
31124 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31125 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870f0000 }
31127 /* mulu.w${G} #${Imm-40-HI},${Dsp-16-u24} */
31130 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
31131 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x878f0000 }
31133 /* mulu.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
31136 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
31137 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x880f00 }
31139 /* mulu.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
31142 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
31143 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x808f00 }
31145 /* mulu.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
31148 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31149 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x800f00 }
31151 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
31154 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31155 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820f0000 }
31157 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
31160 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31161 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828f0000 }
31163 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
31166 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31167 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cf0000 }
31169 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
31172 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31173 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840f0000 }
31175 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
31178 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31179 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848f0000 }
31181 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
31184 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31185 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cf0000 }
31187 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
31190 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
31191 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cf0000 }
31193 /* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
31196 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31197 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860f0000 }
31199 /* mulu.b${G} #${Imm-40-QI},${Dsp-16-u24} */
31202 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
31203 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x868f0000 }
31205 /* mulu.w${G} #${Imm-16-HI},$Dst16RnHI */
31208 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
31209 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x7d400000 }
31211 /* mulu.w${G} #${Imm-16-HI},$Dst16AnHI */
31214 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
31215 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x7d440000 }
31217 /* mulu.w${G} #${Imm-16-HI},[$Dst16An] */
31220 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
31221 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x7d460000 }
31223 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
31226 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
31227 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x7d480000 }
31229 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
31232 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31233 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x7d4a0000 }
31235 /* mulu.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
31238 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31239 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x7d4b0000 }
31241 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
31244 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
31245 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x7d4c0000 }
31247 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
31250 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31251 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x7d4e0000 }
31253 /* mulu.w${G} #${Imm-32-HI},${Dsp-16-u16} */
31256 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
31257 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x7d4f0000 }
31259 /* mulu.b${G} #${Imm-16-QI},$Dst16RnQI */
31262 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
31263 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x7c4000 }
31265 /* mulu.b${G} #${Imm-16-QI},$Dst16AnQI */
31268 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
31269 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x7c4400 }
31271 /* mulu.b${G} #${Imm-16-QI},[$Dst16An] */
31274 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
31275 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x7c4600 }
31277 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
31280 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
31281 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x7c480000 }
31283 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
31286 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31287 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x7c4a0000 }
31289 /* mulu.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
31292 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31293 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x7c4b0000 }
31295 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
31298 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
31299 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x7c4c0000 }
31301 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
31304 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31305 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x7c4e0000 }
31307 /* mulu.b${G} #${Imm-32-QI},${Dsp-16-u16} */
31310 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
31311 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x7c4f0000 }
31316 { { MNEM
, ' ', OP (R3
), 0 } },
31317 & ifmt_mulex_dst32_R3_direct_Unprefixed_HI
, { 0xc97e }
31319 /* mulex $Dst32AnUnprefixedHI */
31322 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
31323 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc1be }
31325 /* mulex [$Dst32AnUnprefixed] */
31328 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31329 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc13e }
31331 /* mulex ${Dsp-16-u8}[$Dst32AnUnprefixed] */
31334 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31335 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc33e00 }
31337 /* mulex ${Dsp-16-u16}[$Dst32AnUnprefixed] */
31340 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31341 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc53e0000 }
31343 /* mulex ${Dsp-16-u24}[$Dst32AnUnprefixed] */
31346 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31347 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc73e0000 }
31349 /* mulex ${Dsp-16-u8}[sb] */
31352 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
31353 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc3be00 }
31355 /* mulex ${Dsp-16-u16}[sb] */
31358 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
31359 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5be0000 }
31361 /* mulex ${Dsp-16-s8}[fb] */
31364 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
31365 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3fe00 }
31367 /* mulex ${Dsp-16-s16}[fb] */
31370 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
31371 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5fe0000 }
31373 /* mulex ${Dsp-16-u16} */
31376 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
31377 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7fe0000 }
31379 /* mulex ${Dsp-16-u24} */
31382 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
31383 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7be0000 }
31385 /* mulu.l $Dst32RnPrefixedSI,r2r0 */
31388 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31389 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1890f }
31391 /* mulu.l $Dst32AnPrefixedSI,r2r0 */
31394 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31395 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1818f }
31397 /* mulu.l [$Dst32AnPrefixed],r2r0 */
31400 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31401 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1810f }
31403 /* mulu.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
31406 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31407 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1830f00 }
31409 /* mulu.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
31412 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31413 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1850f00 }
31415 /* mulu.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
31418 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31419 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1870f00 }
31421 /* mulu.l ${Dsp-24-u8}[sb],r2r0 */
31424 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31425 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1838f00 }
31427 /* mulu.l ${Dsp-24-u16}[sb],r2r0 */
31430 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31431 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1858f00 }
31433 /* mulu.l ${Dsp-24-s8}[fb],r2r0 */
31436 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31437 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x183cf00 }
31439 /* mulu.l ${Dsp-24-s16}[fb],r2r0 */
31442 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31443 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x185cf00 }
31445 /* mulu.l ${Dsp-24-u16},r2r0 */
31448 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '2', 'r', '0', 0 } },
31449 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x187cf00 }
31451 /* mulu.l ${Dsp-24-u24},r2r0 */
31454 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '2', 'r', '0', 0 } },
31455 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1878f00 }
31457 /* mul.l $Dst32RnPrefixedSI,r2r0 */
31460 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31461 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1891f }
31463 /* mul.l $Dst32AnPrefixedSI,r2r0 */
31466 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', 'r', '2', 'r', '0', 0 } },
31467 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1819f }
31469 /* mul.l [$Dst32AnPrefixed],r2r0 */
31472 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31473 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1811f }
31475 /* mul.l ${Dsp-24-u8}[$Dst32AnPrefixed],r2r0 */
31478 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31479 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1831f00 }
31481 /* mul.l ${Dsp-24-u16}[$Dst32AnPrefixed],r2r0 */
31484 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31485 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1851f00 }
31487 /* mul.l ${Dsp-24-u24}[$Dst32AnPrefixed],r2r0 */
31490 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
31491 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1871f00 }
31493 /* mul.l ${Dsp-24-u8}[sb],r2r0 */
31496 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31497 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1839f00 }
31499 /* mul.l ${Dsp-24-u16}[sb],r2r0 */
31502 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31503 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1859f00 }
31505 /* mul.l ${Dsp-24-s8}[fb],r2r0 */
31508 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31509 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x183df00 }
31511 /* mul.l ${Dsp-24-s16}[fb],r2r0 */
31514 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
31515 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x185df00 }
31517 /* mul.l ${Dsp-24-u16},r2r0 */
31520 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '2', 'r', '0', 0 } },
31521 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x187df00 }
31523 /* mul.l ${Dsp-24-u24},r2r0 */
31526 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '2', 'r', '0', 0 } },
31527 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1879f00 }
31529 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
31532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31533 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990c00 }
31535 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
31538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31539 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992c00 }
31541 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
31544 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31545 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993c00 }
31547 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
31550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31551 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918c00 }
31553 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
31556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31557 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ac00 }
31559 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
31562 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31563 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bc00 }
31565 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
31568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31569 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910c00 }
31571 /* mul.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
31574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31575 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912c00 }
31577 /* mul.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
31580 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31581 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913c00 }
31583 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31587 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930c0000 }
31589 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31593 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932c0000 }
31595 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
31598 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31599 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933c0000 }
31601 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31605 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950c0000 }
31607 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31611 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952c0000 }
31613 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
31616 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31617 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953c0000 }
31619 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31623 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970c0000 }
31625 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31629 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972c0000 }
31631 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
31634 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31635 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973c0000 }
31637 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
31640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31641 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938c0000 }
31643 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
31646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31647 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ac0000 }
31649 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
31652 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
31653 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bc0000 }
31655 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
31658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31659 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958c0000 }
31661 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
31664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31665 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ac0000 }
31667 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
31670 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
31671 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bc0000 }
31673 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
31676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31677 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cc0000 }
31679 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
31682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31683 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ec0000 }
31685 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
31688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
31689 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fc0000 }
31691 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
31694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31695 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cc0000 }
31697 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
31700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31701 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ec0000 }
31703 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
31706 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
31707 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fc0000 }
31709 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
31712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
31713 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cc0000 }
31715 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
31718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
31719 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ec0000 }
31721 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
31724 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
31725 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fc0000 }
31727 /* mul.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
31730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
31731 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978c0000 }
31733 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
31736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
31737 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ac0000 }
31739 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
31742 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
31743 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bc0000 }
31745 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
31748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31749 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90c0000 }
31751 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
31754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31755 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92c0000 }
31757 /* mul.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
31760 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31761 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93c0000 }
31763 /* mul.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
31766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
31767 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93c0000 }
31769 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
31772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31773 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18c0000 }
31775 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
31778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31779 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ac0000 }
31781 /* mul.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
31784 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31785 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bc0000 }
31787 /* mul.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
31790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
31791 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bc0000 }
31793 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
31796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31797 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10c0000 }
31799 /* mul.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
31802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31803 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12c0000 }
31805 /* mul.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
31808 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31809 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13c0000 }
31811 /* mul.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
31814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31815 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13c0000 }
31817 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31821 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30c0000 }
31823 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31827 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32c0000 }
31829 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
31832 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31833 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33c0000 }
31835 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
31838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31839 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33c0000 }
31841 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31845 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50c0000 }
31847 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31851 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52c0000 }
31853 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
31856 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31857 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53c0000 }
31859 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
31862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31863 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53c0000 }
31865 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31869 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70c0000 }
31871 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31875 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72c0000 }
31877 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
31880 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31881 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73c0000 }
31883 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
31886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
31887 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73c0000 }
31889 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
31892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31893 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38c0000 }
31895 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
31898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31899 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ac0000 }
31901 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
31904 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31905 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bc0000 }
31907 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
31910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
31911 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bc0000 }
31913 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
31916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31917 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58c0000 }
31919 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
31922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31923 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ac0000 }
31925 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
31928 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31929 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bc0000 }
31931 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
31934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
31935 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bc0000 }
31937 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
31940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31941 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cc0000 }
31943 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
31946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31947 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ec0000 }
31949 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
31952 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31953 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fc0000 }
31955 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
31958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
31959 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fc0000 }
31961 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
31964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31965 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cc0000 }
31967 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
31970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31971 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ec0000 }
31973 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
31976 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31977 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fc0000 }
31979 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
31982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
31983 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fc0000 }
31985 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
31988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
31989 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cc0000 }
31991 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
31994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
31995 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ec0000 }
31997 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
32000 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32001 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fc0000 }
32003 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
32006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
32007 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fc0000 }
32009 /* mul.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
32012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
32013 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78c0000 }
32015 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
32018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32019 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ac0000 }
32021 /* mul.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
32024 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32025 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bc0000 }
32027 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
32030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
32031 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bc0000 }
32033 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
32036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32037 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90c0000 }
32039 /* mul.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
32042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32043 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92c0000 }
32045 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
32048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32049 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18c0000 }
32051 /* mul.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
32054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32055 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ac0000 }
32057 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32061 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10c0000 }
32063 /* mul.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
32066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32067 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12c0000 }
32069 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
32072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32073 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30c0000 }
32075 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
32078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32079 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32c0000 }
32081 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
32084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32085 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50c0000 }
32087 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
32090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32091 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52c0000 }
32093 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
32096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32097 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70c0000 }
32099 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
32102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32103 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72c0000 }
32105 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
32108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32109 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38c0000 }
32111 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
32114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32115 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ac0000 }
32117 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
32120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32121 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58c0000 }
32123 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
32126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32127 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ac0000 }
32129 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
32132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32133 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cc0000 }
32135 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
32138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32139 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ec0000 }
32141 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
32144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32145 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cc0000 }
32147 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
32150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
32151 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ec0000 }
32153 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
32156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
32157 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cc0000 }
32159 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
32162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
32163 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ec0000 }
32165 /* mul.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
32168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
32169 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78c0000 }
32171 /* mul.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
32174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
32175 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ac0000 }
32177 /* mul.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
32180 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32181 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90c }
32183 /* mul.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
32186 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32187 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892c }
32189 /* mul.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
32192 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
32193 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890c }
32195 /* mul.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
32198 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32199 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18c }
32201 /* mul.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
32204 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32205 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ac }
32207 /* mul.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
32210 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
32211 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818c }
32213 /* mul.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
32216 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32217 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10c }
32219 /* mul.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
32222 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32223 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812c }
32225 /* mul.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32228 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32229 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810c }
32231 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
32234 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32235 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30c00 }
32237 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
32240 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32241 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832c00 }
32243 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
32246 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32247 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830c00 }
32249 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
32252 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32253 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50c0000 }
32255 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
32258 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32259 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852c0000 }
32261 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
32264 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32265 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850c0000 }
32267 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
32270 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32271 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70c0000 }
32273 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
32276 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32277 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872c0000 }
32279 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
32282 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32283 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870c0000 }
32285 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
32288 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32289 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38c00 }
32291 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
32294 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32295 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ac00 }
32297 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
32300 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
32301 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838c00 }
32303 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
32306 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32307 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58c0000 }
32309 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
32312 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32313 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ac0000 }
32315 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
32318 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
32319 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858c0000 }
32321 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
32324 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32325 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cc00 }
32327 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
32330 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32331 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ec00 }
32333 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
32336 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
32337 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cc00 }
32339 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
32342 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32343 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cc0000 }
32345 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
32348 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32349 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ec0000 }
32351 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
32354 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
32355 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cc0000 }
32357 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
32360 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
32361 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cc0000 }
32363 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
32366 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
32367 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ec0000 }
32369 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
32372 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
32373 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cc0000 }
32375 /* mul.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
32378 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
32379 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78c0000 }
32381 /* mul.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
32384 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
32385 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ac0000 }
32387 /* mul.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
32390 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
32391 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878c0000 }
32393 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32397 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980c00 }
32399 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
32402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32403 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982c00 }
32405 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
32408 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32409 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983c00 }
32411 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32415 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908c00 }
32417 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
32420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32421 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ac00 }
32423 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
32426 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32427 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bc00 }
32429 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32433 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900c00 }
32435 /* mul.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
32438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32439 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902c00 }
32441 /* mul.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
32444 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32445 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903c00 }
32447 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32451 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920c0000 }
32453 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32457 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922c0000 }
32459 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
32462 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32463 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923c0000 }
32465 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32469 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940c0000 }
32471 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32475 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942c0000 }
32477 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
32480 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32481 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943c0000 }
32483 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32487 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960c0000 }
32489 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32493 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962c0000 }
32495 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
32498 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32499 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963c0000 }
32501 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
32504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32505 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928c0000 }
32507 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
32510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32511 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ac0000 }
32513 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
32516 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
32517 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bc0000 }
32519 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
32522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32523 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948c0000 }
32525 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
32528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32529 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ac0000 }
32531 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
32534 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
32535 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bc0000 }
32537 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
32540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32541 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cc0000 }
32543 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
32546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32547 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ec0000 }
32549 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
32552 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
32553 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fc0000 }
32555 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
32558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32559 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cc0000 }
32561 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
32564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32565 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ec0000 }
32567 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
32570 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
32571 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fc0000 }
32573 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
32576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
32577 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cc0000 }
32579 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
32582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
32583 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ec0000 }
32585 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
32588 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
32589 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fc0000 }
32591 /* mul.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
32594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
32595 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968c0000 }
32597 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
32600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
32601 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ac0000 }
32603 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
32606 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
32607 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bc0000 }
32609 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32613 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80c0000 }
32615 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
32618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32619 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82c0000 }
32621 /* mul.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
32624 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32625 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83c0000 }
32627 /* mul.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
32630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32631 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83c0000 }
32633 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32637 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08c0000 }
32639 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
32642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32643 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ac0000 }
32645 /* mul.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
32648 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32649 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bc0000 }
32651 /* mul.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
32654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32655 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bc0000 }
32657 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32661 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00c0000 }
32663 /* mul.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
32666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32667 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02c0000 }
32669 /* mul.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
32672 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32673 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03c0000 }
32675 /* mul.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
32678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32679 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03c0000 }
32681 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32685 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20c0000 }
32687 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32691 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22c0000 }
32693 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
32696 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32697 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23c0000 }
32699 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
32702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32703 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23c0000 }
32705 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32709 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40c0000 }
32711 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32715 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42c0000 }
32717 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
32720 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32721 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43c0000 }
32723 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
32726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32727 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43c0000 }
32729 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32733 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60c0000 }
32735 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32739 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62c0000 }
32741 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
32744 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32745 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63c0000 }
32747 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
32750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32751 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63c0000 }
32753 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
32756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32757 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28c0000 }
32759 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
32762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32763 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ac0000 }
32765 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
32768 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32769 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bc0000 }
32771 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
32774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
32775 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bc0000 }
32777 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
32780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32781 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48c0000 }
32783 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
32786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32787 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ac0000 }
32789 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
32792 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32793 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bc0000 }
32795 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
32798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
32799 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bc0000 }
32801 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
32804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32805 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cc0000 }
32807 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
32810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32811 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ec0000 }
32813 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
32816 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32817 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fc0000 }
32819 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
32822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
32823 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fc0000 }
32825 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
32828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32829 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cc0000 }
32831 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
32834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32835 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ec0000 }
32837 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
32840 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32841 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fc0000 }
32843 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
32846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
32847 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fc0000 }
32849 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
32852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
32853 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cc0000 }
32855 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
32858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32859 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ec0000 }
32861 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
32864 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
32865 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fc0000 }
32867 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
32870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
32871 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fc0000 }
32873 /* mul.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
32876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
32877 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68c0000 }
32879 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
32882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32883 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ac0000 }
32885 /* mul.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
32888 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
32889 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bc0000 }
32891 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
32894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
32895 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bc0000 }
32897 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
32900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32901 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80c0000 }
32903 /* mul.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
32906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
32907 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82c0000 }
32909 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
32912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32913 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08c0000 }
32915 /* mul.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
32918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
32919 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ac0000 }
32921 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
32924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32925 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00c0000 }
32927 /* mul.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
32930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32931 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02c0000 }
32933 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
32936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32937 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20c0000 }
32939 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
32942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32943 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22c0000 }
32945 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
32948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32949 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40c0000 }
32951 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
32954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32955 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42c0000 }
32957 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
32960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32961 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60c0000 }
32963 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
32966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
32967 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62c0000 }
32969 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
32972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32973 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28c0000 }
32975 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
32978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
32979 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ac0000 }
32981 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
32984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32985 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48c0000 }
32987 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
32990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
32991 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ac0000 }
32993 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
32996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
32997 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cc0000 }
32999 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
33002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
33003 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ec0000 }
33005 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
33008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
33009 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cc0000 }
33011 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
33014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
33015 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ec0000 }
33017 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
33020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
33021 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cc0000 }
33023 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
33026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
33027 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ec0000 }
33029 /* mul.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
33032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
33033 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68c0000 }
33035 /* mul.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
33038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
33039 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ac0000 }
33041 /* mul.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
33044 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33045 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80c }
33047 /* mul.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
33050 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33051 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882c }
33053 /* mul.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
33056 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
33057 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880c }
33059 /* mul.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
33062 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33063 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08c }
33065 /* mul.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
33068 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33069 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ac }
33071 /* mul.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
33074 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
33075 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808c }
33077 /* mul.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
33080 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33081 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00c }
33083 /* mul.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
33086 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33087 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802c }
33089 /* mul.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
33092 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33093 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800c }
33095 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
33098 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33099 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20c00 }
33101 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
33104 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33105 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822c00 }
33107 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
33110 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33111 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820c00 }
33113 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
33116 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33117 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40c0000 }
33119 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
33122 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33123 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842c0000 }
33125 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
33128 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33129 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840c0000 }
33131 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
33134 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33135 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60c0000 }
33137 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
33140 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33141 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862c0000 }
33143 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
33146 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
33147 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860c0000 }
33149 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
33152 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33153 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28c00 }
33155 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
33158 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33159 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ac00 }
33161 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
33164 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33165 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828c00 }
33167 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
33170 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33171 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48c0000 }
33173 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
33176 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33177 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ac0000 }
33179 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
33182 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33183 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848c0000 }
33185 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
33188 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33189 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cc00 }
33191 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
33194 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33195 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ec00 }
33197 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
33200 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33201 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cc00 }
33203 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
33206 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33207 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cc0000 }
33209 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
33212 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33213 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ec0000 }
33215 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
33218 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
33219 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cc0000 }
33221 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
33224 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
33225 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cc0000 }
33227 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
33230 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
33231 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ec0000 }
33233 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
33236 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
33237 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cc0000 }
33239 /* mul.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
33242 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
33243 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68c0000 }
33245 /* mul.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
33248 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
33249 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ac0000 }
33251 /* mul.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
33254 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
33255 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868c0000 }
33257 /* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
33260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33261 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x798000 }
33263 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
33266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33267 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x79a000 }
33269 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
33272 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33273 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x79b000 }
33275 /* mul.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
33278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33279 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x798400 }
33281 /* mul.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
33284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33285 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x79a400 }
33287 /* mul.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
33290 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33291 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x79b400 }
33293 /* mul.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
33296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33297 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x798600 }
33299 /* mul.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
33302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33303 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x79a600 }
33305 /* mul.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
33308 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33309 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x79b600 }
33311 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
33314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33315 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x79880000 }
33317 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
33320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33321 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x79a80000 }
33323 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
33326 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33327 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x79b80000 }
33329 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
33332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33333 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x798c0000 }
33335 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
33338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33339 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x79ac0000 }
33341 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
33344 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33345 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x79bc0000 }
33347 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
33350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33351 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x798a0000 }
33353 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
33356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33357 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x79aa0000 }
33359 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
33362 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33363 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x79ba0000 }
33365 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
33368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33369 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x798e0000 }
33371 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
33374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33375 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x79ae0000 }
33377 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
33380 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33381 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x79be0000 }
33383 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
33386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33387 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x798b0000 }
33389 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
33392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33393 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x79ab0000 }
33395 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
33398 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33399 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x79bb0000 }
33401 /* mul.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
33404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
33405 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x798f0000 }
33407 /* mul.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
33410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33411 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x79af0000 }
33413 /* mul.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
33416 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33417 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x79bf0000 }
33419 /* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
33422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33423 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x79c00000 }
33425 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
33428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
33429 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x79e00000 }
33431 /* mul.w${G} ${Dsp-16-u16},$Dst16RnHI */
33434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
33435 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x79f00000 }
33437 /* mul.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
33440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33441 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x79c40000 }
33443 /* mul.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
33446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
33447 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x79e40000 }
33449 /* mul.w${G} ${Dsp-16-u16},$Dst16AnHI */
33452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
33453 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x79f40000 }
33455 /* mul.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
33458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33459 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x79c60000 }
33461 /* mul.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
33464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33465 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x79e60000 }
33467 /* mul.w${G} ${Dsp-16-u16},[$Dst16An] */
33470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
33471 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x79f60000 }
33473 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
33476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33477 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x79c80000 }
33479 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
33482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33483 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x79e80000 }
33485 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
33488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33489 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x79f80000 }
33491 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
33494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33495 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x79cc0000 }
33497 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
33500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33501 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x79ec0000 }
33503 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
33506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33507 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x79fc0000 }
33509 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
33512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33513 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x79ca0000 }
33515 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
33518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33519 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x79ea0000 }
33521 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
33524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33525 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x79fa0000 }
33527 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
33530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33531 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x79ce0000 }
33533 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
33536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33537 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x79ee0000 }
33539 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
33542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
33543 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x79fe0000 }
33545 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
33548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33549 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x79cb0000 }
33551 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
33554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33555 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x79eb0000 }
33557 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
33560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
33561 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x79fb0000 }
33563 /* mul.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
33566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
33567 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x79cf0000 }
33569 /* mul.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
33572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
33573 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x79ef0000 }
33575 /* mul.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
33578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
33579 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x79ff0000 }
33581 /* mul.w${G} $Src16RnHI,$Dst16RnHI */
33584 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
33585 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7900 }
33587 /* mul.w${G} $Src16AnHI,$Dst16RnHI */
33590 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
33591 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7940 }
33593 /* mul.w${G} [$Src16An],$Dst16RnHI */
33596 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
33597 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7960 }
33599 /* mul.w${G} $Src16RnHI,$Dst16AnHI */
33602 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
33603 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7904 }
33605 /* mul.w${G} $Src16AnHI,$Dst16AnHI */
33608 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
33609 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7944 }
33611 /* mul.w${G} [$Src16An],$Dst16AnHI */
33614 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
33615 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7964 }
33617 /* mul.w${G} $Src16RnHI,[$Dst16An] */
33620 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
33621 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7906 }
33623 /* mul.w${G} $Src16AnHI,[$Dst16An] */
33626 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
33627 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7946 }
33629 /* mul.w${G} [$Src16An],[$Dst16An] */
33632 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33633 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7966 }
33635 /* mul.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
33638 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33639 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x790800 }
33641 /* mul.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
33644 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33645 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x794800 }
33647 /* mul.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
33650 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
33651 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x796800 }
33653 /* mul.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
33656 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33657 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x790c0000 }
33659 /* mul.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
33662 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33663 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x794c0000 }
33665 /* mul.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
33668 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
33669 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x796c0000 }
33671 /* mul.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
33674 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33675 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x790a00 }
33677 /* mul.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
33680 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33681 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x794a00 }
33683 /* mul.w${G} [$Src16An],${Dsp-16-u8}[sb] */
33686 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
33687 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x796a00 }
33689 /* mul.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
33692 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33693 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x790e0000 }
33695 /* mul.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
33698 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33699 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x794e0000 }
33701 /* mul.w${G} [$Src16An],${Dsp-16-u16}[sb] */
33704 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
33705 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x796e0000 }
33707 /* mul.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
33710 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33711 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x790b00 }
33713 /* mul.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
33716 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33717 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x794b00 }
33719 /* mul.w${G} [$Src16An],${Dsp-16-s8}[fb] */
33722 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
33723 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x796b00 }
33725 /* mul.w${G} $Src16RnHI,${Dsp-16-u16} */
33728 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
33729 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x790f0000 }
33731 /* mul.w${G} $Src16AnHI,${Dsp-16-u16} */
33734 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
33735 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x794f0000 }
33737 /* mul.w${G} [$Src16An],${Dsp-16-u16} */
33740 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
33741 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x796f0000 }
33743 /* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
33746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
33747 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x788000 }
33749 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
33752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33753 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x78a000 }
33755 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
33758 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33759 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x78b000 }
33761 /* mul.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
33764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
33765 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x788400 }
33767 /* mul.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
33770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33771 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x78a400 }
33773 /* mul.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
33776 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33777 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x78b400 }
33779 /* mul.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
33782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33783 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x788600 }
33785 /* mul.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
33788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33789 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x78a600 }
33791 /* mul.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
33794 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33795 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x78b600 }
33797 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
33800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33801 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x78880000 }
33803 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
33806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33807 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x78a80000 }
33809 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
33812 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
33813 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x78b80000 }
33815 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
33818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33819 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x788c0000 }
33821 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
33824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33825 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x78ac0000 }
33827 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
33830 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
33831 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x78bc0000 }
33833 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
33836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33837 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x788a0000 }
33839 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
33842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33843 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x78aa0000 }
33845 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
33848 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
33849 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x78ba0000 }
33851 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
33854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33855 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x788e0000 }
33857 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
33860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33861 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x78ae0000 }
33863 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
33866 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
33867 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x78be0000 }
33869 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
33872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33873 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x788b0000 }
33875 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
33878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33879 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x78ab0000 }
33881 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
33884 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
33885 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x78bb0000 }
33887 /* mul.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
33890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
33891 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x788f0000 }
33893 /* mul.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
33896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33897 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x78af0000 }
33899 /* mul.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
33902 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
33903 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x78bf0000 }
33905 /* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
33908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
33909 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x78c00000 }
33911 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
33914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
33915 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x78e00000 }
33917 /* mul.b${G} ${Dsp-16-u16},$Dst16RnQI */
33920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
33921 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x78f00000 }
33923 /* mul.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
33926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
33927 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x78c40000 }
33929 /* mul.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
33932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
33933 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x78e40000 }
33935 /* mul.b${G} ${Dsp-16-u16},$Dst16AnQI */
33938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
33939 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x78f40000 }
33941 /* mul.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
33944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
33945 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x78c60000 }
33947 /* mul.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
33950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
33951 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x78e60000 }
33953 /* mul.b${G} ${Dsp-16-u16},[$Dst16An] */
33956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
33957 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x78f60000 }
33959 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
33962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33963 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x78c80000 }
33965 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
33968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33969 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x78e80000 }
33971 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
33974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
33975 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x78f80000 }
33977 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
33980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33981 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x78cc0000 }
33983 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
33986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33987 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x78ec0000 }
33989 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
33992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
33993 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x78fc0000 }
33995 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
33998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
33999 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x78ca0000 }
34001 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
34004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
34005 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x78ea0000 }
34007 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
34010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
34011 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x78fa0000 }
34013 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
34016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34017 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x78ce0000 }
34019 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
34022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34023 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x78ee0000 }
34025 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
34028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
34029 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x78fe0000 }
34031 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
34034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34035 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x78cb0000 }
34037 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
34040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34041 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x78eb0000 }
34043 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
34046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
34047 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x78fb0000 }
34049 /* mul.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
34052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
34053 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x78cf0000 }
34055 /* mul.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
34058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
34059 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x78ef0000 }
34061 /* mul.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
34064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
34065 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x78ff0000 }
34067 /* mul.b${G} $Src16RnQI,$Dst16RnQI */
34070 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
34071 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7800 }
34073 /* mul.b${G} $Src16AnQI,$Dst16RnQI */
34076 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
34077 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7840 }
34079 /* mul.b${G} [$Src16An],$Dst16RnQI */
34082 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
34083 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7860 }
34085 /* mul.b${G} $Src16RnQI,$Dst16AnQI */
34088 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
34089 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7804 }
34091 /* mul.b${G} $Src16AnQI,$Dst16AnQI */
34094 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
34095 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7844 }
34097 /* mul.b${G} [$Src16An],$Dst16AnQI */
34100 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
34101 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7864 }
34103 /* mul.b${G} $Src16RnQI,[$Dst16An] */
34106 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
34107 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7806 }
34109 /* mul.b${G} $Src16AnQI,[$Dst16An] */
34112 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
34113 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7846 }
34115 /* mul.b${G} [$Src16An],[$Dst16An] */
34118 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
34119 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7866 }
34121 /* mul.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
34124 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34125 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x780800 }
34127 /* mul.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
34130 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34131 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x784800 }
34133 /* mul.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
34136 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34137 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x786800 }
34139 /* mul.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
34142 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34143 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x780c0000 }
34145 /* mul.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
34148 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34149 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x784c0000 }
34151 /* mul.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
34154 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34155 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x786c0000 }
34157 /* mul.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
34160 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34161 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x780a00 }
34163 /* mul.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
34166 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34167 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x784a00 }
34169 /* mul.b${G} [$Src16An],${Dsp-16-u8}[sb] */
34172 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34173 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x786a00 }
34175 /* mul.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
34178 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34179 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x780e0000 }
34181 /* mul.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
34184 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34185 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x784e0000 }
34187 /* mul.b${G} [$Src16An],${Dsp-16-u16}[sb] */
34190 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34191 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x786e0000 }
34193 /* mul.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
34196 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34197 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x780b00 }
34199 /* mul.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
34202 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34203 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x784b00 }
34205 /* mul.b${G} [$Src16An],${Dsp-16-s8}[fb] */
34208 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34209 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x786b00 }
34211 /* mul.b${G} $Src16RnQI,${Dsp-16-u16} */
34214 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
34215 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x780f0000 }
34217 /* mul.b${G} $Src16AnQI,${Dsp-16-u16} */
34220 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
34221 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x784f0000 }
34223 /* mul.b${G} [$Src16An],${Dsp-16-u16} */
34226 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
34227 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x786f0000 }
34229 /* mul.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
34232 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
34233 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x891f0000 }
34235 /* mul.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
34238 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
34239 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x819f0000 }
34241 /* mul.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
34244 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34245 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x811f0000 }
34247 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34250 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34251 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x831f0000 }
34253 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
34256 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34257 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x839f0000 }
34259 /* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
34262 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34263 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83df0000 }
34265 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34268 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34269 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x851f0000 }
34271 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
34274 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34275 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x859f0000 }
34277 /* mul.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
34280 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34281 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85df0000 }
34283 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
34286 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
34287 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87df0000 }
34289 /* mul.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34292 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34293 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x871f0000 }
34295 /* mul.w${G} #${Imm-40-HI},${Dsp-16-u24} */
34298 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
34299 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x879f0000 }
34301 /* mul.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
34304 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
34305 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x881f00 }
34307 /* mul.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
34310 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
34311 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x809f00 }
34313 /* mul.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
34316 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34317 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x801f00 }
34319 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34322 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34323 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x821f0000 }
34325 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34328 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34329 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x829f0000 }
34331 /* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34334 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34335 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82df0000 }
34337 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34340 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34341 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x841f0000 }
34343 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34346 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34347 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x849f0000 }
34349 /* mul.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
34352 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34353 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84df0000 }
34355 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
34358 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34359 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86df0000 }
34361 /* mul.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34364 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34365 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x861f0000 }
34367 /* mul.b${G} #${Imm-40-QI},${Dsp-16-u24} */
34370 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
34371 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x869f0000 }
34373 /* mul.w${G} #${Imm-16-HI},$Dst16RnHI */
34376 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
34377 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x7d500000 }
34379 /* mul.w${G} #${Imm-16-HI},$Dst16AnHI */
34382 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
34383 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x7d540000 }
34385 /* mul.w${G} #${Imm-16-HI},[$Dst16An] */
34388 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
34389 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x7d560000 }
34391 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
34394 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34395 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x7d580000 }
34397 /* mul.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
34400 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34401 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x7d5a0000 }
34403 /* mul.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
34406 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34407 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x7d5b0000 }
34409 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
34412 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34413 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x7d5c0000 }
34415 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
34418 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34419 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x7d5e0000 }
34421 /* mul.w${G} #${Imm-32-HI},${Dsp-16-u16} */
34424 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
34425 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x7d5f0000 }
34427 /* mul.b${G} #${Imm-16-QI},$Dst16RnQI */
34430 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
34431 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x7c5000 }
34433 /* mul.b${G} #${Imm-16-QI},$Dst16AnQI */
34436 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
34437 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x7c5400 }
34439 /* mul.b${G} #${Imm-16-QI},[$Dst16An] */
34442 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
34443 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x7c5600 }
34445 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
34448 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
34449 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x7c580000 }
34451 /* mul.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34454 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34455 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x7c5a0000 }
34457 /* mul.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34460 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34461 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x7c5b0000 }
34463 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
34466 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
34467 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x7c5c0000 }
34469 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34472 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34473 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x7c5e0000 }
34475 /* mul.b${G} #${Imm-32-QI},${Dsp-16-u16} */
34478 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34479 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x7c5f0000 }
34481 /* movx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
34484 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
34485 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xb81100 }
34487 /* movx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
34490 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
34491 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xb09100 }
34493 /* movx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
34496 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34497 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xb01100 }
34499 /* movx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
34502 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34503 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xb2110000 }
34505 /* movx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
34508 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
34509 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xb2910000 }
34511 /* movx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
34514 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
34515 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xb2d10000 }
34517 /* movx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
34520 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34521 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xb4110000 }
34523 /* movx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
34526 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
34527 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xb4910000 }
34529 /* movx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
34532 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
34533 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xb4d10000 }
34535 /* movx${X} #${Imm-32-QI},${Dsp-16-u16} */
34538 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
34539 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xb6d10000 }
34541 /* movx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
34544 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
34545 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xb6110000 }
34547 /* movx${X} #${Imm-40-QI},${Dsp-16-u24} */
34550 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
34551 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xb6910000 }
34553 /* movhh $Dst32RnPrefixedQI,r0l */
34556 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34557 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a83e }
34559 /* movhh $Dst32AnPrefixedQI,r0l */
34562 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34563 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a0be }
34565 /* movhh [$Dst32AnPrefixed],r0l */
34568 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34569 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a03e }
34571 /* movhh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34574 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34575 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a23e00 }
34577 /* movhh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34580 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34581 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a43e00 }
34583 /* movhh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34586 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34587 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a63e00 }
34589 /* movhh ${Dsp-24-u8}[sb],r0l */
34592 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34593 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a2be00 }
34595 /* movhh ${Dsp-24-u16}[sb],r0l */
34598 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34599 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a4be00 }
34601 /* movhh ${Dsp-24-s8}[fb],r0l */
34604 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34605 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2fe00 }
34607 /* movhh ${Dsp-24-s16}[fb],r0l */
34610 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34611 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4fe00 }
34613 /* movhh ${Dsp-24-u16},r0l */
34616 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34617 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6fe00 }
34619 /* movhh ${Dsp-24-u24},r0l */
34622 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34623 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a6be00 }
34625 /* movhl $Dst32RnPrefixedQI,r0l */
34628 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34629 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a82e }
34631 /* movhl $Dst32AnPrefixedQI,r0l */
34634 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34635 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a0ae }
34637 /* movhl [$Dst32AnPrefixed],r0l */
34640 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34641 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a02e }
34643 /* movhl ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34646 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34647 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a22e00 }
34649 /* movhl ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34652 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34653 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a42e00 }
34655 /* movhl ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34658 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34659 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a62e00 }
34661 /* movhl ${Dsp-24-u8}[sb],r0l */
34664 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34665 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a2ae00 }
34667 /* movhl ${Dsp-24-u16}[sb],r0l */
34670 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34671 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a4ae00 }
34673 /* movhl ${Dsp-24-s8}[fb],r0l */
34676 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34677 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2ee00 }
34679 /* movhl ${Dsp-24-s16}[fb],r0l */
34682 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34683 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4ee00 }
34685 /* movhl ${Dsp-24-u16},r0l */
34688 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34689 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6ee00 }
34691 /* movhl ${Dsp-24-u24},r0l */
34694 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34695 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a6ae00 }
34697 /* movlh $Dst32RnPrefixedQI,r0l */
34700 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34701 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a81e }
34703 /* movlh $Dst32AnPrefixedQI,r0l */
34706 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34707 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a09e }
34709 /* movlh [$Dst32AnPrefixed],r0l */
34712 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34713 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a01e }
34715 /* movlh ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34718 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34719 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a21e00 }
34721 /* movlh ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34724 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34725 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a41e00 }
34727 /* movlh ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34730 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34731 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a61e00 }
34733 /* movlh ${Dsp-24-u8}[sb],r0l */
34736 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34737 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a29e00 }
34739 /* movlh ${Dsp-24-u16}[sb],r0l */
34742 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34743 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a49e00 }
34745 /* movlh ${Dsp-24-s8}[fb],r0l */
34748 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34749 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2de00 }
34751 /* movlh ${Dsp-24-s16}[fb],r0l */
34754 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34755 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4de00 }
34757 /* movlh ${Dsp-24-u16},r0l */
34760 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34761 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6de00 }
34763 /* movlh ${Dsp-24-u24},r0l */
34766 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34767 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a69e00 }
34769 /* movll $Dst32RnPrefixedQI,r0l */
34772 { { MNEM
, ' ', OP (DST32RNPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34773 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1a80e }
34775 /* movll $Dst32AnPrefixedQI,r0l */
34778 { { MNEM
, ' ', OP (DST32ANPREFIXEDQI
), ',', 'r', '0', 'l', 0 } },
34779 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1a08e }
34781 /* movll [$Dst32AnPrefixed],r0l */
34784 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34785 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1a00e }
34787 /* movll ${Dsp-24-u8}[$Dst32AnPrefixed],r0l */
34790 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34791 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1a20e00 }
34793 /* movll ${Dsp-24-u16}[$Dst32AnPrefixed],r0l */
34796 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34797 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1a40e00 }
34799 /* movll ${Dsp-24-u24}[$Dst32AnPrefixed],r0l */
34802 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', 'r', '0', 'l', 0 } },
34803 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1a60e00 }
34805 /* movll ${Dsp-24-u8}[sb],r0l */
34808 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34809 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1a28e00 }
34811 /* movll ${Dsp-24-u16}[sb],r0l */
34814 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
34815 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1a48e00 }
34817 /* movll ${Dsp-24-s8}[fb],r0l */
34820 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34821 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1a2ce00 }
34823 /* movll ${Dsp-24-s16}[fb],r0l */
34826 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
34827 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1a4ce00 }
34829 /* movll ${Dsp-24-u16},r0l */
34832 { { MNEM
, ' ', OP (DSP_24_U16
), ',', 'r', '0', 'l', 0 } },
34833 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1a6ce00 }
34835 /* movll ${Dsp-24-u24},r0l */
34838 { { MNEM
, ' ', OP (DSP_24_U24
), ',', 'r', '0', 'l', 0 } },
34839 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1a68e00 }
34841 /* movhh r0l,$Dst32RnPrefixedQI */
34844 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34845 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b83e }
34847 /* movhh r0l,$Dst32AnPrefixedQI */
34850 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34851 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b0be }
34853 /* movhh r0l,[$Dst32AnPrefixed] */
34856 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34857 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b03e }
34859 /* movhh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34862 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34863 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b23e00 }
34865 /* movhh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
34868 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34869 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b43e00 }
34871 /* movhh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
34874 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34875 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b63e00 }
34877 /* movhh r0l,${Dsp-24-u8}[sb] */
34880 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
34881 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b2be00 }
34883 /* movhh r0l,${Dsp-24-u16}[sb] */
34886 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
34887 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b4be00 }
34889 /* movhh r0l,${Dsp-24-s8}[fb] */
34892 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
34893 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2fe00 }
34895 /* movhh r0l,${Dsp-24-s16}[fb] */
34898 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
34899 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4fe00 }
34901 /* movhh r0l,${Dsp-24-u16} */
34904 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
34905 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6fe00 }
34907 /* movhh r0l,${Dsp-24-u24} */
34910 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
34911 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b6be00 }
34913 /* movhl r0l,$Dst32RnPrefixedQI */
34916 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34917 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b82e }
34919 /* movhl r0l,$Dst32AnPrefixedQI */
34922 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34923 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b0ae }
34925 /* movhl r0l,[$Dst32AnPrefixed] */
34928 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
34929 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b02e }
34931 /* movhl r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
34934 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34935 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b22e00 }
34937 /* movhl r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
34940 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34941 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b42e00 }
34943 /* movhl r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
34946 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
34947 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b62e00 }
34949 /* movhl r0l,${Dsp-24-u8}[sb] */
34952 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
34953 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b2ae00 }
34955 /* movhl r0l,${Dsp-24-u16}[sb] */
34958 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
34959 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b4ae00 }
34961 /* movhl r0l,${Dsp-24-s8}[fb] */
34964 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
34965 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2ee00 }
34967 /* movhl r0l,${Dsp-24-s16}[fb] */
34970 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
34971 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4ee00 }
34973 /* movhl r0l,${Dsp-24-u16} */
34976 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
34977 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6ee00 }
34979 /* movhl r0l,${Dsp-24-u24} */
34982 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
34983 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b6ae00 }
34985 /* movlh r0l,$Dst32RnPrefixedQI */
34988 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
34989 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b81e }
34991 /* movlh r0l,$Dst32AnPrefixedQI */
34994 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
34995 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b09e }
34997 /* movlh r0l,[$Dst32AnPrefixed] */
35000 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
35001 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b01e }
35003 /* movlh r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
35006 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35007 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b21e00 }
35009 /* movlh r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
35012 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35013 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b41e00 }
35015 /* movlh r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
35018 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35019 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b61e00 }
35021 /* movlh r0l,${Dsp-24-u8}[sb] */
35024 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
35025 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b29e00 }
35027 /* movlh r0l,${Dsp-24-u16}[sb] */
35030 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
35031 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b49e00 }
35033 /* movlh r0l,${Dsp-24-s8}[fb] */
35036 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
35037 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2de00 }
35039 /* movlh r0l,${Dsp-24-s16}[fb] */
35042 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
35043 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4de00 }
35045 /* movlh r0l,${Dsp-24-u16} */
35048 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
35049 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6de00 }
35051 /* movlh r0l,${Dsp-24-u24} */
35054 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
35055 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b69e00 }
35057 /* movll r0l,$Dst32RnPrefixedQI */
35060 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32RNPREFIXEDQI
), 0 } },
35061 & ifmt_movhh32_src_r0l_dst32_Rn_direct_Prefixed_QI
, { 0x1b80e }
35063 /* movll r0l,$Dst32AnPrefixedQI */
35066 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST32ANPREFIXEDQI
), 0 } },
35067 & ifmt_movhh32_src_r0l_dst32_An_direct_Prefixed_QI
, { 0x1b08e }
35069 /* movll r0l,[$Dst32AnPrefixed] */
35072 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
35073 & ifmt_movhh32_src_r0l_dst32_An_indirect_Prefixed_QI
, { 0x1b00e }
35075 /* movll r0l,${Dsp-24-u8}[$Dst32AnPrefixed] */
35078 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35079 & ifmt_movhh32_src_r0l_dst32_24_8_An_relative_Prefixed_QI
, { 0x1b20e00 }
35081 /* movll r0l,${Dsp-24-u16}[$Dst32AnPrefixed] */
35084 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35085 & ifmt_movhh32_src_r0l_dst32_24_16_An_relative_Prefixed_QI
, { 0x1b40e00 }
35087 /* movll r0l,${Dsp-24-u24}[$Dst32AnPrefixed] */
35090 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
35091 & ifmt_movhh32_src_r0l_dst32_24_24_An_relative_Prefixed_QI
, { 0x1b60e00 }
35093 /* movll r0l,${Dsp-24-u8}[sb] */
35096 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
35097 & ifmt_movhh32_src_r0l_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1b28e00 }
35099 /* movll r0l,${Dsp-24-u16}[sb] */
35102 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
35103 & ifmt_movhh32_src_r0l_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1b48e00 }
35105 /* movll r0l,${Dsp-24-s8}[fb] */
35108 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
35109 & ifmt_movhh32_src_r0l_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1b2ce00 }
35111 /* movll r0l,${Dsp-24-s16}[fb] */
35114 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
35115 & ifmt_movhh32_src_r0l_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1b4ce00 }
35117 /* movll r0l,${Dsp-24-u16} */
35120 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U16
), 0 } },
35121 & ifmt_movhh32_src_r0l_dst32_24_16_absolute_Prefixed_QI
, { 0x1b6ce00 }
35123 /* movll r0l,${Dsp-24-u24} */
35126 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_24_U24
), 0 } },
35127 & ifmt_movhh32_src_r0l_dst32_24_24_absolute_Prefixed_QI
, { 0x1b68e00 }
35129 /* movhh $Dst16RnQI,r0l */
35132 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35133 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c30 }
35135 /* movhh $Dst16AnQI,r0l */
35138 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35139 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c34 }
35141 /* movhh [$Dst16An],r0l */
35144 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35145 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c36 }
35147 /* movhh ${Dsp-16-u8}[$Dst16An],r0l */
35150 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35151 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c3800 }
35153 /* movhh ${Dsp-16-u16}[$Dst16An],r0l */
35156 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35157 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c3c0000 }
35159 /* movhh ${Dsp-16-u8}[sb],r0l */
35162 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35163 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c3a00 }
35165 /* movhh ${Dsp-16-u16}[sb],r0l */
35168 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35169 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c3e0000 }
35171 /* movhh ${Dsp-16-s8}[fb],r0l */
35174 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35175 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c3b00 }
35177 /* movhh ${Dsp-16-u16},r0l */
35180 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35181 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c3f0000 }
35183 /* movhl $Dst16RnQI,r0l */
35186 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35187 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c10 }
35189 /* movhl $Dst16AnQI,r0l */
35192 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35193 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c14 }
35195 /* movhl [$Dst16An],r0l */
35198 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35199 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c16 }
35201 /* movhl ${Dsp-16-u8}[$Dst16An],r0l */
35204 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35205 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c1800 }
35207 /* movhl ${Dsp-16-u16}[$Dst16An],r0l */
35210 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35211 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c1c0000 }
35213 /* movhl ${Dsp-16-u8}[sb],r0l */
35216 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35217 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c1a00 }
35219 /* movhl ${Dsp-16-u16}[sb],r0l */
35222 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35223 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c1e0000 }
35225 /* movhl ${Dsp-16-s8}[fb],r0l */
35228 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35229 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c1b00 }
35231 /* movhl ${Dsp-16-u16},r0l */
35234 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35235 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c1f0000 }
35237 /* movlh $Dst16RnQI,r0l */
35240 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35241 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c20 }
35243 /* movlh $Dst16AnQI,r0l */
35246 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35247 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c24 }
35249 /* movlh [$Dst16An],r0l */
35252 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35253 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c26 }
35255 /* movlh ${Dsp-16-u8}[$Dst16An],r0l */
35258 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35259 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c2800 }
35261 /* movlh ${Dsp-16-u16}[$Dst16An],r0l */
35264 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35265 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c2c0000 }
35267 /* movlh ${Dsp-16-u8}[sb],r0l */
35270 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35271 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c2a00 }
35273 /* movlh ${Dsp-16-u16}[sb],r0l */
35276 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35277 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c2e0000 }
35279 /* movlh ${Dsp-16-s8}[fb],r0l */
35282 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35283 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c2b00 }
35285 /* movlh ${Dsp-16-u16},r0l */
35288 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35289 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c2f0000 }
35291 /* movll $Dst16RnQI,r0l */
35294 { { MNEM
, ' ', OP (DST16RNQI
), ',', 'r', '0', 'l', 0 } },
35295 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c00 }
35297 /* movll $Dst16AnQI,r0l */
35300 { { MNEM
, ' ', OP (DST16ANQI
), ',', 'r', '0', 'l', 0 } },
35301 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c04 }
35303 /* movll [$Dst16An],r0l */
35306 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35307 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c06 }
35309 /* movll ${Dsp-16-u8}[$Dst16An],r0l */
35312 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35313 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c0800 }
35315 /* movll ${Dsp-16-u16}[$Dst16An],r0l */
35318 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 'l', 0 } },
35319 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c0c0000 }
35321 /* movll ${Dsp-16-u8}[sb],r0l */
35324 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35325 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c0a00 }
35327 /* movll ${Dsp-16-u16}[sb],r0l */
35330 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
35331 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c0e0000 }
35333 /* movll ${Dsp-16-s8}[fb],r0l */
35336 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
35337 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c0b00 }
35339 /* movll ${Dsp-16-u16},r0l */
35342 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 'l', 0 } },
35343 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c0f0000 }
35345 /* movhh r0l,$Dst16RnQI */
35348 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35349 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7cb0 }
35351 /* movhh r0l,$Dst16AnQI */
35354 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35355 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7cb4 }
35357 /* movhh r0l,[$Dst16An] */
35360 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35361 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7cb6 }
35363 /* movhh r0l,${Dsp-16-u8}[$Dst16An] */
35366 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35367 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7cb800 }
35369 /* movhh r0l,${Dsp-16-u16}[$Dst16An] */
35372 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35373 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7cbc0000 }
35375 /* movhh r0l,${Dsp-16-u8}[sb] */
35378 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35379 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7cba00 }
35381 /* movhh r0l,${Dsp-16-u16}[sb] */
35384 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35385 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7cbe0000 }
35387 /* movhh r0l,${Dsp-16-s8}[fb] */
35390 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35391 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7cbb00 }
35393 /* movhh r0l,${Dsp-16-u16} */
35396 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35397 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7cbf0000 }
35399 /* movhl r0l,$Dst16RnQI */
35402 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35403 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c90 }
35405 /* movhl r0l,$Dst16AnQI */
35408 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35409 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c94 }
35411 /* movhl r0l,[$Dst16An] */
35414 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35415 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c96 }
35417 /* movhl r0l,${Dsp-16-u8}[$Dst16An] */
35420 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35421 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c9800 }
35423 /* movhl r0l,${Dsp-16-u16}[$Dst16An] */
35426 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35427 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c9c0000 }
35429 /* movhl r0l,${Dsp-16-u8}[sb] */
35432 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35433 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c9a00 }
35435 /* movhl r0l,${Dsp-16-u16}[sb] */
35438 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35439 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c9e0000 }
35441 /* movhl r0l,${Dsp-16-s8}[fb] */
35444 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35445 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c9b00 }
35447 /* movhl r0l,${Dsp-16-u16} */
35450 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35451 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c9f0000 }
35453 /* movlh r0l,$Dst16RnQI */
35456 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35457 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7ca0 }
35459 /* movlh r0l,$Dst16AnQI */
35462 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35463 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7ca4 }
35465 /* movlh r0l,[$Dst16An] */
35468 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35469 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7ca6 }
35471 /* movlh r0l,${Dsp-16-u8}[$Dst16An] */
35474 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35475 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7ca800 }
35477 /* movlh r0l,${Dsp-16-u16}[$Dst16An] */
35480 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35481 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7cac0000 }
35483 /* movlh r0l,${Dsp-16-u8}[sb] */
35486 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35487 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7caa00 }
35489 /* movlh r0l,${Dsp-16-u16}[sb] */
35492 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35493 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7cae0000 }
35495 /* movlh r0l,${Dsp-16-s8}[fb] */
35498 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35499 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7cab00 }
35501 /* movlh r0l,${Dsp-16-u16} */
35504 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35505 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7caf0000 }
35507 /* movll r0l,$Dst16RnQI */
35510 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16RNQI
), 0 } },
35511 & ifmt_shl16_b_dst_dst16_Rn_direct_QI
, { 0x7c80 }
35513 /* movll r0l,$Dst16AnQI */
35516 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DST16ANQI
), 0 } },
35517 & ifmt_shl16_b_dst_dst16_An_direct_QI
, { 0x7c84 }
35519 /* movll r0l,[$Dst16An] */
35522 { { MNEM
, ' ', 'r', '0', 'l', ',', '[', OP (DST16AN
), ']', 0 } },
35523 & ifmt_shl16_b_dst_dst16_An_indirect_QI
, { 0x7c86 }
35525 /* movll r0l,${Dsp-16-u8}[$Dst16An] */
35528 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
35529 & ifmt_shl16_b_dst_dst16_16_8_An_relative_QI
, { 0x7c8800 }
35531 /* movll r0l,${Dsp-16-u16}[$Dst16An] */
35534 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
35535 & ifmt_shl16_b_dst_dst16_16_16_An_relative_QI
, { 0x7c8c0000 }
35537 /* movll r0l,${Dsp-16-u8}[sb] */
35540 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
35541 & ifmt_shl16_b_dst_dst16_16_8_SB_relative_QI
, { 0x7c8a00 }
35543 /* movll r0l,${Dsp-16-u16}[sb] */
35546 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
35547 & ifmt_shl16_b_dst_dst16_16_16_SB_relative_QI
, { 0x7c8e0000 }
35549 /* movll r0l,${Dsp-16-s8}[fb] */
35552 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
35553 & ifmt_shl16_b_dst_dst16_16_8_FB_relative_QI
, { 0x7c8b00 }
35555 /* movll r0l,${Dsp-16-u16} */
35558 { { MNEM
, ' ', 'r', '0', 'l', ',', OP (DSP_16_U16
), 0 } },
35559 & ifmt_shl16_b_dst_dst16_16_16_absolute_QI
, { 0x7c8f0000 }
35561 /* mova [$Dst32AnUnprefixed],a1 */
35564 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35565 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd11b }
35567 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a1 */
35570 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35571 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31b00 }
35573 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a1 */
35576 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35577 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd51b0000 }
35579 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a1 */
35582 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '1', 0 } },
35583 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd71b0000 }
35585 /* mova ${Dsp-16-u8}[sb],a1 */
35588 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35589 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39b00 }
35591 /* mova ${Dsp-16-u16}[sb],a1 */
35594 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35595 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd59b0000 }
35597 /* mova ${Dsp-16-s8}[fb],a1 */
35600 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35601 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3db00 }
35603 /* mova ${Dsp-16-s16}[fb],a1 */
35606 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35607 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5db0000 }
35609 /* mova ${Dsp-16-u16},a1 */
35612 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '1', 0 } },
35613 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7db0000 }
35615 /* mova ${Dsp-16-u24},a1 */
35618 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'a', '1', 0 } },
35619 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd79b0000 }
35621 /* mova [$Dst32AnUnprefixed],a0 */
35624 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35625 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd11a }
35627 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],a0 */
35630 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35631 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31a00 }
35633 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],a0 */
35636 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35637 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd51a0000 }
35639 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],a0 */
35642 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'a', '0', 0 } },
35643 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd71a0000 }
35645 /* mova ${Dsp-16-u8}[sb],a0 */
35648 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35649 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39a00 }
35651 /* mova ${Dsp-16-u16}[sb],a0 */
35654 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35655 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd59a0000 }
35657 /* mova ${Dsp-16-s8}[fb],a0 */
35660 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35661 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3da00 }
35663 /* mova ${Dsp-16-s16}[fb],a0 */
35666 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35667 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5da0000 }
35669 /* mova ${Dsp-16-u16},a0 */
35672 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '0', 0 } },
35673 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7da0000 }
35675 /* mova ${Dsp-16-u24},a0 */
35678 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'a', '0', 0 } },
35679 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd79a0000 }
35681 /* mova [$Dst32AnUnprefixed],r3r1 */
35684 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35685 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd119 }
35687 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r3r1 */
35690 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35691 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31900 }
35693 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r3r1 */
35696 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35697 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd5190000 }
35699 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r3r1 */
35702 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '3', 'r', '1', 0 } },
35703 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd7190000 }
35705 /* mova ${Dsp-16-u8}[sb],r3r1 */
35708 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35709 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39900 }
35711 /* mova ${Dsp-16-u16}[sb],r3r1 */
35714 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35715 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd5990000 }
35717 /* mova ${Dsp-16-s8}[fb],r3r1 */
35720 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35721 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3d900 }
35723 /* mova ${Dsp-16-s16}[fb],r3r1 */
35726 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'r', '3', 'r', '1', 0 } },
35727 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5d90000 }
35729 /* mova ${Dsp-16-u16},r3r1 */
35732 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '3', 'r', '1', 0 } },
35733 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7d90000 }
35735 /* mova ${Dsp-16-u24},r3r1 */
35738 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'r', '3', 'r', '1', 0 } },
35739 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd7990000 }
35741 /* mova [$Dst32AnUnprefixed],r2r0 */
35744 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35745 & ifmt_mova32_src_a1_dst32_An_indirect_Unprefixed_Mova_SI
, { 0xd118 }
35747 /* mova ${Dsp-16-u8}[$Dst32AnUnprefixed],r2r0 */
35750 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35751 & ifmt_mova32_src_a1_dst32_16_8_An_relative_Unprefixed_Mova_SI
, { 0xd31800 }
35753 /* mova ${Dsp-16-u16}[$Dst32AnUnprefixed],r2r0 */
35756 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35757 & ifmt_mova32_src_a1_dst32_16_16_An_relative_Unprefixed_Mova_SI
, { 0xd5180000 }
35759 /* mova ${Dsp-16-u24}[$Dst32AnUnprefixed],r2r0 */
35762 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', 'r', '2', 'r', '0', 0 } },
35763 & ifmt_mova32_src_a1_dst32_16_24_An_relative_Unprefixed_Mova_SI
, { 0xd7180000 }
35765 /* mova ${Dsp-16-u8}[sb],r2r0 */
35768 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35769 & ifmt_mova32_src_a1_dst32_16_8_SB_relative_Unprefixed_Mova_SI
, { 0xd39800 }
35771 /* mova ${Dsp-16-u16}[sb],r2r0 */
35774 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35775 & ifmt_mova32_src_a1_dst32_16_16_SB_relative_Unprefixed_Mova_SI
, { 0xd5980000 }
35777 /* mova ${Dsp-16-s8}[fb],r2r0 */
35780 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35781 & ifmt_mova32_src_a1_dst32_16_8_FB_relative_Unprefixed_Mova_SI
, { 0xd3d800 }
35783 /* mova ${Dsp-16-s16}[fb],r2r0 */
35786 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', 'r', '2', 'r', '0', 0 } },
35787 & ifmt_mova32_src_a1_dst32_16_16_FB_relative_Unprefixed_Mova_SI
, { 0xd5d80000 }
35789 /* mova ${Dsp-16-u16},r2r0 */
35792 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '2', 'r', '0', 0 } },
35793 & ifmt_mova32_src_a1_dst32_16_16_absolute_Unprefixed_Mova_SI
, { 0xd7d80000 }
35795 /* mova ${Dsp-16-u24},r2r0 */
35798 { { MNEM
, ' ', OP (DSP_16_U24
), ',', 'r', '2', 'r', '0', 0 } },
35799 & ifmt_mova32_src_a1_dst32_16_24_absolute_Unprefixed_Mova_SI
, { 0xd7980000 }
35801 /* mova [$Dst16An],a1 */
35804 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35805 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb56 }
35807 /* mova ${Dsp-16-u8}[$Dst16An],a1 */
35810 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35811 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb5800 }
35813 /* mova ${Dsp-16-u16}[$Dst16An],a1 */
35816 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'a', '1', 0 } },
35817 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb5c0000 }
35819 /* mova ${Dsp-16-u8}[sb],a1 */
35822 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35823 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb5a00 }
35825 /* mova ${Dsp-16-u16}[sb],a1 */
35828 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
35829 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb5e0000 }
35831 /* mova ${Dsp-16-s8}[fb],a1 */
35834 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
35835 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb5b00 }
35837 /* mova ${Dsp-16-u16},a1 */
35840 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '1', 0 } },
35841 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb5f0000 }
35843 /* mova [$Dst16An],a0 */
35846 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35847 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb46 }
35849 /* mova ${Dsp-16-u8}[$Dst16An],a0 */
35852 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35853 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb4800 }
35855 /* mova ${Dsp-16-u16}[$Dst16An],a0 */
35858 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'a', '0', 0 } },
35859 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb4c0000 }
35861 /* mova ${Dsp-16-u8}[sb],a0 */
35864 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35865 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb4a00 }
35867 /* mova ${Dsp-16-u16}[sb],a0 */
35870 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
35871 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb4e0000 }
35873 /* mova ${Dsp-16-s8}[fb],a0 */
35876 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
35877 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb4b00 }
35879 /* mova ${Dsp-16-u16},a0 */
35882 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'a', '0', 0 } },
35883 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb4f0000 }
35885 /* mova [$Dst16An],r3 */
35888 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35889 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb36 }
35891 /* mova ${Dsp-16-u8}[$Dst16An],r3 */
35894 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35895 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb3800 }
35897 /* mova ${Dsp-16-u16}[$Dst16An],r3 */
35900 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '3', 0 } },
35901 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb3c0000 }
35903 /* mova ${Dsp-16-u8}[sb],r3 */
35906 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '3', 0 } },
35907 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb3a00 }
35909 /* mova ${Dsp-16-u16}[sb],r3 */
35912 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '3', 0 } },
35913 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb3e0000 }
35915 /* mova ${Dsp-16-s8}[fb],r3 */
35918 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '3', 0 } },
35919 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb3b00 }
35921 /* mova ${Dsp-16-u16},r3 */
35924 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '3', 0 } },
35925 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb3f0000 }
35927 /* mova [$Dst16An],r2 */
35930 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35931 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb26 }
35933 /* mova ${Dsp-16-u8}[$Dst16An],r2 */
35936 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35937 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb2800 }
35939 /* mova ${Dsp-16-u16}[$Dst16An],r2 */
35942 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '2', 0 } },
35943 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb2c0000 }
35945 /* mova ${Dsp-16-u8}[sb],r2 */
35948 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '2', 0 } },
35949 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb2a00 }
35951 /* mova ${Dsp-16-u16}[sb],r2 */
35954 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '2', 0 } },
35955 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb2e0000 }
35957 /* mova ${Dsp-16-s8}[fb],r2 */
35960 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '2', 0 } },
35961 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb2b00 }
35963 /* mova ${Dsp-16-u16},r2 */
35966 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '2', 0 } },
35967 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb2f0000 }
35969 /* mova [$Dst16An],r1 */
35972 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35973 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb16 }
35975 /* mova ${Dsp-16-u8}[$Dst16An],r1 */
35978 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35979 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb1800 }
35981 /* mova ${Dsp-16-u16}[$Dst16An],r1 */
35984 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '1', 0 } },
35985 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb1c0000 }
35987 /* mova ${Dsp-16-u8}[sb],r1 */
35990 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
35991 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb1a00 }
35993 /* mova ${Dsp-16-u16}[sb],r1 */
35996 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
35997 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb1e0000 }
35999 /* mova ${Dsp-16-s8}[fb],r1 */
36002 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 0 } },
36003 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb1b00 }
36005 /* mova ${Dsp-16-u16},r1 */
36008 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '1', 0 } },
36009 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb1f0000 }
36011 /* mova [$Dst16An],r0 */
36014 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36015 & ifmt_pusha16_16_Mova_dst16_An_indirect_Mova_HI
, { 0xeb06 }
36017 /* mova ${Dsp-16-u8}[$Dst16An],r0 */
36020 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36021 & ifmt_pusha16_16_Mova_dst16_16_8_An_relative_Mova_HI
, { 0xeb0800 }
36023 /* mova ${Dsp-16-u16}[$Dst16An],r0 */
36026 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', 'r', '0', 0 } },
36027 & ifmt_pusha16_16_Mova_dst16_16_16_An_relative_Mova_HI
, { 0xeb0c0000 }
36029 /* mova ${Dsp-16-u8}[sb],r0 */
36032 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36033 & ifmt_pusha16_16_Mova_dst16_16_8_SB_relative_Mova_HI
, { 0xeb0a00 }
36035 /* mova ${Dsp-16-u16}[sb],r0 */
36038 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36039 & ifmt_pusha16_16_Mova_dst16_16_16_SB_relative_Mova_HI
, { 0xeb0e0000 }
36041 /* mova ${Dsp-16-s8}[fb],r0 */
36044 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 0 } },
36045 & ifmt_pusha16_16_Mova_dst16_16_8_FB_relative_Mova_HI
, { 0xeb0b00 }
36047 /* mova ${Dsp-16-u16},r0 */
36050 { { MNEM
, ' ', OP (DSP_16_U16
), ',', 'r', '0', 0 } },
36051 & ifmt_pusha16_16_Mova_dst16_16_16_absolute_Mova_HI
, { 0xeb0f0000 }
36053 /* mov.w${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
36056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36057 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa30f0000 }
36059 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36063 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa38f0000 }
36065 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36068 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36069 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3cf0000 }
36071 /* mov.w${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
36074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36075 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa50f0000 }
36077 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36081 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa58f0000 }
36083 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
36086 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36087 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5cf0000 }
36089 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36093 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7cf0000 }
36095 /* mov.w${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
36098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36099 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa70f0000 }
36101 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
36104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36105 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xa78f0000 }
36107 /* mov.w${G} $Dst32RnUnprefixedHI,${Dsp-16-s8}[sp] */
36110 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36111 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xa90f00 }
36113 /* mov.w${G} $Dst32AnUnprefixedHI,${Dsp-16-s8}[sp] */
36116 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36117 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa18f00 }
36119 /* mov.w${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
36122 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36123 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xa10f00 }
36125 /* mov.b${G} ${Dsp-16-u8}[$Dst32AnUnprefixed],${Dsp-24-s8}[sp] */
36128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36129 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20f0000 }
36131 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36135 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28f0000 }
36137 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36140 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36141 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2cf0000 }
36143 /* mov.b${G} ${Dsp-16-u16}[$Dst32AnUnprefixed],${Dsp-32-s8}[sp] */
36146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36147 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa40f0000 }
36149 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36152 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36153 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa48f0000 }
36155 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[sp] */
36158 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36159 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4cf0000 }
36161 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36165 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6cf0000 }
36167 /* mov.b${G} ${Dsp-16-u24}[$Dst32AnUnprefixed],${Dsp-40-s8}[sp] */
36170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36171 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa60f0000 }
36173 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[sp] */
36176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 's', 'p', ']', 0 } },
36177 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xa68f0000 }
36179 /* mov.b${G} $Dst32RnUnprefixedQI,${Dsp-16-s8}[sp] */
36182 { { MNEM
, OP (G
), ' ', OP (DST32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36183 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xa80f00 }
36185 /* mov.b${G} $Dst32AnUnprefixedQI,${Dsp-16-s8}[sp] */
36188 { { MNEM
, OP (G
), ' ', OP (DST32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36189 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xa08f00 }
36191 /* mov.b${G} [$Dst32AnUnprefixed],${Dsp-16-s8}[sp] */
36194 { { MNEM
, OP (G
), ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36195 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xa00f00 }
36197 /* mov.w${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
36200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36201 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI
, { 0x75380000 }
36203 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36207 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI
, { 0x753a0000 }
36209 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36212 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36213 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI
, { 0x753b0000 }
36215 /* mov.w${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
36218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36219 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI
, { 0x753c0000 }
36221 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36225 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI
, { 0x753e0000 }
36227 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36231 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI
, { 0x753f0000 }
36233 /* mov.w${G} $Dst16RnHI,${Dsp-16-s8}[sp] */
36236 { { MNEM
, OP (G
), ' ', OP (DST16RNHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36237 & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI
, { 0x753000 }
36239 /* mov.w${G} $Dst16AnHI,${Dsp-16-s8}[sp] */
36242 { { MNEM
, OP (G
), ' ', OP (DST16ANHI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36243 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI
, { 0x753400 }
36245 /* mov.w${G} [$Dst16An],${Dsp-16-s8}[sp] */
36248 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36249 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI
, { 0x753600 }
36251 /* mov.b${G} ${Dsp-16-u8}[$Dst16An],${Dsp-24-s8}[sp] */
36254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36255 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI
, { 0x74380000 }
36257 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[sp] */
36260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36261 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI
, { 0x743a0000 }
36263 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[sp] */
36266 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 's', 'p', ']', 0 } },
36267 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI
, { 0x743b0000 }
36269 /* mov.b${G} ${Dsp-16-u16}[$Dst16An],${Dsp-32-s8}[sp] */
36272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36273 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI
, { 0x743c0000 }
36275 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[sp] */
36278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36279 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI
, { 0x743e0000 }
36281 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[sp] */
36284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 's', 'p', ']', 0 } },
36285 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI
, { 0x743f0000 }
36287 /* mov.b${G} $Dst16RnQI,${Dsp-16-s8}[sp] */
36290 { { MNEM
, OP (G
), ' ', OP (DST16RNQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36291 & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI
, { 0x743000 }
36293 /* mov.b${G} $Dst16AnQI,${Dsp-16-s8}[sp] */
36296 { { MNEM
, OP (G
), ' ', OP (DST16ANQI
), ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36297 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI
, { 0x743400 }
36299 /* mov.b${G} [$Dst16An],${Dsp-16-s8}[sp] */
36302 { { MNEM
, OP (G
), ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_S8
), '[', 's', 'p', ']', 0 } },
36303 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI
, { 0x743600 }
36305 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
36308 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36309 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb30f0000 }
36311 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36314 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36315 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb38f0000 }
36317 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36320 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36321 & ifmt_mov32_w_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3cf0000 }
36323 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
36326 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36327 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb50f0000 }
36329 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36332 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36333 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb58f0000 }
36335 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
36338 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
36339 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5cf0000 }
36341 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36344 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36345 & ifmt_mov32_w_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7cf0000 }
36347 /* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
36350 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36351 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb70f0000 }
36353 /* mov.w${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
36356 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), 0 } },
36357 & ifmt_mov32_w_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xb78f0000 }
36359 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedHI */
36362 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
36363 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xb90f00 }
36365 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedHI */
36368 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
36369 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb18f00 }
36371 /* mov.w${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
36374 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36375 & ifmt_mov32_w_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xb10f00 }
36377 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst32AnUnprefixed] */
36380 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36381 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb20f0000 }
36383 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36386 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36387 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb28f0000 }
36389 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36392 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36393 & ifmt_mov32_b_dst_dspsp_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2cf0000 }
36395 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst32AnUnprefixed] */
36398 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36399 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb40f0000 }
36401 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36404 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36405 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb48f0000 }
36407 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-s16}[fb] */
36410 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
36411 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4cf0000 }
36413 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36416 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36417 & ifmt_mov32_b_dst_dspsp_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6cf0000 }
36419 /* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24}[$Dst32AnUnprefixed] */
36422 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36423 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb60f0000 }
36425 /* mov.b${G} ${Dsp-40-s8}[sp],${Dsp-16-u24} */
36428 { { MNEM
, OP (G
), ' ', OP (DSP_40_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U24
), 0 } },
36429 & ifmt_mov32_b_dst_dspsp_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xb68f0000 }
36431 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst32RnUnprefixedQI */
36434 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
36435 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xb80f00 }
36437 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst32AnUnprefixedQI */
36440 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
36441 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xb08f00 }
36443 /* mov.b${G} ${Dsp-16-s8}[sp],[$Dst32AnUnprefixed] */
36446 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36447 & ifmt_mov32_b_dst_dspsp_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xb00f00 }
36449 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
36452 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
36453 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_An_relative_HI
, { 0x75b80000 }
36455 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36458 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36459 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_SB_relative_HI
, { 0x75ba0000 }
36461 /* mov.w${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36464 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36465 & ifmt_mov16_w_dst_dspsp_16_8_dst16_16_8_FB_relative_HI
, { 0x75bb0000 }
36467 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
36470 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
36471 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_An_relative_HI
, { 0x75bc0000 }
36473 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36476 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36477 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_SB_relative_HI
, { 0x75be0000 }
36479 /* mov.w${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36482 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36483 & ifmt_mov16_w_dst_dspsp_16_16_dst16_16_16_absolute_HI
, { 0x75bf0000 }
36485 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst16RnHI */
36488 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16RNHI
), 0 } },
36489 & ifmt_mov16_w_dst_dspsp_basic_dst16_Rn_direct_HI
, { 0x75b000 }
36491 /* mov.w${G} ${Dsp-16-s8}[sp],$Dst16AnHI */
36494 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16ANHI
), 0 } },
36495 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_direct_HI
, { 0x75b400 }
36497 /* mov.w${G} ${Dsp-16-s8}[sp],[$Dst16An] */
36500 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST16AN
), ']', 0 } },
36501 & ifmt_mov16_w_dst_dspsp_basic_dst16_An_indirect_HI
, { 0x75b600 }
36503 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[$Dst16An] */
36506 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
36507 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_An_relative_QI
, { 0x74b80000 }
36509 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-u8}[sb] */
36512 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
36513 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_SB_relative_QI
, { 0x74ba0000 }
36515 /* mov.b${G} ${Dsp-24-s8}[sp],${Dsp-16-s8}[fb] */
36518 { { MNEM
, OP (G
), ' ', OP (DSP_24_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
36519 & ifmt_mov16_b_dst_dspsp_16_8_dst16_16_8_FB_relative_QI
, { 0x74bb0000 }
36521 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[$Dst16An] */
36524 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
36525 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_An_relative_QI
, { 0x74bc0000 }
36527 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16}[sb] */
36530 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
36531 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_SB_relative_QI
, { 0x74be0000 }
36533 /* mov.b${G} ${Dsp-32-s8}[sp],${Dsp-16-u16} */
36536 { { MNEM
, OP (G
), ' ', OP (DSP_32_S8
), '[', 's', 'p', ']', ',', OP (DSP_16_U16
), 0 } },
36537 & ifmt_mov16_b_dst_dspsp_16_16_dst16_16_16_absolute_QI
, { 0x74bf0000 }
36539 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst16RnQI */
36542 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16RNQI
), 0 } },
36543 & ifmt_mov16_b_dst_dspsp_basic_dst16_Rn_direct_QI
, { 0x74b000 }
36545 /* mov.b${G} ${Dsp-16-s8}[sp],$Dst16AnQI */
36548 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', OP (DST16ANQI
), 0 } },
36549 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_direct_QI
, { 0x74b400 }
36551 /* mov.b${G} ${Dsp-16-s8}[sp],[$Dst16An] */
36554 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 's', 'p', ']', ',', '[', OP (DST16AN
), ']', 0 } },
36555 & ifmt_mov16_b_dst_dspsp_basic_dst16_An_indirect_QI
, { 0x74b600 }
36557 /* mov.l${S} ${Dsp-8-u8}[sb],a1 */
36560 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'a', '1', 0 } },
36561 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI
, { 0x6900 }
36563 /* mov.l${S} ${Dsp-8-s8}[fb],a1 */
36566 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'a', '1', 0 } },
36567 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI
, { 0x7900 }
36569 /* mov.l${S} ${Dsp-8-u8}[sb],a0 */
36572 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'a', '0', 0 } },
36573 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_SB_relative_SI
, { 0x6800 }
36575 /* mov.l${S} ${Dsp-8-s8}[fb],a0 */
36578 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'a', '0', 0 } },
36579 & ifmt_mov32_sz_dst32_2_S_8_a1_dst32_2_S_8_FB_relative_SI
, { 0x7800 }
36581 /* mov.l${S} ${Dsp-8-u16},a1 */
36584 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'a', '1', 0 } },
36585 & ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI
, { 0x590000 }
36587 /* mov.l${S} ${Dsp-8-u16},a0 */
36590 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'a', '0', 0 } },
36591 & ifmt_mov32_sz_dst32_2_S_16_a1_dst32_2_S_16_absolute_SI
, { 0x580000 }
36593 /* mov.w${S} r0,${Dsp-8-u8}[sb] */
36596 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36597 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2100 }
36599 /* mov.w${S} r0,${Dsp-8-s8}[fb] */
36602 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36603 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3100 }
36605 /* mov.b${S} r0l,${Dsp-8-u8}[sb] */
36608 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36609 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2000 }
36611 /* mov.b${S} r0l,${Dsp-8-s8}[fb] */
36614 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36615 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3000 }
36617 /* mov.w${S} r0,${Dsp-8-u16} */
36620 { { MNEM
, OP (S
), ' ', 'r', '0', ',', OP (DSP_8_U16
), 0 } },
36621 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x110000 }
36623 /* mov.b${S} r0l,${Dsp-8-u16} */
36626 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', OP (DSP_8_U16
), 0 } },
36627 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x100000 }
36629 /* mov.w${S} ${Dsp-8-u8}[sb],r1 */
36632 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '1', 0 } },
36633 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x6f00 }
36635 /* mov.w${S} ${Dsp-8-s8}[fb],r1 */
36638 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 0 } },
36639 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x7f00 }
36641 /* mov.b${S} ${Dsp-8-u8}[sb],r1l */
36644 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '1', 'l', 0 } },
36645 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x6e00 }
36647 /* mov.b${S} ${Dsp-8-s8}[fb],r1l */
36650 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '1', 'l', 0 } },
36651 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x7e00 }
36653 /* mov.w${S} ${Dsp-8-u16},r1 */
36656 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '1', 0 } },
36657 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x5f0000 }
36659 /* mov.b${S} ${Dsp-8-u16},r1l */
36662 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '1', 'l', 0 } },
36663 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x5e0000 }
36665 /* mov.w${S} r0,r1 */
36668 { { MNEM
, OP (S
), ' ', 'r', '0', ',', 'r', '1', 0 } },
36669 & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI
, { 0x4f }
36671 /* mov.b${S} r0l,r1l */
36674 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', 'r', '1', 'l', 0 } },
36675 & ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI
, { 0x4e }
36677 /* mov.w${S} ${Dsp-8-u8}[sb],r0 */
36680 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '0', 0 } },
36681 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2900 }
36683 /* mov.w${S} ${Dsp-8-s8}[fb],r0 */
36686 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 0 } },
36687 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3900 }
36689 /* mov.b${S} ${Dsp-8-u8}[sb],r0l */
36692 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', 'r', '0', 'l', 0 } },
36693 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2800 }
36695 /* mov.b${S} ${Dsp-8-s8}[fb],r0l */
36698 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', 'r', '0', 'l', 0 } },
36699 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3800 }
36701 /* mov.w${S} ${Dsp-8-u16},r0 */
36704 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '0', 0 } },
36705 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x190000 }
36707 /* mov.b${S} ${Dsp-8-u16},r0l */
36710 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', 'r', '0', 'l', 0 } },
36711 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x180000 }
36713 /* mov.b${S} ${SrcDst16-r0l-r0h-S-normal} */
36716 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
36717 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x8 }
36719 /* mov.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
36722 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
36723 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x900 }
36725 /* mov.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
36728 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
36729 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0xa00 }
36731 /* mov.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
36734 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
36735 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0xb0000 }
36737 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u8}[sb] */
36740 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
36741 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x100 }
36743 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-s8}[fb] */
36746 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
36747 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x200 }
36749 /* mov.b${S} ${Dst16RnQI-S},${Dsp-8-u16} */
36752 { { MNEM
, OP (S
), ' ', OP (DST16RNQI_S
), ',', OP (DSP_8_U16
), 0 } },
36753 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x30000 }
36755 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
36758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36759 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990300 }
36761 /* mov.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
36764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36765 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992300 }
36767 /* mov.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
36770 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36771 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993300 }
36773 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
36776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36777 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918300 }
36779 /* mov.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
36782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36783 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a300 }
36785 /* mov.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
36788 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36789 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b300 }
36791 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
36794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36795 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910300 }
36797 /* mov.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
36800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36801 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912300 }
36803 /* mov.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
36806 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36807 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913300 }
36809 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36813 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93030000 }
36815 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36819 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93230000 }
36821 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
36824 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36825 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93330000 }
36827 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36831 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95030000 }
36833 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36837 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95230000 }
36839 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
36842 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36843 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95330000 }
36845 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36849 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97030000 }
36851 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36855 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97230000 }
36857 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
36860 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
36861 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97330000 }
36863 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
36866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36867 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93830000 }
36869 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
36872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36873 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a30000 }
36875 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
36878 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
36879 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b30000 }
36881 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
36884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36885 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95830000 }
36887 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
36890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36891 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a30000 }
36893 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
36896 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
36897 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b30000 }
36899 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
36902 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36903 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c30000 }
36905 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
36908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36909 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e30000 }
36911 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
36914 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
36915 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f30000 }
36917 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
36920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36921 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c30000 }
36923 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
36926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36927 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e30000 }
36929 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
36932 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
36933 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f30000 }
36935 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
36938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
36939 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c30000 }
36941 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
36944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
36945 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e30000 }
36947 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
36950 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
36951 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f30000 }
36953 /* mov.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
36956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
36957 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97830000 }
36959 /* mov.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
36962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
36963 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a30000 }
36965 /* mov.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
36968 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
36969 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b30000 }
36971 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
36974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36975 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9030000 }
36977 /* mov.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
36980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36981 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9230000 }
36983 /* mov.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
36986 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36987 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9330000 }
36989 /* mov.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
36992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
36993 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9330000 }
36995 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
36998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
36999 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1830000 }
37001 /* mov.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
37004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37005 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a30000 }
37007 /* mov.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
37010 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37011 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b30000 }
37013 /* mov.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
37016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37017 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b30000 }
37019 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37023 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1030000 }
37025 /* mov.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
37028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37029 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1230000 }
37031 /* mov.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
37034 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37035 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1330000 }
37037 /* mov.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
37040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37041 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1330000 }
37043 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37047 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3030000 }
37049 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37053 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3230000 }
37055 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37058 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37059 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3330000 }
37061 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
37064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37065 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3330000 }
37067 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37071 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5030000 }
37073 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37077 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5230000 }
37079 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37082 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37083 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5330000 }
37085 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
37088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37089 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5330000 }
37091 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37095 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7030000 }
37097 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37101 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7230000 }
37103 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37106 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37107 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7330000 }
37109 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
37112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37113 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7330000 }
37115 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
37118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37119 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3830000 }
37121 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
37124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37125 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a30000 }
37127 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
37130 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37131 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b30000 }
37133 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
37136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
37137 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b30000 }
37139 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
37142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37143 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5830000 }
37145 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
37148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37149 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a30000 }
37151 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
37154 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37155 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b30000 }
37157 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
37160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
37161 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b30000 }
37163 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
37166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37167 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c30000 }
37169 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
37172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37173 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e30000 }
37175 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
37178 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37179 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f30000 }
37181 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
37184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
37185 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f30000 }
37187 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
37190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37191 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c30000 }
37193 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
37196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37197 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e30000 }
37199 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
37202 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37203 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f30000 }
37205 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
37208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
37209 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f30000 }
37211 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
37214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
37215 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c30000 }
37217 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
37220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
37221 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e30000 }
37223 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
37226 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
37227 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f30000 }
37229 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
37232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
37233 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f30000 }
37235 /* mov.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
37238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
37239 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7830000 }
37241 /* mov.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
37244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
37245 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a30000 }
37247 /* mov.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
37250 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
37251 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b30000 }
37253 /* mov.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
37256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
37257 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b30000 }
37259 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
37262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37263 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9030000 }
37265 /* mov.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
37268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37269 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9230000 }
37271 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
37274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37275 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1830000 }
37277 /* mov.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
37280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37281 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a30000 }
37283 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37287 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1030000 }
37289 /* mov.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
37292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37293 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1230000 }
37295 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
37298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37299 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3030000 }
37301 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
37304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37305 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3230000 }
37307 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
37310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37311 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5030000 }
37313 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
37316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37317 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5230000 }
37319 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
37322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37323 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7030000 }
37325 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
37328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37329 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7230000 }
37331 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
37334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
37335 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3830000 }
37337 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
37340 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
37341 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a30000 }
37343 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
37346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
37347 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5830000 }
37349 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
37352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
37353 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a30000 }
37355 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
37358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
37359 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c30000 }
37361 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
37364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
37365 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e30000 }
37367 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
37370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
37371 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c30000 }
37373 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
37376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
37377 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e30000 }
37379 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
37382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
37383 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c30000 }
37385 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
37388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
37389 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e30000 }
37391 /* mov.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
37394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
37395 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7830000 }
37397 /* mov.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
37400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
37401 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a30000 }
37403 /* mov.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
37406 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37407 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc903 }
37409 /* mov.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
37412 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37413 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8923 }
37415 /* mov.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
37418 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
37419 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8903 }
37421 /* mov.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
37424 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37425 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc183 }
37427 /* mov.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
37430 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37431 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a3 }
37433 /* mov.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
37436 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
37437 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8183 }
37439 /* mov.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
37442 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37443 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc103 }
37445 /* mov.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
37448 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37449 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8123 }
37451 /* mov.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37454 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37455 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8103 }
37457 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
37460 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37461 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30300 }
37463 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
37466 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37467 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832300 }
37469 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
37472 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37473 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830300 }
37475 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
37478 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37479 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5030000 }
37481 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
37484 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37485 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85230000 }
37487 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
37490 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37491 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85030000 }
37493 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
37496 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37497 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7030000 }
37499 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
37502 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37503 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87230000 }
37505 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
37508 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37509 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87030000 }
37511 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
37514 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37515 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38300 }
37517 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
37520 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37521 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a300 }
37523 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
37526 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
37527 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838300 }
37529 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
37532 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37533 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5830000 }
37535 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
37538 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37539 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a30000 }
37541 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
37544 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
37545 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85830000 }
37547 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
37550 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37551 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c300 }
37553 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
37556 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37557 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e300 }
37559 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
37562 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
37563 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c300 }
37565 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
37568 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37569 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c30000 }
37571 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
37574 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37575 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e30000 }
37577 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
37580 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
37581 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c30000 }
37583 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
37586 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
37587 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c30000 }
37589 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
37592 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
37593 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e30000 }
37595 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
37598 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
37599 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c30000 }
37601 /* mov.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
37604 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
37605 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7830000 }
37607 /* mov.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
37610 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
37611 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a30000 }
37613 /* mov.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
37616 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
37617 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87830000 }
37619 /* mov.b${S} ${Dsp-8-u8}[sb],${Dst16AnQI-S} */
37622 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI_S
), 0 } },
37623 & ifmt_mov16_b_S_An_src16_2_S_8_SB_relative_QI
, { 0x3100 }
37625 /* mov.b${S} ${Dsp-8-s8}[fb],${Dst16AnQI-S} */
37628 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI_S
), 0 } },
37629 & ifmt_mov16_b_S_An_src16_2_S_8_FB_relative_QI
, { 0x3200 }
37631 /* mov.b${S} ${Dsp-8-u16},${Dst16AnQI-S} */
37634 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16ANQI_S
), 0 } },
37635 & ifmt_mov16_b_S_An_src16_2_S_16_absolute_QI
, { 0x330000 }
37637 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
37640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37641 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990b00 }
37643 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
37646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37647 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992b00 }
37649 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
37652 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37653 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993b00 }
37655 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
37658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37659 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918b00 }
37661 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
37664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37665 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ab00 }
37667 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
37670 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37671 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bb00 }
37673 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37677 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910b00 }
37679 /* mov.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
37682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37683 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912b00 }
37685 /* mov.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
37688 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37689 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913b00 }
37691 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37695 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930b0000 }
37697 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37701 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932b0000 }
37703 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
37706 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37707 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933b0000 }
37709 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37713 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950b0000 }
37715 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37719 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952b0000 }
37721 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
37724 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37725 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953b0000 }
37727 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37731 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970b0000 }
37733 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37737 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972b0000 }
37739 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
37742 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37743 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973b0000 }
37745 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
37748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37749 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938b0000 }
37751 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
37754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37755 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ab0000 }
37757 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
37760 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
37761 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bb0000 }
37763 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
37766 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37767 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958b0000 }
37769 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
37772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37773 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ab0000 }
37775 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
37778 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
37779 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bb0000 }
37781 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
37784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37785 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cb0000 }
37787 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
37790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37791 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93eb0000 }
37793 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
37796 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
37797 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fb0000 }
37799 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
37802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37803 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cb0000 }
37805 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
37808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37809 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95eb0000 }
37811 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
37814 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
37815 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fb0000 }
37817 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
37820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
37821 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cb0000 }
37823 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
37826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
37827 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97eb0000 }
37829 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
37832 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
37833 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fb0000 }
37835 /* mov.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
37838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
37839 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978b0000 }
37841 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
37844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
37845 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ab0000 }
37847 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
37850 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
37851 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bb0000 }
37853 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
37856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37857 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90b0000 }
37859 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
37862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37863 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92b0000 }
37865 /* mov.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
37868 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37869 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93b0000 }
37871 /* mov.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
37874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
37875 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93b0000 }
37877 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
37880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37881 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18b0000 }
37883 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
37886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37887 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ab0000 }
37889 /* mov.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
37892 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37893 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bb0000 }
37895 /* mov.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
37898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
37899 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bb0000 }
37901 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
37904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37905 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10b0000 }
37907 /* mov.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
37910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37911 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12b0000 }
37913 /* mov.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
37916 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37917 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13b0000 }
37919 /* mov.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
37922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37923 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13b0000 }
37925 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37929 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30b0000 }
37931 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37935 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32b0000 }
37937 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
37940 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37941 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33b0000 }
37943 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
37946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37947 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33b0000 }
37949 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37953 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50b0000 }
37955 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37959 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52b0000 }
37961 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
37964 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37965 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53b0000 }
37967 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
37970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37971 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53b0000 }
37973 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37977 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70b0000 }
37979 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37983 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72b0000 }
37985 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
37988 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37989 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73b0000 }
37991 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
37994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
37995 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73b0000 }
37997 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
38000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38001 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38b0000 }
38003 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
38006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38007 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ab0000 }
38009 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
38012 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38013 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bb0000 }
38015 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
38018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38019 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bb0000 }
38021 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
38024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38025 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58b0000 }
38027 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
38030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38031 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ab0000 }
38033 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
38036 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38037 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bb0000 }
38039 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
38042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38043 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bb0000 }
38045 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
38048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38049 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cb0000 }
38051 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
38054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38055 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3eb0000 }
38057 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
38060 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38061 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fb0000 }
38063 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
38066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38067 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fb0000 }
38069 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
38072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38073 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cb0000 }
38075 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
38078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38079 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5eb0000 }
38081 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
38084 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38085 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fb0000 }
38087 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
38090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38091 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fb0000 }
38093 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
38096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
38097 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cb0000 }
38099 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
38102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38103 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7eb0000 }
38105 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
38108 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38109 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fb0000 }
38111 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
38114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
38115 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fb0000 }
38117 /* mov.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
38120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
38121 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78b0000 }
38123 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
38126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38127 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ab0000 }
38129 /* mov.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
38132 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38133 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bb0000 }
38135 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
38138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
38139 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bb0000 }
38141 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
38144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38145 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90b0000 }
38147 /* mov.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
38150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38151 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92b0000 }
38153 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
38156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38157 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18b0000 }
38159 /* mov.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
38162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38163 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ab0000 }
38165 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38169 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10b0000 }
38171 /* mov.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
38174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38175 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12b0000 }
38177 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
38180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38181 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30b0000 }
38183 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
38186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38187 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32b0000 }
38189 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
38192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38193 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50b0000 }
38195 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
38198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38199 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52b0000 }
38201 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
38204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38205 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70b0000 }
38207 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
38210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38211 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72b0000 }
38213 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
38216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
38217 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38b0000 }
38219 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
38222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
38223 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ab0000 }
38225 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
38228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
38229 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58b0000 }
38231 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
38234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
38235 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ab0000 }
38237 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
38240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
38241 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cb0000 }
38243 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
38246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
38247 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3eb0000 }
38249 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
38252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
38253 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cb0000 }
38255 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
38258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
38259 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5eb0000 }
38261 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
38264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
38265 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cb0000 }
38267 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
38270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
38271 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7eb0000 }
38273 /* mov.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
38276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
38277 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78b0000 }
38279 /* mov.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
38282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
38283 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ab0000 }
38285 /* mov.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
38288 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38289 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90b }
38291 /* mov.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
38294 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38295 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892b }
38297 /* mov.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
38300 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
38301 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890b }
38303 /* mov.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
38306 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38307 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18b }
38309 /* mov.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
38312 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38313 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ab }
38315 /* mov.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
38318 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
38319 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818b }
38321 /* mov.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
38324 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38325 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10b }
38327 /* mov.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
38330 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38331 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812b }
38333 /* mov.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38336 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38337 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810b }
38339 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
38342 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38343 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30b00 }
38345 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
38348 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38349 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832b00 }
38351 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
38354 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38355 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830b00 }
38357 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
38360 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38361 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50b0000 }
38363 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
38366 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38367 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852b0000 }
38369 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
38372 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38373 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850b0000 }
38375 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
38378 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38379 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70b0000 }
38381 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
38384 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38385 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872b0000 }
38387 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
38390 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38391 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870b0000 }
38393 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
38396 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38397 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38b00 }
38399 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
38402 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38403 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ab00 }
38405 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
38408 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
38409 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838b00 }
38411 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
38414 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38415 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58b0000 }
38417 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
38420 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38421 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ab0000 }
38423 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
38426 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
38427 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858b0000 }
38429 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
38432 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38433 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cb00 }
38435 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
38438 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38439 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83eb00 }
38441 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
38444 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
38445 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cb00 }
38447 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
38450 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38451 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cb0000 }
38453 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
38456 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38457 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85eb0000 }
38459 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
38462 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
38463 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cb0000 }
38465 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
38468 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
38469 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cb0000 }
38471 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
38474 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
38475 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87eb0000 }
38477 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
38480 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
38481 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cb0000 }
38483 /* mov.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
38486 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
38487 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78b0000 }
38489 /* mov.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
38492 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
38493 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ab0000 }
38495 /* mov.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
38498 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
38499 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878b0000 }
38501 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38505 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980b00 }
38507 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
38510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38511 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982b00 }
38513 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
38516 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38517 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983b00 }
38519 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
38522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38523 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908b00 }
38525 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
38528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38529 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ab00 }
38531 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
38534 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38535 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bb00 }
38537 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38541 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900b00 }
38543 /* mov.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
38546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38547 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902b00 }
38549 /* mov.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
38552 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38553 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903b00 }
38555 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38559 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920b0000 }
38561 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38565 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922b0000 }
38567 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
38570 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38571 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923b0000 }
38573 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38577 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940b0000 }
38579 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38583 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942b0000 }
38585 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
38588 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38589 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943b0000 }
38591 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38595 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960b0000 }
38597 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38601 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962b0000 }
38603 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
38606 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38607 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963b0000 }
38609 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
38612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38613 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928b0000 }
38615 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
38618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38619 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ab0000 }
38621 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
38624 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
38625 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bb0000 }
38627 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
38630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38631 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948b0000 }
38633 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
38636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38637 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ab0000 }
38639 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
38642 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
38643 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bb0000 }
38645 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
38648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38649 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cb0000 }
38651 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
38654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38655 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92eb0000 }
38657 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
38660 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
38661 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fb0000 }
38663 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
38666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38667 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cb0000 }
38669 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
38672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38673 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94eb0000 }
38675 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
38678 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
38679 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fb0000 }
38681 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
38684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
38685 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cb0000 }
38687 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
38690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
38691 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96eb0000 }
38693 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
38696 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
38697 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fb0000 }
38699 /* mov.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
38702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
38703 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968b0000 }
38705 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
38708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
38709 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ab0000 }
38711 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
38714 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
38715 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bb0000 }
38717 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
38720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38721 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80b0000 }
38723 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
38726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38727 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82b0000 }
38729 /* mov.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
38732 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38733 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83b0000 }
38735 /* mov.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
38738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
38739 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83b0000 }
38741 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
38744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38745 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08b0000 }
38747 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
38750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38751 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ab0000 }
38753 /* mov.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
38756 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38757 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bb0000 }
38759 /* mov.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
38762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
38763 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bb0000 }
38765 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
38768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38769 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00b0000 }
38771 /* mov.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
38774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38775 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02b0000 }
38777 /* mov.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
38780 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38781 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03b0000 }
38783 /* mov.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
38786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38787 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03b0000 }
38789 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38793 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20b0000 }
38795 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38799 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22b0000 }
38801 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
38804 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38805 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23b0000 }
38807 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
38810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38811 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23b0000 }
38813 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38817 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40b0000 }
38819 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38823 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42b0000 }
38825 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
38828 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38829 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43b0000 }
38831 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
38834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38835 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43b0000 }
38837 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38841 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60b0000 }
38843 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38847 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62b0000 }
38849 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
38852 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38853 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63b0000 }
38855 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
38858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
38859 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63b0000 }
38861 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
38864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38865 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28b0000 }
38867 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
38870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38871 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ab0000 }
38873 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
38876 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38877 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bb0000 }
38879 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
38882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
38883 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bb0000 }
38885 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
38888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38889 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48b0000 }
38891 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
38894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38895 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ab0000 }
38897 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
38900 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38901 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bb0000 }
38903 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
38906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
38907 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bb0000 }
38909 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
38912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38913 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cb0000 }
38915 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
38918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38919 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2eb0000 }
38921 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
38924 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38925 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fb0000 }
38927 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
38930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
38931 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fb0000 }
38933 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
38936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38937 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cb0000 }
38939 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
38942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38943 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4eb0000 }
38945 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
38948 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38949 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fb0000 }
38951 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
38954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
38955 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fb0000 }
38957 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
38960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
38961 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cb0000 }
38963 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
38966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38967 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6eb0000 }
38969 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
38972 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
38973 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fb0000 }
38975 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
38978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
38979 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fb0000 }
38981 /* mov.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
38984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
38985 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68b0000 }
38987 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
38990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38991 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ab0000 }
38993 /* mov.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
38996 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
38997 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bb0000 }
38999 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
39002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
39003 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bb0000 }
39005 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
39008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39009 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80b0000 }
39011 /* mov.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
39014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39015 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82b0000 }
39017 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
39020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39021 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08b0000 }
39023 /* mov.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
39026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39027 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ab0000 }
39029 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
39032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39033 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00b0000 }
39035 /* mov.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
39038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39039 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02b0000 }
39041 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
39044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39045 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20b0000 }
39047 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
39050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39051 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22b0000 }
39053 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
39056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39057 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40b0000 }
39059 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
39062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39063 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42b0000 }
39065 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
39068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39069 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60b0000 }
39071 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
39074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39075 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62b0000 }
39077 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
39080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
39081 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28b0000 }
39083 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
39086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
39087 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ab0000 }
39089 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
39092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
39093 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48b0000 }
39095 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
39098 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
39099 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ab0000 }
39101 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
39104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
39105 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cb0000 }
39107 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
39110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
39111 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2eb0000 }
39113 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
39116 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
39117 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cb0000 }
39119 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
39122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
39123 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4eb0000 }
39125 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
39128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
39129 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cb0000 }
39131 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
39134 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
39135 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6eb0000 }
39137 /* mov.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
39140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
39141 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68b0000 }
39143 /* mov.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
39146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
39147 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ab0000 }
39149 /* mov.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
39152 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39153 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80b }
39155 /* mov.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
39158 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39159 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882b }
39161 /* mov.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
39164 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
39165 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880b }
39167 /* mov.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
39170 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39171 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08b }
39173 /* mov.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
39176 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39177 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ab }
39179 /* mov.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
39182 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
39183 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808b }
39185 /* mov.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
39188 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39189 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00b }
39191 /* mov.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
39194 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39195 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802b }
39197 /* mov.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
39200 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39201 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800b }
39203 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
39206 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39207 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20b00 }
39209 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
39212 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39213 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822b00 }
39215 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
39218 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39219 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820b00 }
39221 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
39224 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39225 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40b0000 }
39227 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
39230 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39231 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842b0000 }
39233 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
39236 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39237 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840b0000 }
39239 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
39242 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39243 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60b0000 }
39245 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
39248 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39249 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862b0000 }
39251 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
39254 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
39255 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860b0000 }
39257 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
39260 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39261 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28b00 }
39263 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
39266 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39267 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ab00 }
39269 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
39272 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39273 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828b00 }
39275 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
39278 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39279 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48b0000 }
39281 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
39284 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39285 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ab0000 }
39287 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
39290 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39291 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848b0000 }
39293 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
39296 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39297 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cb00 }
39299 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
39302 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39303 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82eb00 }
39305 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
39308 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39309 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cb00 }
39311 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
39314 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39315 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cb0000 }
39317 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
39320 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39321 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84eb0000 }
39323 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
39326 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
39327 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cb0000 }
39329 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
39332 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
39333 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cb0000 }
39335 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
39338 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
39339 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86eb0000 }
39341 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
39344 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
39345 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cb0000 }
39347 /* mov.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
39350 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
39351 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68b0000 }
39353 /* mov.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
39356 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
39357 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ab0000 }
39359 /* mov.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
39362 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
39363 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868b0000 }
39365 /* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
39368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39369 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x738000 }
39371 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
39374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39375 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x73a000 }
39377 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
39380 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39381 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x73b000 }
39383 /* mov.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
39386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39387 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x738400 }
39389 /* mov.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
39392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39393 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x73a400 }
39395 /* mov.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
39398 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39399 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x73b400 }
39401 /* mov.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
39404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39405 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x738600 }
39407 /* mov.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
39410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39411 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x73a600 }
39413 /* mov.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
39416 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39417 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x73b600 }
39419 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
39422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39423 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x73880000 }
39425 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
39428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39429 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x73a80000 }
39431 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
39434 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39435 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x73b80000 }
39437 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
39440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39441 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x738c0000 }
39443 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
39446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39447 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x73ac0000 }
39449 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
39452 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39453 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x73bc0000 }
39455 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
39458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39459 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x738a0000 }
39461 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
39464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39465 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x73aa0000 }
39467 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
39470 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39471 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x73ba0000 }
39473 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
39476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39477 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x738e0000 }
39479 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
39482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39483 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x73ae0000 }
39485 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
39488 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39489 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x73be0000 }
39491 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
39494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39495 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x738b0000 }
39497 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
39500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39501 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x73ab0000 }
39503 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
39506 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39507 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x73bb0000 }
39509 /* mov.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
39512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
39513 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x738f0000 }
39515 /* mov.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
39518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39519 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x73af0000 }
39521 /* mov.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
39524 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
39525 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x73bf0000 }
39527 /* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
39530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39531 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x73c00000 }
39533 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
39536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
39537 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x73e00000 }
39539 /* mov.w${G} ${Dsp-16-u16},$Dst16RnHI */
39542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
39543 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x73f00000 }
39545 /* mov.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
39548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39549 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x73c40000 }
39551 /* mov.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
39554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
39555 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x73e40000 }
39557 /* mov.w${G} ${Dsp-16-u16},$Dst16AnHI */
39560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
39561 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x73f40000 }
39563 /* mov.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
39566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39567 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x73c60000 }
39569 /* mov.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
39572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39573 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x73e60000 }
39575 /* mov.w${G} ${Dsp-16-u16},[$Dst16An] */
39578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
39579 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x73f60000 }
39581 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
39584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39585 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x73c80000 }
39587 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
39590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39591 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x73e80000 }
39593 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
39596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
39597 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x73f80000 }
39599 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
39602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39603 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x73cc0000 }
39605 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
39608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39609 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x73ec0000 }
39611 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
39614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
39615 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x73fc0000 }
39617 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
39620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39621 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x73ca0000 }
39623 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
39626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39627 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x73ea0000 }
39629 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
39632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
39633 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x73fa0000 }
39635 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
39638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39639 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x73ce0000 }
39641 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
39644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39645 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x73ee0000 }
39647 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
39650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
39651 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x73fe0000 }
39653 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
39656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39657 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x73cb0000 }
39659 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
39662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39663 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x73eb0000 }
39665 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
39668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
39669 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x73fb0000 }
39671 /* mov.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
39674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
39675 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x73cf0000 }
39677 /* mov.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
39680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
39681 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x73ef0000 }
39683 /* mov.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
39686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
39687 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x73ff0000 }
39689 /* mov.w${G} $Src16RnHI,$Dst16RnHI */
39692 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
39693 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x7300 }
39695 /* mov.w${G} $Src16AnHI,$Dst16RnHI */
39698 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
39699 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x7340 }
39701 /* mov.w${G} [$Src16An],$Dst16RnHI */
39704 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
39705 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x7360 }
39707 /* mov.w${G} $Src16RnHI,$Dst16AnHI */
39710 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
39711 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x7304 }
39713 /* mov.w${G} $Src16AnHI,$Dst16AnHI */
39716 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
39717 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x7344 }
39719 /* mov.w${G} [$Src16An],$Dst16AnHI */
39722 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
39723 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x7364 }
39725 /* mov.w${G} $Src16RnHI,[$Dst16An] */
39728 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
39729 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x7306 }
39731 /* mov.w${G} $Src16AnHI,[$Dst16An] */
39734 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
39735 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x7346 }
39737 /* mov.w${G} [$Src16An],[$Dst16An] */
39740 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39741 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x7366 }
39743 /* mov.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
39746 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39747 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x730800 }
39749 /* mov.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
39752 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39753 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x734800 }
39755 /* mov.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
39758 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
39759 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x736800 }
39761 /* mov.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
39764 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39765 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x730c0000 }
39767 /* mov.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
39770 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39771 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x734c0000 }
39773 /* mov.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
39776 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
39777 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x736c0000 }
39779 /* mov.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
39782 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39783 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x730a00 }
39785 /* mov.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
39788 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39789 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x734a00 }
39791 /* mov.w${G} [$Src16An],${Dsp-16-u8}[sb] */
39794 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
39795 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x736a00 }
39797 /* mov.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
39800 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39801 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x730e0000 }
39803 /* mov.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
39806 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39807 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x734e0000 }
39809 /* mov.w${G} [$Src16An],${Dsp-16-u16}[sb] */
39812 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
39813 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x736e0000 }
39815 /* mov.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
39818 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39819 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x730b00 }
39821 /* mov.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
39824 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39825 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x734b00 }
39827 /* mov.w${G} [$Src16An],${Dsp-16-s8}[fb] */
39830 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
39831 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x736b00 }
39833 /* mov.w${G} $Src16RnHI,${Dsp-16-u16} */
39836 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
39837 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x730f0000 }
39839 /* mov.w${G} $Src16AnHI,${Dsp-16-u16} */
39842 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
39843 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x734f0000 }
39845 /* mov.w${G} [$Src16An],${Dsp-16-u16} */
39848 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
39849 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x736f0000 }
39851 /* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
39854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
39855 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x728000 }
39857 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
39860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
39861 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x72a000 }
39863 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
39866 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
39867 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x72b000 }
39869 /* mov.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
39872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
39873 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x728400 }
39875 /* mov.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
39878 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
39879 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x72a400 }
39881 /* mov.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
39884 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
39885 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x72b400 }
39887 /* mov.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
39890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
39891 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x728600 }
39893 /* mov.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
39896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39897 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x72a600 }
39899 /* mov.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
39902 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
39903 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x72b600 }
39905 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
39908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39909 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x72880000 }
39911 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
39914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39915 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x72a80000 }
39917 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
39920 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
39921 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x72b80000 }
39923 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
39926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39927 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x728c0000 }
39929 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
39932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39933 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x72ac0000 }
39935 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
39938 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
39939 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x72bc0000 }
39941 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
39944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39945 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x728a0000 }
39947 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
39950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39951 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x72aa0000 }
39953 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
39956 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
39957 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x72ba0000 }
39959 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
39962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39963 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x728e0000 }
39965 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
39968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39969 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x72ae0000 }
39971 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
39974 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
39975 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x72be0000 }
39977 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
39980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39981 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x728b0000 }
39983 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
39986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39987 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x72ab0000 }
39989 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
39992 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
39993 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x72bb0000 }
39995 /* mov.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
39998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
39999 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x728f0000 }
40001 /* mov.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
40004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
40005 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x72af0000 }
40007 /* mov.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
40010 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
40011 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x72bf0000 }
40013 /* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
40016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
40017 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x72c00000 }
40019 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
40022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
40023 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x72e00000 }
40025 /* mov.b${G} ${Dsp-16-u16},$Dst16RnQI */
40028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
40029 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x72f00000 }
40031 /* mov.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
40034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
40035 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x72c40000 }
40037 /* mov.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
40040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
40041 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x72e40000 }
40043 /* mov.b${G} ${Dsp-16-u16},$Dst16AnQI */
40046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
40047 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x72f40000 }
40049 /* mov.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
40052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
40053 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x72c60000 }
40055 /* mov.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
40058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
40059 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x72e60000 }
40061 /* mov.b${G} ${Dsp-16-u16},[$Dst16An] */
40064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
40065 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x72f60000 }
40067 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
40070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40071 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x72c80000 }
40073 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
40076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40077 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x72e80000 }
40079 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
40082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
40083 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x72f80000 }
40085 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
40088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40089 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x72cc0000 }
40091 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
40094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40095 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x72ec0000 }
40097 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
40100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
40101 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x72fc0000 }
40103 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
40106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40107 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x72ca0000 }
40109 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
40112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40113 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x72ea0000 }
40115 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
40118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
40119 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x72fa0000 }
40121 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
40124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40125 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x72ce0000 }
40127 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
40130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40131 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x72ee0000 }
40133 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
40136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
40137 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x72fe0000 }
40139 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
40142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40143 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x72cb0000 }
40145 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
40148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40149 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x72eb0000 }
40151 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
40154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
40155 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x72fb0000 }
40157 /* mov.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
40160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
40161 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x72cf0000 }
40163 /* mov.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
40166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
40167 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x72ef0000 }
40169 /* mov.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
40172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
40173 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x72ff0000 }
40175 /* mov.b${G} $Src16RnQI,$Dst16RnQI */
40178 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
40179 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x7200 }
40181 /* mov.b${G} $Src16AnQI,$Dst16RnQI */
40184 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
40185 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x7240 }
40187 /* mov.b${G} [$Src16An],$Dst16RnQI */
40190 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
40191 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x7260 }
40193 /* mov.b${G} $Src16RnQI,$Dst16AnQI */
40196 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
40197 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x7204 }
40199 /* mov.b${G} $Src16AnQI,$Dst16AnQI */
40202 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
40203 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x7244 }
40205 /* mov.b${G} [$Src16An],$Dst16AnQI */
40208 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
40209 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x7264 }
40211 /* mov.b${G} $Src16RnQI,[$Dst16An] */
40214 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
40215 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x7206 }
40217 /* mov.b${G} $Src16AnQI,[$Dst16An] */
40220 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
40221 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x7246 }
40223 /* mov.b${G} [$Src16An],[$Dst16An] */
40226 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
40227 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x7266 }
40229 /* mov.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
40232 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40233 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x720800 }
40235 /* mov.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
40238 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40239 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x724800 }
40241 /* mov.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
40244 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40245 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x726800 }
40247 /* mov.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
40250 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40251 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x720c0000 }
40253 /* mov.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
40256 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40257 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x724c0000 }
40259 /* mov.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
40262 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40263 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x726c0000 }
40265 /* mov.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
40268 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40269 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x720a00 }
40271 /* mov.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
40274 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40275 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x724a00 }
40277 /* mov.b${G} [$Src16An],${Dsp-16-u8}[sb] */
40280 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40281 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x726a00 }
40283 /* mov.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
40286 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40287 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x720e0000 }
40289 /* mov.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
40292 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40293 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x724e0000 }
40295 /* mov.b${G} [$Src16An],${Dsp-16-u16}[sb] */
40298 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40299 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x726e0000 }
40301 /* mov.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
40304 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40305 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x720b00 }
40307 /* mov.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
40310 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40311 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x724b00 }
40313 /* mov.b${G} [$Src16An],${Dsp-16-s8}[fb] */
40316 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40317 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x726b00 }
40319 /* mov.b${G} $Src16RnQI,${Dsp-16-u16} */
40322 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
40323 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x720f0000 }
40325 /* mov.b${G} $Src16AnQI,${Dsp-16-u16} */
40328 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
40329 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x724f0000 }
40331 /* mov.b${G} [$Src16An],${Dsp-16-u16} */
40334 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
40335 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x726f0000 }
40337 /* mov.w${Z} #0,${Dsp-8-u8}[sb] */
40340 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40341 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2300 }
40343 /* mov.w${Z} #0,${Dsp-8-s8}[fb] */
40346 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40347 & ifmt_mov32_w_r0_dst32_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3300 }
40349 /* mov.w${Z} #0,${Dsp-8-u16} */
40352 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40353 & ifmt_mov32_w_r0_dst32_2_S_16_dst32_2_S_16_absolute_HI
, { 0x130000 }
40355 /* mov.w${Z} #0,r0 */
40358 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 0 } },
40359 & ifmt_mov32_w_dst32_2_S_basic_r1_dst32_2_S_R0_direct_HI
, { 0x3 }
40361 /* mov.b${Z} #0,${Dsp-8-u8}[sb] */
40364 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40365 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2200 }
40367 /* mov.b${Z} #0,${Dsp-8-s8}[fb] */
40370 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40371 & ifmt_mov32_b_r0l_dst32_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3200 }
40373 /* mov.b${Z} #0,${Dsp-8-u16} */
40376 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40377 & ifmt_mov32_b_r0l_dst32_2_S_16_dst32_2_S_16_absolute_QI
, { 0x120000 }
40379 /* mov.b${Z} #0,r0l */
40382 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'l', 0 } },
40383 & ifmt_mov32_b_dst32_2_S_basic_r1l_dst32_2_S_R0l_direct_QI
, { 0x2 }
40385 /* mov.b${Z} #0,r0l */
40388 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'l', 0 } },
40389 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xb4 }
40391 /* mov.b${Z} #0,r0h */
40394 { { MNEM
, OP (Z
), ' ', '#', '0', ',', 'r', '0', 'h', 0 } },
40395 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xb3 }
40397 /* mov.b${Z} #0,${Dsp-8-u8}[sb] */
40400 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40401 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xb500 }
40403 /* mov.b${Z} #0,${Dsp-8-s8}[fb] */
40406 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40407 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xb600 }
40409 /* mov.b${Z} #0,${Dsp-8-u16} */
40412 { { MNEM
, OP (Z
), ' ', '#', '0', ',', OP (DSP_8_U16
), 0 } },
40413 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xb70000 }
40415 /* mov.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
40418 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
40419 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf920 }
40421 /* mov.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
40424 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
40425 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf1a0 }
40427 /* mov.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
40430 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40431 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf120 }
40433 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40436 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40437 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf32000 }
40439 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40442 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40443 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5200000 }
40445 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40448 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40449 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7200000 }
40451 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
40454 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40455 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3a000 }
40457 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
40460 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40461 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5a00000 }
40463 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
40466 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40467 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3e000 }
40469 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
40472 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40473 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5e00000 }
40475 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
40478 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
40479 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7e00000 }
40481 /* mov.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
40484 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
40485 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7a00000 }
40487 /* mov.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
40490 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
40491 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf820 }
40493 /* mov.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
40496 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
40497 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf0a0 }
40499 /* mov.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
40502 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40503 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf020 }
40505 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40508 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40509 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf22000 }
40511 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40514 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40515 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4200000 }
40517 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40520 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40521 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6200000 }
40523 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
40526 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40527 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2a000 }
40529 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
40532 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40533 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4a00000 }
40535 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
40538 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40539 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2e000 }
40541 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
40544 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40545 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4e00000 }
40547 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
40550 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
40551 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6e00000 }
40553 /* mov.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
40556 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
40557 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6a00000 }
40559 /* mov.w${Q} #${Imm-8-s4},$Dst16RnHI */
40562 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
40563 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xd900 }
40565 /* mov.w${Q} #${Imm-8-s4},$Dst16AnHI */
40568 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
40569 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xd904 }
40571 /* mov.w${Q} #${Imm-8-s4},[$Dst16An] */
40574 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
40575 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xd906 }
40577 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
40580 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40581 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xd90800 }
40583 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
40586 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40587 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xd90c0000 }
40589 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
40592 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40593 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xd90a00 }
40595 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
40598 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40599 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xd90e0000 }
40601 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
40604 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40605 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xd90b00 }
40607 /* mov.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
40610 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
40611 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xd90f0000 }
40613 /* mov.b${Q} #${Imm-8-s4},$Dst16RnQI */
40616 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
40617 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xd800 }
40619 /* mov.b${Q} #${Imm-8-s4},$Dst16AnQI */
40622 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
40623 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xd804 }
40625 /* mov.b${Q} #${Imm-8-s4},[$Dst16An] */
40628 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
40629 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xd806 }
40631 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
40634 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40635 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xd80800 }
40637 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
40640 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
40641 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xd80c0000 }
40643 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
40646 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40647 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xd80a00 }
40649 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
40652 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40653 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xd80e0000 }
40655 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
40658 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40659 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xd80b00 }
40661 /* mov.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
40664 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
40665 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xd80f0000 }
40667 /* mov.b${S} #${Imm-8-QI},r0l */
40670 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
40671 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xc400 }
40673 /* mov.b${S} #${Imm-8-QI},r0h */
40676 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
40677 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xc300 }
40679 /* mov.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
40682 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40683 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xc50000 }
40685 /* mov.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
40688 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40689 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xc60000 }
40691 /* mov.b${S} #${Imm-8-QI},${Dsp-16-u16} */
40694 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
40695 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xc7000000 }
40697 /* mov.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
40700 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40701 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x25000000 }
40703 /* mov.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
40706 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40707 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x35000000 }
40709 /* mov.w${S} #${Imm-24-HI},${Dsp-8-u16} */
40712 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
40713 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x15000000 }
40715 /* mov.w${S} #${Imm-8-HI},r0 */
40718 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
40719 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x50000 }
40721 /* mov.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
40724 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
40725 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x240000 }
40727 /* mov.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
40730 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
40731 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x340000 }
40733 /* mov.b${S} #${Imm-24-QI},${Dsp-8-u16} */
40736 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
40737 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x14000000 }
40739 /* mov.b${S} #${Imm-8-QI},r0l */
40742 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
40743 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x400 }
40745 /* mov.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
40748 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
40749 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xb8310000 }
40751 /* mov.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
40754 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
40755 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xb0b10000 }
40757 /* mov.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
40760 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40761 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xb0310000 }
40763 /* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40766 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40767 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xb2310000 }
40769 /* mov.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
40772 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40773 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xb2b10000 }
40775 /* mov.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
40778 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40779 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xb2f10000 }
40781 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40784 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40785 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xb4310000 }
40787 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
40790 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40791 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xb4b10000 }
40793 /* mov.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
40796 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40797 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xb4f10000 }
40799 /* mov.l${G} #${Imm-32-SI},${Dsp-16-u16} */
40802 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
40803 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xb6f10000 }
40805 /* mov.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40808 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40809 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xb6310000 }
40811 /* mov.l${G} #${Imm-40-SI},${Dsp-16-u24} */
40814 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
40815 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xb6b10000 }
40817 /* mov.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
40820 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
40821 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x992f0000 }
40823 /* mov.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
40826 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
40827 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91af0000 }
40829 /* mov.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
40832 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40833 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x912f0000 }
40835 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40838 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40839 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x932f0000 }
40841 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
40844 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40845 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93af0000 }
40847 /* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
40850 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40851 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ef0000 }
40853 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40856 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40857 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x952f0000 }
40859 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
40862 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40863 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95af0000 }
40865 /* mov.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
40868 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40869 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ef0000 }
40871 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
40874 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
40875 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ef0000 }
40877 /* mov.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40880 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40881 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x972f0000 }
40883 /* mov.w${G} #${Imm-40-HI},${Dsp-16-u24} */
40886 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
40887 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97af0000 }
40889 /* mov.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
40892 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
40893 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x982f00 }
40895 /* mov.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
40898 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
40899 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90af00 }
40901 /* mov.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
40904 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40905 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x902f00 }
40907 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
40910 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40911 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922f0000 }
40913 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
40916 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40917 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92af0000 }
40919 /* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
40922 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40923 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ef0000 }
40925 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
40928 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40929 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x942f0000 }
40931 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
40934 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
40935 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94af0000 }
40937 /* mov.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
40940 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
40941 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ef0000 }
40943 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
40946 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
40947 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ef0000 }
40949 /* mov.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
40952 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
40953 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x962f0000 }
40955 /* mov.b${G} #${Imm-40-QI},${Dsp-16-u24} */
40958 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
40959 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96af0000 }
40961 /* mov.w${G} #${Imm-16-HI},$Dst16RnHI */
40964 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
40965 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x75c00000 }
40967 /* mov.w${G} #${Imm-16-HI},$Dst16AnHI */
40970 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
40971 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x75c40000 }
40973 /* mov.w${G} #${Imm-16-HI},[$Dst16An] */
40976 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
40977 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x75c60000 }
40979 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
40982 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
40983 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x75c80000 }
40985 /* mov.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
40988 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
40989 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x75ca0000 }
40991 /* mov.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
40994 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
40995 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x75cb0000 }
40997 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
41000 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
41001 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x75cc0000 }
41003 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
41006 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
41007 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x75ce0000 }
41009 /* mov.w${G} #${Imm-32-HI},${Dsp-16-u16} */
41012 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
41013 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x75cf0000 }
41015 /* mov.b${G} #${Imm-16-QI},$Dst16RnQI */
41018 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
41019 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x74c000 }
41021 /* mov.b${G} #${Imm-16-QI},$Dst16AnQI */
41024 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
41025 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x74c400 }
41027 /* mov.b${G} #${Imm-16-QI},[$Dst16An] */
41030 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
41031 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x74c600 }
41033 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
41036 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
41037 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x74c80000 }
41039 /* mov.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
41042 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
41043 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x74ca0000 }
41045 /* mov.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
41048 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
41049 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x74cb0000 }
41051 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
41054 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
41055 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x74cc0000 }
41057 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
41060 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
41061 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x74ce0000 }
41063 /* mov.b${G} #${Imm-32-QI},${Dsp-16-u16} */
41066 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
41067 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x74cf0000 }
41069 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41072 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41073 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990c00 }
41075 /* min.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
41078 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41079 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992c00 }
41081 /* min.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
41084 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41085 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993c00 }
41087 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41090 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41091 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918c00 }
41093 /* min.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
41096 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41097 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ac00 }
41099 /* min.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
41102 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41103 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191bc00 }
41105 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41108 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41109 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910c00 }
41111 /* min.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
41114 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41115 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912c00 }
41117 /* min.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
41120 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41121 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913c00 }
41123 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
41126 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41127 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930c00 }
41129 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41133 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932c00 }
41135 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41138 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41139 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933c00 }
41141 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
41144 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41145 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950c00 }
41147 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
41150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41151 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952c00 }
41153 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
41156 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41157 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953c00 }
41159 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
41162 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41163 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970c00 }
41165 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
41168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41169 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972c00 }
41171 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
41174 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41175 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973c00 }
41177 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
41180 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41181 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938c00 }
41183 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
41186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41187 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ac00 }
41189 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
41192 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
41193 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193bc00 }
41195 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
41198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41199 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958c00 }
41201 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
41204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41205 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ac00 }
41207 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
41210 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
41211 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195bc00 }
41213 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
41216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41217 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193cc00 }
41219 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
41222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41223 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ec00 }
41225 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
41228 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
41229 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fc00 }
41231 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
41234 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41235 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195cc00 }
41237 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
41240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41241 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ec00 }
41243 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
41246 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
41247 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fc00 }
41249 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
41252 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
41253 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197cc00 }
41255 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
41258 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
41259 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ec00 }
41261 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
41264 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
41265 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fc00 }
41267 /* min.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
41270 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
41271 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978c00 }
41273 /* min.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
41276 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
41277 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ac00 }
41279 /* min.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
41282 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
41283 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197bc00 }
41285 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41289 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90c00 }
41291 /* min.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
41294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41295 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92c00 }
41297 /* min.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
41300 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41301 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93c00 }
41303 /* min.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
41306 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41307 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93c00 }
41309 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41313 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18c00 }
41315 /* min.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
41318 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41319 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ac00 }
41321 /* min.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
41324 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41325 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1bc00 }
41327 /* min.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
41330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41331 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1bc00 }
41333 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41337 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10c00 }
41339 /* min.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
41342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41343 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12c00 }
41345 /* min.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
41348 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41349 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13c00 }
41351 /* min.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
41354 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41355 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13c00 }
41357 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
41360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41361 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30c00 }
41363 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
41366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41367 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32c00 }
41369 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
41372 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41373 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33c00 }
41375 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
41378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41379 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33c00 }
41381 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
41384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41385 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50c00 }
41387 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
41390 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41391 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52c00 }
41393 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
41396 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41397 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53c00 }
41399 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
41402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41403 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53c00 }
41405 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
41408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41409 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70c00 }
41411 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
41414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41415 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72c00 }
41417 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
41420 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41421 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73c00 }
41423 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
41426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41427 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73c00 }
41429 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
41432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41433 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38c00 }
41435 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
41438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41439 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ac00 }
41441 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
41444 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41445 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3bc00 }
41447 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
41450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
41451 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3bc00 }
41453 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
41456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41457 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58c00 }
41459 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
41462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41463 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ac00 }
41465 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
41468 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41469 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5bc00 }
41471 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
41474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
41475 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5bc00 }
41477 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
41480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41481 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3cc00 }
41483 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
41486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41487 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ec00 }
41489 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
41492 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41493 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fc00 }
41495 /* min.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
41498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
41499 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fc00 }
41501 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
41504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41505 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5cc00 }
41507 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
41510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41511 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ec00 }
41513 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
41516 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41517 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fc00 }
41519 /* min.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
41522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
41523 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fc00 }
41525 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
41528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
41529 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7cc00 }
41531 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
41534 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
41535 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ec00 }
41537 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
41540 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
41541 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fc00 }
41543 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
41546 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
41547 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fc00 }
41549 /* min.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
41552 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
41553 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78c00 }
41555 /* min.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
41558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
41559 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ac00 }
41561 /* min.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
41564 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
41565 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7bc00 }
41567 /* min.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
41570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
41571 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7bc00 }
41573 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
41576 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41577 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90c00 }
41579 /* min.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
41582 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41583 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92c00 }
41585 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
41588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41589 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18c00 }
41591 /* min.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
41594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41595 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ac00 }
41597 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41600 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41601 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10c00 }
41603 /* min.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
41606 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41607 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12c00 }
41609 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
41612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41613 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30c00 }
41615 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
41618 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41619 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32c00 }
41621 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
41624 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41625 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50c00 }
41627 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
41630 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41631 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52c00 }
41633 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
41636 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41637 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70c00 }
41639 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
41642 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41643 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72c00 }
41645 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
41648 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
41649 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38c00 }
41651 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
41654 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
41655 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3ac00 }
41657 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
41660 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
41661 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58c00 }
41663 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
41666 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
41667 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5ac00 }
41669 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
41672 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
41673 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3cc00 }
41675 /* min.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
41678 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
41679 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ec00 }
41681 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
41684 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
41685 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5cc00 }
41687 /* min.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
41690 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
41691 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ec00 }
41693 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
41696 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
41697 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7cc00 }
41699 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
41702 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
41703 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ec00 }
41705 /* min.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
41708 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
41709 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78c00 }
41711 /* min.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
41714 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
41715 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7ac00 }
41717 /* min.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
41720 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41721 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90c }
41723 /* min.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
41726 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
41727 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892c }
41729 /* min.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
41732 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
41733 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890c }
41735 /* min.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
41738 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41739 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18c }
41741 /* min.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
41744 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
41745 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181ac }
41747 /* min.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
41750 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
41751 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818c }
41753 /* min.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
41756 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41757 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10c }
41759 /* min.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
41762 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41763 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812c }
41765 /* min.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
41768 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41769 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810c }
41771 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
41774 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41775 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30c00 }
41777 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
41780 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41781 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832c00 }
41783 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
41786 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41787 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830c00 }
41789 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
41792 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41793 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50c00 }
41795 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
41798 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41799 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852c00 }
41801 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
41804 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41805 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850c00 }
41807 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
41810 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41811 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70c00 }
41813 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
41816 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41817 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872c00 }
41819 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
41822 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41823 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870c00 }
41825 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
41828 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41829 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38c00 }
41831 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
41834 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41835 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ac00 }
41837 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
41840 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
41841 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838c00 }
41843 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
41846 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41847 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58c00 }
41849 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
41852 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41853 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ac00 }
41855 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
41858 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
41859 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858c00 }
41861 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
41864 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41865 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3cc00 }
41867 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
41870 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41871 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ec00 }
41873 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
41876 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
41877 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183cc00 }
41879 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
41882 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41883 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5cc00 }
41885 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
41888 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41889 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ec00 }
41891 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
41894 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
41895 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185cc00 }
41897 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
41900 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
41901 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7cc00 }
41903 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
41906 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
41907 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ec00 }
41909 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
41912 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
41913 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187cc00 }
41915 /* min.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
41918 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
41919 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78c00 }
41921 /* min.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
41924 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
41925 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187ac00 }
41927 /* min.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
41930 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
41931 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878c00 }
41933 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
41936 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41937 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980c00 }
41939 /* min.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
41942 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41943 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982c00 }
41945 /* min.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
41948 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
41949 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983c00 }
41951 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
41954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41955 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908c00 }
41957 /* min.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
41960 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41961 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ac00 }
41963 /* min.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
41966 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
41967 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190bc00 }
41969 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
41972 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41973 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900c00 }
41975 /* min.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
41978 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41979 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902c00 }
41981 /* min.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
41984 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
41985 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903c00 }
41987 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
41990 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41991 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920c00 }
41993 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
41996 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
41997 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922c00 }
41999 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
42002 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42003 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923c00 }
42005 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
42008 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42009 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940c00 }
42011 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
42014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42015 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942c00 }
42017 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
42020 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42021 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943c00 }
42023 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
42026 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42027 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960c00 }
42029 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
42032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42033 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962c00 }
42035 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
42038 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42039 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963c00 }
42041 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
42044 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42045 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928c00 }
42047 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
42050 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42051 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ac00 }
42053 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
42056 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
42057 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192bc00 }
42059 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
42062 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42063 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948c00 }
42065 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
42068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42069 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ac00 }
42071 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
42074 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
42075 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194bc00 }
42077 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
42080 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42081 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192cc00 }
42083 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
42086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42087 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ec00 }
42089 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
42092 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
42093 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fc00 }
42095 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
42098 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42099 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194cc00 }
42101 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
42104 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42105 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ec00 }
42107 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
42110 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
42111 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fc00 }
42113 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
42116 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
42117 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196cc00 }
42119 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
42122 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
42123 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ec00 }
42125 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
42128 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
42129 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fc00 }
42131 /* min.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
42134 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
42135 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968c00 }
42137 /* min.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
42140 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
42141 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ac00 }
42143 /* min.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
42146 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
42147 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196bc00 }
42149 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
42152 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42153 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80c00 }
42155 /* min.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
42158 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42159 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82c00 }
42161 /* min.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
42164 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42165 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83c00 }
42167 /* min.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
42170 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42171 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83c00 }
42173 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
42176 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42177 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08c00 }
42179 /* min.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
42182 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42183 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ac00 }
42185 /* min.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
42188 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42189 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0bc00 }
42191 /* min.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
42194 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42195 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0bc00 }
42197 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42200 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42201 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00c00 }
42203 /* min.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
42206 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42207 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02c00 }
42209 /* min.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
42212 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42213 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03c00 }
42215 /* min.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
42218 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42219 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03c00 }
42221 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
42224 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42225 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20c00 }
42227 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
42230 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42231 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22c00 }
42233 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
42236 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42237 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23c00 }
42239 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
42242 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42243 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23c00 }
42245 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
42248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42249 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40c00 }
42251 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
42254 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42255 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42c00 }
42257 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
42260 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42261 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43c00 }
42263 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
42266 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42267 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43c00 }
42269 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
42272 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42273 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60c00 }
42275 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
42278 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42279 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62c00 }
42281 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
42284 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42285 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63c00 }
42287 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
42290 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42291 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63c00 }
42293 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
42296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42297 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28c00 }
42299 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
42302 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42303 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ac00 }
42305 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
42308 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42309 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2bc00 }
42311 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
42314 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
42315 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2bc00 }
42317 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
42320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42321 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48c00 }
42323 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
42326 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42327 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ac00 }
42329 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
42332 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42333 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4bc00 }
42335 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
42338 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
42339 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4bc00 }
42341 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
42344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42345 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2cc00 }
42347 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
42350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42351 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ec00 }
42353 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
42356 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42357 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fc00 }
42359 /* min.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
42362 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
42363 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fc00 }
42365 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
42368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42369 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4cc00 }
42371 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
42374 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42375 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ec00 }
42377 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
42380 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42381 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fc00 }
42383 /* min.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
42386 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
42387 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fc00 }
42389 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
42392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
42393 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6cc00 }
42395 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
42398 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
42399 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ec00 }
42401 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
42404 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
42405 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fc00 }
42407 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
42410 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
42411 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fc00 }
42413 /* min.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
42416 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
42417 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68c00 }
42419 /* min.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
42422 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
42423 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ac00 }
42425 /* min.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
42428 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
42429 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6bc00 }
42431 /* min.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
42434 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
42435 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6bc00 }
42437 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
42440 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42441 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80c00 }
42443 /* min.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
42446 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42447 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82c00 }
42449 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
42452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42453 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08c00 }
42455 /* min.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
42458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42459 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ac00 }
42461 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42464 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42465 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00c00 }
42467 /* min.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
42470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42471 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02c00 }
42473 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
42476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42477 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20c00 }
42479 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
42482 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42483 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22c00 }
42485 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
42488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42489 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40c00 }
42491 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
42494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42495 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42c00 }
42497 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
42500 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42501 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60c00 }
42503 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
42506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42507 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62c00 }
42509 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
42512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
42513 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28c00 }
42515 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
42518 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
42519 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2ac00 }
42521 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
42524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
42525 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48c00 }
42527 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
42530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
42531 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4ac00 }
42533 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
42536 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
42537 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2cc00 }
42539 /* min.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
42542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
42543 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ec00 }
42545 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
42548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
42549 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4cc00 }
42551 /* min.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
42554 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
42555 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ec00 }
42557 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
42560 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
42561 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6cc00 }
42563 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
42566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
42567 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ec00 }
42569 /* min.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
42572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
42573 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68c00 }
42575 /* min.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
42578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
42579 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6ac00 }
42581 /* min.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
42584 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42585 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80c }
42587 /* min.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
42590 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42591 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882c }
42593 /* min.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
42596 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
42597 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880c }
42599 /* min.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
42602 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42603 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08c }
42605 /* min.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
42608 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42609 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180ac }
42611 /* min.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
42614 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
42615 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808c }
42617 /* min.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
42620 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42621 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00c }
42623 /* min.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
42626 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42627 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802c }
42629 /* min.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
42632 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42633 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800c }
42635 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
42638 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42639 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20c00 }
42641 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
42644 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42645 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822c00 }
42647 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
42650 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42651 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820c00 }
42653 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
42656 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42657 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40c00 }
42659 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
42662 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42663 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842c00 }
42665 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
42668 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42669 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840c00 }
42671 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
42674 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42675 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60c00 }
42677 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
42680 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42681 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862c00 }
42683 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
42686 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42687 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860c00 }
42689 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
42692 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42693 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28c00 }
42695 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
42698 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42699 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ac00 }
42701 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
42704 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42705 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828c00 }
42707 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
42710 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42711 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48c00 }
42713 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
42716 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42717 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ac00 }
42719 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
42722 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42723 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848c00 }
42725 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
42728 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42729 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2cc00 }
42731 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
42734 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42735 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ec00 }
42737 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
42740 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42741 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182cc00 }
42743 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
42746 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42747 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4cc00 }
42749 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
42752 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42753 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ec00 }
42755 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
42758 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42759 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184cc00 }
42761 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
42764 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
42765 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6cc00 }
42767 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
42770 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
42771 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ec00 }
42773 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
42776 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
42777 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186cc00 }
42779 /* min.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
42782 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
42783 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68c00 }
42785 /* min.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
42788 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
42789 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186ac00 }
42791 /* min.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
42794 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
42795 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868c00 }
42797 /* min.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
42800 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
42801 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1892f00 }
42803 /* min.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
42806 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
42807 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181af00 }
42809 /* min.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
42812 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42813 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1812f00 }
42815 /* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
42818 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42819 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832f00 }
42821 /* min.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
42824 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42825 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183af00 }
42827 /* min.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
42830 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42831 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ef00 }
42833 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
42836 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42837 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852f00 }
42839 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
42842 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42843 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185af00 }
42845 /* min.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
42848 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42849 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ef00 }
42851 /* min.w${X} #${Imm-40-HI},${Dsp-24-u16} */
42854 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
42855 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ef00 }
42857 /* min.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
42860 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42861 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872f00 }
42863 /* min.w${X} #${Imm-48-HI},${Dsp-24-u24} */
42866 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
42867 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187af00 }
42869 /* min.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
42872 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
42873 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1882f00 }
42875 /* min.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
42878 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
42879 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180af00 }
42881 /* min.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
42884 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42885 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1802f00 }
42887 /* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
42890 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42891 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822f00 }
42893 /* min.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
42896 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
42897 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182af00 }
42899 /* min.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
42902 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
42903 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ef00 }
42905 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
42908 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42909 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842f00 }
42911 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
42914 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
42915 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184af00 }
42917 /* min.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
42920 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
42921 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ef00 }
42923 /* min.b${X} #${Imm-40-QI},${Dsp-24-u16} */
42926 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
42927 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ef00 }
42929 /* min.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
42932 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42933 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862f00 }
42935 /* min.b${X} #${Imm-48-QI},${Dsp-24-u24} */
42938 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
42939 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186af00 }
42941 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
42944 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42945 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990d00 }
42947 /* max.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
42950 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42951 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992d00 }
42953 /* max.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
42956 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
42957 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993d00 }
42959 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
42962 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42963 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918d00 }
42965 /* max.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
42968 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42969 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ad00 }
42971 /* max.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
42974 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
42975 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191bd00 }
42977 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
42980 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42981 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910d00 }
42983 /* max.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
42986 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42987 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912d00 }
42989 /* max.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
42992 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
42993 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913d00 }
42995 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
42998 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
42999 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930d00 }
43001 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43004 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43005 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932d00 }
43007 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43010 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43011 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933d00 }
43013 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
43016 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43017 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950d00 }
43019 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43023 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952d00 }
43025 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43028 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43029 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953d00 }
43031 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
43034 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43035 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970d00 }
43037 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43040 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43041 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972d00 }
43043 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43046 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43047 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973d00 }
43049 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
43052 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43053 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938d00 }
43055 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
43058 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43059 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ad00 }
43061 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
43064 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43065 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193bd00 }
43067 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
43070 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43071 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958d00 }
43073 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
43076 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43077 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ad00 }
43079 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
43082 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43083 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195bd00 }
43085 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
43088 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43089 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193cd00 }
43091 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
43094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43095 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ed00 }
43097 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
43100 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43101 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fd00 }
43103 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
43106 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43107 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195cd00 }
43109 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
43112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43113 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ed00 }
43115 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
43118 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43119 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fd00 }
43121 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
43124 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
43125 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197cd00 }
43127 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
43130 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43131 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ed00 }
43133 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
43136 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43137 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fd00 }
43139 /* max.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
43142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
43143 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978d00 }
43145 /* max.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
43148 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
43149 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ad00 }
43151 /* max.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
43154 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
43155 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197bd00 }
43157 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
43160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43161 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90d00 }
43163 /* max.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
43166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43167 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92d00 }
43169 /* max.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
43172 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43173 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93d00 }
43175 /* max.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
43178 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43179 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93d00 }
43181 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
43184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43185 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18d00 }
43187 /* max.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
43190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43191 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ad00 }
43193 /* max.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
43196 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43197 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1bd00 }
43199 /* max.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
43202 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43203 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1bd00 }
43205 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43209 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10d00 }
43211 /* max.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
43214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43215 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12d00 }
43217 /* max.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
43220 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43221 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13d00 }
43223 /* max.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
43226 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43227 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13d00 }
43229 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
43232 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43233 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30d00 }
43235 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
43238 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43239 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32d00 }
43241 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
43244 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43245 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33d00 }
43247 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
43250 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43251 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33d00 }
43253 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
43256 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43257 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50d00 }
43259 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
43262 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43263 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52d00 }
43265 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
43268 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43269 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53d00 }
43271 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
43274 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43275 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53d00 }
43277 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
43280 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43281 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70d00 }
43283 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
43286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43287 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72d00 }
43289 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
43292 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43293 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73d00 }
43295 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
43298 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43299 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73d00 }
43301 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
43304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43305 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38d00 }
43307 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
43310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43311 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ad00 }
43313 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
43316 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43317 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3bd00 }
43319 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
43322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
43323 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3bd00 }
43325 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
43328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43329 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58d00 }
43331 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
43334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43335 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ad00 }
43337 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
43340 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43341 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5bd00 }
43343 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
43346 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
43347 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5bd00 }
43349 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
43352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43353 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3cd00 }
43355 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
43358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43359 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ed00 }
43361 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
43364 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43365 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fd00 }
43367 /* max.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
43370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
43371 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fd00 }
43373 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
43376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43377 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5cd00 }
43379 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
43382 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43383 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ed00 }
43385 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
43388 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43389 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fd00 }
43391 /* max.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
43394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
43395 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fd00 }
43397 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
43400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
43401 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7cd00 }
43403 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
43406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
43407 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ed00 }
43409 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
43412 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
43413 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fd00 }
43415 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
43418 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
43419 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fd00 }
43421 /* max.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
43424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
43425 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78d00 }
43427 /* max.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
43430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
43431 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ad00 }
43433 /* max.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
43436 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
43437 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7bd00 }
43439 /* max.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
43442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
43443 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7bd00 }
43445 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
43448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43449 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90d00 }
43451 /* max.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
43454 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43455 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92d00 }
43457 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
43460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43461 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18d00 }
43463 /* max.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
43466 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43467 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ad00 }
43469 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43472 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43473 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10d00 }
43475 /* max.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
43478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43479 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12d00 }
43481 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
43484 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43485 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30d00 }
43487 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
43490 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43491 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32d00 }
43493 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
43496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43497 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50d00 }
43499 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
43502 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43503 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52d00 }
43505 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
43508 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43509 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70d00 }
43511 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
43514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43515 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72d00 }
43517 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
43520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
43521 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38d00 }
43523 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
43526 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
43527 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3ad00 }
43529 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
43532 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
43533 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58d00 }
43535 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
43538 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
43539 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5ad00 }
43541 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
43544 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
43545 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3cd00 }
43547 /* max.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
43550 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
43551 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ed00 }
43553 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
43556 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
43557 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5cd00 }
43559 /* max.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
43562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
43563 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ed00 }
43565 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
43568 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
43569 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7cd00 }
43571 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
43574 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
43575 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ed00 }
43577 /* max.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
43580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
43581 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78d00 }
43583 /* max.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
43586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
43587 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7ad00 }
43589 /* max.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
43592 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43593 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90d }
43595 /* max.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
43598 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
43599 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892d }
43601 /* max.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
43604 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
43605 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890d }
43607 /* max.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
43610 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43611 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18d }
43613 /* max.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
43616 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
43617 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181ad }
43619 /* max.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
43622 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
43623 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818d }
43625 /* max.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
43628 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43629 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10d }
43631 /* max.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
43634 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43635 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812d }
43637 /* max.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
43640 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43641 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810d }
43643 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
43646 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43647 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30d00 }
43649 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
43652 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43653 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832d00 }
43655 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
43658 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43659 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830d00 }
43661 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
43664 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43665 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50d00 }
43667 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
43670 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43671 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852d00 }
43673 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
43676 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43677 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850d00 }
43679 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
43682 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43683 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70d00 }
43685 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
43688 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43689 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872d00 }
43691 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
43694 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43695 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870d00 }
43697 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
43700 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43701 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38d00 }
43703 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
43706 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43707 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ad00 }
43709 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
43712 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
43713 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838d00 }
43715 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
43718 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43719 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58d00 }
43721 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
43724 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43725 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ad00 }
43727 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
43730 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
43731 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858d00 }
43733 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
43736 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43737 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3cd00 }
43739 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
43742 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43743 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ed00 }
43745 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
43748 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
43749 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183cd00 }
43751 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
43754 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43755 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5cd00 }
43757 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
43760 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43761 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ed00 }
43763 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
43766 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
43767 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185cd00 }
43769 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
43772 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
43773 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7cd00 }
43775 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
43778 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
43779 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ed00 }
43781 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
43784 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
43785 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187cd00 }
43787 /* max.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
43790 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
43791 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78d00 }
43793 /* max.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
43796 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
43797 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187ad00 }
43799 /* max.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
43802 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
43803 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878d00 }
43805 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
43808 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43809 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980d00 }
43811 /* max.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
43814 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43815 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982d00 }
43817 /* max.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
43820 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
43821 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983d00 }
43823 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
43826 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43827 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908d00 }
43829 /* max.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
43832 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43833 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ad00 }
43835 /* max.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
43838 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
43839 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190bd00 }
43841 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
43844 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43845 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900d00 }
43847 /* max.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
43850 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43851 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902d00 }
43853 /* max.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
43856 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
43857 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903d00 }
43859 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
43862 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43863 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920d00 }
43865 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43868 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43869 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922d00 }
43871 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
43874 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43875 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923d00 }
43877 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
43880 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43881 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940d00 }
43883 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43887 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942d00 }
43889 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
43892 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43893 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943d00 }
43895 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
43898 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43899 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960d00 }
43901 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43904 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43905 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962d00 }
43907 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
43910 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
43911 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963d00 }
43913 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
43916 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43917 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928d00 }
43919 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
43922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43923 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ad00 }
43925 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
43928 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
43929 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192bd00 }
43931 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
43934 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43935 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948d00 }
43937 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
43940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43941 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ad00 }
43943 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
43946 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
43947 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194bd00 }
43949 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
43952 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43953 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192cd00 }
43955 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
43958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43959 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ed00 }
43961 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
43964 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
43965 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fd00 }
43967 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
43970 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43971 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194cd00 }
43973 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
43976 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43977 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ed00 }
43979 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
43982 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
43983 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fd00 }
43985 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
43988 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
43989 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196cd00 }
43991 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
43994 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
43995 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ed00 }
43997 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
44000 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
44001 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fd00 }
44003 /* max.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
44006 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
44007 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968d00 }
44009 /* max.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
44012 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
44013 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ad00 }
44015 /* max.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
44018 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
44019 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196bd00 }
44021 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
44024 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44025 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80d00 }
44027 /* max.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
44030 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44031 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82d00 }
44033 /* max.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
44036 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44037 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83d00 }
44039 /* max.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
44042 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44043 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83d00 }
44045 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
44048 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44049 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08d00 }
44051 /* max.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
44054 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44055 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ad00 }
44057 /* max.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
44060 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44061 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0bd00 }
44063 /* max.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
44066 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44067 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0bd00 }
44069 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
44072 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44073 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00d00 }
44075 /* max.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
44078 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44079 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02d00 }
44081 /* max.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
44084 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44085 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03d00 }
44087 /* max.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
44090 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44091 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03d00 }
44093 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
44096 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44097 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20d00 }
44099 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
44102 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44103 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22d00 }
44105 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
44108 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44109 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23d00 }
44111 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
44114 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44115 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23d00 }
44117 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
44120 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44121 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40d00 }
44123 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
44126 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44127 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42d00 }
44129 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
44132 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44133 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43d00 }
44135 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
44138 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44139 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43d00 }
44141 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
44144 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44145 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60d00 }
44147 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
44150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44151 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62d00 }
44153 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
44156 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44157 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63d00 }
44159 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
44162 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44163 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63d00 }
44165 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
44168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44169 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28d00 }
44171 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
44174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44175 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ad00 }
44177 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
44180 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44181 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2bd00 }
44183 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
44186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
44187 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2bd00 }
44189 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
44192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44193 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48d00 }
44195 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
44198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44199 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ad00 }
44201 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
44204 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44205 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4bd00 }
44207 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
44210 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
44211 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4bd00 }
44213 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
44216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44217 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2cd00 }
44219 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
44222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44223 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ed00 }
44225 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
44228 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44229 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fd00 }
44231 /* max.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
44234 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
44235 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fd00 }
44237 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
44240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44241 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4cd00 }
44243 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
44246 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44247 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ed00 }
44249 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
44252 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44253 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fd00 }
44255 /* max.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
44258 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
44259 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fd00 }
44261 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
44264 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
44265 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6cd00 }
44267 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
44270 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
44271 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ed00 }
44273 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
44276 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
44277 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fd00 }
44279 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
44282 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
44283 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fd00 }
44285 /* max.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
44288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
44289 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68d00 }
44291 /* max.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
44294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
44295 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ad00 }
44297 /* max.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
44300 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
44301 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6bd00 }
44303 /* max.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
44306 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
44307 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6bd00 }
44309 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
44312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44313 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80d00 }
44315 /* max.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
44318 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44319 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82d00 }
44321 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
44324 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44325 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08d00 }
44327 /* max.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
44330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44331 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ad00 }
44333 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
44336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44337 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00d00 }
44339 /* max.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
44342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44343 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02d00 }
44345 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
44348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44349 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20d00 }
44351 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
44354 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44355 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22d00 }
44357 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
44360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44361 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40d00 }
44363 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
44366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44367 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42d00 }
44369 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
44372 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44373 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60d00 }
44375 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
44378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44379 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62d00 }
44381 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
44384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
44385 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28d00 }
44387 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
44390 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
44391 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2ad00 }
44393 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
44396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
44397 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48d00 }
44399 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
44402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
44403 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4ad00 }
44405 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
44408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
44409 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2cd00 }
44411 /* max.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
44414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
44415 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ed00 }
44417 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
44420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
44421 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4cd00 }
44423 /* max.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
44426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
44427 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ed00 }
44429 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
44432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
44433 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6cd00 }
44435 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
44438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
44439 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ed00 }
44441 /* max.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
44444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
44445 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68d00 }
44447 /* max.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
44450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
44451 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6ad00 }
44453 /* max.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
44456 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44457 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80d }
44459 /* max.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
44462 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44463 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882d }
44465 /* max.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
44468 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
44469 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880d }
44471 /* max.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
44474 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44475 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08d }
44477 /* max.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
44480 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44481 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180ad }
44483 /* max.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
44486 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
44487 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808d }
44489 /* max.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
44492 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44493 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00d }
44495 /* max.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
44498 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44499 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802d }
44501 /* max.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
44504 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44505 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800d }
44507 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
44510 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44511 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20d00 }
44513 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
44516 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44517 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822d00 }
44519 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
44522 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44523 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820d00 }
44525 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
44528 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44529 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40d00 }
44531 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
44534 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44535 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842d00 }
44537 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
44540 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44541 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840d00 }
44543 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
44546 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44547 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60d00 }
44549 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
44552 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44553 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862d00 }
44555 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
44558 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44559 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860d00 }
44561 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
44564 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44565 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28d00 }
44567 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
44570 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44571 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ad00 }
44573 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
44576 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44577 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828d00 }
44579 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
44582 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44583 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48d00 }
44585 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
44588 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44589 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ad00 }
44591 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
44594 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44595 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848d00 }
44597 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
44600 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44601 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2cd00 }
44603 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
44606 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44607 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ed00 }
44609 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
44612 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44613 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182cd00 }
44615 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
44618 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44619 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4cd00 }
44621 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
44624 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44625 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ed00 }
44627 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
44630 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44631 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184cd00 }
44633 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
44636 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
44637 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6cd00 }
44639 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
44642 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
44643 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ed00 }
44645 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
44648 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
44649 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186cd00 }
44651 /* max.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
44654 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
44655 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68d00 }
44657 /* max.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
44660 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
44661 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186ad00 }
44663 /* max.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
44666 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
44667 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868d00 }
44669 /* max.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
44672 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
44673 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1893f00 }
44675 /* max.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
44678 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
44679 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181bf00 }
44681 /* max.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
44684 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44685 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1813f00 }
44687 /* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
44690 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44691 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1833f00 }
44693 /* max.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
44696 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44697 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183bf00 }
44699 /* max.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
44702 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44703 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ff00 }
44705 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
44708 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44709 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1853f00 }
44711 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
44714 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44715 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185bf00 }
44717 /* max.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
44720 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44721 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ff00 }
44723 /* max.w${X} #${Imm-40-HI},${Dsp-24-u16} */
44726 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
44727 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ff00 }
44729 /* max.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
44732 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44733 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1873f00 }
44735 /* max.w${X} #${Imm-48-HI},${Dsp-24-u24} */
44738 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
44739 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187bf00 }
44741 /* max.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
44744 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
44745 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1883f00 }
44747 /* max.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
44750 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
44751 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180bf00 }
44753 /* max.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
44756 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
44757 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1803f00 }
44759 /* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
44762 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44763 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1823f00 }
44765 /* max.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
44768 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
44769 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182bf00 }
44771 /* max.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
44774 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
44775 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ff00 }
44777 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
44780 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44781 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1843f00 }
44783 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
44786 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
44787 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184bf00 }
44789 /* max.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
44792 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
44793 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ff00 }
44795 /* max.b${X} #${Imm-40-QI},${Dsp-24-u16} */
44798 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
44799 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ff00 }
44801 /* max.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
44804 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
44805 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1863f00 }
44807 /* max.b${X} #${Imm-48-QI},${Dsp-24-u24} */
44810 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
44811 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186bf00 }
44813 /* ste.w ${Dsp-16-u16}[$Dst16An],[a1a0] */
44816 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44817 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x752c0000 }
44819 /* ste.w ${Dsp-16-u16}[sb],[a1a0] */
44822 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44823 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x752e0000 }
44825 /* ste.w ${Dsp-16-u16},[a1a0] */
44828 { { MNEM
, ' ', OP (DSP_16_U16
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44829 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x752f0000 }
44831 /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
44834 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44835 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x751c0000 }
44837 /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
44840 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44841 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x751e0000 }
44843 /* ste.w ${Dsp-16-u16},${Dsp-32-u20}[a0] */
44846 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44847 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x751f0000 }
44849 /* ste.w ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
44852 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), 0 } },
44853 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x750c0000 }
44855 /* ste.w ${Dsp-16-u16}[sb],${Dsp-32-u20} */
44858 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), 0 } },
44859 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x750e0000 }
44861 /* ste.w ${Dsp-16-u16},${Dsp-32-u20} */
44864 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), 0 } },
44865 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x750f0000 }
44867 /* ste.w ${Dsp-16-u8}[$Dst16An],[a1a0] */
44870 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44871 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x752800 }
44873 /* ste.w ${Dsp-16-u8}[sb],[a1a0] */
44876 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44877 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x752a00 }
44879 /* ste.w ${Dsp-16-s8}[fb],[a1a0] */
44882 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44883 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x752b00 }
44885 /* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
44888 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44889 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75180000 }
44891 /* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
44894 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44895 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x751a0000 }
44897 /* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
44900 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
44901 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x751b0000 }
44903 /* ste.w ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
44906 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), 0 } },
44907 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75080000 }
44909 /* ste.w ${Dsp-16-u8}[sb],${Dsp-24-u20} */
44912 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
44913 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x750a0000 }
44915 /* ste.w ${Dsp-16-s8}[fb],${Dsp-24-u20} */
44918 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
44919 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x750b0000 }
44921 /* ste.w $Dst16RnHI,[a1a0] */
44924 { { MNEM
, ' ', OP (DST16RNHI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44925 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7520 }
44927 /* ste.w $Dst16AnHI,[a1a0] */
44930 { { MNEM
, ' ', OP (DST16ANHI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44931 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7524 }
44933 /* ste.w [$Dst16An],[a1a0] */
44936 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44937 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7526 }
44939 /* ste.w $Dst16RnHI,${Dsp-16-u20}[a0] */
44942 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44943 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75100000 }
44945 /* ste.w $Dst16AnHI,${Dsp-16-u20}[a0] */
44948 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44949 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75140000 }
44951 /* ste.w [$Dst16An],${Dsp-16-u20}[a0] */
44954 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
44955 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75160000 }
44957 /* ste.w $Dst16RnHI,${Dsp-16-u20} */
44960 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (DSP_16_U20
), 0 } },
44961 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75000000 }
44963 /* ste.w $Dst16AnHI,${Dsp-16-u20} */
44966 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (DSP_16_U20
), 0 } },
44967 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75040000 }
44969 /* ste.w [$Dst16An],${Dsp-16-u20} */
44972 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), 0 } },
44973 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75060000 }
44975 /* ste.b ${Dsp-16-u16}[$Dst16An],[a1a0] */
44978 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44979 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x742c0000 }
44981 /* ste.b ${Dsp-16-u16}[sb],[a1a0] */
44984 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44985 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x742e0000 }
44987 /* ste.b ${Dsp-16-u16},[a1a0] */
44990 { { MNEM
, ' ', OP (DSP_16_U16
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
44991 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x742f0000 }
44993 /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20}[a0] */
44996 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
44997 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x741c0000 }
44999 /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20}[a0] */
45002 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
45003 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x741e0000 }
45005 /* ste.b ${Dsp-16-u16},${Dsp-32-u20}[a0] */
45008 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), '[', 'a', '0', ']', 0 } },
45009 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x741f0000 }
45011 /* ste.b ${Dsp-16-u16}[$Dst16An],${Dsp-32-u20} */
45014 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (DSP_32_U20
), 0 } },
45015 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x740c0000 }
45017 /* ste.b ${Dsp-16-u16}[sb],${Dsp-32-u20} */
45020 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U20
), 0 } },
45021 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x740e0000 }
45023 /* ste.b ${Dsp-16-u16},${Dsp-32-u20} */
45026 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U20
), 0 } },
45027 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x740f0000 }
45029 /* ste.b ${Dsp-16-u8}[$Dst16An],[a1a0] */
45032 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45033 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x742800 }
45035 /* ste.b ${Dsp-16-u8}[sb],[a1a0] */
45038 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45039 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x742a00 }
45041 /* ste.b ${Dsp-16-s8}[fb],[a1a0] */
45044 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45045 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x742b00 }
45047 /* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20}[a0] */
45050 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45051 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74180000 }
45053 /* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20}[a0] */
45056 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45057 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x741a0000 }
45059 /* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20}[a0] */
45062 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), '[', 'a', '0', ']', 0 } },
45063 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x741b0000 }
45065 /* ste.b ${Dsp-16-u8}[$Dst16An],${Dsp-24-u20} */
45068 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (DSP_24_U20
), 0 } },
45069 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74080000 }
45071 /* ste.b ${Dsp-16-u8}[sb],${Dsp-24-u20} */
45074 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
45075 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x740a0000 }
45077 /* ste.b ${Dsp-16-s8}[fb],${Dsp-24-u20} */
45080 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U20
), 0 } },
45081 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x740b0000 }
45083 /* ste.b $Dst16RnQI,[a1a0] */
45086 { { MNEM
, ' ', OP (DST16RNQI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45087 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7420 }
45089 /* ste.b $Dst16AnQI,[a1a0] */
45092 { { MNEM
, ' ', OP (DST16ANQI
), ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45093 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7424 }
45095 /* ste.b [$Dst16An],[a1a0] */
45098 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', '[', 'a', '1', 'a', '0', ']', 0 } },
45099 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7426 }
45101 /* ste.b $Dst16RnQI,${Dsp-16-u20}[a0] */
45104 { { MNEM
, ' ', OP (DST16RNQI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45105 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74100000 }
45107 /* ste.b $Dst16AnQI,${Dsp-16-u20}[a0] */
45110 { { MNEM
, ' ', OP (DST16ANQI
), ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45111 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74140000 }
45113 /* ste.b [$Dst16An],${Dsp-16-u20}[a0] */
45116 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), '[', 'a', '0', ']', 0 } },
45117 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74160000 }
45119 /* ste.b $Dst16RnQI,${Dsp-16-u20} */
45122 { { MNEM
, ' ', OP (DST16RNQI
), ',', OP (DSP_16_U20
), 0 } },
45123 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74000000 }
45125 /* ste.b $Dst16AnQI,${Dsp-16-u20} */
45128 { { MNEM
, ' ', OP (DST16ANQI
), ',', OP (DSP_16_U20
), 0 } },
45129 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74040000 }
45131 /* ste.b [$Dst16An],${Dsp-16-u20} */
45134 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (DSP_16_U20
), 0 } },
45135 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74060000 }
45137 /* lde.w [a1a0],${Dsp-16-u16}[$Dst16An] */
45140 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45141 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x75ac0000 }
45143 /* lde.w [a1a0],${Dsp-16-u16}[sb] */
45146 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45147 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x75ae0000 }
45149 /* lde.w [a1a0],${Dsp-16-u16} */
45152 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45153 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x75af0000 }
45155 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
45158 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45159 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x759c0000 }
45161 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
45164 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45165 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x759e0000 }
45167 /* lde.w ${Dsp-32-u20}[a0],${Dsp-16-u16} */
45170 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45171 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x759f0000 }
45173 /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
45176 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45177 & ifmt_ste_w_16_16_u20a0_dst16_16_16_An_relative_HI
, { 0x758c0000 }
45179 /* lde.w ${Dsp-32-u20},${Dsp-16-u16}[sb] */
45182 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45183 & ifmt_ste_w_16_16_u20a0_dst16_16_16_SB_relative_HI
, { 0x758e0000 }
45185 /* lde.w ${Dsp-32-u20},${Dsp-16-u16} */
45188 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), 0 } },
45189 & ifmt_ste_w_16_16_u20a0_dst16_16_16_absolute_HI
, { 0x758f0000 }
45191 /* lde.w [a1a0],${Dsp-16-u8}[$Dst16An] */
45194 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45195 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x75a800 }
45197 /* lde.w [a1a0],${Dsp-16-u8}[sb] */
45200 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45201 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x75aa00 }
45203 /* lde.w [a1a0],${Dsp-16-s8}[fb] */
45206 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45207 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x75ab00 }
45209 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
45212 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45213 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75980000 }
45215 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
45218 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45219 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x759a0000 }
45221 /* lde.w ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
45224 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45225 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x759b0000 }
45227 /* lde.w ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
45230 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45231 & ifmt_ste_w_16_8_u20a0_dst16_16_8_An_relative_HI
, { 0x75880000 }
45233 /* lde.w ${Dsp-24-u20},${Dsp-16-u8}[sb] */
45236 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45237 & ifmt_ste_w_16_8_u20a0_dst16_16_8_SB_relative_HI
, { 0x758a0000 }
45239 /* lde.w ${Dsp-24-u20},${Dsp-16-s8}[fb] */
45242 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45243 & ifmt_ste_w_16_8_u20a0_dst16_16_8_FB_relative_HI
, { 0x758b0000 }
45245 /* lde.w [a1a0],$Dst16RnHI */
45248 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNHI
), 0 } },
45249 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x75a0 }
45251 /* lde.w [a1a0],$Dst16AnHI */
45254 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANHI
), 0 } },
45255 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x75a4 }
45257 /* lde.w [a1a0],[$Dst16An] */
45260 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45261 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x75a6 }
45263 /* lde.w ${Dsp-16-u20}[a0],$Dst16RnHI */
45266 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16RNHI
), 0 } },
45267 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75900000 }
45269 /* lde.w ${Dsp-16-u20}[a0],$Dst16AnHI */
45272 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16ANHI
), 0 } },
45273 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75940000 }
45275 /* lde.w ${Dsp-16-u20}[a0],[$Dst16An] */
45278 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45279 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75960000 }
45281 /* lde.w ${Dsp-16-u20},$Dst16RnHI */
45284 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16RNHI
), 0 } },
45285 & ifmt_ste_w_basic_u20a0_dst16_Rn_direct_HI
, { 0x75800000 }
45287 /* lde.w ${Dsp-16-u20},$Dst16AnHI */
45290 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16ANHI
), 0 } },
45291 & ifmt_ste_w_basic_u20a0_dst16_An_direct_HI
, { 0x75840000 }
45293 /* lde.w ${Dsp-16-u20},[$Dst16An] */
45296 { { MNEM
, ' ', OP (DSP_16_U20
), ',', '[', OP (DST16AN
), ']', 0 } },
45297 & ifmt_ste_w_basic_u20a0_dst16_An_indirect_HI
, { 0x75860000 }
45299 /* lde.b [a1a0],${Dsp-16-u16}[$Dst16An] */
45302 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45303 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x74ac0000 }
45305 /* lde.b [a1a0],${Dsp-16-u16}[sb] */
45308 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45309 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x74ae0000 }
45311 /* lde.b [a1a0],${Dsp-16-u16} */
45314 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45315 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x74af0000 }
45317 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[$Dst16An] */
45320 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45321 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x749c0000 }
45323 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16}[sb] */
45326 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45327 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x749e0000 }
45329 /* lde.b ${Dsp-32-u20}[a0],${Dsp-16-u16} */
45332 { { MNEM
, ' ', OP (DSP_32_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U16
), 0 } },
45333 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x749f0000 }
45335 /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[$Dst16An] */
45338 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45339 & ifmt_ste_b_16_16_u20a0_dst16_16_16_An_relative_QI
, { 0x748c0000 }
45341 /* lde.b ${Dsp-32-u20},${Dsp-16-u16}[sb] */
45344 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45345 & ifmt_ste_b_16_16_u20a0_dst16_16_16_SB_relative_QI
, { 0x748e0000 }
45347 /* lde.b ${Dsp-32-u20},${Dsp-16-u16} */
45350 { { MNEM
, ' ', OP (DSP_32_U20
), ',', OP (DSP_16_U16
), 0 } },
45351 & ifmt_ste_b_16_16_u20a0_dst16_16_16_absolute_QI
, { 0x748f0000 }
45353 /* lde.b [a1a0],${Dsp-16-u8}[$Dst16An] */
45356 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45357 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x74a800 }
45359 /* lde.b [a1a0],${Dsp-16-u8}[sb] */
45362 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45363 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x74aa00 }
45365 /* lde.b [a1a0],${Dsp-16-s8}[fb] */
45368 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45369 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x74ab00 }
45371 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[$Dst16An] */
45374 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45375 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74980000 }
45377 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-u8}[sb] */
45380 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45381 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x749a0000 }
45383 /* lde.b ${Dsp-24-u20}[a0],${Dsp-16-s8}[fb] */
45386 { { MNEM
, ' ', OP (DSP_24_U20
), '[', 'a', '0', ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45387 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x749b0000 }
45389 /* lde.b ${Dsp-24-u20},${Dsp-16-u8}[$Dst16An] */
45392 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45393 & ifmt_ste_b_16_8_u20a0_dst16_16_8_An_relative_QI
, { 0x74880000 }
45395 /* lde.b ${Dsp-24-u20},${Dsp-16-u8}[sb] */
45398 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45399 & ifmt_ste_b_16_8_u20a0_dst16_16_8_SB_relative_QI
, { 0x748a0000 }
45401 /* lde.b ${Dsp-24-u20},${Dsp-16-s8}[fb] */
45404 { { MNEM
, ' ', OP (DSP_24_U20
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45405 & ifmt_ste_b_16_8_u20a0_dst16_16_8_FB_relative_QI
, { 0x748b0000 }
45407 /* lde.b [a1a0],$Dst16RnQI */
45410 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16RNQI
), 0 } },
45411 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x74a0 }
45413 /* lde.b [a1a0],$Dst16AnQI */
45416 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', OP (DST16ANQI
), 0 } },
45417 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x74a4 }
45419 /* lde.b [a1a0],[$Dst16An] */
45422 { { MNEM
, ' ', '[', 'a', '1', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45423 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x74a6 }
45425 /* lde.b ${Dsp-16-u20}[a0],$Dst16RnQI */
45428 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16RNQI
), 0 } },
45429 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74900000 }
45431 /* lde.b ${Dsp-16-u20}[a0],$Dst16AnQI */
45434 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', OP (DST16ANQI
), 0 } },
45435 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74940000 }
45437 /* lde.b ${Dsp-16-u20}[a0],[$Dst16An] */
45440 { { MNEM
, ' ', OP (DSP_16_U20
), '[', 'a', '0', ']', ',', '[', OP (DST16AN
), ']', 0 } },
45441 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74960000 }
45443 /* lde.b ${Dsp-16-u20},$Dst16RnQI */
45446 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16RNQI
), 0 } },
45447 & ifmt_ste_b_basic_u20a0_dst16_Rn_direct_QI
, { 0x74800000 }
45449 /* lde.b ${Dsp-16-u20},$Dst16AnQI */
45452 { { MNEM
, ' ', OP (DSP_16_U20
), ',', OP (DST16ANQI
), 0 } },
45453 & ifmt_ste_b_basic_u20a0_dst16_An_direct_QI
, { 0x74840000 }
45455 /* lde.b ${Dsp-16-u20},[$Dst16An] */
45458 { { MNEM
, ' ', OP (DSP_16_U20
), ',', '[', OP (DST16AN
), ']', 0 } },
45459 & ifmt_ste_b_basic_u20a0_dst16_An_indirect_QI
, { 0x74860000 }
45461 /* stc ${cr3-Prefixed-32},$Dst32RnPrefixedSI */
45464 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DST32RNPREFIXEDSI
), 0 } },
45465 & ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI
, { 0x1d910 }
45467 /* stc ${cr3-Prefixed-32},$Dst32AnPrefixedSI */
45470 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DST32ANPREFIXEDSI
), 0 } },
45471 & ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI
, { 0x1d190 }
45473 /* stc ${cr3-Prefixed-32},[$Dst32AnPrefixed] */
45476 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
45477 & ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI
, { 0x1d110 }
45479 /* stc ${cr3-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
45482 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45483 & ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI
, { 0x1d31000 }
45485 /* stc ${cr3-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
45488 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45489 & ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI
, { 0x1d51000 }
45491 /* stc ${cr3-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
45494 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45495 & ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI
, { 0x1d71000 }
45497 /* stc ${cr3-Prefixed-32},${Dsp-24-u8}[sb] */
45500 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
45501 & ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1d39000 }
45503 /* stc ${cr3-Prefixed-32},${Dsp-24-u16}[sb] */
45506 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
45507 & ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1d59000 }
45509 /* stc ${cr3-Prefixed-32},${Dsp-24-s8}[fb] */
45512 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
45513 & ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1d3d000 }
45515 /* stc ${cr3-Prefixed-32},${Dsp-24-s16}[fb] */
45518 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
45519 & ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1d5d000 }
45521 /* stc ${cr3-Prefixed-32},${Dsp-24-u16} */
45524 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U16
), 0 } },
45525 & ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI
, { 0x1d7d000 }
45527 /* stc ${cr3-Prefixed-32},${Dsp-24-u24} */
45530 { { MNEM
, ' ', OP (CR3_PREFIXED_32
), ',', OP (DSP_24_U24
), 0 } },
45531 & ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI
, { 0x1d79000 }
45533 /* stc ${cr2-32},$Dst32RnUnprefixedSI */
45536 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
45537 & ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI
, { 0xd910 }
45539 /* stc ${cr2-32},$Dst32AnUnprefixedSI */
45542 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
45543 & ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI
, { 0xd190 }
45545 /* stc ${cr2-32},[$Dst32AnUnprefixed] */
45548 { { MNEM
, ' ', OP (CR2_32
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45549 & ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI
, { 0xd110 }
45551 /* stc ${cr2-32},${Dsp-16-u8}[$Dst32AnUnprefixed] */
45554 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45555 & ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI
, { 0xd31000 }
45557 /* stc ${cr2-32},${Dsp-16-u16}[$Dst32AnUnprefixed] */
45560 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45561 & ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI
, { 0xd5100000 }
45563 /* stc ${cr2-32},${Dsp-16-u24}[$Dst32AnUnprefixed] */
45566 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
45567 & ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI
, { 0xd7100000 }
45569 /* stc ${cr2-32},${Dsp-16-u8}[sb] */
45572 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45573 & ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xd39000 }
45575 /* stc ${cr2-32},${Dsp-16-u16}[sb] */
45578 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45579 & ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xd5900000 }
45581 /* stc ${cr2-32},${Dsp-16-s8}[fb] */
45584 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45585 & ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xd3d000 }
45587 /* stc ${cr2-32},${Dsp-16-s16}[fb] */
45590 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
45591 & ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xd5d00000 }
45593 /* stc ${cr2-32},${Dsp-16-u16} */
45596 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U16
), 0 } },
45597 & ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI
, { 0xd7d00000 }
45599 /* stc ${cr2-32},${Dsp-16-u24} */
45602 { { MNEM
, ' ', OP (CR2_32
), ',', OP (DSP_16_U24
), 0 } },
45603 & ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI
, { 0xd7900000 }
45605 /* stc ${cr1-Prefixed-32},$Dst32RnPrefixedHI */
45608 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
45609 & ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI
, { 0x1d918 }
45611 /* stc ${cr1-Prefixed-32},$Dst32AnPrefixedHI */
45614 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
45615 & ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI
, { 0x1d198 }
45617 /* stc ${cr1-Prefixed-32},[$Dst32AnPrefixed] */
45620 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
45621 & ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI
, { 0x1d118 }
45623 /* stc ${cr1-Prefixed-32},${Dsp-24-u8}[$Dst32AnPrefixed] */
45626 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45627 & ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI
, { 0x1d31800 }
45629 /* stc ${cr1-Prefixed-32},${Dsp-24-u16}[$Dst32AnPrefixed] */
45632 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45633 & ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI
, { 0x1d51800 }
45635 /* stc ${cr1-Prefixed-32},${Dsp-24-u24}[$Dst32AnPrefixed] */
45638 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
45639 & ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI
, { 0x1d71800 }
45641 /* stc ${cr1-Prefixed-32},${Dsp-24-u8}[sb] */
45644 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
45645 & ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1d39800 }
45647 /* stc ${cr1-Prefixed-32},${Dsp-24-u16}[sb] */
45650 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
45651 & ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1d59800 }
45653 /* stc ${cr1-Prefixed-32},${Dsp-24-s8}[fb] */
45656 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
45657 & ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1d3d800 }
45659 /* stc ${cr1-Prefixed-32},${Dsp-24-s16}[fb] */
45662 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
45663 & ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1d5d800 }
45665 /* stc ${cr1-Prefixed-32},${Dsp-24-u16} */
45668 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U16
), 0 } },
45669 & ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI
, { 0x1d7d800 }
45671 /* stc ${cr1-Prefixed-32},${Dsp-24-u24} */
45674 { { MNEM
, ' ', OP (CR1_PREFIXED_32
), ',', OP (DSP_24_U24
), 0 } },
45675 & ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI
, { 0x1d79800 }
45677 /* stc pc,$Dst16RnHI */
45680 { { MNEM
, ' ', 'p', 'c', ',', OP (DST16RNHI
), 0 } },
45681 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7cc0 }
45683 /* stc pc,$Dst16AnHI */
45686 { { MNEM
, ' ', 'p', 'c', ',', OP (DST16ANHI
), 0 } },
45687 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7cc4 }
45689 /* stc pc,[$Dst16An] */
45692 { { MNEM
, ' ', 'p', 'c', ',', '[', OP (DST16AN
), ']', 0 } },
45693 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7cc6 }
45695 /* stc pc,${Dsp-16-u8}[$Dst16An] */
45698 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45699 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7cc800 }
45701 /* stc pc,${Dsp-16-u16}[$Dst16An] */
45704 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45705 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7ccc0000 }
45707 /* stc pc,${Dsp-16-u8}[sb] */
45710 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45711 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7cca00 }
45713 /* stc pc,${Dsp-16-u16}[sb] */
45716 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45717 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7cce0000 }
45719 /* stc pc,${Dsp-16-s8}[fb] */
45722 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45723 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7ccb00 }
45725 /* stc pc,${Dsp-16-u16} */
45728 { { MNEM
, ' ', 'p', 'c', ',', OP (DSP_16_U16
), 0 } },
45729 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7ccf0000 }
45731 /* stc ${cr16},$Dst16RnHI */
45734 { { MNEM
, ' ', OP (CR16
), ',', OP (DST16RNHI
), 0 } },
45735 & ifmt_stc16_src_dst16_Rn_direct_HI
, { 0x7b80 }
45737 /* stc ${cr16},$Dst16AnHI */
45740 { { MNEM
, ' ', OP (CR16
), ',', OP (DST16ANHI
), 0 } },
45741 & ifmt_stc16_src_dst16_An_direct_HI
, { 0x7b84 }
45743 /* stc ${cr16},[$Dst16An] */
45746 { { MNEM
, ' ', OP (CR16
), ',', '[', OP (DST16AN
), ']', 0 } },
45747 & ifmt_stc16_src_dst16_An_indirect_HI
, { 0x7b86 }
45749 /* stc ${cr16},${Dsp-16-u8}[$Dst16An] */
45752 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
45753 & ifmt_stc16_src_dst16_16_8_An_relative_HI
, { 0x7b8800 }
45755 /* stc ${cr16},${Dsp-16-u16}[$Dst16An] */
45758 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
45759 & ifmt_stc16_src_dst16_16_16_An_relative_HI
, { 0x7b8c0000 }
45761 /* stc ${cr16},${Dsp-16-u8}[sb] */
45764 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
45765 & ifmt_stc16_src_dst16_16_8_SB_relative_HI
, { 0x7b8a00 }
45767 /* stc ${cr16},${Dsp-16-u16}[sb] */
45770 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
45771 & ifmt_stc16_src_dst16_16_16_SB_relative_HI
, { 0x7b8e0000 }
45773 /* stc ${cr16},${Dsp-16-s8}[fb] */
45776 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
45777 & ifmt_stc16_src_dst16_16_8_FB_relative_HI
, { 0x7b8b00 }
45779 /* stc ${cr16},${Dsp-16-u16} */
45782 { { MNEM
, ' ', OP (CR16
), ',', OP (DSP_16_U16
), 0 } },
45783 & ifmt_stc16_src_dst16_16_16_absolute_HI
, { 0x7b8f0000 }
45785 /* ldc $Dst32RnPrefixedSI,${cr3-Prefixed-32} */
45788 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), ',', OP (CR3_PREFIXED_32
), 0 } },
45789 & ifmt_stc32_src_cr3_dst32_Rn_direct_Prefixed_SI
, { 0x1d900 }
45791 /* ldc $Dst32AnPrefixedSI,${cr3-Prefixed-32} */
45794 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), ',', OP (CR3_PREFIXED_32
), 0 } },
45795 & ifmt_stc32_src_cr3_dst32_An_direct_Prefixed_SI
, { 0x1d180 }
45797 /* ldc [$Dst32AnPrefixed],${cr3-Prefixed-32} */
45800 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45801 & ifmt_stc32_src_cr3_dst32_An_indirect_Prefixed_SI
, { 0x1d100 }
45803 /* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45806 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45807 & ifmt_stc32_src_cr3_dst32_24_8_An_relative_Prefixed_SI
, { 0x1d30000 }
45809 /* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45812 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45813 & ifmt_stc32_src_cr3_dst32_24_16_An_relative_Prefixed_SI
, { 0x1d50000 }
45815 /* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr3-Prefixed-32} */
45818 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45819 & ifmt_stc32_src_cr3_dst32_24_24_An_relative_Prefixed_SI
, { 0x1d70000 }
45821 /* ldc ${Dsp-24-u8}[sb],${cr3-Prefixed-32} */
45824 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45825 & ifmt_stc32_src_cr3_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1d38000 }
45827 /* ldc ${Dsp-24-u16}[sb],${cr3-Prefixed-32} */
45830 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45831 & ifmt_stc32_src_cr3_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1d58000 }
45833 /* ldc ${Dsp-24-s8}[fb],${cr3-Prefixed-32} */
45836 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45837 & ifmt_stc32_src_cr3_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1d3c000 }
45839 /* ldc ${Dsp-24-s16}[fb],${cr3-Prefixed-32} */
45842 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (CR3_PREFIXED_32
), 0 } },
45843 & ifmt_stc32_src_cr3_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1d5c000 }
45845 /* ldc ${Dsp-24-u16},${cr3-Prefixed-32} */
45848 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (CR3_PREFIXED_32
), 0 } },
45849 & ifmt_stc32_src_cr3_dst32_24_16_absolute_Prefixed_SI
, { 0x1d7c000 }
45851 /* ldc ${Dsp-24-u24},${cr3-Prefixed-32} */
45854 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (CR3_PREFIXED_32
), 0 } },
45855 & ifmt_stc32_src_cr3_dst32_24_24_absolute_Prefixed_SI
, { 0x1d78000 }
45857 /* ldc $Dst32RnUnprefixedSI,${cr2-32} */
45860 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), ',', OP (CR2_32
), 0 } },
45861 & ifmt_stc32_src_cr2_dst32_Rn_direct_Unprefixed_SI
, { 0xd900 }
45863 /* ldc $Dst32AnUnprefixedSI,${cr2-32} */
45866 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), ',', OP (CR2_32
), 0 } },
45867 & ifmt_stc32_src_cr2_dst32_An_direct_Unprefixed_SI
, { 0xd180 }
45869 /* ldc [$Dst32AnUnprefixed],${cr2-32} */
45872 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45873 & ifmt_stc32_src_cr2_dst32_An_indirect_Unprefixed_SI
, { 0xd100 }
45875 /* ldc ${Dsp-16-u8}[$Dst32AnUnprefixed],${cr2-32} */
45878 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45879 & ifmt_stc32_src_cr2_dst32_16_8_An_relative_Unprefixed_SI
, { 0xd30000 }
45881 /* ldc ${Dsp-16-u16}[$Dst32AnUnprefixed],${cr2-32} */
45884 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45885 & ifmt_stc32_src_cr2_dst32_16_16_An_relative_Unprefixed_SI
, { 0xd5000000 }
45887 /* ldc ${Dsp-16-u24}[$Dst32AnUnprefixed],${cr2-32} */
45890 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (CR2_32
), 0 } },
45891 & ifmt_stc32_src_cr2_dst32_16_24_An_relative_Unprefixed_SI
, { 0xd7000000 }
45893 /* ldc ${Dsp-16-u8}[sb],${cr2-32} */
45896 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (CR2_32
), 0 } },
45897 & ifmt_stc32_src_cr2_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xd38000 }
45899 /* ldc ${Dsp-16-u16}[sb],${cr2-32} */
45902 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (CR2_32
), 0 } },
45903 & ifmt_stc32_src_cr2_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xd5800000 }
45905 /* ldc ${Dsp-16-s8}[fb],${cr2-32} */
45908 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (CR2_32
), 0 } },
45909 & ifmt_stc32_src_cr2_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xd3c000 }
45911 /* ldc ${Dsp-16-s16}[fb],${cr2-32} */
45914 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (CR2_32
), 0 } },
45915 & ifmt_stc32_src_cr2_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xd5c00000 }
45917 /* ldc ${Dsp-16-u16},${cr2-32} */
45920 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (CR2_32
), 0 } },
45921 & ifmt_stc32_src_cr2_dst32_16_16_absolute_Unprefixed_SI
, { 0xd7c00000 }
45923 /* ldc ${Dsp-16-u24},${cr2-32} */
45926 { { MNEM
, ' ', OP (DSP_16_U24
), ',', OP (CR2_32
), 0 } },
45927 & ifmt_stc32_src_cr2_dst32_16_24_absolute_Unprefixed_SI
, { 0xd7800000 }
45929 /* ldc $Dst32RnPrefixedHI,${cr1-Prefixed-32} */
45932 { { MNEM
, ' ', OP (DST32RNPREFIXEDHI
), ',', OP (CR1_PREFIXED_32
), 0 } },
45933 & ifmt_stc32_src_cr1_dst32_Rn_direct_Prefixed_HI
, { 0x1d908 }
45935 /* ldc $Dst32AnPrefixedHI,${cr1-Prefixed-32} */
45938 { { MNEM
, ' ', OP (DST32ANPREFIXEDHI
), ',', OP (CR1_PREFIXED_32
), 0 } },
45939 & ifmt_stc32_src_cr1_dst32_An_direct_Prefixed_HI
, { 0x1d188 }
45941 /* ldc [$Dst32AnPrefixed],${cr1-Prefixed-32} */
45944 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45945 & ifmt_stc32_src_cr1_dst32_An_indirect_Prefixed_HI
, { 0x1d108 }
45947 /* ldc ${Dsp-24-u8}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45950 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45951 & ifmt_stc32_src_cr1_dst32_24_8_An_relative_Prefixed_HI
, { 0x1d30800 }
45953 /* ldc ${Dsp-24-u16}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45956 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45957 & ifmt_stc32_src_cr1_dst32_24_16_An_relative_Prefixed_HI
, { 0x1d50800 }
45959 /* ldc ${Dsp-24-u24}[$Dst32AnPrefixed],${cr1-Prefixed-32} */
45962 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45963 & ifmt_stc32_src_cr1_dst32_24_24_An_relative_Prefixed_HI
, { 0x1d70800 }
45965 /* ldc ${Dsp-24-u8}[sb],${cr1-Prefixed-32} */
45968 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45969 & ifmt_stc32_src_cr1_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1d38800 }
45971 /* ldc ${Dsp-24-u16}[sb],${cr1-Prefixed-32} */
45974 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45975 & ifmt_stc32_src_cr1_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1d58800 }
45977 /* ldc ${Dsp-24-s8}[fb],${cr1-Prefixed-32} */
45980 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45981 & ifmt_stc32_src_cr1_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1d3c800 }
45983 /* ldc ${Dsp-24-s16}[fb],${cr1-Prefixed-32} */
45986 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (CR1_PREFIXED_32
), 0 } },
45987 & ifmt_stc32_src_cr1_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1d5c800 }
45989 /* ldc ${Dsp-24-u16},${cr1-Prefixed-32} */
45992 { { MNEM
, ' ', OP (DSP_24_U16
), ',', OP (CR1_PREFIXED_32
), 0 } },
45993 & ifmt_stc32_src_cr1_dst32_24_16_absolute_Prefixed_HI
, { 0x1d7c800 }
45995 /* ldc ${Dsp-24-u24},${cr1-Prefixed-32} */
45998 { { MNEM
, ' ', OP (DSP_24_U24
), ',', OP (CR1_PREFIXED_32
), 0 } },
45999 & ifmt_stc32_src_cr1_dst32_24_24_absolute_Prefixed_HI
, { 0x1d78800 }
46001 /* ldc $Dst16RnHI,${cr16} */
46004 { { MNEM
, ' ', OP (DST16RNHI
), ',', OP (CR16
), 0 } },
46005 & ifmt_stc16_src_dst16_Rn_direct_HI
, { 0x7a80 }
46007 /* ldc $Dst16AnHI,${cr16} */
46010 { { MNEM
, ' ', OP (DST16ANHI
), ',', OP (CR16
), 0 } },
46011 & ifmt_stc16_src_dst16_An_direct_HI
, { 0x7a84 }
46013 /* ldc [$Dst16An],${cr16} */
46016 { { MNEM
, ' ', '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46017 & ifmt_stc16_src_dst16_An_indirect_HI
, { 0x7a86 }
46019 /* ldc ${Dsp-16-u8}[$Dst16An],${cr16} */
46022 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46023 & ifmt_stc16_src_dst16_16_8_An_relative_HI
, { 0x7a8800 }
46025 /* ldc ${Dsp-16-u16}[$Dst16An],${cr16} */
46028 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (CR16
), 0 } },
46029 & ifmt_stc16_src_dst16_16_16_An_relative_HI
, { 0x7a8c0000 }
46031 /* ldc ${Dsp-16-u8}[sb],${cr16} */
46034 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (CR16
), 0 } },
46035 & ifmt_stc16_src_dst16_16_8_SB_relative_HI
, { 0x7a8a00 }
46037 /* ldc ${Dsp-16-u16}[sb],${cr16} */
46040 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (CR16
), 0 } },
46041 & ifmt_stc16_src_dst16_16_16_SB_relative_HI
, { 0x7a8e0000 }
46043 /* ldc ${Dsp-16-s8}[fb],${cr16} */
46046 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (CR16
), 0 } },
46047 & ifmt_stc16_src_dst16_16_8_FB_relative_HI
, { 0x7a8b00 }
46049 /* ldc ${Dsp-16-u16},${cr16} */
46052 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (CR16
), 0 } },
46053 & ifmt_stc16_src_dst16_16_16_absolute_HI
, { 0x7a8f0000 }
46055 /* jsri.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46058 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46059 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96010000 }
46061 /* jsri.a ${Dsp-16-u24} */
46064 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46065 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x96810000 }
46067 /* jsri.a $Dst32RnUnprefixedSI */
46070 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
46071 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0x9801 }
46073 /* jsri.a $Dst32AnUnprefixedSI */
46076 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
46077 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0x9081 }
46079 /* jsri.a [$Dst32AnUnprefixed] */
46082 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46083 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0x9001 }
46085 /* jsri.a $Dst16RnSI */
46088 { { MNEM
, ' ', OP (DST16RNSI
), 0 } },
46089 & ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI
, { 0x7d10 }
46091 /* jsri.a $Dst16AnSI */
46094 { { MNEM
, ' ', OP (DST16ANSI
), 0 } },
46095 & ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI
, { 0x7d14 }
46097 /* jsri.a [$Dst16An] */
46100 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46101 & ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI
, { 0x7d16 }
46103 /* jsri.a ${Dsp-16-u16}[sb] */
46106 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46107 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94810000 }
46109 /* jsri.a ${Dsp-16-s16}[fb] */
46112 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46113 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94c10000 }
46115 /* jsri.a ${Dsp-16-u16} */
46118 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46119 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0x96c10000 }
46121 /* jsri.a ${Dsp-16-u16}[sb] */
46124 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46125 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_SB_relative_SI
, { 0x7d1e0000 }
46127 /* jsri.a ${Dsp-16-u16} */
46130 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46131 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_absolute_SI
, { 0x7d1f0000 }
46133 /* jsri.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46136 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46137 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0x920100 }
46139 /* jsri.a ${Dsp-16-u8}[sb] */
46142 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46143 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x928100 }
46145 /* jsri.a ${Dsp-16-s8}[fb] */
46148 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46149 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92c100 }
46151 /* jsri.a ${Dsp-16-u8}[$Dst16An] */
46154 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46155 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI
, { 0x7d1800 }
46157 /* jsri.a ${Dsp-16-u8}[sb] */
46160 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46161 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI
, { 0x7d1a00 }
46163 /* jsri.a ${Dsp-16-s8}[fb] */
46166 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46167 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI
, { 0x7d1b00 }
46169 /* jsri.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46172 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46173 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96010000 }
46175 /* jsri.a ${Dsp-16-u24} */
46178 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46179 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x96810000 }
46181 /* jsri.a ${Dsp-16-u20}[$Dst16An] */
46184 { { MNEM
, ' ', OP (DSP_16_U20
), '[', OP (DST16AN
), ']', 0 } },
46185 & ifmt_jsri16a_dst16_16_20ar_SI_dst16_16_20_An_relative_SI
, { 0x7d1c0000 }
46187 /* jsri.w $Dst32RnUnprefixedHI */
46190 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46191 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc91f }
46193 /* jsri.w $Dst32AnUnprefixedHI */
46196 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46197 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc19f }
46199 /* jsri.w [$Dst32AnUnprefixed] */
46202 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46203 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc11f }
46205 /* jsri.w $Dst16RnHI */
46208 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
46209 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7d30 }
46211 /* jsri.w $Dst16AnHI */
46214 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
46215 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7d34 }
46217 /* jsri.w [$Dst16An] */
46220 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46221 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7d36 }
46223 /* jsri.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46226 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46227 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc31f00 }
46229 /* jsri.w ${Dsp-16-u8}[sb] */
46232 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46233 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc39f00 }
46235 /* jsri.w ${Dsp-16-s8}[fb] */
46238 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46239 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3df00 }
46241 /* jsri.w ${Dsp-16-u8}[$Dst16An] */
46244 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46245 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7d3800 }
46247 /* jsri.w ${Dsp-16-u8}[sb] */
46250 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46251 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7d3a00 }
46253 /* jsri.w ${Dsp-16-s8}[fb] */
46256 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46257 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7d3b00 }
46259 /* jsri.w ${Dsp-16-u16}[sb] */
46262 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46263 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc59f0000 }
46265 /* jsri.w ${Dsp-16-s16}[fb] */
46268 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46269 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5df0000 }
46271 /* jsri.w ${Dsp-16-u16} */
46274 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46275 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7df0000 }
46277 /* jsri.w ${Dsp-16-u16}[sb] */
46280 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46281 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7d3e0000 }
46283 /* jsri.w ${Dsp-16-u16} */
46286 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46287 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7d3f0000 }
46289 /* jsri.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46292 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46293 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc71f0000 }
46295 /* jsri.w ${Dsp-16-u24} */
46298 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46299 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc79f0000 }
46301 /* jsri.w ${Dsp-16-u20}[$Dst16An] */
46304 { { MNEM
, ' ', OP (DSP_16_U20
), '[', OP (DST16AN
), ']', 0 } },
46305 & ifmt_jsri16w_dst16_16_20ar_HI_dst16_16_20_An_relative_HI
, { 0x7d3c0000 }
46307 /* jmpi.a $Dst32RnUnprefixedSI */
46310 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDSI
), 0 } },
46311 & ifmt_shl32_l_dst_dst32_Rn_direct_Unprefixed_SI
, { 0x8801 }
46313 /* jmpi.a $Dst32AnUnprefixedSI */
46316 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDSI
), 0 } },
46317 & ifmt_exts32_w_16_ExtUnprefixed_dst32_An_direct_Unprefixed_SI
, { 0x8081 }
46319 /* jmpi.a [$Dst32AnUnprefixed] */
46322 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46323 & ifmt_shl32_l_dst_dst32_An_indirect_Unprefixed_SI
, { 0x8001 }
46325 /* jmpi.a ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46328 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46329 & ifmt_shl32_l_dst_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820100 }
46331 /* jmpi.a ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46334 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46335 & ifmt_shl32_l_dst_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84010000 }
46337 /* jmpi.a ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46340 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46341 & ifmt_shl32_l_dst_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86010000 }
46343 /* jmpi.a ${Dsp-16-u8}[sb] */
46346 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46347 & ifmt_shl32_l_dst_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828100 }
46349 /* jmpi.a ${Dsp-16-u16}[sb] */
46352 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46353 & ifmt_shl32_l_dst_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84810000 }
46355 /* jmpi.a ${Dsp-16-s8}[fb] */
46358 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46359 & ifmt_shl32_l_dst_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c100 }
46361 /* jmpi.a ${Dsp-16-s16}[fb] */
46364 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46365 & ifmt_shl32_l_dst_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c10000 }
46367 /* jmpi.a ${Dsp-16-u16} */
46370 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46371 & ifmt_shl32_l_dst_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c10000 }
46373 /* jmpi.a ${Dsp-16-u24} */
46376 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46377 & ifmt_shl32_l_dst_dst32_16_24_absolute_Unprefixed_SI
, { 0x86810000 }
46379 /* jmpi.a $Dst16RnSI */
46382 { { MNEM
, ' ', OP (DST16RNSI
), 0 } },
46383 & ifmt_jsri16a_dst16_basic_SI_dst16_Rn_direct_SI
, { 0x7d00 }
46385 /* jmpi.a $Dst16AnSI */
46388 { { MNEM
, ' ', OP (DST16ANSI
), 0 } },
46389 & ifmt_jsri16a_dst16_basic_SI_dst16_An_direct_SI
, { 0x7d04 }
46391 /* jmpi.a [$Dst16An] */
46394 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46395 & ifmt_jsri16a_dst16_basic_SI_dst16_An_indirect_SI
, { 0x7d06 }
46397 /* jmpi.a ${Dsp-16-u8}[$Dst16An] */
46400 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46401 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_An_relative_SI
, { 0x7d0800 }
46403 /* jmpi.a ${Dsp-16-u16}[$Dst16An] */
46406 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46407 & ifmt_jmpi16_a_16_dst16_16_16_An_relative_SI
, { 0x7d0c0000 }
46409 /* jmpi.a ${Dsp-16-u8}[sb] */
46412 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46413 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_SB_relative_SI
, { 0x7d0a00 }
46415 /* jmpi.a ${Dsp-16-u16}[sb] */
46418 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46419 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_SB_relative_SI
, { 0x7d0e0000 }
46421 /* jmpi.a ${Dsp-16-s8}[fb] */
46424 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46425 & ifmt_jsri16a_dst16_16_8_SI_dst16_16_8_FB_relative_SI
, { 0x7d0b00 }
46427 /* jmpi.a ${Dsp-16-u16} */
46430 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46431 & ifmt_jsri16a_dst16_16_16sa_SI_dst16_16_16_absolute_SI
, { 0x7d0f0000 }
46433 /* jmpi.w $Dst32RnUnprefixedHI */
46436 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46437 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc90f }
46439 /* jmpi.w $Dst32AnUnprefixedHI */
46442 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46443 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc18f }
46445 /* jmpi.w [$Dst32AnUnprefixed] */
46448 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46449 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc10f }
46451 /* jmpi.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46454 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46455 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30f00 }
46457 /* jmpi.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46460 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46461 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50f0000 }
46463 /* jmpi.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46466 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46467 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70f0000 }
46469 /* jmpi.w ${Dsp-16-u8}[sb] */
46472 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46473 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38f00 }
46475 /* jmpi.w ${Dsp-16-u16}[sb] */
46478 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46479 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58f0000 }
46481 /* jmpi.w ${Dsp-16-s8}[fb] */
46484 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46485 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cf00 }
46487 /* jmpi.w ${Dsp-16-s16}[fb] */
46490 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46491 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cf0000 }
46493 /* jmpi.w ${Dsp-16-u16} */
46496 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46497 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cf0000 }
46499 /* jmpi.w ${Dsp-16-u24} */
46502 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46503 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78f0000 }
46505 /* jmpi.w $Dst16RnHI */
46508 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
46509 & ifmt_shl16_w_dst_dst16_Rn_direct_HI
, { 0x7d20 }
46511 /* jmpi.w $Dst16AnHI */
46514 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
46515 & ifmt_shl16_w_dst_dst16_An_direct_HI
, { 0x7d24 }
46517 /* jmpi.w [$Dst16An] */
46520 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
46521 & ifmt_shl16_w_dst_dst16_An_indirect_HI
, { 0x7d26 }
46523 /* jmpi.w ${Dsp-16-u8}[$Dst16An] */
46526 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
46527 & ifmt_shl16_w_dst_dst16_16_8_An_relative_HI
, { 0x7d2800 }
46529 /* jmpi.w ${Dsp-16-u16}[$Dst16An] */
46532 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
46533 & ifmt_shl16_w_dst_dst16_16_16_An_relative_HI
, { 0x7d2c0000 }
46535 /* jmpi.w ${Dsp-16-u8}[sb] */
46538 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46539 & ifmt_shl16_w_dst_dst16_16_8_SB_relative_HI
, { 0x7d2a00 }
46541 /* jmpi.w ${Dsp-16-u16}[sb] */
46544 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46545 & ifmt_shl16_w_dst_dst16_16_16_SB_relative_HI
, { 0x7d2e0000 }
46547 /* jmpi.w ${Dsp-16-s8}[fb] */
46550 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46551 & ifmt_shl16_w_dst_dst16_16_8_FB_relative_HI
, { 0x7d2b00 }
46553 /* jmpi.w ${Dsp-16-u16} */
46556 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46557 & ifmt_shl16_w_dst_dst16_16_16_absolute_HI
, { 0x7d2f0000 }
46559 /* indexws.w $Dst32RnUnprefixedHI */
46562 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46563 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc833 }
46565 /* indexws.w $Dst32AnUnprefixedHI */
46568 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46569 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc0b3 }
46571 /* indexws.w [$Dst32AnUnprefixed] */
46574 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46575 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc033 }
46577 /* indexws.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46580 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46581 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc23300 }
46583 /* indexws.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46586 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46587 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc4330000 }
46589 /* indexws.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46592 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46593 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc6330000 }
46595 /* indexws.w ${Dsp-16-u8}[sb] */
46598 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46599 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc2b300 }
46601 /* indexws.w ${Dsp-16-u16}[sb] */
46604 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46605 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc4b30000 }
46607 /* indexws.w ${Dsp-16-s8}[fb] */
46610 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46611 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc2f300 }
46613 /* indexws.w ${Dsp-16-s16}[fb] */
46616 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46617 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc4f30000 }
46619 /* indexws.w ${Dsp-16-u16} */
46622 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46623 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc6f30000 }
46625 /* indexws.w ${Dsp-16-u24} */
46628 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46629 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc6b30000 }
46631 /* indexws.b $Dst32RnUnprefixedQI */
46634 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46635 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc823 }
46637 /* indexws.b $Dst32AnUnprefixedQI */
46640 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46641 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc0a3 }
46643 /* indexws.b [$Dst32AnUnprefixed] */
46646 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46647 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc023 }
46649 /* indexws.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46652 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46653 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc22300 }
46655 /* indexws.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46658 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46659 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4230000 }
46661 /* indexws.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46664 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46665 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6230000 }
46667 /* indexws.b ${Dsp-16-u8}[sb] */
46670 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46671 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc2a300 }
46673 /* indexws.b ${Dsp-16-u16}[sb] */
46676 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46677 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4a30000 }
46679 /* indexws.b ${Dsp-16-s8}[fb] */
46682 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46683 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2e300 }
46685 /* indexws.b ${Dsp-16-s16}[fb] */
46688 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46689 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4e30000 }
46691 /* indexws.b ${Dsp-16-u16} */
46694 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46695 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6e30000 }
46697 /* indexws.b ${Dsp-16-u24} */
46700 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46701 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6a30000 }
46703 /* indexwd.w $Dst32RnUnprefixedHI */
46706 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46707 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa833 }
46709 /* indexwd.w $Dst32AnUnprefixedHI */
46712 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46713 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa0b3 }
46715 /* indexwd.w [$Dst32AnUnprefixed] */
46718 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46719 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa033 }
46721 /* indexwd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46724 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46725 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa23300 }
46727 /* indexwd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46730 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46731 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa4330000 }
46733 /* indexwd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46736 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46737 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa6330000 }
46739 /* indexwd.w ${Dsp-16-u8}[sb] */
46742 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46743 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa2b300 }
46745 /* indexwd.w ${Dsp-16-u16}[sb] */
46748 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46749 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa4b30000 }
46751 /* indexwd.w ${Dsp-16-s8}[fb] */
46754 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46755 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa2f300 }
46757 /* indexwd.w ${Dsp-16-s16}[fb] */
46760 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46761 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa4f30000 }
46763 /* indexwd.w ${Dsp-16-u16} */
46766 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46767 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa6f30000 }
46769 /* indexwd.w ${Dsp-16-u24} */
46772 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46773 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa6b30000 }
46775 /* indexwd.b $Dst32RnUnprefixedQI */
46778 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46779 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa823 }
46781 /* indexwd.b $Dst32AnUnprefixedQI */
46784 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46785 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa0a3 }
46787 /* indexwd.b [$Dst32AnUnprefixed] */
46790 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46791 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa023 }
46793 /* indexwd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46796 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46797 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa22300 }
46799 /* indexwd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46802 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46803 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa4230000 }
46805 /* indexwd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46808 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46809 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa6230000 }
46811 /* indexwd.b ${Dsp-16-u8}[sb] */
46814 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46815 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa2a300 }
46817 /* indexwd.b ${Dsp-16-u16}[sb] */
46820 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46821 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4a30000 }
46823 /* indexwd.b ${Dsp-16-s8}[fb] */
46826 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46827 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2e300 }
46829 /* indexwd.b ${Dsp-16-s16}[fb] */
46832 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46833 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4e30000 }
46835 /* indexwd.b ${Dsp-16-u16} */
46838 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46839 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6e30000 }
46841 /* indexwd.b ${Dsp-16-u24} */
46844 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46845 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6a30000 }
46847 /* indexw.w $Dst32RnUnprefixedHI */
46850 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46851 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x8833 }
46853 /* indexw.w $Dst32AnUnprefixedHI */
46856 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
46857 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x80b3 }
46859 /* indexw.w [$Dst32AnUnprefixed] */
46862 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46863 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x8033 }
46865 /* indexw.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46868 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46869 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x823300 }
46871 /* indexw.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46874 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46875 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x84330000 }
46877 /* indexw.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46880 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46881 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x86330000 }
46883 /* indexw.w ${Dsp-16-u8}[sb] */
46886 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46887 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x82b300 }
46889 /* indexw.w ${Dsp-16-u16}[sb] */
46892 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46893 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x84b30000 }
46895 /* indexw.w ${Dsp-16-s8}[fb] */
46898 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46899 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x82f300 }
46901 /* indexw.w ${Dsp-16-s16}[fb] */
46904 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46905 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x84f30000 }
46907 /* indexw.w ${Dsp-16-u16} */
46910 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46911 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x86f30000 }
46913 /* indexw.w ${Dsp-16-u24} */
46916 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46917 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x86b30000 }
46919 /* indexw.b $Dst32RnUnprefixedQI */
46922 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
46923 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x8823 }
46925 /* indexw.b $Dst32AnUnprefixedQI */
46928 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
46929 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x80a3 }
46931 /* indexw.b [$Dst32AnUnprefixed] */
46934 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46935 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x8023 }
46937 /* indexw.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
46940 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46941 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822300 }
46943 /* indexw.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
46946 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46947 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84230000 }
46949 /* indexw.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
46952 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
46953 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86230000 }
46955 /* indexw.b ${Dsp-16-u8}[sb] */
46958 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
46959 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a300 }
46961 /* indexw.b ${Dsp-16-u16}[sb] */
46964 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
46965 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a30000 }
46967 /* indexw.b ${Dsp-16-s8}[fb] */
46970 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
46971 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e300 }
46973 /* indexw.b ${Dsp-16-s16}[fb] */
46976 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
46977 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e30000 }
46979 /* indexw.b ${Dsp-16-u16} */
46982 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
46983 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e30000 }
46985 /* indexw.b ${Dsp-16-u24} */
46988 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
46989 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a30000 }
46991 /* indexls.w $Dst32RnUnprefixedHI */
46994 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
46995 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x9813 }
46997 /* indexls.w $Dst32AnUnprefixedHI */
47000 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47001 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x9093 }
47003 /* indexls.w [$Dst32AnUnprefixed] */
47006 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47007 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x9013 }
47009 /* indexls.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47012 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47013 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x921300 }
47015 /* indexls.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47018 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47019 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x94130000 }
47021 /* indexls.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47024 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47025 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x96130000 }
47027 /* indexls.w ${Dsp-16-u8}[sb] */
47030 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47031 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x929300 }
47033 /* indexls.w ${Dsp-16-u16}[sb] */
47036 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47037 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x94930000 }
47039 /* indexls.w ${Dsp-16-s8}[fb] */
47042 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47043 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x92d300 }
47045 /* indexls.w ${Dsp-16-s16}[fb] */
47048 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47049 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x94d30000 }
47051 /* indexls.w ${Dsp-16-u16} */
47054 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47055 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x96d30000 }
47057 /* indexls.w ${Dsp-16-u24} */
47060 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47061 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x96930000 }
47063 /* indexls.b $Dst32RnUnprefixedQI */
47066 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47067 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x9803 }
47069 /* indexls.b $Dst32AnUnprefixedQI */
47072 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47073 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x9083 }
47075 /* indexls.b [$Dst32AnUnprefixed] */
47078 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47079 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x9003 }
47081 /* indexls.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47084 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47085 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x920300 }
47087 /* indexls.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47090 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47091 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x94030000 }
47093 /* indexls.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47096 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47097 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x96030000 }
47099 /* indexls.b ${Dsp-16-u8}[sb] */
47102 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47103 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x928300 }
47105 /* indexls.b ${Dsp-16-u16}[sb] */
47108 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47109 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94830000 }
47111 /* indexls.b ${Dsp-16-s8}[fb] */
47114 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47115 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92c300 }
47117 /* indexls.b ${Dsp-16-s16}[fb] */
47120 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47121 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94c30000 }
47123 /* indexls.b ${Dsp-16-u16} */
47126 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47127 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96c30000 }
47129 /* indexls.b ${Dsp-16-u24} */
47132 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47133 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x96830000 }
47135 /* indexld.w $Dst32RnUnprefixedHI */
47138 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47139 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb833 }
47141 /* indexld.w $Dst32AnUnprefixedHI */
47144 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47145 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb0b3 }
47147 /* indexld.w [$Dst32AnUnprefixed] */
47150 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47151 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb033 }
47153 /* indexld.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47156 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47157 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb23300 }
47159 /* indexld.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47162 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47163 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb4330000 }
47165 /* indexld.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47168 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47169 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb6330000 }
47171 /* indexld.w ${Dsp-16-u8}[sb] */
47174 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47175 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb2b300 }
47177 /* indexld.w ${Dsp-16-u16}[sb] */
47180 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47181 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb4b30000 }
47183 /* indexld.w ${Dsp-16-s8}[fb] */
47186 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47187 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb2f300 }
47189 /* indexld.w ${Dsp-16-s16}[fb] */
47192 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47193 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb4f30000 }
47195 /* indexld.w ${Dsp-16-u16} */
47198 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47199 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb6f30000 }
47201 /* indexld.w ${Dsp-16-u24} */
47204 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47205 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb6b30000 }
47207 /* indexld.b $Dst32RnUnprefixedQI */
47210 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47211 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb823 }
47213 /* indexld.b $Dst32AnUnprefixedQI */
47216 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47217 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb0a3 }
47219 /* indexld.b [$Dst32AnUnprefixed] */
47222 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47223 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb023 }
47225 /* indexld.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47228 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47229 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb22300 }
47231 /* indexld.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47234 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47235 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb4230000 }
47237 /* indexld.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47240 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47241 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb6230000 }
47243 /* indexld.b ${Dsp-16-u8}[sb] */
47246 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47247 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb2a300 }
47249 /* indexld.b ${Dsp-16-u16}[sb] */
47252 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47253 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb4a30000 }
47255 /* indexld.b ${Dsp-16-s8}[fb] */
47258 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47259 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2e300 }
47261 /* indexld.b ${Dsp-16-s16}[fb] */
47264 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47265 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4e30000 }
47267 /* indexld.b ${Dsp-16-u16} */
47270 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47271 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6e30000 }
47273 /* indexld.b ${Dsp-16-u24} */
47276 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47277 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb6a30000 }
47279 /* indexl.w $Dst32RnUnprefixedHI */
47282 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47283 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x9833 }
47285 /* indexl.w $Dst32AnUnprefixedHI */
47288 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47289 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x90b3 }
47291 /* indexl.w [$Dst32AnUnprefixed] */
47294 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47295 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x9033 }
47297 /* indexl.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47300 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47301 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x923300 }
47303 /* indexl.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47306 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47307 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x94330000 }
47309 /* indexl.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47312 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47313 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x96330000 }
47315 /* indexl.w ${Dsp-16-u8}[sb] */
47318 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47319 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x92b300 }
47321 /* indexl.w ${Dsp-16-u16}[sb] */
47324 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47325 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x94b30000 }
47327 /* indexl.w ${Dsp-16-s8}[fb] */
47330 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47331 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x92f300 }
47333 /* indexl.w ${Dsp-16-s16}[fb] */
47336 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47337 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x94f30000 }
47339 /* indexl.w ${Dsp-16-u16} */
47342 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47343 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x96f30000 }
47345 /* indexl.w ${Dsp-16-u24} */
47348 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47349 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x96b30000 }
47351 /* indexl.b $Dst32RnUnprefixedQI */
47354 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47355 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x9823 }
47357 /* indexl.b $Dst32AnUnprefixedQI */
47360 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47361 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x90a3 }
47363 /* indexl.b [$Dst32AnUnprefixed] */
47366 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47367 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x9023 }
47369 /* indexl.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47372 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47373 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922300 }
47375 /* indexl.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47378 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47379 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x94230000 }
47381 /* indexl.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47384 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47385 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x96230000 }
47387 /* indexl.b ${Dsp-16-u8}[sb] */
47390 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47391 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92a300 }
47393 /* indexl.b ${Dsp-16-u16}[sb] */
47396 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47397 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94a30000 }
47399 /* indexl.b ${Dsp-16-s8}[fb] */
47402 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47403 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92e300 }
47405 /* indexl.b ${Dsp-16-s16}[fb] */
47408 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47409 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94e30000 }
47411 /* indexl.b ${Dsp-16-u16} */
47414 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47415 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96e30000 }
47417 /* indexl.b ${Dsp-16-u24} */
47420 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47421 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x96a30000 }
47423 /* indexbs.w $Dst32RnUnprefixedHI */
47426 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47427 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc813 }
47429 /* indexbs.w $Dst32AnUnprefixedHI */
47432 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47433 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc093 }
47435 /* indexbs.w [$Dst32AnUnprefixed] */
47438 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47439 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc013 }
47441 /* indexbs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47444 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47445 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc21300 }
47447 /* indexbs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47450 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47451 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc4130000 }
47453 /* indexbs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47456 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47457 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc6130000 }
47459 /* indexbs.w ${Dsp-16-u8}[sb] */
47462 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47463 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc29300 }
47465 /* indexbs.w ${Dsp-16-u16}[sb] */
47468 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47469 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc4930000 }
47471 /* indexbs.w ${Dsp-16-s8}[fb] */
47474 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47475 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc2d300 }
47477 /* indexbs.w ${Dsp-16-s16}[fb] */
47480 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47481 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc4d30000 }
47483 /* indexbs.w ${Dsp-16-u16} */
47486 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47487 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc6d30000 }
47489 /* indexbs.w ${Dsp-16-u24} */
47492 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47493 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc6930000 }
47495 /* indexbs.b $Dst32RnUnprefixedQI */
47498 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47499 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc803 }
47501 /* indexbs.b $Dst32AnUnprefixedQI */
47504 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47505 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc083 }
47507 /* indexbs.b [$Dst32AnUnprefixed] */
47510 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47511 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc003 }
47513 /* indexbs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47516 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47517 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20300 }
47519 /* indexbs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47522 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47523 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4030000 }
47525 /* indexbs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47528 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47529 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6030000 }
47531 /* indexbs.b ${Dsp-16-u8}[sb] */
47534 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47535 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28300 }
47537 /* indexbs.b ${Dsp-16-u16}[sb] */
47540 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47541 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4830000 }
47543 /* indexbs.b ${Dsp-16-s8}[fb] */
47546 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47547 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c300 }
47549 /* indexbs.b ${Dsp-16-s16}[fb] */
47552 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47553 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c30000 }
47555 /* indexbs.b ${Dsp-16-u16} */
47558 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47559 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c30000 }
47561 /* indexbs.b ${Dsp-16-u24} */
47564 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47565 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6830000 }
47567 /* indexbd.w $Dst32RnUnprefixedHI */
47570 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47571 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa813 }
47573 /* indexbd.w $Dst32AnUnprefixedHI */
47576 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47577 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa093 }
47579 /* indexbd.w [$Dst32AnUnprefixed] */
47582 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47583 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa013 }
47585 /* indexbd.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47588 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47589 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa21300 }
47591 /* indexbd.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47594 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47595 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa4130000 }
47597 /* indexbd.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47600 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47601 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa6130000 }
47603 /* indexbd.w ${Dsp-16-u8}[sb] */
47606 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47607 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa29300 }
47609 /* indexbd.w ${Dsp-16-u16}[sb] */
47612 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47613 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa4930000 }
47615 /* indexbd.w ${Dsp-16-s8}[fb] */
47618 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47619 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa2d300 }
47621 /* indexbd.w ${Dsp-16-s16}[fb] */
47624 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47625 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa4d30000 }
47627 /* indexbd.w ${Dsp-16-u16} */
47630 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47631 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa6d30000 }
47633 /* indexbd.w ${Dsp-16-u24} */
47636 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47637 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa6930000 }
47639 /* indexbd.b $Dst32RnUnprefixedQI */
47642 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47643 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa803 }
47645 /* indexbd.b $Dst32AnUnprefixedQI */
47648 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47649 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa083 }
47651 /* indexbd.b [$Dst32AnUnprefixed] */
47654 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47655 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa003 }
47657 /* indexbd.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47660 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47661 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20300 }
47663 /* indexbd.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47666 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47667 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa4030000 }
47669 /* indexbd.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47672 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47673 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa6030000 }
47675 /* indexbd.b ${Dsp-16-u8}[sb] */
47678 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47679 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28300 }
47681 /* indexbd.b ${Dsp-16-u16}[sb] */
47684 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47685 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa4830000 }
47687 /* indexbd.b ${Dsp-16-s8}[fb] */
47690 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47691 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2c300 }
47693 /* indexbd.b ${Dsp-16-s16}[fb] */
47696 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47697 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4c30000 }
47699 /* indexbd.b ${Dsp-16-u16} */
47702 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47703 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6c30000 }
47705 /* indexbd.b ${Dsp-16-u24} */
47708 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47709 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa6830000 }
47711 /* indexb.w $Dst32RnUnprefixedHI */
47714 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47715 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x8813 }
47717 /* indexb.w $Dst32AnUnprefixedHI */
47720 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47721 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x8093 }
47723 /* indexb.w [$Dst32AnUnprefixed] */
47726 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47727 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x8013 }
47729 /* indexb.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47732 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47733 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x821300 }
47735 /* indexb.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47738 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47739 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x84130000 }
47741 /* indexb.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47744 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47745 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x86130000 }
47747 /* indexb.w ${Dsp-16-u8}[sb] */
47750 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47751 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x829300 }
47753 /* indexb.w ${Dsp-16-u16}[sb] */
47756 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47757 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x84930000 }
47759 /* indexb.w ${Dsp-16-s8}[fb] */
47762 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47763 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x82d300 }
47765 /* indexb.w ${Dsp-16-s16}[fb] */
47768 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47769 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x84d30000 }
47771 /* indexb.w ${Dsp-16-u16} */
47774 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47775 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x86d30000 }
47777 /* indexb.w ${Dsp-16-u24} */
47780 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47781 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x86930000 }
47783 /* indexb.b $Dst32RnUnprefixedQI */
47786 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47787 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x8803 }
47789 /* indexb.b $Dst32AnUnprefixedQI */
47792 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47793 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x8083 }
47795 /* indexb.b [$Dst32AnUnprefixed] */
47798 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47799 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x8003 }
47801 /* indexb.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47804 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47805 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820300 }
47807 /* indexb.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47810 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47811 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84030000 }
47813 /* indexb.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47816 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47817 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86030000 }
47819 /* indexb.b ${Dsp-16-u8}[sb] */
47822 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47823 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828300 }
47825 /* indexb.b ${Dsp-16-u16}[sb] */
47828 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47829 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84830000 }
47831 /* indexb.b ${Dsp-16-s8}[fb] */
47834 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47835 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c300 }
47837 /* indexb.b ${Dsp-16-s16}[fb] */
47840 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47841 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c30000 }
47843 /* indexb.b ${Dsp-16-u16} */
47846 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47847 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c30000 }
47849 /* indexb.b ${Dsp-16-u24} */
47852 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47853 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x86830000 }
47855 /* inc.w $Dst32RnUnprefixedHI */
47858 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
47859 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa90e }
47861 /* inc.w $Dst32AnUnprefixedHI */
47864 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
47865 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa18e }
47867 /* inc.w [$Dst32AnUnprefixed] */
47870 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47871 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa10e }
47873 /* inc.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47876 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47877 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa30e00 }
47879 /* inc.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47882 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47883 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa50e0000 }
47885 /* inc.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47888 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47889 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa70e0000 }
47891 /* inc.w ${Dsp-16-u8}[sb] */
47894 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47895 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa38e00 }
47897 /* inc.w ${Dsp-16-u16}[sb] */
47900 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47901 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa58e0000 }
47903 /* inc.w ${Dsp-16-s8}[fb] */
47906 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47907 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3ce00 }
47909 /* inc.w ${Dsp-16-s16}[fb] */
47912 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47913 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5ce0000 }
47915 /* inc.w ${Dsp-16-u16} */
47918 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47919 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7ce0000 }
47921 /* inc.w ${Dsp-16-u24} */
47924 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47925 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa78e0000 }
47927 /* inc.b $Dst32RnUnprefixedQI */
47930 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
47931 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa80e }
47933 /* inc.b $Dst32AnUnprefixedQI */
47936 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
47937 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa08e }
47939 /* inc.b [$Dst32AnUnprefixed] */
47942 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47943 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa00e }
47945 /* inc.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
47948 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47949 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa20e00 }
47951 /* inc.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
47954 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47955 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa40e0000 }
47957 /* inc.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
47960 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
47961 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa60e0000 }
47963 /* inc.b ${Dsp-16-u8}[sb] */
47966 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
47967 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa28e00 }
47969 /* inc.b ${Dsp-16-u16}[sb] */
47972 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
47973 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa48e0000 }
47975 /* inc.b ${Dsp-16-s8}[fb] */
47978 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
47979 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2ce00 }
47981 /* inc.b ${Dsp-16-s16}[fb] */
47984 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
47985 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4ce0000 }
47987 /* inc.b ${Dsp-16-u16} */
47990 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
47991 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6ce0000 }
47993 /* inc.b ${Dsp-16-u24} */
47996 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
47997 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa68e0000 }
48002 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
48003 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xa4 }
48008 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
48009 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xa3 }
48011 /* inc.b ${Dsp-8-u8}[sb] */
48014 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48015 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xa500 }
48017 /* inc.b ${Dsp-8-s8}[fb] */
48020 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48021 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xa600 }
48023 /* inc.b ${Dsp-8-u16} */
48026 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
48027 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xa70000 }
48029 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48033 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990000 }
48035 /* sub.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
48038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48039 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992000 }
48041 /* sub.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
48044 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48045 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993000 }
48047 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48051 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918000 }
48053 /* sub.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
48056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48057 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a000 }
48059 /* sub.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
48062 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48063 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b000 }
48065 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48069 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910000 }
48071 /* sub.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
48074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48075 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912000 }
48077 /* sub.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
48080 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48081 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913000 }
48083 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48087 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93000000 }
48089 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48093 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93200000 }
48095 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
48098 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48099 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93300000 }
48101 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48105 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95000000 }
48107 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48111 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95200000 }
48113 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
48116 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48117 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95300000 }
48119 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48123 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97000000 }
48125 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48129 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97200000 }
48131 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
48134 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48135 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97300000 }
48137 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
48140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48141 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93800000 }
48143 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
48146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48147 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a00000 }
48149 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
48152 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
48153 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b00000 }
48155 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
48158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48159 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95800000 }
48161 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
48164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48165 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a00000 }
48167 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
48170 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
48171 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b00000 }
48173 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
48176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48177 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c00000 }
48179 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
48182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48183 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e00000 }
48185 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
48188 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
48189 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f00000 }
48191 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
48194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48195 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c00000 }
48197 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
48200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48201 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e00000 }
48203 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
48206 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
48207 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f00000 }
48209 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
48212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
48213 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c00000 }
48215 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
48218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
48219 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e00000 }
48221 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
48224 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
48225 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f00000 }
48227 /* sub.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
48230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
48231 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97800000 }
48233 /* sub.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
48236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
48237 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a00000 }
48239 /* sub.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
48242 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
48243 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b00000 }
48245 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48249 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9000000 }
48251 /* sub.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
48254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48255 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9200000 }
48257 /* sub.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
48260 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48261 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9300000 }
48263 /* sub.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
48266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48267 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9300000 }
48269 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48273 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1800000 }
48275 /* sub.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
48278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48279 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a00000 }
48281 /* sub.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
48284 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48285 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b00000 }
48287 /* sub.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
48290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48291 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b00000 }
48293 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48297 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1000000 }
48299 /* sub.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
48302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48303 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1200000 }
48305 /* sub.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
48308 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48309 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1300000 }
48311 /* sub.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
48314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48315 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1300000 }
48317 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48321 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3000000 }
48323 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48327 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3200000 }
48329 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
48332 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48333 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3300000 }
48335 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
48338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48339 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3300000 }
48341 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48345 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5000000 }
48347 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48351 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5200000 }
48353 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
48356 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48357 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5300000 }
48359 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
48362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48363 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5300000 }
48365 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48369 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7000000 }
48371 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48375 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7200000 }
48377 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
48380 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48381 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7300000 }
48383 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
48386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48387 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7300000 }
48389 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
48392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48393 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3800000 }
48395 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
48398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48399 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a00000 }
48401 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
48404 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48405 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b00000 }
48407 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
48410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
48411 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b00000 }
48413 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
48416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48417 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5800000 }
48419 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
48422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48423 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a00000 }
48425 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
48428 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48429 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b00000 }
48431 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
48434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
48435 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b00000 }
48437 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
48440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48441 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c00000 }
48443 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
48446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48447 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e00000 }
48449 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
48452 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48453 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f00000 }
48455 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
48458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
48459 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f00000 }
48461 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
48464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48465 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c00000 }
48467 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
48470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48471 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e00000 }
48473 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
48476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48477 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f00000 }
48479 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
48482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
48483 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f00000 }
48485 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
48488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
48489 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c00000 }
48491 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
48494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
48495 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e00000 }
48497 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
48500 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
48501 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f00000 }
48503 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
48506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
48507 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f00000 }
48509 /* sub.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
48512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
48513 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7800000 }
48515 /* sub.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
48518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
48519 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a00000 }
48521 /* sub.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
48524 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
48525 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b00000 }
48527 /* sub.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
48530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
48531 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b00000 }
48533 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48537 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9000000 }
48539 /* sub.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
48542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48543 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9200000 }
48545 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48549 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1800000 }
48551 /* sub.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
48554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48555 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a00000 }
48557 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48561 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1000000 }
48563 /* sub.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
48566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48567 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1200000 }
48569 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
48572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48573 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3000000 }
48575 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
48578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48579 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3200000 }
48581 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
48584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48585 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5000000 }
48587 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
48590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48591 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5200000 }
48593 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
48596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48597 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7000000 }
48599 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
48602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48603 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7200000 }
48605 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
48608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
48609 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3800000 }
48611 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
48614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
48615 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a00000 }
48617 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
48620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
48621 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5800000 }
48623 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
48626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
48627 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a00000 }
48629 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
48632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
48633 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c00000 }
48635 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
48638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
48639 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e00000 }
48641 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
48644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
48645 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c00000 }
48647 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
48650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
48651 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e00000 }
48653 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
48656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
48657 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c00000 }
48659 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
48662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
48663 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e00000 }
48665 /* sub.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
48668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
48669 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7800000 }
48671 /* sub.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
48674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
48675 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a00000 }
48677 /* sub.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
48680 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48681 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc900 }
48683 /* sub.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
48686 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48687 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8920 }
48689 /* sub.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
48692 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48693 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8900 }
48695 /* sub.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
48698 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48699 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc180 }
48701 /* sub.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
48704 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48705 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a0 }
48707 /* sub.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
48710 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48711 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8180 }
48713 /* sub.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
48716 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48717 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc100 }
48719 /* sub.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
48722 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48723 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8120 }
48725 /* sub.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
48728 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48729 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8100 }
48731 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
48734 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48735 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30000 }
48737 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
48740 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48741 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832000 }
48743 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
48746 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48747 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830000 }
48749 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
48752 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48753 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5000000 }
48755 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
48758 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48759 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85200000 }
48761 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
48764 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48765 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85000000 }
48767 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
48770 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48771 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7000000 }
48773 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
48776 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48777 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87200000 }
48779 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
48782 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48783 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87000000 }
48785 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
48788 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48789 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38000 }
48791 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
48794 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48795 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a000 }
48797 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
48800 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48801 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838000 }
48803 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
48806 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48807 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5800000 }
48809 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
48812 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48813 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a00000 }
48815 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
48818 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48819 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85800000 }
48821 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
48824 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48825 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c000 }
48827 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
48830 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48831 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e000 }
48833 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
48836 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48837 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c000 }
48839 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
48842 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48843 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c00000 }
48845 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
48848 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48849 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e00000 }
48851 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
48854 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48855 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c00000 }
48857 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
48860 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
48861 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c00000 }
48863 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
48866 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
48867 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e00000 }
48869 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
48872 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
48873 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c00000 }
48875 /* sub.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
48878 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
48879 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7800000 }
48881 /* sub.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
48884 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
48885 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a00000 }
48887 /* sub.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
48890 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
48891 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87800000 }
48893 /* sub.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
48896 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48897 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x2f000000 }
48899 /* sub.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
48902 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48903 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x3f000000 }
48905 /* sub.w${S} #${Imm-24-HI},${Dsp-8-u16} */
48908 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
48909 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x1f000000 }
48911 /* sub.w${S} #${Imm-8-HI},r0 */
48914 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
48915 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0xf0000 }
48917 /* sub.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
48920 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
48921 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x2e0000 }
48923 /* sub.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
48926 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
48927 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x3e0000 }
48929 /* sub.b${S} #${Imm-24-QI},${Dsp-8-u16} */
48932 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
48933 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x1e000000 }
48935 /* sub.b${S} #${Imm-8-QI},r0l */
48938 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
48939 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0xe00 }
48941 /* sub.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
48944 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
48945 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x98310000 }
48947 /* sub.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
48950 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
48951 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x90b10000 }
48953 /* sub.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
48956 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48957 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x90310000 }
48959 /* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
48962 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48963 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x92310000 }
48965 /* sub.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
48968 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
48969 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x92b10000 }
48971 /* sub.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
48974 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
48975 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x92f10000 }
48977 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
48980 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
48981 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x94310000 }
48983 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
48986 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
48987 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x94b10000 }
48989 /* sub.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
48992 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
48993 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x94f10000 }
48995 /* sub.l${G} #${Imm-32-SI},${Dsp-16-u16} */
48998 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
48999 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x96f10000 }
49001 /* sub.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
49004 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49005 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x96310000 }
49007 /* sub.l${G} #${Imm-40-SI},${Dsp-16-u24} */
49010 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
49011 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x96b10000 }
49013 /* sub.b${S} ${SrcDst16-r0l-r0h-S-normal} */
49016 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
49017 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x28 }
49019 /* sub.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
49022 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
49023 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x2900 }
49025 /* sub.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
49028 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
49029 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x2a00 }
49031 /* sub.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
49034 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
49035 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x2b0000 }
49037 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49041 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990a00 }
49043 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
49046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49047 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992a00 }
49049 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
49052 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49053 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993a00 }
49055 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49058 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49059 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918a00 }
49061 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
49064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49065 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91aa00 }
49067 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
49070 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49071 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ba00 }
49073 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49076 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49077 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910a00 }
49079 /* sub.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
49082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49083 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912a00 }
49085 /* sub.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
49088 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49089 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913a00 }
49091 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49095 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930a0000 }
49097 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49101 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932a0000 }
49103 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49106 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49107 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933a0000 }
49109 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49113 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950a0000 }
49115 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49119 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952a0000 }
49121 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49124 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49125 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953a0000 }
49127 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49131 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970a0000 }
49133 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49137 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972a0000 }
49139 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49142 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49143 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973a0000 }
49145 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
49148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49149 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938a0000 }
49151 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
49154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49155 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93aa0000 }
49157 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
49160 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
49161 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ba0000 }
49163 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
49166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49167 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958a0000 }
49169 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
49172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49173 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95aa0000 }
49175 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
49178 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
49179 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ba0000 }
49181 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
49184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49185 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ca0000 }
49187 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
49190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49191 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ea0000 }
49193 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
49196 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
49197 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fa0000 }
49199 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
49202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49203 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ca0000 }
49205 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
49208 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49209 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ea0000 }
49211 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
49214 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
49215 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fa0000 }
49217 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
49220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
49221 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ca0000 }
49223 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
49226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
49227 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ea0000 }
49229 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
49232 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
49233 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fa0000 }
49235 /* sub.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
49238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
49239 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978a0000 }
49241 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
49244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
49245 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97aa0000 }
49247 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
49250 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
49251 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ba0000 }
49253 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49257 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90a0000 }
49259 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
49262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49263 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92a0000 }
49265 /* sub.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
49268 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49269 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93a0000 }
49271 /* sub.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
49274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49275 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93a0000 }
49277 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49281 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18a0000 }
49283 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
49286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49287 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1aa0000 }
49289 /* sub.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
49292 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49293 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ba0000 }
49295 /* sub.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
49298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49299 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ba0000 }
49301 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49305 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10a0000 }
49307 /* sub.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
49310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49311 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12a0000 }
49313 /* sub.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
49316 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49317 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13a0000 }
49319 /* sub.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
49322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49323 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13a0000 }
49325 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49329 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30a0000 }
49331 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49335 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32a0000 }
49337 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
49340 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49341 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33a0000 }
49343 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
49346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49347 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33a0000 }
49349 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49353 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50a0000 }
49355 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49359 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52a0000 }
49361 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
49364 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49365 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53a0000 }
49367 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
49370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49371 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53a0000 }
49373 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49377 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70a0000 }
49379 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49383 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72a0000 }
49385 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
49388 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49389 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73a0000 }
49391 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
49394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49395 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73a0000 }
49397 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
49400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49401 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38a0000 }
49403 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
49406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49407 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3aa0000 }
49409 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
49412 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49413 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ba0000 }
49415 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
49418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
49419 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3ba0000 }
49421 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
49424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49425 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58a0000 }
49427 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
49430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49431 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5aa0000 }
49433 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
49436 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49437 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ba0000 }
49439 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
49442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
49443 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5ba0000 }
49445 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
49448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49449 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ca0000 }
49451 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
49454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49455 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ea0000 }
49457 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
49460 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49461 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fa0000 }
49463 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
49466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
49467 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fa0000 }
49469 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
49472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49473 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ca0000 }
49475 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
49478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49479 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ea0000 }
49481 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
49484 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49485 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fa0000 }
49487 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
49490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
49491 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fa0000 }
49493 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
49496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
49497 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ca0000 }
49499 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
49502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
49503 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ea0000 }
49505 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
49508 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
49509 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fa0000 }
49511 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
49514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
49515 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fa0000 }
49517 /* sub.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
49520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
49521 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78a0000 }
49523 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
49526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
49527 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7aa0000 }
49529 /* sub.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
49532 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
49533 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ba0000 }
49535 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
49538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
49539 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7ba0000 }
49541 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49545 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90a0000 }
49547 /* sub.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
49550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49551 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92a0000 }
49553 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49557 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18a0000 }
49559 /* sub.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
49562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49563 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1aa0000 }
49565 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49569 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10a0000 }
49571 /* sub.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
49574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49575 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12a0000 }
49577 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
49580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49581 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30a0000 }
49583 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
49586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49587 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32a0000 }
49589 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
49592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49593 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50a0000 }
49595 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
49598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49599 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52a0000 }
49601 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
49604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49605 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70a0000 }
49607 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
49610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49611 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72a0000 }
49613 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
49616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
49617 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38a0000 }
49619 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
49622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
49623 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3aa0000 }
49625 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
49628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
49629 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58a0000 }
49631 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
49634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
49635 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5aa0000 }
49637 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
49640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
49641 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ca0000 }
49643 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
49646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
49647 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ea0000 }
49649 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
49652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
49653 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ca0000 }
49655 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
49658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
49659 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ea0000 }
49661 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
49664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
49665 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ca0000 }
49667 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
49670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
49671 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ea0000 }
49673 /* sub.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
49676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
49677 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78a0000 }
49679 /* sub.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
49682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
49683 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7aa0000 }
49685 /* sub.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
49688 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49689 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90a }
49691 /* sub.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
49694 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49695 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892a }
49697 /* sub.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
49700 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
49701 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890a }
49703 /* sub.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
49706 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49707 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18a }
49709 /* sub.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
49712 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49713 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81aa }
49715 /* sub.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
49718 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
49719 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818a }
49721 /* sub.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
49724 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49725 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10a }
49727 /* sub.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
49730 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49731 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812a }
49733 /* sub.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49736 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49737 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810a }
49739 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
49742 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49743 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30a00 }
49745 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
49748 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49749 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832a00 }
49751 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
49754 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49755 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830a00 }
49757 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
49760 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49761 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50a0000 }
49763 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
49766 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49767 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852a0000 }
49769 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
49772 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49773 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850a0000 }
49775 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
49778 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49779 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70a0000 }
49781 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
49784 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49785 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872a0000 }
49787 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
49790 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49791 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870a0000 }
49793 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
49796 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49797 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38a00 }
49799 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
49802 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49803 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83aa00 }
49805 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
49808 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
49809 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838a00 }
49811 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
49814 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49815 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58a0000 }
49817 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
49820 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49821 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85aa0000 }
49823 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
49826 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
49827 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858a0000 }
49829 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
49832 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49833 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ca00 }
49835 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
49838 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49839 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ea00 }
49841 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
49844 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
49845 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ca00 }
49847 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
49850 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49851 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ca0000 }
49853 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
49856 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49857 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ea0000 }
49859 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
49862 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
49863 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ca0000 }
49865 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
49868 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
49869 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ca0000 }
49871 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
49874 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
49875 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ea0000 }
49877 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
49880 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
49881 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ca0000 }
49883 /* sub.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
49886 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
49887 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78a0000 }
49889 /* sub.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
49892 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
49893 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87aa0000 }
49895 /* sub.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
49898 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
49899 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878a0000 }
49901 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
49904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49905 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980a00 }
49907 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
49910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49911 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982a00 }
49913 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
49916 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
49917 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983a00 }
49919 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
49922 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49923 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908a00 }
49925 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
49928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49929 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90aa00 }
49931 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
49934 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
49935 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ba00 }
49937 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
49940 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49941 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900a00 }
49943 /* sub.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
49946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49947 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902a00 }
49949 /* sub.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
49952 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49953 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903a00 }
49955 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49959 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920a0000 }
49961 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49965 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922a0000 }
49967 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
49970 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49971 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923a0000 }
49973 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49977 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940a0000 }
49979 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49983 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942a0000 }
49985 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
49988 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49989 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943a0000 }
49991 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
49994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
49995 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960a0000 }
49997 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
50000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50001 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962a0000 }
50003 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
50006 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50007 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963a0000 }
50009 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
50012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50013 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928a0000 }
50015 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
50018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50019 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92aa0000 }
50021 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
50024 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50025 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ba0000 }
50027 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
50030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50031 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948a0000 }
50033 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
50036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50037 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94aa0000 }
50039 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
50042 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50043 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ba0000 }
50045 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
50048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50049 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ca0000 }
50051 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
50054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50055 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ea0000 }
50057 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
50060 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50061 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fa0000 }
50063 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
50066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50067 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ca0000 }
50069 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
50072 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50073 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ea0000 }
50075 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
50078 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
50079 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fa0000 }
50081 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
50084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
50085 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ca0000 }
50087 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
50090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50091 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ea0000 }
50093 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
50096 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50097 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fa0000 }
50099 /* sub.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
50102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
50103 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968a0000 }
50105 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
50108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
50109 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96aa0000 }
50111 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
50114 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
50115 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ba0000 }
50117 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50121 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80a0000 }
50123 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
50126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50127 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82a0000 }
50129 /* sub.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
50132 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50133 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83a0000 }
50135 /* sub.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
50138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50139 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83a0000 }
50141 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50145 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08a0000 }
50147 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
50150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50151 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0aa0000 }
50153 /* sub.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
50156 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50157 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ba0000 }
50159 /* sub.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
50162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50163 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ba0000 }
50165 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50169 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00a0000 }
50171 /* sub.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
50174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50175 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02a0000 }
50177 /* sub.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
50180 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50181 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03a0000 }
50183 /* sub.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
50186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50187 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03a0000 }
50189 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50193 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20a0000 }
50195 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50199 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22a0000 }
50201 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
50204 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50205 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23a0000 }
50207 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
50210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50211 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23a0000 }
50213 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50217 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40a0000 }
50219 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50223 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42a0000 }
50225 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
50228 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50229 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43a0000 }
50231 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
50234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50235 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43a0000 }
50237 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50241 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60a0000 }
50243 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50247 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62a0000 }
50249 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
50252 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50253 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63a0000 }
50255 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
50258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50259 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63a0000 }
50261 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
50264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50265 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28a0000 }
50267 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
50270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50271 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2aa0000 }
50273 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
50276 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50277 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ba0000 }
50279 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
50282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
50283 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2ba0000 }
50285 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
50288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50289 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48a0000 }
50291 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
50294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50295 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4aa0000 }
50297 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
50300 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50301 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ba0000 }
50303 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
50306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
50307 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4ba0000 }
50309 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
50312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50313 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ca0000 }
50315 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
50318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50319 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ea0000 }
50321 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
50324 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50325 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fa0000 }
50327 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
50330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
50331 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fa0000 }
50333 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
50336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50337 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ca0000 }
50339 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
50342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50343 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ea0000 }
50345 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
50348 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50349 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fa0000 }
50351 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
50354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
50355 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fa0000 }
50357 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
50360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
50361 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ca0000 }
50363 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
50366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
50367 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ea0000 }
50369 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
50372 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
50373 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fa0000 }
50375 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
50378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
50379 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fa0000 }
50381 /* sub.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
50384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
50385 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68a0000 }
50387 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
50390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
50391 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6aa0000 }
50393 /* sub.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
50396 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
50397 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ba0000 }
50399 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
50402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
50403 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6ba0000 }
50405 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50409 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80a0000 }
50411 /* sub.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
50414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50415 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82a0000 }
50417 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50421 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08a0000 }
50423 /* sub.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
50426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50427 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0aa0000 }
50429 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50433 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00a0000 }
50435 /* sub.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
50438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50439 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02a0000 }
50441 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
50444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50445 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20a0000 }
50447 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
50450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50451 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22a0000 }
50453 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
50456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50457 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40a0000 }
50459 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
50462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50463 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42a0000 }
50465 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
50468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50469 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60a0000 }
50471 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
50474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50475 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62a0000 }
50477 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
50480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
50481 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28a0000 }
50483 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
50486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
50487 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2aa0000 }
50489 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
50492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
50493 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48a0000 }
50495 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
50498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
50499 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4aa0000 }
50501 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
50504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
50505 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ca0000 }
50507 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
50510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
50511 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ea0000 }
50513 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
50516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
50517 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ca0000 }
50519 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
50522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
50523 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ea0000 }
50525 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
50528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
50529 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ca0000 }
50531 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
50534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
50535 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ea0000 }
50537 /* sub.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
50540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
50541 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68a0000 }
50543 /* sub.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
50546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
50547 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6aa0000 }
50549 /* sub.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
50552 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50553 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80a }
50555 /* sub.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
50558 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50559 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882a }
50561 /* sub.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
50564 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
50565 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880a }
50567 /* sub.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
50570 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50571 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08a }
50573 /* sub.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
50576 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50577 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80aa }
50579 /* sub.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
50582 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
50583 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808a }
50585 /* sub.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
50588 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50589 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00a }
50591 /* sub.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
50594 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50595 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802a }
50597 /* sub.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
50600 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50601 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800a }
50603 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
50606 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50607 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20a00 }
50609 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
50612 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50613 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822a00 }
50615 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
50618 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50619 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820a00 }
50621 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
50624 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50625 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40a0000 }
50627 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
50630 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50631 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842a0000 }
50633 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
50636 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50637 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840a0000 }
50639 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
50642 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50643 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60a0000 }
50645 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
50648 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50649 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862a0000 }
50651 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
50654 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
50655 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860a0000 }
50657 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
50660 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50661 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28a00 }
50663 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
50666 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50667 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82aa00 }
50669 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
50672 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
50673 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828a00 }
50675 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
50678 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50679 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48a0000 }
50681 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
50684 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50685 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84aa0000 }
50687 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
50690 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
50691 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848a0000 }
50693 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
50696 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50697 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ca00 }
50699 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
50702 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50703 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ea00 }
50705 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
50708 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
50709 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ca00 }
50711 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
50714 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50715 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ca0000 }
50717 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
50720 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50721 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ea0000 }
50723 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
50726 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
50727 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ca0000 }
50729 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
50732 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
50733 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ca0000 }
50735 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
50738 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
50739 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ea0000 }
50741 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
50744 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
50745 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ca0000 }
50747 /* sub.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
50750 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
50751 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68a0000 }
50753 /* sub.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
50756 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
50757 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86aa0000 }
50759 /* sub.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
50762 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
50763 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868a0000 }
50765 /* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
50768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
50769 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xa98000 }
50771 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
50774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50775 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa9a000 }
50777 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
50780 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50781 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xa9b000 }
50783 /* sub.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
50786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
50787 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xa98400 }
50789 /* sub.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
50792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50793 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xa9a400 }
50795 /* sub.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
50798 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50799 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xa9b400 }
50801 /* sub.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
50804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
50805 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xa98600 }
50807 /* sub.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
50810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50811 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xa9a600 }
50813 /* sub.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
50816 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50817 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xa9b600 }
50819 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
50822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50823 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9880000 }
50825 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
50828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50829 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9a80000 }
50831 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
50834 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
50835 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa9b80000 }
50837 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
50840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50841 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xa98c0000 }
50843 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
50846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50847 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa9ac0000 }
50849 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
50852 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
50853 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa9bc0000 }
50855 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
50858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50859 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa98a0000 }
50861 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
50864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50865 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa9aa0000 }
50867 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
50870 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
50871 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa9ba0000 }
50873 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
50876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50877 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa98e0000 }
50879 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
50882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50883 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa9ae0000 }
50885 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
50888 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
50889 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa9be0000 }
50891 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
50894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50895 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa98b0000 }
50897 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
50900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50901 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa9ab0000 }
50903 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
50906 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
50907 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa9bb0000 }
50909 /* sub.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
50912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
50913 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xa98f0000 }
50915 /* sub.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
50918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50919 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xa9af0000 }
50921 /* sub.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
50924 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
50925 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xa9bf0000 }
50927 /* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
50930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
50931 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xa9c00000 }
50933 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
50936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
50937 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa9e00000 }
50939 /* sub.w${G} ${Dsp-16-u16},$Dst16RnHI */
50942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
50943 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xa9f00000 }
50945 /* sub.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
50948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
50949 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xa9c40000 }
50951 /* sub.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
50954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
50955 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xa9e40000 }
50957 /* sub.w${G} ${Dsp-16-u16},$Dst16AnHI */
50960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
50961 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xa9f40000 }
50963 /* sub.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
50966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
50967 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xa9c60000 }
50969 /* sub.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
50972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
50973 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xa9e60000 }
50975 /* sub.w${G} ${Dsp-16-u16},[$Dst16An] */
50978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
50979 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xa9f60000 }
50981 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
50984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50985 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xa9c80000 }
50987 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
50990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50991 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xa9e80000 }
50993 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
50996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
50997 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xa9f80000 }
50999 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
51002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51003 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xa9cc0000 }
51005 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
51008 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51009 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xa9ec0000 }
51011 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
51014 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51015 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xa9fc0000 }
51017 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
51020 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51021 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa9ca0000 }
51023 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
51026 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51027 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa9ea0000 }
51029 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
51032 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51033 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xa9fa0000 }
51035 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
51038 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51039 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa9ce0000 }
51041 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
51044 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51045 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa9ee0000 }
51047 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
51050 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51051 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xa9fe0000 }
51053 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
51056 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51057 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa9cb0000 }
51059 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
51062 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51063 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa9eb0000 }
51065 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
51068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51069 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xa9fb0000 }
51071 /* sub.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
51074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
51075 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xa9cf0000 }
51077 /* sub.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
51080 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
51081 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xa9ef0000 }
51083 /* sub.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
51086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
51087 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xa9ff0000 }
51089 /* sub.w${G} $Src16RnHI,$Dst16RnHI */
51092 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
51093 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xa900 }
51095 /* sub.w${G} $Src16AnHI,$Dst16RnHI */
51098 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
51099 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xa940 }
51101 /* sub.w${G} [$Src16An],$Dst16RnHI */
51104 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
51105 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xa960 }
51107 /* sub.w${G} $Src16RnHI,$Dst16AnHI */
51110 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
51111 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xa904 }
51113 /* sub.w${G} $Src16AnHI,$Dst16AnHI */
51116 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
51117 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xa944 }
51119 /* sub.w${G} [$Src16An],$Dst16AnHI */
51122 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
51123 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xa964 }
51125 /* sub.w${G} $Src16RnHI,[$Dst16An] */
51128 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
51129 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xa906 }
51131 /* sub.w${G} $Src16AnHI,[$Dst16An] */
51134 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
51135 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xa946 }
51137 /* sub.w${G} [$Src16An],[$Dst16An] */
51140 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51141 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xa966 }
51143 /* sub.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
51146 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51147 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xa90800 }
51149 /* sub.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
51152 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51153 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xa94800 }
51155 /* sub.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
51158 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51159 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xa96800 }
51161 /* sub.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
51164 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51165 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xa90c0000 }
51167 /* sub.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
51170 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51171 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xa94c0000 }
51173 /* sub.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
51176 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51177 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xa96c0000 }
51179 /* sub.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
51182 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51183 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa90a00 }
51185 /* sub.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
51188 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51189 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa94a00 }
51191 /* sub.w${G} [$Src16An],${Dsp-16-u8}[sb] */
51194 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51195 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xa96a00 }
51197 /* sub.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
51200 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51201 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa90e0000 }
51203 /* sub.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
51206 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51207 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa94e0000 }
51209 /* sub.w${G} [$Src16An],${Dsp-16-u16}[sb] */
51212 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51213 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xa96e0000 }
51215 /* sub.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
51218 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51219 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa90b00 }
51221 /* sub.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
51224 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51225 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa94b00 }
51227 /* sub.w${G} [$Src16An],${Dsp-16-s8}[fb] */
51230 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51231 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xa96b00 }
51233 /* sub.w${G} $Src16RnHI,${Dsp-16-u16} */
51236 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
51237 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xa90f0000 }
51239 /* sub.w${G} $Src16AnHI,${Dsp-16-u16} */
51242 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
51243 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xa94f0000 }
51245 /* sub.w${G} [$Src16An],${Dsp-16-u16} */
51248 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
51249 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xa96f0000 }
51251 /* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
51254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51255 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xa88000 }
51257 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
51260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51261 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa8a000 }
51263 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
51266 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51267 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xa8b000 }
51269 /* sub.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
51272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51273 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xa88400 }
51275 /* sub.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
51278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51279 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xa8a400 }
51281 /* sub.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
51284 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51285 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xa8b400 }
51287 /* sub.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
51290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51291 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xa88600 }
51293 /* sub.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
51296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51297 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xa8a600 }
51299 /* sub.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
51302 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51303 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xa8b600 }
51305 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
51308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51309 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8880000 }
51311 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
51314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51315 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8a80000 }
51317 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
51320 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
51321 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa8b80000 }
51323 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
51326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51327 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xa88c0000 }
51329 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
51332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51333 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa8ac0000 }
51335 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
51338 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
51339 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa8bc0000 }
51341 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
51344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51345 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa88a0000 }
51347 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
51350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51351 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa8aa0000 }
51353 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
51356 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
51357 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa8ba0000 }
51359 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
51362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51363 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa88e0000 }
51365 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
51368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51369 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa8ae0000 }
51371 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
51374 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
51375 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa8be0000 }
51377 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
51380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51381 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa88b0000 }
51383 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
51386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51387 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa8ab0000 }
51389 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
51392 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
51393 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa8bb0000 }
51395 /* sub.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
51398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
51399 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xa88f0000 }
51401 /* sub.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
51404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
51405 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xa8af0000 }
51407 /* sub.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
51410 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
51411 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xa8bf0000 }
51413 /* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
51416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51417 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xa8c00000 }
51419 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
51422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
51423 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa8e00000 }
51425 /* sub.b${G} ${Dsp-16-u16},$Dst16RnQI */
51428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
51429 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xa8f00000 }
51431 /* sub.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
51434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51435 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xa8c40000 }
51437 /* sub.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
51440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
51441 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xa8e40000 }
51443 /* sub.b${G} ${Dsp-16-u16},$Dst16AnQI */
51446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
51447 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xa8f40000 }
51449 /* sub.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
51452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51453 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xa8c60000 }
51455 /* sub.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
51458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
51459 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xa8e60000 }
51461 /* sub.b${G} ${Dsp-16-u16},[$Dst16An] */
51464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
51465 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xa8f60000 }
51467 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
51470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51471 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xa8c80000 }
51473 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
51476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51477 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xa8e80000 }
51479 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
51482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
51483 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xa8f80000 }
51485 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
51488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51489 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xa8cc0000 }
51491 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
51494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51495 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xa8ec0000 }
51497 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
51500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
51501 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xa8fc0000 }
51503 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
51506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51507 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa8ca0000 }
51509 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
51512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51513 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa8ea0000 }
51515 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
51518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
51519 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xa8fa0000 }
51521 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
51524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51525 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa8ce0000 }
51527 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
51530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51531 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa8ee0000 }
51533 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
51536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
51537 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xa8fe0000 }
51539 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
51542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51543 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa8cb0000 }
51545 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
51548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51549 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa8eb0000 }
51551 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
51554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
51555 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xa8fb0000 }
51557 /* sub.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
51560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
51561 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xa8cf0000 }
51563 /* sub.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
51566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
51567 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xa8ef0000 }
51569 /* sub.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
51572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
51573 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xa8ff0000 }
51575 /* sub.b${G} $Src16RnQI,$Dst16RnQI */
51578 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
51579 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xa800 }
51581 /* sub.b${G} $Src16AnQI,$Dst16RnQI */
51584 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
51585 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xa840 }
51587 /* sub.b${G} [$Src16An],$Dst16RnQI */
51590 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
51591 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xa860 }
51593 /* sub.b${G} $Src16RnQI,$Dst16AnQI */
51596 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
51597 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xa804 }
51599 /* sub.b${G} $Src16AnQI,$Dst16AnQI */
51602 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
51603 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xa844 }
51605 /* sub.b${G} [$Src16An],$Dst16AnQI */
51608 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
51609 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xa864 }
51611 /* sub.b${G} $Src16RnQI,[$Dst16An] */
51614 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
51615 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xa806 }
51617 /* sub.b${G} $Src16AnQI,[$Dst16An] */
51620 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
51621 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xa846 }
51623 /* sub.b${G} [$Src16An],[$Dst16An] */
51626 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
51627 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xa866 }
51629 /* sub.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
51632 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51633 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xa80800 }
51635 /* sub.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
51638 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51639 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xa84800 }
51641 /* sub.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
51644 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51645 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xa86800 }
51647 /* sub.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
51650 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51651 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xa80c0000 }
51653 /* sub.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
51656 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51657 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xa84c0000 }
51659 /* sub.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
51662 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51663 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xa86c0000 }
51665 /* sub.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
51668 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51669 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa80a00 }
51671 /* sub.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
51674 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51675 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa84a00 }
51677 /* sub.b${G} [$Src16An],${Dsp-16-u8}[sb] */
51680 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51681 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xa86a00 }
51683 /* sub.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
51686 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51687 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa80e0000 }
51689 /* sub.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
51692 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51693 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa84e0000 }
51695 /* sub.b${G} [$Src16An],${Dsp-16-u16}[sb] */
51698 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51699 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xa86e0000 }
51701 /* sub.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
51704 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51705 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa80b00 }
51707 /* sub.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
51710 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51711 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa84b00 }
51713 /* sub.b${G} [$Src16An],${Dsp-16-s8}[fb] */
51716 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51717 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xa86b00 }
51719 /* sub.b${G} $Src16RnQI,${Dsp-16-u16} */
51722 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
51723 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xa80f0000 }
51725 /* sub.b${G} $Src16AnQI,${Dsp-16-u16} */
51728 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
51729 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xa84f0000 }
51731 /* sub.b${G} [$Src16An],${Dsp-16-u16} */
51734 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
51735 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xa86f0000 }
51737 /* sub.b${S} #${Imm-8-QI},r0l */
51740 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
51741 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x8c00 }
51743 /* sub.b${S} #${Imm-8-QI},r0h */
51746 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
51747 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x8b00 }
51749 /* sub.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
51752 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51753 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x8d0000 }
51755 /* sub.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
51758 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51759 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x8e0000 }
51761 /* sub.b${S} #${Imm-8-QI},${Dsp-16-u16} */
51764 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
51765 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x8f000000 }
51767 /* sub.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
51770 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
51771 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x893e0000 }
51773 /* sub.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
51776 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
51777 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81be0000 }
51779 /* sub.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
51782 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51783 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x813e0000 }
51785 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
51788 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51789 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x833e0000 }
51791 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
51794 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51795 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83be0000 }
51797 /* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
51800 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51801 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83fe0000 }
51803 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
51806 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51807 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x853e0000 }
51809 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
51812 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51813 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85be0000 }
51815 /* sub.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
51818 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
51819 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85fe0000 }
51821 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
51824 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
51825 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87fe0000 }
51827 /* sub.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
51830 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51831 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x873e0000 }
51833 /* sub.w${G} #${Imm-40-HI},${Dsp-16-u24} */
51836 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
51837 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87be0000 }
51839 /* sub.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
51842 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
51843 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x883e00 }
51845 /* sub.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
51848 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
51849 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80be00 }
51851 /* sub.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
51854 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51855 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x803e00 }
51857 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
51860 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51861 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x823e0000 }
51863 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
51866 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51867 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82be0000 }
51869 /* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
51872 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51873 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82fe0000 }
51875 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
51878 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51879 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x843e0000 }
51881 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
51884 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51885 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84be0000 }
51887 /* sub.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
51890 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
51891 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84fe0000 }
51893 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
51896 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
51897 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86fe0000 }
51899 /* sub.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
51902 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
51903 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x863e0000 }
51905 /* sub.b${G} #${Imm-40-QI},${Dsp-16-u24} */
51908 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
51909 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86be0000 }
51911 /* sub.w${G} #${Imm-16-HI},$Dst16RnHI */
51914 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
51915 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77500000 }
51917 /* sub.w${G} #${Imm-16-HI},$Dst16AnHI */
51920 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
51921 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77540000 }
51923 /* sub.w${G} #${Imm-16-HI},[$Dst16An] */
51926 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
51927 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77560000 }
51929 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
51932 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51933 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77580000 }
51935 /* sub.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
51938 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51939 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x775a0000 }
51941 /* sub.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
51944 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51945 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x775b0000 }
51947 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
51950 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
51951 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x775c0000 }
51953 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
51956 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
51957 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x775e0000 }
51959 /* sub.w${G} #${Imm-32-HI},${Dsp-16-u16} */
51962 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
51963 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x775f0000 }
51965 /* sub.b${G} #${Imm-16-QI},$Dst16RnQI */
51968 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
51969 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x765000 }
51971 /* sub.b${G} #${Imm-16-QI},$Dst16AnQI */
51974 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
51975 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x765400 }
51977 /* sub.b${G} #${Imm-16-QI},[$Dst16An] */
51980 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
51981 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x765600 }
51983 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
51986 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
51987 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76580000 }
51989 /* sub.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
51992 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
51993 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x765a0000 }
51995 /* sub.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
51998 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
51999 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x765b0000 }
52001 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
52004 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
52005 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x765c0000 }
52007 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
52010 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
52011 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x765e0000 }
52013 /* sub.b${G} #${Imm-32-QI},${Dsp-16-u16} */
52016 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
52017 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x765f0000 }
52019 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52023 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990200 }
52025 /* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
52028 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52029 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992200 }
52031 /* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
52034 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52035 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993200 }
52037 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52040 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52041 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918200 }
52043 /* dsub.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
52046 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52047 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a200 }
52049 /* dsub.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
52052 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52053 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b200 }
52055 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52058 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52059 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910200 }
52061 /* dsub.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
52064 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52065 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912200 }
52067 /* dsub.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
52070 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52071 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913200 }
52073 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
52076 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52077 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930200 }
52079 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52082 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52083 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932200 }
52085 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52088 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52089 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933200 }
52091 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
52094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52095 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950200 }
52097 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52100 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52101 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952200 }
52103 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52106 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52107 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953200 }
52109 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
52112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52113 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970200 }
52115 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52118 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52119 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972200 }
52121 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52124 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52125 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973200 }
52127 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
52130 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52131 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938200 }
52133 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
52136 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52137 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a200 }
52139 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
52142 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52143 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b200 }
52145 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
52148 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52149 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958200 }
52151 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
52154 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52155 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a200 }
52157 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
52160 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
52161 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b200 }
52163 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
52166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52167 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c200 }
52169 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
52172 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52173 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e200 }
52175 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
52178 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
52179 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f200 }
52181 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
52184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52185 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c200 }
52187 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
52190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52191 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e200 }
52193 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
52196 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
52197 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f200 }
52199 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
52202 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
52203 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c200 }
52205 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
52208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
52209 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e200 }
52211 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
52214 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
52215 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f200 }
52217 /* dsub.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
52220 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
52221 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978200 }
52223 /* dsub.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
52226 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
52227 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a200 }
52229 /* dsub.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
52232 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
52233 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b200 }
52235 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52238 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52239 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90200 }
52241 /* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
52244 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52245 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92200 }
52247 /* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
52250 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52251 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93200 }
52253 /* dsub.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
52256 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52257 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93200 }
52259 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52262 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52263 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18200 }
52265 /* dsub.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
52268 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52269 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a200 }
52271 /* dsub.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
52274 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52275 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b200 }
52277 /* dsub.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
52280 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52281 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b200 }
52283 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52287 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10200 }
52289 /* dsub.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
52292 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52293 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12200 }
52295 /* dsub.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
52298 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52299 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13200 }
52301 /* dsub.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
52304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52305 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13200 }
52307 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
52310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52311 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30200 }
52313 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
52316 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52317 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32200 }
52319 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
52322 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52323 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33200 }
52325 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
52328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52329 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33200 }
52331 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
52334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52335 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50200 }
52337 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
52340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52341 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52200 }
52343 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
52346 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52347 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53200 }
52349 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
52352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52353 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53200 }
52355 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
52358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52359 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70200 }
52361 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
52364 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52365 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72200 }
52367 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
52370 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52371 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73200 }
52373 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
52376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52377 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73200 }
52379 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
52382 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52383 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38200 }
52385 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
52388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52389 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a200 }
52391 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
52394 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52395 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b200 }
52397 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
52400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
52401 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b200 }
52403 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
52406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52407 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58200 }
52409 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
52412 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52413 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a200 }
52415 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
52418 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52419 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b200 }
52421 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
52424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
52425 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b200 }
52427 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
52430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52431 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c200 }
52433 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
52436 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52437 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e200 }
52439 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
52442 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52443 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f200 }
52445 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
52448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
52449 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f200 }
52451 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
52454 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52455 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c200 }
52457 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
52460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52461 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e200 }
52463 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
52466 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52467 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f200 }
52469 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
52472 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
52473 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f200 }
52475 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
52478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
52479 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c200 }
52481 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
52484 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
52485 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e200 }
52487 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
52490 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
52491 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f200 }
52493 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
52496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
52497 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f200 }
52499 /* dsub.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
52502 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
52503 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78200 }
52505 /* dsub.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
52508 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
52509 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a200 }
52511 /* dsub.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
52514 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
52515 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b200 }
52517 /* dsub.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
52520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
52521 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b200 }
52523 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
52526 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52527 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90200 }
52529 /* dsub.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
52532 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52533 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92200 }
52535 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
52538 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52539 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18200 }
52541 /* dsub.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
52544 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52545 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a200 }
52547 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52550 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52551 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10200 }
52553 /* dsub.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
52556 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52557 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12200 }
52559 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
52562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52563 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30200 }
52565 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
52568 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52569 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32200 }
52571 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
52574 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52575 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50200 }
52577 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
52580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52581 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52200 }
52583 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
52586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52587 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70200 }
52589 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
52592 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52593 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72200 }
52595 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
52598 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
52599 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38200 }
52601 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
52604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
52605 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a200 }
52607 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
52610 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
52611 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58200 }
52613 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
52616 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
52617 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a200 }
52619 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
52622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
52623 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c200 }
52625 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
52628 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
52629 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e200 }
52631 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
52634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
52635 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c200 }
52637 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
52640 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
52641 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e200 }
52643 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
52646 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
52647 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c200 }
52649 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
52652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
52653 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e200 }
52655 /* dsub.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
52658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
52659 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78200 }
52661 /* dsub.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
52664 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
52665 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a200 }
52667 /* dsub.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
52670 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52671 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c902 }
52673 /* dsub.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
52676 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
52677 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18922 }
52679 /* dsub.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
52682 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
52683 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18902 }
52685 /* dsub.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
52688 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52689 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c182 }
52691 /* dsub.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
52694 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
52695 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a2 }
52697 /* dsub.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
52700 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
52701 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18182 }
52703 /* dsub.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
52706 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52707 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c102 }
52709 /* dsub.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
52712 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52713 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18122 }
52715 /* dsub.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
52718 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52719 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18102 }
52721 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
52724 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52725 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30200 }
52727 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
52730 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52731 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832200 }
52733 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
52736 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52737 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830200 }
52739 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
52742 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52743 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50200 }
52745 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
52748 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52749 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852200 }
52751 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
52754 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52755 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850200 }
52757 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
52760 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52761 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70200 }
52763 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
52766 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52767 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872200 }
52769 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
52772 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52773 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870200 }
52775 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
52778 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52779 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38200 }
52781 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
52784 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52785 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a200 }
52787 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
52790 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
52791 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838200 }
52793 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
52796 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52797 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58200 }
52799 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
52802 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52803 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a200 }
52805 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
52808 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
52809 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858200 }
52811 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
52814 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52815 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c200 }
52817 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
52820 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52821 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e200 }
52823 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
52826 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
52827 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c200 }
52829 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
52832 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52833 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c200 }
52835 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
52838 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52839 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e200 }
52841 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
52844 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
52845 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c200 }
52847 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
52850 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
52851 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c200 }
52853 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
52856 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
52857 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e200 }
52859 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
52862 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
52863 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c200 }
52865 /* dsub.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
52868 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
52869 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78200 }
52871 /* dsub.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
52874 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
52875 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a200 }
52877 /* dsub.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
52880 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
52881 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878200 }
52883 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
52886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52887 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980200 }
52889 /* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
52892 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52893 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982200 }
52895 /* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
52898 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
52899 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983200 }
52901 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
52904 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52905 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908200 }
52907 /* dsub.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
52910 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52911 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a200 }
52913 /* dsub.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
52916 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
52917 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b200 }
52919 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
52922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52923 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900200 }
52925 /* dsub.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
52928 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52929 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902200 }
52931 /* dsub.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
52934 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
52935 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903200 }
52937 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
52940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52941 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920200 }
52943 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52947 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922200 }
52949 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
52952 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52953 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923200 }
52955 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
52958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52959 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940200 }
52961 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52964 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52965 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942200 }
52967 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
52970 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52971 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943200 }
52973 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
52976 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52977 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960200 }
52979 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52982 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52983 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962200 }
52985 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
52988 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
52989 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963200 }
52991 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
52994 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
52995 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928200 }
52997 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
53000 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
53001 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a200 }
53003 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
53006 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
53007 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b200 }
53009 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
53012 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53013 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948200 }
53015 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
53018 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53019 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a200 }
53021 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
53024 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
53025 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b200 }
53027 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
53030 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53031 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c200 }
53033 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
53036 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53037 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e200 }
53039 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
53042 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
53043 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f200 }
53045 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
53048 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53049 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c200 }
53051 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
53054 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53055 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e200 }
53057 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
53060 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
53061 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f200 }
53063 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
53066 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
53067 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c200 }
53069 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
53072 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
53073 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e200 }
53075 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
53078 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
53079 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f200 }
53081 /* dsub.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
53084 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
53085 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968200 }
53087 /* dsub.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
53090 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
53091 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a200 }
53093 /* dsub.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
53096 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
53097 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b200 }
53099 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
53102 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53103 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80200 }
53105 /* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
53108 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53109 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82200 }
53111 /* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
53114 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53115 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83200 }
53117 /* dsub.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
53120 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53121 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83200 }
53123 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
53126 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53127 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08200 }
53129 /* dsub.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
53132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53133 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a200 }
53135 /* dsub.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
53138 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53139 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b200 }
53141 /* dsub.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
53144 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53145 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b200 }
53147 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53151 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00200 }
53153 /* dsub.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
53156 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53157 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02200 }
53159 /* dsub.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
53162 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53163 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03200 }
53165 /* dsub.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
53168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53169 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03200 }
53171 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
53174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53175 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20200 }
53177 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
53180 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53181 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22200 }
53183 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
53186 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53187 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23200 }
53189 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
53192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53193 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23200 }
53195 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
53198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53199 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40200 }
53201 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
53204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53205 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42200 }
53207 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
53210 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53211 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43200 }
53213 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
53216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53217 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43200 }
53219 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
53222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53223 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60200 }
53225 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
53228 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53229 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62200 }
53231 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
53234 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53235 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63200 }
53237 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
53240 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53241 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63200 }
53243 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
53246 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53247 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28200 }
53249 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
53252 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53253 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a200 }
53255 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
53258 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53259 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b200 }
53261 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
53264 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
53265 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b200 }
53267 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
53270 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53271 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48200 }
53273 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
53276 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53277 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a200 }
53279 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
53282 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53283 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b200 }
53285 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
53288 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
53289 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b200 }
53291 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
53294 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53295 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c200 }
53297 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
53300 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53301 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e200 }
53303 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
53306 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53307 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f200 }
53309 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
53312 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
53313 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f200 }
53315 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
53318 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53319 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c200 }
53321 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
53324 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53325 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e200 }
53327 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
53330 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53331 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f200 }
53333 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
53336 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
53337 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f200 }
53339 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
53342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
53343 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c200 }
53345 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
53348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
53349 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e200 }
53351 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
53354 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
53355 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f200 }
53357 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
53360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
53361 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f200 }
53363 /* dsub.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
53366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
53367 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68200 }
53369 /* dsub.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
53372 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
53373 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a200 }
53375 /* dsub.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
53378 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
53379 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b200 }
53381 /* dsub.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
53384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
53385 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b200 }
53387 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
53390 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53391 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80200 }
53393 /* dsub.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
53396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53397 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82200 }
53399 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
53402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53403 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08200 }
53405 /* dsub.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
53408 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53409 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a200 }
53411 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53415 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00200 }
53417 /* dsub.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
53420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53421 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02200 }
53423 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
53426 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53427 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20200 }
53429 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
53432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53433 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22200 }
53435 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
53438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53439 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40200 }
53441 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
53444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53445 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42200 }
53447 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
53450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53451 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60200 }
53453 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
53456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53457 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62200 }
53459 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
53462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
53463 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28200 }
53465 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
53468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
53469 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a200 }
53471 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
53474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
53475 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48200 }
53477 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
53480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
53481 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a200 }
53483 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
53486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
53487 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c200 }
53489 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
53492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
53493 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e200 }
53495 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
53498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
53499 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c200 }
53501 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
53504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
53505 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e200 }
53507 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
53510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
53511 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c200 }
53513 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
53516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
53517 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e200 }
53519 /* dsub.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
53522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
53523 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68200 }
53525 /* dsub.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
53528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
53529 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a200 }
53531 /* dsub.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
53534 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53535 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c802 }
53537 /* dsub.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
53540 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53541 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18822 }
53543 /* dsub.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
53546 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
53547 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18802 }
53549 /* dsub.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
53552 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53553 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c082 }
53555 /* dsub.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
53558 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53559 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a2 }
53561 /* dsub.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
53564 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
53565 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18082 }
53567 /* dsub.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
53570 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53571 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c002 }
53573 /* dsub.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
53576 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53577 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18022 }
53579 /* dsub.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
53582 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53583 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18002 }
53585 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
53588 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53589 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20200 }
53591 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
53594 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53595 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822200 }
53597 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
53600 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53601 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820200 }
53603 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
53606 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53607 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40200 }
53609 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
53612 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53613 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842200 }
53615 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
53618 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53619 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840200 }
53621 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
53624 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53625 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60200 }
53627 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
53630 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53631 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862200 }
53633 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
53636 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53637 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860200 }
53639 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
53642 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53643 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28200 }
53645 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
53648 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53649 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a200 }
53651 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
53654 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53655 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828200 }
53657 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
53660 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53661 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48200 }
53663 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
53666 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53667 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a200 }
53669 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
53672 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53673 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848200 }
53675 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
53678 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53679 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c200 }
53681 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
53684 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53685 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e200 }
53687 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
53690 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53691 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c200 }
53693 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
53696 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53697 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c200 }
53699 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
53702 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53703 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e200 }
53705 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
53708 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53709 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c200 }
53711 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
53714 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
53715 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c200 }
53717 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
53720 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
53721 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e200 }
53723 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
53726 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
53727 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c200 }
53729 /* dsub.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
53732 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
53733 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68200 }
53735 /* dsub.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
53738 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
53739 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a200 }
53741 /* dsub.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
53744 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
53745 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868200 }
53747 /* dsub.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
53750 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
53751 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1991e00 }
53753 /* dsub.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
53756 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
53757 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1919e00 }
53759 /* dsub.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
53762 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53763 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1911e00 }
53765 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
53768 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53769 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1931e00 }
53771 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
53774 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53775 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1939e00 }
53777 /* dsub.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
53780 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53781 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193de00 }
53783 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
53786 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53787 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1951e00 }
53789 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
53792 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53793 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1959e00 }
53795 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
53798 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53799 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195de00 }
53801 /* dsub.w${X} #${Imm-40-HI},${Dsp-24-u16} */
53804 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
53805 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197de00 }
53807 /* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
53810 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53811 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1971e00 }
53813 /* dsub.w${X} #${Imm-48-HI},${Dsp-24-u24} */
53816 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
53817 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1979e00 }
53819 /* dsub.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
53822 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
53823 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1981e00 }
53825 /* dsub.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
53828 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
53829 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1909e00 }
53831 /* dsub.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
53834 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53835 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1901e00 }
53837 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
53840 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53841 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1921e00 }
53843 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
53846 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
53847 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1929e00 }
53849 /* dsub.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
53852 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
53853 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192de00 }
53855 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
53858 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53859 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1941e00 }
53861 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
53864 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
53865 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1949e00 }
53867 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
53870 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
53871 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194de00 }
53873 /* dsub.b${X} #${Imm-40-QI},${Dsp-24-u16} */
53876 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
53877 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196de00 }
53879 /* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
53882 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53883 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1961e00 }
53885 /* dsub.b${X} #${Imm-48-QI},${Dsp-24-u24} */
53888 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
53889 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1969e00 }
53891 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
53894 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53895 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990a00 }
53897 /* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
53900 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53901 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992a00 }
53903 /* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
53906 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
53907 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993a00 }
53909 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
53912 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53913 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918a00 }
53915 /* dsbb.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
53918 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53919 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191aa00 }
53921 /* dsbb.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
53924 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
53925 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191ba00 }
53927 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
53930 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53931 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910a00 }
53933 /* dsbb.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
53936 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53937 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912a00 }
53939 /* dsbb.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
53942 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
53943 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913a00 }
53945 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
53948 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53949 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930a00 }
53951 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
53954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53955 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932a00 }
53957 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
53960 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53961 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933a00 }
53963 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
53966 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53967 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950a00 }
53969 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
53972 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53973 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952a00 }
53975 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
53978 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53979 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953a00 }
53981 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
53984 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53985 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970a00 }
53987 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
53990 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53991 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972a00 }
53993 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
53996 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
53997 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973a00 }
53999 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
54002 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54003 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938a00 }
54005 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
54008 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54009 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193aa00 }
54011 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
54014 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54015 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193ba00 }
54017 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
54020 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54021 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958a00 }
54023 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
54026 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54027 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195aa00 }
54029 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
54032 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54033 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195ba00 }
54035 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
54038 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54039 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ca00 }
54041 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
54044 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54045 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193ea00 }
54047 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
54050 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54051 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193fa00 }
54053 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
54056 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54057 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ca00 }
54059 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
54062 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54063 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195ea00 }
54065 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
54068 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54069 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195fa00 }
54071 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
54074 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
54075 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ca00 }
54077 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
54080 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54081 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197ea00 }
54083 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
54086 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54087 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197fa00 }
54089 /* dsbb.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
54092 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
54093 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978a00 }
54095 /* dsbb.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
54098 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54099 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197aa00 }
54101 /* dsbb.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
54104 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54105 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197ba00 }
54107 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
54110 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54111 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90a00 }
54113 /* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
54116 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54117 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92a00 }
54119 /* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
54122 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54123 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93a00 }
54125 /* dsbb.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
54128 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54129 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93a00 }
54131 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
54134 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54135 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18a00 }
54137 /* dsbb.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
54140 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54141 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1aa00 }
54143 /* dsbb.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
54146 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54147 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1ba00 }
54149 /* dsbb.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
54152 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54153 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1ba00 }
54155 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54158 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54159 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10a00 }
54161 /* dsbb.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
54164 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54165 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12a00 }
54167 /* dsbb.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
54170 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54171 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13a00 }
54173 /* dsbb.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
54176 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54177 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13a00 }
54179 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
54182 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54183 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30a00 }
54185 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
54188 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54189 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32a00 }
54191 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
54194 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54195 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33a00 }
54197 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
54200 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54201 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33a00 }
54203 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
54206 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54207 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50a00 }
54209 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
54212 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54213 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52a00 }
54215 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
54218 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54219 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53a00 }
54221 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
54224 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54225 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53a00 }
54227 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
54230 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54231 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70a00 }
54233 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
54236 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54237 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72a00 }
54239 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
54242 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54243 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73a00 }
54245 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
54248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54249 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73a00 }
54251 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
54254 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54255 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38a00 }
54257 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
54260 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54261 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3aa00 }
54263 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
54266 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54267 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3ba00 }
54269 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
54272 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
54273 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3ba00 }
54275 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
54278 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54279 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58a00 }
54281 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
54284 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54285 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5aa00 }
54287 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
54290 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54291 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5ba00 }
54293 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
54296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
54297 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5ba00 }
54299 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
54302 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54303 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ca00 }
54305 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
54308 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54309 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3ea00 }
54311 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
54314 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54315 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3fa00 }
54317 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
54320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
54321 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3fa00 }
54323 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
54326 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54327 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ca00 }
54329 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
54332 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54333 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5ea00 }
54335 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
54338 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54339 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5fa00 }
54341 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
54344 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
54345 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5fa00 }
54347 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
54350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
54351 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ca00 }
54353 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
54356 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
54357 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7ea00 }
54359 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
54362 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
54363 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7fa00 }
54365 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
54368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
54369 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7fa00 }
54371 /* dsbb.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
54374 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
54375 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78a00 }
54377 /* dsbb.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
54380 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
54381 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7aa00 }
54383 /* dsbb.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
54386 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
54387 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7ba00 }
54389 /* dsbb.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
54392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
54393 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7ba00 }
54395 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
54398 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54399 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90a00 }
54401 /* dsbb.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
54404 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54405 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92a00 }
54407 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
54410 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54411 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18a00 }
54413 /* dsbb.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
54416 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54417 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1aa00 }
54419 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54422 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54423 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10a00 }
54425 /* dsbb.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
54428 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54429 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12a00 }
54431 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
54434 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54435 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30a00 }
54437 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
54440 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54441 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32a00 }
54443 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
54446 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54447 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50a00 }
54449 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
54452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54453 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52a00 }
54455 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
54458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54459 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70a00 }
54461 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
54464 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54465 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72a00 }
54467 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
54470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
54471 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38a00 }
54473 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
54476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
54477 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3aa00 }
54479 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
54482 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
54483 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58a00 }
54485 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
54488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
54489 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5aa00 }
54491 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
54494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
54495 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ca00 }
54497 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
54500 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
54501 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3ea00 }
54503 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
54506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
54507 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ca00 }
54509 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
54512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
54513 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5ea00 }
54515 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
54518 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
54519 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ca00 }
54521 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
54524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
54525 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7ea00 }
54527 /* dsbb.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
54530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
54531 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78a00 }
54533 /* dsbb.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
54536 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
54537 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7aa00 }
54539 /* dsbb.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
54542 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54543 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c90a }
54545 /* dsbb.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
54548 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
54549 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1892a }
54551 /* dsbb.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
54554 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
54555 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1890a }
54557 /* dsbb.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
54560 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54561 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c18a }
54563 /* dsbb.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
54566 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
54567 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181aa }
54569 /* dsbb.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
54572 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
54573 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1818a }
54575 /* dsbb.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
54578 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54579 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c10a }
54581 /* dsbb.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
54584 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54585 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1812a }
54587 /* dsbb.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
54590 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54591 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1810a }
54593 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
54596 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54597 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30a00 }
54599 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
54602 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54603 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832a00 }
54605 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
54608 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54609 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830a00 }
54611 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
54614 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54615 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50a00 }
54617 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
54620 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54621 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852a00 }
54623 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
54626 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54627 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850a00 }
54629 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
54632 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54633 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70a00 }
54635 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
54638 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54639 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872a00 }
54641 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
54644 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54645 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870a00 }
54647 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
54650 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54651 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38a00 }
54653 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
54656 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54657 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183aa00 }
54659 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
54662 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
54663 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838a00 }
54665 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
54668 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54669 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58a00 }
54671 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
54674 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54675 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185aa00 }
54677 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
54680 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
54681 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858a00 }
54683 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
54686 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54687 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3ca00 }
54689 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
54692 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54693 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ea00 }
54695 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
54698 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
54699 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ca00 }
54701 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
54704 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54705 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5ca00 }
54707 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
54710 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54711 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ea00 }
54713 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
54716 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
54717 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ca00 }
54719 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
54722 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
54723 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7ca00 }
54725 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
54728 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
54729 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ea00 }
54731 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
54734 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
54735 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187ca00 }
54737 /* dsbb.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
54740 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
54741 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78a00 }
54743 /* dsbb.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
54746 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
54747 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187aa00 }
54749 /* dsbb.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
54752 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
54753 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878a00 }
54755 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
54758 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54759 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980a00 }
54761 /* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
54764 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54765 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982a00 }
54767 /* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
54770 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54771 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983a00 }
54773 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
54776 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54777 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908a00 }
54779 /* dsbb.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
54782 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54783 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190aa00 }
54785 /* dsbb.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
54788 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54789 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190ba00 }
54791 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
54794 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54795 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900a00 }
54797 /* dsbb.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
54800 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54801 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902a00 }
54803 /* dsbb.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
54806 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
54807 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903a00 }
54809 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
54812 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54813 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920a00 }
54815 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
54818 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54819 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922a00 }
54821 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
54824 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54825 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923a00 }
54827 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
54830 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54831 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940a00 }
54833 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
54836 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54837 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942a00 }
54839 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
54842 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54843 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943a00 }
54845 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
54848 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54849 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960a00 }
54851 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
54854 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54855 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962a00 }
54857 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
54860 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
54861 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963a00 }
54863 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
54866 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54867 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928a00 }
54869 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
54872 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54873 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192aa00 }
54875 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
54878 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
54879 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192ba00 }
54881 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
54884 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54885 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948a00 }
54887 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
54890 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54891 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194aa00 }
54893 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
54896 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
54897 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194ba00 }
54899 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
54902 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54903 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ca00 }
54905 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
54908 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54909 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192ea00 }
54911 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
54914 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
54915 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192fa00 }
54917 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
54920 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54921 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ca00 }
54923 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
54926 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54927 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194ea00 }
54929 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
54932 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
54933 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194fa00 }
54935 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
54938 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
54939 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ca00 }
54941 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
54944 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54945 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196ea00 }
54947 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
54950 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
54951 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196fa00 }
54953 /* dsbb.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
54956 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
54957 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968a00 }
54959 /* dsbb.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
54962 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54963 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196aa00 }
54965 /* dsbb.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
54968 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
54969 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196ba00 }
54971 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
54974 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54975 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80a00 }
54977 /* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
54980 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54981 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82a00 }
54983 /* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
54986 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
54987 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83a00 }
54989 /* dsbb.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
54992 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
54993 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83a00 }
54995 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
54998 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
54999 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08a00 }
55001 /* dsbb.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
55004 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55005 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0aa00 }
55007 /* dsbb.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
55010 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55011 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0ba00 }
55013 /* dsbb.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
55016 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55017 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0ba00 }
55019 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
55022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55023 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00a00 }
55025 /* dsbb.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
55028 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55029 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02a00 }
55031 /* dsbb.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
55034 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55035 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03a00 }
55037 /* dsbb.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
55040 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55041 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03a00 }
55043 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
55046 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55047 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20a00 }
55049 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
55052 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55053 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22a00 }
55055 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
55058 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55059 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23a00 }
55061 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
55064 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55065 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23a00 }
55067 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
55070 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55071 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40a00 }
55073 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
55076 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55077 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42a00 }
55079 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
55082 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55083 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43a00 }
55085 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
55088 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55089 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43a00 }
55091 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
55094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55095 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60a00 }
55097 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
55100 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55101 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62a00 }
55103 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
55106 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55107 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63a00 }
55109 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
55112 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55113 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63a00 }
55115 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
55118 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55119 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28a00 }
55121 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
55124 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55125 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2aa00 }
55127 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
55130 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55131 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2ba00 }
55133 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
55136 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
55137 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2ba00 }
55139 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
55142 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55143 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48a00 }
55145 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
55148 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55149 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4aa00 }
55151 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
55154 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55155 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4ba00 }
55157 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
55160 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
55161 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4ba00 }
55163 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
55166 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55167 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ca00 }
55169 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
55172 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55173 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2ea00 }
55175 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
55178 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55179 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2fa00 }
55181 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
55184 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
55185 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2fa00 }
55187 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
55190 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55191 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ca00 }
55193 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
55196 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55197 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4ea00 }
55199 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
55202 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55203 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4fa00 }
55205 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
55208 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
55209 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4fa00 }
55211 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
55214 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
55215 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ca00 }
55217 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
55220 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
55221 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6ea00 }
55223 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
55226 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
55227 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6fa00 }
55229 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
55232 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
55233 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6fa00 }
55235 /* dsbb.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
55238 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
55239 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68a00 }
55241 /* dsbb.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
55244 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
55245 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6aa00 }
55247 /* dsbb.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
55250 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
55251 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6ba00 }
55253 /* dsbb.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
55256 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
55257 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6ba00 }
55259 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
55262 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
55263 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80a00 }
55265 /* dsbb.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
55268 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55269 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82a00 }
55271 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
55274 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55275 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08a00 }
55277 /* dsbb.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
55280 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55281 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0aa00 }
55283 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
55286 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55287 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00a00 }
55289 /* dsbb.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
55292 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55293 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02a00 }
55295 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
55298 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55299 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20a00 }
55301 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
55304 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55305 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22a00 }
55307 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
55310 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55311 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40a00 }
55313 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
55316 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55317 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42a00 }
55319 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
55322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55323 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60a00 }
55325 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
55328 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55329 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62a00 }
55331 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
55334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
55335 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28a00 }
55337 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
55340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
55341 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2aa00 }
55343 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
55346 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
55347 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48a00 }
55349 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
55352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
55353 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4aa00 }
55355 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
55358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
55359 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ca00 }
55361 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
55364 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
55365 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2ea00 }
55367 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
55370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
55371 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ca00 }
55373 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
55376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
55377 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4ea00 }
55379 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
55382 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
55383 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ca00 }
55385 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
55388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
55389 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6ea00 }
55391 /* dsbb.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
55394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
55395 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68a00 }
55397 /* dsbb.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
55400 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
55401 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6aa00 }
55403 /* dsbb.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
55406 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55407 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c80a }
55409 /* dsbb.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
55412 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55413 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1882a }
55415 /* dsbb.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
55418 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
55419 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1880a }
55421 /* dsbb.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
55424 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55425 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c08a }
55427 /* dsbb.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
55430 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55431 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180aa }
55433 /* dsbb.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
55436 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
55437 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1808a }
55439 /* dsbb.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
55442 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55443 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c00a }
55445 /* dsbb.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
55448 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55449 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1802a }
55451 /* dsbb.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
55454 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55455 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1800a }
55457 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
55460 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55461 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20a00 }
55463 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
55466 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55467 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822a00 }
55469 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
55472 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55473 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820a00 }
55475 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
55478 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55479 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40a00 }
55481 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
55484 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55485 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842a00 }
55487 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
55490 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55491 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840a00 }
55493 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
55496 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55497 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60a00 }
55499 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
55502 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55503 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862a00 }
55505 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
55508 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55509 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860a00 }
55511 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
55514 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55515 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28a00 }
55517 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
55520 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55521 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182aa00 }
55523 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
55526 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55527 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828a00 }
55529 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
55532 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55533 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48a00 }
55535 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
55538 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55539 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184aa00 }
55541 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
55544 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55545 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848a00 }
55547 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
55550 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55551 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2ca00 }
55553 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
55556 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55557 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ea00 }
55559 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
55562 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55563 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ca00 }
55565 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
55568 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55569 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4ca00 }
55571 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
55574 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55575 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ea00 }
55577 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
55580 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55581 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ca00 }
55583 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
55586 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
55587 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6ca00 }
55589 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
55592 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
55593 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ea00 }
55595 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
55598 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
55599 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186ca00 }
55601 /* dsbb.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
55604 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
55605 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68a00 }
55607 /* dsbb.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
55610 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
55611 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186aa00 }
55613 /* dsbb.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
55616 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
55617 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868a00 }
55619 /* dsbb.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
55622 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
55623 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1990e00 }
55625 /* dsbb.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
55628 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
55629 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1918e00 }
55631 /* dsbb.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
55634 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55635 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1910e00 }
55637 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
55640 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55641 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1930e00 }
55643 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
55646 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55647 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1938e00 }
55649 /* dsbb.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
55652 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55653 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x193ce00 }
55655 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
55658 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55659 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1950e00 }
55661 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
55664 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55665 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1958e00 }
55667 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
55670 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55671 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x195ce00 }
55673 /* dsbb.w${X} #${Imm-40-HI},${Dsp-24-u16} */
55676 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
55677 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x197ce00 }
55679 /* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
55682 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55683 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1970e00 }
55685 /* dsbb.w${X} #${Imm-48-HI},${Dsp-24-u24} */
55688 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
55689 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1978e00 }
55691 /* dsbb.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
55694 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
55695 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1980e00 }
55697 /* dsbb.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
55700 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
55701 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1908e00 }
55703 /* dsbb.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
55706 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55707 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1900e00 }
55709 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
55712 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55713 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1920e00 }
55715 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
55718 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55719 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1928e00 }
55721 /* dsbb.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
55724 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55725 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x192ce00 }
55727 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
55730 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55731 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1940e00 }
55733 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
55736 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55737 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1948e00 }
55739 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
55742 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55743 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x194ce00 }
55745 /* dsbb.b${X} #${Imm-40-QI},${Dsp-24-u16} */
55748 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
55749 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x196ce00 }
55751 /* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
55754 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55755 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1960e00 }
55757 /* dsbb.b${X} #${Imm-48-QI},${Dsp-24-u24} */
55760 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
55761 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1968e00 }
55763 /* divx.l $Dst32RnPrefixedSI */
55766 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55767 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a92f }
55769 /* divx.l $Dst32AnPrefixedSI */
55772 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55773 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a1af }
55775 /* divx.l [$Dst32AnPrefixed] */
55778 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55779 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a12f }
55781 /* divx.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55784 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55785 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a32f00 }
55787 /* divx.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55790 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55791 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a52f00 }
55793 /* divx.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55796 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55797 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a72f00 }
55799 /* divx.l ${Dsp-24-u8}[sb] */
55802 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55803 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a3af00 }
55805 /* divx.l ${Dsp-24-u16}[sb] */
55808 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55809 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a5af00 }
55811 /* divx.l ${Dsp-24-s8}[fb] */
55814 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55815 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3ef00 }
55817 /* divx.l ${Dsp-24-s16}[fb] */
55820 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55821 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5ef00 }
55823 /* divx.l ${Dsp-24-u16} */
55826 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55827 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7ef00 }
55829 /* divx.l ${Dsp-24-u24} */
55832 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55833 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a7af00 }
55835 /* divu.l $Dst32RnPrefixedSI */
55838 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55839 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a90f }
55841 /* divu.l $Dst32AnPrefixedSI */
55844 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55845 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a18f }
55847 /* divu.l [$Dst32AnPrefixed] */
55850 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55851 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a10f }
55853 /* divu.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55856 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55857 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a30f00 }
55859 /* divu.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55862 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55863 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a50f00 }
55865 /* divu.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55868 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55869 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a70f00 }
55871 /* divu.l ${Dsp-24-u8}[sb] */
55874 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55875 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a38f00 }
55877 /* divu.l ${Dsp-24-u16}[sb] */
55880 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55881 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a58f00 }
55883 /* divu.l ${Dsp-24-s8}[fb] */
55886 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55887 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3cf00 }
55889 /* divu.l ${Dsp-24-s16}[fb] */
55892 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55893 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5cf00 }
55895 /* divu.l ${Dsp-24-u16} */
55898 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55899 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7cf00 }
55901 /* divu.l ${Dsp-24-u24} */
55904 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55905 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a78f00 }
55907 /* div.l $Dst32RnPrefixedSI */
55910 { { MNEM
, ' ', OP (DST32RNPREFIXEDSI
), 0 } },
55911 & ifmt_mulu_l_dst32_Rn_direct_Prefixed_SI
, { 0x1a91f }
55913 /* div.l $Dst32AnPrefixedSI */
55916 { { MNEM
, ' ', OP (DST32ANPREFIXEDSI
), 0 } },
55917 & ifmt_mulu_l_dst32_An_direct_Prefixed_SI
, { 0x1a19f }
55919 /* div.l [$Dst32AnPrefixed] */
55922 { { MNEM
, ' ', '[', OP (DST32ANPREFIXED
), ']', 0 } },
55923 & ifmt_mulu_l_dst32_An_indirect_Prefixed_SI
, { 0x1a11f }
55925 /* div.l ${Dsp-24-u8}[$Dst32AnPrefixed] */
55928 { { MNEM
, ' ', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55929 & ifmt_mulu_l_dst32_24_8_An_relative_Prefixed_SI
, { 0x1a31f00 }
55931 /* div.l ${Dsp-24-u16}[$Dst32AnPrefixed] */
55934 { { MNEM
, ' ', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55935 & ifmt_mulu_l_dst32_24_16_An_relative_Prefixed_SI
, { 0x1a51f00 }
55937 /* div.l ${Dsp-24-u24}[$Dst32AnPrefixed] */
55940 { { MNEM
, ' ', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
55941 & ifmt_mulu_l_dst32_24_24_An_relative_Prefixed_SI
, { 0x1a71f00 }
55943 /* div.l ${Dsp-24-u8}[sb] */
55946 { { MNEM
, ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
55947 & ifmt_mulu_l_dst32_24_8_SB_relative_Prefixed_SI
, { 0x1a39f00 }
55949 /* div.l ${Dsp-24-u16}[sb] */
55952 { { MNEM
, ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
55953 & ifmt_mulu_l_dst32_24_16_SB_relative_Prefixed_SI
, { 0x1a59f00 }
55955 /* div.l ${Dsp-24-s8}[fb] */
55958 { { MNEM
, ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
55959 & ifmt_mulu_l_dst32_24_8_FB_relative_Prefixed_SI
, { 0x1a3df00 }
55961 /* div.l ${Dsp-24-s16}[fb] */
55964 { { MNEM
, ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
55965 & ifmt_mulu_l_dst32_24_16_FB_relative_Prefixed_SI
, { 0x1a5df00 }
55967 /* div.l ${Dsp-24-u16} */
55970 { { MNEM
, ' ', OP (DSP_24_U16
), 0 } },
55971 & ifmt_mulu_l_dst32_24_16_absolute_Prefixed_SI
, { 0x1a7df00 }
55973 /* div.l ${Dsp-24-u24} */
55976 { { MNEM
, ' ', OP (DSP_24_U24
), 0 } },
55977 & ifmt_mulu_l_dst32_24_24_absolute_Prefixed_SI
, { 0x1a79f00 }
55979 /* divx.w $Dst32RnUnprefixedHI */
55982 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
55983 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x991e }
55985 /* divx.w $Dst32AnUnprefixedHI */
55988 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
55989 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x919e }
55991 /* divx.w [$Dst32AnUnprefixed] */
55994 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
55995 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x911e }
55997 /* divx.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56000 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56001 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x931e00 }
56003 /* divx.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56006 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56007 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x951e0000 }
56009 /* divx.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56012 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56013 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x971e0000 }
56015 /* divx.w ${Dsp-16-u8}[sb] */
56018 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56019 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x939e00 }
56021 /* divx.w ${Dsp-16-u16}[sb] */
56024 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56025 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x959e0000 }
56027 /* divx.w ${Dsp-16-s8}[fb] */
56030 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56031 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93de00 }
56033 /* divx.w ${Dsp-16-s16}[fb] */
56036 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56037 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95de0000 }
56039 /* divx.w ${Dsp-16-u16} */
56042 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56043 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x97de0000 }
56045 /* divx.w ${Dsp-16-u24} */
56048 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56049 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x979e0000 }
56051 /* divx.b $Dst32RnUnprefixedQI */
56054 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56055 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x981e }
56057 /* divx.b $Dst32AnUnprefixedQI */
56060 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56061 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x909e }
56063 /* divx.b [$Dst32AnUnprefixed] */
56066 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56067 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x901e }
56069 /* divx.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56072 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56073 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x921e00 }
56075 /* divx.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56078 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56079 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x941e0000 }
56081 /* divx.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56084 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56085 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x961e0000 }
56087 /* divx.b ${Dsp-16-u8}[sb] */
56090 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56091 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x929e00 }
56093 /* divx.b ${Dsp-16-u16}[sb] */
56096 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56097 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x949e0000 }
56099 /* divx.b ${Dsp-16-s8}[fb] */
56102 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56103 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92de00 }
56105 /* divx.b ${Dsp-16-s16}[fb] */
56108 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56109 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94de0000 }
56111 /* divx.b ${Dsp-16-u16} */
56114 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56115 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x96de0000 }
56117 /* divx.b ${Dsp-16-u24} */
56120 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56121 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x969e0000 }
56123 /* divx.w $Dst16RnHI */
56126 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56127 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x7790 }
56129 /* divx.w $Dst16AnHI */
56132 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56133 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x7794 }
56135 /* divx.w [$Dst16An] */
56138 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56139 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x7796 }
56141 /* divx.w ${Dsp-16-u8}[$Dst16An] */
56144 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56145 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x779800 }
56147 /* divx.w ${Dsp-16-u16}[$Dst16An] */
56150 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56151 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x779c0000 }
56153 /* divx.w ${Dsp-16-u8}[sb] */
56156 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56157 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x779a00 }
56159 /* divx.w ${Dsp-16-u16}[sb] */
56162 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56163 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x779e0000 }
56165 /* divx.w ${Dsp-16-s8}[fb] */
56168 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56169 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x779b00 }
56171 /* divx.w ${Dsp-16-u16} */
56174 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56175 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x779f0000 }
56177 /* divx.b $Dst16RnQI */
56180 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56181 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x7690 }
56183 /* divx.b $Dst16AnQI */
56186 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56187 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x7694 }
56189 /* divx.b [$Dst16An] */
56192 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56193 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x7696 }
56195 /* divx.b ${Dsp-16-u8}[$Dst16An] */
56198 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56199 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x769800 }
56201 /* divx.b ${Dsp-16-u16}[$Dst16An] */
56204 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56205 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x769c0000 }
56207 /* divx.b ${Dsp-16-u8}[sb] */
56210 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56211 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x769a00 }
56213 /* divx.b ${Dsp-16-u16}[sb] */
56216 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56217 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x769e0000 }
56219 /* divx.b ${Dsp-16-s8}[fb] */
56222 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56223 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x769b00 }
56225 /* divx.b ${Dsp-16-u16} */
56228 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56229 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x769f0000 }
56231 /* divu.w $Dst32RnUnprefixedHI */
56234 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56235 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x890e }
56237 /* divu.w $Dst32AnUnprefixedHI */
56240 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56241 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x818e }
56243 /* divu.w [$Dst32AnUnprefixed] */
56246 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56247 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x810e }
56249 /* divu.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56252 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56253 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830e00 }
56255 /* divu.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56258 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56259 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850e0000 }
56261 /* divu.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56264 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56265 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870e0000 }
56267 /* divu.w ${Dsp-16-u8}[sb] */
56270 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56271 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838e00 }
56273 /* divu.w ${Dsp-16-u16}[sb] */
56276 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56277 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858e0000 }
56279 /* divu.w ${Dsp-16-s8}[fb] */
56282 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56283 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ce00 }
56285 /* divu.w ${Dsp-16-s16}[fb] */
56288 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56289 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ce0000 }
56291 /* divu.w ${Dsp-16-u16} */
56294 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56295 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ce0000 }
56297 /* divu.w ${Dsp-16-u24} */
56300 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56301 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x878e0000 }
56303 /* divu.b $Dst32RnUnprefixedQI */
56306 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56307 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x880e }
56309 /* divu.b $Dst32AnUnprefixedQI */
56312 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56313 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x808e }
56315 /* divu.b [$Dst32AnUnprefixed] */
56318 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56319 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x800e }
56321 /* divu.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56324 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56325 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820e00 }
56327 /* divu.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56330 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56331 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840e0000 }
56333 /* divu.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56336 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56337 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860e0000 }
56339 /* divu.b ${Dsp-16-u8}[sb] */
56342 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56343 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828e00 }
56345 /* divu.b ${Dsp-16-u16}[sb] */
56348 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56349 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848e0000 }
56351 /* divu.b ${Dsp-16-s8}[fb] */
56354 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56355 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ce00 }
56357 /* divu.b ${Dsp-16-s16}[fb] */
56360 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56361 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ce0000 }
56363 /* divu.b ${Dsp-16-u16} */
56366 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56367 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ce0000 }
56369 /* divu.b ${Dsp-16-u24} */
56372 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56373 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x868e0000 }
56375 /* divu.w $Dst16RnHI */
56378 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56379 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77c0 }
56381 /* divu.w $Dst16AnHI */
56384 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56385 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77c4 }
56387 /* divu.w [$Dst16An] */
56390 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56391 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77c6 }
56393 /* divu.w ${Dsp-16-u8}[$Dst16An] */
56396 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56397 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77c800 }
56399 /* divu.w ${Dsp-16-u16}[$Dst16An] */
56402 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56403 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77cc0000 }
56405 /* divu.w ${Dsp-16-u8}[sb] */
56408 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56409 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ca00 }
56411 /* divu.w ${Dsp-16-u16}[sb] */
56414 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56415 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ce0000 }
56417 /* divu.w ${Dsp-16-s8}[fb] */
56420 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56421 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77cb00 }
56423 /* divu.w ${Dsp-16-u16} */
56426 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56427 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77cf0000 }
56429 /* divu.b $Dst16RnQI */
56432 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56433 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76c0 }
56435 /* divu.b $Dst16AnQI */
56438 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56439 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76c4 }
56441 /* divu.b [$Dst16An] */
56444 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56445 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76c6 }
56447 /* divu.b ${Dsp-16-u8}[$Dst16An] */
56450 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56451 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76c800 }
56453 /* divu.b ${Dsp-16-u16}[$Dst16An] */
56456 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56457 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76cc0000 }
56459 /* divu.b ${Dsp-16-u8}[sb] */
56462 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56463 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ca00 }
56465 /* divu.b ${Dsp-16-u16}[sb] */
56468 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56469 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ce0000 }
56471 /* divu.b ${Dsp-16-s8}[fb] */
56474 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56475 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76cb00 }
56477 /* divu.b ${Dsp-16-u16} */
56480 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56481 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76cf0000 }
56483 /* div.w $Dst32RnUnprefixedHI */
56486 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56487 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0x891e }
56489 /* div.w $Dst32AnUnprefixedHI */
56492 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56493 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0x819e }
56495 /* div.w [$Dst32AnUnprefixed] */
56498 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56499 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0x811e }
56501 /* div.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56504 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56505 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0x831e00 }
56507 /* div.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56510 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56511 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0x851e0000 }
56513 /* div.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56516 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56517 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0x871e0000 }
56519 /* div.w ${Dsp-16-u8}[sb] */
56522 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56523 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x839e00 }
56525 /* div.w ${Dsp-16-u16}[sb] */
56528 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56529 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x859e0000 }
56531 /* div.w ${Dsp-16-s8}[fb] */
56534 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56535 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83de00 }
56537 /* div.w ${Dsp-16-s16}[fb] */
56540 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56541 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85de0000 }
56543 /* div.w ${Dsp-16-u16} */
56546 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56547 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0x87de0000 }
56549 /* div.w ${Dsp-16-u24} */
56552 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56553 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0x879e0000 }
56555 /* div.b $Dst32RnUnprefixedQI */
56558 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56559 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0x881e }
56561 /* div.b $Dst32AnUnprefixedQI */
56564 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56565 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0x809e }
56567 /* div.b [$Dst32AnUnprefixed] */
56570 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56571 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0x801e }
56573 /* div.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56576 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56577 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0x821e00 }
56579 /* div.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56582 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56583 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0x841e0000 }
56585 /* div.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56588 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56589 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0x861e0000 }
56591 /* div.b ${Dsp-16-u8}[sb] */
56594 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56595 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x829e00 }
56597 /* div.b ${Dsp-16-u16}[sb] */
56600 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56601 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x849e0000 }
56603 /* div.b ${Dsp-16-s8}[fb] */
56606 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56607 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82de00 }
56609 /* div.b ${Dsp-16-s16}[fb] */
56612 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56613 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84de0000 }
56615 /* div.b ${Dsp-16-u16} */
56618 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56619 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0x86de0000 }
56621 /* div.b ${Dsp-16-u24} */
56624 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56625 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0x869e0000 }
56627 /* div.w $Dst16RnHI */
56630 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
56631 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77d0 }
56633 /* div.w $Dst16AnHI */
56636 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
56637 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77d4 }
56639 /* div.w [$Dst16An] */
56642 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56643 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77d6 }
56645 /* div.w ${Dsp-16-u8}[$Dst16An] */
56648 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56649 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77d800 }
56651 /* div.w ${Dsp-16-u16}[$Dst16An] */
56654 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56655 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77dc0000 }
56657 /* div.w ${Dsp-16-u8}[sb] */
56660 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56661 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77da00 }
56663 /* div.w ${Dsp-16-u16}[sb] */
56666 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56667 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77de0000 }
56669 /* div.w ${Dsp-16-s8}[fb] */
56672 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56673 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77db00 }
56675 /* div.w ${Dsp-16-u16} */
56678 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56679 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77df0000 }
56681 /* div.b $Dst16RnQI */
56684 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
56685 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76d0 }
56687 /* div.b $Dst16AnQI */
56690 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
56691 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76d4 }
56693 /* div.b [$Dst16An] */
56696 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
56697 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76d6 }
56699 /* div.b ${Dsp-16-u8}[$Dst16An] */
56702 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
56703 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76d800 }
56705 /* div.b ${Dsp-16-u16}[$Dst16An] */
56708 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
56709 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76dc0000 }
56711 /* div.b ${Dsp-16-u8}[sb] */
56714 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56715 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76da00 }
56717 /* div.b ${Dsp-16-u16}[sb] */
56720 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56721 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76de0000 }
56723 /* div.b ${Dsp-16-s8}[fb] */
56726 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56727 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76db00 }
56729 /* div.b ${Dsp-16-u16} */
56732 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56733 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76df0000 }
56735 /* dec.w $Dst32RnUnprefixedHI */
56738 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
56739 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb90e }
56741 /* dec.w $Dst32AnUnprefixedHI */
56744 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
56745 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb18e }
56747 /* dec.w [$Dst32AnUnprefixed] */
56750 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56751 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb10e }
56753 /* dec.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56756 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56757 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb30e00 }
56759 /* dec.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56762 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56763 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb50e0000 }
56765 /* dec.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56768 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56769 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb70e0000 }
56771 /* dec.w ${Dsp-16-u8}[sb] */
56774 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56775 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb38e00 }
56777 /* dec.w ${Dsp-16-u16}[sb] */
56780 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56781 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb58e0000 }
56783 /* dec.w ${Dsp-16-s8}[fb] */
56786 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56787 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3ce00 }
56789 /* dec.w ${Dsp-16-s16}[fb] */
56792 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56793 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5ce0000 }
56795 /* dec.w ${Dsp-16-u16} */
56798 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56799 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7ce0000 }
56801 /* dec.w ${Dsp-16-u24} */
56804 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56805 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb78e0000 }
56807 /* dec.b $Dst32RnUnprefixedQI */
56810 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
56811 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb80e }
56813 /* dec.b $Dst32AnUnprefixedQI */
56816 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
56817 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb08e }
56819 /* dec.b [$Dst32AnUnprefixed] */
56822 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56823 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb00e }
56825 /* dec.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
56828 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56829 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb20e00 }
56831 /* dec.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
56834 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56835 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb40e0000 }
56837 /* dec.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
56840 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56841 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb60e0000 }
56843 /* dec.b ${Dsp-16-u8}[sb] */
56846 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56847 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb28e00 }
56849 /* dec.b ${Dsp-16-u16}[sb] */
56852 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56853 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb48e0000 }
56855 /* dec.b ${Dsp-16-s8}[fb] */
56858 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56859 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2ce00 }
56861 /* dec.b ${Dsp-16-s16}[fb] */
56864 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56865 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4ce0000 }
56867 /* dec.b ${Dsp-16-u16} */
56870 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
56871 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6ce0000 }
56873 /* dec.b ${Dsp-16-u24} */
56876 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
56877 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb68e0000 }
56882 { { MNEM
, ' ', 'r', '0', 'l', 0 } },
56883 & ifmt_not16_b_s_dst16_3_S_R0l_direct_QI
, { 0xac }
56888 { { MNEM
, ' ', 'r', '0', 'h', 0 } },
56889 & ifmt_not16_b_s_dst16_3_S_R0h_direct_QI
, { 0xab }
56891 /* dec.b ${Dsp-8-u8}[sb] */
56894 { { MNEM
, ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
56895 & ifmt_not16_b_s_dst16_3_S_8_8_SB_relative_QI
, { 0xad00 }
56897 /* dec.b ${Dsp-8-s8}[fb] */
56900 { { MNEM
, ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
56901 & ifmt_not16_b_s_dst16_3_S_8_8_FB_relative_QI
, { 0xae00 }
56903 /* dec.b ${Dsp-8-u16} */
56906 { { MNEM
, ' ', OP (DSP_8_U16
), 0 } },
56907 & ifmt_not16_b_s_dst16_3_S_8_16_absolute_QI
, { 0xaf0000 }
56909 /* cmpx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
56912 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
56913 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa81100 }
56915 /* cmpx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
56918 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
56919 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa09100 }
56921 /* cmpx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
56924 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56925 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa01100 }
56927 /* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
56930 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56931 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2110000 }
56933 /* cmpx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
56936 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
56937 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2910000 }
56939 /* cmpx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
56942 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
56943 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2d10000 }
56945 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
56948 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56949 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4110000 }
56951 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
56954 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
56955 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4910000 }
56957 /* cmpx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
56960 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
56961 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4d10000 }
56963 /* cmpx${X} #${Imm-32-QI},${Dsp-16-u16} */
56966 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
56967 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6d10000 }
56969 /* cmpx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
56972 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
56973 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6110000 }
56975 /* cmpx${X} #${Imm-40-QI},${Dsp-16-u24} */
56978 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
56979 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6910000 }
56981 /* cmp.w${S} ${Dsp-8-u8}[sb],${Dst32R0HI-S} */
56984 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST32R0HI_S
), 0 } },
56985 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_SB_relative_HI
, { 0x6100 }
56987 /* cmp.w${S} ${Dsp-8-s8}[fb],${Dst32R0HI-S} */
56990 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST32R0HI_S
), 0 } },
56991 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_8_FB_relative_HI
, { 0x7100 }
56993 /* cmp.w${S} ${Dsp-8-u16},${Dst32R0HI-S} */
56996 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST32R0HI_S
), 0 } },
56997 & ifmt_cmp32_w_S_src2_r0_HI_src32_2_S_16_absolute_HI
, { 0x510000 }
56999 /* cmp.b${S} ${Dsp-8-u8}[sb],${Dst32R0QI-S} */
57002 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST32R0QI_S
), 0 } },
57003 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_SB_relative_QI
, { 0x6000 }
57005 /* cmp.b${S} ${Dsp-8-s8}[fb],${Dst32R0QI-S} */
57008 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST32R0QI_S
), 0 } },
57009 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_8_FB_relative_QI
, { 0x7000 }
57011 /* cmp.b${S} ${Dsp-8-u16},${Dst32R0QI-S} */
57014 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST32R0QI_S
), 0 } },
57015 & ifmt_cmp32_b_S_src2_r0_QI_src32_2_S_16_absolute_QI
, { 0x500000 }
57017 /* cmp.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
57020 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
57021 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x67000000 }
57023 /* cmp.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
57026 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
57027 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x77000000 }
57029 /* cmp.w${S} #${Imm-24-HI},${Dsp-8-u16} */
57032 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
57033 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x57000000 }
57035 /* cmp.w${S} #${Imm-8-HI},r0 */
57038 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
57039 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x470000 }
57041 /* cmp.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
57044 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
57045 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x660000 }
57047 /* cmp.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
57050 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
57051 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x760000 }
57053 /* cmp.b${S} #${Imm-24-QI},${Dsp-8-u16} */
57056 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
57057 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x56000000 }
57059 /* cmp.b${S} #${Imm-8-QI},r0l */
57062 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
57063 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4600 }
57065 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57068 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57069 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990100 }
57071 /* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
57074 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57075 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992100 }
57077 /* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
57080 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57081 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993100 }
57083 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57086 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57087 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918100 }
57089 /* cmp.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
57092 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57093 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a100 }
57095 /* cmp.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
57098 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57099 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b100 }
57101 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57104 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57105 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910100 }
57107 /* cmp.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
57110 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57111 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912100 }
57113 /* cmp.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
57116 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57117 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913100 }
57119 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57122 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57123 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93010000 }
57125 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57128 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57129 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93210000 }
57131 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
57134 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57135 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93310000 }
57137 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57140 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57141 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95010000 }
57143 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57146 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57147 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95210000 }
57149 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
57152 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57153 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95310000 }
57155 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57158 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57159 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97010000 }
57161 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57165 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97210000 }
57167 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
57170 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57171 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97310000 }
57173 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
57176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57177 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93810000 }
57179 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
57182 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57183 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a10000 }
57185 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
57188 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
57189 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b10000 }
57191 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
57194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57195 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95810000 }
57197 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
57200 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57201 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a10000 }
57203 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
57206 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
57207 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b10000 }
57209 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
57212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57213 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c10000 }
57215 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
57218 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57219 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e10000 }
57221 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
57224 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
57225 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f10000 }
57227 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
57230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57231 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c10000 }
57233 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
57236 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57237 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e10000 }
57239 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
57242 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
57243 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f10000 }
57245 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
57248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
57249 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c10000 }
57251 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
57254 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
57255 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e10000 }
57257 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
57260 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
57261 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f10000 }
57263 /* cmp.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
57266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
57267 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97810000 }
57269 /* cmp.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
57272 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
57273 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a10000 }
57275 /* cmp.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
57278 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
57279 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b10000 }
57281 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57285 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9010000 }
57287 /* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
57290 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57291 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9210000 }
57293 /* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
57296 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57297 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9310000 }
57299 /* cmp.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
57302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57303 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9310000 }
57305 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57308 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57309 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1810000 }
57311 /* cmp.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
57314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57315 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a10000 }
57317 /* cmp.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
57320 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57321 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b10000 }
57323 /* cmp.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
57326 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57327 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b10000 }
57329 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57333 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1010000 }
57335 /* cmp.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
57338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57339 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1210000 }
57341 /* cmp.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
57344 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57345 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1310000 }
57347 /* cmp.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
57350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57351 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1310000 }
57353 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57357 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3010000 }
57359 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57363 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3210000 }
57365 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
57368 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57369 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3310000 }
57371 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
57374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57375 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3310000 }
57377 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57381 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5010000 }
57383 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57387 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5210000 }
57389 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
57392 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57393 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5310000 }
57395 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
57398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57399 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5310000 }
57401 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57405 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7010000 }
57407 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57411 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7210000 }
57413 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
57416 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57417 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7310000 }
57419 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
57422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57423 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7310000 }
57425 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
57428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57429 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3810000 }
57431 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
57434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57435 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a10000 }
57437 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
57440 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57441 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b10000 }
57443 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
57446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
57447 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b10000 }
57449 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
57452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57453 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5810000 }
57455 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
57458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57459 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a10000 }
57461 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
57464 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57465 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b10000 }
57467 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
57470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
57471 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b10000 }
57473 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
57476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57477 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c10000 }
57479 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
57482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57483 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e10000 }
57485 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
57488 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57489 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f10000 }
57491 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
57494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
57495 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f10000 }
57497 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
57500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57501 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c10000 }
57503 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
57506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57507 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e10000 }
57509 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
57512 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57513 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f10000 }
57515 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
57518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
57519 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f10000 }
57521 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
57524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
57525 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c10000 }
57527 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
57530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
57531 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e10000 }
57533 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
57536 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
57537 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f10000 }
57539 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
57542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
57543 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f10000 }
57545 /* cmp.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
57548 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
57549 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7810000 }
57551 /* cmp.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
57554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
57555 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a10000 }
57557 /* cmp.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
57560 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
57561 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b10000 }
57563 /* cmp.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
57566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
57567 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b10000 }
57569 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57573 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9010000 }
57575 /* cmp.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
57578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57579 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9210000 }
57581 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57585 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1810000 }
57587 /* cmp.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
57590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57591 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a10000 }
57593 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57597 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1010000 }
57599 /* cmp.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
57602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57603 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1210000 }
57605 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
57608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57609 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3010000 }
57611 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
57614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57615 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3210000 }
57617 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
57620 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57621 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5010000 }
57623 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
57626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57627 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5210000 }
57629 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
57632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57633 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7010000 }
57635 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
57638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57639 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7210000 }
57641 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
57644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
57645 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3810000 }
57647 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
57650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
57651 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a10000 }
57653 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
57656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
57657 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5810000 }
57659 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
57662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
57663 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a10000 }
57665 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
57668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
57669 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c10000 }
57671 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
57674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
57675 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e10000 }
57677 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
57680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
57681 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c10000 }
57683 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
57686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
57687 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e10000 }
57689 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
57692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
57693 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c10000 }
57695 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
57698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
57699 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e10000 }
57701 /* cmp.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
57704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
57705 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7810000 }
57707 /* cmp.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
57710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
57711 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a10000 }
57713 /* cmp.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
57716 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57717 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc901 }
57719 /* cmp.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
57722 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57723 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8921 }
57725 /* cmp.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
57728 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
57729 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8901 }
57731 /* cmp.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
57734 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57735 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc181 }
57737 /* cmp.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
57740 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57741 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a1 }
57743 /* cmp.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
57746 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
57747 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8181 }
57749 /* cmp.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
57752 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57753 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc101 }
57755 /* cmp.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
57758 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57759 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8121 }
57761 /* cmp.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57764 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57765 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8101 }
57767 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
57770 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57771 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30100 }
57773 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
57776 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57777 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832100 }
57779 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
57782 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57783 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830100 }
57785 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
57788 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57789 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5010000 }
57791 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
57794 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57795 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85210000 }
57797 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
57800 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57801 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85010000 }
57803 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
57806 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57807 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7010000 }
57809 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
57812 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57813 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87210000 }
57815 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
57818 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57819 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87010000 }
57821 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
57824 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57825 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38100 }
57827 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
57830 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57831 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a100 }
57833 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
57836 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
57837 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838100 }
57839 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
57842 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57843 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5810000 }
57845 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
57848 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57849 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a10000 }
57851 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
57854 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
57855 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85810000 }
57857 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
57860 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57861 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c100 }
57863 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
57866 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57867 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e100 }
57869 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
57872 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
57873 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c100 }
57875 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
57878 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57879 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c10000 }
57881 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
57884 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57885 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e10000 }
57887 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
57890 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
57891 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c10000 }
57893 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
57896 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
57897 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c10000 }
57899 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
57902 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
57903 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e10000 }
57905 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
57908 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
57909 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c10000 }
57911 /* cmp.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
57914 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
57915 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7810000 }
57917 /* cmp.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
57920 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
57921 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a10000 }
57923 /* cmp.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
57926 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
57927 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87810000 }
57929 /* cmp.b${S} ${SrcDst16-r0l-r0h-S-normal} */
57932 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
57933 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x38 }
57935 /* cmp.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
57938 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
57939 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x3900 }
57941 /* cmp.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
57944 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
57945 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x3a00 }
57947 /* cmp.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
57950 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
57951 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x3b0000 }
57953 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
57956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57957 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990600 }
57959 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
57962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57963 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992600 }
57965 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
57968 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
57969 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993600 }
57971 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
57974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57975 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918600 }
57977 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
57980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57981 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a600 }
57983 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
57986 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
57987 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b600 }
57989 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
57992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57993 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910600 }
57995 /* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
57998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
57999 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912600 }
58001 /* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
58004 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58005 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913600 }
58007 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58011 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93060000 }
58013 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58017 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93260000 }
58019 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58022 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58023 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93360000 }
58025 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58029 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95060000 }
58031 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58035 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95260000 }
58037 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58040 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58041 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95360000 }
58043 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58047 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97060000 }
58049 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58053 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97260000 }
58055 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58058 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58059 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97360000 }
58061 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
58064 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58065 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93860000 }
58067 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
58070 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58071 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a60000 }
58073 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
58076 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58077 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b60000 }
58079 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
58082 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58083 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95860000 }
58085 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
58088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58089 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a60000 }
58091 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
58094 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58095 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b60000 }
58097 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
58100 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58101 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c60000 }
58103 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
58106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58107 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e60000 }
58109 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
58112 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58113 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f60000 }
58115 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
58118 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58119 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c60000 }
58121 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
58124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58125 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e60000 }
58127 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
58130 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58131 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f60000 }
58133 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
58136 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
58137 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c60000 }
58139 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
58142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58143 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e60000 }
58145 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
58148 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
58149 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f60000 }
58151 /* cmp.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
58154 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
58155 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97860000 }
58157 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
58160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
58161 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a60000 }
58163 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
58166 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
58167 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b60000 }
58169 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58172 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58173 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9060000 }
58175 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
58178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58179 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9260000 }
58181 /* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
58184 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58185 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9360000 }
58187 /* cmp.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
58190 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58191 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9360000 }
58193 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58197 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1860000 }
58199 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
58202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58203 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a60000 }
58205 /* cmp.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
58208 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58209 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b60000 }
58211 /* cmp.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
58214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58215 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b60000 }
58217 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58221 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1060000 }
58223 /* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
58226 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58227 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1260000 }
58229 /* cmp.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
58232 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58233 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1360000 }
58235 /* cmp.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
58238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58239 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1360000 }
58241 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58244 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58245 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3060000 }
58247 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58251 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3260000 }
58253 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
58256 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58257 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3360000 }
58259 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
58262 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58263 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3360000 }
58265 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58269 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5060000 }
58271 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58275 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5260000 }
58277 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
58280 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58281 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5360000 }
58283 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
58286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58287 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5360000 }
58289 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58293 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7060000 }
58295 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58299 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7260000 }
58301 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
58304 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58305 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7360000 }
58307 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
58310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58311 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7360000 }
58313 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
58316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58317 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3860000 }
58319 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
58322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58323 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a60000 }
58325 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
58328 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58329 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b60000 }
58331 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
58334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
58335 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b60000 }
58337 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
58340 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58341 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5860000 }
58343 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
58346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58347 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a60000 }
58349 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
58352 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58353 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b60000 }
58355 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
58358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
58359 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b60000 }
58361 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
58364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58365 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c60000 }
58367 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
58370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58371 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e60000 }
58373 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
58376 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58377 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f60000 }
58379 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
58382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
58383 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f60000 }
58385 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
58388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58389 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c60000 }
58391 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
58394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58395 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e60000 }
58397 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
58400 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58401 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f60000 }
58403 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
58406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
58407 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f60000 }
58409 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
58412 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
58413 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c60000 }
58415 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
58418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
58419 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e60000 }
58421 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
58424 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
58425 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f60000 }
58427 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
58430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
58431 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f60000 }
58433 /* cmp.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
58436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
58437 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7860000 }
58439 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
58442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
58443 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a60000 }
58445 /* cmp.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
58448 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
58449 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b60000 }
58451 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
58454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
58455 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b60000 }
58457 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58461 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9060000 }
58463 /* cmp.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
58466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58467 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9260000 }
58469 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58473 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1860000 }
58475 /* cmp.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
58478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58479 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a60000 }
58481 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58484 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58485 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1060000 }
58487 /* cmp.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
58490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58491 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1260000 }
58493 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
58496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58497 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3060000 }
58499 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
58502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58503 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3260000 }
58505 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
58508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58509 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5060000 }
58511 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
58514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58515 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5260000 }
58517 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
58520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58521 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7060000 }
58523 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
58526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58527 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7260000 }
58529 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
58532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
58533 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3860000 }
58535 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
58538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
58539 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a60000 }
58541 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
58544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
58545 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5860000 }
58547 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
58550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
58551 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a60000 }
58553 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
58556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
58557 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c60000 }
58559 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
58562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
58563 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e60000 }
58565 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
58568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
58569 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c60000 }
58571 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
58574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
58575 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e60000 }
58577 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
58580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
58581 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c60000 }
58583 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
58586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
58587 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e60000 }
58589 /* cmp.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
58592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
58593 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7860000 }
58595 /* cmp.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
58598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
58599 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a60000 }
58601 /* cmp.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
58604 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58605 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc906 }
58607 /* cmp.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
58610 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58611 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8926 }
58613 /* cmp.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
58616 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
58617 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8906 }
58619 /* cmp.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
58622 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58623 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc186 }
58625 /* cmp.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
58628 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58629 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a6 }
58631 /* cmp.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
58634 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
58635 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8186 }
58637 /* cmp.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
58640 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58641 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc106 }
58643 /* cmp.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
58646 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58647 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8126 }
58649 /* cmp.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58652 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58653 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8106 }
58655 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
58658 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58659 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30600 }
58661 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
58664 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58665 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832600 }
58667 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
58670 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58671 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830600 }
58673 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
58676 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58677 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5060000 }
58679 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
58682 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58683 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85260000 }
58685 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
58688 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58689 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85060000 }
58691 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
58694 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58695 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7060000 }
58697 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
58700 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58701 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87260000 }
58703 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
58706 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58707 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87060000 }
58709 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
58712 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58713 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38600 }
58715 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
58718 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58719 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a600 }
58721 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
58724 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
58725 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838600 }
58727 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
58730 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58731 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5860000 }
58733 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
58736 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58737 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a60000 }
58739 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
58742 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
58743 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85860000 }
58745 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
58748 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58749 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c600 }
58751 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
58754 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58755 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e600 }
58757 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
58760 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
58761 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c600 }
58763 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
58766 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58767 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c60000 }
58769 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
58772 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58773 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e60000 }
58775 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
58778 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
58779 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c60000 }
58781 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
58784 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
58785 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c60000 }
58787 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
58790 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
58791 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e60000 }
58793 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
58796 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
58797 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c60000 }
58799 /* cmp.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
58802 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
58803 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7860000 }
58805 /* cmp.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
58808 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
58809 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a60000 }
58811 /* cmp.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
58814 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
58815 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87860000 }
58817 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
58820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58821 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980600 }
58823 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
58826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58827 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982600 }
58829 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
58832 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
58833 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983600 }
58835 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
58838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58839 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908600 }
58841 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
58844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58845 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a600 }
58847 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
58850 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
58851 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b600 }
58853 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
58856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58857 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900600 }
58859 /* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
58862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58863 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902600 }
58865 /* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
58868 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58869 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903600 }
58871 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58875 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92060000 }
58877 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58881 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92260000 }
58883 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
58886 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58887 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92360000 }
58889 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58893 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94060000 }
58895 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58899 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94260000 }
58901 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
58904 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58905 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94360000 }
58907 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58911 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96060000 }
58913 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58917 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96260000 }
58919 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
58922 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
58923 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96360000 }
58925 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
58928 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58929 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92860000 }
58931 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
58934 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58935 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a60000 }
58937 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
58940 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
58941 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b60000 }
58943 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
58946 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58947 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94860000 }
58949 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
58952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58953 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a60000 }
58955 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
58958 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
58959 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b60000 }
58961 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
58964 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58965 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c60000 }
58967 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
58970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58971 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e60000 }
58973 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
58976 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
58977 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f60000 }
58979 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
58982 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58983 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c60000 }
58985 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
58988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58989 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e60000 }
58991 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
58994 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
58995 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f60000 }
58997 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
59000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
59001 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c60000 }
59003 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
59006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59007 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e60000 }
59009 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
59012 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59013 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f60000 }
59015 /* cmp.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
59018 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
59019 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96860000 }
59021 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
59024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
59025 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a60000 }
59027 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
59030 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
59031 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b60000 }
59033 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59036 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59037 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8060000 }
59039 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
59042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59043 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8260000 }
59045 /* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
59048 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59049 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8360000 }
59051 /* cmp.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
59054 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59055 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8360000 }
59057 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59061 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0860000 }
59063 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
59066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59067 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a60000 }
59069 /* cmp.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
59072 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59073 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b60000 }
59075 /* cmp.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
59078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59079 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b60000 }
59081 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59085 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0060000 }
59087 /* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
59090 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59091 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0260000 }
59093 /* cmp.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
59096 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59097 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0360000 }
59099 /* cmp.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
59102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59103 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0360000 }
59105 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59108 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59109 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2060000 }
59111 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59115 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2260000 }
59117 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
59120 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59121 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2360000 }
59123 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
59126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59127 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2360000 }
59129 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59133 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4060000 }
59135 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59139 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4260000 }
59141 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
59144 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59145 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4360000 }
59147 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
59150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59151 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4360000 }
59153 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59157 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6060000 }
59159 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59163 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6260000 }
59165 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
59168 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59169 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6360000 }
59171 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
59174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59175 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6360000 }
59177 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
59180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59181 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2860000 }
59183 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
59186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59187 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a60000 }
59189 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
59192 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59193 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b60000 }
59195 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
59198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59199 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b60000 }
59201 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
59204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59205 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4860000 }
59207 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
59210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59211 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a60000 }
59213 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
59216 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59217 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b60000 }
59219 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
59222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59223 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b60000 }
59225 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
59228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59229 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c60000 }
59231 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
59234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59235 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e60000 }
59237 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
59240 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59241 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f60000 }
59243 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
59246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59247 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f60000 }
59249 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
59252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59253 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c60000 }
59255 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
59258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59259 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e60000 }
59261 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
59264 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59265 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f60000 }
59267 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
59270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
59271 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f60000 }
59273 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
59276 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
59277 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c60000 }
59279 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
59282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59283 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e60000 }
59285 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
59288 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59289 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f60000 }
59291 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
59294 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
59295 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f60000 }
59297 /* cmp.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
59300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
59301 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6860000 }
59303 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
59306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
59307 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a60000 }
59309 /* cmp.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
59312 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
59313 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b60000 }
59315 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
59318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
59319 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b60000 }
59321 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59325 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8060000 }
59327 /* cmp.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
59330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59331 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8260000 }
59333 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59337 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0860000 }
59339 /* cmp.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
59342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59343 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a60000 }
59345 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59349 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0060000 }
59351 /* cmp.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
59354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59355 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0260000 }
59357 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
59360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59361 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2060000 }
59363 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
59366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59367 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2260000 }
59369 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
59372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59373 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4060000 }
59375 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
59378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59379 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4260000 }
59381 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
59384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59385 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6060000 }
59387 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
59390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59391 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6260000 }
59393 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
59396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
59397 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2860000 }
59399 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
59402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
59403 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a60000 }
59405 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
59408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
59409 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4860000 }
59411 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
59414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
59415 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a60000 }
59417 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
59420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
59421 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c60000 }
59423 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
59426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
59427 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e60000 }
59429 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
59432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
59433 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c60000 }
59435 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
59438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
59439 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e60000 }
59441 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
59444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
59445 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c60000 }
59447 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
59450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
59451 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e60000 }
59453 /* cmp.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
59456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
59457 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6860000 }
59459 /* cmp.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
59462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
59463 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a60000 }
59465 /* cmp.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
59468 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59469 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc806 }
59471 /* cmp.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
59474 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59475 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8826 }
59477 /* cmp.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
59480 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
59481 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8806 }
59483 /* cmp.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
59486 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59487 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc086 }
59489 /* cmp.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
59492 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59493 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a6 }
59495 /* cmp.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
59498 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
59499 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8086 }
59501 /* cmp.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
59504 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59505 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc006 }
59507 /* cmp.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
59510 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59511 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8026 }
59513 /* cmp.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
59516 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59517 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8006 }
59519 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
59522 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59523 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20600 }
59525 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
59528 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59529 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822600 }
59531 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
59534 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59535 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820600 }
59537 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
59540 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59541 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4060000 }
59543 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
59546 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59547 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84260000 }
59549 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
59552 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59553 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84060000 }
59555 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
59558 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59559 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6060000 }
59561 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
59564 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59565 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86260000 }
59567 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
59570 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
59571 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86060000 }
59573 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
59576 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59577 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28600 }
59579 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
59582 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59583 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a600 }
59585 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
59588 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
59589 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828600 }
59591 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
59594 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59595 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4860000 }
59597 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
59600 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59601 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a60000 }
59603 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
59606 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
59607 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84860000 }
59609 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
59612 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59613 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c600 }
59615 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
59618 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59619 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e600 }
59621 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
59624 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
59625 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c600 }
59627 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
59630 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59631 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c60000 }
59633 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
59636 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59637 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e60000 }
59639 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
59642 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
59643 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c60000 }
59645 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
59648 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
59649 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c60000 }
59651 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
59654 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
59655 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e60000 }
59657 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
59660 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
59661 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c60000 }
59663 /* cmp.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
59666 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
59667 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6860000 }
59669 /* cmp.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
59672 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
59673 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a60000 }
59675 /* cmp.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
59678 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
59679 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86860000 }
59681 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
59684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
59685 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xc18000 }
59687 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
59690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59691 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xc1a000 }
59693 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
59696 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59697 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xc1b000 }
59699 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
59702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
59703 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xc18400 }
59705 /* cmp.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
59708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59709 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xc1a400 }
59711 /* cmp.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
59714 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59715 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xc1b400 }
59717 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
59720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
59721 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xc18600 }
59723 /* cmp.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
59726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59727 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xc1a600 }
59729 /* cmp.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
59732 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59733 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xc1b600 }
59735 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
59738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59739 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1880000 }
59741 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
59744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59745 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1a80000 }
59747 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
59750 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
59751 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xc1b80000 }
59753 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
59756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59757 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xc18c0000 }
59759 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
59762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59763 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xc1ac0000 }
59765 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
59768 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
59769 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xc1bc0000 }
59771 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
59774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59775 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc18a0000 }
59777 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
59780 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59781 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc1aa0000 }
59783 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
59786 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
59787 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xc1ba0000 }
59789 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
59792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59793 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc18e0000 }
59795 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
59798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59799 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc1ae0000 }
59801 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
59804 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
59805 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xc1be0000 }
59807 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
59810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59811 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc18b0000 }
59813 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
59816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59817 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc1ab0000 }
59819 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
59822 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
59823 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xc1bb0000 }
59825 /* cmp.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
59828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
59829 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xc18f0000 }
59831 /* cmp.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
59834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59835 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xc1af0000 }
59837 /* cmp.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
59840 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
59841 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xc1bf0000 }
59843 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
59846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
59847 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xc1c00000 }
59849 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
59852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
59853 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xc1e00000 }
59855 /* cmp.w${G} ${Dsp-16-u16},$Dst16RnHI */
59858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
59859 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xc1f00000 }
59861 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
59864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
59865 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xc1c40000 }
59867 /* cmp.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
59870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
59871 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xc1e40000 }
59873 /* cmp.w${G} ${Dsp-16-u16},$Dst16AnHI */
59876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
59877 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xc1f40000 }
59879 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
59882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
59883 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xc1c60000 }
59885 /* cmp.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
59888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
59889 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xc1e60000 }
59891 /* cmp.w${G} ${Dsp-16-u16},[$Dst16An] */
59894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
59895 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xc1f60000 }
59897 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
59900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59901 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xc1c80000 }
59903 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
59906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59907 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xc1e80000 }
59909 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
59912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
59913 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xc1f80000 }
59915 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
59918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59919 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xc1cc0000 }
59921 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
59924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59925 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xc1ec0000 }
59927 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
59930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
59931 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xc1fc0000 }
59933 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
59936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59937 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xc1ca0000 }
59939 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
59942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59943 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xc1ea0000 }
59945 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
59948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
59949 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xc1fa0000 }
59951 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
59954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59955 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xc1ce0000 }
59957 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
59960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59961 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xc1ee0000 }
59963 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
59966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
59967 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xc1fe0000 }
59969 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
59972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59973 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xc1cb0000 }
59975 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
59978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59979 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xc1eb0000 }
59981 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
59984 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
59985 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xc1fb0000 }
59987 /* cmp.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
59990 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
59991 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xc1cf0000 }
59993 /* cmp.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
59996 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
59997 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xc1ef0000 }
59999 /* cmp.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
60002 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
60003 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xc1ff0000 }
60005 /* cmp.w${G} $Src16RnHI,$Dst16RnHI */
60008 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
60009 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xc100 }
60011 /* cmp.w${G} $Src16AnHI,$Dst16RnHI */
60014 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
60015 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xc140 }
60017 /* cmp.w${G} [$Src16An],$Dst16RnHI */
60020 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
60021 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xc160 }
60023 /* cmp.w${G} $Src16RnHI,$Dst16AnHI */
60026 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
60027 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xc104 }
60029 /* cmp.w${G} $Src16AnHI,$Dst16AnHI */
60032 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
60033 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xc144 }
60035 /* cmp.w${G} [$Src16An],$Dst16AnHI */
60038 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
60039 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xc164 }
60041 /* cmp.w${G} $Src16RnHI,[$Dst16An] */
60044 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
60045 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xc106 }
60047 /* cmp.w${G} $Src16AnHI,[$Dst16An] */
60050 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
60051 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xc146 }
60053 /* cmp.w${G} [$Src16An],[$Dst16An] */
60056 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60057 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xc166 }
60059 /* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
60062 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60063 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xc10800 }
60065 /* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
60068 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60069 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xc14800 }
60071 /* cmp.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
60074 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60075 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xc16800 }
60077 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
60080 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60081 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xc10c0000 }
60083 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
60086 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60087 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xc14c0000 }
60089 /* cmp.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
60092 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60093 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xc16c0000 }
60095 /* cmp.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
60098 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60099 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xc10a00 }
60101 /* cmp.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
60104 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60105 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xc14a00 }
60107 /* cmp.w${G} [$Src16An],${Dsp-16-u8}[sb] */
60110 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60111 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xc16a00 }
60113 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
60116 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60117 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xc10e0000 }
60119 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
60122 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60123 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xc14e0000 }
60125 /* cmp.w${G} [$Src16An],${Dsp-16-u16}[sb] */
60128 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60129 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xc16e0000 }
60131 /* cmp.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
60134 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60135 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xc10b00 }
60137 /* cmp.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
60140 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60141 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xc14b00 }
60143 /* cmp.w${G} [$Src16An],${Dsp-16-s8}[fb] */
60146 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60147 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xc16b00 }
60149 /* cmp.w${G} $Src16RnHI,${Dsp-16-u16} */
60152 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
60153 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xc10f0000 }
60155 /* cmp.w${G} $Src16AnHI,${Dsp-16-u16} */
60158 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
60159 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xc14f0000 }
60161 /* cmp.w${G} [$Src16An],${Dsp-16-u16} */
60164 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
60165 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xc16f0000 }
60167 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
60170 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60171 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xc08000 }
60173 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
60176 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60177 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xc0a000 }
60179 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
60182 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60183 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xc0b000 }
60185 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
60188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60189 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xc08400 }
60191 /* cmp.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
60194 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60195 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xc0a400 }
60197 /* cmp.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
60200 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60201 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xc0b400 }
60203 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
60206 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60207 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xc08600 }
60209 /* cmp.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
60212 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60213 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xc0a600 }
60215 /* cmp.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
60218 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60219 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xc0b600 }
60221 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
60224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60225 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0880000 }
60227 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
60230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60231 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0a80000 }
60233 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
60236 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
60237 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xc0b80000 }
60239 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
60242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60243 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xc08c0000 }
60245 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
60248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60249 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xc0ac0000 }
60251 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
60254 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
60255 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xc0bc0000 }
60257 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
60260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60261 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc08a0000 }
60263 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
60266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60267 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc0aa0000 }
60269 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
60272 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
60273 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xc0ba0000 }
60275 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
60278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60279 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc08e0000 }
60281 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
60284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60285 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc0ae0000 }
60287 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
60290 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
60291 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xc0be0000 }
60293 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
60296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60297 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc08b0000 }
60299 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
60302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60303 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc0ab0000 }
60305 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
60308 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
60309 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xc0bb0000 }
60311 /* cmp.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
60314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
60315 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xc08f0000 }
60317 /* cmp.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
60320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
60321 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xc0af0000 }
60323 /* cmp.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
60326 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
60327 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xc0bf0000 }
60329 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
60332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60333 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xc0c00000 }
60335 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
60338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
60339 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xc0e00000 }
60341 /* cmp.b${G} ${Dsp-16-u16},$Dst16RnQI */
60344 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
60345 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xc0f00000 }
60347 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
60350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60351 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xc0c40000 }
60353 /* cmp.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
60356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
60357 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xc0e40000 }
60359 /* cmp.b${G} ${Dsp-16-u16},$Dst16AnQI */
60362 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
60363 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xc0f40000 }
60365 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
60368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60369 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xc0c60000 }
60371 /* cmp.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
60374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
60375 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xc0e60000 }
60377 /* cmp.b${G} ${Dsp-16-u16},[$Dst16An] */
60380 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
60381 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xc0f60000 }
60383 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
60386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60387 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xc0c80000 }
60389 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
60392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60393 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xc0e80000 }
60395 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
60398 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
60399 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xc0f80000 }
60401 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
60404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60405 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xc0cc0000 }
60407 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
60410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60411 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xc0ec0000 }
60413 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
60416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
60417 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xc0fc0000 }
60419 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
60422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60423 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xc0ca0000 }
60425 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
60428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60429 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xc0ea0000 }
60431 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
60434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
60435 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xc0fa0000 }
60437 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
60440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60441 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xc0ce0000 }
60443 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
60446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60447 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xc0ee0000 }
60449 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
60452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
60453 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xc0fe0000 }
60455 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
60458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60459 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xc0cb0000 }
60461 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
60464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60465 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xc0eb0000 }
60467 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
60470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
60471 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xc0fb0000 }
60473 /* cmp.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
60476 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
60477 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xc0cf0000 }
60479 /* cmp.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
60482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
60483 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xc0ef0000 }
60485 /* cmp.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
60488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
60489 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xc0ff0000 }
60491 /* cmp.b${G} $Src16RnQI,$Dst16RnQI */
60494 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
60495 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xc000 }
60497 /* cmp.b${G} $Src16AnQI,$Dst16RnQI */
60500 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
60501 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xc040 }
60503 /* cmp.b${G} [$Src16An],$Dst16RnQI */
60506 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
60507 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xc060 }
60509 /* cmp.b${G} $Src16RnQI,$Dst16AnQI */
60512 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
60513 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xc004 }
60515 /* cmp.b${G} $Src16AnQI,$Dst16AnQI */
60518 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
60519 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xc044 }
60521 /* cmp.b${G} [$Src16An],$Dst16AnQI */
60524 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
60525 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xc064 }
60527 /* cmp.b${G} $Src16RnQI,[$Dst16An] */
60530 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
60531 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xc006 }
60533 /* cmp.b${G} $Src16AnQI,[$Dst16An] */
60536 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
60537 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xc046 }
60539 /* cmp.b${G} [$Src16An],[$Dst16An] */
60542 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
60543 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xc066 }
60545 /* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
60548 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60549 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xc00800 }
60551 /* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
60554 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60555 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xc04800 }
60557 /* cmp.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
60560 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60561 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xc06800 }
60563 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
60566 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60567 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xc00c0000 }
60569 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
60572 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60573 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xc04c0000 }
60575 /* cmp.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
60578 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60579 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xc06c0000 }
60581 /* cmp.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
60584 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60585 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xc00a00 }
60587 /* cmp.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
60590 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60591 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xc04a00 }
60593 /* cmp.b${G} [$Src16An],${Dsp-16-u8}[sb] */
60596 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60597 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xc06a00 }
60599 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
60602 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60603 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xc00e0000 }
60605 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
60608 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60609 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xc04e0000 }
60611 /* cmp.b${G} [$Src16An],${Dsp-16-u16}[sb] */
60614 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60615 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xc06e0000 }
60617 /* cmp.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
60620 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60621 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xc00b00 }
60623 /* cmp.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
60626 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60627 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xc04b00 }
60629 /* cmp.b${G} [$Src16An],${Dsp-16-s8}[fb] */
60632 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60633 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xc06b00 }
60635 /* cmp.b${G} $Src16RnQI,${Dsp-16-u16} */
60638 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
60639 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xc00f0000 }
60641 /* cmp.b${G} $Src16AnQI,${Dsp-16-u16} */
60644 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
60645 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xc04f0000 }
60647 /* cmp.b${G} [$Src16An],${Dsp-16-u16} */
60650 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
60651 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xc06f0000 }
60653 /* cmp.b${S} #${Imm-8-QI},r0l */
60656 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
60657 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0xe400 }
60659 /* cmp.b${S} #${Imm-8-QI},r0h */
60662 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
60663 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0xe300 }
60665 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
60668 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60669 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0xe50000 }
60671 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
60674 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60675 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0xe60000 }
60677 /* cmp.b${S} #${Imm-8-QI},${Dsp-16-u16} */
60680 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
60681 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0xe7000000 }
60683 /* cmp.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
60686 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
60687 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe910 }
60689 /* cmp.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
60692 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
60693 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe190 }
60695 /* cmp.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
60698 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60699 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe110 }
60701 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60704 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60705 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe31000 }
60707 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60710 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60711 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5100000 }
60713 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60716 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60717 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7100000 }
60719 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
60722 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60723 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe39000 }
60725 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
60728 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60729 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5900000 }
60731 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
60734 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60735 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3d000 }
60737 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
60740 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60741 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5d00000 }
60743 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
60746 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
60747 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7d00000 }
60749 /* cmp.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
60752 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
60753 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7900000 }
60755 /* cmp.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
60758 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
60759 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe810 }
60761 /* cmp.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
60764 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
60765 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe090 }
60767 /* cmp.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
60770 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60771 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe010 }
60773 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60776 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60777 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe21000 }
60779 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60782 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60783 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4100000 }
60785 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60788 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60789 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6100000 }
60791 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
60794 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60795 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe29000 }
60797 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
60800 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60801 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4900000 }
60803 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
60806 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60807 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2d000 }
60809 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
60812 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60813 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4d00000 }
60815 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
60818 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
60819 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6d00000 }
60821 /* cmp.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
60824 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
60825 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6900000 }
60827 /* cmp.w${Q} #${Imm-8-s4},$Dst16RnHI */
60830 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
60831 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xd100 }
60833 /* cmp.w${Q} #${Imm-8-s4},$Dst16AnHI */
60836 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
60837 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xd104 }
60839 /* cmp.w${Q} #${Imm-8-s4},[$Dst16An] */
60842 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
60843 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xd106 }
60845 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
60848 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60849 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xd10800 }
60851 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
60854 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60855 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xd10c0000 }
60857 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
60860 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60861 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xd10a00 }
60863 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
60866 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60867 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xd10e0000 }
60869 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
60872 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60873 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xd10b00 }
60875 /* cmp.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
60878 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
60879 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xd10f0000 }
60881 /* cmp.b${Q} #${Imm-8-s4},$Dst16RnQI */
60884 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
60885 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xd000 }
60887 /* cmp.b${Q} #${Imm-8-s4},$Dst16AnQI */
60890 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
60891 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xd004 }
60893 /* cmp.b${Q} #${Imm-8-s4},[$Dst16An] */
60896 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
60897 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xd006 }
60899 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
60902 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
60903 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xd00800 }
60905 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
60908 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
60909 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xd00c0000 }
60911 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
60914 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60915 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xd00a00 }
60917 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
60920 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60921 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xd00e0000 }
60923 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
60926 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60927 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xd00b00 }
60929 /* cmp.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
60932 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
60933 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xd00f0000 }
60935 /* cmp.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
60938 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
60939 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x992e0000 }
60941 /* cmp.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
60944 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
60945 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x91ae0000 }
60947 /* cmp.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
60950 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60951 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x912e0000 }
60953 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
60956 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60957 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x932e0000 }
60959 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
60962 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
60963 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x93ae0000 }
60965 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
60968 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
60969 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x93ee0000 }
60971 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
60974 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60975 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x952e0000 }
60977 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
60980 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
60981 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x95ae0000 }
60983 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
60986 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
60987 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x95ee0000 }
60989 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
60992 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
60993 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x97ee0000 }
60995 /* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
60998 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
60999 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x972e0000 }
61001 /* cmp.w${G} #${Imm-40-HI},${Dsp-16-u24} */
61004 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
61005 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x97ae0000 }
61007 /* cmp.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
61010 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
61011 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x982e00 }
61013 /* cmp.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
61016 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
61017 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x90ae00 }
61019 /* cmp.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
61022 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61023 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x902e00 }
61025 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
61028 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61029 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x922e0000 }
61031 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
61034 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61035 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x92ae0000 }
61037 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
61040 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61041 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x92ee0000 }
61043 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
61046 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61047 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x942e0000 }
61049 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
61052 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61053 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x94ae0000 }
61055 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
61058 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
61059 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x94ee0000 }
61061 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
61064 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
61065 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x96ee0000 }
61067 /* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
61070 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61071 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x962e0000 }
61073 /* cmp.b${G} #${Imm-40-QI},${Dsp-16-u24} */
61076 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
61077 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x96ae0000 }
61079 /* cmp.w${G} #${Imm-16-HI},$Dst16RnHI */
61082 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
61083 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77800000 }
61085 /* cmp.w${G} #${Imm-16-HI},$Dst16AnHI */
61088 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
61089 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77840000 }
61091 /* cmp.w${G} #${Imm-16-HI},[$Dst16An] */
61094 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
61095 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77860000 }
61097 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
61100 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
61101 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77880000 }
61103 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
61106 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61107 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x778a0000 }
61109 /* cmp.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
61112 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61113 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x778b0000 }
61115 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
61118 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
61119 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x778c0000 }
61121 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
61124 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61125 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x778e0000 }
61127 /* cmp.w${G} #${Imm-32-HI},${Dsp-16-u16} */
61130 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
61131 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x778f0000 }
61133 /* cmp.b${G} #${Imm-16-QI},$Dst16RnQI */
61136 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
61137 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x768000 }
61139 /* cmp.b${G} #${Imm-16-QI},$Dst16AnQI */
61142 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
61143 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x768400 }
61145 /* cmp.b${G} #${Imm-16-QI},[$Dst16An] */
61148 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
61149 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x768600 }
61151 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
61154 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
61155 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76880000 }
61157 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
61160 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61161 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x768a0000 }
61163 /* cmp.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
61166 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61167 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x768b0000 }
61169 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
61172 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
61173 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x768c0000 }
61175 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
61178 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61179 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x768e0000 }
61181 /* cmp.b${G} #${Imm-32-QI},${Dsp-16-u16} */
61184 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
61185 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x768f0000 }
61187 /* cmp.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
61190 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
61191 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xa8310000 }
61193 /* cmp.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
61196 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
61197 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xa0b10000 }
61199 /* cmp.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
61202 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61203 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xa0310000 }
61205 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
61208 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61209 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xa2310000 }
61211 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
61214 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
61215 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xa2b10000 }
61217 /* cmp.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
61220 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
61221 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xa2f10000 }
61223 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
61226 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61227 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xa4310000 }
61229 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
61232 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
61233 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xa4b10000 }
61235 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
61238 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
61239 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xa4f10000 }
61241 /* cmp.l${G} #${Imm-32-SI},${Dsp-16-u16} */
61244 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
61245 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xa6f10000 }
61247 /* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
61250 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
61251 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xa6310000 }
61253 /* cmp.l${G} #${Imm-40-SI},${Dsp-16-u24} */
61256 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
61257 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xa6b10000 }
61259 /* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32RnPrefixedHI */
61262 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
61263 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1893e00 }
61265 /* clip.w #${Imm-24-HI},#${Imm-40-HI},$Dst32AnPrefixedHI */
61268 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
61269 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181be00 }
61271 /* clip.w #${Imm-24-HI},#${Imm-40-HI},[$Dst32AnPrefixed] */
61274 { { MNEM
, ' ', '#', OP (IMM_24_HI
), ',', '#', OP (IMM_40_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
61275 & ifmt_clip32_w_Imm_24_HI_Imm_40_HI_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1813e00 }
61277 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
61280 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61281 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1833e00 }
61283 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-u8}[sb] */
61286 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
61287 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183be00 }
61289 /* clip.w #${Imm-32-HI},#${Imm-48-HI},${Dsp-24-s8}[fb] */
61292 { { MNEM
, ' ', '#', OP (IMM_32_HI
), ',', '#', OP (IMM_48_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
61293 & ifmt_clip32_w_Imm_32_HI_Imm_48_HI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183fe00 }
61295 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
61298 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61299 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1853e00 }
61301 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16}[sb] */
61304 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
61305 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185be00 }
61307 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-s16}[fb] */
61310 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
61311 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185fe00 }
61313 /* clip.w #${Imm-40-HI},#${Imm-56-HI},${Dsp-24-u16} */
61316 { { MNEM
, ' ', '#', OP (IMM_40_HI
), ',', '#', OP (IMM_56_HI
), ',', OP (DSP_24_U16
), 0 } },
61317 & ifmt_clip32_w_Imm_40_HI_Imm_56_HI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187fe00 }
61319 /* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
61322 { { MNEM
, ' ', '#', OP (IMM_48_HI
), ',', '#', OP (IMM_64_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61323 & ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1873e00 }
61325 /* clip.w #${Imm-48-HI},#${Imm-64-HI},${Dsp-24-u24} */
61328 { { MNEM
, ' ', '#', OP (IMM_48_HI
), ',', '#', OP (IMM_64_HI
), ',', OP (DSP_24_U24
), 0 } },
61329 & ifmt_clip32_w_Imm_48_HI_Imm_64_HI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187be00 }
61331 /* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32RnPrefixedQI */
61334 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
61335 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1883e00 }
61337 /* clip.b #${Imm-24-QI},#${Imm-32-QI},$Dst32AnPrefixedQI */
61340 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
61341 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180be00 }
61343 /* clip.b #${Imm-24-QI},#${Imm-32-QI},[$Dst32AnPrefixed] */
61346 { { MNEM
, ' ', '#', OP (IMM_24_QI
), ',', '#', OP (IMM_32_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
61347 & ifmt_clip32_b_Imm_24_QI_Imm_32_QI_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1803e00 }
61349 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
61352 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61353 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1823e00 }
61355 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-u8}[sb] */
61358 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
61359 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182be00 }
61361 /* clip.b #${Imm-32-QI},#${Imm-40-QI},${Dsp-24-s8}[fb] */
61364 { { MNEM
, ' ', '#', OP (IMM_32_QI
), ',', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
61365 & ifmt_clip32_b_Imm_32_QI_Imm_40_QI_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182fe00 }
61367 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
61370 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61371 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1843e00 }
61373 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16}[sb] */
61376 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
61377 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184be00 }
61379 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-s16}[fb] */
61382 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
61383 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184fe00 }
61385 /* clip.b #${Imm-40-QI},#${Imm-48-QI},${Dsp-24-u16} */
61388 { { MNEM
, ' ', '#', OP (IMM_40_QI
), ',', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U16
), 0 } },
61389 & ifmt_clip32_b_Imm_40_QI_Imm_48_QI_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186fe00 }
61391 /* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
61394 { { MNEM
, ' ', '#', OP (IMM_48_QI
), ',', '#', OP (IMM_56_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
61395 & ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1863e00 }
61397 /* clip.b #${Imm-48-QI},#${Imm-56-QI},${Dsp-24-u24} */
61400 { { MNEM
, ' ', '#', OP (IMM_48_QI
), ',', '#', OP (IMM_56_QI
), ',', OP (DSP_24_U24
), 0 } },
61401 & ifmt_clip32_b_Imm_48_QI_Imm_56_QI_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186be00 }
61403 /* bxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
61406 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
61407 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d828 }
61409 /* bxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
61412 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
61413 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0a8 }
61415 /* bxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
61418 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61419 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d028 }
61421 /* bxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
61424 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61425 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d22800 }
61427 /* bxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
61430 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61431 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d42800 }
61433 /* bxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
61436 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
61437 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d62800 }
61439 /* bxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
61442 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
61443 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2a800 }
61445 /* bxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
61448 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
61449 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4a800 }
61451 /* bxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
61454 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
61455 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2e800 }
61457 /* bxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
61460 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
61461 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4e800 }
61463 /* bxor${X} ${BitBase32-24-u19-Prefixed} */
61466 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
61467 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6e800 }
61469 /* bxor${X} ${BitBase32-24-u27-Prefixed} */
61472 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
61473 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6a800 }
61475 /* bxor${X} $Bitno16R,$Bit16Rn */
61478 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61479 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ec000 }
61481 /* bxor${X} $Bitno16R,$Bit16An */
61484 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61485 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ec400 }
61487 /* bxor${X} [$Bit16An] */
61490 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61491 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ec6 }
61493 /* bxor${X} ${Dsp-16-u8}[$Bit16An] */
61496 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61497 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ec800 }
61499 /* bxor${X} ${Dsp-16-u16}[$Bit16An] */
61502 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61503 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7ecc0000 }
61505 /* bxor${X} ${BitBase16-16-u8}[sb] */
61508 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61509 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eca00 }
61511 /* bxor${X} ${BitBase16-16-u16}[sb] */
61514 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61515 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ece0000 }
61517 /* bxor${X} ${BitBase16-16-s8}[fb] */
61520 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61521 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7ecb00 }
61523 /* bxor${X} ${BitBase16-16-u16} */
61526 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61527 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7ecf0000 }
61529 /* btsts${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61532 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61533 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd828 }
61535 /* btsts${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61538 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61539 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0a8 }
61541 /* btsts${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61544 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61545 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd028 }
61547 /* btsts${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61550 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61551 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd22800 }
61553 /* btsts${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61556 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61557 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4280000 }
61559 /* btsts${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61562 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61563 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6280000 }
61565 /* btsts${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61568 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61569 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2a800 }
61571 /* btsts${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61574 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61575 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4a80000 }
61577 /* btsts${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61580 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61581 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2e800 }
61583 /* btsts${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61586 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61587 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4e80000 }
61589 /* btsts${X} ${BitBase32-16-u19-Unprefixed} */
61592 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61593 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6e80000 }
61595 /* btsts${X} ${BitBase32-16-u27-Unprefixed} */
61598 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61599 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6a80000 }
61601 /* btsts${X} $Bitno16R,$Bit16Rn */
61604 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61605 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e1000 }
61607 /* btsts${X} $Bitno16R,$Bit16An */
61610 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61611 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e1400 }
61613 /* btsts${X} [$Bit16An] */
61616 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61617 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e16 }
61619 /* btsts${X} ${Dsp-16-u8}[$Bit16An] */
61622 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61623 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e1800 }
61625 /* btsts${X} ${Dsp-16-u16}[$Bit16An] */
61628 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61629 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e1c0000 }
61631 /* btsts${X} ${BitBase16-16-u8}[sb] */
61634 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61635 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e1a00 }
61637 /* btsts${X} ${BitBase16-16-u16}[sb] */
61640 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61641 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e1e0000 }
61643 /* btsts${X} ${BitBase16-16-s8}[fb] */
61646 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61647 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e1b00 }
61649 /* btsts${X} ${BitBase16-16-u16} */
61652 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61653 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e1f0000 }
61655 /* btstc${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61658 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61659 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd820 }
61661 /* btstc${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61664 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61665 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0a0 }
61667 /* btstc${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61670 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61671 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd020 }
61673 /* btstc${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61676 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61677 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd22000 }
61679 /* btstc${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61682 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61683 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4200000 }
61685 /* btstc${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61688 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61689 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6200000 }
61691 /* btstc${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61694 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61695 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2a000 }
61697 /* btstc${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61700 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61701 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4a00000 }
61703 /* btstc${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61706 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61707 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2e000 }
61709 /* btstc${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61712 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61713 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4e00000 }
61715 /* btstc${X} ${BitBase32-16-u19-Unprefixed} */
61718 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61719 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6e00000 }
61721 /* btstc${X} ${BitBase32-16-u27-Unprefixed} */
61724 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61725 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6a00000 }
61727 /* btstc${X} $Bitno16R,$Bit16Rn */
61730 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61731 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e0000 }
61733 /* btstc${X} $Bitno16R,$Bit16An */
61736 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61737 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e0400 }
61739 /* btstc${X} [$Bit16An] */
61742 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61743 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e06 }
61745 /* btstc${X} ${Dsp-16-u8}[$Bit16An] */
61748 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61749 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e0800 }
61751 /* btstc${X} ${Dsp-16-u16}[$Bit16An] */
61754 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61755 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e0c0000 }
61757 /* btstc${X} ${BitBase16-16-u8}[sb] */
61760 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61761 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e0a00 }
61763 /* btstc${X} ${BitBase16-16-u16}[sb] */
61766 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61767 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e0e0000 }
61769 /* btstc${X} ${BitBase16-16-s8}[fb] */
61772 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61773 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e0b00 }
61775 /* btstc${X} ${BitBase16-16-u16} */
61778 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
61779 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e0f0000 }
61781 /* btst${G} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61784 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61785 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd800 }
61787 /* btst${G} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61790 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61791 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd080 }
61793 /* btst${G} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61796 { { MNEM
, OP (G
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61797 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd000 }
61799 /* btst${G} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61802 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61803 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd20000 }
61805 /* btst${G} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61808 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61809 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4000000 }
61811 /* btst${G} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61814 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61815 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6000000 }
61817 /* btst${G} ${BitBase32-16-u11-Unprefixed}[sb] */
61820 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61821 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd28000 }
61823 /* btst${G} ${BitBase32-16-u19-Unprefixed}[sb] */
61826 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61827 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4800000 }
61829 /* btst${G} ${BitBase32-16-s11-Unprefixed}[fb] */
61832 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61833 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2c000 }
61835 /* btst${G} ${BitBase32-16-s19-Unprefixed}[fb] */
61838 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61839 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4c00000 }
61841 /* btst${G} ${BitBase32-16-u19-Unprefixed} */
61844 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61845 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6c00000 }
61847 /* btst${G} ${BitBase32-16-u27-Unprefixed} */
61850 { { MNEM
, OP (G
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61851 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6800000 }
61853 /* btst${G} $Bitno16R,$Bit16Rn */
61856 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61857 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7eb000 }
61859 /* btst${G} $Bitno16R,$Bit16An */
61862 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61863 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7eb400 }
61865 /* btst${G} ${Dsp-16-u8}[$Bit16An] */
61868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
61869 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7eb800 }
61871 /* btst${G} ${BitBase16-16-u8}[sb] */
61874 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
61875 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eba00 }
61877 /* btst${G} ${BitBase16-16-s8}[fb] */
61880 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
61881 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7ebb00 }
61883 /* btst${S} ${BitBase16-8-u11-S}[sb] */
61886 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
61887 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x5800 }
61889 /* btst${G} ${Dsp-16-u16}[$Bit16An] */
61892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
61893 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7ebc0000 }
61895 /* btst${G} ${BitBase16-16-u16}[sb] */
61898 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
61899 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ebe0000 }
61901 /* btst${G} ${BitBase16-16-u16} */
61904 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
61905 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7ebf0000 }
61907 /* btst${G} [$Bit16An] */
61910 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
61911 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7eb6 }
61913 /* bset${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
61916 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
61917 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd838 }
61919 /* bset${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
61922 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
61923 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0b8 }
61925 /* bset${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
61928 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61929 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd038 }
61931 /* bset${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
61934 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61935 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd23800 }
61937 /* bset${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
61940 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61941 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4380000 }
61943 /* bset${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
61946 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
61947 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6380000 }
61949 /* bset${X} ${BitBase32-16-u11-Unprefixed}[sb] */
61952 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61953 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2b800 }
61955 /* bset${X} ${BitBase32-16-u19-Unprefixed}[sb] */
61958 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
61959 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4b80000 }
61961 /* bset${X} ${BitBase32-16-s11-Unprefixed}[fb] */
61964 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61965 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2f800 }
61967 /* bset${X} ${BitBase32-16-s19-Unprefixed}[fb] */
61970 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
61971 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4f80000 }
61973 /* bset${X} ${BitBase32-16-u19-Unprefixed} */
61976 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
61977 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6f80000 }
61979 /* bset${X} ${BitBase32-16-u27-Unprefixed} */
61982 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
61983 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6b80000 }
61985 /* bset${G} $Bitno16R,$Bit16Rn */
61988 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
61989 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e9000 }
61991 /* bset${G} $Bitno16R,$Bit16An */
61994 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
61995 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e9400 }
61997 /* bset${G} ${Dsp-16-u8}[$Bit16An] */
62000 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62001 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e9800 }
62003 /* bset${G} ${BitBase16-16-u8}[sb] */
62006 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62007 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e9a00 }
62009 /* bset${G} ${BitBase16-16-s8}[fb] */
62012 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62013 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e9b00 }
62015 /* bset${S} ${BitBase16-8-u11-S}[sb] */
62018 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
62019 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x4800 }
62021 /* bset${G} ${Dsp-16-u16}[$Bit16An] */
62024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62025 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e9c0000 }
62027 /* bset${G} ${BitBase16-16-u16}[sb] */
62030 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62031 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e9e0000 }
62033 /* bset${G} ${BitBase16-16-u16} */
62036 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
62037 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e9f0000 }
62039 /* bset${G} [$Bit16An] */
62042 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62043 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e96 }
62045 /* bor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62048 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62049 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d820 }
62051 /* bor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62054 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62055 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0a0 }
62057 /* bor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62060 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62061 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d020 }
62063 /* bor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62066 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62067 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d22000 }
62069 /* bor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62072 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62073 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d42000 }
62075 /* bor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62078 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62079 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d62000 }
62081 /* bor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62084 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62085 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2a000 }
62087 /* bor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62090 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62091 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4a000 }
62093 /* bor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62096 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62097 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2e000 }
62099 /* bor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62102 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62103 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4e000 }
62105 /* bor${X} ${BitBase32-24-u19-Prefixed} */
62108 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62109 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6e000 }
62111 /* bor${X} ${BitBase32-24-u27-Prefixed} */
62114 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62115 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6a000 }
62117 /* bor${X} $Bitno16R,$Bit16Rn */
62120 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62121 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e6000 }
62123 /* bor${X} $Bitno16R,$Bit16An */
62126 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62127 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e6400 }
62129 /* bor${X} [$Bit16An] */
62132 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62133 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e66 }
62135 /* bor${X} ${Dsp-16-u8}[$Bit16An] */
62138 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62139 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e6800 }
62141 /* bor${X} ${Dsp-16-u16}[$Bit16An] */
62144 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62145 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e6c0000 }
62147 /* bor${X} ${BitBase16-16-u8}[sb] */
62150 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62151 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e6a00 }
62153 /* bor${X} ${BitBase16-16-u16}[sb] */
62156 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62157 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e6e0000 }
62159 /* bor${X} ${BitBase16-16-s8}[fb] */
62162 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62163 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e6b00 }
62165 /* bor${X} ${BitBase16-16-u16} */
62168 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62169 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e6f0000 }
62171 /* bnxor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62174 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62175 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d838 }
62177 /* bnxor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62180 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62181 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0b8 }
62183 /* bnxor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62186 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62187 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d038 }
62189 /* bnxor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62192 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62193 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d23800 }
62195 /* bnxor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62198 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62199 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d43800 }
62201 /* bnxor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62204 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62205 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d63800 }
62207 /* bnxor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62210 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62211 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2b800 }
62213 /* bnxor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62216 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62217 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4b800 }
62219 /* bnxor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62222 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62223 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2f800 }
62225 /* bnxor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62228 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62229 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4f800 }
62231 /* bnxor${X} ${BitBase32-24-u19-Prefixed} */
62234 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62235 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6f800 }
62237 /* bnxor${X} ${BitBase32-24-u27-Prefixed} */
62240 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62241 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6b800 }
62243 /* bnxor${X} $Bitno16R,$Bit16Rn */
62246 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62247 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ed000 }
62249 /* bnxor${X} $Bitno16R,$Bit16An */
62252 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62253 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ed400 }
62255 /* bnxor${X} [$Bit16An] */
62258 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62259 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ed6 }
62261 /* bnxor${X} ${Dsp-16-u8}[$Bit16An] */
62264 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62265 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ed800 }
62267 /* bnxor${X} ${Dsp-16-u16}[$Bit16An] */
62270 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62271 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7edc0000 }
62273 /* bnxor${X} ${BitBase16-16-u8}[sb] */
62276 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62277 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eda00 }
62279 /* bnxor${X} ${BitBase16-16-u16}[sb] */
62282 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62283 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7ede0000 }
62285 /* bnxor${X} ${BitBase16-16-s8}[fb] */
62288 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62289 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7edb00 }
62291 /* bnxor${X} ${BitBase16-16-u16} */
62294 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62295 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7edf0000 }
62297 /* bntst${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62300 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62301 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d800 }
62303 /* bntst${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62306 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62307 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d080 }
62309 /* bntst${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62312 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62313 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d000 }
62315 /* bntst${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62318 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62319 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d20000 }
62321 /* bntst${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62324 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62325 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d40000 }
62327 /* bntst${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62330 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62331 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d60000 }
62333 /* bntst${X} ${BitBase32-24-u11-Prefixed}[sb] */
62336 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62337 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d28000 }
62339 /* bntst${X} ${BitBase32-24-u19-Prefixed}[sb] */
62342 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62343 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d48000 }
62345 /* bntst${X} ${BitBase32-24-s11-Prefixed}[fb] */
62348 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62349 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2c000 }
62351 /* bntst${X} ${BitBase32-24-s19-Prefixed}[fb] */
62354 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62355 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4c000 }
62357 /* bntst${X} ${BitBase32-24-u19-Prefixed} */
62360 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62361 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6c000 }
62363 /* bntst${X} ${BitBase32-24-u27-Prefixed} */
62366 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62367 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d68000 }
62369 /* bntst${X} $Bitno16R,$Bit16Rn */
62372 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62373 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e3000 }
62375 /* bntst${X} $Bitno16R,$Bit16An */
62378 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62379 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e3400 }
62381 /* bntst${X} [$Bit16An] */
62384 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62385 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e36 }
62387 /* bntst${X} ${Dsp-16-u8}[$Bit16An] */
62390 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62391 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e3800 }
62393 /* bntst${X} ${Dsp-16-u16}[$Bit16An] */
62396 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62397 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e3c0000 }
62399 /* bntst${X} ${BitBase16-16-u8}[sb] */
62402 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62403 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e3a00 }
62405 /* bntst${X} ${BitBase16-16-u16}[sb] */
62408 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62409 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e3e0000 }
62411 /* bntst${X} ${BitBase16-16-s8}[fb] */
62414 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62415 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e3b00 }
62417 /* bntst${X} ${BitBase16-16-u16} */
62420 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62421 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e3f0000 }
62423 /* bnot${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
62426 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
62427 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd818 }
62429 /* bnot${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
62432 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
62433 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd098 }
62435 /* bnot${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
62438 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62439 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd018 }
62441 /* bnot${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
62444 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62445 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd21800 }
62447 /* bnot${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
62450 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62451 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4180000 }
62453 /* bnot${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
62456 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62457 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6180000 }
62459 /* bnot${X} ${BitBase32-16-u11-Unprefixed}[sb] */
62462 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62463 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd29800 }
62465 /* bnot${X} ${BitBase32-16-u19-Unprefixed}[sb] */
62468 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62469 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4980000 }
62471 /* bnot${X} ${BitBase32-16-s11-Unprefixed}[fb] */
62474 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62475 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2d800 }
62477 /* bnot${X} ${BitBase32-16-s19-Unprefixed}[fb] */
62480 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62481 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4d80000 }
62483 /* bnot${X} ${BitBase32-16-u19-Unprefixed} */
62486 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
62487 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6d80000 }
62489 /* bnot${X} ${BitBase32-16-u27-Unprefixed} */
62492 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
62493 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6980000 }
62495 /* bnot${G} $Bitno16R,$Bit16Rn */
62498 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62499 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7ea000 }
62501 /* bnot${G} $Bitno16R,$Bit16An */
62504 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62505 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7ea400 }
62507 /* bnot${G} ${Dsp-16-u8}[$Bit16An] */
62510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62511 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7ea800 }
62513 /* bnot${G} ${BitBase16-16-u8}[sb] */
62516 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62517 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7eaa00 }
62519 /* bnot${G} ${BitBase16-16-s8}[fb] */
62522 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62523 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7eab00 }
62525 /* bnot${S} ${BitBase16-8-u11-S}[sb] */
62528 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
62529 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x5000 }
62531 /* bnot${G} ${Dsp-16-u16}[$Bit16An] */
62534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62535 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7eac0000 }
62537 /* bnot${G} ${BitBase16-16-u16}[sb] */
62540 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62541 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7eae0000 }
62543 /* bnot${G} ${BitBase16-16-u16} */
62546 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
62547 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7eaf0000 }
62549 /* bnot${G} [$Bit16An] */
62552 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62553 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7ea6 }
62555 /* bnor${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62558 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62559 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d830 }
62561 /* bnor${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62564 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62565 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d0b0 }
62567 /* bnor${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62570 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62571 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d030 }
62573 /* bnor${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62576 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62577 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d23000 }
62579 /* bnor${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62582 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62583 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d43000 }
62585 /* bnor${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62588 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62589 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d63000 }
62591 /* bnor${X} ${BitBase32-24-u11-Prefixed}[sb] */
62594 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62595 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d2b000 }
62597 /* bnor${X} ${BitBase32-24-u19-Prefixed}[sb] */
62600 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62601 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d4b000 }
62603 /* bnor${X} ${BitBase32-24-s11-Prefixed}[fb] */
62606 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62607 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2f000 }
62609 /* bnor${X} ${BitBase32-24-s19-Prefixed}[fb] */
62612 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62613 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4f000 }
62615 /* bnor${X} ${BitBase32-24-u19-Prefixed} */
62618 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62619 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6f000 }
62621 /* bnor${X} ${BitBase32-24-u27-Prefixed} */
62624 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62625 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d6b000 }
62627 /* bnor${X} $Bitno16R,$Bit16Rn */
62630 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62631 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e7000 }
62633 /* bnor${X} $Bitno16R,$Bit16An */
62636 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62637 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e7400 }
62639 /* bnor${X} [$Bit16An] */
62642 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62643 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e76 }
62645 /* bnor${X} ${Dsp-16-u8}[$Bit16An] */
62648 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62649 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e7800 }
62651 /* bnor${X} ${Dsp-16-u16}[$Bit16An] */
62654 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62655 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e7c0000 }
62657 /* bnor${X} ${BitBase16-16-u8}[sb] */
62660 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62661 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e7a00 }
62663 /* bnor${X} ${BitBase16-16-u16}[sb] */
62666 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62667 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e7e0000 }
62669 /* bnor${X} ${BitBase16-16-s8}[fb] */
62672 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62673 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e7b00 }
62675 /* bnor${X} ${BitBase16-16-u16} */
62678 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62679 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e7f0000 }
62681 /* bnand${X} $Bitno32Prefixed,$Bit32RnPrefixed */
62684 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
62685 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d818 }
62687 /* bnand${X} $Bitno32Prefixed,$Bit32AnPrefixed */
62690 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
62691 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d098 }
62693 /* bnand${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
62696 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62697 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d018 }
62699 /* bnand${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
62702 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62703 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d21800 }
62705 /* bnand${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
62708 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62709 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d41800 }
62711 /* bnand${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
62714 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
62715 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d61800 }
62717 /* bnand${X} ${BitBase32-24-u11-Prefixed}[sb] */
62720 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
62721 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d29800 }
62723 /* bnand${X} ${BitBase32-24-u19-Prefixed}[sb] */
62726 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
62727 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d49800 }
62729 /* bnand${X} ${BitBase32-24-s11-Prefixed}[fb] */
62732 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62733 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2d800 }
62735 /* bnand${X} ${BitBase32-24-s19-Prefixed}[fb] */
62738 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
62739 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4d800 }
62741 /* bnand${X} ${BitBase32-24-u19-Prefixed} */
62744 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
62745 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6d800 }
62747 /* bnand${X} ${BitBase32-24-u27-Prefixed} */
62750 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
62751 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d69800 }
62753 /* bnand${X} $Bitno16R,$Bit16Rn */
62756 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62757 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e5000 }
62759 /* bnand${X} $Bitno16R,$Bit16An */
62762 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62763 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e5400 }
62765 /* bnand${X} [$Bit16An] */
62768 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62769 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e56 }
62771 /* bnand${X} ${Dsp-16-u8}[$Bit16An] */
62774 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62775 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e5800 }
62777 /* bnand${X} ${Dsp-16-u16}[$Bit16An] */
62780 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62781 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e5c0000 }
62783 /* bnand${X} ${BitBase16-16-u8}[sb] */
62786 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62787 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e5a00 }
62789 /* bnand${X} ${BitBase16-16-u16}[sb] */
62792 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62793 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e5e0000 }
62795 /* bnand${X} ${BitBase16-16-s8}[fb] */
62798 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62799 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e5b00 }
62801 /* bnand${X} ${BitBase16-16-u16} */
62804 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
62805 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e5f0000 }
62807 /* bm${cond32-16} $Bitno32Unprefixed,$Bit32RnUnprefixed */
62810 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
62811 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_Rn_direct_Unprefixed
, { 0xd81000 }
62813 /* bm${cond32-16} $Bitno32Unprefixed,$Bit32AnUnprefixed */
62816 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
62817 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_direct_Unprefixed
, { 0xd09000 }
62819 /* bm${cond32-16} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
62822 { { MNEM
, OP (COND32_16
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62823 & ifmt_bm32_bit32_basic_Unprefixed_cond32_16_bit32_An_indirect_Unprefixed
, { 0xd01000 }
62825 /* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
62828 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62829 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_An_relative_Unprefixed
, { 0xd2100000 }
62831 /* bm${cond32-24} ${BitBase32-16-u11-Unprefixed}[sb] */
62834 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62835 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_SB_relative_Unprefixed
, { 0xd2900000 }
62837 /* bm${cond32-24} ${BitBase32-16-s11-Unprefixed}[fb] */
62840 { { MNEM
, OP (COND32_24
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62841 & ifmt_bm32_bit32_16_8_Unprefixed_cond32_24_bit32_16_11_FB_relative_Unprefixed
, { 0xd2d00000 }
62843 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
62846 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62847 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_An_relative_Unprefixed
, { 0xd4100000 }
62849 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed}[sb] */
62852 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
62853 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_SB_relative_Unprefixed
, { 0xd4900000 }
62855 /* bm${cond32-32} ${BitBase32-16-s19-Unprefixed}[fb] */
62858 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
62859 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_FB_relative_Unprefixed
, { 0xd4d00000 }
62861 /* bm${cond32-32} ${BitBase32-16-u19-Unprefixed} */
62864 { { MNEM
, OP (COND32_32
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
62865 & ifmt_bm32_bit32_16_16_Unprefixed_cond32_32_bit32_16_19_absolute_Unprefixed
, { 0xd6d00000 }
62867 /* bm${cond32-40} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
62870 { { MNEM
, OP (COND32_40
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
62871 & ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_An_relative_Unprefixed
, { 0xd6100000 }
62873 /* bm${cond32-40} ${BitBase32-16-u27-Unprefixed} */
62876 { { MNEM
, OP (COND32_40
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
62877 & ifmt_bm32_bit32_16_24_Unprefixed_cond32_40_bit32_16_27_absolute_Unprefixed
, { 0xd6900000 }
62879 /* bm${cond16-24} $Bitno16R,$Bit16Rn */
62882 { { MNEM
, OP (COND16_24
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
62883 & ifmt_bm16_bit16_16_8_cond16_24_bit16_Rn_direct
, { 0x7e200000 }
62885 /* bm${cond16-24} $Bitno16R,$Bit16An */
62888 { { MNEM
, OP (COND16_24
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
62889 & ifmt_bm16_bit16_16_8_cond16_24_bit16_An_direct
, { 0x7e240000 }
62891 /* bm${cond16-24} ${Dsp-16-u8}[$Bit16An] */
62894 { { MNEM
, OP (COND16_24
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
62895 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_An_relative
, { 0x7e280000 }
62897 /* bm${cond16-24} ${BitBase16-16-u8}[sb] */
62900 { { MNEM
, OP (COND16_24
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
62901 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_SB_relative
, { 0x7e2a0000 }
62903 /* bm${cond16-24} ${BitBase16-16-s8}[fb] */
62906 { { MNEM
, OP (COND16_24
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
62907 & ifmt_bm16_bit16_16_8_cond16_24_bit16_16_8_FB_relative
, { 0x7e2b0000 }
62909 /* bm${cond16-32} ${Dsp-16-u16}[$Bit16An] */
62912 { { MNEM
, OP (COND16_32
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
62913 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_An_relative
, { 0x7e2c0000 }
62915 /* bm${cond16-32} ${BitBase16-16-u16}[sb] */
62918 { { MNEM
, OP (COND16_32
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
62919 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_SB_relative
, { 0x7e2e0000 }
62921 /* bm${cond16-32} ${BitBase16-16-u16} */
62924 { { MNEM
, OP (COND16_32
), ' ', OP (BITBASE16_16_U16
), 0 } },
62925 & ifmt_bm16_bit16_16_16_cond16_32_bit16_16_16_absolute
, { 0x7e2f0000 }
62927 /* bm${cond16-16} [$Bit16An] */
62930 { { MNEM
, OP (COND16_16
), ' ', '[', OP (BIT16AN
), ']', 0 } },
62931 & ifmt_bm16_bit16_16_basic_cond16_16_bit16_An_indirect
, { 0x7e2600 }
62933 /* bitindex.w $Dst32RnUnprefixedHI */
62936 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
62937 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xc92e }
62939 /* bitindex.w $Dst32AnUnprefixedHI */
62942 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
62943 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xc1ae }
62945 /* bitindex.w [$Dst32AnUnprefixed] */
62948 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62949 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xc12e }
62951 /* bitindex.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
62954 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62955 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc32e00 }
62957 /* bitindex.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
62960 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62961 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc52e0000 }
62963 /* bitindex.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
62966 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
62967 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc72e0000 }
62969 /* bitindex.w ${Dsp-16-u8}[sb] */
62972 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
62973 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc3ae00 }
62975 /* bitindex.w ${Dsp-16-u16}[sb] */
62978 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
62979 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5ae0000 }
62981 /* bitindex.w ${Dsp-16-s8}[fb] */
62984 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
62985 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3ee00 }
62987 /* bitindex.w ${Dsp-16-s16}[fb] */
62990 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
62991 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5ee0000 }
62993 /* bitindex.w ${Dsp-16-u16} */
62996 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
62997 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7ee0000 }
62999 /* bitindex.w ${Dsp-16-u24} */
63002 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
63003 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7ae0000 }
63005 /* bitindex.b $Dst32RnUnprefixedQI */
63008 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
63009 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xc82e }
63011 /* bitindex.b $Dst32AnUnprefixedQI */
63014 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
63015 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xc0ae }
63017 /* bitindex.b [$Dst32AnUnprefixed] */
63020 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63021 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xc02e }
63023 /* bitindex.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
63026 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63027 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc22e00 }
63029 /* bitindex.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
63032 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63033 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc42e0000 }
63035 /* bitindex.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
63038 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63039 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc62e0000 }
63041 /* bitindex.b ${Dsp-16-u8}[sb] */
63044 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
63045 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc2ae00 }
63047 /* bitindex.b ${Dsp-16-u16}[sb] */
63050 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
63051 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4ae0000 }
63053 /* bitindex.b ${Dsp-16-s8}[fb] */
63056 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
63057 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2ee00 }
63059 /* bitindex.b ${Dsp-16-s16}[fb] */
63062 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
63063 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4ee0000 }
63065 /* bitindex.b ${Dsp-16-u16} */
63068 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
63069 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6ee0000 }
63071 /* bitindex.b ${Dsp-16-u24} */
63074 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
63075 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6ae0000 }
63077 /* bclr${X} $Bitno32Unprefixed,$Bit32RnUnprefixed */
63080 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32RNUNPREFIXED
), 0 } },
63081 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_Rn_direct_Unprefixed
, { 0xd830 }
63083 /* bclr${X} $Bitno32Unprefixed,$Bit32AnUnprefixed */
63086 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', OP (BIT32ANUNPREFIXED
), 0 } },
63087 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_direct_Unprefixed
, { 0xd0b0 }
63089 /* bclr${X} $Bitno32Unprefixed,[$Bit32AnUnprefixed] */
63092 { { MNEM
, OP (X
), ' ', OP (BITNO32UNPREFIXED
), ',', '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63093 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_An_indirect_Unprefixed
, { 0xd030 }
63095 /* bclr${X} ${BitBase32-16-u11-Unprefixed}[$Bit32AnUnprefixed] */
63098 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63099 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_An_relative_Unprefixed
, { 0xd23000 }
63101 /* bclr${X} ${BitBase32-16-u19-Unprefixed}[$Bit32AnUnprefixed] */
63104 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63105 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_An_relative_Unprefixed
, { 0xd4300000 }
63107 /* bclr${X} ${BitBase32-16-u27-Unprefixed}[$Bit32AnUnprefixed] */
63110 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), '[', OP (BIT32ANUNPREFIXED
), ']', 0 } },
63111 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_An_relative_Unprefixed
, { 0xd6300000 }
63113 /* bclr${X} ${BitBase32-16-u11-Unprefixed}[sb] */
63116 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U11_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
63117 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_SB_relative_Unprefixed
, { 0xd2b000 }
63119 /* bclr${X} ${BitBase32-16-u19-Unprefixed}[sb] */
63122 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), '[', 's', 'b', ']', 0 } },
63123 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_SB_relative_Unprefixed
, { 0xd4b00000 }
63125 /* bclr${X} ${BitBase32-16-s11-Unprefixed}[fb] */
63128 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S11_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
63129 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_11_FB_relative_Unprefixed
, { 0xd2f000 }
63131 /* bclr${X} ${BitBase32-16-s19-Unprefixed}[fb] */
63134 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_S19_UNPREFIXED
), '[', 'f', 'b', ']', 0 } },
63135 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_FB_relative_Unprefixed
, { 0xd4f00000 }
63137 /* bclr${X} ${BitBase32-16-u19-Unprefixed} */
63140 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U19_UNPREFIXED
), 0 } },
63141 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_19_absolute_Unprefixed
, { 0xd6f00000 }
63143 /* bclr${X} ${BitBase32-16-u27-Unprefixed} */
63146 { { MNEM
, OP (X
), ' ', OP (BITBASE32_16_U27_UNPREFIXED
), 0 } },
63147 & ifmt_btsts32_X_bit32_16_Unprefixed_bit32_16_27_absolute_Unprefixed
, { 0xd6b00000 }
63149 /* bclr${G} $Bitno16R,$Bit16Rn */
63152 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
63153 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e8000 }
63155 /* bclr${G} $Bitno16R,$Bit16An */
63158 { { MNEM
, OP (G
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
63159 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e8400 }
63161 /* bclr${G} ${Dsp-16-u8}[$Bit16An] */
63164 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
63165 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e8800 }
63167 /* bclr${G} ${BitBase16-16-u8}[sb] */
63170 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
63171 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e8a00 }
63173 /* bclr${G} ${BitBase16-16-s8}[fb] */
63176 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
63177 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e8b00 }
63179 /* bclr${S} ${BitBase16-8-u11-S}[sb] */
63182 { { MNEM
, OP (S
), ' ', OP (BITBASE16_8_U11_S
), '[', 's', 'b', ']', 0 } },
63183 & ifmt_btst16_S_bit16_11_S_bit16_11_SB_relative_S
, { 0x4000 }
63185 /* bclr${G} ${Dsp-16-u16}[$Bit16An] */
63188 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
63189 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e8c0000 }
63191 /* bclr${G} ${BitBase16-16-u16}[sb] */
63194 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
63195 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e8e0000 }
63197 /* bclr${G} ${BitBase16-16-u16} */
63200 { { MNEM
, OP (G
), ' ', OP (BITBASE16_16_U16
), 0 } },
63201 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e8f0000 }
63203 /* bclr${G} [$Bit16An] */
63206 { { MNEM
, OP (G
), ' ', '[', OP (BIT16AN
), ']', 0 } },
63207 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e86 }
63209 /* band${X} $Bitno32Prefixed,$Bit32RnPrefixed */
63212 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32RNPREFIXED
), 0 } },
63213 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_Rn_direct_Prefixed
, { 0x1d808 }
63215 /* band${X} $Bitno32Prefixed,$Bit32AnPrefixed */
63218 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', OP (BIT32ANPREFIXED
), 0 } },
63219 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_direct_Prefixed
, { 0x1d088 }
63221 /* band${X} $Bitno32Prefixed,[$Bit32AnPrefixed] */
63224 { { MNEM
, OP (X
), ' ', OP (BITNO32PREFIXED
), ',', '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63225 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_An_indirect_Prefixed
, { 0x1d008 }
63227 /* band${X} ${BitBase32-24-u11-Prefixed}[$Bit32AnPrefixed] */
63230 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63231 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_An_relative_Prefixed
, { 0x1d20800 }
63233 /* band${X} ${BitBase32-24-u19-Prefixed}[$Bit32AnPrefixed] */
63236 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63237 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_An_relative_Prefixed
, { 0x1d40800 }
63239 /* band${X} ${BitBase32-24-u27-Prefixed}[$Bit32AnPrefixed] */
63242 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), '[', OP (BIT32ANPREFIXED
), ']', 0 } },
63243 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_An_relative_Prefixed
, { 0x1d60800 }
63245 /* band${X} ${BitBase32-24-u11-Prefixed}[sb] */
63248 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U11_PREFIXED
), '[', 's', 'b', ']', 0 } },
63249 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_SB_relative_Prefixed
, { 0x1d28800 }
63251 /* band${X} ${BitBase32-24-u19-Prefixed}[sb] */
63254 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), '[', 's', 'b', ']', 0 } },
63255 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_SB_relative_Prefixed
, { 0x1d48800 }
63257 /* band${X} ${BitBase32-24-s11-Prefixed}[fb] */
63260 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S11_PREFIXED
), '[', 'f', 'b', ']', 0 } },
63261 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_11_FB_relative_Prefixed
, { 0x1d2c800 }
63263 /* band${X} ${BitBase32-24-s19-Prefixed}[fb] */
63266 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_S19_PREFIXED
), '[', 'f', 'b', ']', 0 } },
63267 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_FB_relative_Prefixed
, { 0x1d4c800 }
63269 /* band${X} ${BitBase32-24-u19-Prefixed} */
63272 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U19_PREFIXED
), 0 } },
63273 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_19_absolute_Prefixed
, { 0x1d6c800 }
63275 /* band${X} ${BitBase32-24-u27-Prefixed} */
63278 { { MNEM
, OP (X
), ' ', OP (BITBASE32_24_U27_PREFIXED
), 0 } },
63279 & ifmt_bxor32_X_bit32_24_Prefixed_bit32_24_27_absolute_Prefixed
, { 0x1d68800 }
63281 /* band${X} $Bitno16R,$Bit16Rn */
63284 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16RN
), 0 } },
63285 & ifmt_bxor16_X_bit16_16_bit16_Rn_direct
, { 0x7e4000 }
63287 /* band${X} $Bitno16R,$Bit16An */
63290 { { MNEM
, OP (X
), ' ', OP (BITNO16R
), ',', OP (BIT16AN
), 0 } },
63291 & ifmt_bxor16_X_bit16_16_bit16_An_direct
, { 0x7e4400 }
63293 /* band${X} [$Bit16An] */
63296 { { MNEM
, OP (X
), ' ', '[', OP (BIT16AN
), ']', 0 } },
63297 & ifmt_bxor16_X_bit16_16_bit16_An_indirect
, { 0x7e46 }
63299 /* band${X} ${Dsp-16-u8}[$Bit16An] */
63302 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (BIT16AN
), ']', 0 } },
63303 & ifmt_bxor16_X_bit16_16_bit16_16_8_An_relative
, { 0x7e4800 }
63305 /* band${X} ${Dsp-16-u16}[$Bit16An] */
63308 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (BIT16AN
), ']', 0 } },
63309 & ifmt_bxor16_X_bit16_16_bit16_16_16_An_relative
, { 0x7e4c0000 }
63311 /* band${X} ${BitBase16-16-u8}[sb] */
63314 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U8
), '[', 's', 'b', ']', 0 } },
63315 & ifmt_bxor16_X_bit16_16_bit16_16_8_SB_relative
, { 0x7e4a00 }
63317 /* band${X} ${BitBase16-16-u16}[sb] */
63320 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), '[', 's', 'b', ']', 0 } },
63321 & ifmt_bxor16_X_bit16_16_bit16_16_16_SB_relative
, { 0x7e4e0000 }
63323 /* band${X} ${BitBase16-16-s8}[fb] */
63326 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_S8
), '[', 'f', 'b', ']', 0 } },
63327 & ifmt_bxor16_X_bit16_16_bit16_16_8_FB_relative
, { 0x7e4b00 }
63329 /* band${X} ${BitBase16-16-u16} */
63332 { { MNEM
, OP (X
), ' ', OP (BITBASE16_16_U16
), 0 } },
63333 & ifmt_bxor16_X_bit16_16_bit16_16_16_absolute
, { 0x7e4f0000 }
63335 /* and.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
63338 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
63339 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x6d000000 }
63341 /* and.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
63344 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
63345 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x7d000000 }
63347 /* and.w${S} #${Imm-24-HI},${Dsp-8-u16} */
63350 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
63351 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x5d000000 }
63353 /* and.w${S} #${Imm-8-HI},r0 */
63356 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
63357 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x4d0000 }
63359 /* and.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
63362 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
63363 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x6c0000 }
63365 /* and.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
63368 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
63369 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x7c0000 }
63371 /* and.b${S} #${Imm-24-QI},${Dsp-8-u16} */
63374 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
63375 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x5c000000 }
63377 /* and.b${S} #${Imm-8-QI},r0l */
63380 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
63381 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x4c00 }
63383 /* and.b${S} ${SrcDst16-r0l-r0h-S-normal} */
63386 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
63387 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x10 }
63389 /* and.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
63392 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
63393 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x1100 }
63395 /* and.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
63398 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
63399 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x1200 }
63401 /* and.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
63404 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
63405 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x130000 }
63407 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63411 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990d00 }
63413 /* and.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
63416 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63417 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992d00 }
63419 /* and.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
63422 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63423 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993d00 }
63425 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63429 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918d00 }
63431 /* and.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
63434 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63435 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91ad00 }
63437 /* and.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
63440 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63441 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91bd00 }
63443 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63447 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910d00 }
63449 /* and.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
63452 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63453 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912d00 }
63455 /* and.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
63458 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63459 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913d00 }
63461 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63465 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x930d0000 }
63467 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63471 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x932d0000 }
63473 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
63476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63477 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x933d0000 }
63479 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63483 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x950d0000 }
63485 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63489 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x952d0000 }
63491 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
63494 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63495 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x953d0000 }
63497 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63500 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63501 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x970d0000 }
63503 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63507 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x972d0000 }
63509 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
63512 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63513 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x973d0000 }
63515 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
63518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63519 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x938d0000 }
63521 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
63524 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63525 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93ad0000 }
63527 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
63530 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
63531 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93bd0000 }
63533 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
63536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63537 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x958d0000 }
63539 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
63542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63543 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95ad0000 }
63545 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
63548 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
63549 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95bd0000 }
63551 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
63554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63555 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93cd0000 }
63557 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
63560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63561 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93ed0000 }
63563 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
63566 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
63567 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93fd0000 }
63569 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
63572 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63573 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95cd0000 }
63575 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
63578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63579 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95ed0000 }
63581 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
63584 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
63585 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95fd0000 }
63587 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
63590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
63591 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97cd0000 }
63593 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
63596 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
63597 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97ed0000 }
63599 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
63602 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
63603 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97fd0000 }
63605 /* and.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
63608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
63609 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x978d0000 }
63611 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
63614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
63615 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97ad0000 }
63617 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
63620 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
63621 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97bd0000 }
63623 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63627 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa90d0000 }
63629 /* and.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
63632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63633 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa92d0000 }
63635 /* and.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
63638 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63639 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa93d0000 }
63641 /* and.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
63644 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63645 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb93d0000 }
63647 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63651 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa18d0000 }
63653 /* and.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
63656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63657 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1ad0000 }
63659 /* and.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
63662 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63663 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1bd0000 }
63665 /* and.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
63668 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63669 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1bd0000 }
63671 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63675 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa10d0000 }
63677 /* and.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
63680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63681 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa12d0000 }
63683 /* and.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
63686 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63687 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa13d0000 }
63689 /* and.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
63692 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63693 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb13d0000 }
63695 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63699 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa30d0000 }
63701 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63705 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa32d0000 }
63707 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
63710 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63711 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa33d0000 }
63713 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
63716 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63717 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb33d0000 }
63719 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63723 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa50d0000 }
63725 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63729 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa52d0000 }
63731 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
63734 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63735 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa53d0000 }
63737 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
63740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63741 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb53d0000 }
63743 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63747 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa70d0000 }
63749 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63753 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa72d0000 }
63755 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
63758 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63759 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa73d0000 }
63761 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
63764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63765 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb73d0000 }
63767 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
63770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63771 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa38d0000 }
63773 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
63776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63777 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3ad0000 }
63779 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
63782 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63783 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3bd0000 }
63785 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
63788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
63789 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3bd0000 }
63791 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
63794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63795 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa58d0000 }
63797 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
63800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63801 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5ad0000 }
63803 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
63806 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63807 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5bd0000 }
63809 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
63812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
63813 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5bd0000 }
63815 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
63818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63819 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3cd0000 }
63821 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
63824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63825 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3ed0000 }
63827 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
63830 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63831 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3fd0000 }
63833 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
63836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
63837 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3fd0000 }
63839 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
63842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63843 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5cd0000 }
63845 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
63848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63849 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5ed0000 }
63851 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
63854 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63855 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5fd0000 }
63857 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
63860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
63861 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5fd0000 }
63863 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
63866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
63867 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7cd0000 }
63869 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
63872 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
63873 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7ed0000 }
63875 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
63878 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
63879 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7fd0000 }
63881 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
63884 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
63885 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7fd0000 }
63887 /* and.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
63890 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
63891 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa78d0000 }
63893 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
63896 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
63897 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7ad0000 }
63899 /* and.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
63902 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
63903 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7bd0000 }
63905 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
63908 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
63909 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7bd0000 }
63911 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
63914 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63915 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb90d0000 }
63917 /* and.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
63920 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
63921 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb92d0000 }
63923 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
63926 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63927 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb18d0000 }
63929 /* and.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
63932 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
63933 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1ad0000 }
63935 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
63938 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63939 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb10d0000 }
63941 /* and.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
63944 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63945 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb12d0000 }
63947 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
63950 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63951 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb30d0000 }
63953 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
63956 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63957 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb32d0000 }
63959 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
63962 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63963 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb50d0000 }
63965 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
63968 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63969 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb52d0000 }
63971 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
63974 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63975 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb70d0000 }
63977 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
63980 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
63981 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb72d0000 }
63983 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
63986 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
63987 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb38d0000 }
63989 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
63992 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
63993 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3ad0000 }
63995 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
63998 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
63999 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb58d0000 }
64001 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
64004 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64005 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5ad0000 }
64007 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
64010 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64011 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3cd0000 }
64013 /* and.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
64016 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64017 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3ed0000 }
64019 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
64022 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64023 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5cd0000 }
64025 /* and.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
64028 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64029 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5ed0000 }
64031 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
64034 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
64035 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7cd0000 }
64037 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
64040 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
64041 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7ed0000 }
64043 /* and.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
64046 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
64047 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb78d0000 }
64049 /* and.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
64052 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
64053 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7ad0000 }
64055 /* and.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
64058 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64059 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc90d }
64061 /* and.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
64064 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64065 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x892d }
64067 /* and.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
64070 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
64071 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x890d }
64073 /* and.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
64076 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64077 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc18d }
64079 /* and.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
64082 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64083 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81ad }
64085 /* and.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
64088 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
64089 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x818d }
64091 /* and.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
64094 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64095 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc10d }
64097 /* and.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
64100 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64101 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x812d }
64103 /* and.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64106 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64107 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x810d }
64109 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64112 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64113 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30d00 }
64115 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64118 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64119 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832d00 }
64121 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
64124 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64125 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830d00 }
64127 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64130 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64131 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc50d0000 }
64133 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64136 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64137 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852d0000 }
64139 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
64142 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64143 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x850d0000 }
64145 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
64148 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64149 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc70d0000 }
64151 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
64154 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64155 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872d0000 }
64157 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
64160 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64161 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x870d0000 }
64163 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
64166 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64167 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38d00 }
64169 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
64172 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64173 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ad00 }
64175 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
64178 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
64179 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838d00 }
64181 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
64184 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64185 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc58d0000 }
64187 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
64190 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64191 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ad0000 }
64193 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
64196 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
64197 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x858d0000 }
64199 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
64202 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64203 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3cd00 }
64205 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
64208 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64209 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ed00 }
64211 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
64214 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
64215 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83cd00 }
64217 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
64220 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64221 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5cd0000 }
64223 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
64226 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64227 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ed0000 }
64229 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
64232 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
64233 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85cd0000 }
64235 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
64238 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
64239 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7cd0000 }
64241 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
64244 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
64245 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ed0000 }
64247 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
64250 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
64251 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87cd0000 }
64253 /* and.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
64256 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
64257 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc78d0000 }
64259 /* and.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
64262 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
64263 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ad0000 }
64265 /* and.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
64268 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
64269 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x878d0000 }
64271 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64275 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980d00 }
64277 /* and.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
64280 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64281 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982d00 }
64283 /* and.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
64286 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64287 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983d00 }
64289 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64293 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908d00 }
64295 /* and.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
64298 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64299 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90ad00 }
64301 /* and.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
64304 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64305 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90bd00 }
64307 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64311 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900d00 }
64313 /* and.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
64316 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64317 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902d00 }
64319 /* and.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
64322 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64323 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903d00 }
64325 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64329 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x920d0000 }
64331 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64335 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x922d0000 }
64337 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
64340 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64341 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x923d0000 }
64343 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64347 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x940d0000 }
64349 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64353 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x942d0000 }
64355 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
64358 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64359 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x943d0000 }
64361 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64364 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64365 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x960d0000 }
64367 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64371 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x962d0000 }
64373 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
64376 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64377 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x963d0000 }
64379 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
64382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64383 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x928d0000 }
64385 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
64388 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64389 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92ad0000 }
64391 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
64394 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
64395 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92bd0000 }
64397 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
64400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64401 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x948d0000 }
64403 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
64406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64407 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94ad0000 }
64409 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
64412 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
64413 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94bd0000 }
64415 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
64418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64419 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92cd0000 }
64421 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
64424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64425 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92ed0000 }
64427 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
64430 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
64431 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92fd0000 }
64433 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
64436 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64437 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94cd0000 }
64439 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
64442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64443 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94ed0000 }
64445 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
64448 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
64449 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94fd0000 }
64451 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
64454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
64455 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96cd0000 }
64457 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
64460 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
64461 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96ed0000 }
64463 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
64466 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
64467 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96fd0000 }
64469 /* and.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
64472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
64473 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x968d0000 }
64475 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
64478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
64479 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96ad0000 }
64481 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
64484 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
64485 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96bd0000 }
64487 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64491 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa80d0000 }
64493 /* and.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
64496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64497 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa82d0000 }
64499 /* and.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
64502 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64503 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa83d0000 }
64505 /* and.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
64508 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64509 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb83d0000 }
64511 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64515 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa08d0000 }
64517 /* and.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
64520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64521 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0ad0000 }
64523 /* and.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
64526 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64527 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0bd0000 }
64529 /* and.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
64532 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64533 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0bd0000 }
64535 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64539 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa00d0000 }
64541 /* and.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
64544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64545 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa02d0000 }
64547 /* and.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
64550 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64551 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa03d0000 }
64553 /* and.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
64556 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64557 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb03d0000 }
64559 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64563 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa20d0000 }
64565 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64569 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa22d0000 }
64571 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
64574 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64575 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa23d0000 }
64577 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
64580 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64581 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb23d0000 }
64583 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64587 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa40d0000 }
64589 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64593 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa42d0000 }
64595 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
64598 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64599 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa43d0000 }
64601 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
64604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64605 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb43d0000 }
64607 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64611 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa60d0000 }
64613 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64617 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa62d0000 }
64619 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
64622 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64623 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa63d0000 }
64625 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
64628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64629 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb63d0000 }
64631 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
64634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64635 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa28d0000 }
64637 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
64640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64641 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2ad0000 }
64643 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
64646 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64647 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2bd0000 }
64649 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
64652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
64653 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2bd0000 }
64655 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
64658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64659 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa48d0000 }
64661 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
64664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64665 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4ad0000 }
64667 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
64670 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64671 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4bd0000 }
64673 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
64676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
64677 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4bd0000 }
64679 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
64682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64683 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2cd0000 }
64685 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
64688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64689 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2ed0000 }
64691 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
64694 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64695 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2fd0000 }
64697 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
64700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
64701 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2fd0000 }
64703 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
64706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64707 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4cd0000 }
64709 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
64712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64713 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4ed0000 }
64715 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
64718 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64719 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4fd0000 }
64721 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
64724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
64725 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4fd0000 }
64727 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
64730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
64731 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6cd0000 }
64733 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
64736 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
64737 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6ed0000 }
64739 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
64742 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
64743 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6fd0000 }
64745 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
64748 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
64749 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6fd0000 }
64751 /* and.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
64754 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
64755 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa68d0000 }
64757 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
64760 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
64761 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6ad0000 }
64763 /* and.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
64766 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
64767 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6bd0000 }
64769 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
64772 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
64773 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6bd0000 }
64775 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64778 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64779 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb80d0000 }
64781 /* and.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
64784 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64785 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb82d0000 }
64787 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64790 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64791 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb08d0000 }
64793 /* and.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
64796 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64797 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0ad0000 }
64799 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64802 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64803 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb00d0000 }
64805 /* and.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
64808 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64809 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb02d0000 }
64811 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
64814 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64815 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb20d0000 }
64817 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
64820 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64821 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb22d0000 }
64823 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
64826 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64827 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb40d0000 }
64829 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
64832 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64833 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb42d0000 }
64835 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
64838 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64839 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb60d0000 }
64841 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
64844 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64845 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb62d0000 }
64847 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
64850 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
64851 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb28d0000 }
64853 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
64856 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
64857 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2ad0000 }
64859 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
64862 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64863 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb48d0000 }
64865 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
64868 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
64869 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4ad0000 }
64871 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
64874 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64875 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2cd0000 }
64877 /* and.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
64880 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
64881 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2ed0000 }
64883 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
64886 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64887 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4cd0000 }
64889 /* and.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
64892 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
64893 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4ed0000 }
64895 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
64898 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
64899 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6cd0000 }
64901 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
64904 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
64905 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6ed0000 }
64907 /* and.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
64910 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
64911 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb68d0000 }
64913 /* and.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
64916 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
64917 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6ad0000 }
64919 /* and.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
64922 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64923 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc80d }
64925 /* and.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
64928 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64929 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x882d }
64931 /* and.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
64934 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
64935 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x880d }
64937 /* and.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
64940 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64941 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc08d }
64943 /* and.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
64946 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64947 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80ad }
64949 /* and.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
64952 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
64953 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x808d }
64955 /* and.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
64958 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64959 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc00d }
64961 /* and.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
64964 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64965 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x802d }
64967 /* and.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
64970 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64971 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x800d }
64973 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64976 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64977 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20d00 }
64979 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
64982 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64983 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822d00 }
64985 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
64988 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64989 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820d00 }
64991 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
64994 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
64995 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc40d0000 }
64997 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
65000 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65001 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842d0000 }
65003 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
65006 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65007 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x840d0000 }
65009 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
65012 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65013 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc60d0000 }
65015 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
65018 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65019 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862d0000 }
65021 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
65024 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
65025 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x860d0000 }
65027 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
65030 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65031 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28d00 }
65033 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
65036 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65037 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ad00 }
65039 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
65042 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65043 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828d00 }
65045 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
65048 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65049 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc48d0000 }
65051 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
65054 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65055 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ad0000 }
65057 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
65060 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65061 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x848d0000 }
65063 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
65066 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65067 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2cd00 }
65069 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
65072 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65073 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ed00 }
65075 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
65078 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65079 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82cd00 }
65081 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
65084 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65085 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4cd0000 }
65087 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
65090 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65091 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ed0000 }
65093 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
65096 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
65097 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84cd0000 }
65099 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
65102 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
65103 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6cd0000 }
65105 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
65108 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
65109 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ed0000 }
65111 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
65114 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
65115 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86cd0000 }
65117 /* and.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
65120 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
65121 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc68d0000 }
65123 /* and.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
65126 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
65127 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ad0000 }
65129 /* and.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
65132 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
65133 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x868d0000 }
65135 /* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
65138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65139 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0x918000 }
65141 /* and.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
65144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65145 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0x91a000 }
65147 /* and.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
65150 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65151 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0x91b000 }
65153 /* and.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
65156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65157 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0x918400 }
65159 /* and.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
65162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65163 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0x91a400 }
65165 /* and.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
65168 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65169 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0x91b400 }
65171 /* and.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
65174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65175 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0x918600 }
65177 /* and.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
65180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65181 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0x91a600 }
65183 /* and.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
65186 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65187 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0x91b600 }
65189 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
65192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65193 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0x91880000 }
65195 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
65198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65199 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0x91a80000 }
65201 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
65204 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65205 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0x91b80000 }
65207 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
65210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65211 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0x918c0000 }
65213 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
65216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65217 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0x91ac0000 }
65219 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
65222 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65223 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0x91bc0000 }
65225 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
65228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65229 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0x918a0000 }
65231 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
65234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65235 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x91aa0000 }
65237 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
65240 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65241 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0x91ba0000 }
65243 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
65246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65247 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0x918e0000 }
65249 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
65252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65253 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x91ae0000 }
65255 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
65258 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65259 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0x91be0000 }
65261 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
65264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65265 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0x918b0000 }
65267 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
65270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65271 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x91ab0000 }
65273 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
65276 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65277 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0x91bb0000 }
65279 /* and.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
65282 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
65283 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0x918f0000 }
65285 /* and.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
65288 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65289 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0x91af0000 }
65291 /* and.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
65294 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65295 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0x91bf0000 }
65297 /* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
65300 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65301 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0x91c00000 }
65303 /* and.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
65306 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
65307 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0x91e00000 }
65309 /* and.w${G} ${Dsp-16-u16},$Dst16RnHI */
65312 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
65313 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0x91f00000 }
65315 /* and.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
65318 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65319 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0x91c40000 }
65321 /* and.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
65324 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
65325 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0x91e40000 }
65327 /* and.w${G} ${Dsp-16-u16},$Dst16AnHI */
65330 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
65331 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0x91f40000 }
65333 /* and.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
65336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65337 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0x91c60000 }
65339 /* and.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
65342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65343 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0x91e60000 }
65345 /* and.w${G} ${Dsp-16-u16},[$Dst16An] */
65348 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
65349 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0x91f60000 }
65351 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
65354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65355 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0x91c80000 }
65357 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
65360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65361 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0x91e80000 }
65363 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
65366 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65367 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0x91f80000 }
65369 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
65372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65373 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0x91cc0000 }
65375 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
65378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65379 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0x91ec0000 }
65381 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
65384 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65385 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0x91fc0000 }
65387 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
65390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65391 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0x91ca0000 }
65393 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
65396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65397 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0x91ea0000 }
65399 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
65402 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65403 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0x91fa0000 }
65405 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
65408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65409 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0x91ce0000 }
65411 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
65414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65415 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0x91ee0000 }
65417 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
65420 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65421 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0x91fe0000 }
65423 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
65426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65427 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0x91cb0000 }
65429 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
65432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65433 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0x91eb0000 }
65435 /* and.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
65438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65439 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0x91fb0000 }
65441 /* and.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
65444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
65445 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0x91cf0000 }
65447 /* and.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
65450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
65451 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0x91ef0000 }
65453 /* and.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
65456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
65457 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0x91ff0000 }
65459 /* and.w${G} $Src16RnHI,$Dst16RnHI */
65462 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
65463 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0x9100 }
65465 /* and.w${G} $Src16AnHI,$Dst16RnHI */
65468 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
65469 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0x9140 }
65471 /* and.w${G} [$Src16An],$Dst16RnHI */
65474 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
65475 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0x9160 }
65477 /* and.w${G} $Src16RnHI,$Dst16AnHI */
65480 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
65481 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0x9104 }
65483 /* and.w${G} $Src16AnHI,$Dst16AnHI */
65486 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
65487 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0x9144 }
65489 /* and.w${G} [$Src16An],$Dst16AnHI */
65492 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
65493 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0x9164 }
65495 /* and.w${G} $Src16RnHI,[$Dst16An] */
65498 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
65499 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0x9106 }
65501 /* and.w${G} $Src16AnHI,[$Dst16An] */
65504 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
65505 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0x9146 }
65507 /* and.w${G} [$Src16An],[$Dst16An] */
65510 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65511 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0x9166 }
65513 /* and.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
65516 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65517 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0x910800 }
65519 /* and.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
65522 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65523 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0x914800 }
65525 /* and.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
65528 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
65529 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0x916800 }
65531 /* and.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
65534 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65535 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0x910c0000 }
65537 /* and.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
65540 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65541 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0x914c0000 }
65543 /* and.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
65546 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
65547 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0x916c0000 }
65549 /* and.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
65552 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65553 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0x910a00 }
65555 /* and.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
65558 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65559 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0x914a00 }
65561 /* and.w${G} [$Src16An],${Dsp-16-u8}[sb] */
65564 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
65565 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0x916a00 }
65567 /* and.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
65570 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65571 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0x910e0000 }
65573 /* and.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
65576 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65577 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0x914e0000 }
65579 /* and.w${G} [$Src16An],${Dsp-16-u16}[sb] */
65582 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
65583 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0x916e0000 }
65585 /* and.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
65588 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65589 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0x910b00 }
65591 /* and.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
65594 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65595 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0x914b00 }
65597 /* and.w${G} [$Src16An],${Dsp-16-s8}[fb] */
65600 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
65601 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0x916b00 }
65603 /* and.w${G} $Src16RnHI,${Dsp-16-u16} */
65606 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
65607 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0x910f0000 }
65609 /* and.w${G} $Src16AnHI,${Dsp-16-u16} */
65612 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
65613 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0x914f0000 }
65615 /* and.w${G} [$Src16An],${Dsp-16-u16} */
65618 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
65619 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0x916f0000 }
65621 /* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
65624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65625 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0x908000 }
65627 /* and.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
65630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65631 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0x90a000 }
65633 /* and.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
65636 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65637 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0x90b000 }
65639 /* and.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
65642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65643 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0x908400 }
65645 /* and.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
65648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65649 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0x90a400 }
65651 /* and.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
65654 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65655 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0x90b400 }
65657 /* and.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
65660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65661 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0x908600 }
65663 /* and.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
65666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65667 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0x90a600 }
65669 /* and.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
65672 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65673 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0x90b600 }
65675 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
65678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65679 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0x90880000 }
65681 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
65684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65685 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0x90a80000 }
65687 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
65690 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
65691 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0x90b80000 }
65693 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
65696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65697 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0x908c0000 }
65699 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
65702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65703 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0x90ac0000 }
65705 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
65708 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
65709 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0x90bc0000 }
65711 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
65714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65715 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0x908a0000 }
65717 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
65720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65721 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x90aa0000 }
65723 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
65726 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
65727 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0x90ba0000 }
65729 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
65732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65733 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0x908e0000 }
65735 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
65738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65739 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x90ae0000 }
65741 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
65744 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
65745 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0x90be0000 }
65747 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
65750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65751 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0x908b0000 }
65753 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
65756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65757 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x90ab0000 }
65759 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
65762 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
65763 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0x90bb0000 }
65765 /* and.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
65768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
65769 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0x908f0000 }
65771 /* and.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
65774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65775 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0x90af0000 }
65777 /* and.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
65780 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
65781 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0x90bf0000 }
65783 /* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
65786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65787 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0x90c00000 }
65789 /* and.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
65792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
65793 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0x90e00000 }
65795 /* and.b${G} ${Dsp-16-u16},$Dst16RnQI */
65798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
65799 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0x90f00000 }
65801 /* and.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
65804 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65805 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0x90c40000 }
65807 /* and.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
65810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
65811 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0x90e40000 }
65813 /* and.b${G} ${Dsp-16-u16},$Dst16AnQI */
65816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
65817 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0x90f40000 }
65819 /* and.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
65822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65823 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0x90c60000 }
65825 /* and.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
65828 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
65829 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0x90e60000 }
65831 /* and.b${G} ${Dsp-16-u16},[$Dst16An] */
65834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
65835 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0x90f60000 }
65837 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
65840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65841 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0x90c80000 }
65843 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
65846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65847 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0x90e80000 }
65849 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
65852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
65853 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0x90f80000 }
65855 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
65858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65859 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0x90cc0000 }
65861 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
65864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65865 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0x90ec0000 }
65867 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
65870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
65871 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0x90fc0000 }
65873 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
65876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65877 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0x90ca0000 }
65879 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
65882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65883 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0x90ea0000 }
65885 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
65888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
65889 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0x90fa0000 }
65891 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
65894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65895 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0x90ce0000 }
65897 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
65900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65901 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0x90ee0000 }
65903 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
65906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
65907 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0x90fe0000 }
65909 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
65912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65913 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0x90cb0000 }
65915 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
65918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65919 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0x90eb0000 }
65921 /* and.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
65924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
65925 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0x90fb0000 }
65927 /* and.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
65930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
65931 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0x90cf0000 }
65933 /* and.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
65936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
65937 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0x90ef0000 }
65939 /* and.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
65942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
65943 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0x90ff0000 }
65945 /* and.b${G} $Src16RnQI,$Dst16RnQI */
65948 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
65949 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0x9000 }
65951 /* and.b${G} $Src16AnQI,$Dst16RnQI */
65954 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
65955 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0x9040 }
65957 /* and.b${G} [$Src16An],$Dst16RnQI */
65960 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
65961 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0x9060 }
65963 /* and.b${G} $Src16RnQI,$Dst16AnQI */
65966 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
65967 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0x9004 }
65969 /* and.b${G} $Src16AnQI,$Dst16AnQI */
65972 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
65973 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0x9044 }
65975 /* and.b${G} [$Src16An],$Dst16AnQI */
65978 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
65979 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0x9064 }
65981 /* and.b${G} $Src16RnQI,[$Dst16An] */
65984 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
65985 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0x9006 }
65987 /* and.b${G} $Src16AnQI,[$Dst16An] */
65990 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
65991 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0x9046 }
65993 /* and.b${G} [$Src16An],[$Dst16An] */
65996 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
65997 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0x9066 }
65999 /* and.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
66002 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66003 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0x900800 }
66005 /* and.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
66008 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66009 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0x904800 }
66011 /* and.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
66014 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66015 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0x906800 }
66017 /* and.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
66020 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66021 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0x900c0000 }
66023 /* and.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
66026 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66027 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0x904c0000 }
66029 /* and.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
66032 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66033 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0x906c0000 }
66035 /* and.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
66038 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66039 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0x900a00 }
66041 /* and.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
66044 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66045 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0x904a00 }
66047 /* and.b${G} [$Src16An],${Dsp-16-u8}[sb] */
66050 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66051 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0x906a00 }
66053 /* and.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
66056 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66057 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0x900e0000 }
66059 /* and.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
66062 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66063 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0x904e0000 }
66065 /* and.b${G} [$Src16An],${Dsp-16-u16}[sb] */
66068 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66069 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0x906e0000 }
66071 /* and.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
66074 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66075 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0x900b00 }
66077 /* and.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
66080 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66081 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0x904b00 }
66083 /* and.b${G} [$Src16An],${Dsp-16-s8}[fb] */
66086 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66087 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0x906b00 }
66089 /* and.b${G} $Src16RnQI,${Dsp-16-u16} */
66092 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
66093 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0x900f0000 }
66095 /* and.b${G} $Src16AnQI,${Dsp-16-u16} */
66098 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
66099 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0x904f0000 }
66101 /* and.b${G} [$Src16An],${Dsp-16-u16} */
66104 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
66105 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0x906f0000 }
66107 /* and.b${S} #${Imm-8-QI},r0l */
66110 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
66111 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x9400 }
66113 /* and.b${S} #${Imm-8-QI},r0h */
66116 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
66117 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x9300 }
66119 /* and.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
66122 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66123 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x950000 }
66125 /* and.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
66128 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66129 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x960000 }
66131 /* and.b${S} #${Imm-8-QI},${Dsp-16-u16} */
66134 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
66135 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x97000000 }
66137 /* and.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
66140 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
66141 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x893f0000 }
66143 /* and.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
66146 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
66147 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81bf0000 }
66149 /* and.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
66152 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66153 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x813f0000 }
66155 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
66158 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66159 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x833f0000 }
66161 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
66164 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66165 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83bf0000 }
66167 /* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
66170 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66171 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ff0000 }
66173 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
66176 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66177 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x853f0000 }
66179 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
66182 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66183 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85bf0000 }
66185 /* and.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
66188 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
66189 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ff0000 }
66191 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
66194 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
66195 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ff0000 }
66197 /* and.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
66200 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66201 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x873f0000 }
66203 /* and.w${G} #${Imm-40-HI},${Dsp-16-u24} */
66206 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
66207 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87bf0000 }
66209 /* and.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
66212 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
66213 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x883f00 }
66215 /* and.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
66218 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
66219 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80bf00 }
66221 /* and.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
66224 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66225 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x803f00 }
66227 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
66230 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66231 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x823f0000 }
66233 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
66236 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66237 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82bf0000 }
66239 /* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
66242 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66243 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ff0000 }
66245 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
66248 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66249 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x843f0000 }
66251 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
66254 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66255 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84bf0000 }
66257 /* and.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
66260 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
66261 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ff0000 }
66263 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
66266 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
66267 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ff0000 }
66269 /* and.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
66272 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66273 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x863f0000 }
66275 /* and.b${G} #${Imm-40-QI},${Dsp-16-u24} */
66278 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
66279 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86bf0000 }
66281 /* and.w${G} #${Imm-16-HI},$Dst16RnHI */
66284 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
66285 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77200000 }
66287 /* and.w${G} #${Imm-16-HI},$Dst16AnHI */
66290 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
66291 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77240000 }
66293 /* and.w${G} #${Imm-16-HI},[$Dst16An] */
66296 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
66297 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77260000 }
66299 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
66302 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66303 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77280000 }
66305 /* and.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
66308 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66309 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x772a0000 }
66311 /* and.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
66314 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66315 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x772b0000 }
66317 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
66320 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66321 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x772c0000 }
66323 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
66326 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66327 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x772e0000 }
66329 /* and.w${G} #${Imm-32-HI},${Dsp-16-u16} */
66332 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
66333 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x772f0000 }
66335 /* and.b${G} #${Imm-16-QI},$Dst16RnQI */
66338 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
66339 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x762000 }
66341 /* and.b${G} #${Imm-16-QI},$Dst16AnQI */
66344 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
66345 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x762400 }
66347 /* and.b${G} #${Imm-16-QI},[$Dst16An] */
66350 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
66351 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x762600 }
66353 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
66356 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
66357 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76280000 }
66359 /* and.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
66362 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
66363 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x762a0000 }
66365 /* and.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
66368 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
66369 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x762b0000 }
66371 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
66374 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
66375 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x762c0000 }
66377 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
66380 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
66381 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x762e0000 }
66383 /* and.b${G} #${Imm-32-QI},${Dsp-16-u16} */
66386 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
66387 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x762f0000 }
66389 /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
66392 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
66393 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xf3100000 }
66395 /* adjnz.w #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66398 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66399 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xf3900000 }
66401 /* adjnz.w #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66404 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66405 & ifmt_adjnz32_w_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xf3d00000 }
66407 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
66410 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
66411 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xf5100000 }
66413 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66416 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66417 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xf5900000 }
66419 /* adjnz.w #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
66422 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66423 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xf5d00000 }
66425 /* adjnz.w #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
66428 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66429 & ifmt_adjnz32_w_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xf7d00000 }
66431 /* adjnz.w #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
66434 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
66435 & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xf7100000 }
66437 /* adjnz.w #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
66440 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
66441 & ifmt_adjnz32_w_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xf7900000 }
66443 /* adjnz.w #${Imm-12-s4},$Dst32RnUnprefixedHI,${Lab-16-8} */
66446 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
66447 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xf91000 }
66449 /* adjnz.w #${Imm-12-s4},$Dst32AnUnprefixedHI,${Lab-16-8} */
66452 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), ',', OP (LAB_16_8
), 0 } },
66453 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xf19000 }
66455 /* adjnz.w #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
66458 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
66459 & ifmt_adjnz32_w_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xf11000 }
66461 /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed],${Lab-24-8} */
66464 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_24_8
), 0 } },
66465 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xf2100000 }
66467 /* adjnz.b #${Imm-12-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66470 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66471 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xf2900000 }
66473 /* adjnz.b #${Imm-12-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66476 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66477 & ifmt_adjnz32_b_imm4_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xf2d00000 }
66479 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed],${Lab-32-8} */
66482 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_32_8
), 0 } },
66483 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xf4100000 }
66485 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66488 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66489 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xf4900000 }
66491 /* adjnz.b #${Imm-12-s4},${Dsp-16-s16}[fb],${Lab-32-8} */
66494 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66495 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xf4d00000 }
66497 /* adjnz.b #${Imm-12-s4},${Dsp-16-u16},${Lab-32-8} */
66500 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66501 & ifmt_adjnz32_b_imm4_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xf6d00000 }
66503 /* adjnz.b #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed],${Lab-40-8} */
66506 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_40_8
), 0 } },
66507 & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xf6100000 }
66509 /* adjnz.b #${Imm-12-s4},${Dsp-16-u24},${Lab-40-8} */
66512 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), ',', OP (LAB_40_8
), 0 } },
66513 & ifmt_adjnz32_b_imm4_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xf6900000 }
66515 /* adjnz.b #${Imm-12-s4},$Dst32RnUnprefixedQI,${Lab-16-8} */
66518 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
66519 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xf81000 }
66521 /* adjnz.b #${Imm-12-s4},$Dst32AnUnprefixedQI,${Lab-16-8} */
66524 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), ',', OP (LAB_16_8
), 0 } },
66525 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xf09000 }
66527 /* adjnz.b #${Imm-12-s4},[$Dst32AnUnprefixed],${Lab-16-8} */
66530 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', ',', OP (LAB_16_8
), 0 } },
66531 & ifmt_adjnz32_b_imm4_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xf01000 }
66533 /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
66536 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
66537 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_An_relative_HI
, { 0xf9080000 }
66539 /* adjnz.w #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66542 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66543 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_SB_relative_HI
, { 0xf90a0000 }
66545 /* adjnz.w #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66548 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66549 & ifmt_adjnz16_w_imm4_16_8_dst16_16_8_FB_relative_HI
, { 0xf90b0000 }
66551 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
66554 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
66555 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_An_relative_HI
, { 0xf90c0000 }
66557 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66560 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66561 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_SB_relative_HI
, { 0xf90e0000 }
66563 /* adjnz.w #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
66566 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66567 & ifmt_adjnz16_w_imm4_16_16_dst16_16_16_absolute_HI
, { 0xf90f0000 }
66569 /* adjnz.w #${Imm-8-s4},$Dst16RnHI,${Lab-16-8} */
66572 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), ',', OP (LAB_16_8
), 0 } },
66573 & ifmt_adjnz16_w_imm4_basic_dst16_Rn_direct_HI
, { 0xf90000 }
66575 /* adjnz.w #${Imm-8-s4},$Dst16AnHI,${Lab-16-8} */
66578 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), ',', OP (LAB_16_8
), 0 } },
66579 & ifmt_adjnz16_w_imm4_basic_dst16_An_direct_HI
, { 0xf90400 }
66581 /* adjnz.w #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
66584 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
66585 & ifmt_adjnz16_w_imm4_basic_dst16_An_indirect_HI
, { 0xf90600 }
66587 /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[$Dst16An],${Lab-24-8} */
66590 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', ',', OP (LAB_24_8
), 0 } },
66591 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_An_relative_QI
, { 0xf8080000 }
66593 /* adjnz.b #${Imm-8-s4},${Dsp-16-u8}[sb],${Lab-24-8} */
66596 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66597 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_SB_relative_QI
, { 0xf80a0000 }
66599 /* adjnz.b #${Imm-8-s4},${Dsp-16-s8}[fb],${Lab-24-8} */
66602 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (LAB_24_8
), 0 } },
66603 & ifmt_adjnz16_b_imm4_16_8_dst16_16_8_FB_relative_QI
, { 0xf80b0000 }
66605 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[$Dst16An],${Lab-32-8} */
66608 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', ',', OP (LAB_32_8
), 0 } },
66609 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_An_relative_QI
, { 0xf80c0000 }
66611 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16}[sb],${Lab-32-8} */
66614 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (LAB_32_8
), 0 } },
66615 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_SB_relative_QI
, { 0xf80e0000 }
66617 /* adjnz.b #${Imm-8-s4},${Dsp-16-u16},${Lab-32-8} */
66620 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), ',', OP (LAB_32_8
), 0 } },
66621 & ifmt_adjnz16_b_imm4_16_16_dst16_16_16_absolute_QI
, { 0xf80f0000 }
66623 /* adjnz.b #${Imm-8-s4},$Dst16RnQI,${Lab-16-8} */
66626 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), ',', OP (LAB_16_8
), 0 } },
66627 & ifmt_adjnz16_b_imm4_basic_dst16_Rn_direct_QI
, { 0xf80000 }
66629 /* adjnz.b #${Imm-8-s4},$Dst16AnQI,${Lab-16-8} */
66632 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), ',', OP (LAB_16_8
), 0 } },
66633 & ifmt_adjnz16_b_imm4_basic_dst16_An_direct_QI
, { 0xf80400 }
66635 /* adjnz.b #${Imm-8-s4},[$Dst16An],${Lab-16-8} */
66638 { { MNEM
, ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', ',', OP (LAB_16_8
), 0 } },
66639 & ifmt_adjnz16_b_imm4_basic_dst16_An_indirect_QI
, { 0xf80600 }
66641 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
66644 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66645 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x980200 }
66647 /* addx${X} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
66650 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66651 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x982200 }
66653 /* addx${X} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
66656 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66657 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x983200 }
66659 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
66662 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66663 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x908200 }
66665 /* addx${X} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
66668 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66669 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90a200 }
66671 /* addx${X} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
66674 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66675 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x90b200 }
66677 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
66680 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66681 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x900200 }
66683 /* addx${X} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
66686 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66687 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x902200 }
66689 /* addx${X} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
66692 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66693 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x903200 }
66695 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66698 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66699 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92020000 }
66701 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66704 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66705 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92220000 }
66707 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
66710 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66711 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x92320000 }
66713 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66716 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66717 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94020000 }
66719 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66722 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66723 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94220000 }
66725 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
66728 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66729 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x94320000 }
66731 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66734 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66735 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96020000 }
66737 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66740 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66741 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96220000 }
66743 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
66746 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66747 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x96320000 }
66749 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
66752 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66753 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92820000 }
66755 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
66758 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66759 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92a20000 }
66761 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
66764 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
66765 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x92b20000 }
66767 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
66770 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66771 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94820000 }
66773 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
66776 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66777 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94a20000 }
66779 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
66782 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
66783 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x94b20000 }
66785 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
66788 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66789 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92c20000 }
66791 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
66794 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66795 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92e20000 }
66797 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
66800 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
66801 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x92f20000 }
66803 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
66806 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66807 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94c20000 }
66809 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
66812 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66813 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94e20000 }
66815 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
66818 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
66819 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x94f20000 }
66821 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
66824 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
66825 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96c20000 }
66827 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
66830 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
66831 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96e20000 }
66833 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
66836 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
66837 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_SI
, { 0x96f20000 }
66839 /* addx${X} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
66842 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
66843 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96820000 }
66845 /* addx${X} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
66848 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
66849 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96a20000 }
66851 /* addx${X} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
66854 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
66855 & ifmt_subx32_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_SI
, { 0x96b20000 }
66857 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
66860 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66861 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8020000 }
66863 /* addx${X} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
66866 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66867 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8220000 }
66869 /* addx${X} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
66872 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66873 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xa8320000 }
66875 /* addx${X} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
66878 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
66879 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8320000 }
66881 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
66884 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66885 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0820000 }
66887 /* addx${X} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
66890 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66891 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0a20000 }
66893 /* addx${X} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
66896 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66897 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xa0b20000 }
66899 /* addx${X} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
66902 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
66903 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0b20000 }
66905 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
66908 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66909 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0020000 }
66911 /* addx${X} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
66914 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66915 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0220000 }
66917 /* addx${X} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
66920 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66921 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xa0320000 }
66923 /* addx${X} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
66926 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66927 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0320000 }
66929 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66932 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66933 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2020000 }
66935 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66938 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66939 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2220000 }
66941 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
66944 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66945 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa2320000 }
66947 /* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
66950 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66951 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb2320000 }
66953 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66956 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66957 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4020000 }
66959 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66962 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66963 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4220000 }
66965 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
66968 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66969 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa4320000 }
66971 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
66974 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66975 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb4320000 }
66977 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66980 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66981 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6020000 }
66983 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66986 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66987 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6220000 }
66989 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
66992 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66993 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa6320000 }
66995 /* addx${X} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
66998 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
66999 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb6320000 }
67001 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
67004 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67005 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2820000 }
67007 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
67010 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67011 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2a20000 }
67013 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
67016 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67017 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa2b20000 }
67019 /* addx${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
67022 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67023 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb2b20000 }
67025 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
67028 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67029 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4820000 }
67031 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
67034 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67035 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4a20000 }
67037 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
67040 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67041 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa4b20000 }
67043 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
67046 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67047 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb4b20000 }
67049 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
67052 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67053 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2c20000 }
67055 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
67058 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67059 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2e20000 }
67061 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
67064 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67065 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa2f20000 }
67067 /* addx${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
67070 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67071 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb2f20000 }
67073 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
67076 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67077 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4c20000 }
67079 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
67082 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67083 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4e20000 }
67085 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
67088 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67089 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa4f20000 }
67091 /* addx${X} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
67094 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67095 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb4f20000 }
67097 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
67100 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
67101 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6c20000 }
67103 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
67106 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67107 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6e20000 }
67109 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
67112 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67113 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa6f20000 }
67115 /* addx${X} ${Dsp-16-u16},${Dsp-32-u16} */
67118 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
67119 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb6f20000 }
67121 /* addx${X} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
67124 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
67125 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6820000 }
67127 /* addx${X} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
67130 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67131 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6a20000 }
67133 /* addx${X} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
67136 { { MNEM
, OP (X
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67137 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa6b20000 }
67139 /* addx${X} ${Dsp-16-u16},${Dsp-32-u24} */
67142 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
67143 & ifmt_subx32_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb6b20000 }
67145 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
67148 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67149 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8020000 }
67151 /* addx${X} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
67154 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67155 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xb8220000 }
67157 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
67160 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67161 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0820000 }
67163 /* addx${X} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
67166 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67167 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xb0a20000 }
67169 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
67172 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67173 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0020000 }
67175 /* addx${X} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
67178 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67179 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xb0220000 }
67181 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
67184 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67185 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2020000 }
67187 /* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
67190 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67191 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb2220000 }
67193 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
67196 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67197 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4020000 }
67199 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
67202 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67203 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb4220000 }
67205 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
67208 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67209 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6020000 }
67211 /* addx${X} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
67214 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67215 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb6220000 }
67217 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
67220 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67221 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2820000 }
67223 /* addx${X} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
67226 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67227 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb2a20000 }
67229 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
67232 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67233 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4820000 }
67235 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
67238 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67239 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb4a20000 }
67241 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
67244 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67245 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2c20000 }
67247 /* addx${X} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
67250 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67251 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb2e20000 }
67253 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
67256 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
67257 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4c20000 }
67259 /* addx${X} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
67262 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
67263 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb4e20000 }
67265 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
67268 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
67269 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6c20000 }
67271 /* addx${X} ${Dsp-16-u24},${Dsp-40-u16} */
67274 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
67275 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb6e20000 }
67277 /* addx${X} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
67280 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
67281 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6820000 }
67283 /* addx${X} ${Dsp-16-u24},${Dsp-40-u24} */
67286 { { MNEM
, OP (X
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
67287 & ifmt_subx32_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb6a20000 }
67289 /* addx${X} $Src32RnUnprefixedQI,$Dst32RnUnprefixedSI */
67292 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67293 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0xc802 }
67295 /* addx${X} $Src32AnUnprefixedQI,$Dst32RnUnprefixedSI */
67298 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67299 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8822 }
67301 /* addx${X} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
67304 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67305 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_SI
, { 0x8802 }
67307 /* addx${X} $Src32RnUnprefixedQI,$Dst32AnUnprefixedSI */
67310 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67311 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0xc082 }
67313 /* addx${X} $Src32AnUnprefixedQI,$Dst32AnUnprefixedSI */
67316 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67317 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x80a2 }
67319 /* addx${X} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
67322 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67323 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_SI
, { 0x8082 }
67325 /* addx${X} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
67328 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67329 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0xc002 }
67331 /* addx${X} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
67334 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67335 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8022 }
67337 /* addx${X} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
67340 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67341 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_SI
, { 0x8002 }
67343 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
67346 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67347 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc20200 }
67349 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
67352 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67353 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x822200 }
67355 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
67358 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67359 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x820200 }
67361 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
67364 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67365 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc4020000 }
67367 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
67370 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67371 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84220000 }
67373 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
67376 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67377 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84020000 }
67379 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
67382 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67383 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc6020000 }
67385 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
67388 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67389 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86220000 }
67391 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
67394 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67395 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86020000 }
67397 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
67400 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67401 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc28200 }
67403 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
67406 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67407 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82a200 }
67409 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
67412 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67413 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x828200 }
67415 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
67418 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67419 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc4820000 }
67421 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
67424 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67425 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84a20000 }
67427 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
67430 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67431 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84820000 }
67433 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
67436 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67437 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc2c200 }
67439 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
67442 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67443 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82e200 }
67445 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
67448 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67449 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82c200 }
67451 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
67454 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67455 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc4c20000 }
67457 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
67460 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67461 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84e20000 }
67463 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
67466 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67467 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84c20000 }
67469 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u16} */
67472 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
67473 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc6c20000 }
67475 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u16} */
67478 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
67479 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86e20000 }
67481 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u16} */
67484 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
67485 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_SI
, { 0x86c20000 }
67487 /* addx${X} $Src32RnUnprefixedQI,${Dsp-16-u24} */
67490 { { MNEM
, OP (X
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
67491 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc6820000 }
67493 /* addx${X} $Src32AnUnprefixedQI,${Dsp-16-u24} */
67496 { { MNEM
, OP (X
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
67497 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86a20000 }
67499 /* addx${X} [$Src32AnUnprefixed],${Dsp-16-u24} */
67502 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
67503 & ifmt_subx32_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_SI
, { 0x86820000 }
67505 /* addx${X} #${Imm-16-QI},$Dst32RnUnprefixedSI */
67508 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
67509 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x881100 }
67511 /* addx${X} #${Imm-16-QI},$Dst32AnUnprefixedSI */
67514 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
67515 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x809100 }
67517 /* addx${X} #${Imm-16-QI},[$Dst32AnUnprefixed] */
67520 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67521 & ifmt_subx32_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x801100 }
67523 /* addx${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
67526 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67527 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82110000 }
67529 /* addx${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
67532 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
67533 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82910000 }
67535 /* addx${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
67538 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
67539 & ifmt_subx32_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82d10000 }
67541 /* addx${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
67544 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67545 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84110000 }
67547 /* addx${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
67550 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
67551 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84910000 }
67553 /* addx${X} #${Imm-32-QI},${Dsp-16-s16}[fb] */
67556 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
67557 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84d10000 }
67559 /* addx${X} #${Imm-32-QI},${Dsp-16-u16} */
67562 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
67563 & ifmt_subx32_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86d10000 }
67565 /* addx${X} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
67568 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
67569 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86110000 }
67571 /* addx${X} #${Imm-40-QI},${Dsp-16-u24} */
67574 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
67575 & ifmt_subx32_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86910000 }
67577 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
67580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67581 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990000 }
67583 /* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
67586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67587 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992000 }
67589 /* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
67592 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67593 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993000 }
67595 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
67598 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67599 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918000 }
67601 /* dadd.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
67604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67605 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a000 }
67607 /* dadd.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
67610 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67611 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b000 }
67613 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
67616 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67617 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910000 }
67619 /* dadd.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
67622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67623 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912000 }
67625 /* dadd.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
67628 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67629 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913000 }
67631 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
67634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67635 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930000 }
67637 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
67640 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67641 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932000 }
67643 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
67646 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67647 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933000 }
67649 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
67652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67653 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950000 }
67655 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
67658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67659 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952000 }
67661 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
67664 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67665 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953000 }
67667 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
67670 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67671 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970000 }
67673 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
67676 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67677 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972000 }
67679 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
67682 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67683 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973000 }
67685 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
67688 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67689 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938000 }
67691 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
67694 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67695 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a000 }
67697 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
67700 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
67701 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b000 }
67703 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
67706 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67707 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958000 }
67709 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
67712 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67713 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a000 }
67715 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
67718 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
67719 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b000 }
67721 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
67724 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67725 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c000 }
67727 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
67730 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67731 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e000 }
67733 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
67736 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
67737 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f000 }
67739 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
67742 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67743 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c000 }
67745 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
67748 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67749 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e000 }
67751 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
67754 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
67755 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f000 }
67757 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
67760 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
67761 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c000 }
67763 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
67766 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67767 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e000 }
67769 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
67772 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
67773 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f000 }
67775 /* dadd.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
67778 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
67779 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978000 }
67781 /* dadd.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
67784 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67785 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a000 }
67787 /* dadd.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
67790 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
67791 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b000 }
67793 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
67796 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67797 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90000 }
67799 /* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
67802 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67803 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92000 }
67805 /* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
67808 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
67809 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93000 }
67811 /* dadd.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
67814 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
67815 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93000 }
67817 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
67820 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67821 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18000 }
67823 /* dadd.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
67826 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67827 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a000 }
67829 /* dadd.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
67832 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
67833 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b000 }
67835 /* dadd.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
67838 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
67839 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b000 }
67841 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
67844 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67845 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10000 }
67847 /* dadd.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
67850 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67851 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12000 }
67853 /* dadd.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
67856 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67857 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13000 }
67859 /* dadd.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
67862 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
67863 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13000 }
67865 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
67868 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67869 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30000 }
67871 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
67874 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67875 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32000 }
67877 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
67880 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67881 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33000 }
67883 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
67886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67887 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33000 }
67889 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
67892 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67893 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50000 }
67895 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
67898 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67899 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52000 }
67901 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
67904 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67905 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53000 }
67907 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
67910 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67911 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53000 }
67913 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
67916 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67917 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70000 }
67919 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
67922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67923 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72000 }
67925 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
67928 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67929 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73000 }
67931 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
67934 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
67935 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73000 }
67937 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
67940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67941 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38000 }
67943 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
67946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67947 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a000 }
67949 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
67952 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67953 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b000 }
67955 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
67958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
67959 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b000 }
67961 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
67964 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67965 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58000 }
67967 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
67970 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67971 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a000 }
67973 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
67976 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67977 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b000 }
67979 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
67982 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
67983 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b000 }
67985 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
67988 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67989 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c000 }
67991 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
67994 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
67995 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e000 }
67997 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
68000 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68001 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f000 }
68003 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
68006 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68007 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f000 }
68009 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
68012 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68013 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c000 }
68015 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
68018 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68019 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e000 }
68021 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
68024 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68025 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f000 }
68027 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
68030 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68031 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f000 }
68033 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
68036 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
68037 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c000 }
68039 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
68042 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68043 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e000 }
68045 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
68048 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68049 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f000 }
68051 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
68054 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
68055 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f000 }
68057 /* dadd.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
68060 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
68061 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78000 }
68063 /* dadd.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
68066 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68067 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a000 }
68069 /* dadd.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
68072 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68073 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b000 }
68075 /* dadd.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
68078 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
68079 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b000 }
68081 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
68084 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
68085 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90000 }
68087 /* dadd.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
68090 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68091 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92000 }
68093 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
68096 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
68097 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18000 }
68099 /* dadd.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
68102 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68103 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a000 }
68105 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68108 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68109 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10000 }
68111 /* dadd.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
68114 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68115 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12000 }
68117 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
68120 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68121 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30000 }
68123 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
68126 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68127 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32000 }
68129 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
68132 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68133 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50000 }
68135 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
68138 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68139 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52000 }
68141 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
68144 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68145 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70000 }
68147 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
68150 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68151 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72000 }
68153 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
68156 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
68157 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38000 }
68159 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
68162 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
68163 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a000 }
68165 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
68168 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
68169 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58000 }
68171 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
68174 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
68175 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a000 }
68177 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
68180 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
68181 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c000 }
68183 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
68186 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
68187 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e000 }
68189 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
68192 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
68193 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c000 }
68195 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
68198 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
68199 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e000 }
68201 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
68204 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
68205 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c000 }
68207 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
68210 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
68211 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e000 }
68213 /* dadd.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
68216 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
68217 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78000 }
68219 /* dadd.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
68222 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
68223 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a000 }
68225 /* dadd.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
68228 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68229 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c900 }
68231 /* dadd.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
68234 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
68235 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18920 }
68237 /* dadd.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
68240 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
68241 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18900 }
68243 /* dadd.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
68246 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68247 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c180 }
68249 /* dadd.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
68252 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
68253 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a0 }
68255 /* dadd.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
68258 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
68259 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18180 }
68261 /* dadd.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
68264 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68265 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c100 }
68267 /* dadd.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
68270 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68271 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18120 }
68273 /* dadd.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
68276 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68277 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18100 }
68279 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
68282 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68283 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30000 }
68285 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
68288 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68289 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832000 }
68291 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
68294 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68295 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830000 }
68297 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
68300 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68301 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50000 }
68303 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
68306 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68307 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852000 }
68309 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
68312 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68313 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850000 }
68315 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
68318 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68319 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70000 }
68321 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
68324 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68325 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872000 }
68327 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
68330 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68331 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870000 }
68333 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
68336 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68337 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38000 }
68339 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
68342 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68343 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a000 }
68345 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
68348 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
68349 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838000 }
68351 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
68354 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68355 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58000 }
68357 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
68360 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68361 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a000 }
68363 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
68366 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
68367 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858000 }
68369 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
68372 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68373 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c000 }
68375 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
68378 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68379 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e000 }
68381 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
68384 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
68385 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c000 }
68387 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
68390 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68391 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c000 }
68393 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
68396 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68397 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e000 }
68399 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
68402 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
68403 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c000 }
68405 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
68408 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
68409 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c000 }
68411 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
68414 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
68415 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e000 }
68417 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
68420 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
68421 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c000 }
68423 /* dadd.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
68426 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
68427 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78000 }
68429 /* dadd.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
68432 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
68433 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a000 }
68435 /* dadd.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
68438 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
68439 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878000 }
68441 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68444 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68445 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980000 }
68447 /* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
68450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68451 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982000 }
68453 /* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
68456 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68457 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983000 }
68459 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68462 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68463 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908000 }
68465 /* dadd.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
68468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68469 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a000 }
68471 /* dadd.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
68474 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68475 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b000 }
68477 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68480 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68481 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900000 }
68483 /* dadd.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
68486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68487 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902000 }
68489 /* dadd.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
68492 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68493 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903000 }
68495 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
68498 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68499 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920000 }
68501 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
68504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68505 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922000 }
68507 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
68510 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68511 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923000 }
68513 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
68516 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68517 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940000 }
68519 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
68522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68523 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942000 }
68525 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
68528 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68529 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943000 }
68531 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
68534 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68535 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960000 }
68537 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
68540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68541 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962000 }
68543 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
68546 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68547 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963000 }
68549 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
68552 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68553 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928000 }
68555 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
68558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68559 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a000 }
68561 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
68564 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
68565 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b000 }
68567 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
68570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68571 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948000 }
68573 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
68576 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68577 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a000 }
68579 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
68582 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
68583 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b000 }
68585 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
68588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68589 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c000 }
68591 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
68594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68595 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e000 }
68597 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
68600 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
68601 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f000 }
68603 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
68606 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68607 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c000 }
68609 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
68612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68613 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e000 }
68615 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
68618 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
68619 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f000 }
68621 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
68624 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
68625 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c000 }
68627 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
68630 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
68631 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e000 }
68633 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
68636 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
68637 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f000 }
68639 /* dadd.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
68642 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
68643 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968000 }
68645 /* dadd.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
68648 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
68649 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a000 }
68651 /* dadd.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
68654 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
68655 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b000 }
68657 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68660 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68661 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80000 }
68663 /* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
68666 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68667 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82000 }
68669 /* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
68672 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68673 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83000 }
68675 /* dadd.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
68678 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
68679 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83000 }
68681 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68684 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68685 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08000 }
68687 /* dadd.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
68690 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68691 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a000 }
68693 /* dadd.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
68696 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68697 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b000 }
68699 /* dadd.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
68702 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
68703 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b000 }
68705 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68708 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68709 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00000 }
68711 /* dadd.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
68714 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68715 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02000 }
68717 /* dadd.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
68720 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68721 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03000 }
68723 /* dadd.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
68726 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68727 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03000 }
68729 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
68732 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68733 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20000 }
68735 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
68738 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68739 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22000 }
68741 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
68744 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68745 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23000 }
68747 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
68750 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68751 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23000 }
68753 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
68756 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68757 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40000 }
68759 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
68762 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68763 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42000 }
68765 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
68768 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68769 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43000 }
68771 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
68774 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68775 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43000 }
68777 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
68780 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68781 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60000 }
68783 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
68786 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68787 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62000 }
68789 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
68792 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68793 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63000 }
68795 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
68798 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68799 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63000 }
68801 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
68804 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68805 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28000 }
68807 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
68810 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68811 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a000 }
68813 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
68816 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68817 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b000 }
68819 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
68822 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
68823 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b000 }
68825 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
68828 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68829 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48000 }
68831 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
68834 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68835 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a000 }
68837 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
68840 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68841 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b000 }
68843 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
68846 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
68847 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b000 }
68849 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
68852 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68853 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c000 }
68855 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
68858 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68859 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e000 }
68861 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
68864 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68865 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f000 }
68867 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
68870 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
68871 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f000 }
68873 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
68876 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68877 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c000 }
68879 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
68882 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68883 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e000 }
68885 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
68888 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68889 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f000 }
68891 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
68894 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
68895 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f000 }
68897 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
68900 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
68901 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c000 }
68903 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
68906 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68907 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e000 }
68909 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
68912 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
68913 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f000 }
68915 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
68918 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
68919 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f000 }
68921 /* dadd.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
68924 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
68925 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68000 }
68927 /* dadd.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
68930 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68931 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a000 }
68933 /* dadd.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
68936 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
68937 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b000 }
68939 /* dadd.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
68942 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
68943 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b000 }
68945 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
68948 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
68949 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80000 }
68951 /* dadd.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
68954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
68955 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82000 }
68957 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
68960 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
68961 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08000 }
68963 /* dadd.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
68966 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
68967 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a000 }
68969 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
68972 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68973 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00000 }
68975 /* dadd.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
68978 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
68979 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02000 }
68981 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
68984 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68985 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20000 }
68987 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
68990 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68991 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22000 }
68993 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
68996 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
68997 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40000 }
68999 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
69002 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69003 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42000 }
69005 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
69008 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69009 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60000 }
69011 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
69014 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69015 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62000 }
69017 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
69020 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
69021 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28000 }
69023 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
69026 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
69027 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a000 }
69029 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
69032 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
69033 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48000 }
69035 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
69038 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
69039 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a000 }
69041 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
69044 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
69045 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c000 }
69047 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
69050 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
69051 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e000 }
69053 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
69056 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
69057 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c000 }
69059 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
69062 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
69063 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e000 }
69065 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
69068 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
69069 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c000 }
69071 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
69074 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
69075 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e000 }
69077 /* dadd.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
69080 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
69081 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68000 }
69083 /* dadd.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
69086 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
69087 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a000 }
69089 /* dadd.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
69092 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69093 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c800 }
69095 /* dadd.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
69098 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69099 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18820 }
69101 /* dadd.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
69104 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
69105 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18800 }
69107 /* dadd.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
69110 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69111 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c080 }
69113 /* dadd.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
69116 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69117 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a0 }
69119 /* dadd.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
69122 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
69123 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18080 }
69125 /* dadd.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
69128 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69129 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c000 }
69131 /* dadd.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
69134 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69135 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18020 }
69137 /* dadd.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
69140 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69141 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18000 }
69143 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
69146 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69147 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20000 }
69149 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
69152 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69153 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822000 }
69155 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
69158 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69159 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820000 }
69161 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
69164 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69165 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40000 }
69167 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
69170 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69171 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842000 }
69173 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
69176 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69177 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840000 }
69179 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
69182 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69183 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60000 }
69185 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
69188 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69189 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862000 }
69191 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
69194 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69195 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860000 }
69197 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
69200 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69201 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28000 }
69203 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
69206 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69207 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a000 }
69209 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
69212 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69213 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828000 }
69215 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
69218 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69219 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48000 }
69221 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
69224 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69225 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a000 }
69227 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
69230 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69231 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848000 }
69233 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
69236 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69237 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c000 }
69239 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
69242 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69243 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e000 }
69245 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
69248 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69249 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c000 }
69251 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
69254 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69255 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c000 }
69257 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
69260 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69261 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e000 }
69263 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
69266 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69267 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c000 }
69269 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
69272 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
69273 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c000 }
69275 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
69278 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
69279 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e000 }
69281 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
69284 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
69285 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c000 }
69287 /* dadd.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
69290 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
69291 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68000 }
69293 /* dadd.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
69296 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
69297 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a000 }
69299 /* dadd.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
69302 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
69303 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868000 }
69305 /* dadd.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
69308 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69309 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1891e00 }
69311 /* dadd.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
69314 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69315 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1819e00 }
69317 /* dadd.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
69320 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69321 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1811e00 }
69323 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
69326 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69327 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1831e00 }
69329 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
69332 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69333 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1839e00 }
69335 /* dadd.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
69338 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69339 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183de00 }
69341 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
69344 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69345 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1851e00 }
69347 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
69350 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69351 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1859e00 }
69353 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
69356 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69357 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185de00 }
69359 /* dadd.w${X} #${Imm-40-HI},${Dsp-24-u16} */
69362 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
69363 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187de00 }
69365 /* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
69368 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69369 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1871e00 }
69371 /* dadd.w${X} #${Imm-48-HI},${Dsp-24-u24} */
69374 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
69375 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1879e00 }
69377 /* dadd.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
69380 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
69381 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1881e00 }
69383 /* dadd.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
69386 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
69387 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1809e00 }
69389 /* dadd.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
69392 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69393 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1801e00 }
69395 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
69398 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69399 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1821e00 }
69401 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
69404 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
69405 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1829e00 }
69407 /* dadd.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
69410 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
69411 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182de00 }
69413 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
69416 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69417 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1841e00 }
69419 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
69422 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
69423 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1849e00 }
69425 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
69428 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
69429 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184de00 }
69431 /* dadd.b${X} #${Imm-40-QI},${Dsp-24-u16} */
69434 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
69435 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186de00 }
69437 /* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
69440 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69441 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1861e00 }
69443 /* dadd.b${X} #${Imm-48-QI},${Dsp-24-u24} */
69446 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
69447 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1869e00 }
69449 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69453 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990800 }
69455 /* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
69458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69459 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992800 }
69461 /* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
69464 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69465 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993800 }
69467 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69471 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918800 }
69473 /* dadc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
69476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69477 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a800 }
69479 /* dadc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
69482 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69483 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b800 }
69485 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69488 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69489 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910800 }
69491 /* dadc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
69494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69495 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912800 }
69497 /* dadc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
69500 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69501 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913800 }
69503 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
69506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69507 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930800 }
69509 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
69512 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69513 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932800 }
69515 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
69518 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69519 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933800 }
69521 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
69524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69525 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950800 }
69527 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
69530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69531 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952800 }
69533 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
69536 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69537 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953800 }
69539 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
69542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69543 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970800 }
69545 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
69548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69549 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972800 }
69551 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
69554 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69555 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973800 }
69557 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
69560 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69561 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938800 }
69563 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
69566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69567 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a800 }
69569 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
69572 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
69573 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b800 }
69575 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
69578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69579 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958800 }
69581 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
69584 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69585 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a800 }
69587 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
69590 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
69591 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b800 }
69593 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
69596 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69597 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c800 }
69599 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
69602 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69603 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e800 }
69605 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
69608 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
69609 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f800 }
69611 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
69614 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69615 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c800 }
69617 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
69620 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69621 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e800 }
69623 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
69626 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
69627 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f800 }
69629 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
69632 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
69633 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c800 }
69635 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
69638 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
69639 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e800 }
69641 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
69644 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
69645 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f800 }
69647 /* dadc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
69650 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
69651 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978800 }
69653 /* dadc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
69656 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
69657 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a800 }
69659 /* dadc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
69662 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
69663 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b800 }
69665 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69668 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69669 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90800 }
69671 /* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
69674 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69675 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92800 }
69677 /* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
69680 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69681 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93800 }
69683 /* dadc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
69686 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69687 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93800 }
69689 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69692 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69693 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18800 }
69695 /* dadc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
69698 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69699 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a800 }
69701 /* dadc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
69704 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69705 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b800 }
69707 /* dadc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
69710 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69711 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b800 }
69713 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69716 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69717 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10800 }
69719 /* dadc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
69722 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69723 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12800 }
69725 /* dadc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
69728 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69729 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13800 }
69731 /* dadc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
69734 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69735 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13800 }
69737 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
69740 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69741 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30800 }
69743 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
69746 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69747 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32800 }
69749 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
69752 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69753 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33800 }
69755 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
69758 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69759 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33800 }
69761 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
69764 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69765 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50800 }
69767 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
69770 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69771 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52800 }
69773 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
69776 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69777 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53800 }
69779 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
69782 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69783 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53800 }
69785 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
69788 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69789 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70800 }
69791 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
69794 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69795 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72800 }
69797 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
69800 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69801 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73800 }
69803 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
69806 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69807 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73800 }
69809 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
69812 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69813 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38800 }
69815 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
69818 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69819 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a800 }
69821 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
69824 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69825 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b800 }
69827 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
69830 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
69831 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b800 }
69833 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
69836 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69837 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58800 }
69839 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
69842 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69843 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a800 }
69845 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
69848 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69849 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b800 }
69851 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
69854 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
69855 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b800 }
69857 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
69860 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69861 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c800 }
69863 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
69866 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69867 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e800 }
69869 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
69872 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69873 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f800 }
69875 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
69878 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
69879 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f800 }
69881 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
69884 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69885 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c800 }
69887 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
69890 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69891 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e800 }
69893 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
69896 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69897 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f800 }
69899 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
69902 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
69903 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f800 }
69905 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
69908 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
69909 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c800 }
69911 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
69914 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
69915 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e800 }
69917 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
69920 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
69921 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f800 }
69923 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
69926 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
69927 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f800 }
69929 /* dadc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
69932 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
69933 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78800 }
69935 /* dadc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
69938 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
69939 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a800 }
69941 /* dadc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
69944 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
69945 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b800 }
69947 /* dadc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
69950 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
69951 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b800 }
69953 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
69956 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
69957 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90800 }
69959 /* dadc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
69962 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
69963 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92800 }
69965 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
69968 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
69969 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18800 }
69971 /* dadc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
69974 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
69975 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a800 }
69977 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
69980 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69981 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10800 }
69983 /* dadc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
69986 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
69987 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12800 }
69989 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
69992 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69993 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30800 }
69995 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
69998 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
69999 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32800 }
70001 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
70004 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70005 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50800 }
70007 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
70010 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70011 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52800 }
70013 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
70016 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70017 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70800 }
70019 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
70022 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70023 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72800 }
70025 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
70028 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70029 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38800 }
70031 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
70034 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70035 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a800 }
70037 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
70040 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70041 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58800 }
70043 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
70046 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70047 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a800 }
70049 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
70052 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70053 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c800 }
70055 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
70058 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70059 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e800 }
70061 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
70064 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70065 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c800 }
70067 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
70070 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70071 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e800 }
70073 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
70076 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
70077 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c800 }
70079 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
70082 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
70083 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e800 }
70085 /* dadc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
70088 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
70089 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78800 }
70091 /* dadc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
70094 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
70095 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a800 }
70097 /* dadc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
70100 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
70101 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c908 }
70103 /* dadc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
70106 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
70107 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18928 }
70109 /* dadc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
70112 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
70113 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18908 }
70115 /* dadc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
70118 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
70119 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c188 }
70121 /* dadc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
70124 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
70125 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a8 }
70127 /* dadc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
70130 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
70131 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18188 }
70133 /* dadc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
70136 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70137 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c108 }
70139 /* dadc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
70142 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70143 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18128 }
70145 /* dadc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
70148 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70149 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18108 }
70151 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
70154 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70155 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30800 }
70157 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
70160 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70161 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832800 }
70163 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
70166 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70167 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830800 }
70169 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
70172 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70173 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50800 }
70175 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
70178 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70179 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852800 }
70181 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
70184 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70185 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850800 }
70187 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
70190 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70191 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70800 }
70193 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
70196 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70197 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872800 }
70199 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
70202 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70203 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870800 }
70205 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
70208 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70209 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38800 }
70211 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
70214 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70215 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a800 }
70217 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
70220 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
70221 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838800 }
70223 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
70226 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70227 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58800 }
70229 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
70232 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70233 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a800 }
70235 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
70238 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
70239 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858800 }
70241 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
70244 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70245 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c800 }
70247 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
70250 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70251 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e800 }
70253 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
70256 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
70257 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c800 }
70259 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
70262 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70263 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c800 }
70265 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
70268 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70269 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e800 }
70271 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
70274 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
70275 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c800 }
70277 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
70280 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
70281 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c800 }
70283 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
70286 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
70287 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e800 }
70289 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
70292 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
70293 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c800 }
70295 /* dadc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
70298 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
70299 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78800 }
70301 /* dadc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
70304 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
70305 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a800 }
70307 /* dadc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
70310 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
70311 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878800 }
70313 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70316 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70317 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980800 }
70319 /* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
70322 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70323 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982800 }
70325 /* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
70328 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70329 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983800 }
70331 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70334 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70335 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908800 }
70337 /* dadc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
70340 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70341 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a800 }
70343 /* dadc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
70346 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70347 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b800 }
70349 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70352 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70353 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900800 }
70355 /* dadc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
70358 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70359 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902800 }
70361 /* dadc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
70364 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70365 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903800 }
70367 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
70370 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70371 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920800 }
70373 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
70376 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70377 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922800 }
70379 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
70382 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70383 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923800 }
70385 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
70388 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70389 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940800 }
70391 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
70394 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70395 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942800 }
70397 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
70400 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70401 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943800 }
70403 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
70406 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70407 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960800 }
70409 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
70412 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70413 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962800 }
70415 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
70418 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70419 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963800 }
70421 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
70424 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70425 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928800 }
70427 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
70430 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70431 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a800 }
70433 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
70436 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
70437 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b800 }
70439 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
70442 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70443 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948800 }
70445 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
70448 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70449 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a800 }
70451 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
70454 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
70455 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b800 }
70457 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
70460 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70461 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c800 }
70463 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
70466 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70467 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e800 }
70469 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
70472 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
70473 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f800 }
70475 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
70478 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70479 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c800 }
70481 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
70484 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70485 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e800 }
70487 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
70490 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
70491 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f800 }
70493 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
70496 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
70497 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c800 }
70499 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
70502 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
70503 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e800 }
70505 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
70508 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
70509 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f800 }
70511 /* dadc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
70514 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
70515 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968800 }
70517 /* dadc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
70520 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
70521 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a800 }
70523 /* dadc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
70526 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
70527 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b800 }
70529 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70532 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70533 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80800 }
70535 /* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
70538 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70539 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82800 }
70541 /* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
70544 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70545 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83800 }
70547 /* dadc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
70550 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70551 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83800 }
70553 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70556 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70557 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08800 }
70559 /* dadc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
70562 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70563 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a800 }
70565 /* dadc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
70568 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70569 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b800 }
70571 /* dadc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
70574 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70575 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b800 }
70577 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70580 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70581 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00800 }
70583 /* dadc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
70586 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70587 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02800 }
70589 /* dadc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
70592 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70593 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03800 }
70595 /* dadc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
70598 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70599 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03800 }
70601 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
70604 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70605 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20800 }
70607 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
70610 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70611 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22800 }
70613 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
70616 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70617 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23800 }
70619 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
70622 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70623 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23800 }
70625 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
70628 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70629 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40800 }
70631 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
70634 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70635 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42800 }
70637 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
70640 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70641 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43800 }
70643 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
70646 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70647 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43800 }
70649 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
70652 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70653 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60800 }
70655 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
70658 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70659 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62800 }
70661 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
70664 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70665 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63800 }
70667 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
70670 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70671 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63800 }
70673 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
70676 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70677 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28800 }
70679 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
70682 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70683 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a800 }
70685 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
70688 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70689 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b800 }
70691 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
70694 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
70695 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b800 }
70697 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
70700 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70701 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48800 }
70703 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
70706 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70707 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a800 }
70709 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
70712 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70713 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b800 }
70715 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
70718 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
70719 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b800 }
70721 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
70724 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70725 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c800 }
70727 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
70730 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70731 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e800 }
70733 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
70736 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70737 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f800 }
70739 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
70742 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
70743 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f800 }
70745 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
70748 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70749 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c800 }
70751 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
70754 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70755 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e800 }
70757 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
70760 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70761 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f800 }
70763 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
70766 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
70767 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f800 }
70769 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
70772 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
70773 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c800 }
70775 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
70778 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
70779 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e800 }
70781 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
70784 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
70785 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f800 }
70787 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
70790 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
70791 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f800 }
70793 /* dadc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
70796 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
70797 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68800 }
70799 /* dadc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
70802 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
70803 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a800 }
70805 /* dadc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
70808 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
70809 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b800 }
70811 /* dadc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
70814 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
70815 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b800 }
70817 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
70820 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70821 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80800 }
70823 /* dadc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
70826 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70827 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82800 }
70829 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
70832 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70833 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08800 }
70835 /* dadc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
70838 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70839 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a800 }
70841 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
70844 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70845 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00800 }
70847 /* dadc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
70850 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
70851 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02800 }
70853 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
70856 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70857 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20800 }
70859 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
70862 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70863 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22800 }
70865 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
70868 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70869 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40800 }
70871 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
70874 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70875 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42800 }
70877 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
70880 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70881 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60800 }
70883 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
70886 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
70887 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62800 }
70889 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
70892 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70893 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28800 }
70895 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
70898 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
70899 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a800 }
70901 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
70904 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70905 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48800 }
70907 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
70910 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
70911 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a800 }
70913 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
70916 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70917 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c800 }
70919 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
70922 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
70923 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e800 }
70925 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
70928 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70929 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c800 }
70931 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
70934 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
70935 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e800 }
70937 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
70940 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
70941 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c800 }
70943 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
70946 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
70947 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e800 }
70949 /* dadc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
70952 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
70953 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68800 }
70955 /* dadc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
70958 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
70959 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a800 }
70961 /* dadc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
70964 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70965 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c808 }
70967 /* dadc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
70970 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
70971 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18828 }
70973 /* dadc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
70976 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
70977 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18808 }
70979 /* dadc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
70982 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70983 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c088 }
70985 /* dadc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
70988 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
70989 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a8 }
70991 /* dadc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
70994 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
70995 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18088 }
70997 /* dadc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
71000 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71001 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c008 }
71003 /* dadc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
71006 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71007 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18028 }
71009 /* dadc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
71012 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71013 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18008 }
71015 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
71018 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71019 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20800 }
71021 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
71024 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71025 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822800 }
71027 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
71030 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71031 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820800 }
71033 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
71036 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71037 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40800 }
71039 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
71042 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71043 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842800 }
71045 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
71048 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71049 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840800 }
71051 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
71054 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71055 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60800 }
71057 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
71060 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71061 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862800 }
71063 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
71066 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71067 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860800 }
71069 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
71072 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71073 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28800 }
71075 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
71078 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71079 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a800 }
71081 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
71084 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71085 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828800 }
71087 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
71090 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71091 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48800 }
71093 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
71096 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71097 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a800 }
71099 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
71102 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71103 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848800 }
71105 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
71108 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71109 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c800 }
71111 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
71114 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71115 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e800 }
71117 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
71120 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71121 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c800 }
71123 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
71126 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71127 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c800 }
71129 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
71132 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71133 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e800 }
71135 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
71138 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71139 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c800 }
71141 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
71144 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
71145 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c800 }
71147 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
71150 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
71151 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e800 }
71153 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
71156 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
71157 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c800 }
71159 /* dadc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
71162 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
71163 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68800 }
71165 /* dadc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
71168 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
71169 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a800 }
71171 /* dadc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
71174 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
71175 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868800 }
71177 /* dadc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
71180 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71181 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1890e00 }
71183 /* dadc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
71186 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71187 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x1818e00 }
71189 /* dadc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
71192 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71193 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1810e00 }
71195 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
71198 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71199 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830e00 }
71201 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
71204 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71205 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838e00 }
71207 /* dadc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
71210 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71211 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ce00 }
71213 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
71216 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71217 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850e00 }
71219 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
71222 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71223 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858e00 }
71225 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
71228 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71229 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ce00 }
71231 /* dadc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
71234 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
71235 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ce00 }
71237 /* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
71240 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71241 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870e00 }
71243 /* dadc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
71246 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
71247 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x1878e00 }
71249 /* dadc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
71252 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
71253 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1880e00 }
71255 /* dadc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
71258 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
71259 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x1808e00 }
71261 /* dadc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
71264 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71265 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1800e00 }
71267 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
71270 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71271 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820e00 }
71273 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
71276 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
71277 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828e00 }
71279 /* dadc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
71282 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
71283 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ce00 }
71285 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
71288 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71289 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840e00 }
71291 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
71294 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
71295 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848e00 }
71297 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
71300 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
71301 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ce00 }
71303 /* dadc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
71306 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
71307 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ce00 }
71309 /* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
71312 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71313 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860e00 }
71315 /* dadc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
71318 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
71319 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x1868e00 }
71321 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71324 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71325 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1990400 }
71327 /* adc.w${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedHI */
71330 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71331 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1992400 }
71333 /* adc.w${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedHI */
71336 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71337 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1993400 }
71339 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71342 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71343 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1918400 }
71345 /* adc.w${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedHI */
71348 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71349 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191a400 }
71351 /* adc.w${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedHI */
71354 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71355 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x191b400 }
71357 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71360 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71361 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1910400 }
71363 /* adc.w${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
71366 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71367 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1912400 }
71369 /* adc.w${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
71372 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71373 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1913400 }
71375 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
71378 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71379 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1930400 }
71381 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
71384 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71385 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1932400 }
71387 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
71390 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71391 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_An_relative_Prefixed_HI
, { 0x1933400 }
71393 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
71396 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71397 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1950400 }
71399 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
71402 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71403 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1952400 }
71405 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
71408 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71409 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_An_relative_Prefixed_HI
, { 0x1953400 }
71411 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
71414 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71415 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1970400 }
71417 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
71420 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71421 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1972400 }
71423 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
71426 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71427 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_An_relative_Prefixed_HI
, { 0x1973400 }
71429 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
71432 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71433 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x1938400 }
71435 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
71438 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71439 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193a400 }
71441 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
71444 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
71445 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_SB_relative_Prefixed_HI
, { 0x193b400 }
71447 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
71450 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71451 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x1958400 }
71453 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
71456 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71457 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195a400 }
71459 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
71462 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
71463 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_SB_relative_Prefixed_HI
, { 0x195b400 }
71465 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
71468 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71469 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193c400 }
71471 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
71474 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71475 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193e400 }
71477 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
71480 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
71481 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_8_FB_relative_Prefixed_HI
, { 0x193f400 }
71483 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
71486 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71487 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195c400 }
71489 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
71492 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71493 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195e400 }
71495 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
71498 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
71499 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_FB_relative_Prefixed_HI
, { 0x195f400 }
71501 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
71504 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
71505 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197c400 }
71507 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
71510 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
71511 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197e400 }
71513 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
71516 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
71517 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_16_absolute_Prefixed_HI
, { 0x197f400 }
71519 /* adc.w${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
71522 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
71523 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x1978400 }
71525 /* adc.w${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
71528 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
71529 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197a400 }
71531 /* adc.w${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
71534 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
71535 & ifmt_tst32_w_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_HI_dst32_32_24_absolute_Prefixed_HI
, { 0x197b400 }
71537 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71540 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71541 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a90400 }
71543 /* adc.w${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedHI */
71546 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71547 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a92400 }
71549 /* adc.w${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedHI */
71552 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71553 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1a93400 }
71555 /* adc.w${X} ${Dsp-24-u16},$Dst32RnPrefixedHI */
71558 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71559 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b93400 }
71561 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71564 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71565 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a18400 }
71567 /* adc.w${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedHI */
71570 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71571 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1a400 }
71573 /* adc.w${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedHI */
71576 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71577 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1a1b400 }
71579 /* adc.w${X} ${Dsp-24-u16},$Dst32AnPrefixedHI */
71582 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71583 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1b400 }
71585 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71588 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71589 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a10400 }
71591 /* adc.w${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
71594 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71595 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a12400 }
71597 /* adc.w${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
71600 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71601 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1a13400 }
71603 /* adc.w${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
71606 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71607 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b13400 }
71609 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
71612 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71613 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a30400 }
71615 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
71618 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71619 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a32400 }
71621 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
71624 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71625 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1a33400 }
71627 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
71630 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71631 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_An_relative_Prefixed_HI
, { 0x1b33400 }
71633 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
71636 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71637 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a50400 }
71639 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
71642 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71643 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a52400 }
71645 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
71648 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71649 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1a53400 }
71651 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
71654 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71655 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_An_relative_Prefixed_HI
, { 0x1b53400 }
71657 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
71660 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71661 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a70400 }
71663 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
71666 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71667 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a72400 }
71669 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
71672 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71673 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1a73400 }
71675 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
71678 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71679 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_An_relative_Prefixed_HI
, { 0x1b73400 }
71681 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
71684 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71685 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a38400 }
71687 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
71690 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71691 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3a400 }
71693 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
71696 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71697 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1a3b400 }
71699 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
71702 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
71703 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_SB_relative_Prefixed_HI
, { 0x1b3b400 }
71705 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
71708 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71709 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a58400 }
71711 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
71714 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71715 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5a400 }
71717 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
71720 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71721 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1a5b400 }
71723 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
71726 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
71727 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_SB_relative_Prefixed_HI
, { 0x1b5b400 }
71729 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
71732 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71733 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3c400 }
71735 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
71738 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71739 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3e400 }
71741 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
71744 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71745 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1a3f400 }
71747 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
71750 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
71751 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_8_FB_relative_Prefixed_HI
, { 0x1b3f400 }
71753 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
71756 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71757 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5c400 }
71759 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
71762 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71763 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5e400 }
71765 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
71768 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71769 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1a5f400 }
71771 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
71774 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
71775 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_FB_relative_Prefixed_HI
, { 0x1b5f400 }
71777 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
71780 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
71781 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7c400 }
71783 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
71786 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
71787 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7e400 }
71789 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
71792 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
71793 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1a7f400 }
71795 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u16} */
71798 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
71799 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_16_absolute_Prefixed_HI
, { 0x1b7f400 }
71801 /* adc.w${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
71804 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
71805 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a78400 }
71807 /* adc.w${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
71810 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
71811 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7a400 }
71813 /* adc.w${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
71816 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
71817 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1a7b400 }
71819 /* adc.w${X} ${Dsp-24-u16},${Dsp-40-u24} */
71822 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
71823 & ifmt_tst32_w_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_HI_dst32_40_24_absolute_Prefixed_HI
, { 0x1b7b400 }
71825 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedHI */
71828 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71829 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b90400 }
71831 /* adc.w${X} ${Dsp-24-u24},$Dst32RnPrefixedHI */
71834 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71835 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1b92400 }
71837 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedHI */
71840 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
71841 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b18400 }
71843 /* adc.w${X} ${Dsp-24-u24},$Dst32AnPrefixedHI */
71846 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71847 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1b1a400 }
71849 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
71852 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71853 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b10400 }
71855 /* adc.w${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
71858 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
71859 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1b12400 }
71861 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
71864 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71865 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b30400 }
71867 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
71870 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71871 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_An_relative_Prefixed_HI
, { 0x1b32400 }
71873 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
71876 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71877 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b50400 }
71879 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
71882 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71883 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_An_relative_Prefixed_HI
, { 0x1b52400 }
71885 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
71888 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71889 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b70400 }
71891 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
71894 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
71895 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_An_relative_Prefixed_HI
, { 0x1b72400 }
71897 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
71900 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
71901 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b38400 }
71903 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
71906 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
71907 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_SB_relative_Prefixed_HI
, { 0x1b3a400 }
71909 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
71912 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
71913 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b58400 }
71915 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
71918 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
71919 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_SB_relative_Prefixed_HI
, { 0x1b5a400 }
71921 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
71924 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
71925 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3c400 }
71927 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
71930 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
71931 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_8_FB_relative_Prefixed_HI
, { 0x1b3e400 }
71933 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
71936 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
71937 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5c400 }
71939 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
71942 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
71943 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_FB_relative_Prefixed_HI
, { 0x1b5e400 }
71945 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
71948 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
71949 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7c400 }
71951 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u16} */
71954 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
71955 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_16_absolute_Prefixed_HI
, { 0x1b7e400 }
71957 /* adc.w${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
71960 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
71961 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b78400 }
71963 /* adc.w${X} ${Dsp-24-u24},${Dsp-48-u24} */
71966 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
71967 & ifmt_tst32_w_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_HI_dst32_48_24_absolute_Prefixed_HI
, { 0x1b7a400 }
71969 /* adc.w${X} $Src32RnPrefixedHI,$Dst32RnPrefixedHI */
71972 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71973 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x1c904 }
71975 /* adc.w${X} $Src32AnPrefixedHI,$Dst32RnPrefixedHI */
71978 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
71979 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18924 }
71981 /* adc.w${X} [$Src32AnPrefixed],$Dst32RnPrefixedHI */
71984 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDHI
), 0 } },
71985 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_Rn_direct_Prefixed_HI
, { 0x18904 }
71987 /* adc.w${X} $Src32RnPrefixedHI,$Dst32AnPrefixedHI */
71990 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71991 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x1c184 }
71993 /* adc.w${X} $Src32AnPrefixedHI,$Dst32AnPrefixedHI */
71996 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
71997 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x181a4 }
71999 /* adc.w${X} [$Src32AnPrefixed],$Dst32AnPrefixedHI */
72002 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDHI
), 0 } },
72003 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_direct_Prefixed_HI
, { 0x18184 }
72005 /* adc.w${X} $Src32RnPrefixedHI,[$Dst32AnPrefixed] */
72008 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72009 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x1c104 }
72011 /* adc.w${X} $Src32AnPrefixedHI,[$Dst32AnPrefixed] */
72014 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72015 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18124 }
72017 /* adc.w${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
72020 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72021 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_An_indirect_Prefixed_HI
, { 0x18104 }
72023 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72026 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72027 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1c30400 }
72029 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72032 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72033 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832400 }
72035 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
72038 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72039 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_An_relative_Prefixed_HI
, { 0x1830400 }
72041 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72044 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72045 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1c50400 }
72047 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72050 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72051 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852400 }
72053 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
72056 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72057 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_An_relative_Prefixed_HI
, { 0x1850400 }
72059 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72062 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72063 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1c70400 }
72065 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72068 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72069 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872400 }
72071 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
72074 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72075 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_An_relative_Prefixed_HI
, { 0x1870400 }
72077 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u8}[sb] */
72080 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72081 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1c38400 }
72083 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u8}[sb] */
72086 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72087 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183a400 }
72089 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
72092 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72093 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_SB_relative_Prefixed_HI
, { 0x1838400 }
72095 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16}[sb] */
72098 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72099 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1c58400 }
72101 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16}[sb] */
72104 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72105 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185a400 }
72107 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
72110 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72111 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_SB_relative_Prefixed_HI
, { 0x1858400 }
72113 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s8}[fb] */
72116 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72117 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x1c3c400 }
72119 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s8}[fb] */
72122 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72123 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183e400 }
72125 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
72128 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72129 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183c400 }
72131 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-s16}[fb] */
72134 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72135 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x1c5c400 }
72137 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-s16}[fb] */
72140 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72141 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185e400 }
72143 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
72146 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72147 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185c400 }
72149 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u16} */
72152 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
72153 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x1c7c400 }
72155 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u16} */
72158 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U16
), 0 } },
72159 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187e400 }
72161 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u16} */
72164 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
72165 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_16_absolute_Prefixed_HI
, { 0x187c400 }
72167 /* adc.w${X} $Src32RnPrefixedHI,${Dsp-24-u24} */
72170 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
72171 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1c78400 }
72173 /* adc.w${X} $Src32AnPrefixedHI,${Dsp-24-u24} */
72176 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDHI
), ',', OP (DSP_24_U24
), 0 } },
72177 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x187a400 }
72179 /* adc.w${X} [$Src32AnPrefixed],${Dsp-24-u24} */
72182 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
72183 & ifmt_tst32_w_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_HI_dst32_24_24_absolute_Prefixed_HI
, { 0x1878400 }
72185 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72188 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72189 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1980400 }
72191 /* adc.b${X} ${Dsp-24-u8}[sb],$Dst32RnPrefixedQI */
72194 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72195 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1982400 }
72197 /* adc.b${X} ${Dsp-24-s8}[fb],$Dst32RnPrefixedQI */
72200 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72201 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1983400 }
72203 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72206 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72207 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1908400 }
72209 /* adc.b${X} ${Dsp-24-u8}[sb],$Dst32AnPrefixedQI */
72212 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72213 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190a400 }
72215 /* adc.b${X} ${Dsp-24-s8}[fb],$Dst32AnPrefixedQI */
72218 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72219 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x190b400 }
72221 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72224 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72225 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1900400 }
72227 /* adc.b${X} ${Dsp-24-u8}[sb],[$Dst32AnPrefixed] */
72230 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72231 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1902400 }
72233 /* adc.b${X} ${Dsp-24-s8}[fb],[$Dst32AnPrefixed] */
72236 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72237 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1903400 }
72239 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[$Dst32AnPrefixed] */
72242 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72243 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1920400 }
72245 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[$Dst32AnPrefixed] */
72248 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72249 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1922400 }
72251 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[$Dst32AnPrefixed] */
72254 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72255 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_An_relative_Prefixed_QI
, { 0x1923400 }
72257 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[$Dst32AnPrefixed] */
72260 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72261 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1940400 }
72263 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[$Dst32AnPrefixed] */
72266 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72267 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1942400 }
72269 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[$Dst32AnPrefixed] */
72272 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72273 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_An_relative_Prefixed_QI
, { 0x1943400 }
72275 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24}[$Dst32AnPrefixed] */
72278 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72279 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1960400 }
72281 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24}[$Dst32AnPrefixed] */
72284 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72285 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1962400 }
72287 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24}[$Dst32AnPrefixed] */
72290 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72291 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_An_relative_Prefixed_QI
, { 0x1963400 }
72293 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u8}[sb] */
72296 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72297 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x1928400 }
72299 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u8}[sb] */
72302 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72303 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192a400 }
72305 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u8}[sb] */
72308 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
72309 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_SB_relative_Prefixed_QI
, { 0x192b400 }
72311 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16}[sb] */
72314 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72315 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x1948400 }
72317 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16}[sb] */
72320 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72321 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194a400 }
72323 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16}[sb] */
72326 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
72327 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_SB_relative_Prefixed_QI
, { 0x194b400 }
72329 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s8}[fb] */
72332 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72333 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192c400 }
72335 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s8}[fb] */
72338 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72339 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192e400 }
72341 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s8}[fb] */
72344 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
72345 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_8_FB_relative_Prefixed_QI
, { 0x192f400 }
72347 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-s16}[fb] */
72350 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72351 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194c400 }
72353 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-s16}[fb] */
72356 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72357 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194e400 }
72359 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-s16}[fb] */
72362 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
72363 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_FB_relative_Prefixed_QI
, { 0x194f400 }
72365 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u16} */
72368 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
72369 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196c400 }
72371 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u16} */
72374 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
72375 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196e400 }
72377 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u16} */
72380 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
72381 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_16_absolute_Prefixed_QI
, { 0x196f400 }
72383 /* adc.b${X} ${Dsp-24-u8}[$Src32AnPrefixed],${Dsp-32-u24} */
72386 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
72387 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_An_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x1968400 }
72389 /* adc.b${X} ${Dsp-24-u8}[sb],${Dsp-32-u24} */
72392 { { MNEM
, OP (X
), ' ', OP (DSP_24_U8
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
72393 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_SB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196a400 }
72395 /* adc.b${X} ${Dsp-24-s8}[fb],${Dsp-32-u24} */
72398 { { MNEM
, OP (X
), ' ', OP (DSP_24_S8
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
72399 & ifmt_tst32_b_24_8_Prefixed_32_Prefixed_src32_24_8_FB_relative_Prefixed_QI_dst32_32_24_absolute_Prefixed_QI
, { 0x196b400 }
72401 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72404 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72405 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a80400 }
72407 /* adc.b${X} ${Dsp-24-u16}[sb],$Dst32RnPrefixedQI */
72410 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72411 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a82400 }
72413 /* adc.b${X} ${Dsp-24-s16}[fb],$Dst32RnPrefixedQI */
72416 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72417 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1a83400 }
72419 /* adc.b${X} ${Dsp-24-u16},$Dst32RnPrefixedQI */
72422 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72423 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b83400 }
72425 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72428 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72429 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a08400 }
72431 /* adc.b${X} ${Dsp-24-u16}[sb],$Dst32AnPrefixedQI */
72434 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72435 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0a400 }
72437 /* adc.b${X} ${Dsp-24-s16}[fb],$Dst32AnPrefixedQI */
72440 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72441 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1a0b400 }
72443 /* adc.b${X} ${Dsp-24-u16},$Dst32AnPrefixedQI */
72446 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72447 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0b400 }
72449 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72452 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72453 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a00400 }
72455 /* adc.b${X} ${Dsp-24-u16}[sb],[$Dst32AnPrefixed] */
72458 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72459 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a02400 }
72461 /* adc.b${X} ${Dsp-24-s16}[fb],[$Dst32AnPrefixed] */
72464 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72465 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1a03400 }
72467 /* adc.b${X} ${Dsp-24-u16},[$Dst32AnPrefixed] */
72470 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72471 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b03400 }
72473 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[$Dst32AnPrefixed] */
72476 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72477 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a20400 }
72479 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[$Dst32AnPrefixed] */
72482 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72483 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a22400 }
72485 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[$Dst32AnPrefixed] */
72488 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72489 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1a23400 }
72491 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[$Dst32AnPrefixed] */
72494 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72495 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_An_relative_Prefixed_QI
, { 0x1b23400 }
72497 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[$Dst32AnPrefixed] */
72500 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72501 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a40400 }
72503 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[$Dst32AnPrefixed] */
72506 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72507 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a42400 }
72509 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[$Dst32AnPrefixed] */
72512 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72513 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1a43400 }
72515 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[$Dst32AnPrefixed] */
72518 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72519 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_An_relative_Prefixed_QI
, { 0x1b43400 }
72521 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24}[$Dst32AnPrefixed] */
72524 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72525 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a60400 }
72527 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24}[$Dst32AnPrefixed] */
72530 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72531 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a62400 }
72533 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24}[$Dst32AnPrefixed] */
72536 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72537 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1a63400 }
72539 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24}[$Dst32AnPrefixed] */
72542 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72543 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_An_relative_Prefixed_QI
, { 0x1b63400 }
72545 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u8}[sb] */
72548 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72549 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a28400 }
72551 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u8}[sb] */
72554 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72555 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2a400 }
72557 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u8}[sb] */
72560 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72561 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1a2b400 }
72563 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u8}[sb] */
72566 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
72567 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_SB_relative_Prefixed_QI
, { 0x1b2b400 }
72569 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16}[sb] */
72572 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72573 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a48400 }
72575 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16}[sb] */
72578 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72579 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4a400 }
72581 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16}[sb] */
72584 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72585 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1a4b400 }
72587 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16}[sb] */
72590 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
72591 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_SB_relative_Prefixed_QI
, { 0x1b4b400 }
72593 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s8}[fb] */
72596 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72597 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2c400 }
72599 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s8}[fb] */
72602 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72603 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2e400 }
72605 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s8}[fb] */
72608 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72609 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1a2f400 }
72611 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-s8}[fb] */
72614 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
72615 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_8_FB_relative_Prefixed_QI
, { 0x1b2f400 }
72617 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-s16}[fb] */
72620 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72621 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4c400 }
72623 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-s16}[fb] */
72626 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72627 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4e400 }
72629 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-s16}[fb] */
72632 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72633 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1a4f400 }
72635 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-s16}[fb] */
72638 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
72639 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_FB_relative_Prefixed_QI
, { 0x1b4f400 }
72641 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u16} */
72644 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
72645 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6c400 }
72647 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u16} */
72650 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
72651 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6e400 }
72653 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u16} */
72656 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U16
), 0 } },
72657 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1a6f400 }
72659 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u16} */
72662 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U16
), 0 } },
72663 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_16_absolute_Prefixed_QI
, { 0x1b6f400 }
72665 /* adc.b${X} ${Dsp-24-u16}[$Src32AnPrefixed],${Dsp-40-u24} */
72668 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
72669 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_An_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a68400 }
72671 /* adc.b${X} ${Dsp-24-u16}[sb],${Dsp-40-u24} */
72674 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), '[', 's', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
72675 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_SB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6a400 }
72677 /* adc.b${X} ${Dsp-24-s16}[fb],${Dsp-40-u24} */
72680 { { MNEM
, OP (X
), ' ', OP (DSP_24_S16
), '[', 'f', 'b', ']', ',', OP (DSP_40_U24
), 0 } },
72681 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_FB_relative_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1a6b400 }
72683 /* adc.b${X} ${Dsp-24-u16},${Dsp-40-u24} */
72686 { { MNEM
, OP (X
), ' ', OP (DSP_24_U16
), ',', OP (DSP_40_U24
), 0 } },
72687 & ifmt_tst32_b_24_16_Prefixed_40_Prefixed_src32_24_16_absolute_Prefixed_QI_dst32_40_24_absolute_Prefixed_QI
, { 0x1b6b400 }
72689 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32RnPrefixedQI */
72692 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72693 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b80400 }
72695 /* adc.b${X} ${Dsp-24-u24},$Dst32RnPrefixedQI */
72698 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72699 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1b82400 }
72701 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],$Dst32AnPrefixedQI */
72704 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72705 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b08400 }
72707 /* adc.b${X} ${Dsp-24-u24},$Dst32AnPrefixedQI */
72710 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72711 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1b0a400 }
72713 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],[$Dst32AnPrefixed] */
72716 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72717 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b00400 }
72719 /* adc.b${X} ${Dsp-24-u24},[$Dst32AnPrefixed] */
72722 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72723 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1b02400 }
72725 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[$Dst32AnPrefixed] */
72728 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72729 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b20400 }
72731 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[$Dst32AnPrefixed] */
72734 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72735 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_An_relative_Prefixed_QI
, { 0x1b22400 }
72737 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[$Dst32AnPrefixed] */
72740 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72741 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b40400 }
72743 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[$Dst32AnPrefixed] */
72746 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72747 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_An_relative_Prefixed_QI
, { 0x1b42400 }
72749 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24}[$Dst32AnPrefixed] */
72752 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72753 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b60400 }
72755 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24}[$Dst32AnPrefixed] */
72758 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72759 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_An_relative_Prefixed_QI
, { 0x1b62400 }
72761 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u8}[sb] */
72764 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
72765 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b28400 }
72767 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u8}[sb] */
72770 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U8
), '[', 's', 'b', ']', 0 } },
72771 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_SB_relative_Prefixed_QI
, { 0x1b2a400 }
72773 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16}[sb] */
72776 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
72777 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b48400 }
72779 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16}[sb] */
72782 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), '[', 's', 'b', ']', 0 } },
72783 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_SB_relative_Prefixed_QI
, { 0x1b4a400 }
72785 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s8}[fb] */
72788 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
72789 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2c400 }
72791 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-s8}[fb] */
72794 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S8
), '[', 'f', 'b', ']', 0 } },
72795 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_8_FB_relative_Prefixed_QI
, { 0x1b2e400 }
72797 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-s16}[fb] */
72800 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
72801 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4c400 }
72803 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-s16}[fb] */
72806 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_S16
), '[', 'f', 'b', ']', 0 } },
72807 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_FB_relative_Prefixed_QI
, { 0x1b4e400 }
72809 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u16} */
72812 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U16
), 0 } },
72813 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6c400 }
72815 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u16} */
72818 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U16
), 0 } },
72819 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_16_absolute_Prefixed_QI
, { 0x1b6e400 }
72821 /* adc.b${X} ${Dsp-24-u24}[$Src32AnPrefixed],${Dsp-48-u24} */
72824 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_48_U24
), 0 } },
72825 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_An_relative_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b68400 }
72827 /* adc.b${X} ${Dsp-24-u24},${Dsp-48-u24} */
72830 { { MNEM
, OP (X
), ' ', OP (DSP_24_U24
), ',', OP (DSP_48_U24
), 0 } },
72831 & ifmt_tst32_b_24_24_Prefixed_48_Prefixed_src32_24_24_absolute_Prefixed_QI_dst32_48_24_absolute_Prefixed_QI
, { 0x1b6a400 }
72833 /* adc.b${X} $Src32RnPrefixedQI,$Dst32RnPrefixedQI */
72836 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72837 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x1c804 }
72839 /* adc.b${X} $Src32AnPrefixedQI,$Dst32RnPrefixedQI */
72842 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
72843 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18824 }
72845 /* adc.b${X} [$Src32AnPrefixed],$Dst32RnPrefixedQI */
72848 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32RNPREFIXEDQI
), 0 } },
72849 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_Rn_direct_Prefixed_QI
, { 0x18804 }
72851 /* adc.b${X} $Src32RnPrefixedQI,$Dst32AnPrefixedQI */
72854 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72855 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x1c084 }
72857 /* adc.b${X} $Src32AnPrefixedQI,$Dst32AnPrefixedQI */
72860 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
72861 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x180a4 }
72863 /* adc.b${X} [$Src32AnPrefixed],$Dst32AnPrefixedQI */
72866 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DST32ANPREFIXEDQI
), 0 } },
72867 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_direct_Prefixed_QI
, { 0x18084 }
72869 /* adc.b${X} $Src32RnPrefixedQI,[$Dst32AnPrefixed] */
72872 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72873 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x1c004 }
72875 /* adc.b${X} $Src32AnPrefixedQI,[$Dst32AnPrefixed] */
72878 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72879 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18024 }
72881 /* adc.b${X} [$Src32AnPrefixed],[$Dst32AnPrefixed] */
72884 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
72885 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_An_indirect_Prefixed_QI
, { 0x18004 }
72887 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72890 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72891 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1c20400 }
72893 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[$Dst32AnPrefixed] */
72896 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72897 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822400 }
72899 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[$Dst32AnPrefixed] */
72902 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72903 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_An_relative_Prefixed_QI
, { 0x1820400 }
72905 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72908 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72909 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1c40400 }
72911 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[$Dst32AnPrefixed] */
72914 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72915 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842400 }
72917 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[$Dst32AnPrefixed] */
72920 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72921 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_An_relative_Prefixed_QI
, { 0x1840400 }
72923 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72926 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72927 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1c60400 }
72929 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24}[$Dst32AnPrefixed] */
72932 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72933 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862400 }
72935 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24}[$Dst32AnPrefixed] */
72938 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
72939 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_An_relative_Prefixed_QI
, { 0x1860400 }
72941 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u8}[sb] */
72944 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72945 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1c28400 }
72947 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u8}[sb] */
72950 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72951 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182a400 }
72953 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u8}[sb] */
72956 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
72957 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_SB_relative_Prefixed_QI
, { 0x1828400 }
72959 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16}[sb] */
72962 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72963 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1c48400 }
72965 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16}[sb] */
72968 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72969 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184a400 }
72971 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16}[sb] */
72974 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
72975 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_SB_relative_Prefixed_QI
, { 0x1848400 }
72977 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s8}[fb] */
72980 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72981 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x1c2c400 }
72983 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s8}[fb] */
72986 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72987 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182e400 }
72989 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s8}[fb] */
72992 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
72993 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182c400 }
72995 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-s16}[fb] */
72998 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
72999 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x1c4c400 }
73001 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-s16}[fb] */
73004 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
73005 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184e400 }
73007 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-s16}[fb] */
73010 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
73011 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184c400 }
73013 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u16} */
73016 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
73017 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x1c6c400 }
73019 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u16} */
73022 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U16
), 0 } },
73023 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186e400 }
73025 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u16} */
73028 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
73029 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_16_absolute_Prefixed_QI
, { 0x186c400 }
73031 /* adc.b${X} $Src32RnPrefixedQI,${Dsp-24-u24} */
73034 { { MNEM
, OP (X
), ' ', OP (SRC32RNPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
73035 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_Rn_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1c68400 }
73037 /* adc.b${X} $Src32AnPrefixedQI,${Dsp-24-u24} */
73040 { { MNEM
, OP (X
), ' ', OP (SRC32ANPREFIXEDQI
), ',', OP (DSP_24_U24
), 0 } },
73041 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_direct_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x186a400 }
73043 /* adc.b${X} [$Src32AnPrefixed],${Dsp-24-u24} */
73046 { { MNEM
, OP (X
), ' ', '[', OP (SRC32ANPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
73047 & ifmt_tst32_b_basic_Prefixed_24_Prefixed_src32_An_indirect_Prefixed_QI_dst32_24_24_absolute_Prefixed_QI
, { 0x1868400 }
73049 /* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
73052 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73053 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xb18000 }
73055 /* adc.w${X} ${Dsp-16-u8}[sb],$Dst16RnHI */
73058 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73059 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb1a000 }
73061 /* adc.w${X} ${Dsp-16-s8}[fb],$Dst16RnHI */
73064 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73065 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xb1b000 }
73067 /* adc.w${X} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
73070 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73071 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xb18400 }
73073 /* adc.w${X} ${Dsp-16-u8}[sb],$Dst16AnHI */
73076 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73077 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xb1a400 }
73079 /* adc.w${X} ${Dsp-16-s8}[fb],$Dst16AnHI */
73082 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73083 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xb1b400 }
73085 /* adc.w${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
73088 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73089 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xb18600 }
73091 /* adc.w${X} ${Dsp-16-u8}[sb],[$Dst16An] */
73094 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73095 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xb1a600 }
73097 /* adc.w${X} ${Dsp-16-s8}[fb],[$Dst16An] */
73100 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73101 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xb1b600 }
73103 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
73106 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73107 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1880000 }
73109 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
73112 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73113 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1a80000 }
73115 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
73118 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73119 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xb1b80000 }
73121 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
73124 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73125 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xb18c0000 }
73127 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
73130 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73131 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb1ac0000 }
73133 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
73136 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73137 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xb1bc0000 }
73139 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
73142 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73143 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb18a0000 }
73145 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
73148 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73149 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb1aa0000 }
73151 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
73154 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73155 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xb1ba0000 }
73157 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
73160 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73161 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb18e0000 }
73163 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
73166 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73167 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb1ae0000 }
73169 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
73172 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73173 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xb1be0000 }
73175 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
73178 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73179 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb18b0000 }
73181 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
73184 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73185 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb1ab0000 }
73187 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
73190 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73191 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xb1bb0000 }
73193 /* adc.w${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
73196 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
73197 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xb18f0000 }
73199 /* adc.w${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
73202 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73203 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xb1af0000 }
73205 /* adc.w${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
73208 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73209 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xb1bf0000 }
73211 /* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
73214 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73215 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xb1c00000 }
73217 /* adc.w${X} ${Dsp-16-u16}[sb],$Dst16RnHI */
73220 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
73221 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xb1e00000 }
73223 /* adc.w${X} ${Dsp-16-u16},$Dst16RnHI */
73226 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
73227 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xb1f00000 }
73229 /* adc.w${X} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
73232 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73233 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xb1c40000 }
73235 /* adc.w${X} ${Dsp-16-u16}[sb],$Dst16AnHI */
73238 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
73239 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xb1e40000 }
73241 /* adc.w${X} ${Dsp-16-u16},$Dst16AnHI */
73244 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
73245 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xb1f40000 }
73247 /* adc.w${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
73250 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73251 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xb1c60000 }
73253 /* adc.w${X} ${Dsp-16-u16}[sb],[$Dst16An] */
73256 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73257 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xb1e60000 }
73259 /* adc.w${X} ${Dsp-16-u16},[$Dst16An] */
73262 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
73263 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xb1f60000 }
73265 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
73268 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73269 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xb1c80000 }
73271 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
73274 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73275 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xb1e80000 }
73277 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
73280 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73281 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xb1f80000 }
73283 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
73286 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73287 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xb1cc0000 }
73289 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
73292 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73293 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xb1ec0000 }
73295 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
73298 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73299 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xb1fc0000 }
73301 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
73304 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73305 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb1ca0000 }
73307 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
73310 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73311 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xb1ea0000 }
73313 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
73316 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73317 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xb1fa0000 }
73319 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
73322 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73323 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb1ce0000 }
73325 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
73328 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73329 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xb1ee0000 }
73331 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
73334 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73335 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xb1fe0000 }
73337 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
73340 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73341 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb1cb0000 }
73343 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
73346 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73347 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xb1eb0000 }
73349 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
73352 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73353 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xb1fb0000 }
73355 /* adc.w${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
73358 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
73359 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xb1cf0000 }
73361 /* adc.w${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
73364 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
73365 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xb1ef0000 }
73367 /* adc.w${X} ${Dsp-16-u16},${Dsp-32-u16} */
73370 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
73371 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xb1ff0000 }
73373 /* adc.w${X} $Src16RnHI,$Dst16RnHI */
73376 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
73377 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xb100 }
73379 /* adc.w${X} $Src16AnHI,$Dst16RnHI */
73382 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
73383 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xb140 }
73385 /* adc.w${X} [$Src16An],$Dst16RnHI */
73388 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
73389 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xb160 }
73391 /* adc.w${X} $Src16RnHI,$Dst16AnHI */
73394 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
73395 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xb104 }
73397 /* adc.w${X} $Src16AnHI,$Dst16AnHI */
73400 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
73401 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xb144 }
73403 /* adc.w${X} [$Src16An],$Dst16AnHI */
73406 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
73407 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xb164 }
73409 /* adc.w${X} $Src16RnHI,[$Dst16An] */
73412 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
73413 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xb106 }
73415 /* adc.w${X} $Src16AnHI,[$Dst16An] */
73418 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
73419 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xb146 }
73421 /* adc.w${X} [$Src16An],[$Dst16An] */
73424 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73425 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xb166 }
73427 /* adc.w${X} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
73430 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73431 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xb10800 }
73433 /* adc.w${X} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
73436 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73437 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xb14800 }
73439 /* adc.w${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
73442 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73443 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xb16800 }
73445 /* adc.w${X} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
73448 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73449 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xb10c0000 }
73451 /* adc.w${X} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
73454 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73455 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xb14c0000 }
73457 /* adc.w${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
73460 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73461 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xb16c0000 }
73463 /* adc.w${X} $Src16RnHI,${Dsp-16-u8}[sb] */
73466 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73467 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb10a00 }
73469 /* adc.w${X} $Src16AnHI,${Dsp-16-u8}[sb] */
73472 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73473 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xb14a00 }
73475 /* adc.w${X} [$Src16An],${Dsp-16-u8}[sb] */
73478 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73479 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xb16a00 }
73481 /* adc.w${X} $Src16RnHI,${Dsp-16-u16}[sb] */
73484 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73485 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb10e0000 }
73487 /* adc.w${X} $Src16AnHI,${Dsp-16-u16}[sb] */
73490 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73491 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xb14e0000 }
73493 /* adc.w${X} [$Src16An],${Dsp-16-u16}[sb] */
73496 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73497 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xb16e0000 }
73499 /* adc.w${X} $Src16RnHI,${Dsp-16-s8}[fb] */
73502 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73503 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb10b00 }
73505 /* adc.w${X} $Src16AnHI,${Dsp-16-s8}[fb] */
73508 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73509 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xb14b00 }
73511 /* adc.w${X} [$Src16An],${Dsp-16-s8}[fb] */
73514 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73515 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xb16b00 }
73517 /* adc.w${X} $Src16RnHI,${Dsp-16-u16} */
73520 { { MNEM
, OP (X
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
73521 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xb10f0000 }
73523 /* adc.w${X} $Src16AnHI,${Dsp-16-u16} */
73526 { { MNEM
, OP (X
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
73527 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xb14f0000 }
73529 /* adc.w${X} [$Src16An],${Dsp-16-u16} */
73532 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
73533 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xb16f0000 }
73535 /* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
73538 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73539 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xb08000 }
73541 /* adc.b${X} ${Dsp-16-u8}[sb],$Dst16RnQI */
73544 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73545 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb0a000 }
73547 /* adc.b${X} ${Dsp-16-s8}[fb],$Dst16RnQI */
73550 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73551 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xb0b000 }
73553 /* adc.b${X} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
73556 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73557 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xb08400 }
73559 /* adc.b${X} ${Dsp-16-u8}[sb],$Dst16AnQI */
73562 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73563 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xb0a400 }
73565 /* adc.b${X} ${Dsp-16-s8}[fb],$Dst16AnQI */
73568 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73569 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xb0b400 }
73571 /* adc.b${X} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
73574 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73575 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xb08600 }
73577 /* adc.b${X} ${Dsp-16-u8}[sb],[$Dst16An] */
73580 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73581 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xb0a600 }
73583 /* adc.b${X} ${Dsp-16-s8}[fb],[$Dst16An] */
73586 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73587 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xb0b600 }
73589 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
73592 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73593 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0880000 }
73595 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
73598 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73599 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0a80000 }
73601 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
73604 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
73605 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xb0b80000 }
73607 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
73610 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73611 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xb08c0000 }
73613 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
73616 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73617 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb0ac0000 }
73619 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
73622 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
73623 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xb0bc0000 }
73625 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
73628 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73629 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb08a0000 }
73631 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
73634 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73635 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb0aa0000 }
73637 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
73640 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
73641 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xb0ba0000 }
73643 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
73646 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73647 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb08e0000 }
73649 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
73652 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73653 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb0ae0000 }
73655 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
73658 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
73659 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xb0be0000 }
73661 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
73664 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73665 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb08b0000 }
73667 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
73670 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73671 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb0ab0000 }
73673 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
73676 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
73677 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xb0bb0000 }
73679 /* adc.b${X} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
73682 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
73683 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xb08f0000 }
73685 /* adc.b${X} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
73688 { { MNEM
, OP (X
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73689 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xb0af0000 }
73691 /* adc.b${X} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
73694 { { MNEM
, OP (X
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
73695 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xb0bf0000 }
73697 /* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
73700 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73701 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xb0c00000 }
73703 /* adc.b${X} ${Dsp-16-u16}[sb],$Dst16RnQI */
73706 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
73707 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xb0e00000 }
73709 /* adc.b${X} ${Dsp-16-u16},$Dst16RnQI */
73712 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
73713 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xb0f00000 }
73715 /* adc.b${X} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
73718 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73719 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xb0c40000 }
73721 /* adc.b${X} ${Dsp-16-u16}[sb],$Dst16AnQI */
73724 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
73725 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xb0e40000 }
73727 /* adc.b${X} ${Dsp-16-u16},$Dst16AnQI */
73730 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
73731 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xb0f40000 }
73733 /* adc.b${X} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
73736 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73737 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xb0c60000 }
73739 /* adc.b${X} ${Dsp-16-u16}[sb],[$Dst16An] */
73742 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
73743 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xb0e60000 }
73745 /* adc.b${X} ${Dsp-16-u16},[$Dst16An] */
73748 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
73749 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xb0f60000 }
73751 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
73754 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73755 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xb0c80000 }
73757 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
73760 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73761 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xb0e80000 }
73763 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
73766 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
73767 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xb0f80000 }
73769 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
73772 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73773 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xb0cc0000 }
73775 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
73778 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73779 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xb0ec0000 }
73781 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
73784 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
73785 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xb0fc0000 }
73787 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
73790 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73791 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb0ca0000 }
73793 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
73796 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73797 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xb0ea0000 }
73799 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
73802 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
73803 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xb0fa0000 }
73805 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
73808 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73809 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb0ce0000 }
73811 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
73814 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73815 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xb0ee0000 }
73817 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
73820 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
73821 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xb0fe0000 }
73823 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
73826 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73827 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb0cb0000 }
73829 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
73832 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73833 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xb0eb0000 }
73835 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
73838 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
73839 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xb0fb0000 }
73841 /* adc.b${X} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
73844 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
73845 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xb0cf0000 }
73847 /* adc.b${X} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
73850 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
73851 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xb0ef0000 }
73853 /* adc.b${X} ${Dsp-16-u16},${Dsp-32-u16} */
73856 { { MNEM
, OP (X
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
73857 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xb0ff0000 }
73859 /* adc.b${X} $Src16RnQI,$Dst16RnQI */
73862 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
73863 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xb000 }
73865 /* adc.b${X} $Src16AnQI,$Dst16RnQI */
73868 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
73869 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xb040 }
73871 /* adc.b${X} [$Src16An],$Dst16RnQI */
73874 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
73875 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xb060 }
73877 /* adc.b${X} $Src16RnQI,$Dst16AnQI */
73880 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
73881 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xb004 }
73883 /* adc.b${X} $Src16AnQI,$Dst16AnQI */
73886 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
73887 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xb044 }
73889 /* adc.b${X} [$Src16An],$Dst16AnQI */
73892 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
73893 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xb064 }
73895 /* adc.b${X} $Src16RnQI,[$Dst16An] */
73898 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
73899 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xb006 }
73901 /* adc.b${X} $Src16AnQI,[$Dst16An] */
73904 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
73905 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xb046 }
73907 /* adc.b${X} [$Src16An],[$Dst16An] */
73910 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
73911 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xb066 }
73913 /* adc.b${X} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
73916 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73917 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xb00800 }
73919 /* adc.b${X} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
73922 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73923 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xb04800 }
73925 /* adc.b${X} [$Src16An],${Dsp-16-u8}[$Dst16An] */
73928 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
73929 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xb06800 }
73931 /* adc.b${X} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
73934 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73935 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xb00c0000 }
73937 /* adc.b${X} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
73940 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73941 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xb04c0000 }
73943 /* adc.b${X} [$Src16An],${Dsp-16-u16}[$Dst16An] */
73946 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
73947 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xb06c0000 }
73949 /* adc.b${X} $Src16RnQI,${Dsp-16-u8}[sb] */
73952 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73953 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb00a00 }
73955 /* adc.b${X} $Src16AnQI,${Dsp-16-u8}[sb] */
73958 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73959 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xb04a00 }
73961 /* adc.b${X} [$Src16An],${Dsp-16-u8}[sb] */
73964 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
73965 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xb06a00 }
73967 /* adc.b${X} $Src16RnQI,${Dsp-16-u16}[sb] */
73970 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73971 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb00e0000 }
73973 /* adc.b${X} $Src16AnQI,${Dsp-16-u16}[sb] */
73976 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73977 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xb04e0000 }
73979 /* adc.b${X} [$Src16An],${Dsp-16-u16}[sb] */
73982 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
73983 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xb06e0000 }
73985 /* adc.b${X} $Src16RnQI,${Dsp-16-s8}[fb] */
73988 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73989 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb00b00 }
73991 /* adc.b${X} $Src16AnQI,${Dsp-16-s8}[fb] */
73994 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
73995 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xb04b00 }
73997 /* adc.b${X} [$Src16An],${Dsp-16-s8}[fb] */
74000 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74001 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xb06b00 }
74003 /* adc.b${X} $Src16RnQI,${Dsp-16-u16} */
74006 { { MNEM
, OP (X
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
74007 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xb00f0000 }
74009 /* adc.b${X} $Src16AnQI,${Dsp-16-u16} */
74012 { { MNEM
, OP (X
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
74013 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xb04f0000 }
74015 /* adc.b${X} [$Src16An],${Dsp-16-u16} */
74018 { { MNEM
, OP (X
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
74019 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xb06f0000 }
74021 /* adc.w${X} #${Imm-24-HI},$Dst32RnPrefixedHI */
74024 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32RNPREFIXEDHI
), 0 } },
74025 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_HI
, { 0x1892e00 }
74027 /* adc.w${X} #${Imm-24-HI},$Dst32AnPrefixedHI */
74030 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DST32ANPREFIXEDHI
), 0 } },
74031 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_HI
, { 0x181ae00 }
74033 /* adc.w${X} #${Imm-24-HI},[$Dst32AnPrefixed] */
74036 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
74037 & ifmt_sbb32_w_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_HI
, { 0x1812e00 }
74039 /* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[$Dst32AnPrefixed] */
74042 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74043 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_HI
, { 0x1832e00 }
74045 /* adc.w${X} #${Imm-32-HI},${Dsp-24-u8}[sb] */
74048 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74049 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_HI
, { 0x183ae00 }
74051 /* adc.w${X} #${Imm-32-HI},${Dsp-24-s8}[fb] */
74054 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74055 & ifmt_sbb32_w_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_HI
, { 0x183ee00 }
74057 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[$Dst32AnPrefixed] */
74060 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74061 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_HI
, { 0x1852e00 }
74063 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16}[sb] */
74066 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74067 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_HI
, { 0x185ae00 }
74069 /* adc.w${X} #${Imm-40-HI},${Dsp-24-s16}[fb] */
74072 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74073 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_HI
, { 0x185ee00 }
74075 /* adc.w${X} #${Imm-40-HI},${Dsp-24-u16} */
74078 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_24_U16
), 0 } },
74079 & ifmt_sbb32_w_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_HI
, { 0x187ee00 }
74081 /* adc.w${X} #${Imm-48-HI},${Dsp-24-u24}[$Dst32AnPrefixed] */
74084 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74085 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_HI
, { 0x1872e00 }
74087 /* adc.w${X} #${Imm-48-HI},${Dsp-24-u24} */
74090 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_HI
), ',', OP (DSP_24_U24
), 0 } },
74091 & ifmt_sbb32_w_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_HI
, { 0x187ae00 }
74093 /* adc.b${X} #${Imm-24-QI},$Dst32RnPrefixedQI */
74096 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32RNPREFIXEDQI
), 0 } },
74097 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_Rn_direct_Prefixed_QI
, { 0x1882e00 }
74099 /* adc.b${X} #${Imm-24-QI},$Dst32AnPrefixedQI */
74102 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DST32ANPREFIXEDQI
), 0 } },
74103 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_direct_Prefixed_QI
, { 0x180ae00 }
74105 /* adc.b${X} #${Imm-24-QI},[$Dst32AnPrefixed] */
74108 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', '[', OP (DST32ANPREFIXED
), ']', 0 } },
74109 & ifmt_sbb32_b_imm_G_basic_Prefixed_dst32_An_indirect_Prefixed_QI
, { 0x1802e00 }
74111 /* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[$Dst32AnPrefixed] */
74114 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74115 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_An_relative_Prefixed_QI
, { 0x1822e00 }
74117 /* adc.b${X} #${Imm-32-QI},${Dsp-24-u8}[sb] */
74120 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74121 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_SB_relative_Prefixed_QI
, { 0x182ae00 }
74123 /* adc.b${X} #${Imm-32-QI},${Dsp-24-s8}[fb] */
74126 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74127 & ifmt_sbb32_b_imm_G_24_8_Prefixed_dst32_24_8_FB_relative_Prefixed_QI
, { 0x182ee00 }
74129 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[$Dst32AnPrefixed] */
74132 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74133 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_An_relative_Prefixed_QI
, { 0x1842e00 }
74135 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16}[sb] */
74138 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74139 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_SB_relative_Prefixed_QI
, { 0x184ae00 }
74141 /* adc.b${X} #${Imm-40-QI},${Dsp-24-s16}[fb] */
74144 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74145 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_FB_relative_Prefixed_QI
, { 0x184ee00 }
74147 /* adc.b${X} #${Imm-40-QI},${Dsp-24-u16} */
74150 { { MNEM
, OP (X
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_24_U16
), 0 } },
74151 & ifmt_sbb32_b_imm_G_24_16_Prefixed_dst32_24_16_absolute_Prefixed_QI
, { 0x186ee00 }
74153 /* adc.b${X} #${Imm-48-QI},${Dsp-24-u24}[$Dst32AnPrefixed] */
74156 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), '[', OP (DST32ANPREFIXED
), ']', 0 } },
74157 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_An_relative_Prefixed_QI
, { 0x1862e00 }
74159 /* adc.b${X} #${Imm-48-QI},${Dsp-24-u24} */
74162 { { MNEM
, OP (X
), ' ', '#', OP (IMM_48_QI
), ',', OP (DSP_24_U24
), 0 } },
74163 & ifmt_sbb32_b_imm_G_24_24_Prefixed_dst32_24_24_absolute_Prefixed_QI
, { 0x186ae00 }
74165 /* adc.w${X} #${Imm-16-HI},$Dst16RnHI */
74168 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
74169 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77600000 }
74171 /* adc.w${X} #${Imm-16-HI},$Dst16AnHI */
74174 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
74175 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77640000 }
74177 /* adc.w${X} #${Imm-16-HI},[$Dst16An] */
74180 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
74181 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77660000 }
74183 /* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
74186 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
74187 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77680000 }
74189 /* adc.w${X} #${Imm-24-HI},${Dsp-16-u8}[sb] */
74192 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
74193 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x776a0000 }
74195 /* adc.w${X} #${Imm-24-HI},${Dsp-16-s8}[fb] */
74198 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74199 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x776b0000 }
74201 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
74204 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
74205 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x776c0000 }
74207 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16}[sb] */
74210 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
74211 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x776e0000 }
74213 /* adc.w${X} #${Imm-32-HI},${Dsp-16-u16} */
74216 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
74217 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x776f0000 }
74219 /* adc.b${X} #${Imm-16-QI},$Dst16RnQI */
74222 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
74223 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x766000 }
74225 /* adc.b${X} #${Imm-16-QI},$Dst16AnQI */
74228 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
74229 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x766400 }
74231 /* adc.b${X} #${Imm-16-QI},[$Dst16An] */
74234 { { MNEM
, OP (X
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
74235 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x766600 }
74237 /* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
74240 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
74241 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76680000 }
74243 /* adc.b${X} #${Imm-24-QI},${Dsp-16-u8}[sb] */
74246 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
74247 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x766a0000 }
74249 /* adc.b${X} #${Imm-24-QI},${Dsp-16-s8}[fb] */
74252 { { MNEM
, OP (X
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
74253 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x766b0000 }
74255 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
74258 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
74259 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x766c0000 }
74261 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16}[sb] */
74264 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
74265 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x766e0000 }
74267 /* adc.b${X} #${Imm-32-QI},${Dsp-16-u16} */
74270 { { MNEM
, OP (X
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
74271 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x766f0000 }
74273 /* add.w${S} #${Imm-16-HI},${Dsp-8-u8}[sb] */
74276 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
74277 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_SB_relative_HI
, { 0x27000000 }
74279 /* add.w${S} #${Imm-16-HI},${Dsp-8-s8}[fb] */
74282 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_HI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
74283 & ifmt_tst32_w_imm_S_2_S_8_dst32_2_S_8_FB_relative_HI
, { 0x37000000 }
74285 /* add.w${S} #${Imm-24-HI},${Dsp-8-u16} */
74288 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_8_U16
), 0 } },
74289 & ifmt_tst32_w_imm_S_2_S_16_dst32_2_S_16_absolute_HI
, { 0x17000000 }
74291 /* add.w${S} #${Imm-8-HI},r0 */
74294 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'r', '0', 0 } },
74295 & ifmt_tst32_w_imm_S_2_S_basic_dst32_2_S_R0_direct_HI
, { 0x70000 }
74297 /* add.b${S} #${Imm-16-QI},${Dsp-8-u8}[sb] */
74300 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_U8
), '[', 's', 'b', ']', 0 } },
74301 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_SB_relative_QI
, { 0x260000 }
74303 /* add.b${S} #${Imm-16-QI},${Dsp-8-s8}[fb] */
74306 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', OP (DSP_8_S8
), '[', 'f', 'b', ']', 0 } },
74307 & ifmt_tst32_b_imm_S_2_S_8_dst32_2_S_8_FB_relative_QI
, { 0x360000 }
74309 /* add.b${S} #${Imm-24-QI},${Dsp-8-u16} */
74312 { { MNEM
, OP (S
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_8_U16
), 0 } },
74313 & ifmt_tst32_b_imm_S_2_S_16_dst32_2_S_16_absolute_QI
, { 0x16000000 }
74315 /* add.b${S} #${Imm-8-QI},r0l */
74318 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
74319 & ifmt_tst32_b_imm_S_2_S_basic_dst32_2_S_R0l_direct_QI
, { 0x600 }
74321 /* add.l${S} #${Imm1-S},a0 */
74324 { { MNEM
, OP (S
), ' ', '#', OP (IMM1_S
), ',', 'a', '0', 0 } },
74325 & ifmt_add32_l_s_imm1_S_an_dst32_1_S_A0_direct_HI
, { 0x8c }
74327 /* add.l${S} #${Imm1-S},a1 */
74330 { { MNEM
, OP (S
), ' ', '#', OP (IMM1_S
), ',', 'a', '1', 0 } },
74331 & ifmt_add32_l_s_imm1_S_an_dst32_1_S_A1_direct_HI
, { 0x8d }
74333 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74336 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74337 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x990200 }
74339 /* add.l${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedSI */
74342 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74343 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x992200 }
74345 /* add.l${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedSI */
74348 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74349 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x993200 }
74351 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74354 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74355 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x918200 }
74357 /* add.l${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedSI */
74360 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74361 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91a200 }
74363 /* add.l${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedSI */
74366 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74367 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x91b200 }
74369 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74372 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74373 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x910200 }
74375 /* add.l${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
74378 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74379 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x912200 }
74381 /* add.l${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
74384 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74385 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x913200 }
74387 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74390 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74391 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93020000 }
74393 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74396 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74397 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93220000 }
74399 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
74402 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74403 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_An_relative_Unprefixed_SI
, { 0x93320000 }
74405 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74408 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74409 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95020000 }
74411 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74414 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74415 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95220000 }
74417 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
74420 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74421 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_An_relative_Unprefixed_SI
, { 0x95320000 }
74423 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74426 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74427 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97020000 }
74429 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74432 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74433 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97220000 }
74435 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
74438 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74439 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_An_relative_Unprefixed_SI
, { 0x97320000 }
74441 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
74444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74445 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93820000 }
74447 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
74450 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74451 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93a20000 }
74453 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
74456 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
74457 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_SB_relative_Unprefixed_SI
, { 0x93b20000 }
74459 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
74462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74463 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95820000 }
74465 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
74468 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74469 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95a20000 }
74471 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
74474 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
74475 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_SB_relative_Unprefixed_SI
, { 0x95b20000 }
74477 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
74480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74481 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93c20000 }
74483 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
74486 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74487 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93e20000 }
74489 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
74492 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
74493 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_8_FB_relative_Unprefixed_SI
, { 0x93f20000 }
74495 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
74498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74499 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95c20000 }
74501 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
74504 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74505 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95e20000 }
74507 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
74510 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
74511 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_FB_relative_Unprefixed_SI
, { 0x95f20000 }
74513 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
74516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
74517 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97c20000 }
74519 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
74522 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
74523 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97e20000 }
74525 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
74528 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
74529 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_16_absolute_Unprefixed_SI
, { 0x97f20000 }
74531 /* add.l${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
74534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
74535 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97820000 }
74537 /* add.l${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
74540 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
74541 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97a20000 }
74543 /* add.l${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
74546 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
74547 & ifmt_mov32_l_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_SI_dst32_24_24_absolute_Unprefixed_SI
, { 0x97b20000 }
74549 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74553 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9020000 }
74555 /* add.l${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedSI */
74558 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74559 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9220000 }
74561 /* add.l${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedSI */
74564 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74565 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xa9320000 }
74567 /* add.l${G} ${Dsp-16-u16},$Dst32RnUnprefixedSI */
74570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74571 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9320000 }
74573 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74576 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74577 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1820000 }
74579 /* add.l${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedSI */
74582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74583 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1a20000 }
74585 /* add.l${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedSI */
74588 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74589 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xa1b20000 }
74591 /* add.l${G} ${Dsp-16-u16},$Dst32AnUnprefixedSI */
74594 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74595 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1b20000 }
74597 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74601 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1020000 }
74603 /* add.l${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
74606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74607 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1220000 }
74609 /* add.l${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
74612 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74613 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xa1320000 }
74615 /* add.l${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
74618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74619 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1320000 }
74621 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74625 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3020000 }
74627 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74631 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3220000 }
74633 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
74636 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74637 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xa3320000 }
74639 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
74642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74643 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_An_relative_Unprefixed_SI
, { 0xb3320000 }
74645 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74649 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5020000 }
74651 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74655 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5220000 }
74657 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
74660 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74661 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xa5320000 }
74663 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
74666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74667 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_An_relative_Unprefixed_SI
, { 0xb5320000 }
74669 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74673 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7020000 }
74675 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74679 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7220000 }
74681 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
74684 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74685 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xa7320000 }
74687 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
74690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74691 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_An_relative_Unprefixed_SI
, { 0xb7320000 }
74693 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
74696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74697 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3820000 }
74699 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
74702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74703 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3a20000 }
74705 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
74708 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74709 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xa3b20000 }
74711 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
74714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
74715 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_SB_relative_Unprefixed_SI
, { 0xb3b20000 }
74717 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
74720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74721 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5820000 }
74723 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
74726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74727 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5a20000 }
74729 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
74732 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74733 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xa5b20000 }
74735 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
74738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
74739 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_SB_relative_Unprefixed_SI
, { 0xb5b20000 }
74741 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
74744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74745 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3c20000 }
74747 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
74750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74751 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3e20000 }
74753 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
74756 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74757 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xa3f20000 }
74759 /* add.l${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
74762 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
74763 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_8_FB_relative_Unprefixed_SI
, { 0xb3f20000 }
74765 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
74768 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74769 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5c20000 }
74771 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
74774 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74775 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5e20000 }
74777 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
74780 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74781 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xa5f20000 }
74783 /* add.l${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
74786 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
74787 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_FB_relative_Unprefixed_SI
, { 0xb5f20000 }
74789 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
74792 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
74793 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7c20000 }
74795 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
74798 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
74799 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7e20000 }
74801 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
74804 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
74805 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xa7f20000 }
74807 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u16} */
74810 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
74811 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_16_absolute_Unprefixed_SI
, { 0xb7f20000 }
74813 /* add.l${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
74816 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
74817 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7820000 }
74819 /* add.l${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
74822 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
74823 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7a20000 }
74825 /* add.l${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
74828 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
74829 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xa7b20000 }
74831 /* add.l${G} ${Dsp-16-u16},${Dsp-32-u24} */
74834 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
74835 & ifmt_mov32_l_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_SI_dst32_32_24_absolute_Unprefixed_SI
, { 0xb7b20000 }
74837 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74840 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74841 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9020000 }
74843 /* add.l${G} ${Dsp-16-u24},$Dst32RnUnprefixedSI */
74846 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74847 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xb9220000 }
74849 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
74852 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74853 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1820000 }
74855 /* add.l${G} ${Dsp-16-u24},$Dst32AnUnprefixedSI */
74858 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
74859 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xb1a20000 }
74861 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
74864 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74865 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1020000 }
74867 /* add.l${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
74870 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74871 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xb1220000 }
74873 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
74876 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74877 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3020000 }
74879 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
74882 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74883 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_An_relative_Unprefixed_SI
, { 0xb3220000 }
74885 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
74888 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74889 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5020000 }
74891 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
74894 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74895 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_An_relative_Unprefixed_SI
, { 0xb5220000 }
74897 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
74900 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74901 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7020000 }
74903 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
74906 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
74907 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_An_relative_Unprefixed_SI
, { 0xb7220000 }
74909 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
74912 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
74913 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3820000 }
74915 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
74918 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
74919 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_SB_relative_Unprefixed_SI
, { 0xb3a20000 }
74921 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
74924 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
74925 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5820000 }
74927 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
74930 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
74931 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_SB_relative_Unprefixed_SI
, { 0xb5a20000 }
74933 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
74936 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
74937 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3c20000 }
74939 /* add.l${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
74942 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
74943 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_8_FB_relative_Unprefixed_SI
, { 0xb3e20000 }
74945 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
74948 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
74949 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5c20000 }
74951 /* add.l${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
74954 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
74955 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_FB_relative_Unprefixed_SI
, { 0xb5e20000 }
74957 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
74960 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
74961 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7c20000 }
74963 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u16} */
74966 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
74967 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_16_absolute_Unprefixed_SI
, { 0xb7e20000 }
74969 /* add.l${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
74972 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
74973 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7820000 }
74975 /* add.l${G} ${Dsp-16-u24},${Dsp-40-u24} */
74978 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
74979 & ifmt_mov32_l_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_SI_dst32_40_24_absolute_Unprefixed_SI
, { 0xb7a20000 }
74981 /* add.l${G} $Src32RnUnprefixedSI,$Dst32RnUnprefixedSI */
74984 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74985 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0xc902 }
74987 /* add.l${G} $Src32AnUnprefixedSI,$Dst32RnUnprefixedSI */
74990 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74991 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8922 }
74993 /* add.l${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedSI */
74996 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
74997 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_Rn_direct_Unprefixed_SI
, { 0x8902 }
74999 /* add.l${G} $Src32RnUnprefixedSI,$Dst32AnUnprefixedSI */
75002 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
75003 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0xc182 }
75005 /* add.l${G} $Src32AnUnprefixedSI,$Dst32AnUnprefixedSI */
75008 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
75009 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x81a2 }
75011 /* add.l${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedSI */
75014 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
75015 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_direct_Unprefixed_SI
, { 0x8182 }
75017 /* add.l${G} $Src32RnUnprefixedSI,[$Dst32AnUnprefixed] */
75020 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75021 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0xc102 }
75023 /* add.l${G} $Src32AnUnprefixedSI,[$Dst32AnUnprefixed] */
75026 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75027 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8122 }
75029 /* add.l${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75032 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75033 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_An_indirect_Unprefixed_SI
, { 0x8102 }
75035 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75038 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75039 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0xc30200 }
75041 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75044 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75045 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x832200 }
75047 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
75050 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75051 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_An_relative_Unprefixed_SI
, { 0x830200 }
75053 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75056 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75057 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0xc5020000 }
75059 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75062 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75063 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85220000 }
75065 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
75068 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75069 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_An_relative_Unprefixed_SI
, { 0x85020000 }
75071 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75074 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75075 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0xc7020000 }
75077 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75080 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75081 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87220000 }
75083 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
75086 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75087 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_An_relative_Unprefixed_SI
, { 0x87020000 }
75089 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u8}[sb] */
75092 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75093 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xc38200 }
75095 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u8}[sb] */
75098 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75099 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x83a200 }
75101 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
75104 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75105 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x838200 }
75107 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16}[sb] */
75110 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75111 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xc5820000 }
75113 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16}[sb] */
75116 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75117 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85a20000 }
75119 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
75122 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75123 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x85820000 }
75125 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s8}[fb] */
75128 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75129 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xc3c200 }
75131 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s8}[fb] */
75134 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75135 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83e200 }
75137 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
75140 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
75141 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x83c200 }
75143 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-s16}[fb] */
75146 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75147 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xc5c20000 }
75149 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-s16}[fb] */
75152 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75153 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85e20000 }
75155 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
75158 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
75159 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x85c20000 }
75161 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u16} */
75164 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
75165 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0xc7c20000 }
75167 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u16} */
75170 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U16
), 0 } },
75171 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87e20000 }
75173 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
75176 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
75177 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_16_absolute_Unprefixed_SI
, { 0x87c20000 }
75179 /* add.l${G} $Src32RnUnprefixedSI,${Dsp-16-u24} */
75182 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
75183 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0xc7820000 }
75185 /* add.l${G} $Src32AnUnprefixedSI,${Dsp-16-u24} */
75188 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDSI
), ',', OP (DSP_16_U24
), 0 } },
75189 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87a20000 }
75191 /* add.l${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
75194 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
75195 & ifmt_mov32_l_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_SI_dst32_16_24_absolute_Unprefixed_SI
, { 0x87820000 }
75197 /* add.b${S} ${SrcDst16-r0l-r0h-S-normal} */
75200 { { MNEM
, OP (S
), ' ', OP (SRCDST16_R0L_R0H_S_NORMAL
), 0 } },
75201 & ifmt_or16_b_S_r0l_r0h_srcdst16_r0l_r0h_S_derived
, { 0x20 }
75203 /* add.b${S} ${Dsp-8-u8}[sb],${Dst16RnQI-S} */
75206 { { MNEM
, OP (S
), ' ', OP (DSP_8_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
75207 & ifmt_or16_b_S_src2_src16_2_S_8_SB_relative_QI
, { 0x2100 }
75209 /* add.b${S} ${Dsp-8-s8}[fb],${Dst16RnQI-S} */
75212 { { MNEM
, OP (S
), ' ', OP (DSP_8_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI_S
), 0 } },
75213 & ifmt_or16_b_S_src2_src16_2_S_8_FB_relative_QI
, { 0x2200 }
75215 /* add.b${S} ${Dsp-8-u16},${Dst16RnQI-S} */
75218 { { MNEM
, OP (S
), ' ', OP (DSP_8_U16
), ',', OP (DST16RNQI_S
), 0 } },
75219 & ifmt_or16_b_S_src2_src16_2_S_16_absolute_QI
, { 0x230000 }
75221 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75224 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75225 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x990800 }
75227 /* add.w${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedHI */
75230 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75231 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x992800 }
75233 /* add.w${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedHI */
75236 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75237 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x993800 }
75239 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75242 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75243 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x918800 }
75245 /* add.w${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedHI */
75248 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75249 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91a800 }
75251 /* add.w${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedHI */
75254 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75255 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x91b800 }
75257 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75260 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75261 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x910800 }
75263 /* add.w${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
75266 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75267 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x912800 }
75269 /* add.w${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
75272 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75273 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x913800 }
75275 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75278 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75279 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93080000 }
75281 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75284 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75285 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93280000 }
75287 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
75290 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75291 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_An_relative_Unprefixed_HI
, { 0x93380000 }
75293 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75296 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75297 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95080000 }
75299 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75302 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75303 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95280000 }
75305 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
75308 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75309 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_An_relative_Unprefixed_HI
, { 0x95380000 }
75311 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75314 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75315 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97080000 }
75317 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75320 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75321 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97280000 }
75323 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
75326 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75327 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_An_relative_Unprefixed_HI
, { 0x97380000 }
75329 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
75332 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75333 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93880000 }
75335 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
75338 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75339 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93a80000 }
75341 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
75344 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
75345 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_SB_relative_Unprefixed_HI
, { 0x93b80000 }
75347 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
75350 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75351 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95880000 }
75353 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
75356 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75357 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95a80000 }
75359 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
75362 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
75363 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_SB_relative_Unprefixed_HI
, { 0x95b80000 }
75365 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
75368 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75369 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93c80000 }
75371 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
75374 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75375 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93e80000 }
75377 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
75380 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
75381 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_8_FB_relative_Unprefixed_HI
, { 0x93f80000 }
75383 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
75386 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75387 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95c80000 }
75389 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
75392 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75393 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95e80000 }
75395 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
75398 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
75399 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_FB_relative_Unprefixed_HI
, { 0x95f80000 }
75401 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
75404 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
75405 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97c80000 }
75407 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
75410 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
75411 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97e80000 }
75413 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
75416 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
75417 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_16_absolute_Unprefixed_HI
, { 0x97f80000 }
75419 /* add.w${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
75422 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
75423 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97880000 }
75425 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
75428 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
75429 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97a80000 }
75431 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
75434 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
75435 & ifmt_xor32_w_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_HI_dst32_24_24_absolute_Unprefixed_HI
, { 0x97b80000 }
75437 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75440 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75441 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9080000 }
75443 /* add.w${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedHI */
75446 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75447 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9280000 }
75449 /* add.w${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedHI */
75452 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75453 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xa9380000 }
75455 /* add.w${G} ${Dsp-16-u16},$Dst32RnUnprefixedHI */
75458 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75459 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9380000 }
75461 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75464 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75465 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1880000 }
75467 /* add.w${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedHI */
75470 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75471 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1a80000 }
75473 /* add.w${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedHI */
75476 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75477 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xa1b80000 }
75479 /* add.w${G} ${Dsp-16-u16},$Dst32AnUnprefixedHI */
75482 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75483 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1b80000 }
75485 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75488 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75489 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1080000 }
75491 /* add.w${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
75494 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75495 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1280000 }
75497 /* add.w${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
75500 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75501 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xa1380000 }
75503 /* add.w${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
75506 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75507 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1380000 }
75509 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75512 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75513 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3080000 }
75515 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75518 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75519 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3280000 }
75521 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
75524 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75525 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xa3380000 }
75527 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
75530 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75531 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_An_relative_Unprefixed_HI
, { 0xb3380000 }
75533 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75536 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75537 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5080000 }
75539 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75542 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75543 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5280000 }
75545 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
75548 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75549 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xa5380000 }
75551 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
75554 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75555 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_An_relative_Unprefixed_HI
, { 0xb5380000 }
75557 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75560 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75561 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7080000 }
75563 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75566 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75567 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7280000 }
75569 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
75572 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75573 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xa7380000 }
75575 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
75578 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75579 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_An_relative_Unprefixed_HI
, { 0xb7380000 }
75581 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
75584 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75585 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3880000 }
75587 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
75590 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75591 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3a80000 }
75593 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
75596 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75597 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xa3b80000 }
75599 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
75602 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
75603 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_SB_relative_Unprefixed_HI
, { 0xb3b80000 }
75605 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
75608 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75609 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5880000 }
75611 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
75614 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75615 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5a80000 }
75617 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
75620 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75621 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xa5b80000 }
75623 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
75626 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
75627 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_SB_relative_Unprefixed_HI
, { 0xb5b80000 }
75629 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
75632 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75633 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3c80000 }
75635 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
75638 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75639 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3e80000 }
75641 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
75644 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75645 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xa3f80000 }
75647 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
75650 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
75651 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_8_FB_relative_Unprefixed_HI
, { 0xb3f80000 }
75653 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
75656 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75657 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5c80000 }
75659 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
75662 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75663 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5e80000 }
75665 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
75668 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75669 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xa5f80000 }
75671 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
75674 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
75675 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_FB_relative_Unprefixed_HI
, { 0xb5f80000 }
75677 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
75680 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
75681 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7c80000 }
75683 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
75686 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
75687 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7e80000 }
75689 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
75692 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
75693 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xa7f80000 }
75695 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
75698 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
75699 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_16_absolute_Unprefixed_HI
, { 0xb7f80000 }
75701 /* add.w${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
75704 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
75705 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7880000 }
75707 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
75710 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
75711 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7a80000 }
75713 /* add.w${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
75716 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
75717 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xa7b80000 }
75719 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u24} */
75722 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
75723 & ifmt_xor32_w_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_HI_dst32_32_24_absolute_Unprefixed_HI
, { 0xb7b80000 }
75725 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75728 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75729 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9080000 }
75731 /* add.w${G} ${Dsp-16-u24},$Dst32RnUnprefixedHI */
75734 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75735 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xb9280000 }
75737 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75740 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75741 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1880000 }
75743 /* add.w${G} ${Dsp-16-u24},$Dst32AnUnprefixedHI */
75746 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75747 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xb1a80000 }
75749 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75752 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75753 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1080000 }
75755 /* add.w${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
75758 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75759 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xb1280000 }
75761 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
75764 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75765 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3080000 }
75767 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
75770 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75771 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_An_relative_Unprefixed_HI
, { 0xb3280000 }
75773 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
75776 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75777 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5080000 }
75779 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
75782 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75783 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_An_relative_Unprefixed_HI
, { 0xb5280000 }
75785 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
75788 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75789 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7080000 }
75791 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
75794 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75795 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_An_relative_Unprefixed_HI
, { 0xb7280000 }
75797 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
75800 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
75801 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3880000 }
75803 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
75806 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
75807 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_SB_relative_Unprefixed_HI
, { 0xb3a80000 }
75809 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
75812 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
75813 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5880000 }
75815 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
75818 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
75819 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_SB_relative_Unprefixed_HI
, { 0xb5a80000 }
75821 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
75824 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
75825 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3c80000 }
75827 /* add.w${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
75830 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
75831 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_8_FB_relative_Unprefixed_HI
, { 0xb3e80000 }
75833 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
75836 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
75837 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5c80000 }
75839 /* add.w${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
75842 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
75843 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_FB_relative_Unprefixed_HI
, { 0xb5e80000 }
75845 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
75848 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
75849 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7c80000 }
75851 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u16} */
75854 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
75855 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_16_absolute_Unprefixed_HI
, { 0xb7e80000 }
75857 /* add.w${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
75860 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
75861 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7880000 }
75863 /* add.w${G} ${Dsp-16-u24},${Dsp-40-u24} */
75866 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
75867 & ifmt_xor32_w_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_HI_dst32_40_24_absolute_Unprefixed_HI
, { 0xb7a80000 }
75869 /* add.w${G} $Src32RnUnprefixedHI,$Dst32RnUnprefixedHI */
75872 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75873 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0xc908 }
75875 /* add.w${G} $Src32AnUnprefixedHI,$Dst32RnUnprefixedHI */
75878 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75879 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8928 }
75881 /* add.w${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedHI */
75884 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
75885 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_Rn_direct_Unprefixed_HI
, { 0x8908 }
75887 /* add.w${G} $Src32RnUnprefixedHI,$Dst32AnUnprefixedHI */
75890 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75891 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0xc188 }
75893 /* add.w${G} $Src32AnUnprefixedHI,$Dst32AnUnprefixedHI */
75896 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75897 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x81a8 }
75899 /* add.w${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedHI */
75902 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
75903 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_direct_Unprefixed_HI
, { 0x8188 }
75905 /* add.w${G} $Src32RnUnprefixedHI,[$Dst32AnUnprefixed] */
75908 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75909 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0xc108 }
75911 /* add.w${G} $Src32AnUnprefixedHI,[$Dst32AnUnprefixed] */
75914 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75915 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8128 }
75917 /* add.w${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
75920 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75921 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_An_indirect_Unprefixed_HI
, { 0x8108 }
75923 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75926 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75927 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0xc30800 }
75929 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
75932 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75933 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832800 }
75935 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
75938 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75939 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_An_relative_Unprefixed_HI
, { 0x830800 }
75941 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75944 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75945 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0xc5080000 }
75947 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
75950 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75951 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85280000 }
75953 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
75956 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75957 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_An_relative_Unprefixed_HI
, { 0x85080000 }
75959 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75962 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75963 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0xc7080000 }
75965 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
75968 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75969 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87280000 }
75971 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
75974 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
75975 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_An_relative_Unprefixed_HI
, { 0x87080000 }
75977 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u8}[sb] */
75980 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75981 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xc38800 }
75983 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u8}[sb] */
75986 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75987 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83a800 }
75989 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
75992 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
75993 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x838800 }
75995 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16}[sb] */
75998 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
75999 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xc5880000 }
76001 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16}[sb] */
76004 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76005 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85a80000 }
76007 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
76010 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76011 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85880000 }
76013 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s8}[fb] */
76016 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76017 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xc3c800 }
76019 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s8}[fb] */
76022 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76023 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83e800 }
76025 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
76028 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76029 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83c800 }
76031 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-s16}[fb] */
76034 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76035 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xc5c80000 }
76037 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-s16}[fb] */
76040 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76041 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85e80000 }
76043 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
76046 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76047 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85c80000 }
76049 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u16} */
76052 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
76053 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0xc7c80000 }
76055 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u16} */
76058 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U16
), 0 } },
76059 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87e80000 }
76061 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
76064 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
76065 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_16_absolute_Unprefixed_HI
, { 0x87c80000 }
76067 /* add.w${G} $Src32RnUnprefixedHI,${Dsp-16-u24} */
76070 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
76071 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0xc7880000 }
76073 /* add.w${G} $Src32AnUnprefixedHI,${Dsp-16-u24} */
76076 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDHI
), ',', OP (DSP_16_U24
), 0 } },
76077 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87a80000 }
76079 /* add.w${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
76082 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
76083 & ifmt_xor32_w_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_HI_dst32_16_24_absolute_Unprefixed_HI
, { 0x87880000 }
76085 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76088 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76089 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x980800 }
76091 /* add.b${G} ${Dsp-16-u8}[sb],$Dst32RnUnprefixedQI */
76094 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76095 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x982800 }
76097 /* add.b${G} ${Dsp-16-s8}[fb],$Dst32RnUnprefixedQI */
76100 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76101 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x983800 }
76103 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76106 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76107 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x908800 }
76109 /* add.b${G} ${Dsp-16-u8}[sb],$Dst32AnUnprefixedQI */
76112 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76113 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90a800 }
76115 /* add.b${G} ${Dsp-16-s8}[fb],$Dst32AnUnprefixedQI */
76118 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76119 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x90b800 }
76121 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76124 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76125 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x900800 }
76127 /* add.b${G} ${Dsp-16-u8}[sb],[$Dst32AnUnprefixed] */
76130 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76131 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x902800 }
76133 /* add.b${G} ${Dsp-16-s8}[fb],[$Dst32AnUnprefixed] */
76136 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76137 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x903800 }
76139 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76142 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76143 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92080000 }
76145 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76148 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76149 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92280000 }
76151 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst32AnUnprefixed] */
76154 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76155 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_An_relative_Unprefixed_QI
, { 0x92380000 }
76157 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76160 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76161 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94080000 }
76163 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76166 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76167 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94280000 }
76169 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst32AnUnprefixed] */
76172 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76173 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_An_relative_Unprefixed_QI
, { 0x94380000 }
76175 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76178 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76179 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96080000 }
76181 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76184 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76185 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96280000 }
76187 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24}[$Dst32AnUnprefixed] */
76190 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76191 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_An_relative_Unprefixed_QI
, { 0x96380000 }
76193 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u8}[sb] */
76196 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76197 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92880000 }
76199 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
76202 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76203 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92a80000 }
76205 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
76208 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
76209 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_SB_relative_Unprefixed_QI
, { 0x92b80000 }
76211 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16}[sb] */
76214 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76215 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94880000 }
76217 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
76220 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76221 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94a80000 }
76223 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
76226 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
76227 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_SB_relative_Unprefixed_QI
, { 0x94b80000 }
76229 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s8}[fb] */
76232 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76233 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92c80000 }
76235 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
76238 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76239 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92e80000 }
76241 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
76244 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
76245 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_8_FB_relative_Unprefixed_QI
, { 0x92f80000 }
76247 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-s16}[fb] */
76250 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76251 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94c80000 }
76253 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s16}[fb] */
76256 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76257 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94e80000 }
76259 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s16}[fb] */
76262 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S16
), '[', 'f', 'b', ']', 0 } },
76263 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_FB_relative_Unprefixed_QI
, { 0x94f80000 }
76265 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u16} */
76268 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U16
), 0 } },
76269 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96c80000 }
76271 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
76274 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
76275 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96e80000 }
76277 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
76280 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
76281 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_16_absolute_Unprefixed_QI
, { 0x96f80000 }
76283 /* add.b${G} ${Dsp-16-u8}[$Src32AnUnprefixed],${Dsp-24-u24} */
76286 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_24_U24
), 0 } },
76287 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_An_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96880000 }
76289 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u24} */
76292 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
76293 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_SB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96a80000 }
76295 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u24} */
76298 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U24
), 0 } },
76299 & ifmt_xor32_b_16_8_Unprefixed_24_Unprefixed_src32_16_8_FB_relative_Unprefixed_QI_dst32_24_24_absolute_Unprefixed_QI
, { 0x96b80000 }
76301 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76304 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76305 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8080000 }
76307 /* add.b${G} ${Dsp-16-u16}[sb],$Dst32RnUnprefixedQI */
76310 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76311 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8280000 }
76313 /* add.b${G} ${Dsp-16-s16}[fb],$Dst32RnUnprefixedQI */
76316 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76317 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xa8380000 }
76319 /* add.b${G} ${Dsp-16-u16},$Dst32RnUnprefixedQI */
76322 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76323 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8380000 }
76325 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76328 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76329 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0880000 }
76331 /* add.b${G} ${Dsp-16-u16}[sb],$Dst32AnUnprefixedQI */
76334 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76335 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0a80000 }
76337 /* add.b${G} ${Dsp-16-s16}[fb],$Dst32AnUnprefixedQI */
76340 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76341 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xa0b80000 }
76343 /* add.b${G} ${Dsp-16-u16},$Dst32AnUnprefixedQI */
76346 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76347 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0b80000 }
76349 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76352 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76353 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0080000 }
76355 /* add.b${G} ${Dsp-16-u16}[sb],[$Dst32AnUnprefixed] */
76358 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76359 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0280000 }
76361 /* add.b${G} ${Dsp-16-s16}[fb],[$Dst32AnUnprefixed] */
76364 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76365 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xa0380000 }
76367 /* add.b${G} ${Dsp-16-u16},[$Dst32AnUnprefixed] */
76370 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76371 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0380000 }
76373 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76376 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76377 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2080000 }
76379 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76382 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76383 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2280000 }
76385 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[$Dst32AnUnprefixed] */
76388 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76389 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xa2380000 }
76391 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst32AnUnprefixed] */
76394 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76395 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_An_relative_Unprefixed_QI
, { 0xb2380000 }
76397 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76400 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76401 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4080000 }
76403 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76406 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76407 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4280000 }
76409 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[$Dst32AnUnprefixed] */
76412 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76413 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xa4380000 }
76415 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst32AnUnprefixed] */
76418 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76419 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_An_relative_Unprefixed_QI
, { 0xb4380000 }
76421 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76424 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76425 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6080000 }
76427 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76430 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76431 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6280000 }
76433 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24}[$Dst32AnUnprefixed] */
76436 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76437 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xa6380000 }
76439 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u24}[$Dst32AnUnprefixed] */
76442 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76443 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_An_relative_Unprefixed_QI
, { 0xb6380000 }
76445 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u8}[sb] */
76448 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76449 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2880000 }
76451 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
76454 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76455 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2a80000 }
76457 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u8}[sb] */
76460 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76461 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xa2b80000 }
76463 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
76466 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
76467 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_SB_relative_Unprefixed_QI
, { 0xb2b80000 }
76469 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16}[sb] */
76472 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76473 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4880000 }
76475 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
76478 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76479 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4a80000 }
76481 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16}[sb] */
76484 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76485 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xa4b80000 }
76487 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
76490 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
76491 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_SB_relative_Unprefixed_QI
, { 0xb4b80000 }
76493 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s8}[fb] */
76496 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76497 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2c80000 }
76499 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
76502 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76503 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2e80000 }
76505 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s8}[fb] */
76508 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76509 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xa2f80000 }
76511 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
76514 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
76515 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_8_FB_relative_Unprefixed_QI
, { 0xb2f80000 }
76517 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-s16}[fb] */
76520 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76521 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4c80000 }
76523 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s16}[fb] */
76526 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76527 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4e80000 }
76529 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-s16}[fb] */
76532 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76533 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xa4f80000 }
76535 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s16}[fb] */
76538 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S16
), '[', 'f', 'b', ']', 0 } },
76539 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_FB_relative_Unprefixed_QI
, { 0xb4f80000 }
76541 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u16} */
76544 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U16
), 0 } },
76545 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6c80000 }
76547 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
76550 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
76551 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6e80000 }
76553 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u16} */
76556 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
76557 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xa6f80000 }
76559 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
76562 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
76563 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_16_absolute_Unprefixed_QI
, { 0xb6f80000 }
76565 /* add.b${G} ${Dsp-16-u16}[$Src32AnUnprefixed],${Dsp-32-u24} */
76568 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_32_U24
), 0 } },
76569 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_An_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6880000 }
76571 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u24} */
76574 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
76575 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_SB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6a80000 }
76577 /* add.b${G} ${Dsp-16-s16}[fb],${Dsp-32-u24} */
76580 { { MNEM
, OP (G
), ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', ',', OP (DSP_32_U24
), 0 } },
76581 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_FB_relative_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xa6b80000 }
76583 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u24} */
76586 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
76587 & ifmt_xor32_b_16_16_Unprefixed_32_Unprefixed_src32_16_16_absolute_Unprefixed_QI_dst32_32_24_absolute_Unprefixed_QI
, { 0xb6b80000 }
76589 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76592 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76593 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8080000 }
76595 /* add.b${G} ${Dsp-16-u24},$Dst32RnUnprefixedQI */
76598 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76599 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xb8280000 }
76601 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76604 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76605 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0880000 }
76607 /* add.b${G} ${Dsp-16-u24},$Dst32AnUnprefixedQI */
76610 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76611 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xb0a80000 }
76613 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76616 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76617 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0080000 }
76619 /* add.b${G} ${Dsp-16-u24},[$Dst32AnUnprefixed] */
76622 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76623 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xb0280000 }
76625 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[$Dst32AnUnprefixed] */
76628 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76629 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2080000 }
76631 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[$Dst32AnUnprefixed] */
76634 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76635 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_An_relative_Unprefixed_QI
, { 0xb2280000 }
76637 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[$Dst32AnUnprefixed] */
76640 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76641 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4080000 }
76643 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[$Dst32AnUnprefixed] */
76646 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76647 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_An_relative_Unprefixed_QI
, { 0xb4280000 }
76649 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24}[$Dst32AnUnprefixed] */
76652 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76653 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6080000 }
76655 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u24}[$Dst32AnUnprefixed] */
76658 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76659 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_An_relative_Unprefixed_QI
, { 0xb6280000 }
76661 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u8}[sb] */
76664 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
76665 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2880000 }
76667 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u8}[sb] */
76670 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U8
), '[', 's', 'b', ']', 0 } },
76671 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_SB_relative_Unprefixed_QI
, { 0xb2a80000 }
76673 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16}[sb] */
76676 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
76677 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4880000 }
76679 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16}[sb] */
76682 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), '[', 's', 'b', ']', 0 } },
76683 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_SB_relative_Unprefixed_QI
, { 0xb4a80000 }
76685 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s8}[fb] */
76688 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
76689 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2c80000 }
76691 /* add.b${G} ${Dsp-16-u24},${Dsp-40-s8}[fb] */
76694 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S8
), '[', 'f', 'b', ']', 0 } },
76695 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_8_FB_relative_Unprefixed_QI
, { 0xb2e80000 }
76697 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-s16}[fb] */
76700 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
76701 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4c80000 }
76703 /* add.b${G} ${Dsp-16-u24},${Dsp-40-s16}[fb] */
76706 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_S16
), '[', 'f', 'b', ']', 0 } },
76707 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_FB_relative_Unprefixed_QI
, { 0xb4e80000 }
76709 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u16} */
76712 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U16
), 0 } },
76713 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6c80000 }
76715 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u16} */
76718 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U16
), 0 } },
76719 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_16_absolute_Unprefixed_QI
, { 0xb6e80000 }
76721 /* add.b${G} ${Dsp-16-u24}[$Src32AnUnprefixed],${Dsp-40-u24} */
76724 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_40_U24
), 0 } },
76725 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_An_relative_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6880000 }
76727 /* add.b${G} ${Dsp-16-u24},${Dsp-40-u24} */
76730 { { MNEM
, OP (G
), ' ', OP (DSP_16_U24
), ',', OP (DSP_40_U24
), 0 } },
76731 & ifmt_xor32_b_16_24_Unprefixed_40_Unprefixed_src32_16_24_absolute_Unprefixed_QI_dst32_40_24_absolute_Unprefixed_QI
, { 0xb6a80000 }
76733 /* add.b${G} $Src32RnUnprefixedQI,$Dst32RnUnprefixedQI */
76736 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76737 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0xc808 }
76739 /* add.b${G} $Src32AnUnprefixedQI,$Dst32RnUnprefixedQI */
76742 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76743 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8828 }
76745 /* add.b${G} [$Src32AnUnprefixed],$Dst32RnUnprefixedQI */
76748 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
76749 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_Rn_direct_Unprefixed_QI
, { 0x8808 }
76751 /* add.b${G} $Src32RnUnprefixedQI,$Dst32AnUnprefixedQI */
76754 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76755 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0xc088 }
76757 /* add.b${G} $Src32AnUnprefixedQI,$Dst32AnUnprefixedQI */
76760 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76761 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x80a8 }
76763 /* add.b${G} [$Src32AnUnprefixed],$Dst32AnUnprefixedQI */
76766 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
76767 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_direct_Unprefixed_QI
, { 0x8088 }
76769 /* add.b${G} $Src32RnUnprefixedQI,[$Dst32AnUnprefixed] */
76772 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76773 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0xc008 }
76775 /* add.b${G} $Src32AnUnprefixedQI,[$Dst32AnUnprefixed] */
76778 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76779 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8028 }
76781 /* add.b${G} [$Src32AnUnprefixed],[$Dst32AnUnprefixed] */
76784 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76785 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_An_indirect_Unprefixed_QI
, { 0x8008 }
76787 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
76790 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76791 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0xc20800 }
76793 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[$Dst32AnUnprefixed] */
76796 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76797 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822800 }
76799 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[$Dst32AnUnprefixed] */
76802 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76803 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_An_relative_Unprefixed_QI
, { 0x820800 }
76805 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
76808 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76809 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0xc4080000 }
76811 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[$Dst32AnUnprefixed] */
76814 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76815 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84280000 }
76817 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[$Dst32AnUnprefixed] */
76820 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76821 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_An_relative_Unprefixed_QI
, { 0x84080000 }
76823 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
76826 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76827 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0xc6080000 }
76829 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24}[$Dst32AnUnprefixed] */
76832 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76833 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86280000 }
76835 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24}[$Dst32AnUnprefixed] */
76838 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
76839 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_An_relative_Unprefixed_QI
, { 0x86080000 }
76841 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u8}[sb] */
76844 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76845 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xc28800 }
76847 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u8}[sb] */
76850 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76851 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82a800 }
76853 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u8}[sb] */
76856 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
76857 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x828800 }
76859 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16}[sb] */
76862 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76863 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xc4880000 }
76865 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16}[sb] */
76868 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76869 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84a80000 }
76871 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16}[sb] */
76874 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
76875 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84880000 }
76877 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s8}[fb] */
76880 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76881 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xc2c800 }
76883 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s8}[fb] */
76886 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76887 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82e800 }
76889 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s8}[fb] */
76892 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
76893 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82c800 }
76895 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-s16}[fb] */
76898 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76899 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xc4c80000 }
76901 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-s16}[fb] */
76904 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76905 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84e80000 }
76907 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-s16}[fb] */
76910 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
76911 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84c80000 }
76913 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u16} */
76916 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
76917 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0xc6c80000 }
76919 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u16} */
76922 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U16
), 0 } },
76923 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86e80000 }
76925 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u16} */
76928 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U16
), 0 } },
76929 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_16_absolute_Unprefixed_QI
, { 0x86c80000 }
76931 /* add.b${G} $Src32RnUnprefixedQI,${Dsp-16-u24} */
76934 { { MNEM
, OP (G
), ' ', OP (SRC32RNUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
76935 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_Rn_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0xc6880000 }
76937 /* add.b${G} $Src32AnUnprefixedQI,${Dsp-16-u24} */
76940 { { MNEM
, OP (G
), ' ', OP (SRC32ANUNPREFIXEDQI
), ',', OP (DSP_16_U24
), 0 } },
76941 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_direct_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86a80000 }
76943 /* add.b${G} [$Src32AnUnprefixed],${Dsp-16-u24} */
76946 { { MNEM
, OP (G
), ' ', '[', OP (SRC32ANUNPREFIXED
), ']', ',', OP (DSP_16_U24
), 0 } },
76947 & ifmt_xor32_b_basic_Unprefixed_16_Unprefixed_src32_An_indirect_Unprefixed_QI_dst32_16_24_absolute_Unprefixed_QI
, { 0x86880000 }
76949 /* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16RnHI */
76952 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
76953 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_Rn_direct_HI
, { 0xa18000 }
76955 /* add.w${G} ${Dsp-16-u8}[sb],$Dst16RnHI */
76958 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
76959 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa1a000 }
76961 /* add.w${G} ${Dsp-16-s8}[fb],$Dst16RnHI */
76964 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNHI
), 0 } },
76965 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_Rn_direct_HI
, { 0xa1b000 }
76967 /* add.w${G} ${Dsp-16-u8}[$Src16An],$Dst16AnHI */
76970 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
76971 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_direct_HI
, { 0xa18400 }
76973 /* add.w${G} ${Dsp-16-u8}[sb],$Dst16AnHI */
76976 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
76977 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_direct_HI
, { 0xa1a400 }
76979 /* add.w${G} ${Dsp-16-s8}[fb],$Dst16AnHI */
76982 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANHI
), 0 } },
76983 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_direct_HI
, { 0xa1b400 }
76985 /* add.w${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
76988 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
76989 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_An_indirect_HI
, { 0xa18600 }
76991 /* add.w${G} ${Dsp-16-u8}[sb],[$Dst16An] */
76994 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
76995 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_An_indirect_HI
, { 0xa1a600 }
76997 /* add.w${G} ${Dsp-16-s8}[fb],[$Dst16An] */
77000 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77001 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_An_indirect_HI
, { 0xa1b600 }
77003 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
77006 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77007 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1880000 }
77009 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
77012 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77013 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1a80000 }
77015 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
77018 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77019 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_An_relative_HI
, { 0xa1b80000 }
77021 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
77024 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77025 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_An_relative_HI
, { 0xa18c0000 }
77027 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
77030 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77031 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa1ac0000 }
77033 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
77036 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77037 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_An_relative_HI
, { 0xa1bc0000 }
77039 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
77042 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77043 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa18a0000 }
77045 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
77048 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77049 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa1aa0000 }
77051 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
77054 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77055 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_SB_relative_HI
, { 0xa1ba0000 }
77057 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
77060 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77061 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa18e0000 }
77063 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
77066 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77067 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa1ae0000 }
77069 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
77072 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77073 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_SB_relative_HI
, { 0xa1be0000 }
77075 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
77078 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77079 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa18b0000 }
77081 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
77084 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77085 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa1ab0000 }
77087 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
77090 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77091 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_8_FB_relative_HI
, { 0xa1bb0000 }
77093 /* add.w${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
77096 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
77097 & ifmt_xor16_w_16_8_24_src16_16_8_An_relative_HI_dst16_24_16_absolute_HI
, { 0xa18f0000 }
77099 /* add.w${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
77102 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77103 & ifmt_xor16_w_16_8_24_src16_16_8_SB_relative_HI_dst16_24_16_absolute_HI
, { 0xa1af0000 }
77105 /* add.w${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
77108 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77109 & ifmt_xor16_w_16_8_24_src16_16_8_FB_relative_HI_dst16_24_16_absolute_HI
, { 0xa1bf0000 }
77111 /* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16RnHI */
77114 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
77115 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_Rn_direct_HI
, { 0xa1c00000 }
77117 /* add.w${G} ${Dsp-16-u16}[sb],$Dst16RnHI */
77120 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNHI
), 0 } },
77121 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_Rn_direct_HI
, { 0xa1e00000 }
77123 /* add.w${G} ${Dsp-16-u16},$Dst16RnHI */
77126 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNHI
), 0 } },
77127 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_Rn_direct_HI
, { 0xa1f00000 }
77129 /* add.w${G} ${Dsp-16-u16}[$Src16An],$Dst16AnHI */
77132 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
77133 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_direct_HI
, { 0xa1c40000 }
77135 /* add.w${G} ${Dsp-16-u16}[sb],$Dst16AnHI */
77138 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANHI
), 0 } },
77139 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_direct_HI
, { 0xa1e40000 }
77141 /* add.w${G} ${Dsp-16-u16},$Dst16AnHI */
77144 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANHI
), 0 } },
77145 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_direct_HI
, { 0xa1f40000 }
77147 /* add.w${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
77150 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77151 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_An_indirect_HI
, { 0xa1c60000 }
77153 /* add.w${G} ${Dsp-16-u16}[sb],[$Dst16An] */
77156 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77157 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_An_indirect_HI
, { 0xa1e60000 }
77159 /* add.w${G} ${Dsp-16-u16},[$Dst16An] */
77162 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
77163 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_An_indirect_HI
, { 0xa1f60000 }
77165 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
77168 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77169 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_An_relative_HI
, { 0xa1c80000 }
77171 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
77174 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77175 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_An_relative_HI
, { 0xa1e80000 }
77177 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
77180 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77181 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_An_relative_HI
, { 0xa1f80000 }
77183 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
77186 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77187 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_An_relative_HI
, { 0xa1cc0000 }
77189 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
77192 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77193 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_An_relative_HI
, { 0xa1ec0000 }
77195 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
77198 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77199 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_An_relative_HI
, { 0xa1fc0000 }
77201 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
77204 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77205 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa1ca0000 }
77207 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
77210 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77211 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_SB_relative_HI
, { 0xa1ea0000 }
77213 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
77216 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77217 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_SB_relative_HI
, { 0xa1fa0000 }
77219 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
77222 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77223 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa1ce0000 }
77225 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
77228 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77229 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_SB_relative_HI
, { 0xa1ee0000 }
77231 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
77234 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77235 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_SB_relative_HI
, { 0xa1fe0000 }
77237 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
77240 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77241 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa1cb0000 }
77243 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
77246 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77247 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_8_FB_relative_HI
, { 0xa1eb0000 }
77249 /* add.w${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
77252 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77253 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_8_FB_relative_HI
, { 0xa1fb0000 }
77255 /* add.w${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
77258 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
77259 & ifmt_xor16_w_16_16_32_src16_16_16_An_relative_HI_dst16_32_16_absolute_HI
, { 0xa1cf0000 }
77261 /* add.w${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
77264 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
77265 & ifmt_xor16_w_16_16_32_src16_16_16_SB_relative_HI_dst16_32_16_absolute_HI
, { 0xa1ef0000 }
77267 /* add.w${G} ${Dsp-16-u16},${Dsp-32-u16} */
77270 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
77271 & ifmt_xor16_w_16_16_32_src16_16_16_absolute_HI_dst16_32_16_absolute_HI
, { 0xa1ff0000 }
77273 /* add.w${G} $Src16RnHI,$Dst16RnHI */
77276 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16RNHI
), 0 } },
77277 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_Rn_direct_HI
, { 0xa100 }
77279 /* add.w${G} $Src16AnHI,$Dst16RnHI */
77282 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16RNHI
), 0 } },
77283 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_Rn_direct_HI
, { 0xa140 }
77285 /* add.w${G} [$Src16An],$Dst16RnHI */
77288 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNHI
), 0 } },
77289 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_Rn_direct_HI
, { 0xa160 }
77291 /* add.w${G} $Src16RnHI,$Dst16AnHI */
77294 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DST16ANHI
), 0 } },
77295 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_direct_HI
, { 0xa104 }
77297 /* add.w${G} $Src16AnHI,$Dst16AnHI */
77300 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DST16ANHI
), 0 } },
77301 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_direct_HI
, { 0xa144 }
77303 /* add.w${G} [$Src16An],$Dst16AnHI */
77306 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANHI
), 0 } },
77307 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_direct_HI
, { 0xa164 }
77309 /* add.w${G} $Src16RnHI,[$Dst16An] */
77312 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', '[', OP (DST16AN
), ']', 0 } },
77313 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_An_indirect_HI
, { 0xa106 }
77315 /* add.w${G} $Src16AnHI,[$Dst16An] */
77318 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', '[', OP (DST16AN
), ']', 0 } },
77319 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_An_indirect_HI
, { 0xa146 }
77321 /* add.w${G} [$Src16An],[$Dst16An] */
77324 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77325 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_An_indirect_HI
, { 0xa166 }
77327 /* add.w${G} $Src16RnHI,${Dsp-16-u8}[$Dst16An] */
77330 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77331 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_An_relative_HI
, { 0xa10800 }
77333 /* add.w${G} $Src16AnHI,${Dsp-16-u8}[$Dst16An] */
77336 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77337 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_An_relative_HI
, { 0xa14800 }
77339 /* add.w${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
77342 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77343 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_An_relative_HI
, { 0xa16800 }
77345 /* add.w${G} $Src16RnHI,${Dsp-16-u16}[$Dst16An] */
77348 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77349 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_An_relative_HI
, { 0xa10c0000 }
77351 /* add.w${G} $Src16AnHI,${Dsp-16-u16}[$Dst16An] */
77354 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77355 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_An_relative_HI
, { 0xa14c0000 }
77357 /* add.w${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
77360 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77361 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_An_relative_HI
, { 0xa16c0000 }
77363 /* add.w${G} $Src16RnHI,${Dsp-16-u8}[sb] */
77366 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77367 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa10a00 }
77369 /* add.w${G} $Src16AnHI,${Dsp-16-u8}[sb] */
77372 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77373 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_SB_relative_HI
, { 0xa14a00 }
77375 /* add.w${G} [$Src16An],${Dsp-16-u8}[sb] */
77378 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77379 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_SB_relative_HI
, { 0xa16a00 }
77381 /* add.w${G} $Src16RnHI,${Dsp-16-u16}[sb] */
77384 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77385 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa10e0000 }
77387 /* add.w${G} $Src16AnHI,${Dsp-16-u16}[sb] */
77390 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77391 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_SB_relative_HI
, { 0xa14e0000 }
77393 /* add.w${G} [$Src16An],${Dsp-16-u16}[sb] */
77396 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77397 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_SB_relative_HI
, { 0xa16e0000 }
77399 /* add.w${G} $Src16RnHI,${Dsp-16-s8}[fb] */
77402 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77403 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa10b00 }
77405 /* add.w${G} $Src16AnHI,${Dsp-16-s8}[fb] */
77408 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77409 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_8_FB_relative_HI
, { 0xa14b00 }
77411 /* add.w${G} [$Src16An],${Dsp-16-s8}[fb] */
77414 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77415 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_8_FB_relative_HI
, { 0xa16b00 }
77417 /* add.w${G} $Src16RnHI,${Dsp-16-u16} */
77420 { { MNEM
, OP (G
), ' ', OP (SRC16RNHI
), ',', OP (DSP_16_U16
), 0 } },
77421 & ifmt_xor16_w_basic_16_src16_Rn_direct_HI_dst16_16_16_absolute_HI
, { 0xa10f0000 }
77423 /* add.w${G} $Src16AnHI,${Dsp-16-u16} */
77426 { { MNEM
, OP (G
), ' ', OP (SRC16ANHI
), ',', OP (DSP_16_U16
), 0 } },
77427 & ifmt_xor16_w_basic_16_src16_An_direct_HI_dst16_16_16_absolute_HI
, { 0xa14f0000 }
77429 /* add.w${G} [$Src16An],${Dsp-16-u16} */
77432 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
77433 & ifmt_xor16_w_basic_16_src16_An_indirect_HI_dst16_16_16_absolute_HI
, { 0xa16f0000 }
77435 /* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16RnQI */
77438 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77439 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_Rn_direct_QI
, { 0xa08000 }
77441 /* add.b${G} ${Dsp-16-u8}[sb],$Dst16RnQI */
77444 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77445 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa0a000 }
77447 /* add.b${G} ${Dsp-16-s8}[fb],$Dst16RnQI */
77450 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77451 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_Rn_direct_QI
, { 0xa0b000 }
77453 /* add.b${G} ${Dsp-16-u8}[$Src16An],$Dst16AnQI */
77456 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77457 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_direct_QI
, { 0xa08400 }
77459 /* add.b${G} ${Dsp-16-u8}[sb],$Dst16AnQI */
77462 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77463 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_direct_QI
, { 0xa0a400 }
77465 /* add.b${G} ${Dsp-16-s8}[fb],$Dst16AnQI */
77468 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77469 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_direct_QI
, { 0xa0b400 }
77471 /* add.b${G} ${Dsp-16-u8}[$Src16An],[$Dst16An] */
77474 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77475 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_An_indirect_QI
, { 0xa08600 }
77477 /* add.b${G} ${Dsp-16-u8}[sb],[$Dst16An] */
77480 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77481 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_An_indirect_QI
, { 0xa0a600 }
77483 /* add.b${G} ${Dsp-16-s8}[fb],[$Dst16An] */
77486 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77487 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_An_indirect_QI
, { 0xa0b600 }
77489 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[$Dst16An] */
77492 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77493 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0880000 }
77495 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[$Dst16An] */
77498 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77499 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0a80000 }
77501 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[$Dst16An] */
77504 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', OP (DST16AN
), ']', 0 } },
77505 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_An_relative_QI
, { 0xa0b80000 }
77507 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[$Dst16An] */
77510 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77511 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_An_relative_QI
, { 0xa08c0000 }
77513 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[$Dst16An] */
77516 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77517 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa0ac0000 }
77519 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[$Dst16An] */
77522 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', OP (DST16AN
), ']', 0 } },
77523 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_An_relative_QI
, { 0xa0bc0000 }
77525 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u8}[sb] */
77528 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77529 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa08a0000 }
77531 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u8}[sb] */
77534 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77535 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa0aa0000 }
77537 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u8}[sb] */
77540 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U8
), '[', 's', 'b', ']', 0 } },
77541 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_SB_relative_QI
, { 0xa0ba0000 }
77543 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16}[sb] */
77546 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77547 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa08e0000 }
77549 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16}[sb] */
77552 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77553 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa0ae0000 }
77555 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16}[sb] */
77558 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), '[', 's', 'b', ']', 0 } },
77559 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_SB_relative_QI
, { 0xa0be0000 }
77561 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-s8}[fb] */
77564 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77565 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa08b0000 }
77567 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-s8}[fb] */
77570 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77571 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa0ab0000 }
77573 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-s8}[fb] */
77576 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_S8
), '[', 'f', 'b', ']', 0 } },
77577 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_8_FB_relative_QI
, { 0xa0bb0000 }
77579 /* add.b${G} ${Dsp-16-u8}[$Src16An],${Dsp-24-u16} */
77582 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', OP (SRC16AN
), ']', ',', OP (DSP_24_U16
), 0 } },
77583 & ifmt_xor16_b_16_8_24_src16_16_8_An_relative_QI_dst16_24_16_absolute_QI
, { 0xa08f0000 }
77585 /* add.b${G} ${Dsp-16-u8}[sb],${Dsp-24-u16} */
77588 { { MNEM
, OP (G
), ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77589 & ifmt_xor16_b_16_8_24_src16_16_8_SB_relative_QI_dst16_24_16_absolute_QI
, { 0xa0af0000 }
77591 /* add.b${G} ${Dsp-16-s8}[fb],${Dsp-24-u16} */
77594 { { MNEM
, OP (G
), ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', ',', OP (DSP_24_U16
), 0 } },
77595 & ifmt_xor16_b_16_8_24_src16_16_8_FB_relative_QI_dst16_24_16_absolute_QI
, { 0xa0bf0000 }
77597 /* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16RnQI */
77600 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77601 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_Rn_direct_QI
, { 0xa0c00000 }
77603 /* add.b${G} ${Dsp-16-u16}[sb],$Dst16RnQI */
77606 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16RNQI
), 0 } },
77607 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_Rn_direct_QI
, { 0xa0e00000 }
77609 /* add.b${G} ${Dsp-16-u16},$Dst16RnQI */
77612 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16RNQI
), 0 } },
77613 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_Rn_direct_QI
, { 0xa0f00000 }
77615 /* add.b${G} ${Dsp-16-u16}[$Src16An],$Dst16AnQI */
77618 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77619 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_direct_QI
, { 0xa0c40000 }
77621 /* add.b${G} ${Dsp-16-u16}[sb],$Dst16AnQI */
77624 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DST16ANQI
), 0 } },
77625 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_direct_QI
, { 0xa0e40000 }
77627 /* add.b${G} ${Dsp-16-u16},$Dst16AnQI */
77630 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DST16ANQI
), 0 } },
77631 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_direct_QI
, { 0xa0f40000 }
77633 /* add.b${G} ${Dsp-16-u16}[$Src16An],[$Dst16An] */
77636 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77637 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_An_indirect_QI
, { 0xa0c60000 }
77639 /* add.b${G} ${Dsp-16-u16}[sb],[$Dst16An] */
77642 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', '[', OP (DST16AN
), ']', 0 } },
77643 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_An_indirect_QI
, { 0xa0e60000 }
77645 /* add.b${G} ${Dsp-16-u16},[$Dst16An] */
77648 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', '[', OP (DST16AN
), ']', 0 } },
77649 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_An_indirect_QI
, { 0xa0f60000 }
77651 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[$Dst16An] */
77654 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77655 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_An_relative_QI
, { 0xa0c80000 }
77657 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[$Dst16An] */
77660 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77661 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_An_relative_QI
, { 0xa0e80000 }
77663 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[$Dst16An] */
77666 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', OP (DST16AN
), ']', 0 } },
77667 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_An_relative_QI
, { 0xa0f80000 }
77669 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[$Dst16An] */
77672 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77673 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_An_relative_QI
, { 0xa0cc0000 }
77675 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[$Dst16An] */
77678 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77679 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_An_relative_QI
, { 0xa0ec0000 }
77681 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[$Dst16An] */
77684 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', OP (DST16AN
), ']', 0 } },
77685 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_An_relative_QI
, { 0xa0fc0000 }
77687 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u8}[sb] */
77690 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77691 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa0ca0000 }
77693 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u8}[sb] */
77696 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77697 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_SB_relative_QI
, { 0xa0ea0000 }
77699 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u8}[sb] */
77702 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U8
), '[', 's', 'b', ']', 0 } },
77703 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_SB_relative_QI
, { 0xa0fa0000 }
77705 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16}[sb] */
77708 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77709 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa0ce0000 }
77711 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16}[sb] */
77714 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77715 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_SB_relative_QI
, { 0xa0ee0000 }
77717 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16}[sb] */
77720 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), '[', 's', 'b', ']', 0 } },
77721 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_SB_relative_QI
, { 0xa0fe0000 }
77723 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-s8}[fb] */
77726 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77727 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa0cb0000 }
77729 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-s8}[fb] */
77732 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77733 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_8_FB_relative_QI
, { 0xa0eb0000 }
77735 /* add.b${G} ${Dsp-16-u16},${Dsp-32-s8}[fb] */
77738 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_S8
), '[', 'f', 'b', ']', 0 } },
77739 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_8_FB_relative_QI
, { 0xa0fb0000 }
77741 /* add.b${G} ${Dsp-16-u16}[$Src16An],${Dsp-32-u16} */
77744 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', OP (SRC16AN
), ']', ',', OP (DSP_32_U16
), 0 } },
77745 & ifmt_xor16_b_16_16_32_src16_16_16_An_relative_QI_dst16_32_16_absolute_QI
, { 0xa0cf0000 }
77747 /* add.b${G} ${Dsp-16-u16}[sb],${Dsp-32-u16} */
77750 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', ',', OP (DSP_32_U16
), 0 } },
77751 & ifmt_xor16_b_16_16_32_src16_16_16_SB_relative_QI_dst16_32_16_absolute_QI
, { 0xa0ef0000 }
77753 /* add.b${G} ${Dsp-16-u16},${Dsp-32-u16} */
77756 { { MNEM
, OP (G
), ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U16
), 0 } },
77757 & ifmt_xor16_b_16_16_32_src16_16_16_absolute_QI_dst16_32_16_absolute_QI
, { 0xa0ff0000 }
77759 /* add.b${G} $Src16RnQI,$Dst16RnQI */
77762 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16RNQI
), 0 } },
77763 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_Rn_direct_QI
, { 0xa000 }
77765 /* add.b${G} $Src16AnQI,$Dst16RnQI */
77768 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16RNQI
), 0 } },
77769 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_Rn_direct_QI
, { 0xa040 }
77771 /* add.b${G} [$Src16An],$Dst16RnQI */
77774 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16RNQI
), 0 } },
77775 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_Rn_direct_QI
, { 0xa060 }
77777 /* add.b${G} $Src16RnQI,$Dst16AnQI */
77780 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DST16ANQI
), 0 } },
77781 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_direct_QI
, { 0xa004 }
77783 /* add.b${G} $Src16AnQI,$Dst16AnQI */
77786 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DST16ANQI
), 0 } },
77787 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_direct_QI
, { 0xa044 }
77789 /* add.b${G} [$Src16An],$Dst16AnQI */
77792 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DST16ANQI
), 0 } },
77793 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_direct_QI
, { 0xa064 }
77795 /* add.b${G} $Src16RnQI,[$Dst16An] */
77798 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', '[', OP (DST16AN
), ']', 0 } },
77799 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_An_indirect_QI
, { 0xa006 }
77801 /* add.b${G} $Src16AnQI,[$Dst16An] */
77804 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', '[', OP (DST16AN
), ']', 0 } },
77805 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_An_indirect_QI
, { 0xa046 }
77807 /* add.b${G} [$Src16An],[$Dst16An] */
77810 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', '[', OP (DST16AN
), ']', 0 } },
77811 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_An_indirect_QI
, { 0xa066 }
77813 /* add.b${G} $Src16RnQI,${Dsp-16-u8}[$Dst16An] */
77816 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77817 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_An_relative_QI
, { 0xa00800 }
77819 /* add.b${G} $Src16AnQI,${Dsp-16-u8}[$Dst16An] */
77822 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77823 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_An_relative_QI
, { 0xa04800 }
77825 /* add.b${G} [$Src16An],${Dsp-16-u8}[$Dst16An] */
77828 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
77829 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_An_relative_QI
, { 0xa06800 }
77831 /* add.b${G} $Src16RnQI,${Dsp-16-u16}[$Dst16An] */
77834 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77835 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_An_relative_QI
, { 0xa00c0000 }
77837 /* add.b${G} $Src16AnQI,${Dsp-16-u16}[$Dst16An] */
77840 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77841 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_An_relative_QI
, { 0xa04c0000 }
77843 /* add.b${G} [$Src16An],${Dsp-16-u16}[$Dst16An] */
77846 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
77847 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_An_relative_QI
, { 0xa06c0000 }
77849 /* add.b${G} $Src16RnQI,${Dsp-16-u8}[sb] */
77852 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77853 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa00a00 }
77855 /* add.b${G} $Src16AnQI,${Dsp-16-u8}[sb] */
77858 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77859 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_SB_relative_QI
, { 0xa04a00 }
77861 /* add.b${G} [$Src16An],${Dsp-16-u8}[sb] */
77864 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77865 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_SB_relative_QI
, { 0xa06a00 }
77867 /* add.b${G} $Src16RnQI,${Dsp-16-u16}[sb] */
77870 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77871 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa00e0000 }
77873 /* add.b${G} $Src16AnQI,${Dsp-16-u16}[sb] */
77876 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77877 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_SB_relative_QI
, { 0xa04e0000 }
77879 /* add.b${G} [$Src16An],${Dsp-16-u16}[sb] */
77882 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77883 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_SB_relative_QI
, { 0xa06e0000 }
77885 /* add.b${G} $Src16RnQI,${Dsp-16-s8}[fb] */
77888 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77889 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa00b00 }
77891 /* add.b${G} $Src16AnQI,${Dsp-16-s8}[fb] */
77894 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77895 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_8_FB_relative_QI
, { 0xa04b00 }
77897 /* add.b${G} [$Src16An],${Dsp-16-s8}[fb] */
77900 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77901 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_8_FB_relative_QI
, { 0xa06b00 }
77903 /* add.b${G} $Src16RnQI,${Dsp-16-u16} */
77906 { { MNEM
, OP (G
), ' ', OP (SRC16RNQI
), ',', OP (DSP_16_U16
), 0 } },
77907 & ifmt_xor16_b_basic_16_src16_Rn_direct_QI_dst16_16_16_absolute_QI
, { 0xa00f0000 }
77909 /* add.b${G} $Src16AnQI,${Dsp-16-u16} */
77912 { { MNEM
, OP (G
), ' ', OP (SRC16ANQI
), ',', OP (DSP_16_U16
), 0 } },
77913 & ifmt_xor16_b_basic_16_src16_An_direct_QI_dst16_16_16_absolute_QI
, { 0xa04f0000 }
77915 /* add.b${G} [$Src16An],${Dsp-16-u16} */
77918 { { MNEM
, OP (G
), ' ', '[', OP (SRC16AN
), ']', ',', OP (DSP_16_U16
), 0 } },
77919 & ifmt_xor16_b_basic_16_src16_An_indirect_QI_dst16_16_16_absolute_QI
, { 0xa06f0000 }
77921 /* add.b${S} #${Imm-8-QI},r0l */
77924 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'l', 0 } },
77925 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0l_direct_QI
, { 0x8400 }
77927 /* add.b${S} #${Imm-8-QI},r0h */
77930 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'r', '0', 'h', 0 } },
77931 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_R0h_direct_QI
, { 0x8300 }
77933 /* add.b${S} #${Imm-8-QI},${Dsp-16-u8}[sb] */
77936 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77937 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_SB_relative_QI
, { 0x850000 }
77939 /* add.b${S} #${Imm-8-QI},${Dsp-16-s8}[fb] */
77942 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
77943 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_8_FB_relative_QI
, { 0x860000 }
77945 /* add.b${S} #${Imm-8-QI},${Dsp-16-u16} */
77948 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', OP (DSP_16_U16
), 0 } },
77949 & ifmt_stz16_b_S_imm8_dst3_dst16_3_S_16_16_absolute_QI
, { 0x87000000 }
77951 /* add.l${Q} #${Imm-12-s4},$Dst32RnUnprefixedSI */
77954 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
77955 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0xf830 }
77957 /* add.l${Q} #${Imm-12-s4},$Dst32AnUnprefixedSI */
77960 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
77961 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0xf0b0 }
77963 /* add.l${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
77966 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77967 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0xf030 }
77969 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
77972 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77973 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0xf23000 }
77975 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
77978 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77979 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0xf4300000 }
77981 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
77984 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
77985 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0xf6300000 }
77987 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
77990 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
77991 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0xf2b000 }
77993 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
77996 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
77997 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0xf4b00000 }
77999 /* add.l${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78002 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78003 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0xf2f000 }
78005 /* add.l${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78008 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78009 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0xf4f00000 }
78011 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u16} */
78014 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78015 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0xf6f00000 }
78017 /* add.l${Q} #${Imm-12-s4},${Dsp-16-u24} */
78020 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78021 & ifmt_add32_l_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0xf6b00000 }
78023 /* add.w${Q} #${Imm-12-s4},$Dst32RnUnprefixedHI */
78026 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
78027 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0xe930 }
78029 /* add.w${Q} #${Imm-12-s4},$Dst32AnUnprefixedHI */
78032 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
78033 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0xe1b0 }
78035 /* add.w${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
78038 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78039 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0xe130 }
78041 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78044 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78045 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0xe33000 }
78047 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78050 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78051 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0xe5300000 }
78053 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78056 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78057 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0xe7300000 }
78059 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
78062 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78063 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xe3b000 }
78065 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
78068 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78069 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xe5b00000 }
78071 /* add.w${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78074 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78075 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xe3f000 }
78077 /* add.w${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78080 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78081 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xe5f00000 }
78083 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u16} */
78086 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78087 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0xe7f00000 }
78089 /* add.w${Q} #${Imm-12-s4},${Dsp-16-u24} */
78092 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78093 & ifmt_mov32_w_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0xe7b00000 }
78095 /* add.b${Q} #${Imm-12-s4},$Dst32RnUnprefixedQI */
78098 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
78099 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0xe830 }
78101 /* add.b${Q} #${Imm-12-s4},$Dst32AnUnprefixedQI */
78104 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
78105 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0xe0b0 }
78107 /* add.b${Q} #${Imm-12-s4},[$Dst32AnUnprefixed] */
78110 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78111 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0xe030 }
78113 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78116 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78117 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0xe23000 }
78119 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78122 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78123 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0xe4300000 }
78125 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78128 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78129 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0xe6300000 }
78131 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u8}[sb] */
78134 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78135 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xe2b000 }
78137 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16}[sb] */
78140 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78141 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xe4b00000 }
78143 /* add.b${Q} #${Imm-12-s4},${Dsp-16-s8}[fb] */
78146 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78147 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xe2f000 }
78149 /* add.b${Q} #${Imm-12-s4},${Dsp-16-s16}[fb] */
78152 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78153 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xe4f00000 }
78155 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u16} */
78158 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U16
), 0 } },
78159 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0xe6f00000 }
78161 /* add.b${Q} #${Imm-12-s4},${Dsp-16-u24} */
78164 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', OP (DSP_16_U24
), 0 } },
78165 & ifmt_mov32_b_imm4_Q_16_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0xe6b00000 }
78167 /* add.w${Q} #${Imm-8-s4},$Dst16RnHI */
78170 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNHI
), 0 } },
78171 & ifmt_mov16_w_imm4_Q_16_dst16_Rn_direct_HI
, { 0xc900 }
78173 /* add.w${Q} #${Imm-8-s4},$Dst16AnHI */
78176 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANHI
), 0 } },
78177 & ifmt_mov16_w_imm4_Q_16_dst16_An_direct_HI
, { 0xc904 }
78179 /* add.w${Q} #${Imm-8-s4},[$Dst16An] */
78182 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
78183 & ifmt_mov16_w_imm4_Q_16_dst16_An_indirect_HI
, { 0xc906 }
78185 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
78188 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78189 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_An_relative_HI
, { 0xc90800 }
78191 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
78194 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78195 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_An_relative_HI
, { 0xc90c0000 }
78197 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
78200 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78201 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_SB_relative_HI
, { 0xc90a00 }
78203 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
78206 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78207 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_SB_relative_HI
, { 0xc90e0000 }
78209 /* add.w${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
78212 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78213 & ifmt_mov16_w_imm4_Q_16_dst16_16_8_FB_relative_HI
, { 0xc90b00 }
78215 /* add.w${Q} #${Imm-8-s4},${Dsp-16-u16} */
78218 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
78219 & ifmt_mov16_w_imm4_Q_16_dst16_16_16_absolute_HI
, { 0xc90f0000 }
78221 /* add.b${Q} #${Imm-8-s4},$Dst16RnQI */
78224 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16RNQI
), 0 } },
78225 & ifmt_mov16_b_imm4_Q_16_dst16_Rn_direct_QI
, { 0xc800 }
78227 /* add.b${Q} #${Imm-8-s4},$Dst16AnQI */
78230 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DST16ANQI
), 0 } },
78231 & ifmt_mov16_b_imm4_Q_16_dst16_An_direct_QI
, { 0xc804 }
78233 /* add.b${Q} #${Imm-8-s4},[$Dst16An] */
78236 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', '[', OP (DST16AN
), ']', 0 } },
78237 & ifmt_mov16_b_imm4_Q_16_dst16_An_indirect_QI
, { 0xc806 }
78239 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[$Dst16An] */
78242 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78243 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_An_relative_QI
, { 0xc80800 }
78245 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[$Dst16An] */
78248 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78249 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_An_relative_QI
, { 0xc80c0000 }
78251 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u8}[sb] */
78254 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78255 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_SB_relative_QI
, { 0xc80a00 }
78257 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16}[sb] */
78260 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78261 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_SB_relative_QI
, { 0xc80e0000 }
78263 /* add.b${Q} #${Imm-8-s4},${Dsp-16-s8}[fb] */
78266 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78267 & ifmt_mov16_b_imm4_Q_16_dst16_16_8_FB_relative_QI
, { 0xc80b00 }
78269 /* add.b${Q} #${Imm-8-s4},${Dsp-16-u16} */
78272 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_8_S4
), ',', OP (DSP_16_U16
), 0 } },
78273 & ifmt_mov16_b_imm4_Q_16_dst16_16_16_absolute_QI
, { 0xc80f0000 }
78275 /* add.w${G} #${Imm-16-HI},$Dst32RnUnprefixedHI */
78278 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32RNUNPREFIXEDHI
), 0 } },
78279 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_HI
, { 0x892e0000 }
78281 /* add.w${G} #${Imm-16-HI},$Dst32AnUnprefixedHI */
78284 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST32ANUNPREFIXEDHI
), 0 } },
78285 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_HI
, { 0x81ae0000 }
78287 /* add.w${G} #${Imm-16-HI},[$Dst32AnUnprefixed] */
78290 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78291 & ifmt_xor32_w_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_HI
, { 0x812e0000 }
78293 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78296 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78297 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_HI
, { 0x832e0000 }
78299 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
78302 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78303 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_HI
, { 0x83ae0000 }
78305 /* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
78308 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78309 & ifmt_xor32_w_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_HI
, { 0x83ee0000 }
78311 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78314 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78315 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_HI
, { 0x852e0000 }
78317 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
78320 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78321 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_HI
, { 0x85ae0000 }
78323 /* add.w${G} #${Imm-32-HI},${Dsp-16-s16}[fb] */
78326 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78327 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_HI
, { 0x85ee0000 }
78329 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
78332 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
78333 & ifmt_xor32_w_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_HI
, { 0x87ee0000 }
78335 /* add.w${G} #${Imm-40-HI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78338 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78339 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_HI
, { 0x872e0000 }
78341 /* add.w${G} #${Imm-40-HI},${Dsp-16-u24} */
78344 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_HI
), ',', OP (DSP_16_U24
), 0 } },
78345 & ifmt_xor32_w_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_HI
, { 0x87ae0000 }
78347 /* add.b${G} #${Imm-16-QI},$Dst32RnUnprefixedQI */
78350 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32RNUNPREFIXEDQI
), 0 } },
78351 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_QI
, { 0x882e00 }
78353 /* add.b${G} #${Imm-16-QI},$Dst32AnUnprefixedQI */
78356 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST32ANUNPREFIXEDQI
), 0 } },
78357 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_QI
, { 0x80ae00 }
78359 /* add.b${G} #${Imm-16-QI},[$Dst32AnUnprefixed] */
78362 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78363 & ifmt_xor32_b_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_QI
, { 0x802e00 }
78365 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78368 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78369 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_QI
, { 0x822e0000 }
78371 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
78374 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78375 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_QI
, { 0x82ae0000 }
78377 /* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
78380 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78381 & ifmt_xor32_b_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_QI
, { 0x82ee0000 }
78383 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78386 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78387 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_QI
, { 0x842e0000 }
78389 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
78392 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78393 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_QI
, { 0x84ae0000 }
78395 /* add.b${G} #${Imm-32-QI},${Dsp-16-s16}[fb] */
78398 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78399 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_QI
, { 0x84ee0000 }
78401 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
78404 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
78405 & ifmt_xor32_b_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_QI
, { 0x86ee0000 }
78407 /* add.b${G} #${Imm-40-QI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78410 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78411 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_QI
, { 0x862e0000 }
78413 /* add.b${G} #${Imm-40-QI},${Dsp-16-u24} */
78416 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_QI
), ',', OP (DSP_16_U24
), 0 } },
78417 & ifmt_xor32_b_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_QI
, { 0x86ae0000 }
78419 /* add.w${G} #${Imm-16-HI},$Dst16RnHI */
78422 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16RNHI
), 0 } },
78423 & ifmt_xor16_w_imm_G_basic_dst16_Rn_direct_HI
, { 0x77400000 }
78425 /* add.w${G} #${Imm-16-HI},$Dst16AnHI */
78428 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', OP (DST16ANHI
), 0 } },
78429 & ifmt_xor16_w_imm_G_basic_dst16_An_direct_HI
, { 0x77440000 }
78431 /* add.w${G} #${Imm-16-HI},[$Dst16An] */
78434 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', '[', OP (DST16AN
), ']', 0 } },
78435 & ifmt_xor16_w_imm_G_basic_dst16_An_indirect_HI
, { 0x77460000 }
78437 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[$Dst16An] */
78440 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78441 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_An_relative_HI
, { 0x77480000 }
78443 /* add.w${G} #${Imm-24-HI},${Dsp-16-u8}[sb] */
78446 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78447 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_SB_relative_HI
, { 0x774a0000 }
78449 /* add.w${G} #${Imm-24-HI},${Dsp-16-s8}[fb] */
78452 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_HI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78453 & ifmt_xor16_w_imm_G_16_8_dst16_16_8_FB_relative_HI
, { 0x774b0000 }
78455 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[$Dst16An] */
78458 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78459 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_An_relative_HI
, { 0x774c0000 }
78461 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16}[sb] */
78464 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78465 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_SB_relative_HI
, { 0x774e0000 }
78467 /* add.w${G} #${Imm-32-HI},${Dsp-16-u16} */
78470 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_HI
), ',', OP (DSP_16_U16
), 0 } },
78471 & ifmt_xor16_w_imm_G_16_16_dst16_16_16_absolute_HI
, { 0x774f0000 }
78473 /* add.b${G} #${Imm-16-QI},$Dst16RnQI */
78476 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16RNQI
), 0 } },
78477 & ifmt_xor16_b_imm_G_basic_dst16_Rn_direct_QI
, { 0x764000 }
78479 /* add.b${G} #${Imm-16-QI},$Dst16AnQI */
78482 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', OP (DST16ANQI
), 0 } },
78483 & ifmt_xor16_b_imm_G_basic_dst16_An_direct_QI
, { 0x764400 }
78485 /* add.b${G} #${Imm-16-QI},[$Dst16An] */
78488 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', '[', OP (DST16AN
), ']', 0 } },
78489 & ifmt_xor16_b_imm_G_basic_dst16_An_indirect_QI
, { 0x764600 }
78491 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[$Dst16An] */
78494 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78495 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_An_relative_QI
, { 0x76480000 }
78497 /* add.b${G} #${Imm-24-QI},${Dsp-16-u8}[sb] */
78500 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78501 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_SB_relative_QI
, { 0x764a0000 }
78503 /* add.b${G} #${Imm-24-QI},${Dsp-16-s8}[fb] */
78506 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78507 & ifmt_xor16_b_imm_G_16_8_dst16_16_8_FB_relative_QI
, { 0x764b0000 }
78509 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[$Dst16An] */
78512 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78513 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_An_relative_QI
, { 0x764c0000 }
78515 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16}[sb] */
78518 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78519 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_SB_relative_QI
, { 0x764e0000 }
78521 /* add.b${G} #${Imm-32-QI},${Dsp-16-u16} */
78524 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
78525 & ifmt_xor16_b_imm_G_16_16_dst16_16_16_absolute_QI
, { 0x764f0000 }
78527 /* add.l${G} #${Imm-16-SI},$Dst32RnUnprefixedSI */
78530 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32RNUNPREFIXEDSI
), 0 } },
78531 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_Rn_direct_Unprefixed_SI
, { 0x88310000 }
78533 /* add.l${G} #${Imm-16-SI},$Dst32AnUnprefixedSI */
78536 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', OP (DST32ANUNPREFIXEDSI
), 0 } },
78537 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_direct_Unprefixed_SI
, { 0x80b10000 }
78539 /* add.l${G} #${Imm-16-SI},[$Dst32AnUnprefixed] */
78542 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_SI
), ',', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78543 & ifmt_mov32_l_imm_G_basic_Unprefixed_dst32_An_indirect_Unprefixed_SI
, { 0x80310000 }
78545 /* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[$Dst32AnUnprefixed] */
78548 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78549 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_An_relative_Unprefixed_SI
, { 0x82310000 }
78551 /* add.l${G} #${Imm-24-SI},${Dsp-16-u8}[sb] */
78554 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78555 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_SB_relative_Unprefixed_SI
, { 0x82b10000 }
78557 /* add.l${G} #${Imm-24-SI},${Dsp-16-s8}[fb] */
78560 { { MNEM
, OP (G
), ' ', '#', OP (IMM_24_SI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78561 & ifmt_mov32_l_imm_G_16_8_Unprefixed_dst32_16_8_FB_relative_Unprefixed_SI
, { 0x82f10000 }
78563 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[$Dst32AnUnprefixed] */
78566 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78567 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_An_relative_Unprefixed_SI
, { 0x84310000 }
78569 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16}[sb] */
78572 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78573 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_SB_relative_Unprefixed_SI
, { 0x84b10000 }
78575 /* add.l${G} #${Imm-32-SI},${Dsp-16-s16}[fb] */
78578 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78579 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_FB_relative_Unprefixed_SI
, { 0x84f10000 }
78581 /* add.l${G} #${Imm-32-SI},${Dsp-16-u16} */
78584 { { MNEM
, OP (G
), ' ', '#', OP (IMM_32_SI
), ',', OP (DSP_16_U16
), 0 } },
78585 & ifmt_mov32_l_imm_G_16_16_Unprefixed_dst32_16_16_absolute_Unprefixed_SI
, { 0x86f10000 }
78587 /* add.l${G} #${Imm-40-SI},${Dsp-16-u24}[$Dst32AnUnprefixed] */
78590 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78591 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_An_relative_Unprefixed_SI
, { 0x86310000 }
78593 /* add.l${G} #${Imm-40-SI},${Dsp-16-u24} */
78596 { { MNEM
, OP (G
), ' ', '#', OP (IMM_40_SI
), ',', OP (DSP_16_U24
), 0 } },
78597 & ifmt_mov32_l_imm_G_16_24_Unprefixed_dst32_16_24_absolute_Unprefixed_SI
, { 0x86b10000 }
78599 /* adcf.w $Dst32RnUnprefixedHI */
78602 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
78603 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xb91e }
78605 /* adcf.w $Dst32AnUnprefixedHI */
78608 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
78609 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xb19e }
78611 /* adcf.w [$Dst32AnUnprefixed] */
78614 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78615 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xb11e }
78617 /* adcf.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78620 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78621 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xb31e00 }
78623 /* adcf.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78626 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78627 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xb51e0000 }
78629 /* adcf.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78632 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78633 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xb71e0000 }
78635 /* adcf.w ${Dsp-16-u8}[sb] */
78638 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78639 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xb39e00 }
78641 /* adcf.w ${Dsp-16-u16}[sb] */
78644 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78645 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xb59e0000 }
78647 /* adcf.w ${Dsp-16-s8}[fb] */
78650 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78651 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xb3de00 }
78653 /* adcf.w ${Dsp-16-s16}[fb] */
78656 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78657 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xb5de0000 }
78659 /* adcf.w ${Dsp-16-u16} */
78662 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78663 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xb7de0000 }
78665 /* adcf.w ${Dsp-16-u24} */
78668 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78669 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xb79e0000 }
78671 /* adcf.b $Dst32RnUnprefixedQI */
78674 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
78675 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xb81e }
78677 /* adcf.b $Dst32AnUnprefixedQI */
78680 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
78681 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xb09e }
78683 /* adcf.b [$Dst32AnUnprefixed] */
78686 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78687 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xb01e }
78689 /* adcf.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78692 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78693 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xb21e00 }
78695 /* adcf.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78698 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78699 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xb41e0000 }
78701 /* adcf.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78704 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78705 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xb61e0000 }
78707 /* adcf.b ${Dsp-16-u8}[sb] */
78710 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78711 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xb29e00 }
78713 /* adcf.b ${Dsp-16-u16}[sb] */
78716 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78717 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xb49e0000 }
78719 /* adcf.b ${Dsp-16-s8}[fb] */
78722 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78723 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xb2de00 }
78725 /* adcf.b ${Dsp-16-s16}[fb] */
78728 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78729 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xb4de0000 }
78731 /* adcf.b ${Dsp-16-u16} */
78734 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78735 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xb6de0000 }
78737 /* adcf.b ${Dsp-16-u24} */
78740 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78741 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xb69e0000 }
78743 /* adcf.w $Dst16RnHI */
78746 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
78747 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77e0 }
78749 /* adcf.w $Dst16AnHI */
78752 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
78753 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77e4 }
78755 /* adcf.w [$Dst16An] */
78758 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
78759 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77e6 }
78761 /* adcf.w ${Dsp-16-u8}[$Dst16An] */
78764 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78765 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77e800 }
78767 /* adcf.w ${Dsp-16-u16}[$Dst16An] */
78770 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78771 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77ec0000 }
78773 /* adcf.w ${Dsp-16-u8}[sb] */
78776 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78777 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77ea00 }
78779 /* adcf.w ${Dsp-16-u16}[sb] */
78782 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78783 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77ee0000 }
78785 /* adcf.w ${Dsp-16-s8}[fb] */
78788 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78789 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77eb00 }
78791 /* adcf.w ${Dsp-16-u16} */
78794 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78795 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77ef0000 }
78797 /* adcf.b $Dst16RnQI */
78800 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
78801 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76e0 }
78803 /* adcf.b $Dst16AnQI */
78806 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
78807 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76e4 }
78809 /* adcf.b [$Dst16An] */
78812 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
78813 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76e6 }
78815 /* adcf.b ${Dsp-16-u8}[$Dst16An] */
78818 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
78819 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76e800 }
78821 /* adcf.b ${Dsp-16-u16}[$Dst16An] */
78824 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
78825 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76ec0000 }
78827 /* adcf.b ${Dsp-16-u8}[sb] */
78830 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78831 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76ea00 }
78833 /* adcf.b ${Dsp-16-u16}[sb] */
78836 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78837 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76ee0000 }
78839 /* adcf.b ${Dsp-16-s8}[fb] */
78842 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78843 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76eb00 }
78845 /* adcf.b ${Dsp-16-u16} */
78848 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78849 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76ef0000 }
78851 /* abs.w $Dst32RnUnprefixedHI */
78854 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDHI
), 0 } },
78855 & ifmt_shl32_w_dst_dst32_Rn_direct_Unprefixed_HI
, { 0xa91f }
78857 /* abs.w $Dst32AnUnprefixedHI */
78860 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDHI
), 0 } },
78861 & ifmt_exts32_b_16_ExtUnprefixed_dst32_An_direct_Unprefixed_HI
, { 0xa19f }
78863 /* abs.w [$Dst32AnUnprefixed] */
78866 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78867 & ifmt_shl32_w_dst_dst32_An_indirect_Unprefixed_HI
, { 0xa11f }
78869 /* abs.w ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78872 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78873 & ifmt_shl32_w_dst_dst32_16_8_An_relative_Unprefixed_HI
, { 0xa31f00 }
78875 /* abs.w ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78878 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78879 & ifmt_shl32_w_dst_dst32_16_16_An_relative_Unprefixed_HI
, { 0xa51f0000 }
78881 /* abs.w ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78884 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78885 & ifmt_shl32_w_dst_dst32_16_24_An_relative_Unprefixed_HI
, { 0xa71f0000 }
78887 /* abs.w ${Dsp-16-u8}[sb] */
78890 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78891 & ifmt_shl32_w_dst_dst32_16_8_SB_relative_Unprefixed_HI
, { 0xa39f00 }
78893 /* abs.w ${Dsp-16-u16}[sb] */
78896 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78897 & ifmt_shl32_w_dst_dst32_16_16_SB_relative_Unprefixed_HI
, { 0xa59f0000 }
78899 /* abs.w ${Dsp-16-s8}[fb] */
78902 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78903 & ifmt_shl32_w_dst_dst32_16_8_FB_relative_Unprefixed_HI
, { 0xa3df00 }
78905 /* abs.w ${Dsp-16-s16}[fb] */
78908 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78909 & ifmt_shl32_w_dst_dst32_16_16_FB_relative_Unprefixed_HI
, { 0xa5df0000 }
78911 /* abs.w ${Dsp-16-u16} */
78914 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78915 & ifmt_shl32_w_dst_dst32_16_16_absolute_Unprefixed_HI
, { 0xa7df0000 }
78917 /* abs.w ${Dsp-16-u24} */
78920 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78921 & ifmt_shl32_w_dst_dst32_16_24_absolute_Unprefixed_HI
, { 0xa79f0000 }
78923 /* abs.b $Dst32RnUnprefixedQI */
78926 { { MNEM
, ' ', OP (DST32RNUNPREFIXEDQI
), 0 } },
78927 & ifmt_shl32_b_dst_dst32_Rn_direct_Unprefixed_QI
, { 0xa81f }
78929 /* abs.b $Dst32AnUnprefixedQI */
78932 { { MNEM
, ' ', OP (DST32ANUNPREFIXEDQI
), 0 } },
78933 & ifmt_shl32_b_dst_dst32_An_direct_Unprefixed_QI
, { 0xa09f }
78935 /* abs.b [$Dst32AnUnprefixed] */
78938 { { MNEM
, ' ', '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78939 & ifmt_shl32_b_dst_dst32_An_indirect_Unprefixed_QI
, { 0xa01f }
78941 /* abs.b ${Dsp-16-u8}[$Dst32AnUnprefixed] */
78944 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78945 & ifmt_shl32_b_dst_dst32_16_8_An_relative_Unprefixed_QI
, { 0xa21f00 }
78947 /* abs.b ${Dsp-16-u16}[$Dst32AnUnprefixed] */
78950 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78951 & ifmt_shl32_b_dst_dst32_16_16_An_relative_Unprefixed_QI
, { 0xa41f0000 }
78953 /* abs.b ${Dsp-16-u24}[$Dst32AnUnprefixed] */
78956 { { MNEM
, ' ', OP (DSP_16_U24
), '[', OP (DST32ANUNPREFIXED
), ']', 0 } },
78957 & ifmt_shl32_b_dst_dst32_16_24_An_relative_Unprefixed_QI
, { 0xa61f0000 }
78959 /* abs.b ${Dsp-16-u8}[sb] */
78962 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
78963 & ifmt_shl32_b_dst_dst32_16_8_SB_relative_Unprefixed_QI
, { 0xa29f00 }
78965 /* abs.b ${Dsp-16-u16}[sb] */
78968 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
78969 & ifmt_shl32_b_dst_dst32_16_16_SB_relative_Unprefixed_QI
, { 0xa49f0000 }
78971 /* abs.b ${Dsp-16-s8}[fb] */
78974 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
78975 & ifmt_shl32_b_dst_dst32_16_8_FB_relative_Unprefixed_QI
, { 0xa2df00 }
78977 /* abs.b ${Dsp-16-s16}[fb] */
78980 { { MNEM
, ' ', OP (DSP_16_S16
), '[', 'f', 'b', ']', 0 } },
78981 & ifmt_shl32_b_dst_dst32_16_16_FB_relative_Unprefixed_QI
, { 0xa4df0000 }
78983 /* abs.b ${Dsp-16-u16} */
78986 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
78987 & ifmt_shl32_b_dst_dst32_16_16_absolute_Unprefixed_QI
, { 0xa6df0000 }
78989 /* abs.b ${Dsp-16-u24} */
78992 { { MNEM
, ' ', OP (DSP_16_U24
), 0 } },
78993 & ifmt_shl32_b_dst_dst32_16_24_absolute_Unprefixed_QI
, { 0xa69f0000 }
78995 /* abs.w $Dst16RnHI */
78998 { { MNEM
, ' ', OP (DST16RNHI
), 0 } },
78999 & ifmt_rorc16_w_16_dst16_Rn_direct_HI
, { 0x77f0 }
79001 /* abs.w $Dst16AnHI */
79004 { { MNEM
, ' ', OP (DST16ANHI
), 0 } },
79005 & ifmt_rorc16_w_16_dst16_An_direct_HI
, { 0x77f4 }
79007 /* abs.w [$Dst16An] */
79010 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
79011 & ifmt_rorc16_w_16_dst16_An_indirect_HI
, { 0x77f6 }
79013 /* abs.w ${Dsp-16-u8}[$Dst16An] */
79016 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
79017 & ifmt_rorc16_w_16_dst16_16_8_An_relative_HI
, { 0x77f800 }
79019 /* abs.w ${Dsp-16-u16}[$Dst16An] */
79022 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
79023 & ifmt_rorc16_w_16_dst16_16_16_An_relative_HI
, { 0x77fc0000 }
79025 /* abs.w ${Dsp-16-u8}[sb] */
79028 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79029 & ifmt_rorc16_w_16_dst16_16_8_SB_relative_HI
, { 0x77fa00 }
79031 /* abs.w ${Dsp-16-u16}[sb] */
79034 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
79035 & ifmt_rorc16_w_16_dst16_16_16_SB_relative_HI
, { 0x77fe0000 }
79037 /* abs.w ${Dsp-16-s8}[fb] */
79040 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79041 & ifmt_rorc16_w_16_dst16_16_8_FB_relative_HI
, { 0x77fb00 }
79043 /* abs.w ${Dsp-16-u16} */
79046 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
79047 & ifmt_rorc16_w_16_dst16_16_16_absolute_HI
, { 0x77ff0000 }
79049 /* abs.b $Dst16RnQI */
79052 { { MNEM
, ' ', OP (DST16RNQI
), 0 } },
79053 & ifmt_rorc16_b_16_dst16_Rn_direct_QI
, { 0x76f0 }
79055 /* abs.b $Dst16AnQI */
79058 { { MNEM
, ' ', OP (DST16ANQI
), 0 } },
79059 & ifmt_rorc16_b_16_dst16_An_direct_QI
, { 0x76f4 }
79061 /* abs.b [$Dst16An] */
79064 { { MNEM
, ' ', '[', OP (DST16AN
), ']', 0 } },
79065 & ifmt_rorc16_b_16_dst16_An_indirect_QI
, { 0x76f6 }
79067 /* abs.b ${Dsp-16-u8}[$Dst16An] */
79070 { { MNEM
, ' ', OP (DSP_16_U8
), '[', OP (DST16AN
), ']', 0 } },
79071 & ifmt_rorc16_b_16_dst16_16_8_An_relative_QI
, { 0x76f800 }
79073 /* abs.b ${Dsp-16-u16}[$Dst16An] */
79076 { { MNEM
, ' ', OP (DSP_16_U16
), '[', OP (DST16AN
), ']', 0 } },
79077 & ifmt_rorc16_b_16_dst16_16_16_An_relative_QI
, { 0x76fc0000 }
79079 /* abs.b ${Dsp-16-u8}[sb] */
79082 { { MNEM
, ' ', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
79083 & ifmt_rorc16_b_16_dst16_16_8_SB_relative_QI
, { 0x76fa00 }
79085 /* abs.b ${Dsp-16-u16}[sb] */
79088 { { MNEM
, ' ', OP (DSP_16_U16
), '[', 's', 'b', ']', 0 } },
79089 & ifmt_rorc16_b_16_dst16_16_16_SB_relative_QI
, { 0x76fe0000 }
79091 /* abs.b ${Dsp-16-s8}[fb] */
79094 { { MNEM
, ' ', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
79095 & ifmt_rorc16_b_16_dst16_16_8_FB_relative_QI
, { 0x76fb00 }
79097 /* abs.b ${Dsp-16-u16} */
79100 { { MNEM
, ' ', OP (DSP_16_U16
), 0 } },
79101 & ifmt_rorc16_b_16_dst16_16_16_absolute_QI
, { 0x76ff0000 }
79103 /* add.w$Q #${Imm-12-s4},sp */
79106 { { MNEM
, OP (Q
), ' ', '#', OP (IMM_12_S4
), ',', 's', 'p', 0 } },
79107 & ifmt_add16_wQ_sp
, { 0x7db0 }
79109 /* add.b$G #${Imm-16-QI},sp */
79112 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), ',', 's', 'p', 0 } },
79113 & ifmt_add16_b_G_sp
, { 0x7ceb00 }
79115 /* add.w$G #${Imm-16-HI},sp */
79118 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', 's', 'p', 0 } },
79119 & ifmt_add16_w_G_sp
, { 0x7deb0000 }
79121 /* add.l$Q #${Imm3-S},sp */
79124 { { MNEM
, OP (Q
), ' ', '#', OP (IMM3_S
), ',', 's', 'p', 0 } },
79125 & ifmt_add32_l_imm3_Q
, { 0x42 }
79127 /* add.l$S #${Imm-16-QI},sp */
79130 { { MNEM
, OP (S
), ' ', '#', OP (IMM_16_QI
), ',', 's', 'p', 0 } },
79131 & ifmt_add32_l_imm8_S
, { 0xb60300 }
79133 /* add.l$G #${Imm-16-HI},sp */
79136 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), ',', 's', 'p', 0 } },
79137 & ifmt_add32_l_imm16_G
, { 0xb6130000 }
79139 /* dadc.b #${Imm-16-QI},r0l */
79142 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79143 & ifmt_add32_l_imm8_S
, { 0x7cee00 }
79145 /* dadc.w #${Imm-16-HI},r0 */
79148 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79149 & ifmt_add32_l_imm16_G
, { 0x7dee0000 }
79151 /* dadc.b r0h,r0l */
79154 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79155 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce6 }
79160 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79161 & ifmt_dadc16_b_r0h_r0l
, { 0x7de6 }
79163 /* dadd.b #${Imm-16-QI},r0l */
79166 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79167 & ifmt_add32_l_imm8_S
, { 0x7cec00 }
79169 /* dadd.w #${Imm-16-HI},r0 */
79172 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79173 & ifmt_add32_l_imm16_G
, { 0x7dec0000 }
79175 /* dadd.b r0h,r0l */
79178 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79179 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce4 }
79184 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79185 & ifmt_dadc16_b_r0h_r0l
, { 0x7de4 }
79190 { { MNEM
, OP (COND16C
), ' ', 'c', 0 } },
79191 & ifmt_bm16_c
, { 0x7dd0 }
79196 { { MNEM
, OP (COND32
), ' ', 'c', 0 } },
79197 & ifmt_bm32_c
, { 0xd928 }
79203 & ifmt_brk16
, { 0x0 }
79209 & ifmt_brk16
, { 0x0 }
79215 & ifmt_brk16
, { 0x8 }
79217 /* btst:s ${Bit3-S},${Dsp-8-u16} */
79220 { { MNEM
, ' ', OP (BIT3_S
), ',', OP (DSP_8_U16
), 0 } },
79221 & ifmt_btst_s
, { 0xa0000 }
79223 /* dec.w ${Dst16An-S} */
79226 { { MNEM
, ' ', OP (DST16AN_S
), 0 } },
79227 & ifmt_dec16_w
, { 0xf2 }
79229 /* div.b #${Imm-16-QI} */
79232 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79233 & ifmt_add16_b_G_sp
, { 0x7ce100 }
79235 /* div.w #${Imm-16-HI} */
79238 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79239 & ifmt_add16_w_G_sp
, { 0x7de10000 }
79241 /* div.b #${Imm-16-QI} */
79244 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79245 & ifmt_div32_b_Imm_16_QI
, { 0xb04300 }
79247 /* div.w #${Imm-16-HI} */
79250 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79251 & ifmt_div32_w_Imm_16_HI
, { 0xb0530000 }
79253 /* divu.b #${Imm-16-QI} */
79256 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79257 & ifmt_add16_b_G_sp
, { 0x7ce000 }
79259 /* divu.w #${Imm-16-HI} */
79262 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79263 & ifmt_add16_w_G_sp
, { 0x7de00000 }
79265 /* divu.b #${Imm-16-QI} */
79268 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79269 & ifmt_div32_b_Imm_16_QI
, { 0xb00300 }
79271 /* divu.w #${Imm-16-HI} */
79274 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79275 & ifmt_div32_w_Imm_16_HI
, { 0xb0130000 }
79277 /* divx.b #${Imm-16-QI} */
79280 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79281 & ifmt_add16_b_G_sp
, { 0x7ce300 }
79283 /* divx.w #${Imm-16-HI} */
79286 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79287 & ifmt_add16_w_G_sp
, { 0x7de30000 }
79289 /* divx.b #${Imm-16-QI} */
79292 { { MNEM
, ' ', '#', OP (IMM_16_QI
), 0 } },
79293 & ifmt_div32_b_Imm_16_QI
, { 0xb24300 }
79295 /* divx.w #${Imm-16-HI} */
79298 { { MNEM
, ' ', '#', OP (IMM_16_HI
), 0 } },
79299 & ifmt_div32_w_Imm_16_HI
, { 0xb2530000 }
79301 /* dsbb.b #${Imm-16-QI},r0l */
79304 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79305 & ifmt_add32_l_imm8_S
, { 0x7cef00 }
79307 /* dsbb.w #${Imm-16-HI},r0 */
79310 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79311 & ifmt_add32_l_imm16_G
, { 0x7def0000 }
79313 /* dsbb.b r0h,r0l */
79316 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79317 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce7 }
79322 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79323 & ifmt_dadc16_b_r0h_r0l
, { 0x7de7 }
79325 /* dsub.b #${Imm-16-QI},r0l */
79328 { { MNEM
, ' ', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79329 & ifmt_add32_l_imm8_S
, { 0x7ced00 }
79331 /* dsub.w #${Imm-16-HI},r0 */
79334 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', 'r', '0', 0 } },
79335 & ifmt_add32_l_imm16_G
, { 0x7ded0000 }
79337 /* dsub.b r0h,r0l */
79340 { { MNEM
, ' ', 'r', '0', 'h', ',', 'r', '0', 'l', 0 } },
79341 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce5 }
79346 { { MNEM
, ' ', 'r', '1', ',', 'r', '0', 0 } },
79347 & ifmt_dadc16_b_r0h_r0l
, { 0x7de5 }
79349 /* enter #${Dsp-16-u8} */
79352 { { MNEM
, ' ', '#', OP (DSP_16_U8
), 0 } },
79353 & ifmt_enter16
, { 0x7cf200 }
79359 & ifmt_dadc16_b_r0h_r0l
, { 0x7df2 }
79361 /* enter #${Dsp-8-u8} */
79364 { { MNEM
, ' ', '#', OP (DSP_8_U8
), 0 } },
79365 & ifmt_enter32
, { 0xec00 }
79371 & ifmt_brk16
, { 0xfc }
79373 /* fclr ${flags16} */
79376 { { MNEM
, ' ', OP (FLAGS16
), 0 } },
79377 & ifmt_fclr16
, { 0xeb05 }
79379 /* fset ${flags16} */
79382 { { MNEM
, ' ', OP (FLAGS16
), 0 } },
79383 & ifmt_fclr16
, { 0xeb04 }
79385 /* fclr ${flags32} */
79388 { { MNEM
, ' ', OP (FLAGS32
), 0 } },
79389 & ifmt_fclr
, { 0xd3e8 }
79391 /* fset ${flags32} */
79394 { { MNEM
, ' ', OP (FLAGS32
), 0 } },
79395 & ifmt_fclr
, { 0xd1e8 }
79397 /* inc.w ${Dst16An-S} */
79400 { { MNEM
, ' ', OP (DST16AN_S
), 0 } },
79401 & ifmt_dec16_w
, { 0xb2 }
79407 & ifmt_brk16
, { 0x9f }
79409 /* int #${Dsp-10-u6} */
79412 { { MNEM
, ' ', '#', OP (DSP_10_U6
), 0 } },
79413 & ifmt_int16
, { 0xebc0 }
79419 & ifmt_brk16
, { 0xf6 }
79421 /* int #${Dsp-8-u6} */
79424 { { MNEM
, ' ', '#', OP (DSP_8_U6
), 0 } },
79425 & ifmt_int32
, { 0xbe00 }
79431 & ifmt_brk16
, { 0xbf }
79433 /* j$cond16j5 ${Lab-8-8} */
79436 { { MNEM
, OP (COND16J5
), ' ', OP (LAB_8_8
), 0 } },
79437 & ifmt_jcnd16_5
, { 0x6800 }
79439 /* j$cond16j ${Lab-16-8} */
79442 { { MNEM
, OP (COND16J
), ' ', OP (LAB_16_8
), 0 } },
79443 & ifmt_jcnd16
, { 0x7dc000 }
79445 /* j$cond32j ${Lab-8-8} */
79448 { { MNEM
, OP (COND32J
), ' ', OP (LAB_8_8
), 0 } },
79449 & ifmt_jcnd32
, { 0x8a00 }
79451 /* jmp.s ${Lab-5-3} */
79454 { { MNEM
, ' ', OP (LAB_5_3
), 0 } },
79455 & ifmt_jmp16_s
, { 0x60 }
79457 /* jmp.b ${Lab-8-8} */
79460 { { MNEM
, ' ', OP (LAB_8_8
), 0 } },
79461 & ifmt_jmp16_b
, { 0xfe00 }
79463 /* jmp.w ${Lab-8-16} */
79466 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79467 & ifmt_jmp16_w
, { 0xf40000 }
79469 /* jmp.a ${Lab-8-24} */
79472 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79473 & ifmt_jmp16_a
, { 0xfc000000 }
79475 /* jmps #${Imm-8-QI} */
79478 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79479 & ifmt_jmps16
, { 0xee00 }
79481 /* jmp.s ${Lab32-jmp-s} */
79484 { { MNEM
, ' ', OP (LAB32_JMP_S
), 0 } },
79485 & ifmt_jmp32_s
, { 0x4a }
79487 /* jmp.b ${Lab-8-8} */
79490 { { MNEM
, ' ', OP (LAB_8_8
), 0 } },
79491 & ifmt_jmp16_b
, { 0xbb00 }
79493 /* jmp.w ${Lab-8-16} */
79496 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79497 & ifmt_jmp16_w
, { 0xce0000 }
79499 /* jmp.a ${Lab-8-24} */
79502 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79503 & ifmt_jmp16_a
, { 0xcc000000 }
79505 /* jmps #${Imm-8-QI} */
79508 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79509 & ifmt_jmps16
, { 0xdc00 }
79511 /* jsr.w ${Lab-8-16} */
79514 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79515 & ifmt_jmp16_w
, { 0xf50000 }
79517 /* jsr.a ${Lab-8-24} */
79520 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79521 & ifmt_jmp16_a
, { 0xfd000000 }
79523 /* jsr.w ${Lab-8-16} */
79526 { { MNEM
, ' ', OP (LAB_8_16
), 0 } },
79527 & ifmt_jmp16_w
, { 0xcf0000 }
79529 /* jsr.a ${Lab-8-24} */
79532 { { MNEM
, ' ', OP (LAB_8_24
), 0 } },
79533 & ifmt_jmp16_a
, { 0xcd000000 }
79535 /* jsrs #${Imm-8-QI} */
79538 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79539 & ifmt_jmps16
, { 0xef00 }
79541 /* jsrs #${Imm-8-QI} */
79544 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79545 & ifmt_jmps16
, { 0xdd00 }
79547 /* ldc #${Imm-16-HI},${cr16} */
79550 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', OP (CR16
), 0 } },
79551 & ifmt_ldc16_imm16
, { 0xeb000000 }
79553 /* ldc #${Imm-16-HI},${cr1-Unprefixed-32} */
79556 { { MNEM
, ' ', '#', OP (IMM_16_HI
), ',', OP (CR1_UNPREFIXED_32
), 0 } },
79557 & ifmt_ldc32_imm16_cr1
, { 0xd5a80000 }
79559 /* ldc #${Dsp-16-u24},${cr2-32} */
79562 { { MNEM
, ' ', '#', OP (DSP_16_U24
), ',', OP (CR2_32
), 0 } },
79563 & ifmt_ldc32_imm16_cr2
, { 0xd5280000 }
79565 /* ldc #${Dsp-16-u24},${cr3-Unprefixed-32} */
79568 { { MNEM
, ' ', '#', OP (DSP_16_U24
), ',', OP (CR3_UNPREFIXED_32
), 0 } },
79569 & ifmt_ldc32_imm16_cr3
, { 0xd5680000 }
79571 /* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
79574 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79575 & ifmt_ldctx16
, { 0x7cf00000 }
79577 /* ldctx ${Dsp-16-u16},${Dsp-32-u24} */
79580 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79581 & ifmt_ldctx16
, { 0xb6c30000 }
79583 /* stctx ${Dsp-16-u16},${Dsp-32-u24} */
79586 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79587 & ifmt_ldctx16
, { 0x7df00000 }
79589 /* stctx ${Dsp-16-u16},${Dsp-32-u24} */
79592 { { MNEM
, ' ', OP (DSP_16_U16
), ',', OP (DSP_32_U24
), 0 } },
79593 & ifmt_ldctx16
, { 0xb6d30000 }
79595 /* ldipl #${Imm-13-u3} */
79598 { { MNEM
, ' ', '#', OP (IMM_13_U3
), 0 } },
79599 & ifmt_ldipl16_imm
, { 0x7da0 }
79601 /* ldipl #${Imm-13-u3} */
79604 { { MNEM
, ' ', '#', OP (IMM_13_U3
), 0 } },
79605 & ifmt_ldipl16_imm
, { 0xd5e8 }
79607 /* mov.b$S #${Imm-8-QI},a0 */
79610 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'a', '0', 0 } },
79611 & ifmt_jmps16
, { 0xe200 }
79613 /* mov.b$S #${Imm-8-QI},a1 */
79616 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_QI
), ',', 'a', '1', 0 } },
79617 & ifmt_jmps16
, { 0xea00 }
79619 /* mov.w$S #${Imm-8-HI},a0 */
79622 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '0', 0 } },
79623 & ifmt_mov16_w_S_imm_a0
, { 0xa20000 }
79625 /* mov.w$S #${Imm-8-HI},a1 */
79628 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '1', 0 } },
79629 & ifmt_mov16_w_S_imm_a0
, { 0xaa0000 }
79631 /* mov.w$S #${Imm-8-HI},a0 */
79634 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '0', 0 } },
79635 & ifmt_mov16_w_S_imm_a0
, { 0x9c0000 }
79637 /* mov.w$S #${Imm-8-HI},a1 */
79640 { { MNEM
, OP (S
), ' ', '#', OP (IMM_8_HI
), ',', 'a', '1', 0 } },
79641 & ifmt_mov16_w_S_imm_a0
, { 0x9d0000 }
79643 /* mov.l$S #${Dsp-8-s24},a0 */
79646 { { MNEM
, OP (S
), ' ', '#', OP (DSP_8_S24
), ',', 'a', '0', 0 } },
79647 & ifmt_mov32_l_a0
, { 0xbc000000 }
79649 /* mov.l$S #${Dsp-8-s24},a1 */
79652 { { MNEM
, OP (S
), ' ', '#', OP (DSP_8_S24
), ',', 'a', '1', 0 } },
79653 & ifmt_mov32_l_a0
, { 0xbd000000 }
79655 /* mov.b$S r0l,a1 */
79658 { { MNEM
, OP (S
), ' ', 'r', '0', 'l', ',', 'a', '1', 0 } },
79659 & ifmt_brk16
, { 0x34 }
79661 /* mov.b$S r0h,a0 */
79664 { { MNEM
, OP (S
), ' ', 'r', '0', 'h', ',', 'a', '0', 0 } },
79665 & ifmt_brk16
, { 0x30 }
79671 & ifmt_brk16
, { 0x4 }
79677 & ifmt_brk16
, { 0xde }
79682 { { MNEM
, ' ', OP (CR16
), 0 } },
79683 & ifmt_popc16_imm16
, { 0xeb03 }
79685 /* popc ${cr1-Unprefixed-32} */
79688 { { MNEM
, ' ', OP (CR1_UNPREFIXED_32
), 0 } },
79689 & ifmt_popc32_imm16_cr1
, { 0xd3a8 }
79691 /* popc ${cr2-32} */
79694 { { MNEM
, ' ', OP (CR2_32
), 0 } },
79695 & ifmt_popc32_imm16_cr2
, { 0xd328 }
79697 /* pushc ${cr16} */
79700 { { MNEM
, ' ', OP (CR16
), 0 } },
79701 & ifmt_popc16_imm16
, { 0xeb02 }
79703 /* pushc ${cr1-Unprefixed-32} */
79706 { { MNEM
, ' ', OP (CR1_UNPREFIXED_32
), 0 } },
79707 & ifmt_popc32_imm16_cr1
, { 0xd1a8 }
79709 /* pushc ${cr2-32} */
79712 { { MNEM
, ' ', OP (CR2_32
), 0 } },
79713 & ifmt_popc32_imm16_cr2
, { 0xd128 }
79715 /* popm ${Regsetpop} */
79718 { { MNEM
, ' ', OP (REGSETPOP
), 0 } },
79719 & ifmt_popm16
, { 0xed00 }
79721 /* pushm ${Regsetpush} */
79724 { { MNEM
, ' ', OP (REGSETPUSH
), 0 } },
79725 & ifmt_pushm16
, { 0xec00 }
79727 /* popm ${Regsetpop} */
79730 { { MNEM
, ' ', OP (REGSETPOP
), 0 } },
79731 & ifmt_popm16
, { 0x8e00 }
79733 /* pushm ${Regsetpush} */
79736 { { MNEM
, ' ', OP (REGSETPUSH
), 0 } },
79737 & ifmt_pushm16
, { 0x8f00 }
79739 /* push.b$G #${Imm-16-QI} */
79742 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_QI
), 0 } },
79743 & ifmt_add32_l_imm8_S
, { 0x7ce200 }
79745 /* push.w$G #${Imm-16-HI} */
79748 { { MNEM
, OP (G
), ' ', '#', OP (IMM_16_HI
), 0 } },
79749 & ifmt_add32_l_imm16_G
, { 0x7de20000 }
79751 /* push.b #${Imm-8-QI} */
79754 { { MNEM
, ' ', '#', OP (IMM_8_QI
), 0 } },
79755 & ifmt_jmps16
, { 0xae00 }
79757 /* push.w #${Imm-8-HI} */
79760 { { MNEM
, ' ', '#', OP (IMM_8_HI
), 0 } },
79761 & ifmt_mov16_w_S_imm_a0
, { 0xaf0000 }
79763 /* push.l #${Imm-16-SI} */
79766 { { MNEM
, ' ', '#', OP (IMM_16_SI
), 0 } },
79767 & ifmt_push32_l_imm
, { 0xb6530000 }
79773 & ifmt_brk16
, { 0xfb }
79779 & ifmt_brk16
, { 0x9e }
79785 & ifmt_dadc16_b_r0h_r0l
, { 0x7cf1 }
79791 & ifmt_dadc16_b_r0h_r0l
, { 0x7df1 }
79797 & ifmt_dadc16_b_r0h_r0l
, { 0xb843 }
79803 & ifmt_dadc16_b_r0h_r0l
, { 0xb853 }
79809 & ifmt_brk16
, { 0xf3 }
79815 & ifmt_brk16
, { 0xdf }
79821 & ifmt_dadc16_b_r0h_r0l
, { 0xb8c3 }
79827 & ifmt_dadc16_b_r0h_r0l
, { 0xb8d3 }
79829 /* sha.l #${Imm-sh-12-s4},r2r0 */
79832 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '2', 'r', '0', 0 } },
79833 & ifmt_sha16_L_imm_r2r0
, { 0xeba0 }
79835 /* sha.l #${Imm-sh-12-s4},r3r1 */
79838 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '3', 'r', '1', 0 } },
79839 & ifmt_sha16_L_imm_r2r0
, { 0xebb0 }
79841 /* sha.l r1h,r2r0 */
79844 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '2', 'r', '0', 0 } },
79845 & ifmt_dadc16_b_r0h_r0l
, { 0xeb21 }
79847 /* sha.l r1h,r3r1 */
79850 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '3', 'r', '1', 0 } },
79851 & ifmt_dadc16_b_r0h_r0l
, { 0xeb31 }
79853 /* shl.l #${Imm-sh-12-s4},r2r0 */
79856 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '2', 'r', '0', 0 } },
79857 & ifmt_sha16_L_imm_r2r0
, { 0xeb80 }
79859 /* shl.l #${Imm-sh-12-s4},r3r1 */
79862 { { MNEM
, ' ', '#', OP (IMM_SH_12_S4
), ',', 'r', '3', 'r', '1', 0 } },
79863 & ifmt_sha16_L_imm_r2r0
, { 0xeb90 }
79865 /* shl.l r1h,r2r0 */
79868 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '2', 'r', '0', 0 } },
79869 & ifmt_dadc16_b_r0h_r0l
, { 0xeb01 }
79871 /* shl.l r1h,r3r1 */
79874 { { MNEM
, ' ', 'r', '1', 'h', ',', 'r', '3', 'r', '1', 0 } },
79875 & ifmt_dadc16_b_r0h_r0l
, { 0xeb11 }
79881 & ifmt_dadc16_b_r0h_r0l
, { 0xb283 }
79887 & ifmt_dadc16_b_r0h_r0l
, { 0xb293 }
79893 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce9 }
79899 & ifmt_dadc16_b_r0h_r0l
, { 0x7de9 }
79905 & ifmt_dadc16_b_r0h_r0l
, { 0xb683 }
79911 & ifmt_dadc16_b_r0h_r0l
, { 0xb693 }
79917 & ifmt_dadc16_b_r0h_r0l
, { 0x7ce8 }
79923 & ifmt_dadc16_b_r0h_r0l
, { 0x7de8 }
79929 & ifmt_dadc16_b_r0h_r0l
, { 0xb083 }
79935 & ifmt_dadc16_b_r0h_r0l
, { 0xb093 }
79941 & ifmt_dadc16_b_r0h_r0l
, { 0xb883 }
79947 & ifmt_dadc16_b_r0h_r0l
, { 0xb893 }
79953 & ifmt_dadc16_b_r0h_r0l
, { 0xb483 }
79959 & ifmt_dadc16_b_r0h_r0l
, { 0xb493 }
79965 & ifmt_dadc16_b_r0h_r0l
, { 0x7cea }
79971 & ifmt_dadc16_b_r0h_r0l
, { 0x7dea }
79977 & ifmt_dadc16_b_r0h_r0l
, { 0xb803 }
79983 & ifmt_dadc16_b_r0h_r0l
, { 0xb813 }
79985 /* stzx #${Imm-8-QI},#${Imm-16-QI},r0h */
79988 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_16_QI
), ',', 'r', '0', 'h', 0 } },
79989 & ifmt_stzx16_imm8_imm8_r0h
, { 0xdb0000 }
79991 /* stzx #${Imm-8-QI},#${Imm-16-QI},r0l */
79994 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_16_QI
), ',', 'r', '0', 'l', 0 } },
79995 & ifmt_stzx16_imm8_imm8_r0h
, { 0xdc0000 }
79997 /* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-u8}[sb] */
80000 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DSP_16_U8
), '[', 's', 'b', ']', 0 } },
80001 & ifmt_stzx16_imm8_imm8_dsp8sb
, { 0xdd000000 }
80003 /* stzx #${Imm-8-QI},#${Imm-24-QI},${Dsp-16-s8}[fb] */
80006 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_24_QI
), ',', OP (DSP_16_S8
), '[', 'f', 'b', ']', 0 } },
80007 & ifmt_stzx16_imm8_imm8_dsp8fb
, { 0xde000000 }
80009 /* stzx #${Imm-8-QI},#${Imm-32-QI},${Dsp-16-u16} */
80012 { { MNEM
, ' ', '#', OP (IMM_8_QI
), ',', '#', OP (IMM_32_QI
), ',', OP (DSP_16_U16
), 0 } },
80013 & ifmt_stzx16_imm8_imm8_abs16
, { 0xdf000000 }
80019 & ifmt_brk16
, { 0xff }
80025 & ifmt_brk16
, { 0xff }
80031 & ifmt_dadc16_b_r0h_r0l
, { 0x7df3 }
80037 & ifmt_dadc16_b_r0h_r0l
, { 0xb203 }
80042 { { MNEM
, ' ', 'r', '0', 0 } },
80043 & ifmt_dadc16_b_r0h_r0l
, { 0x7cf3 }
80049 & ifmt_brk16
, { 0x41 }
80051 /* dest-indirect */
80055 & ifmt_brk16
, { 0x9 }
80057 /* src-dest-indirect */
80061 & ifmt_brk16
, { 0x49 }
80070 /* Formats for ALIAS macro-insns. */
80072 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80073 #define F(f) & m32c_cgen_ifld_table[M32C_##f]
80075 #define F(f) & m32c_cgen_ifld_table[M32C_/**/f]
80077 static const CGEN_IFMT ifmt_add16_bQ_sp ATTRIBUTE_UNUSED
= {
80078 16, 16, 0xfff0, { { F (F_0_4
) }, { F (F_4_4
) }, { F (F_8_4
) }, { F (F_IMM_12_S4
) }, { 0 } }
80083 /* Each non-simple macro entry points to an array of expansion possibilities. */
80085 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80086 #define A(a) (1 << CGEN_INSN_##a)
80088 #define A(a) (1 << CGEN_INSN_/**/a)
80090 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
80091 #define OPERAND(op) M32C_OPERAND_##op
80093 #define OPERAND(op) M32C_OPERAND_/**/op
80095 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
80096 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
80098 /* The macro instruction table. */
80100 static const CGEN_IBASE m32c_cgen_macro_insn_table
[] =
80102 /* add.b:q #${Imm-12-s4},sp */
80104 -1, "add16-bQ-sp", "add.b:q", 16,
80105 { 0|A(ALIAS
), { { { (1<<MACH_BASE
), 0 } }, { { 1, "\x80" } }, { { RL_TYPE_NONE
, 0 } } } }
80109 /* The macro instruction opcode table. */
80111 static const CGEN_OPCODE m32c_cgen_macro_insn_opcode_table
[] =
80113 /* add.b:q #${Imm-12-s4},sp */
80116 { { MNEM
, ' ', '#', OP (IMM_12_S4
), ',', 's', 'p', 0 } },
80117 & ifmt_add16_bQ_sp
, { 0x7db0 }
80126 #ifndef CGEN_ASM_HASH_P
80127 #define CGEN_ASM_HASH_P(insn) 1
80130 #ifndef CGEN_DIS_HASH_P
80131 #define CGEN_DIS_HASH_P(insn) 1
80134 /* Return non-zero if INSN is to be added to the hash table.
80135 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
80138 asm_hash_insn_p (insn
)
80139 const CGEN_INSN
*insn ATTRIBUTE_UNUSED
;
80141 return CGEN_ASM_HASH_P (insn
);
80145 dis_hash_insn_p (insn
)
80146 const CGEN_INSN
*insn
;
80148 /* If building the hash table and the NO-DIS attribute is present,
80150 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
80152 return CGEN_DIS_HASH_P (insn
);
80155 #ifndef CGEN_ASM_HASH
80156 #define CGEN_ASM_HASH_SIZE 127
80157 #ifdef CGEN_MNEMONIC_OPERANDS
80158 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
80160 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
80164 /* It doesn't make much sense to provide a default here,
80165 but while this is under development we do.
80166 BUFFER is a pointer to the bytes of the insn, target order.
80167 VALUE is the first base_insn_bitsize bits as an int in host order. */
80169 #ifndef CGEN_DIS_HASH
80170 #define CGEN_DIS_HASH_SIZE 256
80171 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
80174 /* The result is the hash value of the insn.
80175 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
80177 static unsigned int
80178 asm_hash_insn (mnem
)
80181 return CGEN_ASM_HASH (mnem
);
80184 /* BUF is a pointer to the bytes of the insn, target order.
80185 VALUE is the first base_insn_bitsize bits as an int in host order. */
80187 static unsigned int
80188 dis_hash_insn (buf
, value
)
80189 const char * buf ATTRIBUTE_UNUSED
;
80190 CGEN_INSN_INT value ATTRIBUTE_UNUSED
;
80192 return CGEN_DIS_HASH (buf
, value
);
80195 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
80198 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
80200 CGEN_FIELDS_BITSIZE (fields
) = size
;
80203 /* Function to call before using the operand instance table.
80204 This plugs the opcode entries and macro instructions into the cpu table. */
80207 m32c_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
80210 int num_macros
= (sizeof (m32c_cgen_macro_insn_table
) /
80211 sizeof (m32c_cgen_macro_insn_table
[0]));
80212 const CGEN_IBASE
*ib
= & m32c_cgen_macro_insn_table
[0];
80213 const CGEN_OPCODE
*oc
= & m32c_cgen_macro_insn_opcode_table
[0];
80214 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
80216 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
80217 for (i
= 0; i
< num_macros
; ++i
)
80219 insns
[i
].base
= &ib
[i
];
80220 insns
[i
].opcode
= &oc
[i
];
80221 m32c_cgen_build_insn_regex (& insns
[i
]);
80223 cd
->macro_insn_table
.init_entries
= insns
;
80224 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
80225 cd
->macro_insn_table
.num_init_entries
= num_macros
;
80227 oc
= & m32c_cgen_insn_opcode_table
[0];
80228 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
80229 for (i
= 0; i
< MAX_INSNS
; ++i
)
80231 insns
[i
].opcode
= &oc
[i
];
80232 m32c_cgen_build_insn_regex (& insns
[i
]);
80235 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
80236 cd
->set_fields_bitsize
= set_fields_bitsize
;
80238 cd
->asm_hash_p
= asm_hash_insn_p
;
80239 cd
->asm_hash
= asm_hash_insn
;
80240 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
80242 cd
->dis_hash_p
= dis_hash_insn_p
;
80243 cd
->dis_hash
= dis_hash_insn
;
80244 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;
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