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[deliverable/binutils-gdb.git] / opcodes / m32r-asm.c
1 /* Assembler interface for targets using CGEN. -*- C -*-
2 CGEN: Cpu tools GENerator
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
5 - the resultant file is machine generated, cgen-asm.in isn't
6
7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
8
9 This file is part of the GNU Binutils and GDB, the GNU debugger.
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2, or (at your option)
14 any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "bfd.h"
32 #include "symcat.h"
33 #include "m32r-desc.h"
34 #include "m32r-opc.h"
35 #include "opintl.h"
36 #include "xregex.h"
37 #include "libiberty.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 static const char * parse_insn_normal
46 (CGEN_CPU_DESC, const CGEN_INSN *, const char **, CGEN_FIELDS *);
47 \f
48 /* -- assembler routines inserted here. */
49
50 /* -- asm.c */
51 static const char * parse_hash
52 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
53 static const char * parse_hi16
54 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
55 static const char * parse_slo16
56 PARAMS ((CGEN_CPU_DESC, const char **, int, long *));
57 static const char * parse_ulo16
58 PARAMS ((CGEN_CPU_DESC, const char **, int, unsigned long *));
59
60 /* Handle '#' prefixes (i.e. skip over them). */
61
62 static const char *
63 parse_hash (cd, strp, opindex, valuep)
64 CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
65 const char **strp;
66 int opindex ATTRIBUTE_UNUSED;
67 unsigned long *valuep ATTRIBUTE_UNUSED;
68 {
69 if (**strp == '#')
70 ++*strp;
71 return NULL;
72 }
73
74 /* Handle shigh(), high(). */
75
76 static const char *
77 parse_hi16 (cd, strp, opindex, valuep)
78 CGEN_CPU_DESC cd;
79 const char **strp;
80 int opindex;
81 unsigned long *valuep;
82 {
83 const char *errmsg;
84 enum cgen_parse_operand_result result_type;
85 bfd_vma value;
86
87 if (**strp == '#')
88 ++*strp;
89
90 if (strncasecmp (*strp, "high(", 5) == 0)
91 {
92 *strp += 5;
93 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_ULO,
94 &result_type, &value);
95 if (**strp != ')')
96 return "missing `)'";
97 ++*strp;
98 if (errmsg == NULL
99 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
100 value >>= 16;
101 *valuep = value;
102 return errmsg;
103 }
104 else if (strncasecmp (*strp, "shigh(", 6) == 0)
105 {
106 *strp += 6;
107 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_HI16_SLO,
108 &result_type, &value);
109 if (**strp != ')')
110 return "missing `)'";
111 ++*strp;
112 if (errmsg == NULL
113 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
114 value = (value >> 16) + (value & 0x8000 ? 1 : 0);
115 *valuep = value;
116 return errmsg;
117 }
118
119 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
120 }
121
122 /* Handle low() in a signed context. Also handle sda().
123 The signedness of the value doesn't matter to low(), but this also
124 handles the case where low() isn't present. */
125
126 static const char *
127 parse_slo16 (cd, strp, opindex, valuep)
128 CGEN_CPU_DESC cd;
129 const char **strp;
130 int opindex;
131 long *valuep;
132 {
133 const char *errmsg;
134 enum cgen_parse_operand_result result_type;
135 bfd_vma value;
136
137 if (**strp == '#')
138 ++*strp;
139
140 if (strncasecmp (*strp, "low(", 4) == 0)
141 {
142 *strp += 4;
143 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
144 &result_type, &value);
145 if (**strp != ')')
146 return "missing `)'";
147 ++*strp;
148 if (errmsg == NULL
149 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
150 value &= 0xffff;
151 *valuep = value;
152 return errmsg;
153 }
154
155 if (strncasecmp (*strp, "sda(", 4) == 0)
156 {
157 *strp += 4;
158 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_SDA16,
159 NULL, &value);
160 if (**strp != ')')
161 return "missing `)'";
162 ++*strp;
163 *valuep = value;
164 return errmsg;
165 }
166
167 return cgen_parse_signed_integer (cd, strp, opindex, valuep);
168 }
169
170 /* Handle low() in an unsigned context.
171 The signedness of the value doesn't matter to low(), but this also
172 handles the case where low() isn't present. */
173
174 static const char *
175 parse_ulo16 (cd, strp, opindex, valuep)
176 CGEN_CPU_DESC cd;
177 const char **strp;
178 int opindex;
179 unsigned long *valuep;
180 {
181 const char *errmsg;
182 enum cgen_parse_operand_result result_type;
183 bfd_vma value;
184
185 if (**strp == '#')
186 ++*strp;
187
188 if (strncasecmp (*strp, "low(", 4) == 0)
189 {
190 *strp += 4;
191 errmsg = cgen_parse_address (cd, strp, opindex, BFD_RELOC_M32R_LO16,
192 &result_type, &value);
193 if (**strp != ')')
194 return "missing `)'";
195 ++*strp;
196 if (errmsg == NULL
197 && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER)
198 value &= 0xffff;
199 *valuep = value;
200 return errmsg;
201 }
202
203 return cgen_parse_unsigned_integer (cd, strp, opindex, valuep);
204 }
205
206 /* -- */
207
208 const char * m32r_cgen_parse_operand
209 PARAMS ((CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *));
210
211 /* Main entry point for operand parsing.
212
213 This function is basically just a big switch statement. Earlier versions
214 used tables to look up the function to use, but
215 - if the table contains both assembler and disassembler functions then
216 the disassembler contains much of the assembler and vice-versa,
217 - there's a lot of inlining possibilities as things grow,
218 - using a switch statement avoids the function call overhead.
219
220 This function could be moved into `parse_insn_normal', but keeping it
221 separate makes clear the interface between `parse_insn_normal' and each of
222 the handlers. */
223
224 const char *
225 m32r_cgen_parse_operand (cd, opindex, strp, fields)
226 CGEN_CPU_DESC cd;
227 int opindex;
228 const char ** strp;
229 CGEN_FIELDS * fields;
230 {
231 const char * errmsg = NULL;
232 /* Used by scalar operands that still need to be parsed. */
233 long junk ATTRIBUTE_UNUSED;
234
235 switch (opindex)
236 {
237 case M32R_OPERAND_ACC :
238 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_acc);
239 break;
240 case M32R_OPERAND_ACCD :
241 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accd);
242 break;
243 case M32R_OPERAND_ACCS :
244 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_h_accums, & fields->f_accs);
245 break;
246 case M32R_OPERAND_DCR :
247 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r1);
248 break;
249 case M32R_OPERAND_DISP16 :
250 {
251 bfd_vma value;
252 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP16, 0, NULL, & value);
253 fields->f_disp16 = value;
254 }
255 break;
256 case M32R_OPERAND_DISP24 :
257 {
258 bfd_vma value;
259 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP24, 0, NULL, & value);
260 fields->f_disp24 = value;
261 }
262 break;
263 case M32R_OPERAND_DISP8 :
264 {
265 bfd_vma value;
266 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_DISP8, 0, NULL, & value);
267 fields->f_disp8 = value;
268 }
269 break;
270 case M32R_OPERAND_DR :
271 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
272 break;
273 case M32R_OPERAND_HASH :
274 errmsg = parse_hash (cd, strp, M32R_OPERAND_HASH, &junk);
275 break;
276 case M32R_OPERAND_HI16 :
277 errmsg = parse_hi16 (cd, strp, M32R_OPERAND_HI16, &fields->f_hi16);
278 break;
279 case M32R_OPERAND_IMM1 :
280 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_IMM1, &fields->f_imm1);
281 break;
282 case M32R_OPERAND_SCR :
283 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_cr_names, & fields->f_r2);
284 break;
285 case M32R_OPERAND_SIMM16 :
286 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM16, &fields->f_simm16);
287 break;
288 case M32R_OPERAND_SIMM8 :
289 errmsg = cgen_parse_signed_integer (cd, strp, M32R_OPERAND_SIMM8, &fields->f_simm8);
290 break;
291 case M32R_OPERAND_SLO16 :
292 errmsg = parse_slo16 (cd, strp, M32R_OPERAND_SLO16, &fields->f_simm16);
293 break;
294 case M32R_OPERAND_SR :
295 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
296 break;
297 case M32R_OPERAND_SRC1 :
298 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r1);
299 break;
300 case M32R_OPERAND_SRC2 :
301 errmsg = cgen_parse_keyword (cd, strp, & m32r_cgen_opval_gr_names, & fields->f_r2);
302 break;
303 case M32R_OPERAND_UIMM16 :
304 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM16, &fields->f_uimm16);
305 break;
306 case M32R_OPERAND_UIMM24 :
307 {
308 bfd_vma value;
309 errmsg = cgen_parse_address (cd, strp, M32R_OPERAND_UIMM24, 0, NULL, & value);
310 fields->f_uimm24 = value;
311 }
312 break;
313 case M32R_OPERAND_UIMM4 :
314 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM4, &fields->f_uimm4);
315 break;
316 case M32R_OPERAND_UIMM5 :
317 errmsg = cgen_parse_unsigned_integer (cd, strp, M32R_OPERAND_UIMM5, &fields->f_uimm5);
318 break;
319 case M32R_OPERAND_ULO16 :
320 errmsg = parse_ulo16 (cd, strp, M32R_OPERAND_ULO16, &fields->f_uimm16);
321 break;
322
323 default :
324 /* xgettext:c-format */
325 fprintf (stderr, _("Unrecognized field %d while parsing.\n"), opindex);
326 abort ();
327 }
328
329 return errmsg;
330 }
331
332 cgen_parse_fn * const m32r_cgen_parse_handlers[] =
333 {
334 parse_insn_normal,
335 };
336
337 void
338 m32r_cgen_init_asm (cd)
339 CGEN_CPU_DESC cd;
340 {
341 m32r_cgen_init_opcode_table (cd);
342 m32r_cgen_init_ibld_table (cd);
343 cd->parse_handlers = & m32r_cgen_parse_handlers[0];
344 cd->parse_operand = m32r_cgen_parse_operand;
345 }
346
347 \f
348
349 /* Regex construction routine.
350
351 This translates an opcode syntax string into a regex string,
352 by replacing any non-character syntax element (such as an
353 opcode) with the pattern '.*'
354
355 It then compiles the regex and stores it in the opcode, for
356 later use by m32r_cgen_assemble_insn
357
358 Returns NULL for success, an error message for failure. */
359
360 char *
361 m32r_cgen_build_insn_regex (CGEN_INSN *insn)
362 {
363 CGEN_OPCODE *opc = (CGEN_OPCODE *) CGEN_INSN_OPCODE (insn);
364 const char *mnem = CGEN_INSN_MNEMONIC (insn);
365 char rxbuf[CGEN_MAX_RX_ELEMENTS];
366 char *rx = rxbuf;
367 const CGEN_SYNTAX_CHAR_TYPE *syn;
368 int reg_err;
369
370 syn = CGEN_SYNTAX_STRING (CGEN_OPCODE_SYNTAX (opc));
371
372 /* Mnemonics come first in the syntax string. */
373 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
374 return _("missing mnemonic in syntax string");
375 ++syn;
376
377 /* Generate a case sensitive regular expression that emulates case
378 insensitive matching in the "C" locale. We cannot generate a case
379 insensitive regular expression because in Turkish locales, 'i' and 'I'
380 are not equal modulo case conversion. */
381
382 /* Copy the literal mnemonic out of the insn. */
383 for (; *mnem; mnem++)
384 {
385 char c = *mnem;
386
387 if (ISALPHA (c))
388 {
389 *rx++ = '[';
390 *rx++ = TOLOWER (c);
391 *rx++ = TOUPPER (c);
392 *rx++ = ']';
393 }
394 else
395 *rx++ = c;
396 }
397
398 /* Copy any remaining literals from the syntax string into the rx. */
399 for(; * syn != 0 && rx <= rxbuf + (CGEN_MAX_RX_ELEMENTS - 7 - 4); ++syn)
400 {
401 if (CGEN_SYNTAX_CHAR_P (* syn))
402 {
403 char c = CGEN_SYNTAX_CHAR (* syn);
404
405 switch (c)
406 {
407 /* Escape any regex metacharacters in the syntax. */
408 case '.': case '[': case '\\':
409 case '*': case '^': case '$':
410
411 #ifdef CGEN_ESCAPE_EXTENDED_REGEX
412 case '?': case '{': case '}':
413 case '(': case ')': case '*':
414 case '|': case '+': case ']':
415 #endif
416 *rx++ = '\\';
417 *rx++ = c;
418 break;
419
420 default:
421 if (ISALPHA (c))
422 {
423 *rx++ = '[';
424 *rx++ = TOLOWER (c);
425 *rx++ = TOUPPER (c);
426 *rx++ = ']';
427 }
428 else
429 *rx++ = c;
430 break;
431 }
432 }
433 else
434 {
435 /* Replace non-syntax fields with globs. */
436 *rx++ = '.';
437 *rx++ = '*';
438 }
439 }
440
441 /* Trailing whitespace ok. */
442 * rx++ = '[';
443 * rx++ = ' ';
444 * rx++ = '\t';
445 * rx++ = ']';
446 * rx++ = '*';
447
448 /* But anchor it after that. */
449 * rx++ = '$';
450 * rx = '\0';
451
452 CGEN_INSN_RX (insn) = xmalloc (sizeof (regex_t));
453 reg_err = regcomp ((regex_t *) CGEN_INSN_RX (insn), rxbuf, REG_NOSUB);
454
455 if (reg_err == 0)
456 return NULL;
457 else
458 {
459 static char msg[80];
460
461 regerror (reg_err, (regex_t *) CGEN_INSN_RX (insn), msg, 80);
462 regfree ((regex_t *) CGEN_INSN_RX (insn));
463 free (CGEN_INSN_RX (insn));
464 (CGEN_INSN_RX (insn)) = NULL;
465 return msg;
466 }
467 }
468
469 \f
470 /* Default insn parser.
471
472 The syntax string is scanned and operands are parsed and stored in FIELDS.
473 Relocs are queued as we go via other callbacks.
474
475 ??? Note that this is currently an all-or-nothing parser. If we fail to
476 parse the instruction, we return 0 and the caller will start over from
477 the beginning. Backtracking will be necessary in parsing subexpressions,
478 but that can be handled there. Not handling backtracking here may get
479 expensive in the case of the m68k. Deal with later.
480
481 Returns NULL for success, an error message for failure. */
482
483 static const char *
484 parse_insn_normal (CGEN_CPU_DESC cd,
485 const CGEN_INSN *insn,
486 const char **strp,
487 CGEN_FIELDS *fields)
488 {
489 /* ??? Runtime added insns not handled yet. */
490 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
491 const char *str = *strp;
492 const char *errmsg;
493 const char *p;
494 const CGEN_SYNTAX_CHAR_TYPE * syn;
495 #ifdef CGEN_MNEMONIC_OPERANDS
496 /* FIXME: wip */
497 int past_opcode_p;
498 #endif
499
500 /* For now we assume the mnemonic is first (there are no leading operands).
501 We can parse it without needing to set up operand parsing.
502 GAS's input scrubber will ensure mnemonics are lowercase, but we may
503 not be called from GAS. */
504 p = CGEN_INSN_MNEMONIC (insn);
505 while (*p && TOLOWER (*p) == TOLOWER (*str))
506 ++p, ++str;
507
508 if (* p)
509 return _("unrecognized instruction");
510
511 #ifndef CGEN_MNEMONIC_OPERANDS
512 if (* str && ! ISSPACE (* str))
513 return _("unrecognized instruction");
514 #endif
515
516 CGEN_INIT_PARSE (cd);
517 cgen_init_parse_operand (cd);
518 #ifdef CGEN_MNEMONIC_OPERANDS
519 past_opcode_p = 0;
520 #endif
521
522 /* We don't check for (*str != '\0') here because we want to parse
523 any trailing fake arguments in the syntax string. */
524 syn = CGEN_SYNTAX_STRING (syntax);
525
526 /* Mnemonics come first for now, ensure valid string. */
527 if (! CGEN_SYNTAX_MNEMONIC_P (* syn))
528 abort ();
529
530 ++syn;
531
532 while (* syn != 0)
533 {
534 /* Non operand chars must match exactly. */
535 if (CGEN_SYNTAX_CHAR_P (* syn))
536 {
537 /* FIXME: While we allow for non-GAS callers above, we assume the
538 first char after the mnemonic part is a space. */
539 /* FIXME: We also take inappropriate advantage of the fact that
540 GAS's input scrubber will remove extraneous blanks. */
541 if (TOLOWER (*str) == TOLOWER (CGEN_SYNTAX_CHAR (* syn)))
542 {
543 #ifdef CGEN_MNEMONIC_OPERANDS
544 if (CGEN_SYNTAX_CHAR(* syn) == ' ')
545 past_opcode_p = 1;
546 #endif
547 ++ syn;
548 ++ str;
549 }
550 else if (*str)
551 {
552 /* Syntax char didn't match. Can't be this insn. */
553 static char msg [80];
554
555 /* xgettext:c-format */
556 sprintf (msg, _("syntax error (expected char `%c', found `%c')"),
557 CGEN_SYNTAX_CHAR(*syn), *str);
558 return msg;
559 }
560 else
561 {
562 /* Ran out of input. */
563 static char msg [80];
564
565 /* xgettext:c-format */
566 sprintf (msg, _("syntax error (expected char `%c', found end of instruction)"),
567 CGEN_SYNTAX_CHAR(*syn));
568 return msg;
569 }
570 continue;
571 }
572
573 /* We have an operand of some sort. */
574 errmsg = cd->parse_operand (cd, CGEN_SYNTAX_FIELD (*syn),
575 &str, fields);
576 if (errmsg)
577 return errmsg;
578
579 /* Done with this operand, continue with next one. */
580 ++ syn;
581 }
582
583 /* If we're at the end of the syntax string, we're done. */
584 if (* syn == 0)
585 {
586 /* FIXME: For the moment we assume a valid `str' can only contain
587 blanks now. IE: We needn't try again with a longer version of
588 the insn and it is assumed that longer versions of insns appear
589 before shorter ones (eg: lsr r2,r3,1 vs lsr r2,r3). */
590 while (ISSPACE (* str))
591 ++ str;
592
593 if (* str != '\0')
594 return _("junk at end of line"); /* FIXME: would like to include `str' */
595
596 return NULL;
597 }
598
599 /* We couldn't parse it. */
600 return _("unrecognized instruction");
601 }
602 \f
603 /* Main entry point.
604 This routine is called for each instruction to be assembled.
605 STR points to the insn to be assembled.
606 We assume all necessary tables have been initialized.
607 The assembled instruction, less any fixups, is stored in BUF.
608 Remember that if CGEN_INT_INSN_P then BUF is an int and thus the value
609 still needs to be converted to target byte order, otherwise BUF is an array
610 of bytes in target byte order.
611 The result is a pointer to the insn's entry in the opcode table,
612 or NULL if an error occured (an error message will have already been
613 printed).
614
615 Note that when processing (non-alias) macro-insns,
616 this function recurses.
617
618 ??? It's possible to make this cpu-independent.
619 One would have to deal with a few minor things.
620 At this point in time doing so would be more of a curiosity than useful
621 [for example this file isn't _that_ big], but keeping the possibility in
622 mind helps keep the design clean. */
623
624 const CGEN_INSN *
625 m32r_cgen_assemble_insn (CGEN_CPU_DESC cd,
626 const char *str,
627 CGEN_FIELDS *fields,
628 CGEN_INSN_BYTES_PTR buf,
629 char **errmsg)
630 {
631 const char *start;
632 CGEN_INSN_LIST *ilist;
633 const char *parse_errmsg = NULL;
634 const char *insert_errmsg = NULL;
635 int recognized_mnemonic = 0;
636
637 /* Skip leading white space. */
638 while (ISSPACE (* str))
639 ++ str;
640
641 /* The instructions are stored in hashed lists.
642 Get the first in the list. */
643 ilist = CGEN_ASM_LOOKUP_INSN (cd, str);
644
645 /* Keep looking until we find a match. */
646 start = str;
647 for ( ; ilist != NULL ; ilist = CGEN_ASM_NEXT_INSN (ilist))
648 {
649 const CGEN_INSN *insn = ilist->insn;
650 recognized_mnemonic = 1;
651
652 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
653 /* Not usually needed as unsupported opcodes
654 shouldn't be in the hash lists. */
655 /* Is this insn supported by the selected cpu? */
656 if (! m32r_cgen_insn_supported (cd, insn))
657 continue;
658 #endif
659 /* If the RELAXED attribute is set, this is an insn that shouldn't be
660 chosen immediately. Instead, it is used during assembler/linker
661 relaxation if possible. */
662 if (CGEN_INSN_ATTR_VALUE (insn, CGEN_INSN_RELAXED) != 0)
663 continue;
664
665 str = start;
666
667 /* Skip this insn if str doesn't look right lexically. */
668 if (CGEN_INSN_RX (insn) != NULL &&
669 regexec ((regex_t *) CGEN_INSN_RX (insn), str, 0, NULL, 0) == REG_NOMATCH)
670 continue;
671
672 /* Allow parse/insert handlers to obtain length of insn. */
673 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
674
675 parse_errmsg = CGEN_PARSE_FN (cd, insn) (cd, insn, & str, fields);
676 if (parse_errmsg != NULL)
677 continue;
678
679 /* ??? 0 is passed for `pc'. */
680 insert_errmsg = CGEN_INSERT_FN (cd, insn) (cd, insn, fields, buf,
681 (bfd_vma) 0);
682 if (insert_errmsg != NULL)
683 continue;
684
685 /* It is up to the caller to actually output the insn and any
686 queued relocs. */
687 return insn;
688 }
689
690 {
691 static char errbuf[150];
692 #ifdef CGEN_VERBOSE_ASSEMBLER_ERRORS
693 const char *tmp_errmsg;
694
695 /* If requesting verbose error messages, use insert_errmsg.
696 Failing that, use parse_errmsg. */
697 tmp_errmsg = (insert_errmsg ? insert_errmsg :
698 parse_errmsg ? parse_errmsg :
699 recognized_mnemonic ?
700 _("unrecognized form of instruction") :
701 _("unrecognized instruction"));
702
703 if (strlen (start) > 50)
704 /* xgettext:c-format */
705 sprintf (errbuf, "%s `%.50s...'", tmp_errmsg, start);
706 else
707 /* xgettext:c-format */
708 sprintf (errbuf, "%s `%.50s'", tmp_errmsg, start);
709 #else
710 if (strlen (start) > 50)
711 /* xgettext:c-format */
712 sprintf (errbuf, _("bad instruction `%.50s...'"), start);
713 else
714 /* xgettext:c-format */
715 sprintf (errbuf, _("bad instruction `%.50s'"), start);
716 #endif
717
718 *errmsg = errbuf;
719 return NULL;
720 }
721 }
722 \f
723 #if 0 /* This calls back to GAS which we can't do without care. */
724
725 /* Record each member of OPVALS in the assembler's symbol table.
726 This lets GAS parse registers for us.
727 ??? Interesting idea but not currently used. */
728
729 /* Record each member of OPVALS in the assembler's symbol table.
730 FIXME: Not currently used. */
731
732 void
733 m32r_cgen_asm_hash_keywords (CGEN_CPU_DESC cd, CGEN_KEYWORD *opvals)
734 {
735 CGEN_KEYWORD_SEARCH search = cgen_keyword_search_init (opvals, NULL);
736 const CGEN_KEYWORD_ENTRY * ke;
737
738 while ((ke = cgen_keyword_search_next (& search)) != NULL)
739 {
740 #if 0 /* Unnecessary, should be done in the search routine. */
741 if (! m32r_cgen_opval_supported (ke))
742 continue;
743 #endif
744 cgen_asm_record_register (cd, ke->name, ke->value);
745 }
746 }
747
748 #endif /* 0 */
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