opcodes/m32r-dis.c

   1 /* Disassembler interface for targets using CGEN. -*- C -*-
   2    CGEN: Cpu tools GENerator
   3
   4 THIS FILE IS MACHINE GENERATED WITH CGEN.
   5 - the resultant file is machine generated, cgen-dis.in isn't
   6
   7 Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
   8
   9 This file is part of the GNU Binutils and GDB, the GNU debugger.
  10
  11 This program is free software; you can redistribute it and/or modify
  12 it under the terms of the GNU General Public License as published by
  13 the Free Software Foundation; either version 2, or (at your option)
  14 any later version.
  15
  16 This program is distributed in the hope that it will be useful,
  17 but WITHOUT ANY WARRANTY; without even the implied warranty of
  18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19 GNU General Public License for more details.
  20
  21 You should have received a copy of the GNU General Public License
  22 along with this program; if not, write to the Free Software Foundation, Inc.,
  23 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
  26    Keep that in mind.  */
  27
  28 #include "sysdep.h"
  29 #include <stdio.h>
  30 #include "ansidecl.h"
  31 #include "dis-asm.h"
  32 #include "bfd.h"
  33 #include "symcat.h"
  34 #include "m32r-desc.h"
  35 #include "m32r-opc.h"
  36 #include "opintl.h"
  37
  38 /* Default text to print if an instruction isn't recognized.  */
  39 #define UNKNOWN_INSN_MSG _("*unknown*")
  40
  41 static void print_normal
  42      PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
  43 static void print_address
  44      PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
  45 static void print_keyword
  46      PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
  47 static void print_insn_normal
  48      PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
  49               bfd_vma, int));
  50 static int print_insn
  51      PARAMS ((CGEN_CPU_DESC, bfd_vma,  disassemble_info *, char *, unsigned));
  52 static int default_print_insn
  53      PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
  54 static int read_insn
  55      PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *, char *, int,
  56               CGEN_EXTRACT_INFO *, unsigned long *));
  57 \f
  58 /* -- disassembler routines inserted here */
  59
  60 /* -- dis.c */
  61 static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
  62 static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
  63
  64 /* Immediate values are prefixed with '#'.  */
  65
  66 #define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length)   \
  67   do                                                            \
  68     {                                                           \
  69       if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX))   \
  70         (*info->fprintf_func) (info->stream, "#");              \
  71     }                                                           \
  72   while (0)
  73
  74 /* Handle '#' prefixes as operands.  */
  75
  76 static void
  77 print_hash (cd, dis_info, value, attrs, pc, length)
  78      CGEN_CPU_DESC cd;
  79      PTR dis_info;
  80      long value;
  81      unsigned int attrs;
  82      bfd_vma pc;
  83      int length;
  84 {
  85   disassemble_info *info = (disassemble_info *) dis_info;
  86   (*info->fprintf_func) (info->stream, "#");
  87 }
  88
  89 #undef  CGEN_PRINT_INSN
  90 #define CGEN_PRINT_INSN my_print_insn
  91
  92 static int
  93 my_print_insn (cd, pc, info)
  94      CGEN_CPU_DESC cd;
  95      bfd_vma pc;
  96      disassemble_info *info;
  97 {
  98   char buffer[CGEN_MAX_INSN_SIZE];
  99   char *buf = buffer;
 100   int status;
 101   int buflen = (pc & 3) == 0 ? 4 : 2;
 102
 103   /* Read the base part of the insn.  */
 104
 105   status = (*info->read_memory_func) (pc, buf, buflen, info);
 106   if (status != 0)
 107     {
 108       (*info->memory_error_func) (status, pc, info);
 109       return -1;
 110     }
 111
 112   /* 32 bit insn?  */
 113   if ((pc & 3) == 0 && (buf[0] & 0x80) != 0)
 114     return print_insn (cd, pc, info, buf, buflen);
 115
 116   /* Print the first insn.  */
 117   if ((pc & 3) == 0)
 118     {
 119       if (print_insn (cd, pc, info, buf, 2) == 0)
 120         (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 121       buf += 2;
 122     }
 123
 124   if (buf[0] & 0x80)
 125     {
 126       /* Parallel.  */
 127       (*info->fprintf_func) (info->stream, " || ");
 128       buf[0] &= 0x7f;
 129     }
 130   else
 131     (*info->fprintf_func) (info->stream, " -> ");
 132
 133   /* The "& 3" is to pass a consistent address.
 134      Parallel insns arguably both begin on the word boundary.
 135      Also, branch insns are calculated relative to the word boundary.  */
 136   if (print_insn (cd, pc & ~ (bfd_vma) 3, info, buf, 2) == 0)
 137     (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 138
 139   return (pc & 3) ? 2 : 4;
 140 }
 141
 142 /* -- */
 143
 144 void m32r_cgen_print_operand
 145   PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
 146            void const *, bfd_vma, int));
 147
 148 /* Main entry point for printing operands.
 149    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
 150    of dis-asm.h on cgen.h.
 151
 152    This function is basically just a big switch statement.  Earlier versions
 153    used tables to look up the function to use, but
 154    - if the table contains both assembler and disassembler functions then
 155      the disassembler contains much of the assembler and vice-versa,
 156    - there's a lot of inlining possibilities as things grow,
 157    - using a switch statement avoids the function call overhead.
 158
 159    This function could be moved into `print_insn_normal', but keeping it
 160    separate makes clear the interface between `print_insn_normal' and each of
 161    the handlers.
 162 */
 163
 164 void
 165 m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
 166      CGEN_CPU_DESC cd;
 167      int opindex;
 168      PTR xinfo;
 169      CGEN_FIELDS *fields;
 170      void const *attrs ATTRIBUTE_UNUSED;
 171      bfd_vma pc;
 172      int length;
 173 {
 174  disassemble_info *info = (disassemble_info *) xinfo;
 175
 176   switch (opindex)
 177     {
 178     case M32R_OPERAND_ACC :
 179       print_keyword (cd, info, & m32r_cgen_opval_h_accums, fields->f_acc, 0);
 180       break;
 181     case M32R_OPERAND_ACCD :
 182       print_keyword (cd, info, & m32r_cgen_opval_h_accums, fields->f_accd, 0);
 183       break;
 184     case M32R_OPERAND_ACCS :
 185       print_keyword (cd, info, & m32r_cgen_opval_h_accums, fields->f_accs, 0);
 186       break;
 187     case M32R_OPERAND_DCR :
 188       print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r1, 0);
 189       break;
 190     case M32R_OPERAND_DISP16 :
 191       print_address (cd, info, fields->f_disp16, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 192       break;
 193     case M32R_OPERAND_DISP24 :
 194       print_address (cd, info, fields->f_disp24, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 195       break;
 196     case M32R_OPERAND_DISP8 :
 197       print_address (cd, info, fields->f_disp8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
 198       break;
 199     case M32R_OPERAND_DR :
 200       print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r1, 0);
 201       break;
 202     case M32R_OPERAND_HASH :
 203       print_hash (cd, info, 0, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 204       break;
 205     case M32R_OPERAND_HI16 :
 206       print_normal (cd, info, fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT), pc, length);
 207       break;
 208     case M32R_OPERAND_IMM1 :
 209       print_normal (cd, info, fields->f_imm1, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 210       break;
 211     case M32R_OPERAND_SCR :
 212       print_keyword (cd, info, & m32r_cgen_opval_cr_names, fields->f_r2, 0);
 213       break;
 214     case M32R_OPERAND_SIMM16 :
 215       print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 216       break;
 217     case M32R_OPERAND_SIMM8 :
 218       print_normal (cd, info, fields->f_simm8, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 219       break;
 220     case M32R_OPERAND_SLO16 :
 221       print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
 222       break;
 223     case M32R_OPERAND_SR :
 224       print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r2, 0);
 225       break;
 226     case M32R_OPERAND_SRC1 :
 227       print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r1, 0);
 228       break;
 229     case M32R_OPERAND_SRC2 :
 230       print_keyword (cd, info, & m32r_cgen_opval_gr_names, fields->f_r2, 0);
 231       break;
 232     case M32R_OPERAND_UIMM16 :
 233       print_normal (cd, info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 234       break;
 235     case M32R_OPERAND_UIMM24 :
 236       print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
 237       break;
 238     case M32R_OPERAND_UIMM4 :
 239       print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 240       break;
 241     case M32R_OPERAND_UIMM5 :
 242       print_normal (cd, info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
 243       break;
 244     case M32R_OPERAND_ULO16 :
 245       print_normal (cd, info, fields->f_uimm16, 0, pc, length);
 246       break;
 247
 248     default :
 249       /* xgettext:c-format */
 250       fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
 251                opindex);
 252     abort ();
 253   }
 254 }
 255
 256 cgen_print_fn * const m32r_cgen_print_handlers[] =
 257 {
 258   print_insn_normal,
 259 };
 260
 261
 262 void
 263 m32r_cgen_init_dis (cd)
 264      CGEN_CPU_DESC cd;
 265 {
 266   m32r_cgen_init_opcode_table (cd);
 267   m32r_cgen_init_ibld_table (cd);
 268   cd->print_handlers = & m32r_cgen_print_handlers[0];
 269   cd->print_operand = m32r_cgen_print_operand;
 270 }
 271
 272 \f
 273 /* Default print handler.  */
 274
 275 static void
 276 print_normal (cd, dis_info, value, attrs, pc, length)
 277      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 278      PTR dis_info;
 279      long value;
 280      unsigned int attrs;
 281      bfd_vma pc ATTRIBUTE_UNUSED;
 282      int length ATTRIBUTE_UNUSED;
 283 {
 284   disassemble_info *info = (disassemble_info *) dis_info;
 285
 286 #ifdef CGEN_PRINT_NORMAL
 287   CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
 288 #endif
 289
 290   /* Print the operand as directed by the attributes.  */
 291   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 292     ; /* nothing to do */
 293   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 294     (*info->fprintf_func) (info->stream, "%ld", value);
 295   else
 296     (*info->fprintf_func) (info->stream, "0x%lx", value);
 297 }
 298
 299 /* Default address handler.  */
 300
 301 static void
 302 print_address (cd, dis_info, value, attrs, pc, length)
 303      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 304      PTR dis_info;
 305      bfd_vma value;
 306      unsigned int attrs;
 307      bfd_vma pc ATTRIBUTE_UNUSED;
 308      int length ATTRIBUTE_UNUSED;
 309 {
 310   disassemble_info *info = (disassemble_info *) dis_info;
 311
 312 #ifdef CGEN_PRINT_ADDRESS
 313   CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
 314 #endif
 315
 316   /* Print the operand as directed by the attributes.  */
 317   if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
 318     ; /* nothing to do */
 319   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
 320     (*info->print_address_func) (value, info);
 321   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
 322     (*info->print_address_func) (value, info);
 323   else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
 324     (*info->fprintf_func) (info->stream, "%ld", (long) value);
 325   else
 326     (*info->fprintf_func) (info->stream, "0x%lx", (long) value);
 327 }
 328
 329 /* Keyword print handler.  */
 330
 331 static void
 332 print_keyword (cd, dis_info, keyword_table, value, attrs)
 333      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 334      PTR dis_info;
 335      CGEN_KEYWORD *keyword_table;
 336      long value;
 337      unsigned int attrs ATTRIBUTE_UNUSED;
 338 {
 339   disassemble_info *info = (disassemble_info *) dis_info;
 340   const CGEN_KEYWORD_ENTRY *ke;
 341
 342   ke = cgen_keyword_lookup_value (keyword_table, value);
 343   if (ke != NULL)
 344     (*info->fprintf_func) (info->stream, "%s", ke->name);
 345   else
 346     (*info->fprintf_func) (info->stream, "???");
 347 }
 348 \f
 349 /* Default insn printer.
 350
 351    DIS_INFO is defined as `PTR' so the disassembler needn't know anything
 352    about disassemble_info.  */
 353
 354 static void
 355 print_insn_normal (cd, dis_info, insn, fields, pc, length)
 356      CGEN_CPU_DESC cd;
 357      PTR dis_info;
 358      const CGEN_INSN *insn;
 359      CGEN_FIELDS *fields;
 360      bfd_vma pc;
 361      int length;
 362 {
 363   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
 364   disassemble_info *info = (disassemble_info *) dis_info;
 365   const CGEN_SYNTAX_CHAR_TYPE *syn;
 366
 367   CGEN_INIT_PRINT (cd);
 368
 369   for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
 370     {
 371       if (CGEN_SYNTAX_MNEMONIC_P (*syn))
 372         {
 373           (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
 374           continue;
 375         }
 376       if (CGEN_SYNTAX_CHAR_P (*syn))
 377         {
 378           (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
 379           continue;
 380         }
 381
 382       /* We have an operand.  */
 383       m32r_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
 384                                  fields, CGEN_INSN_ATTRS (insn), pc, length);
 385     }
 386 }
 387 \f
 388 /* Subroutine of print_insn. Reads an insn into the given buffers and updates
 389    the extract info.
 390    Returns 0 if all is well, non-zero otherwise.  */
 391
 392 static int
 393 read_insn (cd, pc, info, buf, buflen, ex_info, insn_value)
 394      CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;
 395      bfd_vma pc;
 396      disassemble_info *info;
 397      char *buf;
 398      int buflen;
 399      CGEN_EXTRACT_INFO *ex_info;
 400      unsigned long *insn_value;
 401 {
 402   int status = (*info->read_memory_func) (pc, buf, buflen, info);
 403   if (status != 0)
 404     {
 405       (*info->memory_error_func) (status, pc, info);
 406       return -1;
 407     }
 408
 409   ex_info->dis_info = info;
 410   ex_info->valid = (1 << buflen) - 1;
 411   ex_info->insn_bytes = buf;
 412
 413   *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
 414   return 0;
 415 }
 416
 417 /* Utility to print an insn.
 418    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
 419    The result is the size of the insn in bytes or zero for an unknown insn
 420    or -1 if an error occurs fetching data (memory_error_func will have
 421    been called).  */
 422
 423 static int
 424 print_insn (cd, pc, info, buf, buflen)
 425      CGEN_CPU_DESC cd;
 426      bfd_vma pc;
 427      disassemble_info *info;
 428      char *buf;
 429      unsigned int buflen;
 430 {
 431   CGEN_INSN_INT insn_value;
 432   const CGEN_INSN_LIST *insn_list;
 433   CGEN_EXTRACT_INFO ex_info;
 434   int basesize;
 435
 436   /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
 437   basesize = cd->base_insn_bitsize < buflen * 8 ?
 438                                      cd->base_insn_bitsize : buflen * 8;
 439   insn_value = cgen_get_insn_value (cd, buf, basesize);
 440
 441
 442   /* Fill in ex_info fields like read_insn would.  Don't actually call
 443      read_insn, since the incoming buffer is already read (and possibly
 444      modified a la m32r).  */
 445   ex_info.valid = (1 << buflen) - 1;
 446   ex_info.dis_info = info;
 447   ex_info.insn_bytes = buf;
 448
 449   /* The instructions are stored in hash lists.
 450      Pick the first one and keep trying until we find the right one.  */
 451
 452   insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
 453   while (insn_list != NULL)
 454     {
 455       const CGEN_INSN *insn = insn_list->insn;
 456       CGEN_FIELDS fields;
 457       int length;
 458       unsigned long insn_value_cropped;
 459
 460 #ifdef CGEN_VALIDATE_INSN_SUPPORTED
 461       /* Not needed as insn shouldn't be in hash lists if not supported.  */
 462       /* Supported by this cpu?  */
 463       if (! m32r_cgen_insn_supported (cd, insn))
 464         {
 465           insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 466           continue;
 467         }
 468 #endif
 469
 470       /* Basic bit mask must be correct.  */
 471       /* ??? May wish to allow target to defer this check until the extract
 472          handler.  */
 473
 474       /* Base size may exceed this instruction's size.  Extract the
 475          relevant part from the buffer. */
 476       if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
 477           (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 478         insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
 479                                            info->endian == BFD_ENDIAN_BIG);
 480       else
 481         insn_value_cropped = insn_value;
 482
 483       if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
 484           == CGEN_INSN_BASE_VALUE (insn))
 485         {
 486           /* Printing is handled in two passes.  The first pass parses the
 487              machine insn and extracts the fields.  The second pass prints
 488              them.  */
 489
 490           /* Make sure the entire insn is loaded into insn_value, if it
 491              can fit.  */
 492           if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
 493               (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
 494             {
 495               unsigned long full_insn_value;
 496               int rc = read_insn (cd, pc, info, buf,
 497                                   CGEN_INSN_BITSIZE (insn) / 8,
 498                                   & ex_info, & full_insn_value);
 499               if (rc != 0)
 500                 return rc;
 501               length = CGEN_EXTRACT_FN (cd, insn)
 502                 (cd, insn, &ex_info, full_insn_value, &fields, pc);
 503             }
 504           else
 505             length = CGEN_EXTRACT_FN (cd, insn)
 506               (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
 507
 508           /* length < 0 -> error */
 509           if (length < 0)
 510             return length;
 511           if (length > 0)
 512             {
 513               CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
 514               /* length is in bits, result is in bytes */
 515               return length / 8;
 516             }
 517         }
 518
 519       insn_list = CGEN_DIS_NEXT_INSN (insn_list);
 520     }
 521
 522   return 0;
 523 }
 524
 525 /* Default value for CGEN_PRINT_INSN.
 526    The result is the size of the insn in bytes or zero for an unknown insn
 527    or -1 if an error occured fetching bytes.  */
 528
 529 #ifndef CGEN_PRINT_INSN
 530 #define CGEN_PRINT_INSN default_print_insn
 531 #endif
 532
 533 static int
 534 default_print_insn (cd, pc, info)
 535      CGEN_CPU_DESC cd;
 536      bfd_vma pc;
 537      disassemble_info *info;
 538 {
 539   char buf[CGEN_MAX_INSN_SIZE];
 540   int buflen;
 541   int status;
 542
 543   /* Attempt to read the base part of the insn.  */
 544   buflen = cd->base_insn_bitsize / 8;
 545   status = (*info->read_memory_func) (pc, buf, buflen, info);
 546
 547   /* Try again with the minimum part, if min < base.  */
 548   if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
 549     {
 550       buflen = cd->min_insn_bitsize / 8;
 551       status = (*info->read_memory_func) (pc, buf, buflen, info);
 552     }
 553
 554   if (status != 0)
 555     {
 556       (*info->memory_error_func) (status, pc, info);
 557       return -1;
 558     }
 559
 560   return print_insn (cd, pc, info, buf, buflen);
 561 }
 562
 563 /* Main entry point.
 564    Print one instruction from PC on INFO->STREAM.
 565    Return the size of the instruction (in bytes).  */
 566
 567 int
 568 print_insn_m32r (pc, info)
 569      bfd_vma pc;
 570      disassemble_info *info;
 571 {
 572   static CGEN_CPU_DESC cd = 0;
 573   static int prev_isa;
 574   static int prev_mach;
 575   static int prev_endian;
 576   int length;
 577   int isa,mach;
 578   int endian = (info->endian == BFD_ENDIAN_BIG
 579                 ? CGEN_ENDIAN_BIG
 580                 : CGEN_ENDIAN_LITTLE);
 581   enum bfd_architecture arch;
 582
 583   /* ??? gdb will set mach but leave the architecture as "unknown" */
 584 #ifndef CGEN_BFD_ARCH
 585 #define CGEN_BFD_ARCH bfd_arch_m32r
 586 #endif
 587   arch = info->arch;
 588   if (arch == bfd_arch_unknown)
 589     arch = CGEN_BFD_ARCH;
 590
 591   /* There's no standard way to compute the machine or isa number
 592      so we leave it to the target.  */
 593 #ifdef CGEN_COMPUTE_MACH
 594   mach = CGEN_COMPUTE_MACH (info);
 595 #else
 596   mach = info->mach;
 597 #endif
 598
 599 #ifdef CGEN_COMPUTE_ISA
 600   isa = CGEN_COMPUTE_ISA (info);
 601 #else
 602   isa = 0;
 603 #endif
 604
 605   /* If we've switched cpu's, close the current table and open a new one.  */
 606   if (cd
 607       && (isa != prev_isa
 608           || mach != prev_mach
 609           || endian != prev_endian))
 610     {
 611       m32r_cgen_cpu_close (cd);
 612       cd = 0;
 613     }
 614
 615   /* If we haven't initialized yet, initialize the opcode table.  */
 616   if (! cd)
 617     {
 618       const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
 619       const char *mach_name;
 620
 621       if (!arch_type)
 622         abort ();
 623       mach_name = arch_type->printable_name;
 624
 625       prev_isa = isa;
 626       prev_mach = mach;
 627       prev_endian = endian;
 628       cd = m32r_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
 629                                  CGEN_CPU_OPEN_BFDMACH, mach_name,
 630                                  CGEN_CPU_OPEN_ENDIAN, prev_endian,
 631                                  CGEN_CPU_OPEN_END);
 632       if (!cd)
 633         abort ();
 634       m32r_cgen_init_dis (cd);
 635     }
 636
 637   /* We try to have as much common code as possible.
 638      But at this point some targets need to take over.  */
 639   /* ??? Some targets may need a hook elsewhere.  Try to avoid this,
 640      but if not possible try to move this hook elsewhere rather than
 641      have two hooks.  */
 642   length = CGEN_PRINT_INSN (cd, pc, info);
 643   if (length > 0)
 644     return length;
 645   if (length < 0)
 646     return -1;
 647
 648   (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
 649   return cd->default_insn_bitsize / 8;
 650 }