1 /* micromips-opc.c. microMIPS opcode table.
2 Copyright (C) 2008-2018 Free Software Foundation, Inc.
3 Contributed by Chao-ying Fu, MIPS Technologies, Inc.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
23 #include "opcode/mips.h"
24 #include "mips-formats.h"
26 static unsigned char reg_0_map
[] = { 0 };
27 static unsigned char reg_28_map
[] = { 28 };
28 static unsigned char reg_29_map
[] = { 29 };
29 static unsigned char reg_31_map
[] = { 31 };
30 static unsigned char reg_m16_map
[] = { 16, 17, 2, 3, 4, 5, 6, 7 };
31 static unsigned char reg_mn_map
[] = { 0, 17, 2, 3, 16, 18, 19, 20 };
32 static unsigned char reg_q_map
[] = { 0, 17, 2, 3, 4, 5, 6, 7 };
34 static unsigned char reg_h_map1
[] = { 5, 5, 6, 4, 4, 4, 4, 4 };
35 static unsigned char reg_h_map2
[] = { 6, 7, 7, 21, 22, 5, 6, 7 };
37 static int int_b_map
[] = {
38 1, 4, 8, 12, 16, 20, 24, -1
40 static int int_c_map
[] = {
41 128, 1, 2, 3, 4, 7, 8, 15, 16, 31, 32, 63, 64, 255, 32768, 65535
44 /* Return the mips_operand structure for the operand at the beginning of P. */
46 const struct mips_operand
*
47 decode_micromips_operand (const char *p
)
54 case 'a': MAPPED_REG (0, 0, GP
, reg_28_map
);
55 case 'b': MAPPED_REG (3, 23, GP
, reg_m16_map
);
56 case 'c': OPTIONAL_MAPPED_REG (3, 4, GP
, reg_m16_map
);
57 case 'd': MAPPED_REG (3, 7, GP
, reg_m16_map
);
58 case 'e': OPTIONAL_MAPPED_REG (3, 1, GP
, reg_m16_map
);
59 case 'f': MAPPED_REG (3, 3, GP
, reg_m16_map
);
60 case 'g': MAPPED_REG (3, 0, GP
, reg_m16_map
);
61 case 'h': REG_PAIR (3, 7, GP
, reg_h_map
);
62 case 'j': REG (5, 0, GP
);
63 case 'l': MAPPED_REG (3, 4, GP
, reg_m16_map
);
64 case 'm': MAPPED_REG (3, 1, GP
, reg_mn_map
);
65 case 'n': MAPPED_REG (3, 4, GP
, reg_mn_map
);
66 case 'p': REG (5, 5, GP
);
67 case 'q': MAPPED_REG (3, 7, GP
, reg_q_map
);
68 case 'r': SPECIAL (0, 0, PC
);
69 case 's': MAPPED_REG (0, 0, GP
, reg_29_map
);
70 case 't': SPECIAL (0, 0, REPEAT_PREV_REG
);
71 case 'x': SPECIAL (0, 0, REPEAT_DEST_REG
);
72 case 'y': MAPPED_REG (0, 0, GP
, reg_31_map
);
73 case 'z': MAPPED_REG (0, 0, GP
, reg_0_map
);
75 case 'A': INT_ADJ (7, 0, 63, 2, FALSE
); /* (-64 .. 63) << 2 */
76 case 'B': MAPPED_INT (3, 1, int_b_map
, FALSE
);
77 case 'C': MAPPED_INT (4, 0, int_c_map
, TRUE
);
78 case 'D': BRANCH (10, 0, 1);
79 case 'E': BRANCH (7, 0, 1);
80 case 'F': HINT (4, 0);
81 case 'G': INT_ADJ (4, 0, 14, 0, FALSE
); /* (-1 .. 14) */
82 case 'H': INT_ADJ (4, 0, 15, 1, FALSE
); /* (0 .. 15) << 1 */
83 case 'I': INT_ADJ (7, 0, 126, 0, FALSE
); /* (-1 .. 126) */
84 case 'J': INT_ADJ (4, 0, 15, 2, FALSE
); /* (0 .. 15) << 2 */
85 case 'L': INT_ADJ (4, 0, 15, 0, FALSE
); /* (0 .. 15) */
86 case 'M': INT_ADJ (3, 1, 8, 0, FALSE
); /* (1 .. 8) */
87 case 'N': SPECIAL (2, 4, LWM_SWM_LIST
);
88 case 'O': HINT (4, 0);
89 case 'P': INT_ADJ (5, 0, 31, 2, FALSE
); /* (0 .. 31) << 2 */
90 case 'Q': INT_ADJ (23, 0, 4194303, 2, FALSE
);
91 /* (-4194304 .. 4194303) */
92 case 'U': INT_ADJ (5, 0, 31, 2, FALSE
); /* (0 .. 31) << 2 */
93 case 'W': INT_ADJ (6, 1, 63, 2, FALSE
); /* (0 .. 63) << 2 */
94 case 'X': SINT (4, 1);
95 case 'Y': SPECIAL (9, 1, ADDIUSP_INT
);
96 case 'Z': UINT (0, 0); /* 0 only */
103 case 'A': BIT (5, 6, 0); /* (0 .. 31) */
104 case 'B': MSB (5, 11, 1, TRUE
, 32); /* (1 .. 32), 32-bit op */
105 case 'C': MSB (5, 11, 1, FALSE
, 32); /* (1 .. 32), 32-bit op */
106 case 'E': BIT (5, 6, 32); /* (32 .. 63) */
107 case 'F': MSB (5, 11, 33, TRUE
, 64); /* (33 .. 64), 64-bit op */
108 case 'G': MSB (5, 11, 33, FALSE
, 64); /* (33 .. 64), 64-bit op */
109 case 'H': MSB (5, 11, 1, FALSE
, 64); /* (1 .. 32), 64-bit op */
110 case 'J': HINT (10, 16);
111 case 'T': INT_ADJ (10, 16, 511, 0, FALSE
); /* (-512 .. 511) << 0 */
112 case 'U': INT_ADJ (10, 16, 511, 1, FALSE
); /* (-512 .. 511) << 1 */
113 case 'V': INT_ADJ (10, 16, 511, 2, FALSE
); /* (-512 .. 511) << 2 */
114 case 'W': INT_ADJ (10, 16, 511, 3, FALSE
); /* (-512 .. 511) << 3 */
116 case 'd': REG (5, 6, MSA
);
117 case 'e': REG (5, 11, MSA
);
118 case 'h': REG (5, 16, MSA
);
119 case 'i': JALX (26, 0, 2);
120 case 'j': SINT (9, 0);
121 case 'k': REG (5, 6, GP
);
122 case 'l': REG (5, 6, MSA_CTRL
);
123 case 'n': REG (5, 11, MSA_CTRL
);
124 case 'o': SPECIAL (4, 16, IMM_INDEX
);
125 case 'u': SPECIAL (3, 16, IMM_INDEX
);
126 case 'v': SPECIAL (2, 16, IMM_INDEX
);
127 case 'w': SPECIAL (1, 16, IMM_INDEX
);
128 case 'x': BIT (5, 16, 0); /* (0 .. 31) */
130 case '~': BIT (2, 6, 1); /* (1 .. 4) */
131 case '!': BIT (3, 16, 0); /* (0 .. 7) */
132 case '@': BIT (4, 16, 0); /* (0 .. 15) */
133 case '#': BIT (6, 16, 0); /* (0 .. 63) */
134 case '$': UINT (5, 16); /* (0 .. 31) */
135 case '%': SINT (5, 16); /* (-16 .. 15) */
136 case '^': SINT (10, 11); /* (-512 .. 511) */
137 case '&': SPECIAL (0, 0, IMM_INDEX
);
138 case '*': SPECIAL (5, 16, REG_INDEX
);
139 case '|': BIT (8, 16, 0); /* (0 .. 255) */
143 case '.': SINT (10, 6);
144 case '<': BIT (5, 11, 0); /* (0 .. 31) */
145 case '>': BIT (5, 11, 32); /* (32 .. 63) */
146 case '\\': BIT (3, 21, 0); /* (0 .. 7) */
147 case '|': HINT (4, 12);
148 case '~': SINT (12, 0);
149 case '@': SINT (10, 16);
150 case '^': HINT (5, 11);
152 case '0': SINT (6, 16);
153 case '1': HINT (5, 16);
154 case '2': HINT (2, 14);
155 case '3': HINT (3, 13);
156 case '4': HINT (4, 12);
157 case '5': HINT (8, 13);
158 case '6': HINT (5, 16);
159 case '7': REG (2, 14, ACC
);
160 case '8': HINT (6, 14);
162 case 'C': HINT (23, 3);
163 case 'D': REG (5, 11, FP
);
164 case 'E': REG (5, 21, COPRO
);
165 case 'G': REG (5, 16, COPRO
);
166 case 'K': REG (5, 16, HW
);
167 case 'H': UINT (3, 11);
168 case 'M': REG (3, 13, CCC
);
169 case 'N': REG (3, 18, CCC
);
170 case 'R': REG (5, 6, FP
);
171 case 'S': REG (5, 16, FP
);
172 case 'T': REG (5, 21, FP
);
173 case 'V': OPTIONAL_REG (5, 16, FP
);
175 case 'a': JUMP (26, 0, 1);
176 case 'b': REG (5, 16, GP
);
177 case 'c': HINT (10, 16);
178 case 'd': REG (5, 11, GP
);
179 case 'h': HINT (5, 11);
180 case 'i': HINT (16, 0);
181 case 'j': SINT (16, 0);
182 case 'k': HINT (5, 21);
183 case 'n': SPECIAL (5, 21, LWM_SWM_LIST
);
184 case 'o': SINT (16, 0);
185 case 'p': BRANCH (16, 0, 1);
186 case 'q': HINT (10, 6);
187 case 'r': OPTIONAL_REG (5, 16, GP
);
188 case 's': REG (5, 16, GP
);
189 case 't': REG (5, 21, GP
);
190 case 'u': HINT (16, 0);
191 case 'v': OPTIONAL_REG (5, 16, GP
);
192 case 'w': OPTIONAL_REG (5, 21, GP
);
193 case 'y': REG (5, 6, GP
);
194 case 'z': MAPPED_REG (0, 0, GP
, reg_0_map
);
199 #define UBD INSN_UNCOND_BRANCH_DELAY
200 #define CBD INSN_COND_BRANCH_DELAY
201 #define NODS INSN_NO_DELAY_SLOT
202 #define TRAP INSN_NO_DELAY_SLOT
203 #define LM INSN_LOAD_MEMORY
204 #define SM INSN_STORE_MEMORY
205 #define CM INSN_COPROC_MOVE
206 #define LC INSN_LOAD_COPROC
207 #define BD16 INSN2_BRANCH_DELAY_16BIT /* Used in pinfo2. */
208 #define BD32 INSN2_BRANCH_DELAY_32BIT /* Used in pinfo2. */
210 #define WR_1 INSN_WRITE_1
211 #define WR_2 INSN_WRITE_2
212 #define RD_1 INSN_READ_1
213 #define RD_2 INSN_READ_2
214 #define RD_3 INSN_READ_3
215 #define RD_4 INSN_READ_4
216 #define MOD_1 (WR_1|RD_1)
217 #define MOD_2 (WR_2|RD_2)
219 /* For 16-bit/32-bit microMIPS instructions. They are used in pinfo2. */
220 #define UBR INSN2_UNCOND_BRANCH
221 #define CBR INSN2_COND_BRANCH
222 #define RD_sp INSN2_READ_SP
223 #define WR_sp INSN2_WRITE_SP
224 #define RD_31 INSN2_READ_GPR_31
225 #define RD_pc INSN2_READ_PC
227 /* For 32-bit microMIPS instructions. */
228 #define WR_31 INSN_WRITE_GPR_31
229 #define WR_CC INSN_WRITE_COND_CODE
231 #define RD_CC INSN_READ_COND_CODE
232 #define RD_C0 INSN_COP
233 #define RD_C1 INSN_COP
234 #define RD_C2 INSN_COP
235 #define WR_C0 INSN_COP
236 #define WR_C1 INSN_COP
237 #define WR_C2 INSN_COP
240 #define WR_HI INSN_WRITE_HI
241 #define RD_HI INSN_READ_HI
243 #define WR_LO INSN_WRITE_LO
244 #define RD_LO INSN_READ_LO
246 #define WR_HILO WR_HI|WR_LO
247 #define RD_HILO RD_HI|RD_LO
248 #define MOD_HILO WR_HILO|RD_HILO
250 /* Reuse INSN_ISA1 for 32-bit microMIPS ISA. All instructions in I1
251 are accepted as 32-bit microMIPS ISA.
252 Reuse INSN_ISA3 for 64-bit microMIPS ISA. All instructions in I3
253 are accepted as 64-bit microMIPS ISA. */
256 #define I36 INSN_ISA32R5
258 /* MIPS DSP ASE support. */
259 #define WR_a WR_HILO /* Write DSP accumulators (reuse WR_HILO). */
260 #define RD_a RD_HILO /* Read DSP accumulators (reuse RD_HILO). */
261 #define MOD_a WR_a|RD_a
262 #define DSP_VOLA INSN_NO_DELAY_SLOT
264 #define D33 ASE_DSPR2
266 /* MIPS MCU (MicroController) ASE support. */
269 /* MIPS Enhanced VA Scheme. */
272 /* TLB invalidate instruction support. */
273 #define TLBINV ASE_EVA
275 /* MIPS Virtualization ASE. */
276 #define IVIRT ASE_VIRT
277 #define IVIRT64 ASE_VIRT64
281 #define MSA64 ASE_MSA64
283 /* eXtended Physical Address (XPA) support. */
285 #define XPAVZ ASE_XPA_VIRT
287 const struct mips_opcode micromips_opcodes
[] =
289 /* These instructions appear first so that the disassembler will find
290 them first. The assemblers uses a hash table based on the
291 instruction name anyhow. */
292 /* name, args, match, mask, pinfo, pinfo2, membership, ase, exclusions */
293 {"pref", "k,~(b)", 0x60002000, 0xfc00f000, RD_3
|LM
, 0, I1
, 0, 0 },
294 {"pref", "k,A(b)", 0, (int) M_PREF_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
295 {"prefx", "h,t(b)", 0x540001a0, 0xfc0007ff, RD_2
|RD_3
|FP_S
|LM
, 0, I1
, 0, 0 },
296 {"nop", "", 0x0c00, 0xffff, 0, INSN2_ALIAS
, I1
, 0, 0 },
297 {"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
298 {"ssnop", "", 0x00000800, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
299 {"ehb", "", 0x00001800, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
300 {"pause", "", 0x00002800, 0xffffffff, 0, INSN2_ALIAS
, I1
, 0, 0 }, /* sll */
301 {"li", "md,mI", 0xec00, 0xfc00, WR_1
, 0, I1
, 0, 0 },
302 {"li", "t,j", 0x30000000, 0xfc1f0000, WR_1
, INSN2_ALIAS
, I1
, 0, 0 }, /* addiu */
303 {"li", "t,i", 0x50000000, 0xfc1f0000, WR_1
, INSN2_ALIAS
, I1
, 0, 0 }, /* ori */
304 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, 0, I1
, 0, 0 },
305 {"move", "d,s", 0, (int) M_MOVE
, INSN_MACRO
, 0, I1
, 0, 0 },
306 {"move", "mp,mj", 0x0c00, 0xfc00, WR_1
|RD_2
, 0, I1
, 0, 0 },
307 {"move", "d,s", 0x00000290, 0xffe007ff, WR_1
|RD_2
, INSN2_ALIAS
, I1
, 0, 0 }, /* or */
308 {"move", "d,s", 0x58000150, 0xffe007ff, WR_1
|RD_2
, INSN2_ALIAS
, I3
, 0, 0 }, /* daddu */
309 {"move", "d,s", 0x00000150, 0xffe007ff, WR_1
|RD_2
, INSN2_ALIAS
, I1
, 0, 0 }, /* addu */
310 {"b", "mD", 0xcc00, 0xfc00, UBD
, 0, I1
, 0, 0 },
311 {"b", "p", 0x94000000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
, 0, 0 }, /* beq 0, 0 */
312 {"b", "p", 0x40400000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
, 0, 0 }, /* bgez 0 */
313 /* BC is next to B so that we easily find it when converting a normal
314 branch to a compact one. */
315 {"bc", "p", 0x40e00000, 0xffff0000, NODS
, INSN2_ALIAS
|UBR
, I1
, 0, 0 }, /* beqzc 0 */
316 {"bal", "p", 0x40600000, 0xffff0000, WR_31
|UBD
, INSN2_ALIAS
|BD32
, I1
, 0, 0 }, /* bgezal 0 */
317 {"bals", "p", 0x42600000, 0xffff0000, WR_31
|UBD
, INSN2_ALIAS
|BD16
, I1
, 0, 0 }, /* bgezals 0 */
318 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, 0, I1
, 0, 0 },
319 {"abs.d", "T,V", 0x5400237b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
320 {"abs.s", "T,V", 0x5400037b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
321 {"abs.ps", "T,V", 0x5400437b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
322 {"aclr", "\\,~(b)", 0x2000b000, 0xff00f000, RD_3
|LM
|SM
|NODS
, 0, 0, MC
, 0 },
323 {"aclr", "\\,A(b)", 0, (int) M_ACLR_AB
, INSN_MACRO
, 0, 0, MC
, 0 },
324 {"add", "d,v,t", 0x00000110, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
325 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, 0, I1
, 0, 0 },
326 {"add.d", "D,V,T", 0x54000130, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
327 {"add.s", "D,V,T", 0x54000030, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
328 {"add.ps", "D,V,T", 0x54000230, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
329 {"addi", "t,r,j", 0x10000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
330 {"addiu", "mp,mj,mZ", 0x0c00, 0xfc00, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* move */
331 {"addiu", "md,ms,mW", 0x6c01, 0xfc01, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* addiur1sp */
332 {"addiu", "md,mc,mB", 0x6c00, 0xfc01, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* addiur2 */
333 {"addiu", "ms,mt,mY", 0x4c01, 0xfc01, MOD_1
, 0, I1
, 0, 0 }, /* addiusp */
334 {"addiu", "mp,mt,mX", 0x4c00, 0xfc01, MOD_1
, 0, I1
, 0, 0 }, /* addius5 */
335 {"addiu", "mb,mr,mQ", 0x78000000, 0xfc000000, WR_1
, RD_pc
, I1
, 0, 0 }, /* addiupc */
336 {"addiu", "t,r,j", 0x30000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
337 {"addiupc", "mb,mQ", 0x78000000, 0xfc000000, WR_1
, RD_pc
, I1
, 0, 0 },
338 {"addiur1sp", "md,mW", 0x6c01, 0xfc01, WR_1
, RD_sp
, I1
, 0, 0 },
339 {"addiur2", "md,mc,mB", 0x6c00, 0xfc01, WR_1
|RD_2
, 0, I1
, 0, 0 },
340 {"addiusp", "mY", 0x4c01, 0xfc01, 0, WR_sp
|RD_sp
, I1
, 0, 0 },
341 {"addius5", "mp,mX", 0x4c00, 0xfc01, MOD_1
, 0, I1
, 0, 0 },
342 {"addu", "mp,mj,mz", 0x0c00, 0xfc00, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* move */
343 {"addu", "mp,mz,mj", 0x0c00, 0xfc00, WR_1
|RD_3
, 0, I1
, 0, 0 }, /* move */
344 {"addu", "md,me,ml", 0x0400, 0xfc01, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
345 {"addu", "d,v,t", 0x00000150, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
346 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
347 {"alnv.ps", "D,V,T,y", 0x54000019, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
348 {"and", "mf,mt,mg", 0x4480, 0xffc0, MOD_1
|RD_3
, 0, I1
, 0, 0 },
349 {"and", "mf,mg,mx", 0x4480, 0xffc0, MOD_1
|RD_2
, 0, I1
, 0, 0 },
350 {"and", "d,v,t", 0x00000250, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
351 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, 0, I1
, 0, 0 },
352 {"andi", "md,mc,mC", 0x2c00, 0xfc00, WR_1
|RD_2
, 0, I1
, 0, 0 },
353 {"andi", "t,r,i", 0xd0000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
354 {"aset", "\\,~(b)", 0x20003000, 0xff00f000, RD_3
|LM
|SM
|NODS
, 0, 0, MC
, 0 },
355 {"aset", "\\,A(b)", 0, (int) M_ASET_AB
, INSN_MACRO
, 0, 0, MC
, 0 },
356 /* b is at the top of the table. */
357 /* bal is at the top of the table. */
358 {"bc1f", "p", 0x43800000, 0xffff0000, RD_CC
|CBD
|FP_S
, 0, I1
, 0, 0 },
359 {"bc1f", "N,p", 0x43800000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, I1
, 0, 0 },
360 {"bc1fl", "p", 0, (int) M_BC1FL
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
361 {"bc1fl", "N,p", 0, (int) M_BC1FL
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
362 {"bc2f", "p", 0x42800000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, 0 },
363 {"bc2f", "N,p", 0x42800000, 0xffe30000, RD_CC
|CBD
, 0, I1
, 0, 0 },
364 {"bc2fl", "p", 0, (int) M_BC2FL
, INSN_MACRO
, 0, I1
, 0, 0 },
365 {"bc2fl", "N,p", 0, (int) M_BC2FL
, INSN_MACRO
, 0, I1
, 0, 0 },
366 {"bc1t", "p", 0x43a00000, 0xffff0000, RD_CC
|CBD
|FP_S
, 0, I1
, 0, 0 },
367 {"bc1t", "N,p", 0x43a00000, 0xffe30000, RD_CC
|CBD
|FP_S
, 0, I1
, 0, 0 },
368 {"bc1tl", "p", 0, (int) M_BC1TL
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
369 {"bc1tl", "N,p", 0, (int) M_BC1TL
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
370 {"bc2t", "p", 0x42a00000, 0xffff0000, RD_CC
|CBD
, 0, I1
, 0, 0 },
371 {"bc2t", "N,p", 0x42a00000, 0xffe30000, RD_CC
|CBD
, 0, I1
, 0, 0 },
372 {"bc2tl", "p", 0, (int) M_BC2TL
, INSN_MACRO
, 0, I1
, 0, 0 },
373 {"bc2tl", "N,p", 0, (int) M_BC2TL
, INSN_MACRO
, 0, I1
, 0, 0 },
374 {"beqz", "md,mE", 0x8c00, 0xfc00, RD_1
|CBD
, 0, I1
, 0, 0 },
375 {"beqz", "s,p", 0x94000000, 0xffe00000, RD_1
|CBD
, 0, I1
, 0, 0 },
376 {"beqzl", "s,p", 0, (int) M_BEQL
, INSN_MACRO
, 0, I1
, 0, 0 },
377 {"beq", "md,mz,mE", 0x8c00, 0xfc00, RD_1
|CBD
, 0, I1
, 0, 0 }, /* beqz */
378 {"beq", "mz,md,mE", 0x8c00, 0xfc00, RD_2
|CBD
, 0, I1
, 0, 0 }, /* beqz */
379 {"beq", "s,t,p", 0x94000000, 0xfc000000, RD_1
|RD_2
|CBD
, 0, I1
, 0, 0 },
380 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, 0, I1
, 0, 0 },
381 /* BEQZC is next to BEQ so that we easily find it when converting a normal
382 branch to a compact one. */
383 {"beqzc", "s,p", 0x40e00000, 0xffe00000, RD_1
|NODS
, CBR
, I1
, 0, 0 },
384 {"beql", "s,t,p", 0, (int) M_BEQL
, INSN_MACRO
, 0, I1
, 0, 0 },
385 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
386 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, 0, I1
, 0, 0 },
387 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
388 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, 0, I1
, 0, 0 },
389 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
390 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, 0, I1
, 0, 0 },
391 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
392 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, 0, I1
, 0, 0 },
393 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
394 {"bgez", "s,p", 0x40400000, 0xffe00000, RD_1
|CBD
, 0, I1
, 0, 0 },
395 {"bgezl", "s,p", 0, (int) M_BGEZL
, INSN_MACRO
, 0, I1
, 0, 0 },
396 {"bgezal", "s,p", 0x40600000, 0xffe00000, RD_1
|WR_31
|CBD
, BD32
, I1
, 0, 0 },
397 {"bgezals", "s,p", 0x42600000, 0xffe00000, RD_1
|WR_31
|CBD
, BD16
, I1
, 0, 0 },
398 {"bgezall", "s,p", 0, (int) M_BGEZALL
, INSN_MACRO
, 0, I1
, 0, 0 },
399 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, 0, I1
, 0, 0 },
400 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
401 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, 0, I1
, 0, 0 },
402 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
403 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, 0, I1
, 0, 0 },
404 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
405 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, 0, I1
, 0, 0 },
406 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
407 {"bgtz", "s,p", 0x40c00000, 0xffe00000, RD_1
|CBD
, 0, I1
, 0, 0 },
408 {"bgtzl", "s,p", 0, (int) M_BGTZL
, INSN_MACRO
, 0, I1
, 0, 0 },
409 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, 0, I1
, 0, 0 },
410 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
411 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, 0, I1
, 0, 0 },
412 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
413 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, 0, I1
, 0, 0 },
414 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
415 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, 0, I1
, 0, 0 },
416 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
417 {"blez", "s,p", 0x40800000, 0xffe00000, RD_1
|CBD
, 0, I1
, 0, 0 },
418 {"blezl", "s,p", 0, (int) M_BLEZL
, INSN_MACRO
, 0, I1
, 0, 0 },
419 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, 0, I1
, 0, 0 },
420 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
421 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, 0, I1
, 0, 0 },
422 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
423 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, 0, I1
, 0, 0 },
424 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
425 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, 0, I1
, 0, 0 },
426 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
427 {"bltz", "s,p", 0x40000000, 0xffe00000, RD_1
|CBD
, 0, I1
, 0, 0 },
428 {"bltzl", "s,p", 0, (int) M_BLTZL
, INSN_MACRO
, 0, I1
, 0, 0 },
429 {"bltzal", "s,p", 0x40200000, 0xffe00000, RD_1
|WR_31
|CBD
, BD32
, I1
, 0, 0 },
430 {"bltzals", "s,p", 0x42200000, 0xffe00000, RD_1
|WR_31
|CBD
, BD16
, I1
, 0, 0 },
431 {"bltzall", "s,p", 0, (int) M_BLTZALL
, INSN_MACRO
, 0, I1
, 0, 0 },
432 {"bnez", "md,mE", 0xac00, 0xfc00, RD_1
|CBD
, 0, I1
, 0, 0 },
433 {"bnez", "s,p", 0xb4000000, 0xffe00000, RD_1
|CBD
, 0, I1
, 0, 0 },
434 {"bnezl", "s,p", 0, (int) M_BNEL
, INSN_MACRO
, 0, I1
, 0, 0 },
435 {"bne", "md,mz,mE", 0xac00, 0xfc00, RD_1
|CBD
, 0, I1
, 0, 0 }, /* bnez */
436 {"bne", "mz,md,mE", 0xac00, 0xfc00, RD_2
|CBD
, 0, I1
, 0, 0 }, /* bnez */
437 {"bne", "s,t,p", 0xb4000000, 0xfc000000, RD_1
|RD_2
|CBD
, 0, I1
, 0, 0 },
438 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
439 /* BNEZC is next to BNE so that we easily find it when converting a normal
440 branch to a compact one. */
441 {"bnezc", "s,p", 0x40a00000, 0xffe00000, RD_1
|NODS
, CBR
, I1
, 0, 0 },
442 {"bnel", "s,t,p", 0, (int) M_BNEL
, INSN_MACRO
, 0, I1
, 0, 0 },
443 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
444 {"break", "", 0x4680, 0xffff, TRAP
, 0, I1
, 0, 0 },
445 {"break", "", 0x00000007, 0xffffffff, TRAP
, 0, I1
, 0, 0 },
446 {"break", "mF", 0x4680, 0xfff0, TRAP
, 0, I1
, 0, 0 },
447 {"break", "c", 0x00000007, 0xfc00ffff, TRAP
, 0, I1
, 0, 0 },
448 {"break", "c,q", 0x00000007, 0xfc00003f, TRAP
, 0, I1
, 0, 0 },
449 {"c.f.d", "S,T", 0x5400043c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
450 {"c.f.d", "M,S,T", 0x5400043c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
451 {"c.f.s", "S,T", 0x5400003c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
452 {"c.f.s", "M,S,T", 0x5400003c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
453 {"c.f.ps", "S,T", 0x5400083c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
454 {"c.f.ps", "M,S,T", 0x5400083c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
455 {"c.un.d", "S,T", 0x5400047c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
456 {"c.un.d", "M,S,T", 0x5400047c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
457 {"c.un.s", "S,T", 0x5400007c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
458 {"c.un.s", "M,S,T", 0x5400007c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
459 {"c.un.ps", "S,T", 0x5400087c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
460 {"c.un.ps", "M,S,T", 0x5400087c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
461 {"c.eq.d", "S,T", 0x540004bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
462 {"c.eq.d", "M,S,T", 0x540004bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
463 {"c.eq.s", "S,T", 0x540000bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
464 {"c.eq.s", "M,S,T", 0x540000bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
465 {"c.eq.ps", "S,T", 0x540008bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
466 {"c.eq.ps", "M,S,T", 0x540008bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
467 {"c.ueq.d", "S,T", 0x540004fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
468 {"c.ueq.d", "M,S,T", 0x540004fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
469 {"c.ueq.s", "S,T", 0x540000fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
470 {"c.ueq.s", "M,S,T", 0x540000fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
471 {"c.ueq.ps", "S,T", 0x540008fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
472 {"c.ueq.ps", "M,S,T", 0x540008fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
473 {"c.olt.d", "S,T", 0x5400053c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
474 {"c.olt.d", "M,S,T", 0x5400053c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
475 {"c.olt.s", "S,T", 0x5400013c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
476 {"c.olt.s", "M,S,T", 0x5400013c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
477 {"c.olt.ps", "S,T", 0x5400093c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
478 {"c.olt.ps", "M,S,T", 0x5400093c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
479 {"c.ult.d", "S,T", 0x5400057c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
480 {"c.ult.d", "M,S,T", 0x5400057c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
481 {"c.ult.s", "S,T", 0x5400017c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
482 {"c.ult.s", "M,S,T", 0x5400017c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
483 {"c.ult.ps", "S,T", 0x5400097c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
484 {"c.ult.ps", "M,S,T", 0x5400097c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
485 {"c.ole.d", "S,T", 0x540005bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
486 {"c.ole.d", "M,S,T", 0x540005bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
487 {"c.ole.s", "S,T", 0x540001bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
488 {"c.ole.s", "M,S,T", 0x540001bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
489 {"c.ole.ps", "S,T", 0x540009bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
490 {"c.ole.ps", "M,S,T", 0x540009bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
491 {"c.ule.d", "S,T", 0x540005fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
492 {"c.ule.d", "M,S,T", 0x540005fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
493 {"c.ule.s", "S,T", 0x540001fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
494 {"c.ule.s", "M,S,T", 0x540001fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
495 {"c.ule.ps", "S,T", 0x540009fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
496 {"c.ule.ps", "M,S,T", 0x540009fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
497 {"c.sf.d", "S,T", 0x5400063c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
498 {"c.sf.d", "M,S,T", 0x5400063c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
499 {"c.sf.s", "S,T", 0x5400023c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
500 {"c.sf.s", "M,S,T", 0x5400023c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
501 {"c.sf.ps", "S,T", 0x54000a3c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
502 {"c.sf.ps", "M,S,T", 0x54000a3c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
503 {"c.ngle.d", "S,T", 0x5400067c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
504 {"c.ngle.d", "M,S,T", 0x5400067c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
505 {"c.ngle.s", "S,T", 0x5400027c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
506 {"c.ngle.s", "M,S,T", 0x5400027c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
507 {"c.ngle.ps", "S,T", 0x54000a7c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
508 {"c.ngle.ps", "M,S,T", 0x54000a7c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
509 {"c.seq.d", "S,T", 0x540006bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
510 {"c.seq.d", "M,S,T", 0x540006bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
511 {"c.seq.s", "S,T", 0x540002bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
512 {"c.seq.s", "M,S,T", 0x540002bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
513 {"c.seq.ps", "S,T", 0x54000abc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
514 {"c.seq.ps", "M,S,T", 0x54000abc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
515 {"c.ngl.d", "S,T", 0x540006fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
516 {"c.ngl.d", "M,S,T", 0x540006fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
517 {"c.ngl.s", "S,T", 0x540002fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
518 {"c.ngl.s", "M,S,T", 0x540002fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
519 {"c.ngl.ps", "S,T", 0x54000afc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
520 {"c.ngl.ps", "M,S,T", 0x54000afc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
521 {"c.lt.d", "S,T", 0x5400073c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
522 {"c.lt.d", "M,S,T", 0x5400073c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
523 {"c.lt.s", "S,T", 0x5400033c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
524 {"c.lt.s", "M,S,T", 0x5400033c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
525 {"c.lt.ps", "S,T", 0x54000b3c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
526 {"c.lt.ps", "M,S,T", 0x54000b3c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
527 {"c.nge.d", "S,T", 0x5400077c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
528 {"c.nge.d", "M,S,T", 0x5400077c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
529 {"c.nge.s", "S,T", 0x5400037c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
530 {"c.nge.s", "M,S,T", 0x5400037c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
531 {"c.nge.ps", "S,T", 0x54000b7c, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
532 {"c.nge.ps", "M,S,T", 0x54000b7c, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
533 {"c.le.d", "S,T", 0x540007bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
534 {"c.le.d", "M,S,T", 0x540007bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
535 {"c.le.s", "S,T", 0x540003bc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
536 {"c.le.s", "M,S,T", 0x540003bc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
537 {"c.le.ps", "S,T", 0x54000bbc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
538 {"c.le.ps", "M,S,T", 0x54000bbc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
539 {"c.ngt.d", "S,T", 0x540007fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
540 {"c.ngt.d", "M,S,T", 0x540007fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
541 {"c.ngt.s", "S,T", 0x540003fc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
542 {"c.ngt.s", "M,S,T", 0x540003fc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_S
, 0, I1
, 0, 0 },
543 {"c.ngt.ps", "S,T", 0x54000bfc, 0xfc00ffff, RD_1
|RD_2
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
544 {"c.ngt.ps", "M,S,T", 0x54000bfc, 0xfc001fff, RD_2
|RD_3
|WR_CC
|FP_D
, 0, I1
, 0, 0 },
545 {"cache", "k,~(b)", 0x20006000, 0xfc00f000, RD_3
, 0, I1
, 0, 0 },
546 {"cache", "k,A(b)", 0, (int) M_CACHE_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
547 {"ceil.l.d", "T,S", 0x5400533b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
548 {"ceil.l.s", "T,S", 0x5400133b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
549 {"ceil.w.d", "T,S", 0x54005b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
550 {"ceil.w.s", "T,S", 0x54001b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
551 {"cfc1", "t,G", 0x5400103b, 0xfc00ffff, WR_1
|RD_C1
, 0, I1
, 0, 0 },
552 {"cfc1", "t,S", 0x5400103b, 0xfc00ffff, WR_1
|RD_C1
, 0, I1
, 0, 0 },
553 {"cfc2", "t,G", 0x0000cd3c, 0xfc00ffff, WR_1
|RD_C2
, 0, I1
, 0, 0 },
554 {"clo", "t,s", 0x00004b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I1
, 0, 0 },
555 {"clz", "t,s", 0x00005b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I1
, 0, 0 },
556 {"cop2", "C", 0x00000002, 0xfc000007, CP
, 0, I1
, 0, 0 },
557 {"ctc1", "t,G", 0x5400183b, 0xfc00ffff, RD_1
|WR_CC
, 0, I1
, 0, 0 },
558 {"ctc1", "t,S", 0x5400183b, 0xfc00ffff, RD_1
|WR_CC
, 0, I1
, 0, 0 },
559 {"ctc2", "t,G", 0x0000dd3c, 0xfc00ffff, RD_1
|WR_C2
|WR_CC
, 0, I1
, 0, 0 },
560 {"cvt.d.l", "T,S", 0x5400537b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
561 {"cvt.d.s", "T,S", 0x5400137b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
562 {"cvt.d.w", "T,S", 0x5400337b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
563 {"cvt.l.d", "T,S", 0x5400413b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
564 {"cvt.l.s", "T,S", 0x5400013b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
565 {"cvt.s.l", "T,S", 0x54005b7b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
566 {"cvt.s.d", "T,S", 0x54001b7b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
567 {"cvt.s.w", "T,S", 0x54003b7b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
568 {"cvt.s.pl", "T,S", 0x5400213b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
569 {"cvt.s.pu", "T,S", 0x5400293b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
570 {"cvt.w.d", "T,S", 0x5400493b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
571 {"cvt.w.s", "T,S", 0x5400093b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
572 {"cvt.ps.s", "D,V,T", 0x54000180, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
|FP_D
, 0, I1
, 0, 0 },
573 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, 0, I3
, 0, 0 },
574 {"dadd", "d,v,t", 0x58000110, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
575 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
, 0, 0 },
576 {"daddi", "t,r,.", 0x5800001c, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
577 {"daddi", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
, 0, 0 },
578 {"daddiu", "t,r,j", 0x5c000000, 0xfc000000, WR_1
|RD_2
, 0, I3
, 0, 0 },
579 {"daddu", "d,v,t", 0x58000150, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
580 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, 0, I3
, 0, 0 },
581 {"dclo", "t,s", 0x58004b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I3
, 0, 0 },
582 {"dclz", "t,s", 0x58005b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I3
, 0, 0 },
583 {"deret", "", 0x0000e37c, 0xffffffff, NODS
, 0, I1
, 0, 0 },
584 {"dext", "t,r,+A,+H", 0x5800002c, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
585 {"dext", "t,r,+A,+G", 0x58000024, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dextm */
586 {"dext", "t,r,+E,+H", 0x58000014, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dextu */
587 {"dextm", "t,r,+A,+G", 0x58000024, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
588 {"dextu", "t,r,+E,+H", 0x58000014, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
589 /* For ddiv, see the comments about div. */
590 {"ddiv", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, 0 },
591 {"ddiv", "z,t", 0x5800ab3c, 0xfc1fffff, RD_2
|WR_HILO
, 0, I3
, 0, 0 },
592 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, 0, I3
, 0, 0 },
593 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, 0, I3
, 0, 0 },
594 /* For ddivu, see the comments about div. */
595 {"ddivu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, 0 },
596 {"ddivu", "z,t", 0x5800bb3c, 0xfc1fffff, RD_2
|WR_HILO
, 0, I3
, 0, 0 },
597 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, 0, I3
, 0, 0 },
598 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, 0, I3
, 0, 0 },
599 {"di", "", 0x0000477c, 0xffffffff, RD_C0
, 0, I1
, 0, 0 },
600 {"di", "s", 0x0000477c, 0xffe0ffff, WR_1
|RD_C0
, 0, I1
, 0, 0 },
601 {"dins", "t,r,+A,+B", 0x5800000c, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
602 {"dins", "t,r,+A,+F", 0x58000004, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dinsm */
603 {"dins", "t,r,+E,+F", 0x58000034, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dinsu */
604 {"dinsm", "t,r,+A,+F", 0x58000004, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
605 {"dinsu", "t,r,+E,+F", 0x58000034, 0xfc00003f, WR_1
|RD_2
, 0, I3
, 0, 0 },
606 /* The MIPS assembler treats the div opcode with two operands as
607 though the first operand appeared twice (the first operand is both
608 a source and a destination). To get the div machine instruction,
609 you must use an explicit destination of $0. */
610 {"div", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
611 {"div", "z,t", 0x0000ab3c, 0xfc1fffff, RD_2
|WR_HILO
, 0, I1
, 0, 0 },
612 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, 0, I1
, 0, 0 },
613 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
614 {"div.d", "D,V,T", 0x540001f0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
615 {"div.s", "D,V,T", 0x540000f0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
616 /* For divu, see the comments about div. */
617 {"divu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
618 {"divu", "z,t", 0x0000bb3c, 0xfc1fffff, RD_2
|WR_HILO
, 0, I1
, 0, 0 },
619 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, 0, I1
, 0, 0 },
620 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
621 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
622 {"dlca", "t,A(b)", 0, (int) M_DLCA_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
623 {"dli", "t,j", 0x30000000, 0xfc1f0000, WR_1
, 0, I3
, 0, 0 }, /* addiu */
624 {"dli", "t,i", 0x50000000, 0xfc1f0000, WR_1
, 0, I3
, 0, 0 }, /* ori */
625 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, 0, I3
, 0, 0 },
626 {"dmfc0", "t,G", 0x580000fc, 0xfc00ffff, WR_1
|RD_C0
, 0, I3
, 0, 0 },
627 {"dmfc0", "t,G,H", 0x580000fc, 0xfc00c7ff, WR_1
|RD_C0
, 0, I3
, 0, 0 },
628 {"dmfgc0", "t,G", 0x580004fc, 0xfc00ffff, WR_1
|RD_C0
, 0, 0, IVIRT64
, 0 },
629 {"dmfgc0", "t,G,H", 0x580004fc, 0xfc00c7ff, WR_1
|RD_C0
, 0, 0, IVIRT64
, 0 },
630 {"dmtc0", "t,G", 0x580002fc, 0xfc00ffff, RD_1
|WR_C0
|WR_CC
, 0, I3
, 0, 0 },
631 {"dmtc0", "t,G,H", 0x580002fc, 0xfc00c7ff, RD_1
|WR_C0
|WR_CC
, 0, I3
, 0, 0 },
632 {"dmtgc0", "t,G", 0x580006fc, 0xfc00ffff, RD_1
|WR_C0
|WR_CC
, 0, 0, IVIRT64
, 0 },
633 {"dmtgc0", "t,G,H", 0x580006fc, 0xfc00c7ff, RD_1
|WR_C0
|WR_CC
, 0, 0, IVIRT64
, 0 },
634 {"dmfc1", "t,S", 0x5400243b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|LC
, 0, I3
, 0, 0 },
635 {"dmfc1", "t,G", 0x5400243b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|LC
, 0, I3
, 0, 0 },
636 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1
|WR_2
|FP_S
|CM
, 0, I3
, 0, 0 },
637 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1
|WR_2
|FP_S
|CM
, 0, I3
, 0, 0 },
638 {"dmfc2", "t,G", 0x00006d3c, 0xfc00ffff, WR_1
|RD_C2
, 0, I3
, 0, 0 },
639 /*{"dmfc2", "t,G,H", 0x58000283, 0xfc001fff, WR_1|RD_C2, 0, I3, 0, 0 },*/
640 {"dmtc2", "t,G", 0x00007d3c, 0xfc00ffff, RD_1
|WR_C2
|WR_CC
, 0, I3
, 0, 0 },
641 /*{"dmtc2", "t,G,H", 0x58000683, 0xfc001fff, RD_1|WR_C2|WR_CC, 0, I3, 0, 0 },*/
642 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, 0, I3
, 0, 0 },
643 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, 0, I3
, 0, 0 },
644 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, 0, I3
, 0, 0 },
645 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, 0, I3
, 0, 0 },
646 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, 0, I3
, 0, 0 },
647 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, 0, I3
, 0, 0 },
648 {"dmult", "s,t", 0x58008b3c, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, I3
, 0, 0 },
649 {"dmultu", "s,t", 0x58009b3c, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, I3
, 0, 0 },
650 {"dneg", "d,w", 0x58000190, 0xfc1f07ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsub 0 */
651 {"dnegu", "d,w", 0x580001d0, 0xfc1f07ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsubu 0 */
652 {"drem", "z,s,t", 0x5800ab3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, 0 },
653 {"drem", "d,v,t", 0, (int) M_DREM_3
, INSN_MACRO
, 0, I3
, 0, 0 },
654 {"drem", "d,v,I", 0, (int) M_DREM_3I
, INSN_MACRO
, 0, I3
, 0, 0 },
655 {"dremu", "z,s,t", 0x5800bb3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I3
, 0, 0 },
656 {"dremu", "d,v,t", 0, (int) M_DREMU_3
, INSN_MACRO
, 0, I3
, 0, 0 },
657 {"dremu", "d,v,I", 0, (int) M_DREMU_3I
, INSN_MACRO
, 0, I3
, 0, 0 },
658 {"drol", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
, 0, 0 },
659 {"drol", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
, 0, 0 },
660 {"dror", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
, 0, 0 },
661 {"dror", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
, 0, 0 },
662 {"dror", "t,r,<", 0x580000c0, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
663 {"drorv", "d,t,s", 0x580000d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
664 {"dror32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
665 {"drotl", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
, 0, 0 },
666 {"drotl", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
, 0, 0 },
667 {"drotr", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
, 0, 0 },
668 {"drotr", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
, 0, 0 },
669 {"drotrv", "d,t,s", 0x580000d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
670 {"drotr32", "t,r,<", 0x580000c8, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
671 {"dsbh", "t,r", 0x58007b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I3
, 0, 0 },
672 {"dshd", "t,r", 0x5800fb3c, 0xfc00ffff, WR_1
|RD_2
, 0, I3
, 0, 0 },
673 {"dsllv", "d,t,s", 0x58000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
674 {"dsll32", "t,r,<", 0x58000008, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
675 {"dsll", "d,t,s", 0x58000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 }, /* dsllv */
676 {"dsll", "t,r,>", 0x58000008, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsll32 */
677 {"dsll", "t,r,<", 0x58000000, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
678 {"dsrav", "d,t,s", 0x58000090, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
679 {"dsra32", "t,r,<", 0x58000088, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
680 {"dsra", "d,t,s", 0x58000090, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 }, /* dsrav */
681 {"dsra", "t,r,>", 0x58000088, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsra32 */
682 {"dsra", "t,r,<", 0x58000080, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
683 {"dsrlv", "d,t,s", 0x58000050, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
684 {"dsrl32", "t,r,<", 0x58000048, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
685 {"dsrl", "d,t,s", 0x58000050, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 }, /* dsrlv */
686 {"dsrl", "t,r,>", 0x58000048, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 }, /* dsrl32 */
687 {"dsrl", "t,r,<", 0x58000040, 0xfc0007ff, WR_1
|RD_2
, 0, I3
, 0, 0 },
688 {"dsub", "d,v,t", 0x58000190, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
689 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, 0, I3
, 0, 0 },
690 {"dsubu", "d,v,t", 0x580001d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I3
, 0, 0 },
691 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, 0, I3
, 0, 0 },
692 {"ei", "", 0x0000577c, 0xffffffff, WR_C0
, 0, I1
, 0, 0 },
693 {"ei", "s", 0x0000577c, 0xffe0ffff, WR_1
|WR_C0
, 0, I1
, 0, 0 },
694 {"eret", "", 0x0000f37c, 0xffffffff, NODS
, 0, I1
, 0, 0 },
695 {"eretnc", "", 0x0001f37c, 0xffffffff, NODS
, 0, I36
, 0, 0 },
696 {"ext", "t,r,+A,+C", 0x0000002c, 0xfc00003f, WR_1
|RD_2
, 0, I1
, 0, 0 },
697 {"floor.l.d", "T,V", 0x5400433b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
698 {"floor.l.s", "T,V", 0x5400033b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
699 {"floor.w.d", "T,V", 0x54004b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
700 {"floor.w.s", "T,V", 0x54000b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
701 {"hypcall", "", 0x0000c37c, 0xffffffff, TRAP
, 0, 0, IVIRT
, 0 },
702 {"hypcall", "+J", 0x0000c37c, 0xfc00ffff, TRAP
, 0, 0, IVIRT
, 0 },
703 {"ins", "t,r,+A,+B", 0x0000000c, 0xfc00003f, WR_1
|RD_2
, 0, I1
, 0, 0 },
704 {"iret", "", 0x0000d37c, 0xffffffff, NODS
, 0, 0, MC
, 0 },
705 {"jr", "mj", 0x4580, 0xffe0, RD_1
|UBD
, 0, I1
, 0, 0 },
706 {"jr", "s", 0x00000f3c, 0xffe0ffff, RD_1
|UBD
, BD32
, I1
, 0, 0 }, /* jalr */
707 {"jrs", "s", 0x00004f3c, 0xffe0ffff, RD_1
|UBD
, BD16
, I1
, 0, 0 }, /* jalrs */
708 {"jraddiusp", "mP", 0x4700, 0xffe0, NODS
, WR_sp
|RD_31
|RD_sp
|UBR
, I1
, 0, 0 },
709 /* This macro is after the real instruction so that it only matches with
711 {"jraddiusp", "mP", 0, (int) M_JRADDIUSP
, INSN_MACRO
, 0, I1
, 0, 0 },
712 {"jr.hb", "s", 0x00001f3c, 0xffe0ffff, RD_1
|UBD
, BD32
, I1
, 0, 0 }, /* jalr.hb */
713 {"jrs.hb", "s", 0x00005f3c, 0xffe0ffff, RD_1
|UBD
, BD16
, I1
, 0, 0 }, /* jalrs.hb */
714 {"j", "mj", 0x4580, 0xffe0, RD_1
|UBD
, 0, I1
, 0, 0 }, /* jr */
715 {"j", "s", 0x00000f3c, 0xffe0ffff, RD_1
|UBD
, BD32
, I1
, 0, 0 }, /* jr */
716 /* SVR4 PIC code requires special handling for j, so it must be a
718 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, 0, I1
, 0, 0 },
719 /* This form of j is used by the disassembler and internally by the
720 assembler, but will never match user input (because the line above
721 will match first). */
722 {"j", "a", 0xd4000000, 0xfc000000, UBD
, 0, I1
, 0, 0 },
723 /* JRC is close to JR and J so that we easily find it when converting
724 a normal jump to a compact one. */
725 {"jrc", "mj", 0x45a0, 0xffe0, RD_1
|NODS
, UBR
, I1
, 0, 0 },
726 /* This macro is after the real instruction so that it only matches with
728 {"jrc", "s", 0, (int) M_JRC
, INSN_MACRO
, 0, I1
, 0, 0 },
729 {"jalr", "mj", 0x45c0, 0xffe0, RD_1
|WR_31
|UBD
, BD32
, I1
, 0, 0 },
730 {"jalr", "my,mj", 0x45c0, 0xffe0, RD_2
|WR_31
|UBD
, BD32
, I1
, 0, 0 },
731 {"jalr", "s", 0x03e00f3c, 0xffe0ffff, RD_1
|WR_31
|UBD
, BD32
, I1
, 0, 0 },
732 {"jalr", "t,s", 0x00000f3c, 0xfc00ffff, WR_1
|RD_2
|UBD
, BD32
, I1
, 0, 0 },
733 {"jalr.hb", "s", 0x03e01f3c, 0xffe0ffff, RD_1
|WR_31
|UBD
, BD32
, I1
, 0, 0 },
734 {"jalr.hb", "t,s", 0x00001f3c, 0xfc00ffff, WR_1
|RD_2
|UBD
, BD32
, I1
, 0, 0 },
735 {"jalrs", "mj", 0x45e0, 0xffe0, RD_1
|WR_31
|UBD
, BD16
, I1
, 0, 0 },
736 {"jalrs", "my,mj", 0x45e0, 0xffe0, RD_2
|WR_31
|UBD
, BD16
, I1
, 0, 0 },
737 {"jalrs", "s", 0x03e04f3c, 0xffe0ffff, RD_1
|WR_31
|UBD
, BD16
, I1
, 0, 0 },
738 {"jalrs", "t,s", 0x00004f3c, 0xfc00ffff, WR_1
|RD_2
|UBD
, BD16
, I1
, 0, 0 },
739 {"jalrs.hb", "s", 0x03e05f3c, 0xffe0ffff, RD_1
|WR_31
|UBD
, BD16
, I1
, 0, 0 },
740 {"jalrs.hb", "t,s", 0x00005f3c, 0xfc00ffff, WR_1
|RD_2
|UBD
, BD16
, I1
, 0, 0 },
741 /* SVR4 PIC code requires special handling for jal, so it must be a
743 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, 0, I1
, 0, 0 },
744 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, 0, I1
, 0, 0 },
745 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, 0, I1
, 0, 0 },
746 /* This form of jal is used by the disassembler and internally by the
747 assembler, but will never match user input (because the line above
748 will match first). */
749 {"jal", "a", 0xf4000000, 0xfc000000, WR_31
|UBD
, BD32
, I1
, 0, 0 },
750 {"jals", "d,s", 0, (int) M_JALS_2
, INSN_MACRO
, 0, I1
, 0, 0 },
751 {"jals", "s", 0, (int) M_JALS_1
, INSN_MACRO
, 0, I1
, 0, 0 },
752 {"jals", "a", 0, (int) M_JALS_A
, INSN_MACRO
, 0, I1
, 0, 0 },
753 {"jals", "a", 0x74000000, 0xfc000000, WR_31
|UBD
, BD16
, I1
, 0, 0 },
754 {"jalx", "+i", 0xf0000000, 0xfc000000, WR_31
|UBD
, BD32
, I1
, 0, 0 },
755 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
756 {"lb", "t,o(b)", 0x1c000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
757 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
758 {"lbu", "md,mG(ml)", 0x0800, 0xfc00, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
759 {"lbu", "t,o(b)", 0x14000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
760 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
761 {"lca", "t,A(b)", 0, (int) M_LCA_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
762 /* The macro has to be first to handle o32 correctly. */
763 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
764 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
765 {"ldc1", "T,o(b)", 0xbc000000, 0xfc000000, WR_1
|RD_3
|FP_D
|LM
, 0, I1
, 0, 0 },
766 {"ldc1", "E,o(b)", 0xbc000000, 0xfc000000, WR_1
|RD_3
|FP_D
|LM
, 0, I1
, 0, 0 },
767 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
768 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
769 {"ldc2", "E,~(b)", 0x20002000, 0xfc00f000, RD_3
|WR_CC
|LM
, 0, I1
, 0, 0 },
770 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
771 {"l.d", "T,o(b)", 0xbc000000, 0xfc000000, WR_1
|RD_3
|FP_D
|LM
, 0, I1
, 0, 0 }, /* ldc1 */
772 {"l.d", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
773 {"ldl", "t,~(b)", 0x60004000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
774 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
775 {"ldm", "n,~(b)", 0x20007000, 0xfc00f000, RD_3
|LM
, 0, I3
, 0, 0 },
776 {"ldm", "n,A(b)", 0, (int) M_LDM_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
777 {"ldp", "t,~(b)", 0x20004000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
778 {"ldp", "t,A(b)", 0, (int) M_LDP_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
779 {"ldr", "t,~(b)", 0x60005000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
780 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
781 {"ldxc1", "D,t(b)", 0x540000c8, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
|LM
, 0, I1
, 0, 0 },
782 {"lh", "t,o(b)", 0x3c000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
783 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
784 {"lhu", "md,mH(ml)", 0x2800, 0xfc00, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
785 {"lhu", "t,o(b)", 0x34000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
786 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
787 /* li is at the start of the table. */
788 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
789 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
790 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
791 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
792 {"ll", "t,~(b)", 0x60003000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
793 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
794 {"lld", "t,~(b)", 0x60007000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
795 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
796 {"lui", "s,u", 0x41a00000, 0xffe00000, WR_1
, 0, I1
, 0, 0 },
797 {"luxc1", "D,t(b)", 0x54000148, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
|LM
, 0, I1
, 0, 0 },
798 {"lw", "md,mJ(ml)", 0x6800, 0xfc00, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
799 {"lw", "mp,mU(ms)", 0x4800, 0xfc00, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 }, /* lwsp */
800 {"lw", "md,mA(ma)", 0x6400, 0xfc00, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 }, /* lwgp */
801 {"lw", "t,o(b)", 0xfc000000, 0xfc000000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
802 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
803 {"lwc1", "T,o(b)", 0x9c000000, 0xfc000000, WR_1
|RD_3
|FP_S
|LM
, 0, I1
, 0, 0 },
804 {"lwc1", "E,o(b)", 0x9c000000, 0xfc000000, WR_1
|RD_3
|FP_S
|LM
, 0, I1
, 0, 0 },
805 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
806 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
807 {"lwc2", "E,~(b)", 0x20000000, 0xfc00f000, RD_3
|WR_CC
|LM
, 0, I1
, 0, 0 },
808 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
809 {"l.s", "T,o(b)", 0x9c000000, 0xfc000000, WR_1
|RD_3
|FP_S
|LM
, 0, I1
, 0, 0 }, /* lwc1 */
810 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
811 {"lwl", "t,~(b)", 0x60000000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
812 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
813 {"lcache", "t,~(b)", 0x60000000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 }, /* same */
814 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
815 {"lwm", "mN,mJ(ms)", 0x4500, 0xffc0, RD_3
|NODS
|LM
, 0, I1
, 0, 0 },
816 {"lwm", "n,~(b)", 0x20005000, 0xfc00f000, RD_3
|NODS
|LM
, 0, I1
, 0, 0 },
817 {"lwm", "n,A(b)", 0, (int) M_LWM_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
818 {"lwp", "t,~(b)", 0x20001000, 0xfc00f000, WR_1
|RD_3
|NODS
|LM
, 0, I1
, 0, 0 },
819 {"lwp", "t,A(b)", 0, (int) M_LWP_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
820 {"lwr", "t,~(b)", 0x60001000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I1
, 0, 0 },
821 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
822 {"lwu", "t,~(b)", 0x6000e000, 0xfc00f000, WR_1
|RD_3
|LM
, 0, I3
, 0, 0 },
823 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
824 {"lwxc1", "D,t(b)", 0x54000048, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
|LM
, 0, I1
, 0, 0 },
825 {"flush", "t,~(b)", 0x60001000, 0xfc00f000, WR_1
|RD_3
, 0, I1
, 0, 0 }, /* same */
826 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
827 {"lwxs", "d,t(b)", 0x00000118, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, I1
, 0, 0 },
828 {"madd", "s,t", 0x0000cb3c, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I1
, 0, 0 },
829 {"madd", "7,s,t", 0x00000abc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
830 {"madd.d", "D,R,S,T", 0x54000009, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
831 {"madd.s", "D,R,S,T", 0x54000001, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I1
, 0, 0 },
832 {"madd.ps", "D,R,S,T", 0x54000011, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
833 {"maddu", "s,t", 0x0000db3c, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I1
, 0, 0 },
834 {"maddu", "7,s,t", 0x00001abc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
835 {"mfc0", "t,G", 0x000000fc, 0xfc00ffff, WR_1
|RD_C0
, 0, I1
, 0, 0 },
836 {"mfc0", "t,G,H", 0x000000fc, 0xfc00c7ff, WR_1
|RD_C0
, 0, I1
, 0, 0 },
837 {"mfc1", "t,S", 0x5400203b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|LC
, 0, I1
, 0, 0 },
838 {"mfc1", "t,G", 0x5400203b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|LC
, 0, I1
, 0, 0 },
839 {"mfc2", "t,G", 0x00004d3c, 0xfc00ffff, WR_1
|RD_C2
, 0, I1
, 0, 0 },
840 {"mfgc0", "t,G", 0x000004fc, 0xfc00ffff, WR_1
|RD_C0
, 0, 0, IVIRT
, 0 },
841 {"mfgc0", "t,G,H", 0x000004fc, 0xfc00c7ff, WR_1
|RD_C0
, 0, 0, IVIRT
, 0 },
842 {"mfhc0", "t,G", 0x000000f4, 0xfc00ffff, WR_1
|RD_C0
, 0, 0, XPA
, 0 },
843 {"mfhc0", "t,G,H", 0x000000f4, 0xfc00c7ff, WR_1
|RD_C0
, 0, 0, XPA
, 0 },
844 {"mfhgc0", "t,G", 0x000004f4, 0xfc00ffff, WR_1
|RD_C0
, 0, 0, XPAVZ
, 0 },
845 {"mfhgc0", "t,G,H", 0x000004f4, 0xfc00c7ff, WR_1
|RD_C0
, 0, 0, XPAVZ
, 0 },
846 {"mfhc1", "t,S", 0x5400303b, 0xfc00ffff, WR_1
|RD_2
|FP_D
|LC
, 0, I1
, 0, 0 },
847 {"mfhc1", "t,G", 0x5400303b, 0xfc00ffff, WR_1
|RD_2
|FP_D
|LC
, 0, I1
, 0, 0 },
848 {"mfhc2", "t,G", 0x00008d3c, 0xfc00ffff, WR_1
|RD_C2
, 0, I1
, 0, 0 },
849 {"mfhi", "mj", 0x4600, 0xffe0, WR_1
|RD_HI
, 0, I1
, 0, 0 },
850 {"mfhi", "s", 0x00000d7c, 0xffe0ffff, WR_1
|RD_HI
, 0, I1
, 0, 0 },
851 {"mfhi", "s,7", 0x0000007c, 0xffe03fff, WR_1
|RD_HI
, 0, 0, D32
, 0 },
852 {"mflo", "mj", 0x4640, 0xffe0, WR_1
|RD_LO
, 0, I1
, 0, 0 },
853 {"mflo", "s", 0x00001d7c, 0xffe0ffff, WR_1
|RD_LO
, 0, I1
, 0, 0 },
854 {"mflo", "s,7", 0x0000107c, 0xffe03fff, WR_1
|RD_LO
, 0, 0, D32
, 0 },
855 {"mov.d", "T,S", 0x5400207b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
856 {"mov.s", "T,S", 0x5400007b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
857 {"mov.ps", "T,S", 0x5400407b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
858 {"movep", "mh,mm,mn", 0x8400, 0xfc01, WR_1
|RD_2
|RD_3
|NODS
, 0, I1
, 0, 0 },
859 /* This macro is after the real instruction so that it only matches with
861 {"movep", "mh,mm,mn", 0, (int) M_MOVEP
, INSN_MACRO
, 0, I1
, 0, 0 },
862 {"movf", "t,s,M", 0x5400017b, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_S
|FP_D
, 0, I1
, 0, 0 },
863 {"movf.d", "T,S,M", 0x54000220, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I1
, 0, 0 },
864 {"movf.s", "T,S,M", 0x54000020, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_S
, 0, I1
, 0, 0 },
865 {"movf.ps", "T,S,M", 0x54000420, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I1
, 0, 0 },
866 {"movn", "d,v,t", 0x00000018, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
867 {"movn.d", "D,S,t", 0x54000138, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
868 {"movn.s", "D,S,t", 0x54000038, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
869 {"movn.ps", "D,S,t", 0x54000238, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
870 {"movt", "t,s,M", 0x5400097b, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_S
|FP_D
, 0, I1
, 0, 0 },
871 {"movt.d", "T,S,M", 0x54000260, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I1
, 0, 0 },
872 {"movt.s", "T,S,M", 0x54000060, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_S
, 0, I1
, 0, 0 },
873 {"movt.ps", "T,S,M", 0x54000460, 0xfc001fff, WR_1
|RD_2
|RD_CC
|FP_D
, 0, I1
, 0, 0 },
874 {"movz", "d,v,t", 0x00000058, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
875 {"movz.d", "D,S,t", 0x54000178, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
876 {"movz.s", "D,S,t", 0x54000078, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
877 {"movz.ps", "D,S,t", 0x54000278, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
878 {"msub", "s,t", 0x0000eb3c, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I1
, 0, 0 },
879 {"msub", "7,s,t", 0x00002abc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
880 {"msub.d", "D,R,S,T", 0x54000029, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
881 {"msub.s", "D,R,S,T", 0x54000021, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I1
, 0, 0 },
882 {"msub.ps", "D,R,S,T", 0x54000031, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
883 {"msubu", "s,t", 0x0000fb3c, 0xfc00ffff, RD_1
|RD_2
|MOD_HILO
, 0, I1
, 0, 0 },
884 {"msubu", "7,s,t", 0x00003abc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
885 {"mtc0", "t,G", 0x000002fc, 0xfc00ffff, RD_1
|WR_C0
|WR_CC
, 0, I1
, 0, 0 },
886 {"mtc0", "t,G,H", 0x000002fc, 0xfc00c7ff, RD_1
|WR_C0
|WR_CC
, 0, I1
, 0, 0 },
887 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1
|WR_2
|FP_S
|CM
, 0, I1
, 0, 0 },
888 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1
|WR_2
|FP_S
|CM
, 0, I1
, 0, 0 },
889 {"mtc2", "t,G", 0x00005d3c, 0xfc00ffff, RD_1
|WR_C2
|WR_CC
, 0, I1
, 0, 0 },
890 {"mtgc0", "t,G", 0x000006fc, 0xfc00ffff, RD_1
|WR_C0
|WR_CC
, 0, 0, IVIRT
, 0 },
891 {"mtgc0", "t,G,H", 0x000006fc, 0xfc00c7ff, RD_1
|WR_C0
|WR_CC
, 0, 0, IVIRT
, 0 },
892 {"mthc0", "t,G", 0x000002f4, 0xfc00ffff, RD_1
|WR_C0
|WR_CC
, 0, 0, XPA
, 0 },
893 {"mthc0", "t,G,H", 0x000002f4, 0xfc00c7ff, RD_1
|WR_C0
|WR_CC
, 0, 0, XPA
, 0 },
894 {"mthgc0", "t,G", 0x000006f4, 0xfc00ffff, RD_1
|WR_C0
|WR_CC
, 0, 0, XPAVZ
, 0 },
895 {"mthgc0", "t,G,H", 0x000006f4, 0xfc00c7ff, RD_1
|WR_C0
|WR_CC
, 0, 0, XPAVZ
, 0 },
896 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1
|WR_2
|FP_D
|CM
, 0, I1
, 0, 0 },
897 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1
|WR_2
|FP_D
|CM
, 0, I1
, 0, 0 },
898 {"mthc2", "t,G", 0x00009d3c, 0xfc00ffff, RD_1
|WR_C2
|WR_CC
, 0, I1
, 0, 0 },
899 {"mthi", "s", 0x00002d7c, 0xffe0ffff, RD_1
|WR_HI
, 0, I1
, 0, 0 },
900 {"mthi", "s,7", 0x0000207c, 0xffe03fff, RD_1
|WR_HI
, 0, 0, D32
, 0 },
901 {"mtlo", "s", 0x00003d7c, 0xffe0ffff, RD_1
|WR_LO
, 0, I1
, 0, 0 },
902 {"mtlo", "s,7", 0x0000307c, 0xffe03fff, RD_1
|WR_LO
, 0, 0, D32
, 0 },
903 {"mul", "d,v,t", 0x00000210, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
904 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
905 {"mul.d", "D,V,T", 0x540001b0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
906 {"mul.s", "D,V,T", 0x540000b0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
907 {"mul.ps", "D,V,T", 0x540002b0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
908 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, 0, I1
, 0, 0 },
909 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, 0, I1
, 0, 0 },
910 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, 0, I1
, 0, 0 },
911 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
912 {"mult", "s,t", 0x00008b3c, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, I1
, 0, 0 },
913 {"mult", "7,s,t", 0x00000cbc, 0xfc003fff, RD_2
|RD_3
|WR_a
, 0, 0, D32
, 0 },
914 {"multu", "s,t", 0x00009b3c, 0xfc00ffff, RD_1
|RD_2
|WR_HILO
, 0, I1
, 0, 0 },
915 {"multu", "7,s,t", 0x00001cbc, 0xfc003fff, RD_2
|RD_3
|WR_a
, 0, 0, D32
, 0 },
916 {"neg", "d,w", 0x00000190, 0xfc1f07ff, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* sub 0 */
917 {"negu", "d,w", 0x000001d0, 0xfc1f07ff, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* subu 0 */
918 {"neg.d", "T,V", 0x54002b7b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
919 {"neg.s", "T,V", 0x54000b7b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
920 {"neg.ps", "T,V", 0x54004b7b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
921 {"nmadd.d", "D,R,S,T", 0x5400000a, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
922 {"nmadd.s", "D,R,S,T", 0x54000002, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I1
, 0, 0 },
923 {"nmadd.ps", "D,R,S,T", 0x54000012, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
924 {"nmsub.d", "D,R,S,T", 0x5400002a, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
925 {"nmsub.s", "D,R,S,T", 0x54000022, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_S
, 0, I1
, 0, 0 },
926 {"nmsub.ps", "D,R,S,T", 0x54000032, 0xfc00003f, WR_1
|RD_2
|RD_3
|RD_4
|FP_D
, 0, I1
, 0, 0 },
927 /* nop is at the start of the table. */
928 {"not", "mf,mg", 0x4400, 0xffc0, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* put not before nor */
929 {"not", "d,v", 0x000002d0, 0xffe007ff, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* nor d,s,0 */
930 {"nor", "mf,mz,mg", 0x4400, 0xffc0, WR_1
|RD_3
, 0, I1
, 0, 0 }, /* not */
931 {"nor", "mf,mg,mz", 0x4400, 0xffc0, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* not */
932 {"nor", "d,v,t", 0x000002d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
933 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
934 {"or", "mp,mj,mz", 0x0c00, 0xfc00, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* move */
935 {"or", "mp,mz,mj", 0x0c00, 0xfc00, WR_1
|RD_3
, 0, I1
, 0, 0 }, /* move */
936 {"or", "mf,mt,mg", 0x44c0, 0xffc0, MOD_1
|RD_3
, 0, I1
, 0, 0 },
937 {"or", "mf,mg,mx", 0x44c0, 0xffc0, MOD_1
|RD_2
, 0, I1
, 0, 0 },
938 {"or", "d,v,t", 0x00000290, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
939 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
940 {"ori", "mp,mj,mZ", 0x0c00, 0xfc00, WR_1
|RD_2
, 0, I1
, 0, 0 }, /* move */
941 {"ori", "t,r,i", 0x50000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
942 {"pll.ps", "D,V,T", 0x54000080, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
943 {"plu.ps", "D,V,T", 0x540000c0, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
944 {"pul.ps", "D,V,T", 0x54000100, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
945 {"puu.ps", "D,V,T", 0x54000140, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
946 /* pref is at the start of the table. */
947 {"recip.d", "T,S", 0x5400523b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
948 {"recip.s", "T,S", 0x5400123b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
949 {"rem", "z,s,t", 0x0000ab3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
950 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, 0, I1
, 0, 0 },
951 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
952 {"remu", "z,s,t", 0x0000bb3c, 0xfc00ffff, RD_2
|RD_3
|WR_HILO
, 0, I1
, 0, 0 },
953 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, 0, I1
, 0, 0 },
954 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, 0, I1
, 0, 0 },
955 {"rdhwr", "t,K", 0x00006b3c, 0xfc00ffff, WR_1
, 0, I1
, 0, 0 },
956 {"rdpgpr", "t,r", 0x0000e17c, 0xfc00ffff, WR_1
, 0, I1
, 0, 0 },
957 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
, 0, 0 },
958 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
959 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
, 0, 0 },
960 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
961 {"ror", "t,r,<", 0x000000c0, 0xfc0007ff, WR_1
|RD_2
, 0, I1
, 0, 0 },
962 {"rorv", "d,t,s", 0x000000d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
963 {"rotl", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
, 0, 0 },
964 {"rotl", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
, 0, 0 },
965 {"rotr", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
, 0, 0 },
966 {"rotr", "t,r,<", 0x000000c0, 0xfc0007ff, WR_1
|RD_2
, 0, I1
, 0, 0 },
967 {"rotrv", "d,t,s", 0x000000d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
968 {"round.l.d", "T,S", 0x5400733b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
969 {"round.l.s", "T,S", 0x5400333b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
970 {"round.w.d", "T,S", 0x54007b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
971 {"round.w.s", "T,S", 0x54003b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
972 {"rsqrt.d", "T,S", 0x5400423b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
973 {"rsqrt.s", "T,S", 0x5400023b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
974 {"sb", "mq,mL(ml)", 0x8800, 0xfc00, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
975 {"sb", "t,o(b)", 0x18000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
976 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
977 {"sc", "t,~(b)", 0x6000b000, 0xfc00f000, MOD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
978 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
979 {"scd", "t,~(b)", 0x6000f000, 0xfc00f000, MOD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
980 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
981 /* The macro has to be first to handle o32 correctly. */
982 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
983 {"sd", "t,o(b)", 0xd8000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
984 {"sdbbp", "", 0x46c0, 0xffff, TRAP
, 0, I1
, 0, 0 },
985 {"sdbbp", "", 0x0000db7c, 0xffffffff, TRAP
, 0, I1
, 0, 0 },
986 {"sdbbp", "mO", 0x46c0, 0xfff0, TRAP
, 0, I1
, 0, 0 },
987 {"sdbbp", "+J", 0x0000db7c, 0xfc00ffff, TRAP
, 0, I1
, 0, 0 },
988 {"sdc1", "T,o(b)", 0xb8000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_D
, 0, I1
, 0, 0 },
989 {"sdc1", "E,o(b)", 0xb8000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_D
, 0, I1
, 0, 0 },
990 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
991 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
992 {"sdc2", "E,~(b)", 0x2000a000, 0xfc00f000, RD_3
|RD_C2
|SM
, 0, I1
, 0, 0 },
993 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
994 {"s.d", "T,o(b)", 0xb8000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_D
, 0, I1
, 0, 0 }, /* sdc1 */
995 {"s.d", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, INSN2_M_FP_D
, I1
, 0, 0 },
996 {"sdl", "t,~(b)", 0x6000c000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
997 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
998 {"sdm", "n,~(b)", 0x2000f000, 0xfc00f000, RD_3
|SM
, 0, I3
, 0, 0 },
999 {"sdm", "n,A(b)", 0, (int) M_SDM_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1000 {"sdp", "t,~(b)", 0x2000c000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
1001 {"sdp", "t,A(b)", 0, (int) M_SDP_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1002 {"sdr", "t,~(b)", 0x6000d000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I3
, 0, 0 },
1003 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1004 {"sdxc1", "D,t(b)", 0x54000108, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
|FP_D
, 0, I1
, 0, 0 },
1005 {"seb", "t,r", 0x00002b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I1
, 0, 0 },
1006 {"seh", "t,r", 0x00003b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I1
, 0, 0 },
1007 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, 0, I1
, 0, 0 },
1008 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1009 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, 0, I1
, 0, 0 },
1010 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1011 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, 0, I1
, 0, 0 },
1012 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1013 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, 0, I1
, 0, 0 },
1014 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1015 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, 0, I1
, 0, 0 },
1016 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1017 {"sh", "mq,mH(ml)", 0xa800, 0xfc00, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1018 {"sh", "t,o(b)", 0x38000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1019 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1020 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, 0, I1
, 0, 0 },
1021 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1022 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, 0, I1
, 0, 0 },
1023 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1024 {"sllv", "d,t,s", 0x00000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1025 {"sll", "md,mc,mM", 0x2400, 0xfc01, WR_1
|RD_2
, 0, I1
, 0, 0 },
1026 {"sll", "d,w,s", 0x00000010, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 }, /* sllv */
1027 {"sll", "t,r,<", 0x00000000, 0xfc0007ff, WR_1
|RD_2
, 0, I1
, 0, 0 },
1028 {"slt", "d,v,t", 0x00000350, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1029 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1030 {"slti", "t,r,j", 0x90000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1031 {"sltiu", "t,r,j", 0xb0000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1032 {"sltu", "d,v,t", 0x00000390, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1033 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1034 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, 0, I1
, 0, 0 },
1035 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1036 {"sqrt.d", "T,S", 0x54004a3b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
1037 {"sqrt.s", "T,S", 0x54000a3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
1038 {"srav", "d,t,s", 0x00000090, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1039 {"sra", "d,w,s", 0x00000090, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 }, /* srav */
1040 {"sra", "t,r,<", 0x00000080, 0xfc0007ff, WR_1
|RD_2
, 0, I1
, 0, 0 },
1041 {"srlv", "d,t,s", 0x00000050, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1042 {"srl", "md,mc,mM", 0x2401, 0xfc01, WR_1
|RD_2
, 0, I1
, 0, 0 },
1043 {"srl", "d,w,s", 0x00000050, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 }, /* srlv */
1044 {"srl", "t,r,<", 0x00000040, 0xfc0007ff, WR_1
|RD_2
, 0, I1
, 0, 0 },
1045 /* ssnop is at the start of the table. */
1046 {"sub", "d,v,t", 0x00000190, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1047 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1048 {"sub.d", "D,V,T", 0x54000170, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
1049 {"sub.s", "D,V,T", 0x54000070, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_S
, 0, I1
, 0, 0 },
1050 {"sub.ps", "D,V,T", 0x54000270, 0xfc0007ff, WR_1
|RD_2
|RD_3
|FP_D
, 0, I1
, 0, 0 },
1051 {"subu", "md,me,ml", 0x0401, 0xfc01, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1052 {"subu", "d,v,t", 0x000001d0, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1053 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1054 {"suxc1", "D,t(b)", 0x54000188, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
|FP_D
, 0, I1
, 0, 0 },
1055 {"sw", "mq,mJ(ml)", 0xe800, 0xfc00, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1056 {"sw", "mp,mU(ms)", 0xc800, 0xfc00, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 }, /* swsp */
1057 {"sw", "t,o(b)", 0xf8000000, 0xfc000000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1058 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1059 {"swc1", "T,o(b)", 0x98000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 },
1060 {"swc1", "E,o(b)", 0x98000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 },
1061 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1062 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1063 {"swc2", "E,~(b)", 0x20008000, 0xfc00f000, RD_3
|RD_C2
|SM
, 0, I1
, 0, 0 },
1064 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1065 {"s.s", "T,o(b)", 0x98000000, 0xfc000000, RD_1
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 }, /* swc1 */
1066 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, INSN2_M_FP_S
, I1
, 0, 0 },
1067 {"swl", "t,~(b)", 0x60008000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1068 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1069 {"scache", "t,~(b)", 0x60008000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 }, /* same */
1070 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1071 {"swm", "mN,mJ(ms)", 0x4540, 0xffc0, RD_3
|NODS
, 0, I1
, 0, 0 },
1072 {"swm", "n,~(b)", 0x2000d000, 0xfc00f000, RD_3
|SM
|NODS
, 0, I1
, 0, 0 },
1073 {"swm", "n,A(b)", 0, (int) M_SWM_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1074 {"swp", "t,~(b)", 0x20009000, 0xfc00f000, RD_1
|RD_3
|SM
|NODS
, 0, I1
, 0, 0 },
1075 {"swp", "t,A(b)", 0, (int) M_SWP_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1076 {"swr", "t,~(b)", 0x60009000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 },
1077 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1078 {"invalidate", "t,~(b)", 0x60009000, 0xfc00f000, RD_1
|RD_3
|SM
, 0, I1
, 0, 0 }, /* same */
1079 {"invalidate", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1080 {"swxc1", "D,t(b)", 0x54000088, 0xfc0007ff, RD_1
|RD_2
|RD_3
|SM
|FP_S
, 0, I1
, 0, 0 },
1081 {"sync_acquire", "", 0x00116b7c, 0xffffffff, NODS
, INSN2_ALIAS
, I1
, 0, 0 },
1082 {"sync_mb", "", 0x00106b7c, 0xffffffff, NODS
, INSN2_ALIAS
, I1
, 0, 0 },
1083 {"sync_release", "", 0x00126b7c, 0xffffffff, NODS
, INSN2_ALIAS
, I1
, 0, 0 },
1084 {"sync_rmb", "", 0x00136b7c, 0xffffffff, NODS
, INSN2_ALIAS
, I1
, 0, 0 },
1085 {"sync_wmb", "", 0x00046b7c, 0xffffffff, NODS
, INSN2_ALIAS
, I1
, 0, 0 },
1086 {"sync", "", 0x00006b7c, 0xffffffff, NODS
, 0, I1
, 0, 0 },
1087 {"sync", "1", 0x00006b7c, 0xffe0ffff, NODS
, 0, I1
, 0, 0 },
1088 {"synci", "o(b)", 0x42000000, 0xffe00000, RD_2
|SM
, 0, I1
, 0, 0 },
1089 {"syscall", "", 0x00008b7c, 0xffffffff, TRAP
, 0, I1
, 0, 0 },
1090 {"syscall", "+J", 0x00008b7c, 0xfc00ffff, TRAP
, 0, I1
, 0, 0 },
1091 {"teqi", "s,j", 0x41c00000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 },
1092 {"teq", "s,t", 0x0000003c, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1093 {"teq", "s,t,|", 0x0000003c, 0xfc000fff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1094 {"teq", "s,j", 0x41c00000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 }, /* teqi */
1095 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1096 {"tgei", "s,j", 0x41200000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 },
1097 {"tge", "s,t", 0x0000023c, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1098 {"tge", "s,t,|", 0x0000023c, 0xfc000fff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1099 {"tge", "s,j", 0x41200000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 }, /* tgei */
1100 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1101 {"tgeiu", "s,j", 0x41600000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 },
1102 {"tgeu", "s,t", 0x0000043c, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1103 {"tgeu", "s,t,|", 0x0000043c, 0xfc000fff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1104 {"tgeu", "s,j", 0x41600000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 }, /* tgeiu */
1105 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1106 {"tlbinv", "", 0x0000437c, 0xffffffff, INSN_TLB
, 0, 0, TLBINV
, 0 },
1107 {"tlbinvf", "", 0x0000537c, 0xffffffff, INSN_TLB
, 0, 0, TLBINV
, 0 },
1108 {"tlbginv", "", 0x0000417c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1109 {"tlbginvf", "", 0x0000517c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1110 {"tlbgp", "", 0x0000017c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1111 {"tlbgr", "", 0x0000117c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1112 {"tlbgwi", "", 0x0000217c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1113 {"tlbgwr", "", 0x0000317c, 0xffffffff, INSN_TLB
, 0, 0, IVIRT
, 0 },
1114 {"tlbp", "", 0x0000037c, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1115 {"tlbr", "", 0x0000137c, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1116 {"tlbwi", "", 0x0000237c, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1117 {"tlbwr", "", 0x0000337c, 0xffffffff, INSN_TLB
, 0, I1
, 0, 0 },
1118 {"tlti", "s,j", 0x41000000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 },
1119 {"tlt", "s,t", 0x0000083c, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1120 {"tlt", "s,t,|", 0x0000083c, 0xfc000fff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1121 {"tlt", "s,j", 0x41000000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 }, /* tlti */
1122 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1123 {"tltiu", "s,j", 0x41400000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 },
1124 {"tltu", "s,t", 0x00000a3c, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1125 {"tltu", "s,t,|", 0x00000a3c, 0xfc000fff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1126 {"tltu", "s,j", 0x41400000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 }, /* tltiu */
1127 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1128 {"tnei", "s,j", 0x41800000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 },
1129 {"tne", "s,t", 0x00000c3c, 0xfc00ffff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1130 {"tne", "s,t,|", 0x00000c3c, 0xfc000fff, RD_1
|RD_2
|TRAP
, 0, I1
, 0, 0 },
1131 {"tne", "s,j", 0x41800000, 0xffe00000, RD_1
|TRAP
, 0, I1
, 0, 0 }, /* tnei */
1132 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1133 {"trunc.l.d", "T,S", 0x5400633b, 0xfc00ffff, WR_1
|RD_2
|FP_D
, 0, I1
, 0, 0 },
1134 {"trunc.l.s", "T,S", 0x5400233b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
1135 {"trunc.w.d", "T,S", 0x54006b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
|FP_D
, 0, I1
, 0, 0 },
1136 {"trunc.w.s", "T,S", 0x54002b3b, 0xfc00ffff, WR_1
|RD_2
|FP_S
, 0, I1
, 0, 0 },
1137 {"uld", "t,A(b)", 0, (int) M_ULD_AB
, INSN_MACRO
, 0, I3
, 0, 0 },
1138 {"ulh", "t,A(b)", 0, (int) M_ULH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1139 {"ulhu", "t,A(b)", 0, (int) M_ULHU_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1140 {"ulw", "t,A(b)", 0, (int) M_ULW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1141 {"usd", "t,A(b)", 0, (int) M_USD_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1142 {"ush", "t,A(b)", 0, (int) M_USH_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1143 {"usw", "t,A(b)", 0, (int) M_USW_AB
, INSN_MACRO
, 0, I1
, 0, 0 },
1144 {"wait", "", 0x0000937c, 0xffffffff, NODS
, 0, I1
, 0, 0 },
1145 {"wait", "+J", 0x0000937c, 0xfc00ffff, NODS
, 0, I1
, 0, 0 },
1146 {"wrpgpr", "t,r", 0x0000f17c, 0xfc00ffff, RD_2
, 0, I1
, 0, 0 },
1147 {"wsbh", "t,r", 0x00007b3c, 0xfc00ffff, WR_1
|RD_2
, 0, I1
, 0, 0 },
1148 {"xor", "mf,mt,mg", 0x4440, 0xffc0, MOD_1
|RD_3
, 0, I1
, 0, 0 },
1149 {"xor", "mf,mg,mx", 0x4440, 0xffc0, MOD_1
|RD_2
, 0, I1
, 0, 0 },
1150 {"xor", "d,v,t", 0x00000310, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, I1
, 0, 0 },
1151 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, 0, I1
, 0, 0 },
1152 {"xori", "t,r,i", 0x70000000, 0xfc000000, WR_1
|RD_2
, 0, I1
, 0, 0 },
1153 /* microMIPS Enhanced VA Scheme */
1154 {"lbue", "t,+j(b)", 0x60006000, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1155 {"lbue", "t,A(b)", 0, (int) M_LBUE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1156 {"lhue", "t,+j(b)", 0x60006200, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1157 {"lhue", "t,A(b)", 0, (int) M_LHUE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1158 {"lbe", "t,+j(b)", 0x60006800, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1159 {"lbe", "t,A(b)", 0, (int) M_LBE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1160 {"lhe", "t,+j(b)", 0x60006a00, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1161 {"lhe", "t,A(b)", 0, (int) M_LHE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1162 {"lle", "t,+j(b)", 0x60006c00, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1163 {"lle", "t,A(b)", 0, (int) M_LLE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1164 {"lwe", "t,+j(b)", 0x60006e00, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1165 {"lwe", "t,A(b)", 0, (int) M_LWE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1166 {"lwle", "t,+j(b)", 0x60006400, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1167 {"lwle", "t,A(b)", 0, (int) M_LWLE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1168 {"lwre", "t,+j(b)", 0x60006600, 0xfc00fe00, WR_1
|RD_3
|LM
, 0, 0, EVA
, 0 },
1169 {"lwre", "t,A(b)", 0, (int) M_LWRE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1170 {"sbe", "t,+j(b)", 0x6000a800, 0xfc00fe00, WR_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
1171 {"sbe", "t,A(b)", 0, (int) M_SBE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1172 {"sce", "t,+j(b)", 0x6000ac00, 0xfc00fe00, MOD_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
1173 {"sce", "t,A(b)", 0, (int) M_SCE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1174 {"she", "t,+j(b)", 0x6000aa00, 0xfc00fe00, WR_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
1175 {"she", "t,A(b)", 0, (int) M_SHE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1176 {"swe", "t,+j(b)", 0x6000ae00, 0xfc00fe00, WR_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
1177 {"swe", "t,A(b)", 0, (int) M_SWE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1178 {"swle", "t,+j(b)", 0x6000a000, 0xfc00fe00, WR_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
1179 {"swle", "t,A(b)", 0, (int) M_SWLE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1180 {"swre", "t,+j(b)", 0x6000a200, 0xfc00fe00, WR_1
|RD_3
|SM
, 0, 0, EVA
, 0 },
1181 {"swre", "t,A(b)", 0, (int) M_SWRE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1182 {"cachee", "k,+j(b)", 0x6000a600, 0xfc00fe00, RD_3
, 0, 0, EVA
, 0 },
1183 {"cachee", "k,A(b)", 0, (int) M_CACHEE_AB
,INSN_MACRO
, 0, 0, EVA
, 0 },
1184 {"prefe", "k,+j(b)", 0x6000a400, 0xfc00fe00, RD_3
|LM
, 0, 0, EVA
, 0 },
1185 {"prefe", "k,A(b)", 0, (int) M_PREFE_AB
, INSN_MACRO
, 0, 0, EVA
, 0 },
1187 {"absq_s.ph", "t,s", 0x0000113c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1188 {"absq_s.w", "t,s", 0x0000213c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1189 {"addq.ph", "d,s,t", 0x0000000d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1190 {"addq_s.ph", "d,s,t", 0x0000040d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1191 {"addq_s.w", "d,s,t", 0x00000305, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1192 {"addsc", "d,s,t", 0x00000385, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1193 {"addu.qb", "d,s,t", 0x000000cd, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1194 {"addu_s.qb", "d,s,t", 0x000004cd, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1195 {"addwc", "d,s,t", 0x000003c5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1196 {"bitrev", "t,s", 0x0000313c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1197 {"bposge32", "p", 0x43600000, 0xffff0000, CBD
, 0, 0, D32
, 0 },
1198 {"cmp.eq.ph", "s,t", 0x00000005, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
1199 {"cmpgu.eq.qb", "d,s,t", 0x000000c5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1200 {"cmp.le.ph", "s,t", 0x00000085, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
1201 {"cmpgu.le.qb", "d,s,t", 0x00000145, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1202 {"cmp.lt.ph", "s,t", 0x00000045, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
1203 {"cmpgu.lt.qb", "d,s,t", 0x00000105, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1204 {"cmpu.eq.qb", "s,t", 0x00000245, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
1205 {"cmpu.le.qb", "s,t", 0x000002c5, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
1206 {"cmpu.lt.qb", "s,t", 0x00000285, 0xfc00ffff, RD_1
|RD_2
, 0, 0, D32
, 0 },
1207 {"dpaq_sa.l.w", "7,s,t", 0x000012bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1208 {"dpaq_s.w.ph", "7,s,t", 0x000002bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1209 {"dpau.h.qbl", "7,s,t", 0x000020bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1210 {"dpau.h.qbr", "7,s,t", 0x000030bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1211 {"dpsq_sa.l.w", "7,s,t", 0x000016bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1212 {"dpsq_s.w.ph", "7,s,t", 0x000006bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1213 {"dpsu.h.qbl", "7,s,t", 0x000024bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1214 {"dpsu.h.qbr", "7,s,t", 0x000034bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1215 {"extpdp", "t,7,6", 0x0000367c, 0xfc003fff, WR_1
|RD_a
|DSP_VOLA
, 0, 0, D32
, 0 },
1216 {"extpdpv", "t,7,s", 0x000038bc, 0xfc003fff, WR_1
|RD_3
|RD_a
|DSP_VOLA
, 0, 0, D32
, 0 },
1217 {"extp", "t,7,6", 0x0000267c, 0xfc003fff, WR_1
|RD_a
, 0, 0, D32
, 0 },
1218 {"extpv", "t,7,s", 0x000028bc, 0xfc003fff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
1219 {"extr_rs.w", "t,7,6", 0x00002e7c, 0xfc003fff, WR_1
|RD_a
, 0, 0, D32
, 0 },
1220 {"extr_r.w", "t,7,6", 0x00001e7c, 0xfc003fff, WR_1
|RD_a
, 0, 0, D32
, 0 },
1221 {"extr_s.h", "t,7,6", 0x00003e7c, 0xfc003fff, WR_1
|RD_a
, 0, 0, D32
, 0 },
1222 {"extrv_rs.w", "t,7,s", 0x00002ebc, 0xfc003fff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
1223 {"extrv_r.w", "t,7,s", 0x00001ebc, 0xfc003fff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
1224 {"extrv_s.h", "t,7,s", 0x00003ebc, 0xfc003fff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
1225 {"extrv.w", "t,7,s", 0x00000ebc, 0xfc003fff, WR_1
|RD_3
|RD_a
, 0, 0, D32
, 0 },
1226 {"extr.w", "t,7,6", 0x00000e7c, 0xfc003fff, WR_1
|RD_a
, 0, 0, D32
, 0 },
1227 {"insv", "t,s", 0x0000413c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1228 {"lbux", "d,t(b)", 0x00000225, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, 0, D32
, 0 },
1229 {"lhx", "d,t(b)", 0x00000165, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, 0, D32
, 0 },
1230 {"lwx", "d,t(b)", 0x000001a5, 0xfc0007ff, WR_1
|RD_2
|RD_3
|LM
, 0, 0, D32
, 0 },
1231 {"maq_sa.w.phl", "7,s,t", 0x00003a7c, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1232 {"maq_sa.w.phr", "7,s,t", 0x00002a7c, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1233 {"maq_s.w.phl", "7,s,t", 0x00001a7c, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1234 {"maq_s.w.phr", "7,s,t", 0x00000a7c, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1235 {"modsub", "d,s,t", 0x00000295, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1236 {"mthlip", "s,7", 0x0000027c, 0xffe03fff, RD_1
|MOD_a
|DSP_VOLA
, 0, 0, D32
, 0 },
1237 {"muleq_s.w.phl", "d,s,t", 0x00000025, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
1238 {"muleq_s.w.phr", "d,s,t", 0x00000065, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
1239 {"muleu_s.ph.qbl", "d,s,t", 0x00000095, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
1240 {"muleu_s.ph.qbr", "d,s,t", 0x000000d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
1241 {"mulq_rs.ph", "d,s,t", 0x00000115, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D32
, 0 },
1242 {"mulsaq_s.w.ph", "7,s,t", 0x00003cbc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D32
, 0 },
1243 {"packrl.ph", "d,s,t", 0x000001ad, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1244 {"pick.ph", "d,s,t", 0x0000022d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1245 {"pick.qb", "d,s,t", 0x000001ed, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1246 {"precequ.ph.qbla", "t,s", 0x0000733c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1247 {"precequ.ph.qbl", "t,s", 0x0000713c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1248 {"precequ.ph.qbra", "t,s", 0x0000933c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1249 {"precequ.ph.qbr", "t,s", 0x0000913c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1250 {"preceq.w.phl", "t,s", 0x0000513c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1251 {"preceq.w.phr", "t,s", 0x0000613c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1252 {"preceu.ph.qbla", "t,s", 0x0000b33c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1253 {"preceu.ph.qbl", "t,s", 0x0000b13c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1254 {"preceu.ph.qbra", "t,s", 0x0000d33c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1255 {"preceu.ph.qbr", "t,s", 0x0000d13c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1256 {"precrq.ph.w", "d,s,t", 0x000000ed, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1257 {"precrq.qb.ph", "d,s,t", 0x000000ad, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1258 {"precrq_rs.ph.w", "d,s,t", 0x0000012d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1259 {"precrqu_s.qb.ph", "d,s,t", 0x0000016d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1260 {"raddu.w.qb", "t,s", 0x0000f13c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1261 {"rddsp", "t", 0x000fc67c, 0xfc1fffff, WR_1
, 0, 0, D32
, 0 },
1262 {"rddsp", "t,8", 0x0000067c, 0xfc103fff, WR_1
, 0, 0, D32
, 0 },
1263 {"repl.ph", "d,@", 0x0000003d, 0xfc0007ff, WR_1
, 0, 0, D32
, 0 },
1264 {"repl.qb", "t,5", 0x000005fc, 0xfc001fff, WR_1
, 0, 0, D32
, 0 },
1265 {"replv.ph", "t,s", 0x0000033c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1266 {"replv.qb", "t,s", 0x0000133c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1267 {"shilo", "7,0", 0x0000001d, 0xffc03fff, MOD_a
, 0, 0, D32
, 0 },
1268 {"shilov", "7,s", 0x0000127c, 0xffe03fff, RD_2
|MOD_a
, 0, 0, D32
, 0 },
1269 {"shll.ph", "t,s,4", 0x000003b5, 0xfc000fff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1270 {"shll.qb", "t,s,3", 0x0000087c, 0xfc001fff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1271 {"shll_s.ph", "t,s,4", 0x00000bb5, 0xfc000fff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1272 {"shll_s.w", "t,s,^", 0x000003f5, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1273 {"shllv.ph", "d,t,s", 0x0000038d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1274 {"shllv.qb", "d,t,s", 0x00000395, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1275 {"shllv_s.ph", "d,t,s", 0x0000078d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1276 {"shllv_s.w", "d,t,s", 0x000003d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1277 {"shra.ph", "t,s,4", 0x00000335, 0xfc000fff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1278 {"shra_r.ph", "t,s,4", 0x00000735, 0xfc000fff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1279 {"shra_r.w", "t,s,^", 0x000002f5, 0xfc0007ff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1280 {"shrav.ph", "d,t,s", 0x0000018d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1281 {"shrav_r.ph", "d,t,s", 0x0000058d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1282 {"shrav_r.w", "d,t,s", 0x000002d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1283 {"shrl.qb", "t,s,3", 0x0000187c, 0xfc001fff, WR_1
|RD_2
, 0, 0, D32
, 0 },
1284 {"shrlv.qb", "d,t,s", 0x00000355, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1285 {"subq.ph", "d,s,t", 0x0000020d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1286 {"subq_s.ph", "d,s,t", 0x0000060d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1287 {"subq_s.w", "d,s,t", 0x00000345, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1288 {"subu.qb", "d,s,t", 0x000002cd, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1289 {"subu_s.qb", "d,s,t", 0x000006cd, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D32
, 0 },
1290 {"wrdsp", "t", 0x000fd67c, 0xfc1fffff, RD_1
|DSP_VOLA
, 0, 0, D32
, 0 },
1291 {"wrdsp", "t,8", 0x0000167c, 0xfc103fff, RD_1
|DSP_VOLA
, 0, 0, D32
, 0 },
1292 /* MIPS DSP ASE Rev2. */
1293 {"absq_s.qb", "t,s", 0x0000013c, 0xfc00ffff, WR_1
|RD_2
, 0, 0, D33
, 0 },
1294 {"addqh.ph", "d,s,t", 0x0000004d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1295 {"addqh_r.ph", "d,s,t", 0x0000044d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1296 {"addqh.w", "d,s,t", 0x0000008d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1297 {"addqh_r.w", "d,s,t", 0x0000048d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1298 {"addu.ph", "d,s,t", 0x0000010d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1299 {"addu_s.ph", "d,s,t", 0x0000050d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1300 {"adduh.qb", "d,s,t", 0x0000014d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1301 {"adduh_r.qb", "d,s,t", 0x0000054d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1302 {"append", "t,s,h", 0x00000215, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
1303 {"balign", "t,s,I", 0, (int) M_BALIGN
, INSN_MACRO
, 0, 0, D33
, 0 },
1304 {"balign", "t,s,2", 0x000008bc, 0xfc003fff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
1305 {"cmpgdu.eq.qb", "d,s,t", 0x00000185, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1306 {"cmpgdu.lt.qb", "d,s,t", 0x000001c5, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1307 {"cmpgdu.le.qb", "d,s,t", 0x00000205, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1308 {"dpa.w.ph", "7,s,t", 0x000000bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1309 {"dpaqx_s.w.ph", "7,s,t", 0x000022bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1310 {"dpaqx_sa.w.ph", "7,s,t", 0x000032bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1311 {"dpax.w.ph", "7,s,t", 0x000010bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1312 {"dps.w.ph", "7,s,t", 0x000004bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1313 {"dpsqx_s.w.ph", "7,s,t", 0x000026bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1314 {"dpsqx_sa.w.ph", "7,s,t", 0x000036bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1315 {"dpsx.w.ph", "7,s,t", 0x000014bc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1316 {"mul.ph", "d,s,t", 0x0000002d, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
1317 {"mul_s.ph", "d,s,t", 0x0000042d, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
1318 {"mulq_rs.w", "d,s,t", 0x00000195, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
1319 {"mulq_s.ph", "d,s,t", 0x00000155, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
1320 {"mulq_s.w", "d,s,t", 0x000001d5, 0xfc0007ff, WR_1
|RD_2
|RD_3
|WR_HILO
, 0, 0, D33
, 0 },
1321 {"mulsa.w.ph", "7,s,t", 0x00002cbc, 0xfc003fff, RD_2
|RD_3
|MOD_a
, 0, 0, D33
, 0 },
1322 {"precr.qb.ph", "d,s,t", 0x0000006d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1323 {"precr_sra.ph.w", "t,s,h", 0x000003cd, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
1324 {"precr_sra_r.ph.w", "t,s,h", 0x000007cd, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
1325 {"prepend", "t,s,h", 0x00000255, 0xfc0007ff, MOD_1
|RD_2
, 0, 0, D33
, 0 },
1326 {"shra.qb", "t,s,3", 0x000001fc, 0xfc001fff, WR_1
|RD_2
, 0, 0, D33
, 0 },
1327 {"shra_r.qb", "t,s,3", 0x000011fc, 0xfc001fff, WR_1
|RD_2
, 0, 0, D33
, 0 },
1328 {"shrav.qb", "d,t,s", 0x000001cd, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1329 {"shrav_r.qb", "d,t,s", 0x000005cd, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1330 {"shrl.ph", "t,s,4", 0x000003fc, 0xfc000fff, WR_1
|RD_2
, 0, 0, D33
, 0 },
1331 {"shrlv.ph", "d,t,s", 0x00000315, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1332 {"subu.ph", "d,s,t", 0x0000030d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1333 {"subu_s.ph", "d,s,t", 0x0000070d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1334 {"subuh.qb", "d,s,t", 0x0000034d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1335 {"subuh_r.qb", "d,s,t", 0x0000074d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1336 {"subqh.ph", "d,s,t", 0x0000024d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1337 {"subqh_r.ph", "d,s,t", 0x0000064d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1338 {"subqh.w", "d,s,t", 0x0000028d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1339 {"subqh_r.w", "d,s,t", 0x0000068d, 0xfc0007ff, WR_1
|RD_2
|RD_3
, 0, 0, D33
, 0 },
1340 /* MSA Extension. */
1341 {"sll.b", "+d,+e,+h", 0x5800001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1342 {"sll.h", "+d,+e,+h", 0x5820001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1343 {"sll.w", "+d,+e,+h", 0x5840001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1344 {"sll.d", "+d,+e,+h", 0x5860001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1345 {"slli.b", "+d,+e,+!", 0x58700012, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1346 {"slli.h", "+d,+e,+@", 0x58600012, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1347 {"slli.w", "+d,+e,+x", 0x58400012, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1348 {"slli.d", "+d,+e,+#", 0x58000012, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1349 {"sra.b", "+d,+e,+h", 0x5880001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1350 {"sra.h", "+d,+e,+h", 0x58a0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1351 {"sra.w", "+d,+e,+h", 0x58c0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1352 {"sra.d", "+d,+e,+h", 0x58e0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1353 {"srai.b", "+d,+e,+!", 0x58f00012, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1354 {"srai.h", "+d,+e,+@", 0x58e00012, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1355 {"srai.w", "+d,+e,+x", 0x58c00012, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1356 {"srai.d", "+d,+e,+#", 0x58800012, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1357 {"srl.b", "+d,+e,+h", 0x5900001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1358 {"srl.h", "+d,+e,+h", 0x5920001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1359 {"srl.w", "+d,+e,+h", 0x5940001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1360 {"srl.d", "+d,+e,+h", 0x5960001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1361 {"srli.b", "+d,+e,+!", 0x59700012, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1362 {"srli.h", "+d,+e,+@", 0x59600012, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1363 {"srli.w", "+d,+e,+x", 0x59400012, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1364 {"srli.d", "+d,+e,+#", 0x59000012, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1365 {"bclr.b", "+d,+e,+h", 0x5980001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1366 {"bclr.h", "+d,+e,+h", 0x59a0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1367 {"bclr.w", "+d,+e,+h", 0x59c0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1368 {"bclr.d", "+d,+e,+h", 0x59e0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1369 {"bclri.b", "+d,+e,+!", 0x59f00012, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1370 {"bclri.h", "+d,+e,+@", 0x59e00012, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1371 {"bclri.w", "+d,+e,+x", 0x59c00012, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1372 {"bclri.d", "+d,+e,+#", 0x59800012, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1373 {"bset.b", "+d,+e,+h", 0x5a00001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1374 {"bset.h", "+d,+e,+h", 0x5a20001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1375 {"bset.w", "+d,+e,+h", 0x5a40001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1376 {"bset.d", "+d,+e,+h", 0x5a60001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1377 {"bseti.b", "+d,+e,+!", 0x5a700012, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1378 {"bseti.h", "+d,+e,+@", 0x5a600012, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1379 {"bseti.w", "+d,+e,+x", 0x5a400012, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1380 {"bseti.d", "+d,+e,+#", 0x5a000012, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1381 {"bneg.b", "+d,+e,+h", 0x5a80001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1382 {"bneg.h", "+d,+e,+h", 0x5aa0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1383 {"bneg.w", "+d,+e,+h", 0x5ac0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1384 {"bneg.d", "+d,+e,+h", 0x5ae0001a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1385 {"bnegi.b", "+d,+e,+!", 0x5af00012, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1386 {"bnegi.h", "+d,+e,+@", 0x5ae00012, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1387 {"bnegi.w", "+d,+e,+x", 0x5ac00012, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1388 {"bnegi.d", "+d,+e,+#", 0x5a800012, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1389 {"binsl.b", "+d,+e,+h", 0x5b00001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1390 {"binsl.h", "+d,+e,+h", 0x5b20001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1391 {"binsl.w", "+d,+e,+h", 0x5b40001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1392 {"binsl.d", "+d,+e,+h", 0x5b60001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1393 {"binsli.b", "+d,+e,+!", 0x5b700012, 0xfff8003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1394 {"binsli.h", "+d,+e,+@", 0x5b600012, 0xfff0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1395 {"binsli.w", "+d,+e,+x", 0x5b400012, 0xffe0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1396 {"binsli.d", "+d,+e,+#", 0x5b000012, 0xffc0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1397 {"binsr.b", "+d,+e,+h", 0x5b80001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1398 {"binsr.h", "+d,+e,+h", 0x5ba0001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1399 {"binsr.w", "+d,+e,+h", 0x5bc0001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1400 {"binsr.d", "+d,+e,+h", 0x5be0001a, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1401 {"binsri.b", "+d,+e,+!", 0x5bf00012, 0xfff8003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1402 {"binsri.h", "+d,+e,+@", 0x5be00012, 0xfff0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1403 {"binsri.w", "+d,+e,+x", 0x5bc00012, 0xffe0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1404 {"binsri.d", "+d,+e,+#", 0x5b800012, 0xffc0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1405 {"addv.b", "+d,+e,+h", 0x5800002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1406 {"addv.h", "+d,+e,+h", 0x5820002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1407 {"addv.w", "+d,+e,+h", 0x5840002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1408 {"addv.d", "+d,+e,+h", 0x5860002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1409 {"addvi.b", "+d,+e,+$", 0x58000029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1410 {"addvi.h", "+d,+e,+$", 0x58200029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1411 {"addvi.w", "+d,+e,+$", 0x58400029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1412 {"addvi.d", "+d,+e,+$", 0x58600029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1413 {"subv.b", "+d,+e,+h", 0x5880002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1414 {"subv.h", "+d,+e,+h", 0x58a0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1415 {"subv.w", "+d,+e,+h", 0x58c0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1416 {"subv.d", "+d,+e,+h", 0x58e0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1417 {"subvi.b", "+d,+e,+$", 0x58800029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1418 {"subvi.h", "+d,+e,+$", 0x58a00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1419 {"subvi.w", "+d,+e,+$", 0x58c00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1420 {"subvi.d", "+d,+e,+$", 0x58e00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1421 {"max_s.b", "+d,+e,+h", 0x5900002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1422 {"max_s.h", "+d,+e,+h", 0x5920002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1423 {"max_s.w", "+d,+e,+h", 0x5940002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1424 {"max_s.d", "+d,+e,+h", 0x5960002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1425 {"maxi_s.b", "+d,+e,+%", 0x59000029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1426 {"maxi_s.h", "+d,+e,+%", 0x59200029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1427 {"maxi_s.w", "+d,+e,+%", 0x59400029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1428 {"maxi_s.d", "+d,+e,+%", 0x59600029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1429 {"max_u.b", "+d,+e,+h", 0x5980002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1430 {"max_u.h", "+d,+e,+h", 0x59a0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1431 {"max_u.w", "+d,+e,+h", 0x59c0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1432 {"max_u.d", "+d,+e,+h", 0x59e0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1433 {"maxi_u.b", "+d,+e,+$", 0x59800029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1434 {"maxi_u.h", "+d,+e,+$", 0x59a00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1435 {"maxi_u.w", "+d,+e,+$", 0x59c00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1436 {"maxi_u.d", "+d,+e,+$", 0x59e00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1437 {"min_s.b", "+d,+e,+h", 0x5a00002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1438 {"min_s.h", "+d,+e,+h", 0x5a20002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1439 {"min_s.w", "+d,+e,+h", 0x5a40002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1440 {"min_s.d", "+d,+e,+h", 0x5a60002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1441 {"mini_s.b", "+d,+e,+%", 0x5a000029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1442 {"mini_s.h", "+d,+e,+%", 0x5a200029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1443 {"mini_s.w", "+d,+e,+%", 0x5a400029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1444 {"mini_s.d", "+d,+e,+%", 0x5a600029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1445 {"min_u.b", "+d,+e,+h", 0x5a80002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1446 {"min_u.h", "+d,+e,+h", 0x5aa0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1447 {"min_u.w", "+d,+e,+h", 0x5ac0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1448 {"min_u.d", "+d,+e,+h", 0x5ae0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1449 {"mini_u.b", "+d,+e,+$", 0x5a800029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1450 {"mini_u.h", "+d,+e,+$", 0x5aa00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1451 {"mini_u.w", "+d,+e,+$", 0x5ac00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1452 {"mini_u.d", "+d,+e,+$", 0x5ae00029, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1453 {"max_a.b", "+d,+e,+h", 0x5b00002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1454 {"max_a.h", "+d,+e,+h", 0x5b20002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1455 {"max_a.w", "+d,+e,+h", 0x5b40002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1456 {"max_a.d", "+d,+e,+h", 0x5b60002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1457 {"min_a.b", "+d,+e,+h", 0x5b80002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1458 {"min_a.h", "+d,+e,+h", 0x5ba0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1459 {"min_a.w", "+d,+e,+h", 0x5bc0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1460 {"min_a.d", "+d,+e,+h", 0x5be0002a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1461 {"ceq.b", "+d,+e,+h", 0x5800003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1462 {"ceq.h", "+d,+e,+h", 0x5820003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1463 {"ceq.w", "+d,+e,+h", 0x5840003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1464 {"ceq.d", "+d,+e,+h", 0x5860003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1465 {"ceqi.b", "+d,+e,+%", 0x58000039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1466 {"ceqi.h", "+d,+e,+%", 0x58200039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1467 {"ceqi.w", "+d,+e,+%", 0x58400039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1468 {"ceqi.d", "+d,+e,+%", 0x58600039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1469 {"clt_s.b", "+d,+e,+h", 0x5900003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1470 {"clt_s.h", "+d,+e,+h", 0x5920003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1471 {"clt_s.w", "+d,+e,+h", 0x5940003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1472 {"clt_s.d", "+d,+e,+h", 0x5960003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1473 {"clti_s.b", "+d,+e,+%", 0x59000039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1474 {"clti_s.h", "+d,+e,+%", 0x59200039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1475 {"clti_s.w", "+d,+e,+%", 0x59400039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1476 {"clti_s.d", "+d,+e,+%", 0x59600039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1477 {"clt_u.b", "+d,+e,+h", 0x5980003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1478 {"clt_u.h", "+d,+e,+h", 0x59a0003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1479 {"clt_u.w", "+d,+e,+h", 0x59c0003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1480 {"clt_u.d", "+d,+e,+h", 0x59e0003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1481 {"clti_u.b", "+d,+e,+$", 0x59800039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1482 {"clti_u.h", "+d,+e,+$", 0x59a00039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1483 {"clti_u.w", "+d,+e,+$", 0x59c00039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1484 {"clti_u.d", "+d,+e,+$", 0x59e00039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1485 {"cle_s.b", "+d,+e,+h", 0x5a00003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1486 {"cle_s.h", "+d,+e,+h", 0x5a20003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1487 {"cle_s.w", "+d,+e,+h", 0x5a40003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1488 {"cle_s.d", "+d,+e,+h", 0x5a60003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1489 {"clei_s.b", "+d,+e,+%", 0x5a000039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1490 {"clei_s.h", "+d,+e,+%", 0x5a200039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1491 {"clei_s.w", "+d,+e,+%", 0x5a400039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1492 {"clei_s.d", "+d,+e,+%", 0x5a600039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1493 {"cle_u.b", "+d,+e,+h", 0x5a80003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1494 {"cle_u.h", "+d,+e,+h", 0x5aa0003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1495 {"cle_u.w", "+d,+e,+h", 0x5ac0003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1496 {"cle_u.d", "+d,+e,+h", 0x5ae0003a, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1497 {"clei_u.b", "+d,+e,+$", 0x5a800039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1498 {"clei_u.h", "+d,+e,+$", 0x5aa00039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1499 {"clei_u.w", "+d,+e,+$", 0x5ac00039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1500 {"clei_u.d", "+d,+e,+$", 0x5ae00039, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1501 {"ld.b", "+d,+T(d)", 0x58000007, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
1502 {"ld.h", "+d,+U(d)", 0x58000017, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
1503 {"ld.w", "+d,+V(d)", 0x58000027, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
1504 {"ld.d", "+d,+W(d)", 0x58000037, 0xfc00003f, WR_1
|RD_3
|LM
, 0, 0, MSA
, 0 },
1505 {"st.b", "+d,+T(d)", 0x5800000f, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
1506 {"st.h", "+d,+U(d)", 0x5800001f, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
1507 {"st.w", "+d,+V(d)", 0x5800002f, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
1508 {"st.d", "+d,+W(d)", 0x5800003f, 0xfc00003f, RD_1
|RD_3
|SM
, 0, 0, MSA
, 0 },
1509 {"sat_s.b", "+d,+e,+!", 0x58700022, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1510 {"sat_s.h", "+d,+e,+@", 0x58600022, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1511 {"sat_s.w", "+d,+e,+x", 0x58400022, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1512 {"sat_s.d", "+d,+e,+#", 0x58000022, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1513 {"sat_u.b", "+d,+e,+!", 0x58f00022, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1514 {"sat_u.h", "+d,+e,+@", 0x58e00022, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1515 {"sat_u.w", "+d,+e,+x", 0x58c00022, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1516 {"sat_u.d", "+d,+e,+#", 0x58800022, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1517 {"add_a.b", "+d,+e,+h", 0x58000003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1518 {"add_a.h", "+d,+e,+h", 0x58200003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1519 {"add_a.w", "+d,+e,+h", 0x58400003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1520 {"add_a.d", "+d,+e,+h", 0x58600003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1521 {"adds_a.b", "+d,+e,+h", 0x58800003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1522 {"adds_a.h", "+d,+e,+h", 0x58a00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1523 {"adds_a.w", "+d,+e,+h", 0x58c00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1524 {"adds_a.d", "+d,+e,+h", 0x58e00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1525 {"adds_s.b", "+d,+e,+h", 0x59000003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1526 {"adds_s.h", "+d,+e,+h", 0x59200003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1527 {"adds_s.w", "+d,+e,+h", 0x59400003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1528 {"adds_s.d", "+d,+e,+h", 0x59600003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1529 {"adds_u.b", "+d,+e,+h", 0x59800003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1530 {"adds_u.h", "+d,+e,+h", 0x59a00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1531 {"adds_u.w", "+d,+e,+h", 0x59c00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1532 {"adds_u.d", "+d,+e,+h", 0x59e00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1533 {"ave_s.b", "+d,+e,+h", 0x5a000003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1534 {"ave_s.h", "+d,+e,+h", 0x5a200003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1535 {"ave_s.w", "+d,+e,+h", 0x5a400003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1536 {"ave_s.d", "+d,+e,+h", 0x5a600003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1537 {"ave_u.b", "+d,+e,+h", 0x5a800003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1538 {"ave_u.h", "+d,+e,+h", 0x5aa00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1539 {"ave_u.w", "+d,+e,+h", 0x5ac00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1540 {"ave_u.d", "+d,+e,+h", 0x5ae00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1541 {"aver_s.b", "+d,+e,+h", 0x5b000003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1542 {"aver_s.h", "+d,+e,+h", 0x5b200003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1543 {"aver_s.w", "+d,+e,+h", 0x5b400003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1544 {"aver_s.d", "+d,+e,+h", 0x5b600003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1545 {"aver_u.b", "+d,+e,+h", 0x5b800003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1546 {"aver_u.h", "+d,+e,+h", 0x5ba00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1547 {"aver_u.w", "+d,+e,+h", 0x5bc00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1548 {"aver_u.d", "+d,+e,+h", 0x5be00003, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1549 {"subs_s.b", "+d,+e,+h", 0x58000013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1550 {"subs_s.h", "+d,+e,+h", 0x58200013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1551 {"subs_s.w", "+d,+e,+h", 0x58400013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1552 {"subs_s.d", "+d,+e,+h", 0x58600013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1553 {"subs_u.b", "+d,+e,+h", 0x58800013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1554 {"subs_u.h", "+d,+e,+h", 0x58a00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1555 {"subs_u.w", "+d,+e,+h", 0x58c00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1556 {"subs_u.d", "+d,+e,+h", 0x58e00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1557 {"subsus_u.b", "+d,+e,+h", 0x59000013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1558 {"subsus_u.h", "+d,+e,+h", 0x59200013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1559 {"subsus_u.w", "+d,+e,+h", 0x59400013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1560 {"subsus_u.d", "+d,+e,+h", 0x59600013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1561 {"subsuu_s.b", "+d,+e,+h", 0x59800013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1562 {"subsuu_s.h", "+d,+e,+h", 0x59a00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1563 {"subsuu_s.w", "+d,+e,+h", 0x59c00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1564 {"subsuu_s.d", "+d,+e,+h", 0x59e00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1565 {"asub_s.b", "+d,+e,+h", 0x5a000013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1566 {"asub_s.h", "+d,+e,+h", 0x5a200013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1567 {"asub_s.w", "+d,+e,+h", 0x5a400013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1568 {"asub_s.d", "+d,+e,+h", 0x5a600013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1569 {"asub_u.b", "+d,+e,+h", 0x5a800013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1570 {"asub_u.h", "+d,+e,+h", 0x5aa00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1571 {"asub_u.w", "+d,+e,+h", 0x5ac00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1572 {"asub_u.d", "+d,+e,+h", 0x5ae00013, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1573 {"mulv.b", "+d,+e,+h", 0x58000023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1574 {"mulv.h", "+d,+e,+h", 0x58200023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1575 {"mulv.w", "+d,+e,+h", 0x58400023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1576 {"mulv.d", "+d,+e,+h", 0x58600023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1577 {"maddv.b", "+d,+e,+h", 0x58800023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1578 {"maddv.h", "+d,+e,+h", 0x58a00023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1579 {"maddv.w", "+d,+e,+h", 0x58c00023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1580 {"maddv.d", "+d,+e,+h", 0x58e00023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1581 {"msubv.b", "+d,+e,+h", 0x59000023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1582 {"msubv.h", "+d,+e,+h", 0x59200023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1583 {"msubv.w", "+d,+e,+h", 0x59400023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1584 {"msubv.d", "+d,+e,+h", 0x59600023, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1585 {"div_s.b", "+d,+e,+h", 0x5a000023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1586 {"div_s.h", "+d,+e,+h", 0x5a200023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1587 {"div_s.w", "+d,+e,+h", 0x5a400023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1588 {"div_s.d", "+d,+e,+h", 0x5a600023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1589 {"div_u.b", "+d,+e,+h", 0x5a800023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1590 {"div_u.h", "+d,+e,+h", 0x5aa00023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1591 {"div_u.w", "+d,+e,+h", 0x5ac00023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1592 {"div_u.d", "+d,+e,+h", 0x5ae00023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1593 {"mod_s.b", "+d,+e,+h", 0x5b000023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1594 {"mod_s.h", "+d,+e,+h", 0x5b200023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1595 {"mod_s.w", "+d,+e,+h", 0x5b400023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1596 {"mod_s.d", "+d,+e,+h", 0x5b600023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1597 {"mod_u.b", "+d,+e,+h", 0x5b800023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1598 {"mod_u.h", "+d,+e,+h", 0x5ba00023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1599 {"mod_u.w", "+d,+e,+h", 0x5bc00023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1600 {"mod_u.d", "+d,+e,+h", 0x5be00023, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1601 {"dotp_s.h", "+d,+e,+h", 0x58200033, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1602 {"dotp_s.w", "+d,+e,+h", 0x58400033, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1603 {"dotp_s.d", "+d,+e,+h", 0x58600033, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1604 {"dotp_u.h", "+d,+e,+h", 0x58a00033, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1605 {"dotp_u.w", "+d,+e,+h", 0x58c00033, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1606 {"dotp_u.d", "+d,+e,+h", 0x58e00033, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1607 {"dpadd_s.h", "+d,+e,+h", 0x59200033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1608 {"dpadd_s.w", "+d,+e,+h", 0x59400033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1609 {"dpadd_s.d", "+d,+e,+h", 0x59600033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1610 {"dpadd_u.h", "+d,+e,+h", 0x59a00033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1611 {"dpadd_u.w", "+d,+e,+h", 0x59c00033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1612 {"dpadd_u.d", "+d,+e,+h", 0x59e00033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1613 {"dpsub_s.h", "+d,+e,+h", 0x5a200033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1614 {"dpsub_s.w", "+d,+e,+h", 0x5a400033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1615 {"dpsub_s.d", "+d,+e,+h", 0x5a600033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1616 {"dpsub_u.h", "+d,+e,+h", 0x5aa00033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1617 {"dpsub_u.w", "+d,+e,+h", 0x5ac00033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1618 {"dpsub_u.d", "+d,+e,+h", 0x5ae00033, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1619 {"sld.b", "+d,+e+*", 0x5800000b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1620 {"sld.h", "+d,+e+*", 0x5820000b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1621 {"sld.w", "+d,+e+*", 0x5840000b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1622 {"sld.d", "+d,+e+*", 0x5860000b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1623 {"sldi.b", "+d,+e+o", 0x58000016, 0xfff0003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1624 {"sldi.h", "+d,+e+u", 0x58200016, 0xfff8003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1625 {"sldi.w", "+d,+e+v", 0x58300016, 0xfffc003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1626 {"sldi.d", "+d,+e+w", 0x58380016, 0xfffe003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1627 {"splat.b", "+d,+e+*", 0x5880000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1628 {"splat.h", "+d,+e+*", 0x58a0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1629 {"splat.w", "+d,+e+*", 0x58c0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1630 {"splat.d", "+d,+e+*", 0x58e0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1631 {"splati.b", "+d,+e+o", 0x58400016, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1632 {"splati.h", "+d,+e+u", 0x58600016, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1633 {"splati.w", "+d,+e+v", 0x58700016, 0xfffc003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1634 {"splati.d", "+d,+e+w", 0x58780016, 0xfffe003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1635 {"pckev.b", "+d,+e,+h", 0x5900000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1636 {"pckev.h", "+d,+e,+h", 0x5920000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1637 {"pckev.w", "+d,+e,+h", 0x5940000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1638 {"pckev.d", "+d,+e,+h", 0x5960000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1639 {"pckod.b", "+d,+e,+h", 0x5980000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1640 {"pckod.h", "+d,+e,+h", 0x59a0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1641 {"pckod.w", "+d,+e,+h", 0x59c0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1642 {"pckod.d", "+d,+e,+h", 0x59e0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1643 {"ilvl.b", "+d,+e,+h", 0x5a00000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1644 {"ilvl.h", "+d,+e,+h", 0x5a20000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1645 {"ilvl.w", "+d,+e,+h", 0x5a40000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1646 {"ilvl.d", "+d,+e,+h", 0x5a60000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1647 {"ilvr.b", "+d,+e,+h", 0x5a80000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1648 {"ilvr.h", "+d,+e,+h", 0x5aa0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1649 {"ilvr.w", "+d,+e,+h", 0x5ac0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1650 {"ilvr.d", "+d,+e,+h", 0x5ae0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1651 {"ilvev.b", "+d,+e,+h", 0x5b00000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1652 {"ilvev.h", "+d,+e,+h", 0x5b20000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1653 {"ilvev.w", "+d,+e,+h", 0x5b40000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1654 {"ilvev.d", "+d,+e,+h", 0x5b60000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1655 {"ilvod.b", "+d,+e,+h", 0x5b80000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1656 {"ilvod.h", "+d,+e,+h", 0x5ba0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1657 {"ilvod.w", "+d,+e,+h", 0x5bc0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1658 {"ilvod.d", "+d,+e,+h", 0x5be0000b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1659 {"vshf.b", "+d,+e,+h", 0x5800001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1660 {"vshf.h", "+d,+e,+h", 0x5820001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1661 {"vshf.w", "+d,+e,+h", 0x5840001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1662 {"vshf.d", "+d,+e,+h", 0x5860001b, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1663 {"srar.b", "+d,+e,+h", 0x5880001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1664 {"srar.h", "+d,+e,+h", 0x58a0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1665 {"srar.w", "+d,+e,+h", 0x58c0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1666 {"srar.d", "+d,+e,+h", 0x58e0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1667 {"srari.b", "+d,+e,+!", 0x59700022, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1668 {"srari.h", "+d,+e,+@", 0x59600022, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1669 {"srari.w", "+d,+e,+x", 0x59400022, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1670 {"srari.d", "+d,+e,+#", 0x59000022, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1671 {"srlr.b", "+d,+e,+h", 0x5900001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1672 {"srlr.h", "+d,+e,+h", 0x5920001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1673 {"srlr.w", "+d,+e,+h", 0x5940001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1674 {"srlr.d", "+d,+e,+h", 0x5960001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1675 {"srlri.b", "+d,+e,+!", 0x59f00022, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1676 {"srlri.h", "+d,+e,+@", 0x59e00022, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1677 {"srlri.w", "+d,+e,+x", 0x59c00022, 0xffe0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1678 {"srlri.d", "+d,+e,+#", 0x59800022, 0xffc0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1679 {"hadd_s.h", "+d,+e,+h", 0x5a20001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1680 {"hadd_s.w", "+d,+e,+h", 0x5a40001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1681 {"hadd_s.d", "+d,+e,+h", 0x5a60001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1682 {"hadd_u.h", "+d,+e,+h", 0x5aa0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1683 {"hadd_u.w", "+d,+e,+h", 0x5ac0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1684 {"hadd_u.d", "+d,+e,+h", 0x5ae0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1685 {"hsub_s.h", "+d,+e,+h", 0x5b20001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1686 {"hsub_s.w", "+d,+e,+h", 0x5b40001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1687 {"hsub_s.d", "+d,+e,+h", 0x5b60001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1688 {"hsub_u.h", "+d,+e,+h", 0x5ba0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1689 {"hsub_u.w", "+d,+e,+h", 0x5bc0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1690 {"hsub_u.d", "+d,+e,+h", 0x5be0001b, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1691 {"and.v", "+d,+e,+h", 0x5800002e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1692 {"andi.b", "+d,+e,+|", 0x58000001, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1693 {"or.v", "+d,+e,+h", 0x5820002e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1694 {"ori.b", "+d,+e,+|", 0x59000001, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1695 {"nor.v", "+d,+e,+h", 0x5840002e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1696 {"nori.b", "+d,+e,+|", 0x5a000001, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1697 {"xor.v", "+d,+e,+h", 0x5860002e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1698 {"xori.b", "+d,+e,+|", 0x5b000001, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1699 {"bmnz.v", "+d,+e,+h", 0x5880002e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1700 {"bmnzi.b", "+d,+e,+|", 0x58000011, 0xff00003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1701 {"bmz.v", "+d,+e,+h", 0x58a0002e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1702 {"bmzi.b", "+d,+e,+|", 0x59000011, 0xff00003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1703 {"bsel.v", "+d,+e,+h", 0x58c0002e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1704 {"bseli.b", "+d,+e,+|", 0x5a000011, 0xff00003f, MOD_1
|RD_2
, 0, 0, MSA
, 0 },
1705 {"shf.b", "+d,+e,+|", 0x58000021, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1706 {"shf.h", "+d,+e,+|", 0x59000021, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1707 {"shf.w", "+d,+e,+|", 0x5a000021, 0xff00003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1708 {"bnz.v", "+h,p", 0x81e00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1709 {"bz.v", "+h,p", 0x81600000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1710 {"fill.b", "+d,d", 0x5b00002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1711 {"fill.h", "+d,d", 0x5b01002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1712 {"fill.w", "+d,d", 0x5b02002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1713 {"fill.d", "+d,d", 0x5b03002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA64
, 0 },
1714 {"pcnt.b", "+d,+e", 0x5b04002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1715 {"pcnt.h", "+d,+e", 0x5b05002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1716 {"pcnt.w", "+d,+e", 0x5b06002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1717 {"pcnt.d", "+d,+e", 0x5b07002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1718 {"nloc.b", "+d,+e", 0x5b08002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1719 {"nloc.h", "+d,+e", 0x5b09002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1720 {"nloc.w", "+d,+e", 0x5b0a002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1721 {"nloc.d", "+d,+e", 0x5b0b002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1722 {"nlzc.b", "+d,+e", 0x5b0c002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1723 {"nlzc.h", "+d,+e", 0x5b0d002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1724 {"nlzc.w", "+d,+e", 0x5b0e002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1725 {"nlzc.d", "+d,+e", 0x5b0f002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1726 {"copy_s.b", "+k,+e+o", 0x58800016, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1727 {"copy_s.h", "+k,+e+u", 0x58a00016, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1728 {"copy_s.w", "+k,+e+v", 0x58b00016, 0xfffc003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1729 {"copy_s.d", "+k,+e+w", 0x58b80016, 0xfffe003f, WR_1
|RD_2
, 0, 0, MSA64
, 0 },
1730 {"copy_u.b", "+k,+e+o", 0x58c00016, 0xfff0003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1731 {"copy_u.h", "+k,+e+u", 0x58e00016, 0xfff8003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1732 {"copy_u.w", "+k,+e+v", 0x58f00016, 0xfffc003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1733 {"copy_u.d", "+k,+e+w", 0x58f80016, 0xfffe003f, WR_1
|RD_2
, 0, 0, MSA64
, 0 },
1734 {"insert.b", "+d+o,d", 0x59000016, 0xfff0003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1735 {"insert.h", "+d+u,d", 0x59200016, 0xfff8003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1736 {"insert.w", "+d+v,d", 0x59300016, 0xfffc003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1737 {"insert.d", "+d+w,d", 0x59380016, 0xfffe003f, MOD_1
|RD_3
, 0, 0, MSA64
, 0 },
1738 {"insve.b", "+d+o,+e+&", 0x59400016, 0xfff0003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1739 {"insve.h", "+d+u,+e+&", 0x59600016, 0xfff8003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1740 {"insve.w", "+d+v,+e+&", 0x59700016, 0xfffc003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1741 {"insve.d", "+d+w,+e+&", 0x59780016, 0xfffe003f, MOD_1
|RD_3
, 0, 0, MSA
, 0 },
1742 {"bnz.b", "+h,p", 0x83800000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1743 {"bnz.h", "+h,p", 0x83a00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1744 {"bnz.w", "+h,p", 0x83c00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1745 {"bnz.d", "+h,p", 0x83e00000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1746 {"bz.b", "+h,p", 0x83000000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1747 {"bz.h", "+h,p", 0x83200000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1748 {"bz.w", "+h,p", 0x83400000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1749 {"bz.d", "+h,p", 0x83600000, 0xffe00000, RD_1
|CBD
, 0, 0, MSA
, 0 },
1750 {"ldi.b", "+d,+^", 0x5b000039, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
1751 {"ldi.h", "+d,+^", 0x5b200039, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
1752 {"ldi.w", "+d,+^", 0x5b400039, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
1753 {"ldi.d", "+d,+^", 0x5b600039, 0xffe0003f, WR_1
, 0, 0, MSA
, 0 },
1754 {"fcaf.w", "+d,+e,+h", 0x58000026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1755 {"fcaf.d", "+d,+e,+h", 0x58200026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1756 {"fcun.w", "+d,+e,+h", 0x58400026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1757 {"fcun.d", "+d,+e,+h", 0x58600026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1758 {"fceq.w", "+d,+e,+h", 0x58800026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1759 {"fceq.d", "+d,+e,+h", 0x58a00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1760 {"fcueq.w", "+d,+e,+h", 0x58c00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1761 {"fcueq.d", "+d,+e,+h", 0x58e00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1762 {"fclt.w", "+d,+e,+h", 0x59000026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1763 {"fclt.d", "+d,+e,+h", 0x59200026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1764 {"fcult.w", "+d,+e,+h", 0x59400026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1765 {"fcult.d", "+d,+e,+h", 0x59600026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1766 {"fcle.w", "+d,+e,+h", 0x59800026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1767 {"fcle.d", "+d,+e,+h", 0x59a00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1768 {"fcule.w", "+d,+e,+h", 0x59c00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1769 {"fcule.d", "+d,+e,+h", 0x59e00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1770 {"fsaf.w", "+d,+e,+h", 0x5a000026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1771 {"fsaf.d", "+d,+e,+h", 0x5a200026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1772 {"fsun.w", "+d,+e,+h", 0x5a400026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1773 {"fsun.d", "+d,+e,+h", 0x5a600026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1774 {"fseq.w", "+d,+e,+h", 0x5a800026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1775 {"fseq.d", "+d,+e,+h", 0x5aa00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1776 {"fsueq.w", "+d,+e,+h", 0x5ac00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1777 {"fsueq.d", "+d,+e,+h", 0x5ae00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1778 {"fslt.w", "+d,+e,+h", 0x5b000026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1779 {"fslt.d", "+d,+e,+h", 0x5b200026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1780 {"fsult.w", "+d,+e,+h", 0x5b400026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1781 {"fsult.d", "+d,+e,+h", 0x5b600026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1782 {"fsle.w", "+d,+e,+h", 0x5b800026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1783 {"fsle.d", "+d,+e,+h", 0x5ba00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1784 {"fsule.w", "+d,+e,+h", 0x5bc00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1785 {"fsule.d", "+d,+e,+h", 0x5be00026, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1786 {"fadd.w", "+d,+e,+h", 0x58000036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1787 {"fadd.d", "+d,+e,+h", 0x58200036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1788 {"fsub.w", "+d,+e,+h", 0x58400036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1789 {"fsub.d", "+d,+e,+h", 0x58600036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1790 {"fmul.w", "+d,+e,+h", 0x58800036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1791 {"fmul.d", "+d,+e,+h", 0x58a00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1792 {"fdiv.w", "+d,+e,+h", 0x58c00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1793 {"fdiv.d", "+d,+e,+h", 0x58e00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1794 {"fmadd.w", "+d,+e,+h", 0x59000036, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1795 {"fmadd.d", "+d,+e,+h", 0x59200036, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1796 {"fmsub.w", "+d,+e,+h", 0x59400036, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1797 {"fmsub.d", "+d,+e,+h", 0x59600036, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1798 {"fexp2.w", "+d,+e,+h", 0x59c00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1799 {"fexp2.d", "+d,+e,+h", 0x59e00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1800 {"fexdo.h", "+d,+e,+h", 0x5a000036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1801 {"fexdo.w", "+d,+e,+h", 0x5a200036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1802 {"ftq.h", "+d,+e,+h", 0x5a800036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1803 {"ftq.w", "+d,+e,+h", 0x5aa00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1804 {"fmin.w", "+d,+e,+h", 0x5b000036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1805 {"fmin.d", "+d,+e,+h", 0x5b200036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1806 {"fmin_a.w", "+d,+e,+h", 0x5b400036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1807 {"fmin_a.d", "+d,+e,+h", 0x5b600036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1808 {"fmax.w", "+d,+e,+h", 0x5b800036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1809 {"fmax.d", "+d,+e,+h", 0x5ba00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1810 {"fmax_a.w", "+d,+e,+h", 0x5bc00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1811 {"fmax_a.d", "+d,+e,+h", 0x5be00036, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1812 {"fcor.w", "+d,+e,+h", 0x5840000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1813 {"fcor.d", "+d,+e,+h", 0x5860000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1814 {"fcune.w", "+d,+e,+h", 0x5880000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1815 {"fcune.d", "+d,+e,+h", 0x58a0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1816 {"fcne.w", "+d,+e,+h", 0x58c0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1817 {"fcne.d", "+d,+e,+h", 0x58e0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1818 {"mul_q.h", "+d,+e,+h", 0x5900000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1819 {"mul_q.w", "+d,+e,+h", 0x5920000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1820 {"madd_q.h", "+d,+e,+h", 0x5940000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1821 {"madd_q.w", "+d,+e,+h", 0x5960000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1822 {"msub_q.h", "+d,+e,+h", 0x5980000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1823 {"msub_q.w", "+d,+e,+h", 0x59a0000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1824 {"fsor.w", "+d,+e,+h", 0x5a40000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1825 {"fsor.d", "+d,+e,+h", 0x5a60000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1826 {"fsune.w", "+d,+e,+h", 0x5a80000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1827 {"fsune.d", "+d,+e,+h", 0x5aa0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1828 {"fsne.w", "+d,+e,+h", 0x5ac0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1829 {"fsne.d", "+d,+e,+h", 0x5ae0000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1830 {"mulr_q.h", "+d,+e,+h", 0x5b00000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1831 {"mulr_q.w", "+d,+e,+h", 0x5b20000e, 0xffe0003f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1832 {"maddr_q.h", "+d,+e,+h", 0x5b40000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1833 {"maddr_q.w", "+d,+e,+h", 0x5b60000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1834 {"msubr_q.h", "+d,+e,+h", 0x5b80000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1835 {"msubr_q.w", "+d,+e,+h", 0x5ba0000e, 0xffe0003f, MOD_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1836 {"fclass.w", "+d,+e", 0x5b20002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1837 {"fclass.d", "+d,+e", 0x5b21002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1838 {"ftrunc_s.w", "+d,+e", 0x5b22002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1839 {"ftrunc_s.d", "+d,+e", 0x5b23002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1840 {"ftrunc_u.w", "+d,+e", 0x5b24002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1841 {"ftrunc_u.d", "+d,+e", 0x5b25002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1842 {"fsqrt.w", "+d,+e", 0x5b26002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1843 {"fsqrt.d", "+d,+e", 0x5b27002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1844 {"frsqrt.w", "+d,+e", 0x5b28002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1845 {"frsqrt.d", "+d,+e", 0x5b29002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1846 {"frcp.w", "+d,+e", 0x5b2a002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1847 {"frcp.d", "+d,+e", 0x5b2b002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1848 {"frint.w", "+d,+e", 0x5b2c002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1849 {"frint.d", "+d,+e", 0x5b2d002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1850 {"flog2.w", "+d,+e", 0x5b2e002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1851 {"flog2.d", "+d,+e", 0x5b2f002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1852 {"fexupl.w", "+d,+e", 0x5b30002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1853 {"fexupl.d", "+d,+e", 0x5b31002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1854 {"fexupr.w", "+d,+e", 0x5b32002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1855 {"fexupr.d", "+d,+e", 0x5b33002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1856 {"ffql.w", "+d,+e", 0x5b34002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1857 {"ffql.d", "+d,+e", 0x5b35002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1858 {"ffqr.w", "+d,+e", 0x5b36002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1859 {"ffqr.d", "+d,+e", 0x5b37002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1860 {"ftint_s.w", "+d,+e", 0x5b38002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1861 {"ftint_s.d", "+d,+e", 0x5b39002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1862 {"ftint_u.w", "+d,+e", 0x5b3a002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1863 {"ftint_u.d", "+d,+e", 0x5b3b002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1864 {"ffint_s.w", "+d,+e", 0x5b3c002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1865 {"ffint_s.d", "+d,+e", 0x5b3d002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1866 {"ffint_u.w", "+d,+e", 0x5b3e002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1867 {"ffint_u.d", "+d,+e", 0x5b3f002e, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1868 {"ctcmsa", "+l,d", 0x583e0016, 0xffff003f, RD_2
, 0, 0, MSA
, 0 },
1869 {"cfcmsa", "+k,+n", 0x587e0016, 0xffff003f, WR_1
, 0, 0, MSA
, 0 },
1870 {"move.v", "+d,+e", 0x58be0016, 0xffff003f, WR_1
|RD_2
, 0, 0, MSA
, 0 },
1871 {"lsa", "d,v,t,+~", 0x00000020, 0xfc00073f, WR_1
|RD_2
|RD_3
, 0, 0, MSA
, 0 },
1872 {"dlsa", "d,v,t,+~", 0x58000020, 0xfc00073f, WR_1
|RD_2
|RD_3
, 0, 0, MSA64
, 0 },
1875 const int bfd_micromips_num_opcodes
=
1876 ((sizeof micromips_opcodes
) / (sizeof (micromips_opcodes
[0])));