1 /* mips-opc.c -- MIPS opcode list.
2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002
3 2003, 2004, 2005, 2007 Free Software Foundation, Inc.
4 Contributed by Ralph Campbell and OSF
5 Commented and modified by Ian Lance Taylor, Cygnus Support
6 Extended for MIPS32 support by Anders Norlander, and by SiByte, Inc.
7 MIPS-3D, MDMX, and MIPS32 Release 2 support added by Broadcom
10 This file is part of the GNU opcodes library.
12 This library is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 3, or (at your option)
17 It is distributed in the hope that it will be useful, but WITHOUT
18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
20 License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this file; see the file COPYING. If not, write to the
24 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
25 MA 02110-1301, USA. */
29 #include "opcode/mips.h"
31 /* Short hand so the lines aren't too long. */
33 #define LDD INSN_LOAD_MEMORY_DELAY
34 #define LCD INSN_LOAD_COPROC_DELAY
35 #define UBD INSN_UNCOND_BRANCH_DELAY
36 #define CBD INSN_COND_BRANCH_DELAY
37 #define COD INSN_COPROC_MOVE_DELAY
38 #define CLD INSN_COPROC_MEMORY_DELAY
39 #define CBL INSN_COND_BRANCH_LIKELY
40 #define TRAP INSN_TRAP
41 #define SM INSN_STORE_MEMORY
43 #define WR_d INSN_WRITE_GPR_D
44 #define WR_t INSN_WRITE_GPR_T
45 #define WR_31 INSN_WRITE_GPR_31
46 #define WR_D INSN_WRITE_FPR_D
47 #define WR_T INSN_WRITE_FPR_T
48 #define WR_S INSN_WRITE_FPR_S
49 #define RD_s INSN_READ_GPR_S
50 #define RD_b INSN_READ_GPR_S
51 #define RD_t INSN_READ_GPR_T
52 #define RD_S INSN_READ_FPR_S
53 #define RD_T INSN_READ_FPR_T
54 #define RD_R INSN_READ_FPR_R
55 #define WR_CC INSN_WRITE_COND_CODE
56 #define RD_CC INSN_READ_COND_CODE
57 #define RD_C0 INSN_COP
58 #define RD_C1 INSN_COP
59 #define RD_C2 INSN_COP
60 #define RD_C3 INSN_COP
61 #define WR_C0 INSN_COP
62 #define WR_C1 INSN_COP
63 #define WR_C2 INSN_COP
64 #define WR_C3 INSN_COP
66 #define WR_HI INSN_WRITE_HI
67 #define RD_HI INSN_READ_HI
68 #define MOD_HI WR_HI|RD_HI
70 #define WR_LO INSN_WRITE_LO
71 #define RD_LO INSN_READ_LO
72 #define MOD_LO WR_LO|RD_LO
74 #define WR_HILO WR_HI|WR_LO
75 #define RD_HILO RD_HI|RD_LO
76 #define MOD_HILO WR_HILO|RD_HILO
78 #define IS_M INSN_MULT
80 #define WR_MACC INSN2_WRITE_MDMX_ACC
81 #define RD_MACC INSN2_READ_MDMX_ACC
88 #define I32 INSN_ISA32
89 #define I64 INSN_ISA64
90 #define I33 INSN_ISA32R2
91 #define I65 INSN_ISA64R2
92 #define I3_32 INSN_ISA3_32
93 #define I3_33 INSN_ISA3_32R2
94 #define I4_32 INSN_ISA4_32
95 #define I4_33 INSN_ISA4_32R2
96 #define I5_33 INSN_ISA5_32R2
98 /* MIPS16 ASE support. */
99 #define I16 INSN_MIPS16
101 /* MIPS64 MIPS-3D ASE support. */
102 #define M3D INSN_MIPS3D
104 /* MIPS32 SmartMIPS ASE support. */
105 #define SMT INSN_SMARTMIPS
107 /* MIPS64 MDMX ASE support. */
112 #define V1 (INSN_4100 | INSN_4111 | INSN_4120)
114 #define M1 INSN_10000
116 #define N411 INSN_4111
117 #define N412 INSN_4120
118 #define N5 (INSN_5400 | INSN_5500)
119 #define N54 INSN_5400
120 #define N55 INSN_5500
131 /* MIPS DSP ASE support.
133 1. MIPS DSP ASE includes 4 accumulators ($ac0 - $ac3). $ac0 is the pair
134 of original HI and LO. $ac1, $ac2 and $ac3 are new registers, and have
135 the same structure as $ac0 (HI + LO). For DSP instructions that write or
136 read accumulators (that may be $ac0), we add WR_a (WR_HILO) or RD_a
137 (RD_HILO) attributes, such that HILO dependencies are maintained
140 2. For some mul. instructions that use integer registers as destinations
141 but destroy HI+LO as side-effect, we add WR_HILO to their attributes.
143 3. MIPS DSP ASE includes a new DSP control register, which has 6 fields
144 (ccond, outflag, EFI, c, scount, pos). Many DSP instructions read or write
145 certain fields of the DSP control register. For simplicity, we decide not
146 to track dependencies of these fields.
147 However, "bposge32" is a branch instruction that depends on the "pos"
148 field. In order to make sure that GAS does not reorder DSP instructions
149 that writes the "pos" field and "bposge32", we add DSP_VOLA (INSN_TRAP)
150 attribute to those instructions that write the "pos" field. */
152 #define WR_a WR_HILO /* Write dsp accumulators (reuse WR_HILO) */
153 #define RD_a RD_HILO /* Read dsp accumulators (reuse RD_HILO) */
154 #define MOD_a WR_a|RD_a
155 #define DSP_VOLA INSN_TRAP
157 #define D33 INSN_DSPR2
158 #define D64 INSN_DSP64
160 /* MIPS MT ASE support. */
163 /* The order of overloaded instructions matters. Label arguments and
164 register arguments look the same. Instructions that can have either
165 for arguments must apear in the correct order in this table for the
166 assembler to pick the right one. In other words, entries with
167 immediate operands must apear after the same instruction with
170 Because of the lookup algorithm used, entries with the same opcode
171 name must be contiguous.
173 Many instructions are short hand for other instructions (i.e., The
174 jal <register> instruction is short for jalr <register>). */
176 const struct mips_opcode mips_builtin_opcodes
[] =
178 /* These instructions appear first so that the disassembler will find
179 them first. The assemblers uses a hash table based on the
180 instruction name anyhow. */
181 /* name, args, match, mask, pinfo, pinfo2, membership */
182 {"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b
, 0, I4_32
|G3
},
183 {"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b
|RD_t
, 0, I4_33
},
184 {"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS
, I1
}, /* sll */
185 {"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS
, I32
|N55
}, /* sll */
186 {"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS
, I33
}, /* sll */
187 {"li", "t,j", 0x24000000, 0xffe00000, WR_t
, INSN2_ALIAS
, I1
}, /* addiu */
188 {"li", "t,i", 0x34000000, 0xffe00000, WR_t
, INSN2_ALIAS
, I1
}, /* ori */
189 {"li", "t,I", 0, (int) M_LI
, INSN_MACRO
, 0, I1
},
190 {"move", "d,s", 0, (int) M_MOVE
, INSN_MACRO
, 0, I1
},
191 {"move", "d,s", 0x0000002d, 0xfc1f07ff, WR_d
|RD_s
, INSN2_ALIAS
, I3
},/* daddu */
192 {"move", "d,s", 0x00000021, 0xfc1f07ff, WR_d
|RD_s
, INSN2_ALIAS
, I1
},/* addu */
193 {"move", "d,s", 0x00000025, 0xfc1f07ff, WR_d
|RD_s
, INSN2_ALIAS
, I1
},/* or */
194 {"b", "p", 0x10000000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
},/* beq 0,0 */
195 {"b", "p", 0x04010000, 0xffff0000, UBD
, INSN2_ALIAS
, I1
},/* bgez 0 */
196 {"bal", "p", 0x04110000, 0xffff0000, UBD
|WR_31
, INSN2_ALIAS
, I1
},/* bgezal 0*/
198 {"abs", "d,v", 0, (int) M_ABS
, INSN_MACRO
, 0, I1
},
199 {"abs.s", "D,V", 0x46000005, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
200 {"abs.d", "D,V", 0x46200005, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I1
},
201 {"abs.ps", "D,V", 0x46c00005, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I5_33
},
202 {"add", "d,v,t", 0x00000020, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
203 {"add", "t,r,I", 0, (int) M_ADD_I
, INSN_MACRO
, 0, I1
},
204 {"add.s", "D,V,T", 0x46000000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
205 {"add.d", "D,V,T", 0x46200000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
206 {"add.ob", "X,Y,Q", 0x7800000b, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
207 {"add.ob", "D,S,T", 0x4ac0000b, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
208 {"add.ob", "D,S,T[e]", 0x4800000b, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
209 {"add.ob", "D,S,k", 0x4bc0000b, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
210 {"add.ps", "D,V,T", 0x46c00000, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
211 {"add.qh", "X,Y,Q", 0x7820000b, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
212 {"adda.ob", "Y,Q", 0x78000037, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
213 {"adda.qh", "Y,Q", 0x78200037, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
214 {"addi", "t,r,j", 0x20000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
215 {"addiu", "t,r,j", 0x24000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
216 {"addl.ob", "Y,Q", 0x78000437, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
217 {"addl.qh", "Y,Q", 0x78200437, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
218 {"addr.ps", "D,S,T", 0x46c00018, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
219 {"addu", "d,v,t", 0x00000021, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
220 {"addu", "t,r,I", 0, (int) M_ADDU_I
, INSN_MACRO
, 0, I1
},
221 {"alni.ob", "X,Y,Z,O", 0x78000018, 0xff00003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
222 {"alni.ob", "D,S,T,%", 0x48000018, 0xff00003f, WR_D
|RD_S
|RD_T
, 0, N54
},
223 {"alni.qh", "X,Y,Z,O", 0x7800001a, 0xff00003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
224 {"alnv.ps", "D,V,T,s", 0x4c00001e, 0xfc00003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
225 {"alnv.ob", "X,Y,Z,s", 0x78000019, 0xfc00003f, WR_D
|RD_S
|RD_T
|RD_s
|FP_D
, 0, MX
|SB1
},
226 {"alnv.qh", "X,Y,Z,s", 0x7800001b, 0xfc00003f, WR_D
|RD_S
|RD_T
|RD_s
|FP_D
, 0, MX
},
227 {"and", "d,v,t", 0x00000024, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
228 {"and", "t,r,I", 0, (int) M_AND_I
, INSN_MACRO
, 0, I1
},
229 {"and.ob", "X,Y,Q", 0x7800000c, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
230 {"and.ob", "D,S,T", 0x4ac0000c, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
231 {"and.ob", "D,S,T[e]", 0x4800000c, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
232 {"and.ob", "D,S,k", 0x4bc0000c, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
233 {"and.qh", "X,Y,Q", 0x7820000c, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
234 {"andi", "t,r,i", 0x30000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
235 /* b is at the top of the table. */
236 /* bal is at the top of the table. */
237 /* bc0[tf]l? are at the bottom of the table. */
238 {"bc1any2f", "N,p", 0x45200000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
239 {"bc1any2t", "N,p", 0x45210000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
240 {"bc1any4f", "N,p", 0x45400000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
241 {"bc1any4t", "N,p", 0x45410000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, M3D
},
242 {"bc1f", "p", 0x45000000, 0xffff0000, CBD
|RD_CC
|FP_S
, 0, I1
},
243 {"bc1f", "N,p", 0x45000000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, I4_32
},
244 {"bc1fl", "p", 0x45020000, 0xffff0000, CBL
|RD_CC
|FP_S
, 0, I2
|T3
},
245 {"bc1fl", "N,p", 0x45020000, 0xffe30000, CBL
|RD_CC
|FP_S
, 0, I4_32
},
246 {"bc1t", "p", 0x45010000, 0xffff0000, CBD
|RD_CC
|FP_S
, 0, I1
},
247 {"bc1t", "N,p", 0x45010000, 0xffe30000, CBD
|RD_CC
|FP_S
, 0, I4_32
},
248 {"bc1tl", "p", 0x45030000, 0xffff0000, CBL
|RD_CC
|FP_S
, 0, I2
|T3
},
249 {"bc1tl", "N,p", 0x45030000, 0xffe30000, CBL
|RD_CC
|FP_S
, 0, I4_32
},
250 /* bc2* are at the bottom of the table. */
251 /* bc3* are at the bottom of the table. */
252 {"beqz", "s,p", 0x10000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
253 {"beqzl", "s,p", 0x50000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
254 {"beq", "s,t,p", 0x10000000, 0xfc000000, CBD
|RD_s
|RD_t
, 0, I1
},
255 {"beq", "s,I,p", 0, (int) M_BEQ_I
, INSN_MACRO
, 0, I1
},
256 {"beql", "s,t,p", 0x50000000, 0xfc000000, CBL
|RD_s
|RD_t
, 0, I2
|T3
},
257 {"beql", "s,I,p", 0, (int) M_BEQL_I
, INSN_MACRO
, 0, I2
|T3
},
258 {"bge", "s,t,p", 0, (int) M_BGE
, INSN_MACRO
, 0, I1
},
259 {"bge", "s,I,p", 0, (int) M_BGE_I
, INSN_MACRO
, 0, I1
},
260 {"bgel", "s,t,p", 0, (int) M_BGEL
, INSN_MACRO
, 0, I2
|T3
},
261 {"bgel", "s,I,p", 0, (int) M_BGEL_I
, INSN_MACRO
, 0, I2
|T3
},
262 {"bgeu", "s,t,p", 0, (int) M_BGEU
, INSN_MACRO
, 0, I1
},
263 {"bgeu", "s,I,p", 0, (int) M_BGEU_I
, INSN_MACRO
, 0, I1
},
264 {"bgeul", "s,t,p", 0, (int) M_BGEUL
, INSN_MACRO
, 0, I2
|T3
},
265 {"bgeul", "s,I,p", 0, (int) M_BGEUL_I
, INSN_MACRO
, 0, I2
|T3
},
266 {"bgez", "s,p", 0x04010000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
267 {"bgezl", "s,p", 0x04030000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
268 {"bgezal", "s,p", 0x04110000, 0xfc1f0000, CBD
|RD_s
|WR_31
, 0, I1
},
269 {"bgezall", "s,p", 0x04130000, 0xfc1f0000, CBL
|RD_s
|WR_31
, 0, I2
|T3
},
270 {"bgt", "s,t,p", 0, (int) M_BGT
, INSN_MACRO
, 0, I1
},
271 {"bgt", "s,I,p", 0, (int) M_BGT_I
, INSN_MACRO
, 0, I1
},
272 {"bgtl", "s,t,p", 0, (int) M_BGTL
, INSN_MACRO
, 0, I2
|T3
},
273 {"bgtl", "s,I,p", 0, (int) M_BGTL_I
, INSN_MACRO
, 0, I2
|T3
},
274 {"bgtu", "s,t,p", 0, (int) M_BGTU
, INSN_MACRO
, 0, I1
},
275 {"bgtu", "s,I,p", 0, (int) M_BGTU_I
, INSN_MACRO
, 0, I1
},
276 {"bgtul", "s,t,p", 0, (int) M_BGTUL
, INSN_MACRO
, 0, I2
|T3
},
277 {"bgtul", "s,I,p", 0, (int) M_BGTUL_I
, INSN_MACRO
, 0, I2
|T3
},
278 {"bgtz", "s,p", 0x1c000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
279 {"bgtzl", "s,p", 0x5c000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
280 {"ble", "s,t,p", 0, (int) M_BLE
, INSN_MACRO
, 0, I1
},
281 {"ble", "s,I,p", 0, (int) M_BLE_I
, INSN_MACRO
, 0, I1
},
282 {"blel", "s,t,p", 0, (int) M_BLEL
, INSN_MACRO
, 0, I2
|T3
},
283 {"blel", "s,I,p", 0, (int) M_BLEL_I
, INSN_MACRO
, 0, I2
|T3
},
284 {"bleu", "s,t,p", 0, (int) M_BLEU
, INSN_MACRO
, 0, I1
},
285 {"bleu", "s,I,p", 0, (int) M_BLEU_I
, INSN_MACRO
, 0, I1
},
286 {"bleul", "s,t,p", 0, (int) M_BLEUL
, INSN_MACRO
, 0, I2
|T3
},
287 {"bleul", "s,I,p", 0, (int) M_BLEUL_I
, INSN_MACRO
, 0, I2
|T3
},
288 {"blez", "s,p", 0x18000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
289 {"blezl", "s,p", 0x58000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
290 {"blt", "s,t,p", 0, (int) M_BLT
, INSN_MACRO
, 0, I1
},
291 {"blt", "s,I,p", 0, (int) M_BLT_I
, INSN_MACRO
, 0, I1
},
292 {"bltl", "s,t,p", 0, (int) M_BLTL
, INSN_MACRO
, 0, I2
|T3
},
293 {"bltl", "s,I,p", 0, (int) M_BLTL_I
, INSN_MACRO
, 0, I2
|T3
},
294 {"bltu", "s,t,p", 0, (int) M_BLTU
, INSN_MACRO
, 0, I1
},
295 {"bltu", "s,I,p", 0, (int) M_BLTU_I
, INSN_MACRO
, 0, I1
},
296 {"bltul", "s,t,p", 0, (int) M_BLTUL
, INSN_MACRO
, 0, I2
|T3
},
297 {"bltul", "s,I,p", 0, (int) M_BLTUL_I
, INSN_MACRO
, 0, I2
|T3
},
298 {"bltz", "s,p", 0x04000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
299 {"bltzl", "s,p", 0x04020000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
300 {"bltzal", "s,p", 0x04100000, 0xfc1f0000, CBD
|RD_s
|WR_31
, 0, I1
},
301 {"bltzall", "s,p", 0x04120000, 0xfc1f0000, CBL
|RD_s
|WR_31
, 0, I2
|T3
},
302 {"bnez", "s,p", 0x14000000, 0xfc1f0000, CBD
|RD_s
, 0, I1
},
303 {"bnezl", "s,p", 0x54000000, 0xfc1f0000, CBL
|RD_s
, 0, I2
|T3
},
304 {"bne", "s,t,p", 0x14000000, 0xfc000000, CBD
|RD_s
|RD_t
, 0, I1
},
305 {"bne", "s,I,p", 0, (int) M_BNE_I
, INSN_MACRO
, 0, I1
},
306 {"bnel", "s,t,p", 0x54000000, 0xfc000000, CBL
|RD_s
|RD_t
, 0, I2
|T3
},
307 {"bnel", "s,I,p", 0, (int) M_BNEL_I
, INSN_MACRO
, 0, I2
|T3
},
308 {"break", "", 0x0000000d, 0xffffffff, TRAP
, 0, I1
},
309 {"break", "c", 0x0000000d, 0xfc00ffff, TRAP
, 0, I1
},
310 {"break", "c,q", 0x0000000d, 0xfc00003f, TRAP
, 0, I1
},
311 {"c.f.d", "S,T", 0x46200030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
312 {"c.f.d", "M,S,T", 0x46200030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
313 {"c.f.s", "S,T", 0x46000030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
314 {"c.f.s", "M,S,T", 0x46000030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
315 {"c.f.ps", "S,T", 0x46c00030, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
316 {"c.f.ps", "M,S,T", 0x46c00030, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
317 {"c.un.d", "S,T", 0x46200031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
318 {"c.un.d", "M,S,T", 0x46200031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
319 {"c.un.s", "S,T", 0x46000031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
320 {"c.un.s", "M,S,T", 0x46000031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
321 {"c.un.ps", "S,T", 0x46c00031, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
322 {"c.un.ps", "M,S,T", 0x46c00031, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
323 {"c.eq.d", "S,T", 0x46200032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
324 {"c.eq.d", "M,S,T", 0x46200032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
325 {"c.eq.s", "S,T", 0x46000032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
326 {"c.eq.s", "M,S,T", 0x46000032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
327 {"c.eq.ob", "Y,Q", 0x78000001, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
328 {"c.eq.ob", "S,T", 0x4ac00001, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
329 {"c.eq.ob", "S,T[e]", 0x48000001, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
330 {"c.eq.ob", "S,k", 0x4bc00001, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
331 {"c.eq.ps", "S,T", 0x46c00032, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
332 {"c.eq.ps", "M,S,T", 0x46c00032, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
333 {"c.eq.qh", "Y,Q", 0x78200001, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
},
334 {"c.ueq.d", "S,T", 0x46200033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
335 {"c.ueq.d", "M,S,T", 0x46200033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
336 {"c.ueq.s", "S,T", 0x46000033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
337 {"c.ueq.s", "M,S,T", 0x46000033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
338 {"c.ueq.ps","S,T", 0x46c00033, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
339 {"c.ueq.ps","M,S,T", 0x46c00033, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
340 {"c.olt.d", "S,T", 0x46200034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
341 {"c.olt.d", "M,S,T", 0x46200034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
342 {"c.olt.s", "S,T", 0x46000034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
343 {"c.olt.s", "M,S,T", 0x46000034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
344 {"c.olt.ps","S,T", 0x46c00034, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
345 {"c.olt.ps","M,S,T", 0x46c00034, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
346 {"c.ult.d", "S,T", 0x46200035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
347 {"c.ult.d", "M,S,T", 0x46200035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
348 {"c.ult.s", "S,T", 0x46000035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
349 {"c.ult.s", "M,S,T", 0x46000035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
350 {"c.ult.ps","S,T", 0x46c00035, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
351 {"c.ult.ps","M,S,T", 0x46c00035, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
352 {"c.ole.d", "S,T", 0x46200036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
353 {"c.ole.d", "M,S,T", 0x46200036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
354 {"c.ole.s", "S,T", 0x46000036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
355 {"c.ole.s", "M,S,T", 0x46000036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
356 {"c.ole.ps","S,T", 0x46c00036, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
357 {"c.ole.ps","M,S,T", 0x46c00036, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
358 {"c.ule.d", "S,T", 0x46200037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
359 {"c.ule.d", "M,S,T", 0x46200037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
360 {"c.ule.s", "S,T", 0x46000037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
361 {"c.ule.s", "M,S,T", 0x46000037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
362 {"c.ule.ps","S,T", 0x46c00037, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
363 {"c.ule.ps","M,S,T", 0x46c00037, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
364 {"c.sf.d", "S,T", 0x46200038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
365 {"c.sf.d", "M,S,T", 0x46200038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
366 {"c.sf.s", "S,T", 0x46000038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
367 {"c.sf.s", "M,S,T", 0x46000038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
368 {"c.sf.ps", "S,T", 0x46c00038, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
369 {"c.sf.ps", "M,S,T", 0x46c00038, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
370 {"c.ngle.d","S,T", 0x46200039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
371 {"c.ngle.d","M,S,T", 0x46200039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
372 {"c.ngle.s","S,T", 0x46000039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
373 {"c.ngle.s","M,S,T", 0x46000039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
374 {"c.ngle.ps","S,T", 0x46c00039, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
375 {"c.ngle.ps","M,S,T", 0x46c00039, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
376 {"c.seq.d", "S,T", 0x4620003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
377 {"c.seq.d", "M,S,T", 0x4620003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
378 {"c.seq.s", "S,T", 0x4600003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
379 {"c.seq.s", "M,S,T", 0x4600003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
380 {"c.seq.ps","S,T", 0x46c0003a, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
381 {"c.seq.ps","M,S,T", 0x46c0003a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
382 {"c.ngl.d", "S,T", 0x4620003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
383 {"c.ngl.d", "M,S,T", 0x4620003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
384 {"c.ngl.s", "S,T", 0x4600003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
385 {"c.ngl.s", "M,S,T", 0x4600003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
386 {"c.ngl.ps","S,T", 0x46c0003b, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
387 {"c.ngl.ps","M,S,T", 0x46c0003b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
388 {"c.lt.d", "S,T", 0x4620003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
389 {"c.lt.d", "M,S,T", 0x4620003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
390 {"c.lt.s", "S,T", 0x4600003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
391 {"c.lt.s", "M,S,T", 0x4600003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
392 {"c.lt.ob", "Y,Q", 0x78000004, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
393 {"c.lt.ob", "S,T", 0x4ac00004, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
394 {"c.lt.ob", "S,T[e]", 0x48000004, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
395 {"c.lt.ob", "S,k", 0x4bc00004, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
396 {"c.lt.ps", "S,T", 0x46c0003c, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
397 {"c.lt.ps", "M,S,T", 0x46c0003c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
398 {"c.lt.qh", "Y,Q", 0x78200004, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
},
399 {"c.nge.d", "S,T", 0x4620003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
400 {"c.nge.d", "M,S,T", 0x4620003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
401 {"c.nge.s", "S,T", 0x4600003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
402 {"c.nge.s", "M,S,T", 0x4600003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
403 {"c.nge.ps","S,T", 0x46c0003d, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
404 {"c.nge.ps","M,S,T", 0x46c0003d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
405 {"c.le.d", "S,T", 0x4620003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
406 {"c.le.d", "M,S,T", 0x4620003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
407 {"c.le.s", "S,T", 0x4600003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
408 {"c.le.s", "M,S,T", 0x4600003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
409 {"c.le.ob", "Y,Q", 0x78000005, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
410 {"c.le.ob", "S,T", 0x4ac00005, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
411 {"c.le.ob", "S,T[e]", 0x48000005, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
412 {"c.le.ob", "S,k", 0x4bc00005, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
413 {"c.le.ps", "S,T", 0x46c0003e, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
414 {"c.le.ps", "M,S,T", 0x46c0003e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
415 {"c.le.qh", "Y,Q", 0x78200005, 0xfc2007ff, WR_CC
|RD_S
|RD_T
|FP_D
, 0, MX
},
416 {"c.ngt.d", "S,T", 0x4620003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I1
},
417 {"c.ngt.d", "M,S,T", 0x4620003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I4_32
},
418 {"c.ngt.s", "S,T", 0x4600003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I1
},
419 {"c.ngt.s", "M,S,T", 0x4600003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, I4_32
},
420 {"c.ngt.ps","S,T", 0x46c0003f, 0xffe007ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
421 {"c.ngt.ps","M,S,T", 0x46c0003f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, I5_33
},
422 {"cabs.eq.d", "M,S,T", 0x46200072, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
423 {"cabs.eq.ps", "M,S,T", 0x46c00072, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
424 {"cabs.eq.s", "M,S,T", 0x46000072, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
425 {"cabs.f.d", "M,S,T", 0x46200070, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
426 {"cabs.f.ps", "M,S,T", 0x46c00070, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
427 {"cabs.f.s", "M,S,T", 0x46000070, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
428 {"cabs.le.d", "M,S,T", 0x4620007e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
429 {"cabs.le.ps", "M,S,T", 0x46c0007e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
430 {"cabs.le.s", "M,S,T", 0x4600007e, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
431 {"cabs.lt.d", "M,S,T", 0x4620007c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
432 {"cabs.lt.ps", "M,S,T", 0x46c0007c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
433 {"cabs.lt.s", "M,S,T", 0x4600007c, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
434 {"cabs.nge.d", "M,S,T", 0x4620007d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
435 {"cabs.nge.ps","M,S,T", 0x46c0007d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
436 {"cabs.nge.s", "M,S,T", 0x4600007d, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
437 {"cabs.ngl.d", "M,S,T", 0x4620007b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
438 {"cabs.ngl.ps","M,S,T", 0x46c0007b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
439 {"cabs.ngl.s", "M,S,T", 0x4600007b, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
440 {"cabs.ngle.d","M,S,T", 0x46200079, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
441 {"cabs.ngle.ps","M,S,T",0x46c00079, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
442 {"cabs.ngle.s","M,S,T", 0x46000079, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
443 {"cabs.ngt.d", "M,S,T", 0x4620007f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
444 {"cabs.ngt.ps","M,S,T", 0x46c0007f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
445 {"cabs.ngt.s", "M,S,T", 0x4600007f, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
446 {"cabs.ole.d", "M,S,T", 0x46200076, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
447 {"cabs.ole.ps","M,S,T", 0x46c00076, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
448 {"cabs.ole.s", "M,S,T", 0x46000076, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
449 {"cabs.olt.d", "M,S,T", 0x46200074, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
450 {"cabs.olt.ps","M,S,T", 0x46c00074, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
451 {"cabs.olt.s", "M,S,T", 0x46000074, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
452 {"cabs.seq.d", "M,S,T", 0x4620007a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
453 {"cabs.seq.ps","M,S,T", 0x46c0007a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
454 {"cabs.seq.s", "M,S,T", 0x4600007a, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
455 {"cabs.sf.d", "M,S,T", 0x46200078, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
456 {"cabs.sf.ps", "M,S,T", 0x46c00078, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
457 {"cabs.sf.s", "M,S,T", 0x46000078, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
458 {"cabs.ueq.d", "M,S,T", 0x46200073, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
459 {"cabs.ueq.ps","M,S,T", 0x46c00073, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
460 {"cabs.ueq.s", "M,S,T", 0x46000073, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
461 {"cabs.ule.d", "M,S,T", 0x46200077, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
462 {"cabs.ule.ps","M,S,T", 0x46c00077, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
463 {"cabs.ule.s", "M,S,T", 0x46000077, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
464 {"cabs.ult.d", "M,S,T", 0x46200075, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
465 {"cabs.ult.ps","M,S,T", 0x46c00075, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
466 {"cabs.ult.s", "M,S,T", 0x46000075, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
467 {"cabs.un.d", "M,S,T", 0x46200071, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
468 {"cabs.un.ps", "M,S,T", 0x46c00071, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_D
, 0, M3D
},
469 {"cabs.un.s", "M,S,T", 0x46000071, 0xffe000ff, RD_S
|RD_T
|WR_CC
|FP_S
, 0, M3D
},
470 /* CW4010 instructions which are aliases for the cache instruction. */
471 {"flushi", "", 0xbc010000, 0xffffffff, 0, 0, L1
},
472 {"flushd", "", 0xbc020000, 0xffffffff, 0, 0, L1
},
473 {"flushid", "", 0xbc030000, 0xffffffff, 0, 0, L1
},
474 {"wb", "o(b)", 0xbc040000, 0xfc1f0000, SM
|RD_b
, 0, L1
},
475 {"cache", "k,o(b)", 0xbc000000, 0xfc000000, RD_b
, 0, I3_32
|T3
},
476 {"cache", "k,A(b)", 0, (int) M_CACHE_AB
, INSN_MACRO
, 0, I3_32
|T3
},
477 {"ceil.l.d", "D,S", 0x4620000a, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
478 {"ceil.l.s", "D,S", 0x4600000a, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
479 {"ceil.w.d", "D,S", 0x4620000e, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
480 {"ceil.w.s", "D,S", 0x4600000e, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
481 {"cfc0", "t,G", 0x40400000, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, I1
},
482 {"cfc1", "t,G", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, 0, I1
},
483 {"cfc1", "t,S", 0x44400000, 0xffe007ff, LCD
|WR_t
|RD_C1
|FP_S
, 0, I1
},
484 /* cfc2 is at the bottom of the table. */
485 /* cfc3 is at the bottom of the table. */
486 {"cftc1", "d,E", 0x41000023, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C1
|FP_S
, 0, MT32
},
487 {"cftc1", "d,T", 0x41000023, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C1
|FP_S
, 0, MT32
},
488 {"cftc2", "d,E", 0x41000025, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C2
, 0, MT32
},
489 {"clo", "U,s", 0x70000021, 0xfc0007ff, WR_d
|WR_t
|RD_s
, 0, I32
|N55
},
490 {"clz", "U,s", 0x70000020, 0xfc0007ff, WR_d
|WR_t
|RD_s
, 0, I32
|N55
},
491 {"ctc0", "t,G", 0x40c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, 0, I1
},
492 {"ctc1", "t,G", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, 0, I1
},
493 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, COD
|RD_t
|WR_CC
|FP_S
, 0, I1
},
494 /* ctc2 is at the bottom of the table. */
495 /* ctc3 is at the bottom of the table. */
496 {"cttc1", "t,g", 0x41800023, 0xffe007ff, TRAP
|COD
|RD_t
|WR_CC
|FP_S
, 0, MT32
},
497 {"cttc1", "t,S", 0x41800023, 0xffe007ff, TRAP
|COD
|RD_t
|WR_CC
|FP_S
, 0, MT32
},
498 {"cttc2", "t,g", 0x41800025, 0xffe007ff, TRAP
|COD
|RD_t
|WR_CC
, 0, MT32
},
499 {"cvt.d.l", "D,S", 0x46a00021, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
500 {"cvt.d.s", "D,S", 0x46000021, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
501 {"cvt.d.w", "D,S", 0x46800021, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
502 {"cvt.l.d", "D,S", 0x46200025, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
503 {"cvt.l.s", "D,S", 0x46000025, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
504 {"cvt.s.l", "D,S", 0x46a00020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
505 {"cvt.s.d", "D,S", 0x46200020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
506 {"cvt.s.w", "D,S", 0x46800020, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
507 {"cvt.s.pl","D,S", 0x46c00028, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I5_33
},
508 {"cvt.s.pu","D,S", 0x46c00020, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I5_33
},
509 {"cvt.w.d", "D,S", 0x46200024, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I1
},
510 {"cvt.w.s", "D,S", 0x46000024, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
511 {"cvt.ps.pw", "D,S", 0x46800026, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, M3D
},
512 {"cvt.ps.s","D,V,T", 0x46000026, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
|FP_D
, 0, I5_33
},
513 {"cvt.pw.ps", "D,S", 0x46c00024, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, M3D
},
514 {"dabs", "d,v", 0, (int) M_DABS
, INSN_MACRO
, 0, I3
},
515 {"dadd", "d,v,t", 0x0000002c, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
516 {"dadd", "t,r,I", 0, (int) M_DADD_I
, INSN_MACRO
, 0, I3
},
517 {"daddi", "t,r,j", 0x60000000, 0xfc000000, WR_t
|RD_s
, 0, I3
},
518 {"daddiu", "t,r,j", 0x64000000, 0xfc000000, WR_t
|RD_s
, 0, I3
},
519 {"daddu", "d,v,t", 0x0000002d, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
520 {"daddu", "t,r,I", 0, (int) M_DADDU_I
, INSN_MACRO
, 0, I3
},
521 {"dbreak", "", 0x7000003f, 0xffffffff, 0, 0, N5
},
522 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s
|WR_d
|WR_t
, 0, I64
|N55
},
523 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s
|WR_d
|WR_t
, 0, I64
|N55
},
524 /* dctr and dctw are used on the r5000. */
525 {"dctr", "o(b)", 0xbc050000, 0xfc1f0000, RD_b
, 0, I3
},
526 {"dctw", "o(b)", 0xbc090000, 0xfc1f0000, RD_b
, 0, I3
},
527 {"deret", "", 0x4200001f, 0xffffffff, 0, 0, I32
|G2
},
528 {"dext", "t,r,I,+I", 0, (int) M_DEXT
, INSN_MACRO
, 0, I65
},
529 {"dext", "t,r,+A,+C", 0x7c000003, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
530 {"dextm", "t,r,+A,+G", 0x7c000001, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
531 {"dextu", "t,r,+E,+H", 0x7c000002, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
532 /* For ddiv, see the comments about div. */
533 {"ddiv", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
534 {"ddiv", "d,v,t", 0, (int) M_DDIV_3
, INSN_MACRO
, 0, I3
},
535 {"ddiv", "d,v,I", 0, (int) M_DDIV_3I
, INSN_MACRO
, 0, I3
},
536 /* For ddivu, see the comments about div. */
537 {"ddivu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
538 {"ddivu", "d,v,t", 0, (int) M_DDIVU_3
, INSN_MACRO
, 0, I3
},
539 {"ddivu", "d,v,I", 0, (int) M_DDIVU_3I
, INSN_MACRO
, 0, I3
},
540 {"di", "", 0x41606000, 0xffffffff, WR_t
|WR_C0
, 0, I33
},
541 {"di", "t", 0x41606000, 0xffe0ffff, WR_t
|WR_C0
, 0, I33
},
542 {"dins", "t,r,I,+I", 0, (int) M_DINS
, INSN_MACRO
, 0, I65
},
543 {"dins", "t,r,+A,+B", 0x7c000007, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
544 {"dinsm", "t,r,+A,+F", 0x7c000005, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
545 {"dinsu", "t,r,+E,+F", 0x7c000006, 0xfc00003f, WR_t
|RD_s
, 0, I65
},
546 /* The MIPS assembler treats the div opcode with two operands as
547 though the first operand appeared twice (the first operand is both
548 a source and a destination). To get the div machine instruction,
549 you must use an explicit destination of $0. */
550 {"div", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
551 {"div", "z,t", 0x0000001a, 0xffe0ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
552 {"div", "d,v,t", 0, (int) M_DIV_3
, INSN_MACRO
, 0, I1
},
553 {"div", "d,v,I", 0, (int) M_DIV_3I
, INSN_MACRO
, 0, I1
},
554 {"div.d", "D,V,T", 0x46200003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
555 {"div.s", "D,V,T", 0x46000003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
556 {"div.ps", "D,V,T", 0x46c00003, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, SB1
},
557 /* For divu, see the comments about div. */
558 {"divu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
559 {"divu", "z,t", 0x0000001b, 0xffe0ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
560 {"divu", "d,v,t", 0, (int) M_DIVU_3
, INSN_MACRO
, 0, I1
},
561 {"divu", "d,v,I", 0, (int) M_DIVU_3I
, INSN_MACRO
, 0, I1
},
562 {"dla", "t,A(b)", 0, (int) M_DLA_AB
, INSN_MACRO
, 0, I3
},
563 {"dlca", "t,A(b)", 0, (int) M_DLCA_AB
, INSN_MACRO
, 0, I3
},
564 {"dli", "t,j", 0x24000000, 0xffe00000, WR_t
, 0, I3
}, /* addiu */
565 {"dli", "t,i", 0x34000000, 0xffe00000, WR_t
, 0, I3
}, /* ori */
566 {"dli", "t,I", 0, (int) M_DLI
, INSN_MACRO
, 0, I3
},
567 {"dmacc", "d,s,t", 0x00000029, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
568 {"dmacchi", "d,s,t", 0x00000229, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
569 {"dmacchis", "d,s,t", 0x00000629, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
570 {"dmacchiu", "d,s,t", 0x00000269, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
571 {"dmacchius", "d,s,t", 0x00000669, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
572 {"dmaccs", "d,s,t", 0x00000429, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
573 {"dmaccu", "d,s,t", 0x00000069, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
574 {"dmaccus", "d,s,t", 0x00000469, 0xfc0007ff, RD_s
|RD_t
|WR_LO
|WR_d
, 0, N412
},
575 {"dmadd16", "s,t", 0x00000029, 0xfc00ffff, RD_s
|RD_t
|MOD_LO
, 0, N411
},
576 {"dmfc0", "t,G", 0x40200000, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, I3
},
577 {"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I64
},
578 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I64
},
579 {"dmt", "", 0x41600bc1, 0xffffffff, TRAP
, 0, MT32
},
580 {"dmt", "t", 0x41600bc1, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
581 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, 0, I3
},
582 {"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I64
},
583 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I64
},
584 {"dmfc1", "t,S", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I3
},
585 {"dmfc1", "t,G", 0x44200000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I3
},
586 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I3
},
587 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I3
},
588 /* dmfc2 is at the bottom of the table. */
589 /* dmtc2 is at the bottom of the table. */
590 /* dmfc3 is at the bottom of the table. */
591 /* dmtc3 is at the bottom of the table. */
592 {"dmul", "d,v,t", 0, (int) M_DMUL
, INSN_MACRO
, 0, I3
},
593 {"dmul", "d,v,I", 0, (int) M_DMUL_I
, INSN_MACRO
, 0, I3
},
594 {"dmulo", "d,v,t", 0, (int) M_DMULO
, INSN_MACRO
, 0, I3
},
595 {"dmulo", "d,v,I", 0, (int) M_DMULO_I
, INSN_MACRO
, 0, I3
},
596 {"dmulou", "d,v,t", 0, (int) M_DMULOU
, INSN_MACRO
, 0, I3
},
597 {"dmulou", "d,v,I", 0, (int) M_DMULOU_I
, INSN_MACRO
, 0, I3
},
598 {"dmult", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
599 {"dmultu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
600 {"dneg", "d,w", 0x0000002e, 0xffe007ff, WR_d
|RD_t
, 0, I3
}, /* dsub 0 */
601 {"dnegu", "d,w", 0x0000002f, 0xffe007ff, WR_d
|RD_t
, 0, I3
}, /* dsubu 0*/
602 {"drem", "z,s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
603 {"drem", "d,v,t", 3, (int) M_DREM_3
, INSN_MACRO
, 0, I3
},
604 {"drem", "d,v,I", 3, (int) M_DREM_3I
, INSN_MACRO
, 0, I3
},
605 {"dremu", "z,s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I3
},
606 {"dremu", "d,v,t", 3, (int) M_DREMU_3
, INSN_MACRO
, 0, I3
},
607 {"dremu", "d,v,I", 3, (int) M_DREMU_3I
, INSN_MACRO
, 0, I3
},
608 {"dret", "", 0x7000003e, 0xffffffff, 0, 0, N5
},
609 {"drol", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I3
},
610 {"drol", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I3
},
611 {"dror", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I3
},
612 {"dror", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I3
},
613 {"dror", "d,w,<", 0x0020003a, 0xffe0003f, WR_d
|RD_t
, 0, N5
|I65
},
614 {"drorv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, N5
|I65
},
615 {"dror32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d
|RD_t
, 0, N5
|I65
},
616 {"drotl", "d,v,t", 0, (int) M_DROL
, INSN_MACRO
, 0, I65
},
617 {"drotl", "d,v,I", 0, (int) M_DROL_I
, INSN_MACRO
, 0, I65
},
618 {"drotr", "d,v,t", 0, (int) M_DROR
, INSN_MACRO
, 0, I65
},
619 {"drotr", "d,v,I", 0, (int) M_DROR_I
, INSN_MACRO
, 0, I65
},
620 {"drotrv", "d,t,s", 0x00000056, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I65
},
621 {"drotr32", "d,w,<", 0x0020003e, 0xffe0003f, WR_d
|RD_t
, 0, I65
},
622 {"dsbh", "d,w", 0x7c0000a4, 0xffe007ff, WR_d
|RD_t
, 0, I65
},
623 {"dshd", "d,w", 0x7c000164, 0xffe007ff, WR_d
|RD_t
, 0, I65
},
624 {"dsllv", "d,t,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
625 {"dsll32", "d,w,<", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
626 {"dsll", "d,w,s", 0x00000014, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsllv */
627 {"dsll", "d,w,>", 0x0000003c, 0xffe0003f, WR_d
|RD_t
, 0, I3
}, /* dsll32 */
628 {"dsll", "d,w,<", 0x00000038, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
629 {"dsrav", "d,t,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
630 {"dsra32", "d,w,<", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
631 {"dsra", "d,w,s", 0x00000017, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsrav */
632 {"dsra", "d,w,>", 0x0000003f, 0xffe0003f, WR_d
|RD_t
, 0, I3
}, /* dsra32 */
633 {"dsra", "d,w,<", 0x0000003b, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
634 {"dsrlv", "d,t,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
},
635 {"dsrl32", "d,w,<", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
636 {"dsrl", "d,w,s", 0x00000016, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I3
}, /* dsrlv */
637 {"dsrl", "d,w,>", 0x0000003e, 0xffe0003f, WR_d
|RD_t
, 0, I3
}, /* dsrl32 */
638 {"dsrl", "d,w,<", 0x0000003a, 0xffe0003f, WR_d
|RD_t
, 0, I3
},
639 {"dsub", "d,v,t", 0x0000002e, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
640 {"dsub", "d,v,I", 0, (int) M_DSUB_I
, INSN_MACRO
, 0, I3
},
641 {"dsubu", "d,v,t", 0x0000002f, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I3
},
642 {"dsubu", "d,v,I", 0, (int) M_DSUBU_I
, INSN_MACRO
, 0, I3
},
643 {"dvpe", "", 0x41600001, 0xffffffff, TRAP
, 0, MT32
},
644 {"dvpe", "t", 0x41600001, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
645 {"ei", "", 0x41606020, 0xffffffff, WR_t
|WR_C0
, 0, I33
},
646 {"ei", "t", 0x41606020, 0xffe0ffff, WR_t
|WR_C0
, 0, I33
},
647 {"emt", "", 0x41600be1, 0xffffffff, TRAP
, 0, MT32
},
648 {"emt", "t", 0x41600be1, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
649 {"eret", "", 0x42000018, 0xffffffff, 0, 0, I3_32
},
650 {"evpe", "", 0x41600021, 0xffffffff, TRAP
, 0, MT32
},
651 {"evpe", "t", 0x41600021, 0xffe0ffff, TRAP
|WR_t
, 0, MT32
},
652 {"ext", "t,r,+A,+C", 0x7c000000, 0xfc00003f, WR_t
|RD_s
, 0, I33
},
653 {"floor.l.d", "D,S", 0x4620000b, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
654 {"floor.l.s", "D,S", 0x4600000b, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
655 {"floor.w.d", "D,S", 0x4620000f, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
656 {"floor.w.s", "D,S", 0x4600000f, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
657 {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1
},
658 {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t
|RD_s
, 0, I33
},
659 {"jr", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, 0, I1
},
660 /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with
661 the same hazard barrier effect. */
662 {"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD
|RD_s
, 0, I32
},
663 {"j", "s", 0x00000008, 0xfc1fffff, UBD
|RD_s
, 0, I1
}, /* jr */
664 /* SVR4 PIC code requires special handling for j, so it must be a
666 {"j", "a", 0, (int) M_J_A
, INSN_MACRO
, 0, I1
},
667 /* This form of j is used by the disassembler and internally by the
668 assembler, but will never match user input (because the line above
669 will match first). */
670 {"j", "a", 0x08000000, 0xfc000000, UBD
, 0, I1
},
671 {"jalr", "s", 0x0000f809, 0xfc1fffff, UBD
|RD_s
|WR_d
, 0, I1
},
672 {"jalr", "d,s", 0x00000009, 0xfc1f07ff, UBD
|RD_s
|WR_d
, 0, I1
},
673 /* jalr.hb is officially MIPS{32,64}R2, but it works on R1 as jalr
674 with the same hazard barrier effect. */
675 {"jalr.hb", "s", 0x0000fc09, 0xfc1fffff, UBD
|RD_s
|WR_d
, 0, I32
},
676 {"jalr.hb", "d,s", 0x00000409, 0xfc1f07ff, UBD
|RD_s
|WR_d
, 0, I32
},
677 /* SVR4 PIC code requires special handling for jal, so it must be a
679 {"jal", "d,s", 0, (int) M_JAL_2
, INSN_MACRO
, 0, I1
},
680 {"jal", "s", 0, (int) M_JAL_1
, INSN_MACRO
, 0, I1
},
681 {"jal", "a", 0, (int) M_JAL_A
, INSN_MACRO
, 0, I1
},
682 /* This form of jal is used by the disassembler and internally by the
683 assembler, but will never match user input (because the line above
684 will match first). */
685 {"jal", "a", 0x0c000000, 0xfc000000, UBD
|WR_31
, 0, I1
},
686 {"jalx", "a", 0x74000000, 0xfc000000, UBD
|WR_31
, 0, I16
},
687 {"la", "t,A(b)", 0, (int) M_LA_AB
, INSN_MACRO
, 0, I1
},
688 {"lb", "t,o(b)", 0x80000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
689 {"lb", "t,A(b)", 0, (int) M_LB_AB
, INSN_MACRO
, 0, I1
},
690 {"lbu", "t,o(b)", 0x90000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
691 {"lbu", "t,A(b)", 0, (int) M_LBU_AB
, INSN_MACRO
, 0, I1
},
692 {"lca", "t,A(b)", 0, (int) M_LCA_AB
, INSN_MACRO
, 0, I1
},
693 {"ld", "t,o(b)", 0xdc000000, 0xfc000000, WR_t
|RD_b
, 0, I3
},
694 {"ld", "t,o(b)", 0, (int) M_LD_OB
, INSN_MACRO
, 0, I1
},
695 {"ld", "t,A(b)", 0, (int) M_LD_AB
, INSN_MACRO
, 0, I1
},
696 {"ldc1", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, 0, I2
},
697 {"ldc1", "E,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, 0, I2
},
698 {"ldc1", "T,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, 0, I2
},
699 {"ldc1", "E,A(b)", 0, (int) M_LDC1_AB
, INSN_MACRO
, 0, I2
},
700 {"l.d", "T,o(b)", 0xd4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_D
, 0, I2
}, /* ldc1 */
701 {"l.d", "T,o(b)", 0, (int) M_L_DOB
, INSN_MACRO
, 0, I1
},
702 {"l.d", "T,A(b)", 0, (int) M_L_DAB
, INSN_MACRO
, 0, I1
},
703 {"ldc2", "E,o(b)", 0xd8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I2
},
704 {"ldc2", "E,A(b)", 0, (int) M_LDC2_AB
, INSN_MACRO
, 0, I2
},
705 {"ldc3", "E,o(b)", 0xdc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I2
},
706 {"ldc3", "E,A(b)", 0, (int) M_LDC3_AB
, INSN_MACRO
, 0, I2
},
707 {"ldl", "t,o(b)", 0x68000000, 0xfc000000, LDD
|WR_t
|RD_b
, 0, I3
},
708 {"ldl", "t,A(b)", 0, (int) M_LDL_AB
, INSN_MACRO
, 0, I3
},
709 {"ldr", "t,o(b)", 0x6c000000, 0xfc000000, LDD
|WR_t
|RD_b
, 0, I3
},
710 {"ldr", "t,A(b)", 0, (int) M_LDR_AB
, INSN_MACRO
, 0, I3
},
711 {"ldxc1", "D,t(b)", 0x4c000001, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
|FP_D
, 0, I4_33
},
712 {"lh", "t,o(b)", 0x84000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
713 {"lh", "t,A(b)", 0, (int) M_LH_AB
, INSN_MACRO
, 0, I1
},
714 {"lhu", "t,o(b)", 0x94000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
715 {"lhu", "t,A(b)", 0, (int) M_LHU_AB
, INSN_MACRO
, 0, I1
},
716 /* li is at the start of the table. */
717 {"li.d", "t,F", 0, (int) M_LI_D
, INSN_MACRO
, 0, I1
},
718 {"li.d", "T,L", 0, (int) M_LI_DD
, INSN_MACRO
, 0, I1
},
719 {"li.s", "t,f", 0, (int) M_LI_S
, INSN_MACRO
, 0, I1
},
720 {"li.s", "T,l", 0, (int) M_LI_SS
, INSN_MACRO
, 0, I1
},
721 {"ll", "t,o(b)", 0xc0000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I2
},
722 {"ll", "t,A(b)", 0, (int) M_LL_AB
, INSN_MACRO
, 0, I2
},
723 {"lld", "t,o(b)", 0xd0000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I3
},
724 {"lld", "t,A(b)", 0, (int) M_LLD_AB
, INSN_MACRO
, 0, I3
},
725 {"lui", "t,u", 0x3c000000, 0xffe00000, WR_t
, 0, I1
},
726 {"luxc1", "D,t(b)", 0x4c000005, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
|FP_D
, 0, I5_33
|N55
},
727 {"lw", "t,o(b)", 0x8c000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
728 {"lw", "t,A(b)", 0, (int) M_LW_AB
, INSN_MACRO
, 0, I1
},
729 {"lwc0", "E,o(b)", 0xc0000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I1
},
730 {"lwc0", "E,A(b)", 0, (int) M_LWC0_AB
, INSN_MACRO
, 0, I1
},
731 {"lwc1", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, 0, I1
},
732 {"lwc1", "E,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, 0, I1
},
733 {"lwc1", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, 0, I1
},
734 {"lwc1", "E,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, 0, I1
},
735 {"l.s", "T,o(b)", 0xc4000000, 0xfc000000, CLD
|RD_b
|WR_T
|FP_S
, 0, I1
}, /* lwc1 */
736 {"l.s", "T,A(b)", 0, (int) M_LWC1_AB
, INSN_MACRO
, 0, I1
},
737 {"lwc2", "E,o(b)", 0xc8000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I1
},
738 {"lwc2", "E,A(b)", 0, (int) M_LWC2_AB
, INSN_MACRO
, 0, I1
},
739 {"lwc3", "E,o(b)", 0xcc000000, 0xfc000000, CLD
|RD_b
|WR_CC
, 0, I1
},
740 {"lwc3", "E,A(b)", 0, (int) M_LWC3_AB
, INSN_MACRO
, 0, I1
},
741 {"lwl", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
742 {"lwl", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I1
},
743 {"lcache", "t,o(b)", 0x88000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I2
}, /* same */
744 {"lcache", "t,A(b)", 0, (int) M_LWL_AB
, INSN_MACRO
, 0, I2
}, /* as lwl */
745 {"lwr", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I1
},
746 {"lwr", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I1
},
747 {"flush", "t,o(b)", 0x98000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I2
}, /* same */
748 {"flush", "t,A(b)", 0, (int) M_LWR_AB
, INSN_MACRO
, 0, I2
}, /* as lwr */
749 {"fork", "d,s,t", 0x7c000008, 0xfc0007ff, TRAP
|WR_d
|RD_s
|RD_t
, 0, MT32
},
750 {"lwu", "t,o(b)", 0x9c000000, 0xfc000000, LDD
|RD_b
|WR_t
, 0, I3
},
751 {"lwu", "t,A(b)", 0, (int) M_LWU_AB
, INSN_MACRO
, 0, I3
},
752 {"lwxc1", "D,t(b)", 0x4c000000, 0xfc00f83f, LDD
|WR_D
|RD_t
|RD_b
|FP_S
, 0, I4_33
},
753 {"lwxs", "d,t(b)", 0x70000088, 0xfc0007ff, LDD
|RD_b
|RD_t
|WR_d
, 0, SMT
},
754 {"macc", "d,s,t", 0x00000028, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
755 {"macc", "d,s,t", 0x00000158, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
756 {"maccs", "d,s,t", 0x00000428, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
757 {"macchi", "d,s,t", 0x00000228, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
758 {"macchi", "d,s,t", 0x00000358, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
759 {"macchis", "d,s,t", 0x00000628, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
760 {"macchiu", "d,s,t", 0x00000268, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
761 {"macchiu", "d,s,t", 0x00000359, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
762 {"macchius","d,s,t", 0x00000668, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
763 {"maccu", "d,s,t", 0x00000068, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
764 {"maccu", "d,s,t", 0x00000159, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
765 {"maccus", "d,s,t", 0x00000468, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N412
},
766 {"mad", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, P3
},
767 {"madu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, P3
},
768 {"madd.d", "D,R,S,T", 0x4c000021, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
769 {"madd.s", "D,R,S,T", 0x4c000020, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
770 {"madd.ps", "D,R,S,T", 0x4c000026, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
771 {"madd", "s,t", 0x0000001c, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
772 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
773 {"madd", "s,t", 0x70000000, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, G1
},
774 {"madd", "7,s,t", 0x70000000, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
775 {"madd", "d,s,t", 0x70000000, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
776 {"maddp", "s,t", 0x70000441, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, SMT
},
777 {"maddu", "s,t", 0x0000001d, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
778 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
779 {"maddu", "s,t", 0x70000001, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, G1
},
780 {"maddu", "7,s,t", 0x70000001, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
781 {"maddu", "d,s,t", 0x70000001, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
782 {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, N411
},
783 {"max.ob", "X,Y,Q", 0x78000007, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
784 {"max.ob", "D,S,T", 0x4ac00007, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
785 {"max.ob", "D,S,T[e]", 0x48000007, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
786 {"max.ob", "D,S,k", 0x4bc00007, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
787 {"max.qh", "X,Y,Q", 0x78200007, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
788 {"mfpc", "t,P", 0x4000c801, 0xffe0ffc1, LCD
|WR_t
|RD_C0
, 0, M1
|N5
},
789 {"mfps", "t,P", 0x4000c800, 0xffe0ffc1, LCD
|WR_t
|RD_C0
, 0, M1
|N5
},
790 {"mftacx", "d", 0x41020021, 0xffff07ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
791 {"mftacx", "d,*", 0x41020021, 0xfff307ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
792 {"mftc0", "d,+t", 0x41000000, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C0
, 0, MT32
},
793 {"mftc0", "d,+T", 0x41000000, 0xffe007f8, TRAP
|LCD
|WR_d
|RD_C0
, 0, MT32
},
794 {"mftc0", "d,E,H", 0x41000000, 0xffe007f8, TRAP
|LCD
|WR_d
|RD_C0
, 0, MT32
},
795 {"mftc1", "d,T", 0x41000022, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_S
, 0, MT32
},
796 {"mftc1", "d,E", 0x41000022, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_S
, 0, MT32
},
797 {"mftc2", "d,E", 0x41000024, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C2
, 0, MT32
},
798 {"mftdsp", "d", 0x41100021, 0xffff07ff, TRAP
|WR_d
, 0, MT32
},
799 {"mftgpr", "d,t", 0x41000020, 0xffe007ff, TRAP
|WR_d
|RD_t
, 0, MT32
},
800 {"mfthc1", "d,T", 0x41000032, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_D
, 0, MT32
},
801 {"mfthc1", "d,E", 0x41000032, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_T
|FP_D
, 0, MT32
},
802 {"mfthc2", "d,E", 0x41000034, 0xffe007ff, TRAP
|LCD
|WR_d
|RD_C2
, 0, MT32
},
803 {"mfthi", "d", 0x41010021, 0xffff07ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
804 {"mfthi", "d,*", 0x41010021, 0xfff307ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
805 {"mftlo", "d", 0x41000021, 0xffff07ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
806 {"mftlo", "d,*", 0x41000021, 0xfff307ff, TRAP
|WR_d
|RD_a
, 0, MT32
},
807 {"mftr", "d,t,!,H,$", 0x41000000, 0xffe007c8, TRAP
|WR_d
, 0, MT32
},
808 {"mfc0", "t,G", 0x40000000, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, I1
},
809 {"mfc0", "t,+D", 0x40000000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I32
},
810 {"mfc0", "t,G,H", 0x40000000, 0xffe007f8, LCD
|WR_t
|RD_C0
, 0, I32
},
811 {"mfc1", "t,S", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, 0, I1
},
812 {"mfc1", "t,G", 0x44000000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_S
, 0, I1
},
813 {"mfhc1", "t,S", 0x44600000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I33
},
814 {"mfhc1", "t,G", 0x44600000, 0xffe007ff, LCD
|WR_t
|RD_S
|FP_D
, 0, I33
},
815 /* mfc2 is at the bottom of the table. */
816 /* mfhc2 is at the bottom of the table. */
817 /* mfc3 is at the bottom of the table. */
818 {"mfdr", "t,G", 0x7000003d, 0xffe007ff, LCD
|WR_t
|RD_C0
, 0, N5
},
819 {"mfhi", "d", 0x00000010, 0xffff07ff, WR_d
|RD_HI
, 0, I1
},
820 {"mfhi", "d,9", 0x00000010, 0xff9f07ff, WR_d
|RD_HI
, 0, D32
},
821 {"mflo", "d", 0x00000012, 0xffff07ff, WR_d
|RD_LO
, 0, I1
},
822 {"mflo", "d,9", 0x00000012, 0xff9f07ff, WR_d
|RD_LO
, 0, D32
},
823 {"mflhxu", "d", 0x00000052, 0xffff07ff, WR_d
|MOD_HILO
, 0, SMT
},
824 {"min.ob", "X,Y,Q", 0x78000006, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
825 {"min.ob", "D,S,T", 0x4ac00006, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
826 {"min.ob", "D,S,T[e]", 0x48000006, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
827 {"min.ob", "D,S,k", 0x4bc00006, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
828 {"min.qh", "X,Y,Q", 0x78200006, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
829 {"mov.d", "D,S", 0x46200006, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I1
},
830 {"mov.s", "D,S", 0x46000006, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
831 {"mov.ps", "D,S", 0x46c00006, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I5_33
},
832 {"movf", "d,s,N", 0x00000001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
|FP_S
|FP_D
, 0, I4_32
},
833 {"movf.d", "D,S,N", 0x46200011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I4_32
},
834 {"movf.l", "D,S,N", 0x46a00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
835 {"movf.l", "X,Y,N", 0x46a00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
836 {"movf.s", "D,S,N", 0x46000011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, 0, I4_32
},
837 {"movf.ps", "D,S,N", 0x46c00011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I5_33
},
838 {"movn", "d,v,t", 0x0000000b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I4_32
},
839 {"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d
|RD_s
, 0, L1
},
840 {"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I4_32
},
841 {"movn.l", "D,S,t", 0x46a00013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
842 {"movn.l", "X,Y,t", 0x46a00013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
843 {"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, 0, I4_32
},
844 {"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I5_33
},
845 {"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d
|RD_s
|RD_CC
|FP_S
|FP_D
, 0, I4_32
},
846 {"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I4_32
},
847 {"movt.l", "D,S,N", 0x46a10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
848 {"movt.l", "X,Y,N", 0x46a10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, MX
|SB1
},
849 {"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_S
, 0, I4_32
},
850 {"movt.ps", "D,S,N", 0x46c10011, 0xffe3003f, WR_D
|RD_S
|RD_CC
|FP_D
, 0, I5_33
},
851 {"movz", "d,v,t", 0x0000000a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I4_32
},
852 {"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d
|RD_s
, 0, L1
},
853 {"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I4_32
},
854 {"movz.l", "D,S,t", 0x46a00012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
855 {"movz.l", "X,Y,t", 0x46a00012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, MX
|SB1
},
856 {"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_S
, 0, I4_32
},
857 {"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_D
|RD_S
|RD_t
|FP_D
, 0, I5_33
},
858 {"msac", "d,s,t", 0x000001d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
859 {"msacu", "d,s,t", 0x000001d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
860 {"msachi", "d,s,t", 0x000003d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
861 {"msachiu", "d,s,t", 0x000003d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
862 /* move is at the top of the table. */
863 {"msgn.qh", "X,Y,Q", 0x78200000, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
864 {"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
865 {"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
866 {"msub.ps", "D,R,S,T", 0x4c00002e, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
867 {"msub", "s,t", 0x0000001e, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
868 {"msub", "s,t", 0x70000004, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
869 {"msub", "7,s,t", 0x70000004, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
870 {"msubu", "s,t", 0x0000001f, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, L1
},
871 {"msubu", "s,t", 0x70000005, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, I32
|N55
},
872 {"msubu", "7,s,t", 0x70000005, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
873 {"mtpc", "t,P", 0x4080c801, 0xffe0ffc1, COD
|RD_t
|WR_C0
, 0, M1
|N5
},
874 {"mtps", "t,P", 0x4080c800, 0xffe0ffc1, COD
|RD_t
|WR_C0
, 0, M1
|N5
},
875 {"mtc0", "t,G", 0x40800000, 0xffe007ff, COD
|RD_t
|WR_C0
|WR_CC
, 0, I1
},
876 {"mtc0", "t,+D", 0x40800000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I32
},
877 {"mtc0", "t,G,H", 0x40800000, 0xffe007f8, COD
|RD_t
|WR_C0
|WR_CC
, 0, I32
},
878 {"mtc1", "t,S", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, 0, I1
},
879 {"mtc1", "t,G", 0x44800000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_S
, 0, I1
},
880 {"mthc1", "t,S", 0x44e00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I33
},
881 {"mthc1", "t,G", 0x44e00000, 0xffe007ff, COD
|RD_t
|WR_S
|FP_D
, 0, I33
},
882 /* mtc2 is at the bottom of the table. */
883 /* mthc2 is at the bottom of the table. */
884 /* mtc3 is at the bottom of the table. */
885 {"mtdr", "t,G", 0x7080003d, 0xffe007ff, COD
|RD_t
|WR_C0
, 0, N5
},
886 {"mthi", "s", 0x00000011, 0xfc1fffff, RD_s
|WR_HI
, 0, I1
},
887 {"mthi", "s,7", 0x00000011, 0xfc1fe7ff, RD_s
|WR_HI
, 0, D32
},
888 {"mtlo", "s", 0x00000013, 0xfc1fffff, RD_s
|WR_LO
, 0, I1
},
889 {"mtlo", "s,7", 0x00000013, 0xfc1fe7ff, RD_s
|WR_LO
, 0, D32
},
890 {"mtlhx", "s", 0x00000053, 0xfc1fffff, RD_s
|MOD_HILO
, 0, SMT
},
891 {"mttc0", "t,G", 0x41800000, 0xffe007ff, TRAP
|COD
|RD_t
|WR_C0
|WR_CC
, 0, MT32
},
892 {"mttc0", "t,+D", 0x41800000, 0xffe007f8, TRAP
|COD
|RD_t
|WR_C0
|WR_CC
, 0, MT32
},
893 {"mttc0", "t,G,H", 0x41800000, 0xffe007f8, TRAP
|COD
|RD_t
|WR_C0
|WR_CC
, 0, MT32
},
894 {"mttc1", "t,S", 0x41800022, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_S
, 0, MT32
},
895 {"mttc1", "t,G", 0x41800022, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_S
, 0, MT32
},
896 {"mttc2", "t,g", 0x41800024, 0xffe007ff, TRAP
|COD
|RD_t
|WR_C2
|WR_CC
, 0, MT32
},
897 {"mttacx", "t", 0x41801021, 0xffe0ffff, TRAP
|WR_a
|RD_t
, 0, MT32
},
898 {"mttacx", "t,&", 0x41801021, 0xffe09fff, TRAP
|WR_a
|RD_t
, 0, MT32
},
899 {"mttdsp", "t", 0x41808021, 0xffe0ffff, TRAP
|RD_t
, 0, MT32
},
900 {"mttgpr", "t,d", 0x41800020, 0xffe007ff, TRAP
|WR_d
|RD_t
, 0, MT32
},
901 {"mtthc1", "t,S", 0x41800032, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_D
, 0, MT32
},
902 {"mtthc1", "t,G", 0x41800032, 0xffe007ff, TRAP
|COD
|RD_t
|WR_S
|FP_D
, 0, MT32
},
903 {"mtthc2", "t,g", 0x41800034, 0xffe007ff, TRAP
|COD
|RD_t
|WR_C2
|WR_CC
, 0, MT32
},
904 {"mtthi", "t", 0x41800821, 0xffe0ffff, TRAP
|WR_a
|RD_t
, 0, MT32
},
905 {"mtthi", "t,&", 0x41800821, 0xffe09fff, TRAP
|WR_a
|RD_t
, 0, MT32
},
906 {"mttlo", "t", 0x41800021, 0xffe0ffff, TRAP
|WR_a
|RD_t
, 0, MT32
},
907 {"mttlo", "t,&", 0x41800021, 0xffe09fff, TRAP
|WR_a
|RD_t
, 0, MT32
},
908 {"mttr", "t,d,!,H,$", 0x41800000, 0xffe007c8, TRAP
|RD_t
, 0, MT32
},
909 {"mul.d", "D,V,T", 0x46200002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
910 {"mul.s", "D,V,T", 0x46000002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
911 {"mul.ob", "X,Y,Q", 0x78000030, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
912 {"mul.ob", "D,S,T", 0x4ac00030, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
913 {"mul.ob", "D,S,T[e]", 0x48000030, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
914 {"mul.ob", "D,S,k", 0x4bc00030, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
915 {"mul.ps", "D,V,T", 0x46c00002, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
916 {"mul.qh", "X,Y,Q", 0x78200030, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
917 {"mul", "d,v,t", 0x70000002, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, I32
|P3
|N55
},
918 {"mul", "d,s,t", 0x00000058, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N54
},
919 {"mul", "d,v,t", 0, (int) M_MUL
, INSN_MACRO
, 0, I1
},
920 {"mul", "d,v,I", 0, (int) M_MUL_I
, INSN_MACRO
, 0, I1
},
921 {"mula.ob", "Y,Q", 0x78000033, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
922 {"mula.ob", "S,T", 0x4ac00033, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
923 {"mula.ob", "S,T[e]", 0x48000033, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
924 {"mula.ob", "S,k", 0x4bc00033, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
925 {"mula.qh", "Y,Q", 0x78200033, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
926 {"mulhi", "d,s,t", 0x00000258, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
927 {"mulhiu", "d,s,t", 0x00000259, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
928 {"mull.ob", "Y,Q", 0x78000433, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
929 {"mull.ob", "S,T", 0x4ac00433, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
930 {"mull.ob", "S,T[e]", 0x48000433, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
931 {"mull.ob", "S,k", 0x4bc00433, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
932 {"mull.qh", "Y,Q", 0x78200433, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
933 {"mulo", "d,v,t", 0, (int) M_MULO
, INSN_MACRO
, 0, I1
},
934 {"mulo", "d,v,I", 0, (int) M_MULO_I
, INSN_MACRO
, 0, I1
},
935 {"mulou", "d,v,t", 0, (int) M_MULOU
, INSN_MACRO
, 0, I1
},
936 {"mulou", "d,v,I", 0, (int) M_MULOU_I
, INSN_MACRO
, 0, I1
},
937 {"mulr.ps", "D,S,T", 0x46c0001a, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
938 {"muls", "d,s,t", 0x000000d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
939 {"mulsu", "d,s,t", 0x000000d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
940 {"mulshi", "d,s,t", 0x000002d8, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
941 {"mulshiu", "d,s,t", 0x000002d9, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
942 {"muls.ob", "Y,Q", 0x78000032, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
943 {"muls.ob", "S,T", 0x4ac00032, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
944 {"muls.ob", "S,T[e]", 0x48000032, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
945 {"muls.ob", "S,k", 0x4bc00032, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
946 {"muls.qh", "Y,Q", 0x78200032, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
947 {"mulsl.ob", "Y,Q", 0x78000432, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
948 {"mulsl.ob", "S,T", 0x4ac00432, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
949 {"mulsl.ob", "S,T[e]", 0x48000432, 0xfe2007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
950 {"mulsl.ob", "S,k", 0x4bc00432, 0xffe007ff, WR_CC
|RD_S
|RD_T
, 0, N54
},
951 {"mulsl.qh", "Y,Q", 0x78200432, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
952 {"mult", "s,t", 0x00000018, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, I1
},
953 {"mult", "7,s,t", 0x00000018, 0xfc00e7ff, WR_a
|RD_s
|RD_t
, 0, D33
},
954 {"mult", "d,s,t", 0x00000018, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
955 {"multp", "s,t", 0x00000459, 0xfc00ffff, RD_s
|RD_t
|MOD_HILO
, 0, SMT
},
956 {"multu", "s,t", 0x00000019, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
|IS_M
, 0, I1
},
957 {"multu", "7,s,t", 0x00000019, 0xfc00e7ff, WR_a
|RD_s
|RD_t
, 0, D33
},
958 {"multu", "d,s,t", 0x00000019, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
|IS_M
, 0, G1
},
959 {"mulu", "d,s,t", 0x00000059, 0xfc0007ff, RD_s
|RD_t
|WR_HILO
|WR_d
, 0, N5
},
960 {"neg", "d,w", 0x00000022, 0xffe007ff, WR_d
|RD_t
, 0, I1
}, /* sub 0 */
961 {"negu", "d,w", 0x00000023, 0xffe007ff, WR_d
|RD_t
, 0, I1
}, /* subu 0 */
962 {"neg.d", "D,V", 0x46200007, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I1
},
963 {"neg.s", "D,V", 0x46000007, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I1
},
964 {"neg.ps", "D,V", 0x46c00007, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I5_33
},
965 {"nmadd.d", "D,R,S,T", 0x4c000031, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
966 {"nmadd.s", "D,R,S,T", 0x4c000030, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
967 {"nmadd.ps","D,R,S,T", 0x4c000036, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
968 {"nmsub.d", "D,R,S,T", 0x4c000039, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I4_33
},
969 {"nmsub.s", "D,R,S,T", 0x4c000038, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_S
, 0, I4_33
},
970 {"nmsub.ps","D,R,S,T", 0x4c00003e, 0xfc00003f, RD_R
|RD_S
|RD_T
|WR_D
|FP_D
, 0, I5_33
},
971 /* nop is at the start of the table. */
972 {"nor", "d,v,t", 0x00000027, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
973 {"nor", "t,r,I", 0, (int) M_NOR_I
, INSN_MACRO
, 0, I1
},
974 {"nor.ob", "X,Y,Q", 0x7800000f, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
975 {"nor.ob", "D,S,T", 0x4ac0000f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
976 {"nor.ob", "D,S,T[e]", 0x4800000f, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
977 {"nor.ob", "D,S,k", 0x4bc0000f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
978 {"nor.qh", "X,Y,Q", 0x7820000f, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
979 {"not", "d,v", 0x00000027, 0xfc1f07ff, WR_d
|RD_s
|RD_t
, 0, I1
},/*nor d,s,0*/
980 {"or", "d,v,t", 0x00000025, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
981 {"or", "t,r,I", 0, (int) M_OR_I
, INSN_MACRO
, 0, I1
},
982 {"or.ob", "X,Y,Q", 0x7800000e, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
983 {"or.ob", "D,S,T", 0x4ac0000e, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
984 {"or.ob", "D,S,T[e]", 0x4800000e, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
985 {"or.ob", "D,S,k", 0x4bc0000e, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
986 {"or.qh", "X,Y,Q", 0x7820000e, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
987 {"ori", "t,r,i", 0x34000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
988 {"pabsdiff.ob", "X,Y,Q",0x78000009, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, SB1
},
989 {"pabsdiffc.ob", "Y,Q", 0x78000035, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, SB1
},
990 {"pavg.ob", "X,Y,Q", 0x78000008, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, SB1
},
991 {"pickf.ob", "X,Y,Q", 0x78000002, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
992 {"pickf.ob", "D,S,T", 0x4ac00002, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
993 {"pickf.ob", "D,S,T[e]",0x48000002, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
994 {"pickf.ob", "D,S,k", 0x4bc00002, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
995 {"pickf.qh", "X,Y,Q", 0x78200002, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
996 {"pickt.ob", "X,Y,Q", 0x78000003, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
997 {"pickt.ob", "D,S,T", 0x4ac00003, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
998 {"pickt.ob", "D,S,T[e]",0x48000003, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
999 {"pickt.ob", "D,S,k", 0x4bc00003, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1000 {"pickt.qh", "X,Y,Q", 0x78200003, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1001 {"pll.ps", "D,V,T", 0x46c0002c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1002 {"plu.ps", "D,V,T", 0x46c0002d, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1003 /* pref and prefx are at the start of the table. */
1004 {"pul.ps", "D,V,T", 0x46c0002e, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1005 {"puu.ps", "D,V,T", 0x46c0002f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1006 {"pperm", "s,t", 0x70000481, 0xfc00ffff, MOD_HILO
|RD_s
|RD_t
, 0, SMT
},
1007 {"rach.ob", "X", 0x7a00003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
|SB1
},
1008 {"rach.ob", "D", 0x4a00003f, 0xfffff83f, WR_D
, 0, N54
},
1009 {"rach.qh", "X", 0x7a20003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
},
1010 {"racl.ob", "X", 0x7800003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
|SB1
},
1011 {"racl.ob", "D", 0x4800003f, 0xfffff83f, WR_D
, 0, N54
},
1012 {"racl.qh", "X", 0x7820003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
},
1013 {"racm.ob", "X", 0x7900003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
|SB1
},
1014 {"racm.ob", "D", 0x4900003f, 0xfffff83f, WR_D
, 0, N54
},
1015 {"racm.qh", "X", 0x7920003f, 0xfffff83f, WR_D
|FP_D
, RD_MACC
, MX
},
1016 {"recip.d", "D,S", 0x46200015, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I4_33
},
1017 {"recip.ps","D,S", 0x46c00015, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, SB1
},
1018 {"recip.s", "D,S", 0x46000015, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I4_33
},
1019 {"recip1.d", "D,S", 0x4620001d, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, M3D
},
1020 {"recip1.ps", "D,S", 0x46c0001d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1021 {"recip1.s", "D,S", 0x4600001d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1022 {"recip2.d", "D,S,T", 0x4620001c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
1023 {"recip2.ps", "D,S,T", 0x46c0001c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1024 {"recip2.s", "D,S,T", 0x4600001c, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1025 {"rem", "z,s,t", 0x0000001a, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
1026 {"rem", "d,v,t", 0, (int) M_REM_3
, INSN_MACRO
, 0, I1
},
1027 {"rem", "d,v,I", 0, (int) M_REM_3I
, INSN_MACRO
, 0, I1
},
1028 {"remu", "z,s,t", 0x0000001b, 0xfc00ffff, RD_s
|RD_t
|WR_HILO
, 0, I1
},
1029 {"remu", "d,v,t", 0, (int) M_REMU_3
, INSN_MACRO
, 0, I1
},
1030 {"remu", "d,v,I", 0, (int) M_REMU_3I
, INSN_MACRO
, 0, I1
},
1031 {"rdhwr", "t,K", 0x7c00003b, 0xffe007ff, WR_t
, 0, I33
},
1032 {"rdpgpr", "d,w", 0x41400000, 0xffe007ff, WR_d
, 0, I33
},
1033 {"rfe", "", 0x42000010, 0xffffffff, 0, 0, I1
|T3
},
1034 {"rnas.qh", "X,Q", 0x78200025, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1035 {"rnau.ob", "X,Q", 0x78000021, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
|SB1
},
1036 {"rnau.qh", "X,Q", 0x78200021, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1037 {"rnes.qh", "X,Q", 0x78200026, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1038 {"rneu.ob", "X,Q", 0x78000022, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
|SB1
},
1039 {"rneu.qh", "X,Q", 0x78200022, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1040 {"rol", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I1
},
1041 {"rol", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I1
},
1042 {"ror", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I1
},
1043 {"ror", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I1
},
1044 {"ror", "d,w,<", 0x00200002, 0xffe0003f, WR_d
|RD_t
, 0, N5
|I33
|SMT
},
1045 {"rorv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, N5
|I33
|SMT
},
1046 {"rotl", "d,v,t", 0, (int) M_ROL
, INSN_MACRO
, 0, I33
|SMT
},
1047 {"rotl", "d,v,I", 0, (int) M_ROL_I
, INSN_MACRO
, 0, I33
|SMT
},
1048 {"rotr", "d,v,t", 0, (int) M_ROR
, INSN_MACRO
, 0, I33
|SMT
},
1049 {"rotr", "d,v,I", 0, (int) M_ROR_I
, INSN_MACRO
, 0, I33
|SMT
},
1050 {"rotrv", "d,t,s", 0x00000046, 0xfc0007ff, RD_t
|RD_s
|WR_d
, 0, I33
|SMT
},
1051 {"round.l.d", "D,S", 0x46200008, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
1052 {"round.l.s", "D,S", 0x46000008, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
1053 {"round.w.d", "D,S", 0x4620000c, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
1054 {"round.w.s", "D,S", 0x4600000c, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1055 {"rsqrt.d", "D,S", 0x46200016, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I4_33
},
1056 {"rsqrt.ps","D,S", 0x46c00016, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, SB1
},
1057 {"rsqrt.s", "D,S", 0x46000016, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I4_33
},
1058 {"rsqrt1.d", "D,S", 0x4620001e, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, M3D
},
1059 {"rsqrt1.ps", "D,S", 0x46c0001e, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1060 {"rsqrt1.s", "D,S", 0x4600001e, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, M3D
},
1061 {"rsqrt2.d", "D,S,T", 0x4620001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, M3D
},
1062 {"rsqrt2.ps", "D,S,T", 0x46c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1063 {"rsqrt2.s", "D,S,T", 0x4600001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, M3D
},
1064 {"rzs.qh", "X,Q", 0x78200024, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1065 {"rzu.ob", "X,Q", 0x78000020, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
|SB1
},
1066 {"rzu.ob", "D,k", 0x4bc00020, 0xffe0f83f, WR_D
|RD_S
|RD_T
, 0, N54
},
1067 {"rzu.qh", "X,Q", 0x78200020, 0xfc20f83f, WR_D
|RD_T
|FP_D
, RD_MACC
, MX
},
1068 {"sb", "t,o(b)", 0xa0000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1069 {"sb", "t,A(b)", 0, (int) M_SB_AB
, INSN_MACRO
, 0, I1
},
1070 {"sc", "t,o(b)", 0xe0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, 0, I2
},
1071 {"sc", "t,A(b)", 0, (int) M_SC_AB
, INSN_MACRO
, 0, I2
},
1072 {"scd", "t,o(b)", 0xf0000000, 0xfc000000, SM
|RD_t
|WR_t
|RD_b
, 0, I3
},
1073 {"scd", "t,A(b)", 0, (int) M_SCD_AB
, INSN_MACRO
, 0, I3
},
1074 {"sd", "t,o(b)", 0xfc000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
1075 {"sd", "t,o(b)", 0, (int) M_SD_OB
, INSN_MACRO
, 0, I1
},
1076 {"sd", "t,A(b)", 0, (int) M_SD_AB
, INSN_MACRO
, 0, I1
},
1077 {"sdbbp", "", 0x0000000e, 0xffffffff, TRAP
, 0, G2
},
1078 {"sdbbp", "c", 0x0000000e, 0xfc00ffff, TRAP
, 0, G2
},
1079 {"sdbbp", "c,q", 0x0000000e, 0xfc00003f, TRAP
, 0, G2
},
1080 {"sdbbp", "", 0x7000003f, 0xffffffff, TRAP
, 0, I32
},
1081 {"sdbbp", "B", 0x7000003f, 0xfc00003f, TRAP
, 0, I32
},
1082 {"sdc1", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I2
},
1083 {"sdc1", "E,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I2
},
1084 {"sdc1", "T,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, 0, I2
},
1085 {"sdc1", "E,A(b)", 0, (int) M_SDC1_AB
, INSN_MACRO
, 0, I2
},
1086 {"sdc2", "E,o(b)", 0xf8000000, 0xfc000000, SM
|RD_C2
|RD_b
, 0, I2
},
1087 {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB
, INSN_MACRO
, 0, I2
},
1088 {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM
|RD_C3
|RD_b
, 0, I2
},
1089 {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB
, INSN_MACRO
, 0, I2
},
1090 {"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_D
, 0, I2
},
1091 {"s.d", "T,o(b)", 0, (int) M_S_DOB
, INSN_MACRO
, 0, I1
},
1092 {"s.d", "T,A(b)", 0, (int) M_S_DAB
, INSN_MACRO
, 0, I1
},
1093 {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
1094 {"sdl", "t,A(b)", 0, (int) M_SDL_AB
, INSN_MACRO
, 0, I3
},
1095 {"sdr", "t,o(b)", 0xb4000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I3
},
1096 {"sdr", "t,A(b)", 0, (int) M_SDR_AB
, INSN_MACRO
, 0, I3
},
1097 {"sdxc1", "S,t(b)", 0x4c000009, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
|FP_D
, 0, I4_33
},
1098 {"seb", "d,w", 0x7c000420, 0xffe007ff, WR_d
|RD_t
, 0, I33
},
1099 {"seh", "d,w", 0x7c000620, 0xffe007ff, WR_d
|RD_t
, 0, I33
},
1100 {"selsl", "d,v,t", 0x00000005, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, L1
},
1101 {"selsr", "d,v,t", 0x00000001, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, L1
},
1102 {"seq", "d,v,t", 0, (int) M_SEQ
, INSN_MACRO
, 0, I1
},
1103 {"seq", "d,v,I", 0, (int) M_SEQ_I
, INSN_MACRO
, 0, I1
},
1104 {"sge", "d,v,t", 0, (int) M_SGE
, INSN_MACRO
, 0, I1
},
1105 {"sge", "d,v,I", 0, (int) M_SGE_I
, INSN_MACRO
, 0, I1
},
1106 {"sgeu", "d,v,t", 0, (int) M_SGEU
, INSN_MACRO
, 0, I1
},
1107 {"sgeu", "d,v,I", 0, (int) M_SGEU_I
, INSN_MACRO
, 0, I1
},
1108 {"sgt", "d,v,t", 0, (int) M_SGT
, INSN_MACRO
, 0, I1
},
1109 {"sgt", "d,v,I", 0, (int) M_SGT_I
, INSN_MACRO
, 0, I1
},
1110 {"sgtu", "d,v,t", 0, (int) M_SGTU
, INSN_MACRO
, 0, I1
},
1111 {"sgtu", "d,v,I", 0, (int) M_SGTU_I
, INSN_MACRO
, 0, I1
},
1112 {"sh", "t,o(b)", 0xa4000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1113 {"sh", "t,A(b)", 0, (int) M_SH_AB
, INSN_MACRO
, 0, I1
},
1114 {"shfl.bfla.qh", "X,Y,Z", 0x7a20001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1115 {"shfl.mixh.ob", "X,Y,Z", 0x7980001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1116 {"shfl.mixh.ob", "D,S,T", 0x4980001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1117 {"shfl.mixh.qh", "X,Y,Z", 0x7820001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1118 {"shfl.mixl.ob", "X,Y,Z", 0x79c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1119 {"shfl.mixl.ob", "D,S,T", 0x49c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1120 {"shfl.mixl.qh", "X,Y,Z", 0x78a0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1121 {"shfl.pach.ob", "X,Y,Z", 0x7900001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1122 {"shfl.pach.ob", "D,S,T", 0x4900001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1123 {"shfl.pach.qh", "X,Y,Z", 0x7920001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1124 {"shfl.pacl.ob", "D,S,T", 0x4940001f, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1125 {"shfl.repa.qh", "X,Y,Z", 0x7b20001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1126 {"shfl.repb.qh", "X,Y,Z", 0x7ba0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1127 {"shfl.upsl.ob", "X,Y,Z", 0x78c0001f, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1128 {"sle", "d,v,t", 0, (int) M_SLE
, INSN_MACRO
, 0, I1
},
1129 {"sle", "d,v,I", 0, (int) M_SLE_I
, INSN_MACRO
, 0, I1
},
1130 {"sleu", "d,v,t", 0, (int) M_SLEU
, INSN_MACRO
, 0, I1
},
1131 {"sleu", "d,v,I", 0, (int) M_SLEU_I
, INSN_MACRO
, 0, I1
},
1132 {"sllv", "d,t,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
1133 {"sll", "d,w,s", 0x00000004, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* sllv */
1134 {"sll", "d,w,<", 0x00000000, 0xffe0003f, WR_d
|RD_t
, 0, I1
},
1135 {"sll.ob", "X,Y,Q", 0x78000010, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1136 {"sll.ob", "D,S,T[e]", 0x48000010, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1137 {"sll.ob", "D,S,k", 0x4bc00010, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1138 {"sll.qh", "X,Y,Q", 0x78200010, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1139 {"slt", "d,v,t", 0x0000002a, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1140 {"slt", "d,v,I", 0, (int) M_SLT_I
, INSN_MACRO
, 0, I1
},
1141 {"slti", "t,r,j", 0x28000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1142 {"sltiu", "t,r,j", 0x2c000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1143 {"sltu", "d,v,t", 0x0000002b, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1144 {"sltu", "d,v,I", 0, (int) M_SLTU_I
, INSN_MACRO
, 0, I1
},
1145 {"sne", "d,v,t", 0, (int) M_SNE
, INSN_MACRO
, 0, I1
},
1146 {"sne", "d,v,I", 0, (int) M_SNE_I
, INSN_MACRO
, 0, I1
},
1147 {"sqrt.d", "D,S", 0x46200004, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I2
},
1148 {"sqrt.s", "D,S", 0x46000004, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1149 {"sqrt.ps", "D,S", 0x46c00004, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, SB1
},
1150 {"srav", "d,t,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
1151 {"sra", "d,w,s", 0x00000007, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* srav */
1152 {"sra", "d,w,<", 0x00000003, 0xffe0003f, WR_d
|RD_t
, 0, I1
},
1153 {"sra.qh", "X,Y,Q", 0x78200013, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1154 {"srlv", "d,t,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
},
1155 {"srl", "d,w,s", 0x00000006, 0xfc0007ff, WR_d
|RD_t
|RD_s
, 0, I1
}, /* srlv */
1156 {"srl", "d,w,<", 0x00000002, 0xffe0003f, WR_d
|RD_t
, 0, I1
},
1157 {"srl.ob", "X,Y,Q", 0x78000012, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1158 {"srl.ob", "D,S,T[e]", 0x48000012, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1159 {"srl.ob", "D,S,k", 0x4bc00012, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1160 {"srl.qh", "X,Y,Q", 0x78200012, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1161 /* ssnop is at the start of the table. */
1162 {"standby", "", 0x42000021, 0xffffffff, 0, 0, V1
},
1163 {"sub", "d,v,t", 0x00000022, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1164 {"sub", "d,v,I", 0, (int) M_SUB_I
, INSN_MACRO
, 0, I1
},
1165 {"sub.d", "D,V,T", 0x46200001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I1
},
1166 {"sub.s", "D,V,T", 0x46000001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_S
, 0, I1
},
1167 {"sub.ob", "X,Y,Q", 0x7800000a, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1168 {"sub.ob", "D,S,T", 0x4ac0000a, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1169 {"sub.ob", "D,S,T[e]", 0x4800000a, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1170 {"sub.ob", "D,S,k", 0x4bc0000a, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1171 {"sub.ps", "D,V,T", 0x46c00001, 0xffe0003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, I5_33
},
1172 {"sub.qh", "X,Y,Q", 0x7820000a, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1173 {"suba.ob", "Y,Q", 0x78000036, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1174 {"suba.qh", "Y,Q", 0x78200036, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1175 {"subl.ob", "Y,Q", 0x78000436, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1176 {"subl.qh", "Y,Q", 0x78200436, 0xfc2007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1177 {"subu", "d,v,t", 0x00000023, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1178 {"subu", "d,v,I", 0, (int) M_SUBU_I
, INSN_MACRO
, 0, I1
},
1179 {"suspend", "", 0x42000022, 0xffffffff, 0, 0, V1
},
1180 {"suxc1", "S,t(b)", 0x4c00000d, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
, 0, I5_33
|N55
},
1181 {"sw", "t,o(b)", 0xac000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1182 {"sw", "t,A(b)", 0, (int) M_SW_AB
, INSN_MACRO
, 0, I1
},
1183 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, SM
|RD_C0
|RD_b
, 0, I1
},
1184 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB
, INSN_MACRO
, 0, I1
},
1185 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
},
1186 {"swc1", "E,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
},
1187 {"swc1", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, 0, I1
},
1188 {"swc1", "E,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, 0, I1
},
1189 {"s.s", "T,o(b)", 0xe4000000, 0xfc000000, SM
|RD_T
|RD_b
|FP_S
, 0, I1
}, /* swc1 */
1190 {"s.s", "T,A(b)", 0, (int) M_SWC1_AB
, INSN_MACRO
, 0, I1
},
1191 {"swc2", "E,o(b)", 0xe8000000, 0xfc000000, SM
|RD_C2
|RD_b
, 0, I1
},
1192 {"swc2", "E,A(b)", 0, (int) M_SWC2_AB
, INSN_MACRO
, 0, I1
},
1193 {"swc3", "E,o(b)", 0xec000000, 0xfc000000, SM
|RD_C3
|RD_b
, 0, I1
},
1194 {"swc3", "E,A(b)", 0, (int) M_SWC3_AB
, INSN_MACRO
, 0, I1
},
1195 {"swl", "t,o(b)", 0xa8000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1196 {"swl", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I1
},
1197 {"scache", "t,o(b)", 0xa8000000, 0xfc000000, RD_t
|RD_b
, 0, I2
}, /* same */
1198 {"scache", "t,A(b)", 0, (int) M_SWL_AB
, INSN_MACRO
, 0, I2
}, /* as swl */
1199 {"swr", "t,o(b)", 0xb8000000, 0xfc000000, SM
|RD_t
|RD_b
, 0, I1
},
1200 {"swr", "t,A(b)", 0, (int) M_SWR_AB
, INSN_MACRO
, 0, I1
},
1201 {"invalidate", "t,o(b)",0xb8000000, 0xfc000000, RD_t
|RD_b
, 0, I2
}, /* same */
1202 {"invalidate", "t,A(b)",0, (int) M_SWR_AB
, INSN_MACRO
, 0, I2
}, /* as swr */
1203 {"swxc1", "S,t(b)", 0x4c000008, 0xfc0007ff, SM
|RD_S
|RD_t
|RD_b
|FP_S
, 0, I4_33
},
1204 {"sync", "", 0x0000000f, 0xffffffff, INSN_SYNC
, 0, I2
|G1
},
1205 {"sync.p", "", 0x0000040f, 0xffffffff, INSN_SYNC
, 0, I2
},
1206 {"sync.l", "", 0x0000000f, 0xffffffff, INSN_SYNC
, 0, I2
},
1207 {"synci", "o(b)", 0x041f0000, 0xfc1f0000, SM
|RD_b
, 0, I33
},
1208 {"syscall", "", 0x0000000c, 0xffffffff, TRAP
, 0, I1
},
1209 {"syscall", "B", 0x0000000c, 0xfc00003f, TRAP
, 0, I1
},
1210 {"teqi", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1211 {"teq", "s,t", 0x00000034, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1212 {"teq", "s,t,q", 0x00000034, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1213 {"teq", "s,j", 0x040c0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* teqi */
1214 {"teq", "s,I", 0, (int) M_TEQ_I
, INSN_MACRO
, 0, I2
},
1215 {"tgei", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1216 {"tge", "s,t", 0x00000030, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1217 {"tge", "s,t,q", 0x00000030, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1218 {"tge", "s,j", 0x04080000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tgei */
1219 {"tge", "s,I", 0, (int) M_TGE_I
, INSN_MACRO
, 0, I2
},
1220 {"tgeiu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1221 {"tgeu", "s,t", 0x00000031, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1222 {"tgeu", "s,t,q", 0x00000031, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1223 {"tgeu", "s,j", 0x04090000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tgeiu */
1224 {"tgeu", "s,I", 0, (int) M_TGEU_I
, INSN_MACRO
, 0, I2
},
1225 {"tlbp", "", 0x42000008, 0xffffffff, INSN_TLB
, 0, I1
},
1226 {"tlbr", "", 0x42000001, 0xffffffff, INSN_TLB
, 0, I1
},
1227 {"tlbwi", "", 0x42000002, 0xffffffff, INSN_TLB
, 0, I1
},
1228 {"tlbwr", "", 0x42000006, 0xffffffff, INSN_TLB
, 0, I1
},
1229 {"tlti", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1230 {"tlt", "s,t", 0x00000032, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1231 {"tlt", "s,t,q", 0x00000032, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1232 {"tlt", "s,j", 0x040a0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tlti */
1233 {"tlt", "s,I", 0, (int) M_TLT_I
, INSN_MACRO
, 0, I2
},
1234 {"tltiu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1235 {"tltu", "s,t", 0x00000033, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1236 {"tltu", "s,t,q", 0x00000033, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1237 {"tltu", "s,j", 0x040b0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tltiu */
1238 {"tltu", "s,I", 0, (int) M_TLTU_I
, INSN_MACRO
, 0, I2
},
1239 {"tnei", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
},
1240 {"tne", "s,t", 0x00000036, 0xfc00ffff, RD_s
|RD_t
|TRAP
, 0, I2
},
1241 {"tne", "s,t,q", 0x00000036, 0xfc00003f, RD_s
|RD_t
|TRAP
, 0, I2
},
1242 {"tne", "s,j", 0x040e0000, 0xfc1f0000, RD_s
|TRAP
, 0, I2
}, /* tnei */
1243 {"tne", "s,I", 0, (int) M_TNE_I
, INSN_MACRO
, 0, I2
},
1244 {"trunc.l.d", "D,S", 0x46200009, 0xffff003f, WR_D
|RD_S
|FP_D
, 0, I3_33
},
1245 {"trunc.l.s", "D,S", 0x46000009, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I3_33
},
1246 {"trunc.w.d", "D,S", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
1247 {"trunc.w.d", "D,S,x", 0x4620000d, 0xffff003f, WR_D
|RD_S
|FP_S
|FP_D
, 0, I2
},
1248 {"trunc.w.d", "D,S,t", 0, (int) M_TRUNCWD
, INSN_MACRO
, 0, I1
},
1249 {"trunc.w.s", "D,S", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1250 {"trunc.w.s", "D,S,x", 0x4600000d, 0xffff003f, WR_D
|RD_S
|FP_S
, 0, I2
},
1251 {"trunc.w.s", "D,S,t", 0, (int) M_TRUNCWS
, INSN_MACRO
, 0, I1
},
1252 {"uld", "t,o(b)", 0, (int) M_ULD
, INSN_MACRO
, 0, I3
},
1253 {"uld", "t,A(b)", 0, (int) M_ULD_A
, INSN_MACRO
, 0, I3
},
1254 {"ulh", "t,o(b)", 0, (int) M_ULH
, INSN_MACRO
, 0, I1
},
1255 {"ulh", "t,A(b)", 0, (int) M_ULH_A
, INSN_MACRO
, 0, I1
},
1256 {"ulhu", "t,o(b)", 0, (int) M_ULHU
, INSN_MACRO
, 0, I1
},
1257 {"ulhu", "t,A(b)", 0, (int) M_ULHU_A
, INSN_MACRO
, 0, I1
},
1258 {"ulw", "t,o(b)", 0, (int) M_ULW
, INSN_MACRO
, 0, I1
},
1259 {"ulw", "t,A(b)", 0, (int) M_ULW_A
, INSN_MACRO
, 0, I1
},
1260 {"usd", "t,o(b)", 0, (int) M_USD
, INSN_MACRO
, 0, I3
},
1261 {"usd", "t,A(b)", 0, (int) M_USD_A
, INSN_MACRO
, 0, I3
},
1262 {"ush", "t,o(b)", 0, (int) M_USH
, INSN_MACRO
, 0, I1
},
1263 {"ush", "t,A(b)", 0, (int) M_USH_A
, INSN_MACRO
, 0, I1
},
1264 {"usw", "t,o(b)", 0, (int) M_USW
, INSN_MACRO
, 0, I1
},
1265 {"usw", "t,A(b)", 0, (int) M_USW_A
, INSN_MACRO
, 0, I1
},
1266 {"wach.ob", "Y", 0x7a00003e, 0xffff07ff, RD_S
|FP_D
, WR_MACC
, MX
|SB1
},
1267 {"wach.ob", "S", 0x4a00003e, 0xffff07ff, RD_S
, 0, N54
},
1268 {"wach.qh", "Y", 0x7a20003e, 0xffff07ff, RD_S
|FP_D
, WR_MACC
, MX
},
1269 {"wacl.ob", "Y,Z", 0x7800003e, 0xffe007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
|SB1
},
1270 {"wacl.ob", "S,T", 0x4800003e, 0xffe007ff, RD_S
|RD_T
, 0, N54
},
1271 {"wacl.qh", "Y,Z", 0x7820003e, 0xffe007ff, RD_S
|RD_T
|FP_D
, WR_MACC
, MX
},
1272 {"wait", "", 0x42000020, 0xffffffff, TRAP
, 0, I3_32
},
1273 {"wait", "J", 0x42000020, 0xfe00003f, TRAP
, 0, I32
|N55
},
1274 {"waiti", "", 0x42000020, 0xffffffff, TRAP
, 0, L1
},
1275 {"wrpgpr", "d,w", 0x41c00000, 0xffe007ff, RD_t
, 0, I33
},
1276 {"wsbh", "d,w", 0x7c0000a0, 0xffe007ff, WR_d
|RD_t
, 0, I33
},
1277 {"xor", "d,v,t", 0x00000026, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, I1
},
1278 {"xor", "t,r,I", 0, (int) M_XOR_I
, INSN_MACRO
, 0, I1
},
1279 {"xor.ob", "X,Y,Q", 0x7800000d, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
|SB1
},
1280 {"xor.ob", "D,S,T", 0x4ac0000d, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1281 {"xor.ob", "D,S,T[e]", 0x4800000d, 0xfe20003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1282 {"xor.ob", "D,S,k", 0x4bc0000d, 0xffe0003f, WR_D
|RD_S
|RD_T
, 0, N54
},
1283 {"xor.qh", "X,Y,Q", 0x7820000d, 0xfc20003f, WR_D
|RD_S
|RD_T
|FP_D
, 0, MX
},
1284 {"xori", "t,r,i", 0x38000000, 0xfc000000, WR_t
|RD_s
, 0, I1
},
1285 {"yield", "s", 0x7c000009, 0xfc1fffff, TRAP
|RD_s
, 0, MT32
},
1286 {"yield", "d,s", 0x7c000009, 0xfc1f07ff, TRAP
|WR_d
|RD_s
, 0, MT32
},
1288 /* User Defined Instruction. */
1289 {"udi0", "s,t,d,+1",0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1290 {"udi0", "s,t,+2", 0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1291 {"udi0", "s,+3", 0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1292 {"udi0", "+4", 0x70000010, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1293 {"udi1", "s,t,d,+1",0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1294 {"udi1", "s,t,+2", 0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1295 {"udi1", "s,+3", 0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1296 {"udi1", "+4", 0x70000011, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1297 {"udi2", "s,t,d,+1",0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1298 {"udi2", "s,t,+2", 0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1299 {"udi2", "s,+3", 0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1300 {"udi2", "+4", 0x70000012, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1301 {"udi3", "s,t,d,+1",0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1302 {"udi3", "s,t,+2", 0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1303 {"udi3", "s,+3", 0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1304 {"udi3", "+4", 0x70000013, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1305 {"udi4", "s,t,d,+1",0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1306 {"udi4", "s,t,+2", 0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1307 {"udi4", "s,+3", 0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1308 {"udi4", "+4", 0x70000014, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1309 {"udi5", "s,t,d,+1",0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1310 {"udi5", "s,t,+2", 0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1311 {"udi5", "s,+3", 0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1312 {"udi5", "+4", 0x70000015, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1313 {"udi6", "s,t,d,+1",0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1314 {"udi6", "s,t,+2", 0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1315 {"udi6", "s,+3", 0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1316 {"udi6", "+4", 0x70000016, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1317 {"udi7", "s,t,d,+1",0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1318 {"udi7", "s,t,+2", 0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1319 {"udi7", "s,+3", 0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1320 {"udi7", "+4", 0x70000017, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1321 {"udi8", "s,t,d,+1",0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1322 {"udi8", "s,t,+2", 0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1323 {"udi8", "s,+3", 0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1324 {"udi8", "+4", 0x70000018, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1325 {"udi9", "s,t,d,+1",0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1326 {"udi9", "s,t,+2", 0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1327 {"udi9", "s,+3", 0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1328 {"udi9", "+4", 0x70000019, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1329 {"udi10", "s,t,d,+1",0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1330 {"udi10", "s,t,+2", 0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1331 {"udi10", "s,+3", 0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1332 {"udi10", "+4", 0x7000001a, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1333 {"udi11", "s,t,d,+1",0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1334 {"udi11", "s,t,+2", 0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1335 {"udi11", "s,+3", 0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1336 {"udi11", "+4", 0x7000001b, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1337 {"udi12", "s,t,d,+1",0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1338 {"udi12", "s,t,+2", 0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1339 {"udi12", "s,+3", 0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1340 {"udi12", "+4", 0x7000001c, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1341 {"udi13", "s,t,d,+1",0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1342 {"udi13", "s,t,+2", 0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1343 {"udi13", "s,+3", 0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1344 {"udi13", "+4", 0x7000001d, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1345 {"udi14", "s,t,d,+1",0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1346 {"udi14", "s,t,+2", 0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1347 {"udi14", "s,+3", 0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1348 {"udi14", "+4", 0x7000001e, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1349 {"udi15", "s,t,d,+1",0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1350 {"udi15", "s,t,+2", 0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1351 {"udi15", "s,+3", 0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1352 {"udi15", "+4", 0x7000001f, 0xfc00003f, WR_d
|RD_s
|RD_t
, 0, I33
},
1354 /* Coprocessor 2 move/branch operations overlap with VR5400 .ob format
1355 instructions so they are here for the latters to take precedence. */
1356 {"bc2f", "p", 0x49000000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
1357 {"bc2f", "N,p", 0x49000000, 0xffe30000, CBD
|RD_CC
, 0, I32
},
1358 {"bc2fl", "p", 0x49020000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
},
1359 {"bc2fl", "N,p", 0x49020000, 0xffe30000, CBL
|RD_CC
, 0, I32
},
1360 {"bc2t", "p", 0x49010000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
1361 {"bc2t", "N,p", 0x49010000, 0xffe30000, CBD
|RD_CC
, 0, I32
},
1362 {"bc2tl", "p", 0x49030000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
},
1363 {"bc2tl", "N,p", 0x49030000, 0xffe30000, CBL
|RD_CC
, 0, I32
},
1364 {"cfc2", "t,G", 0x48400000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I1
},
1365 {"ctc2", "t,G", 0x48c00000, 0xffe007ff, COD
|RD_t
|WR_CC
, 0, I1
},
1366 {"dmfc2", "t,G", 0x48200000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I3
},
1367 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD
|WR_t
|RD_C2
, 0, I64
},
1368 {"dmtc2", "t,G", 0x48a00000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, 0, I3
},
1369 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, 0, I64
},
1370 {"mfc2", "t,G", 0x48000000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I1
},
1371 {"mfc2", "t,G,H", 0x48000000, 0xffe007f8, LCD
|WR_t
|RD_C2
, 0, I32
},
1372 {"mfhc2", "t,G", 0x48600000, 0xffe007ff, LCD
|WR_t
|RD_C2
, 0, I33
},
1373 {"mfhc2", "t,G,H", 0x48600000, 0xffe007f8, LCD
|WR_t
|RD_C2
, 0, I33
},
1374 {"mfhc2", "t,i", 0x48600000, 0xffe00000, LCD
|WR_t
|RD_C2
, 0, I33
},
1375 {"mtc2", "t,G", 0x48800000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, 0, I1
},
1376 {"mtc2", "t,G,H", 0x48800000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, 0, I32
},
1377 {"mthc2", "t,G", 0x48e00000, 0xffe007ff, COD
|RD_t
|WR_C2
|WR_CC
, 0, I33
},
1378 {"mthc2", "t,G,H", 0x48e00000, 0xffe007f8, COD
|RD_t
|WR_C2
|WR_CC
, 0, I33
},
1379 {"mthc2", "t,i", 0x48e00000, 0xffe00000, COD
|RD_t
|WR_C2
|WR_CC
, 0, I33
},
1381 /* Coprocessor 3 move/branch operations overlap with MIPS IV COP1X
1382 instructions, so they are here for the latters to take precedence. */
1383 {"bc3f", "p", 0x4d000000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
1384 {"bc3fl", "p", 0x4d020000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
},
1385 {"bc3t", "p", 0x4d010000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
1386 {"bc3tl", "p", 0x4d030000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
},
1387 {"cfc3", "t,G", 0x4c400000, 0xffe007ff, LCD
|WR_t
|RD_C3
, 0, I1
},
1388 {"ctc3", "t,G", 0x4cc00000, 0xffe007ff, COD
|RD_t
|WR_CC
, 0, I1
},
1389 {"dmfc3", "t,G", 0x4c200000, 0xffe007ff, LCD
|WR_t
|RD_C3
, 0, I3
},
1390 {"dmtc3", "t,G", 0x4ca00000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, 0, I3
},
1391 {"mfc3", "t,G", 0x4c000000, 0xffe007ff, LCD
|WR_t
|RD_C3
, 0, I1
},
1392 {"mfc3", "t,G,H", 0x4c000000, 0xffe007f8, LCD
|WR_t
|RD_C3
, 0, I32
},
1393 {"mtc3", "t,G", 0x4c800000, 0xffe007ff, COD
|RD_t
|WR_C3
|WR_CC
, 0, I1
},
1394 {"mtc3", "t,G,H", 0x4c800000, 0xffe007f8, COD
|RD_t
|WR_C3
|WR_CC
, 0, I32
},
1396 /* No hazard protection on coprocessor instructions--they shouldn't
1397 change the state of the processor and if they do it's up to the
1398 user to put in nops as necessary. These are at the end so that the
1399 disassembler recognizes more specific versions first. */
1400 {"c0", "C", 0x42000000, 0xfe000000, 0, 0, I1
},
1401 {"c1", "C", 0x46000000, 0xfe000000, 0, 0, I1
},
1402 {"c2", "C", 0x4a000000, 0xfe000000, 0, 0, I1
},
1403 {"c3", "C", 0x4e000000, 0xfe000000, 0, 0, I1
},
1404 {"cop0", "C", 0, (int) M_COP0
, INSN_MACRO
, 0, I1
},
1405 {"cop1", "C", 0, (int) M_COP1
, INSN_MACRO
, 0, I1
},
1406 {"cop2", "C", 0, (int) M_COP2
, INSN_MACRO
, 0, I1
},
1407 {"cop3", "C", 0, (int) M_COP3
, INSN_MACRO
, 0, I1
},
1408 /* Conflicts with the 4650's "mul" instruction. Nobody's using the
1409 4010 any more, so move this insn out of the way. If the object
1410 format gave us more info, we could do this right. */
1411 {"addciu", "t,r,j", 0x70000000, 0xfc000000, WR_t
|RD_s
, 0, L1
},
1413 {"absq_s.ph", "d,t", 0x7c000252, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1414 {"absq_s.pw", "d,t", 0x7c000456, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1415 {"absq_s.qh", "d,t", 0x7c000256, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1416 {"absq_s.w", "d,t", 0x7c000452, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1417 {"addq.ph", "d,s,t", 0x7c000290, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1418 {"addq.pw", "d,s,t", 0x7c000494, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1419 {"addq.qh", "d,s,t", 0x7c000294, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1420 {"addq_s.ph", "d,s,t", 0x7c000390, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1421 {"addq_s.pw", "d,s,t", 0x7c000594, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1422 {"addq_s.qh", "d,s,t", 0x7c000394, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1423 {"addq_s.w", "d,s,t", 0x7c000590, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1424 {"addsc", "d,s,t", 0x7c000410, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1425 {"addu.ob", "d,s,t", 0x7c000014, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1426 {"addu.qb", "d,s,t", 0x7c000010, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1427 {"addu_s.ob", "d,s,t", 0x7c000114, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1428 {"addu_s.qb", "d,s,t", 0x7c000110, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1429 {"addwc", "d,s,t", 0x7c000450, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1430 {"bitrev", "d,t", 0x7c0006d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1431 {"bposge32", "p", 0x041c0000, 0xffff0000, CBD
, 0, D32
},
1432 {"bposge64", "p", 0x041d0000, 0xffff0000, CBD
, 0, D64
},
1433 {"cmp.eq.ph", "s,t", 0x7c000211, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1434 {"cmp.eq.pw", "s,t", 0x7c000415, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1435 {"cmp.eq.qh", "s,t", 0x7c000215, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1436 {"cmpgu.eq.ob", "d,s,t", 0x7c000115, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1437 {"cmpgu.eq.qb", "d,s,t", 0x7c000111, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1438 {"cmpgu.le.ob", "d,s,t", 0x7c000195, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1439 {"cmpgu.le.qb", "d,s,t", 0x7c000191, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1440 {"cmpgu.lt.ob", "d,s,t", 0x7c000155, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1441 {"cmpgu.lt.qb", "d,s,t", 0x7c000151, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1442 {"cmp.le.ph", "s,t", 0x7c000291, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1443 {"cmp.le.pw", "s,t", 0x7c000495, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1444 {"cmp.le.qh", "s,t", 0x7c000295, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1445 {"cmp.lt.ph", "s,t", 0x7c000251, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1446 {"cmp.lt.pw", "s,t", 0x7c000455, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1447 {"cmp.lt.qh", "s,t", 0x7c000255, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1448 {"cmpu.eq.ob", "s,t", 0x7c000015, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1449 {"cmpu.eq.qb", "s,t", 0x7c000011, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1450 {"cmpu.le.ob", "s,t", 0x7c000095, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1451 {"cmpu.le.qb", "s,t", 0x7c000091, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1452 {"cmpu.lt.ob", "s,t", 0x7c000055, 0xfc00ffff, RD_s
|RD_t
, 0, D64
},
1453 {"cmpu.lt.qb", "s,t", 0x7c000051, 0xfc00ffff, RD_s
|RD_t
, 0, D32
},
1454 {"dextpdp", "t,7,6", 0x7c0002bc, 0xfc00e7ff, WR_t
|RD_a
|DSP_VOLA
, 0, D64
},
1455 {"dextpdpv", "t,7,s", 0x7c0002fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
|DSP_VOLA
, 0, D64
},
1456 {"dextp", "t,7,6", 0x7c0000bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1457 {"dextpv", "t,7,s", 0x7c0000fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1458 {"dextr.l", "t,7,6", 0x7c00043c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1459 {"dextr_r.l", "t,7,6", 0x7c00053c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1460 {"dextr_rs.l", "t,7,6", 0x7c0005bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1461 {"dextr_rs.w", "t,7,6", 0x7c0001bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1462 {"dextr_r.w", "t,7,6", 0x7c00013c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1463 {"dextr_s.h", "t,7,6", 0x7c0003bc, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1464 {"dextrv.l", "t,7,s", 0x7c00047c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1465 {"dextrv_r.l", "t,7,s", 0x7c00057c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1466 {"dextrv_rs.l", "t,7,s", 0x7c0005fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1467 {"dextrv_rs.w", "t,7,s", 0x7c0001fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1468 {"dextrv_r.w", "t,7,s", 0x7c00017c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1469 {"dextrv_s.h", "t,7,s", 0x7c0003fc, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1470 {"dextrv.w", "t,7,s", 0x7c00007c, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D64
},
1471 {"dextr.w", "t,7,6", 0x7c00003c, 0xfc00e7ff, WR_t
|RD_a
, 0, D64
},
1472 {"dinsv", "t,s", 0x7c00000d, 0xfc00ffff, WR_t
|RD_s
, 0, D64
},
1473 {"dmadd", "7,s,t", 0x7c000674, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1474 {"dmaddu", "7,s,t", 0x7c000774, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1475 {"dmsub", "7,s,t", 0x7c0006f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1476 {"dmsubu", "7,s,t", 0x7c0007f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1477 {"dmthlip", "s,7", 0x7c0007fc, 0xfc1fe7ff, RD_s
|MOD_a
|DSP_VOLA
, 0, D64
},
1478 {"dpaq_sa.l.pw", "7,s,t", 0x7c000334, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1479 {"dpaq_sa.l.w", "7,s,t", 0x7c000330, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1480 {"dpaq_s.w.ph", "7,s,t", 0x7c000130, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1481 {"dpaq_s.w.qh", "7,s,t", 0x7c000134, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1482 {"dpau.h.obl", "7,s,t", 0x7c0000f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1483 {"dpau.h.obr", "7,s,t", 0x7c0001f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1484 {"dpau.h.qbl", "7,s,t", 0x7c0000f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1485 {"dpau.h.qbr", "7,s,t", 0x7c0001f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1486 {"dpsq_sa.l.pw", "7,s,t", 0x7c000374, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1487 {"dpsq_sa.l.w", "7,s,t", 0x7c000370, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1488 {"dpsq_s.w.ph", "7,s,t", 0x7c000170, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1489 {"dpsq_s.w.qh", "7,s,t", 0x7c000174, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1490 {"dpsu.h.obl", "7,s,t", 0x7c0002f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1491 {"dpsu.h.obr", "7,s,t", 0x7c0003f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1492 {"dpsu.h.qbl", "7,s,t", 0x7c0002f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1493 {"dpsu.h.qbr", "7,s,t", 0x7c0003f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1494 {"dshilo", "7,:", 0x7c0006bc, 0xfc07e7ff, MOD_a
, 0, D64
},
1495 {"dshilov", "7,s", 0x7c0006fc, 0xfc1fe7ff, MOD_a
|RD_s
, 0, D64
},
1496 {"extpdp", "t,7,6", 0x7c0002b8, 0xfc00e7ff, WR_t
|RD_a
|DSP_VOLA
, 0, D32
},
1497 {"extpdpv", "t,7,s", 0x7c0002f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
|DSP_VOLA
, 0, D32
},
1498 {"extp", "t,7,6", 0x7c0000b8, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1499 {"extpv", "t,7,s", 0x7c0000f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1500 {"extr_rs.w", "t,7,6", 0x7c0001b8, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1501 {"extr_r.w", "t,7,6", 0x7c000138, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1502 {"extr_s.h", "t,7,6", 0x7c0003b8, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1503 {"extrv_rs.w", "t,7,s", 0x7c0001f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1504 {"extrv_r.w", "t,7,s", 0x7c000178, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1505 {"extrv_s.h", "t,7,s", 0x7c0003f8, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1506 {"extrv.w", "t,7,s", 0x7c000078, 0xfc00e7ff, WR_t
|RD_a
|RD_s
, 0, D32
},
1507 {"extr.w", "t,7,6", 0x7c000038, 0xfc00e7ff, WR_t
|RD_a
, 0, D32
},
1508 {"insv", "t,s", 0x7c00000c, 0xfc00ffff, WR_t
|RD_s
, 0, D32
},
1509 {"lbux", "d,t(b)", 0x7c00018a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D32
},
1510 {"ldx", "d,t(b)", 0x7c00020a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D64
},
1511 {"lhx", "d,t(b)", 0x7c00010a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D32
},
1512 {"lwx", "d,t(b)", 0x7c00000a, 0xfc0007ff, LDD
|WR_d
|RD_t
|RD_b
, 0, D32
},
1513 {"maq_sa.w.phl", "7,s,t", 0x7c000430, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1514 {"maq_sa.w.phr", "7,s,t", 0x7c0004b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1515 {"maq_sa.w.qhll", "7,s,t", 0x7c000434, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1516 {"maq_sa.w.qhlr", "7,s,t", 0x7c000474, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1517 {"maq_sa.w.qhrl", "7,s,t", 0x7c0004b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1518 {"maq_sa.w.qhrr", "7,s,t", 0x7c0004f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1519 {"maq_s.l.pwl", "7,s,t", 0x7c000734, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1520 {"maq_s.l.pwr", "7,s,t", 0x7c0007b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1521 {"maq_s.w.phl", "7,s,t", 0x7c000530, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1522 {"maq_s.w.phr", "7,s,t", 0x7c0005b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1523 {"maq_s.w.qhll", "7,s,t", 0x7c000534, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1524 {"maq_s.w.qhlr", "7,s,t", 0x7c000574, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1525 {"maq_s.w.qhrl", "7,s,t", 0x7c0005b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1526 {"maq_s.w.qhrr", "7,s,t", 0x7c0005f4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1527 {"modsub", "d,s,t", 0x7c000490, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1528 {"mthlip", "s,7", 0x7c0007f8, 0xfc1fe7ff, RD_s
|MOD_a
|DSP_VOLA
, 0, D32
},
1529 {"muleq_s.pw.qhl", "d,s,t", 0x7c000714, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1530 {"muleq_s.pw.qhr", "d,s,t", 0x7c000754, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1531 {"muleq_s.w.phl", "d,s,t", 0x7c000710, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1532 {"muleq_s.w.phr", "d,s,t", 0x7c000750, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1533 {"muleu_s.ph.qbl", "d,s,t", 0x7c000190, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1534 {"muleu_s.ph.qbr", "d,s,t", 0x7c0001d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1535 {"muleu_s.qh.obl", "d,s,t", 0x7c000194, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1536 {"muleu_s.qh.obr", "d,s,t", 0x7c0001d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1537 {"mulq_rs.ph", "d,s,t", 0x7c0007d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D32
},
1538 {"mulq_rs.qh", "d,s,t", 0x7c0007d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D64
},
1539 {"mulsaq_s.l.pw", "7,s,t", 0x7c0003b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1540 {"mulsaq_s.w.ph", "7,s,t", 0x7c0001b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D32
},
1541 {"mulsaq_s.w.qh", "7,s,t", 0x7c0001b4, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D64
},
1542 {"packrl.ph", "d,s,t", 0x7c000391, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1543 {"packrl.pw", "d,s,t", 0x7c000395, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1544 {"pick.ob", "d,s,t", 0x7c0000d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1545 {"pick.ph", "d,s,t", 0x7c0002d1, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1546 {"pick.pw", "d,s,t", 0x7c0004d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1547 {"pick.qb", "d,s,t", 0x7c0000d1, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1548 {"pick.qh", "d,s,t", 0x7c0002d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1549 {"preceq.pw.qhla", "d,t", 0x7c000396, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1550 {"preceq.pw.qhl", "d,t", 0x7c000316, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1551 {"preceq.pw.qhra", "d,t", 0x7c0003d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1552 {"preceq.pw.qhr", "d,t", 0x7c000356, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1553 {"preceq.s.l.pwl", "d,t", 0x7c000516, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1554 {"preceq.s.l.pwr", "d,t", 0x7c000556, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1555 {"precequ.ph.qbla", "d,t", 0x7c000192, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1556 {"precequ.ph.qbl", "d,t", 0x7c000112, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1557 {"precequ.ph.qbra", "d,t", 0x7c0001d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1558 {"precequ.ph.qbr", "d,t", 0x7c000152, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1559 {"precequ.pw.qhla", "d,t", 0x7c000196, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1560 {"precequ.pw.qhl", "d,t", 0x7c000116, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1561 {"precequ.pw.qhra", "d,t", 0x7c0001d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1562 {"precequ.pw.qhr", "d,t", 0x7c000156, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1563 {"preceq.w.phl", "d,t", 0x7c000312, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1564 {"preceq.w.phr", "d,t", 0x7c000352, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1565 {"preceu.ph.qbla", "d,t", 0x7c000792, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1566 {"preceu.ph.qbl", "d,t", 0x7c000712, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1567 {"preceu.ph.qbra", "d,t", 0x7c0007d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1568 {"preceu.ph.qbr", "d,t", 0x7c000752, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1569 {"preceu.qh.obla", "d,t", 0x7c000796, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1570 {"preceu.qh.obl", "d,t", 0x7c000716, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1571 {"preceu.qh.obra", "d,t", 0x7c0007d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1572 {"preceu.qh.obr", "d,t", 0x7c000756, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1573 {"precrq.ob.qh", "d,s,t", 0x7c000315, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1574 {"precrq.ph.w", "d,s,t", 0x7c000511, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1575 {"precrq.pw.l", "d,s,t", 0x7c000715, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1576 {"precrq.qb.ph", "d,s,t", 0x7c000311, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1577 {"precrq.qh.pw", "d,s,t", 0x7c000515, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1578 {"precrq_rs.ph.w", "d,s,t", 0x7c000551, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1579 {"precrq_rs.qh.pw", "d,s,t", 0x7c000555, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1580 {"precrqu_s.ob.qh", "d,s,t", 0x7c0003d5, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1581 {"precrqu_s.qb.ph", "d,s,t", 0x7c0003d1, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1582 {"raddu.l.ob", "d,s", 0x7c000514, 0xfc1f07ff, WR_d
|RD_s
, 0, D64
},
1583 {"raddu.w.qb", "d,s", 0x7c000510, 0xfc1f07ff, WR_d
|RD_s
, 0, D32
},
1584 {"rddsp", "d", 0x7fff04b8, 0xffff07ff, WR_d
, 0, D32
},
1585 {"rddsp", "d,'", 0x7c0004b8, 0xffc007ff, WR_d
, 0, D32
},
1586 {"repl.ob", "d,5", 0x7c000096, 0xff0007ff, WR_d
, 0, D64
},
1587 {"repl.ph", "d,@", 0x7c000292, 0xfc0007ff, WR_d
, 0, D32
},
1588 {"repl.pw", "d,@", 0x7c000496, 0xfc0007ff, WR_d
, 0, D64
},
1589 {"repl.qb", "d,5", 0x7c000092, 0xff0007ff, WR_d
, 0, D32
},
1590 {"repl.qh", "d,@", 0x7c000296, 0xfc0007ff, WR_d
, 0, D64
},
1591 {"replv.ob", "d,t", 0x7c0000d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1592 {"replv.ph", "d,t", 0x7c0002d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1593 {"replv.pw", "d,t", 0x7c0004d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1594 {"replv.qb", "d,t", 0x7c0000d2, 0xffe007ff, WR_d
|RD_t
, 0, D32
},
1595 {"replv.qh", "d,t", 0x7c0002d6, 0xffe007ff, WR_d
|RD_t
, 0, D64
},
1596 {"shilo", "7,0", 0x7c0006b8, 0xfc0fe7ff, MOD_a
, 0, D32
},
1597 {"shilov", "7,s", 0x7c0006f8, 0xfc1fe7ff, MOD_a
|RD_s
, 0, D32
},
1598 {"shll.ob", "d,t,3", 0x7c000017, 0xff0007ff, WR_d
|RD_t
, 0, D64
},
1599 {"shll.ph", "d,t,4", 0x7c000213, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1600 {"shll.pw", "d,t,6", 0x7c000417, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1601 {"shll.qb", "d,t,3", 0x7c000013, 0xff0007ff, WR_d
|RD_t
, 0, D32
},
1602 {"shll.qh", "d,t,4", 0x7c000217, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1603 {"shll_s.ph", "d,t,4", 0x7c000313, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1604 {"shll_s.pw", "d,t,6", 0x7c000517, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1605 {"shll_s.qh", "d,t,4", 0x7c000317, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1606 {"shll_s.w", "d,t,6", 0x7c000513, 0xfc0007ff, WR_d
|RD_t
, 0, D32
},
1607 {"shllv.ob", "d,t,s", 0x7c000097, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1608 {"shllv.ph", "d,t,s", 0x7c000293, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1609 {"shllv.pw", "d,t,s", 0x7c000497, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1610 {"shllv.qb", "d,t,s", 0x7c000093, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1611 {"shllv.qh", "d,t,s", 0x7c000297, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1612 {"shllv_s.ph", "d,t,s", 0x7c000393, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1613 {"shllv_s.pw", "d,t,s", 0x7c000597, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1614 {"shllv_s.qh", "d,t,s", 0x7c000397, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1615 {"shllv_s.w", "d,t,s", 0x7c000593, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1616 {"shra.ph", "d,t,4", 0x7c000253, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1617 {"shra.pw", "d,t,6", 0x7c000457, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1618 {"shra.qh", "d,t,4", 0x7c000257, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1619 {"shra_r.ph", "d,t,4", 0x7c000353, 0xfe0007ff, WR_d
|RD_t
, 0, D32
},
1620 {"shra_r.pw", "d,t,6", 0x7c000557, 0xfc0007ff, WR_d
|RD_t
, 0, D64
},
1621 {"shra_r.qh", "d,t,4", 0x7c000357, 0xfe0007ff, WR_d
|RD_t
, 0, D64
},
1622 {"shra_r.w", "d,t,6", 0x7c000553, 0xfc0007ff, WR_d
|RD_t
, 0, D32
},
1623 {"shrav.ph", "d,t,s", 0x7c0002d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1624 {"shrav.pw", "d,t,s", 0x7c0004d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1625 {"shrav.qh", "d,t,s", 0x7c0002d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1626 {"shrav_r.ph", "d,t,s", 0x7c0003d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1627 {"shrav_r.pw", "d,t,s", 0x7c0005d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1628 {"shrav_r.qh", "d,t,s", 0x7c0003d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1629 {"shrav_r.w", "d,t,s", 0x7c0005d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1630 {"shrl.ob", "d,t,3", 0x7c000057, 0xff0007ff, WR_d
|RD_t
, 0, D64
},
1631 {"shrl.qb", "d,t,3", 0x7c000053, 0xff0007ff, WR_d
|RD_t
, 0, D32
},
1632 {"shrlv.ob", "d,t,s", 0x7c0000d7, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1633 {"shrlv.qb", "d,t,s", 0x7c0000d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1634 {"subq.ph", "d,s,t", 0x7c0002d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1635 {"subq.pw", "d,s,t", 0x7c0004d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1636 {"subq.qh", "d,s,t", 0x7c0002d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1637 {"subq_s.ph", "d,s,t", 0x7c0003d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1638 {"subq_s.pw", "d,s,t", 0x7c0005d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1639 {"subq_s.qh", "d,s,t", 0x7c0003d4, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1640 {"subq_s.w", "d,s,t", 0x7c0005d0, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1641 {"subu.ob", "d,s,t", 0x7c000054, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1642 {"subu.qb", "d,s,t", 0x7c000050, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1643 {"subu_s.ob", "d,s,t", 0x7c000154, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D64
},
1644 {"subu_s.qb", "d,s,t", 0x7c000150, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D32
},
1645 {"wrdsp", "s", 0x7c1ffcf8, 0xfc1fffff, RD_s
|DSP_VOLA
, 0, D32
},
1646 {"wrdsp", "s,8", 0x7c0004f8, 0xfc1e07ff, RD_s
|DSP_VOLA
, 0, D32
},
1647 /* MIPS DSP ASE Rev2 */
1648 {"absq_s.qb", "d,t", 0x7c000052, 0xffe007ff, WR_d
|RD_t
, 0, D33
},
1649 {"addu.ph", "d,s,t", 0x7c000210, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1650 {"addu_s.ph", "d,s,t", 0x7c000310, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1651 {"adduh.qb", "d,s,t", 0x7c000018, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1652 {"adduh_r.qb", "d,s,t", 0x7c000098, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1653 {"append", "t,s,h", 0x7c000031, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1654 {"balign", "t,s,I", 0, (int) M_BALIGN
, INSN_MACRO
, 0, D33
},
1655 {"balign", "t,s,2", 0x7c000431, 0xfc00e7ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1656 {"cmpgdu.eq.qb", "d,s,t", 0x7c000611, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1657 {"cmpgdu.lt.qb", "d,s,t", 0x7c000651, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1658 {"cmpgdu.le.qb", "d,s,t", 0x7c000691, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1659 {"dpa.w.ph", "7,s,t", 0x7c000030, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1660 {"dps.w.ph", "7,s,t", 0x7c000070, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1661 {"mul.ph", "d,s,t", 0x7c000318, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1662 {"mul_s.ph", "d,s,t", 0x7c000398, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1663 {"mulq_rs.w", "d,s,t", 0x7c0005d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1664 {"mulq_s.ph", "d,s,t", 0x7c000790, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1665 {"mulq_s.w", "d,s,t", 0x7c000598, 0xfc0007ff, WR_d
|RD_s
|RD_t
|WR_HILO
, 0, D33
},
1666 {"mulsa.w.ph", "7,s,t", 0x7c0000b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1667 {"precr.qb.ph", "d,s,t", 0x7c000351, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1668 {"precr_sra.ph.w", "t,s,h", 0x7c000791, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1669 {"precr_sra_r.ph.w", "t,s,h", 0x7c0007d1, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1670 {"prepend", "t,s,h", 0x7c000071, 0xfc0007ff, WR_t
|RD_t
|RD_s
, 0, D33
},
1671 {"shra.qb", "d,t,3", 0x7c000113, 0xff0007ff, WR_d
|RD_t
, 0, D33
},
1672 {"shra_r.qb", "d,t,3", 0x7c000153, 0xff0007ff, WR_d
|RD_t
, 0, D33
},
1673 {"shrav.qb", "d,t,s", 0x7c000193, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1674 {"shrav_r.qb", "d,t,s", 0x7c0001d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1675 {"shrl.ph", "d,t,4", 0x7c000653, 0xfe0007ff, WR_d
|RD_t
, 0, D33
},
1676 {"shrlv.ph", "d,t,s", 0x7c0006d3, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1677 {"subu.ph", "d,s,t", 0x7c000250, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1678 {"subu_s.ph", "d,s,t", 0x7c000350, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1679 {"subuh.qb", "d,s,t", 0x7c000058, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1680 {"subuh_r.qb", "d,s,t", 0x7c0000d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1681 {"addqh.ph", "d,s,t", 0x7c000218, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1682 {"addqh_r.ph", "d,s,t", 0x7c000298, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1683 {"addqh.w", "d,s,t", 0x7c000418, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1684 {"addqh_r.w", "d,s,t", 0x7c000498, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1685 {"subqh.ph", "d,s,t", 0x7c000258, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1686 {"subqh_r.ph", "d,s,t", 0x7c0002d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1687 {"subqh.w", "d,s,t", 0x7c000458, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1688 {"subqh_r.w", "d,s,t", 0x7c0004d8, 0xfc0007ff, WR_d
|RD_s
|RD_t
, 0, D33
},
1689 {"dpax.w.ph", "7,s,t", 0x7c000230, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1690 {"dpsx.w.ph", "7,s,t", 0x7c000270, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1691 {"dpaqx_s.w.ph", "7,s,t", 0x7c000630, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1692 {"dpaqx_sa.w.ph", "7,s,t", 0x7c0006b0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1693 {"dpsqx_s.w.ph", "7,s,t", 0x7c000670, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1694 {"dpsqx_sa.w.ph", "7,s,t", 0x7c0006f0, 0xfc00e7ff, MOD_a
|RD_s
|RD_t
, 0, D33
},
1695 /* Move bc0* after mftr and mttr to avoid opcode collision. */
1696 {"bc0f", "p", 0x41000000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
1697 {"bc0fl", "p", 0x41020000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
},
1698 {"bc0t", "p", 0x41010000, 0xffff0000, CBD
|RD_CC
, 0, I1
},
1699 {"bc0tl", "p", 0x41030000, 0xffff0000, CBL
|RD_CC
, 0, I2
|T3
},
1702 #define MIPS_NUM_OPCODES \
1703 ((sizeof mips_builtin_opcodes) / (sizeof (mips_builtin_opcodes[0])))
1704 const int bfd_mips_num_builtin_opcodes
= MIPS_NUM_OPCODES
;
1706 /* const removed from the following to allow for dynamic extensions to the
1707 * built-in instruction set. */
1708 struct mips_opcode
*mips_opcodes
=
1709 (struct mips_opcode
*) mips_builtin_opcodes
;
1710 int bfd_mips_num_opcodes
= MIPS_NUM_OPCODES
;
1711 #undef MIPS_NUM_OPCODES