1 /* ppc-dis.c -- Disassemble PowerPC instructions
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this file; see the file COPYING. If not, write to the
19 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
28 #include "opcode/ppc.h"
29 #include "libiberty.h"
31 /* This file provides several disassembler functions, all of which use
32 the disassembler interface defined in dis-asm.h. Several functions
33 are provided because this file handles disassembly for the PowerPC
34 in both big and little endian mode and also for the POWER (RS/6000)
36 static int print_insn_powerpc (bfd_vma
, struct disassemble_info
*, int,
41 /* Stash the result of parsing disassembler_options here. */
45 #define POWERPC_DIALECT(INFO) \
46 (((struct dis_private *) ((INFO)->private_data))->dialect)
49 /* Option string, without -m or -M prefix. */
51 /* CPU option flags. */
53 /* Flags that should stay on, even when combined with another cpu
54 option. This should only be used for generic options like
55 "-many" or "-maltivec" where it is reasonable to add some
56 capability to another cpu selection. The added flags are sticky
57 so that, for example, "-many -me500" and "-me500 -many" result in
58 the same assembler or disassembler behaviour. Do not use
59 "sticky" for specific cpus, as this will prevent that cpu's flags
60 from overriding the defaults set in powerpc_init_dialect or a
65 struct ppc_mopt ppc_opts
[] = {
66 { "403", PPC_OPCODE_PPC
| PPC_OPCODE_403
,
68 { "405", PPC_OPCODE_PPC
| PPC_OPCODE_403
| PPC_OPCODE_405
,
70 { "440", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_440
71 | PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
73 { "464", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_440
74 | PPC_OPCODE_ISEL
| PPC_OPCODE_RFMCI
),
76 { "476", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_440
77 | PPC_OPCODE_476
| PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
),
79 { "601", PPC_OPCODE_PPC
| PPC_OPCODE_601
,
81 { "603", PPC_OPCODE_PPC
,
83 { "604", PPC_OPCODE_PPC
,
85 { "620", PPC_OPCODE_PPC
| PPC_OPCODE_64
,
87 { "7400", PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
,
89 { "7410", PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
,
91 { "7450", PPC_OPCODE_PPC
| PPC_OPCODE_7450
| PPC_OPCODE_ALTIVEC
,
93 { "7455", PPC_OPCODE_PPC
| PPC_OPCODE_ALTIVEC
,
95 { "750cl", PPC_OPCODE_PPC
| PPC_OPCODE_750
| PPC_OPCODE_PPCPS
97 { "821", PPC_OPCODE_PPC
| PPC_OPCODE_860
,
99 { "850", PPC_OPCODE_PPC
| PPC_OPCODE_860
,
101 { "860", PPC_OPCODE_PPC
| PPC_OPCODE_860
,
103 { "a2", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_POWER4
104 | PPC_OPCODE_POWER5
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_64
107 { "altivec", PPC_OPCODE_PPC
,
108 PPC_OPCODE_ALTIVEC
},
111 { "booke", PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
,
113 { "booke32", PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
,
115 { "cell", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
116 | PPC_OPCODE_CELL
| PPC_OPCODE_ALTIVEC
),
118 { "com", PPC_OPCODE_COMMON
,
120 { "e200z4", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
121 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
122 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
123 | PPC_OPCODE_E500
| PPC_OPCODE_VLE
| PPC_OPCODE_E200Z4
),
125 { "e300", PPC_OPCODE_PPC
| PPC_OPCODE_E300
,
127 { "e500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
128 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
129 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
132 { "e500mc", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
133 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
134 | PPC_OPCODE_E500MC
),
136 { "e500mc64", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
137 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
138 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_POWER5
139 | PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
141 { "e5500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
142 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
143 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
144 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
145 | PPC_OPCODE_POWER7
),
147 { "e6500", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_ISEL
148 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
149 | PPC_OPCODE_E500MC
| PPC_OPCODE_64
| PPC_OPCODE_ALTIVEC
150 | PPC_OPCODE_ALTIVEC2
| PPC_OPCODE_E6500
| PPC_OPCODE_POWER4
151 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_POWER7
),
153 { "e500x2", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
154 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
155 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
158 { "efs", PPC_OPCODE_PPC
| PPC_OPCODE_EFS
,
160 { "power4", PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
,
162 { "power5", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
163 | PPC_OPCODE_POWER5
),
165 { "power6", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
166 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_ALTIVEC
),
168 { "power7", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
169 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
170 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
172 { "power8", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
173 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
174 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_HTM
175 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_ALTIVEC2
| PPC_OPCODE_VSX
),
177 { "power9", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
178 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
179 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_POWER9
180 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_ALTIVEC2
181 | PPC_OPCODE_VSX
| PPC_OPCODE_VSX3
),
183 { "ppc", PPC_OPCODE_PPC
,
185 { "ppc32", PPC_OPCODE_PPC
,
187 { "32", PPC_OPCODE_PPC
,
189 { "ppc64", PPC_OPCODE_PPC
| PPC_OPCODE_64
,
191 { "64", PPC_OPCODE_PPC
| PPC_OPCODE_64
,
193 { "ppc64bridge", PPC_OPCODE_PPC
| PPC_OPCODE_64_BRIDGE
,
195 { "ppcps", PPC_OPCODE_PPC
| PPC_OPCODE_PPCPS
,
197 { "pwr", PPC_OPCODE_POWER
,
199 { "pwr2", PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
,
201 { "pwr4", PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
,
203 { "pwr5", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
204 | PPC_OPCODE_POWER5
),
206 { "pwr5x", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
207 | PPC_OPCODE_POWER5
),
209 { "pwr6", (PPC_OPCODE_PPC
| PPC_OPCODE_64
| PPC_OPCODE_POWER4
210 | PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
| PPC_OPCODE_ALTIVEC
),
212 { "pwr7", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
213 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
214 | PPC_OPCODE_POWER7
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_VSX
),
216 { "pwr8", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
217 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
218 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_HTM
219 | PPC_OPCODE_ALTIVEC
| PPC_OPCODE_ALTIVEC2
| PPC_OPCODE_VSX
),
221 { "pwr9", (PPC_OPCODE_PPC
| PPC_OPCODE_ISEL
| PPC_OPCODE_64
222 | PPC_OPCODE_POWER4
| PPC_OPCODE_POWER5
| PPC_OPCODE_POWER6
223 | PPC_OPCODE_POWER7
| PPC_OPCODE_POWER8
| PPC_OPCODE_POWER9
224 | PPC_OPCODE_HTM
| PPC_OPCODE_ALTIVEC
| PPC_OPCODE_ALTIVEC2
225 | PPC_OPCODE_VSX
| PPC_OPCODE_VSX3
),
227 { "pwrx", PPC_OPCODE_POWER
| PPC_OPCODE_POWER2
,
229 { "spe", PPC_OPCODE_PPC
| PPC_OPCODE_EFS
,
231 { "titan", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_PMR
232 | PPC_OPCODE_RFMCI
| PPC_OPCODE_TITAN
),
234 { "vle", (PPC_OPCODE_PPC
| PPC_OPCODE_BOOKE
| PPC_OPCODE_SPE
235 | PPC_OPCODE_ISEL
| PPC_OPCODE_EFS
| PPC_OPCODE_BRLOCK
236 | PPC_OPCODE_PMR
| PPC_OPCODE_CACHELCK
| PPC_OPCODE_RFMCI
239 { "vsx", PPC_OPCODE_PPC
,
241 { "htm", PPC_OPCODE_PPC
,
245 /* Switch between Booke and VLE dialects for interlinked dumps. */
247 get_powerpc_dialect (struct disassemble_info
*info
)
249 ppc_cpu_t dialect
= 0;
251 dialect
= POWERPC_DIALECT (info
);
253 /* Disassemble according to the section headers flags for VLE-mode. */
254 if (dialect
& PPC_OPCODE_VLE
255 && info
->section
!= NULL
&& info
->section
->owner
!= NULL
256 && bfd_get_flavour (info
->section
->owner
) == bfd_target_elf_flavour
257 && elf_object_id (info
->section
->owner
) == PPC32_ELF_DATA
258 && (elf_section_flags (info
->section
) & SHF_PPC_VLE
) != 0)
261 return dialect
& ~ PPC_OPCODE_VLE
;
264 /* Handle -m and -M options that set cpu type, and .machine arg. */
267 ppc_parse_cpu (ppc_cpu_t ppc_cpu
, ppc_cpu_t
*sticky
, const char *arg
)
271 for (i
= 0; i
< ARRAY_SIZE (ppc_opts
); i
++)
272 if (disassembler_options_cmp (ppc_opts
[i
].opt
, arg
) == 0)
274 if (ppc_opts
[i
].sticky
)
276 *sticky
|= ppc_opts
[i
].sticky
;
277 if ((ppc_cpu
& ~*sticky
) != 0)
280 ppc_cpu
= ppc_opts
[i
].cpu
;
283 if (i
>= ARRAY_SIZE (ppc_opts
))
290 /* Determine which set of machines to disassemble for. */
293 powerpc_init_dialect (struct disassemble_info
*info
)
295 ppc_cpu_t dialect
= 0;
296 ppc_cpu_t sticky
= 0;
297 struct dis_private
*priv
= calloc (sizeof (*priv
), 1);
304 case bfd_mach_ppc_403
:
305 case bfd_mach_ppc_403gc
:
306 dialect
= ppc_parse_cpu (dialect
, &sticky
, "403");
308 case bfd_mach_ppc_405
:
309 dialect
= ppc_parse_cpu (dialect
, &sticky
, "405");
311 case bfd_mach_ppc_601
:
312 dialect
= ppc_parse_cpu (dialect
, &sticky
, "601");
314 case bfd_mach_ppc_a35
:
315 case bfd_mach_ppc_rs64ii
:
316 case bfd_mach_ppc_rs64iii
:
317 dialect
= ppc_parse_cpu (dialect
, &sticky
, "pwr2") | PPC_OPCODE_64
;
319 case bfd_mach_ppc_e500
:
320 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e500");
322 case bfd_mach_ppc_e500mc
:
323 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e500mc");
325 case bfd_mach_ppc_e500mc64
:
326 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e500mc64");
328 case bfd_mach_ppc_e5500
:
329 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e5500");
331 case bfd_mach_ppc_e6500
:
332 dialect
= ppc_parse_cpu (dialect
, &sticky
, "e6500");
334 case bfd_mach_ppc_titan
:
335 dialect
= ppc_parse_cpu (dialect
, &sticky
, "titan");
337 case bfd_mach_ppc_vle
:
338 dialect
= ppc_parse_cpu (dialect
, &sticky
, "vle");
341 dialect
= ppc_parse_cpu (dialect
, &sticky
, "power9") | PPC_OPCODE_ANY
;
346 FOR_EACH_DISASSEMBLER_OPTION (opt
, info
->disassembler_options
)
348 ppc_cpu_t new_cpu
= 0;
350 if (disassembler_options_cmp (opt
, "32") == 0)
351 dialect
&= ~(ppc_cpu_t
) PPC_OPCODE_64
;
352 else if (disassembler_options_cmp (opt
, "64") == 0)
353 dialect
|= PPC_OPCODE_64
;
354 else if ((new_cpu
= ppc_parse_cpu (dialect
, &sticky
, opt
)) != 0)
357 fprintf (stderr
, _("warning: ignoring unknown -M%s option\n"), opt
);
360 info
->private_data
= priv
;
361 POWERPC_DIALECT(info
) = dialect
;
364 #define PPC_OPCD_SEGS 64
365 static unsigned short powerpc_opcd_indices
[PPC_OPCD_SEGS
+1];
366 #define VLE_OPCD_SEGS 32
367 static unsigned short vle_opcd_indices
[VLE_OPCD_SEGS
+1];
369 /* Calculate opcode table indices to speed up disassembly,
373 disassemble_init_powerpc (struct disassemble_info
*info
)
378 if (powerpc_opcd_indices
[PPC_OPCD_SEGS
] == 0)
381 i
= powerpc_num_opcodes
;
384 unsigned op
= PPC_OP (powerpc_opcodes
[i
].opcode
);
386 powerpc_opcd_indices
[op
] = i
;
389 last
= powerpc_num_opcodes
;
390 for (i
= PPC_OPCD_SEGS
; i
> 0; --i
)
392 if (powerpc_opcd_indices
[i
] == 0)
393 powerpc_opcd_indices
[i
] = last
;
394 last
= powerpc_opcd_indices
[i
];
400 unsigned op
= VLE_OP (vle_opcodes
[i
].opcode
, vle_opcodes
[i
].mask
);
401 unsigned seg
= VLE_OP_TO_SEG (op
);
403 vle_opcd_indices
[seg
] = i
;
406 last
= vle_num_opcodes
;
407 for (i
= VLE_OPCD_SEGS
; i
> 0; --i
)
409 if (vle_opcd_indices
[i
] == 0)
410 vle_opcd_indices
[i
] = last
;
411 last
= vle_opcd_indices
[i
];
415 if (info
->arch
== bfd_arch_powerpc
)
416 powerpc_init_dialect (info
);
419 /* Print a big endian PowerPC instruction. */
422 print_insn_big_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
424 return print_insn_powerpc (memaddr
, info
, 1, get_powerpc_dialect (info
));
427 /* Print a little endian PowerPC instruction. */
430 print_insn_little_powerpc (bfd_vma memaddr
, struct disassemble_info
*info
)
432 return print_insn_powerpc (memaddr
, info
, 0, get_powerpc_dialect (info
));
435 /* Print a POWER (RS/6000) instruction. */
438 print_insn_rs6000 (bfd_vma memaddr
, struct disassemble_info
*info
)
440 return print_insn_powerpc (memaddr
, info
, 1, PPC_OPCODE_POWER
);
443 /* Extract the operand value from the PowerPC or POWER instruction. */
446 operand_value_powerpc (const struct powerpc_operand
*operand
,
447 unsigned long insn
, ppc_cpu_t dialect
)
451 /* Extract the value from the instruction. */
452 if (operand
->extract
)
453 value
= (*operand
->extract
) (insn
, dialect
, &invalid
);
456 if (operand
->shift
>= 0)
457 value
= (insn
>> operand
->shift
) & operand
->bitm
;
459 value
= (insn
<< -operand
->shift
) & operand
->bitm
;
460 if ((operand
->flags
& PPC_OPERAND_SIGNED
) != 0)
462 /* BITM is always some number of zeros followed by some
463 number of ones, followed by some number of zeros. */
464 unsigned long top
= operand
->bitm
;
465 /* top & -top gives the rightmost 1 bit, so this
466 fills in any trailing zeros. */
467 top
|= (top
& -top
) - 1;
469 value
= (value
^ top
) - top
;
476 /* Determine whether the optional operand(s) should be printed. */
479 skip_optional_operands (const unsigned char *opindex
,
480 unsigned long insn
, ppc_cpu_t dialect
)
482 const struct powerpc_operand
*operand
;
484 for (; *opindex
!= 0; opindex
++)
486 operand
= &powerpc_operands
[*opindex
];
487 if ((operand
->flags
& PPC_OPERAND_NEXT
) != 0
488 || ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0
489 && operand_value_powerpc (operand
, insn
, dialect
) !=
490 ppc_optional_operand_value (operand
)))
497 /* Find a match for INSN in the opcode table, given machine DIALECT.
498 A DIALECT of -1 is special, matching all machine opcode variations. */
500 static const struct powerpc_opcode
*
501 lookup_powerpc (unsigned long insn
, ppc_cpu_t dialect
)
503 const struct powerpc_opcode
*opcode
;
504 const struct powerpc_opcode
*opcode_end
;
507 /* Get the major opcode of the instruction. */
510 /* Find the first match in the opcode table for this major opcode. */
511 opcode_end
= powerpc_opcodes
+ powerpc_opcd_indices
[op
+ 1];
512 for (opcode
= powerpc_opcodes
+ powerpc_opcd_indices
[op
];
516 const unsigned char *opindex
;
517 const struct powerpc_operand
*operand
;
520 if ((insn
& opcode
->mask
) != opcode
->opcode
521 || (dialect
!= (ppc_cpu_t
) -1
522 && ((opcode
->flags
& dialect
) == 0
523 || (opcode
->deprecated
& dialect
) != 0)))
526 /* Check validity of operands. */
528 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
530 operand
= powerpc_operands
+ *opindex
;
531 if (operand
->extract
)
532 (*operand
->extract
) (insn
, dialect
, &invalid
);
543 /* Find a match for INSN in the VLE opcode table. */
545 static const struct powerpc_opcode
*
546 lookup_vle (unsigned long insn
)
548 const struct powerpc_opcode
*opcode
;
549 const struct powerpc_opcode
*opcode_end
;
553 if (op
>= 0x20 && op
<= 0x37)
555 /* This insn has a 4-bit opcode. */
558 seg
= VLE_OP_TO_SEG (op
);
560 /* Find the first match in the opcode table for this major opcode. */
561 opcode_end
= vle_opcodes
+ vle_opcd_indices
[seg
+ 1];
562 for (opcode
= vle_opcodes
+ vle_opcd_indices
[seg
];
566 unsigned long table_opcd
= opcode
->opcode
;
567 unsigned long table_mask
= opcode
->mask
;
568 bfd_boolean table_op_is_short
= PPC_OP_SE_VLE(table_mask
);
570 const unsigned char *opindex
;
571 const struct powerpc_operand
*operand
;
575 if (table_op_is_short
)
577 if ((insn2
& table_mask
) != table_opcd
)
580 /* Check validity of operands. */
582 for (opindex
= opcode
->operands
; *opindex
!= 0; ++opindex
)
584 operand
= powerpc_operands
+ *opindex
;
585 if (operand
->extract
)
586 (*operand
->extract
) (insn
, (ppc_cpu_t
)0, &invalid
);
597 /* Print a PowerPC or POWER instruction. */
600 print_insn_powerpc (bfd_vma memaddr
,
601 struct disassemble_info
*info
,
608 const struct powerpc_opcode
*opcode
;
609 bfd_boolean insn_is_short
;
611 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 4, info
);
614 /* The final instruction may be a 2-byte VLE insn. */
615 if ((dialect
& PPC_OPCODE_VLE
) != 0)
617 /* Clear buffer so unused bytes will not have garbage in them. */
618 buffer
[0] = buffer
[1] = buffer
[2] = buffer
[3] = 0;
619 status
= (*info
->read_memory_func
) (memaddr
, buffer
, 2, info
);
622 (*info
->memory_error_func
) (status
, memaddr
, info
);
628 (*info
->memory_error_func
) (status
, memaddr
, info
);
634 insn
= bfd_getb32 (buffer
);
636 insn
= bfd_getl32 (buffer
);
638 /* Get the major opcode of the insn. */
640 insn_is_short
= FALSE
;
641 if ((dialect
& PPC_OPCODE_VLE
) != 0)
643 opcode
= lookup_vle (insn
);
645 insn_is_short
= PPC_OP_SE_VLE(opcode
->mask
);
648 opcode
= lookup_powerpc (insn
, dialect
);
649 if (opcode
== NULL
&& (dialect
& PPC_OPCODE_ANY
) != 0)
650 opcode
= lookup_powerpc (insn
, (ppc_cpu_t
) -1);
654 const unsigned char *opindex
;
655 const struct powerpc_operand
*operand
;
660 if (opcode
->operands
[0] != 0)
661 (*info
->fprintf_func
) (info
->stream
, "%-7s ", opcode
->name
);
663 (*info
->fprintf_func
) (info
->stream
, "%s", opcode
->name
);
666 /* The operands will be fetched out of the 16-bit instruction. */
669 /* Now extract and print the operands. */
673 for (opindex
= opcode
->operands
; *opindex
!= 0; opindex
++)
677 operand
= powerpc_operands
+ *opindex
;
679 /* Operands that are marked FAKE are simply ignored. We
680 already made sure that the extract function considered
681 the instruction to be valid. */
682 if ((operand
->flags
& PPC_OPERAND_FAKE
) != 0)
685 /* If all of the optional operands have the value zero,
686 then don't print any of them. */
687 if ((operand
->flags
& PPC_OPERAND_OPTIONAL
) != 0)
689 if (skip_optional
< 0)
690 skip_optional
= skip_optional_operands (opindex
, insn
,
696 value
= operand_value_powerpc (operand
, insn
, dialect
);
700 (*info
->fprintf_func
) (info
->stream
, ",");
704 /* Print the operand as directed by the flags. */
705 if ((operand
->flags
& PPC_OPERAND_GPR
) != 0
706 || ((operand
->flags
& PPC_OPERAND_GPR_0
) != 0 && value
!= 0))
707 (*info
->fprintf_func
) (info
->stream
, "r%ld", value
);
708 else if ((operand
->flags
& PPC_OPERAND_FPR
) != 0)
709 (*info
->fprintf_func
) (info
->stream
, "f%ld", value
);
710 else if ((operand
->flags
& PPC_OPERAND_VR
) != 0)
711 (*info
->fprintf_func
) (info
->stream
, "v%ld", value
);
712 else if ((operand
->flags
& PPC_OPERAND_VSR
) != 0)
713 (*info
->fprintf_func
) (info
->stream
, "vs%ld", value
);
714 else if ((operand
->flags
& PPC_OPERAND_RELATIVE
) != 0)
715 (*info
->print_address_func
) (memaddr
+ value
, info
);
716 else if ((operand
->flags
& PPC_OPERAND_ABSOLUTE
) != 0)
717 (*info
->print_address_func
) ((bfd_vma
) value
& 0xffffffff, info
);
718 else if ((operand
->flags
& PPC_OPERAND_FSL
) != 0)
719 (*info
->fprintf_func
) (info
->stream
, "fsl%ld", value
);
720 else if ((operand
->flags
& PPC_OPERAND_FCR
) != 0)
721 (*info
->fprintf_func
) (info
->stream
, "fcr%ld", value
);
722 else if ((operand
->flags
& PPC_OPERAND_UDI
) != 0)
723 (*info
->fprintf_func
) (info
->stream
, "%ld", value
);
724 else if ((operand
->flags
& PPC_OPERAND_CR_REG
) != 0
725 && (((dialect
& PPC_OPCODE_PPC
) != 0)
726 || ((dialect
& PPC_OPCODE_VLE
) != 0)))
727 (*info
->fprintf_func
) (info
->stream
, "cr%ld", value
);
728 else if (((operand
->flags
& PPC_OPERAND_CR_BIT
) != 0)
729 && (((dialect
& PPC_OPCODE_PPC
) != 0)
730 || ((dialect
& PPC_OPCODE_VLE
) != 0)))
732 static const char *cbnames
[4] = { "lt", "gt", "eq", "so" };
738 (*info
->fprintf_func
) (info
->stream
, "4*cr%d+", cr
);
740 (*info
->fprintf_func
) (info
->stream
, "%s", cbnames
[cc
]);
743 (*info
->fprintf_func
) (info
->stream
, "%d", (int) value
);
747 (*info
->fprintf_func
) (info
->stream
, ")");
751 if ((operand
->flags
& PPC_OPERAND_PARENS
) == 0)
755 (*info
->fprintf_func
) (info
->stream
, "(");
760 /* We have found and printed an instruction.
761 If it was a short VLE instruction we have more to do. */
768 /* Otherwise, return. */
772 /* We could not find a match. */
773 (*info
->fprintf_func
) (info
->stream
, ".long 0x%lx", insn
);
778 const disasm_options_t
*
779 disassembler_options_powerpc (void)
781 static disasm_options_t
*opts
= NULL
;
785 size_t i
, num_options
= ARRAY_SIZE (ppc_opts
);
786 opts
= XNEW (disasm_options_t
);
787 opts
->name
= XNEWVEC (const char *, num_options
+ 1);
788 for (i
= 0; i
< num_options
; i
++)
789 opts
->name
[i
] = ppc_opts
[i
].opt
;
790 /* The array we return must be NULL terminated. */
791 opts
->name
[i
] = NULL
;
792 opts
->description
= NULL
;
799 print_ppc_disassembler_options (FILE *stream
)
803 fprintf (stream
, _("\n\
804 The following PPC specific disassembler options are supported for use with\n\
807 for (col
= 0, i
= 0; i
< ARRAY_SIZE (ppc_opts
); i
++)
809 col
+= fprintf (stream
, " %s,", ppc_opts
[i
].opt
);
812 fprintf (stream
, "\n");
816 fprintf (stream
, "\n");