RISC-V: Add compressed instruction hints, and a few misc cleanups.
[deliverable/binutils-gdb.git] / opcodes / xc16x-ibld.c
1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction building/extraction support for xc16x. -*- C -*-
3
4 THIS FILE IS MACHINE GENERATED WITH CGEN: Cpu tools GENerator.
5 - the resultant file is machine generated, cgen-ibld.in isn't
6
7 Copyright (C) 1996-2017 Free Software Foundation, Inc.
8
9 This file is part of libopcodes.
10
11 This library is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 3, or (at your option)
14 any later version.
15
16 It is distributed in the hope that it will be useful, but WITHOUT
17 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
18 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
19 License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software Foundation, Inc.,
23 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
24
25 /* ??? Eventually more and more of this stuff can go to cpu-independent files.
26 Keep that in mind. */
27
28 #include "sysdep.h"
29 #include <stdio.h>
30 #include "ansidecl.h"
31 #include "dis-asm.h"
32 #include "bfd.h"
33 #include "symcat.h"
34 #include "xc16x-desc.h"
35 #include "xc16x-opc.h"
36 #include "cgen/basic-modes.h"
37 #include "opintl.h"
38 #include "safe-ctype.h"
39
40 #undef min
41 #define min(a,b) ((a) < (b) ? (a) : (b))
42 #undef max
43 #define max(a,b) ((a) > (b) ? (a) : (b))
44
45 /* Used by the ifield rtx function. */
46 #define FLD(f) (fields->f)
47
48 static const char * insert_normal
49 (CGEN_CPU_DESC, long, unsigned int, unsigned int, unsigned int,
50 unsigned int, unsigned int, unsigned int, CGEN_INSN_BYTES_PTR);
51 static const char * insert_insn_normal
52 (CGEN_CPU_DESC, const CGEN_INSN *,
53 CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
54 static int extract_normal
55 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, CGEN_INSN_INT,
56 unsigned int, unsigned int, unsigned int, unsigned int,
57 unsigned int, unsigned int, bfd_vma, long *);
58 static int extract_insn_normal
59 (CGEN_CPU_DESC, const CGEN_INSN *, CGEN_EXTRACT_INFO *,
60 CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
61 #if CGEN_INT_INSN_P
62 static void put_insn_int_value
63 (CGEN_CPU_DESC, CGEN_INSN_BYTES_PTR, int, int, CGEN_INSN_INT);
64 #endif
65 #if ! CGEN_INT_INSN_P
66 static CGEN_INLINE void insert_1
67 (CGEN_CPU_DESC, unsigned long, int, int, int, unsigned char *);
68 static CGEN_INLINE int fill_cache
69 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, bfd_vma);
70 static CGEN_INLINE long extract_1
71 (CGEN_CPU_DESC, CGEN_EXTRACT_INFO *, int, int, int, unsigned char *, bfd_vma);
72 #endif
73 \f
74 /* Operand insertion. */
75
76 #if ! CGEN_INT_INSN_P
77
78 /* Subroutine of insert_normal. */
79
80 static CGEN_INLINE void
81 insert_1 (CGEN_CPU_DESC cd,
82 unsigned long value,
83 int start,
84 int length,
85 int word_length,
86 unsigned char *bufp)
87 {
88 unsigned long x,mask;
89 int shift;
90
91 x = cgen_get_insn_value (cd, bufp, word_length);
92
93 /* Written this way to avoid undefined behaviour. */
94 mask = (((1L << (length - 1)) - 1) << 1) | 1;
95 if (CGEN_INSN_LSB0_P)
96 shift = (start + 1) - length;
97 else
98 shift = (word_length - (start + length));
99 x = (x & ~(mask << shift)) | ((value & mask) << shift);
100
101 cgen_put_insn_value (cd, bufp, word_length, (bfd_vma) x);
102 }
103
104 #endif /* ! CGEN_INT_INSN_P */
105
106 /* Default insertion routine.
107
108 ATTRS is a mask of the boolean attributes.
109 WORD_OFFSET is the offset in bits from the start of the insn of the value.
110 WORD_LENGTH is the length of the word in bits in which the value resides.
111 START is the starting bit number in the word, architecture origin.
112 LENGTH is the length of VALUE in bits.
113 TOTAL_LENGTH is the total length of the insn in bits.
114
115 The result is an error message or NULL if success. */
116
117 /* ??? This duplicates functionality with bfd's howto table and
118 bfd_install_relocation. */
119 /* ??? This doesn't handle bfd_vma's. Create another function when
120 necessary. */
121
122 static const char *
123 insert_normal (CGEN_CPU_DESC cd,
124 long value,
125 unsigned int attrs,
126 unsigned int word_offset,
127 unsigned int start,
128 unsigned int length,
129 unsigned int word_length,
130 unsigned int total_length,
131 CGEN_INSN_BYTES_PTR buffer)
132 {
133 static char errbuf[100];
134 /* Written this way to avoid undefined behaviour. */
135 unsigned long mask = (((1L << (length - 1)) - 1) << 1) | 1;
136
137 /* If LENGTH is zero, this operand doesn't contribute to the value. */
138 if (length == 0)
139 return NULL;
140
141 if (word_length > 8 * sizeof (CGEN_INSN_INT))
142 abort ();
143
144 /* For architectures with insns smaller than the base-insn-bitsize,
145 word_length may be too big. */
146 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
147 {
148 if (word_offset == 0
149 && word_length > total_length)
150 word_length = total_length;
151 }
152
153 /* Ensure VALUE will fit. */
154 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGN_OPT))
155 {
156 long minval = - (1L << (length - 1));
157 unsigned long maxval = mask;
158
159 if ((value > 0 && (unsigned long) value > maxval)
160 || value < minval)
161 {
162 /* xgettext:c-format */
163 sprintf (errbuf,
164 _("operand out of range (%ld not between %ld and %lu)"),
165 value, minval, maxval);
166 return errbuf;
167 }
168 }
169 else if (! CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED))
170 {
171 unsigned long maxval = mask;
172 unsigned long val = (unsigned long) value;
173
174 /* For hosts with a word size > 32 check to see if value has been sign
175 extended beyond 32 bits. If so then ignore these higher sign bits
176 as the user is attempting to store a 32-bit signed value into an
177 unsigned 32-bit field which is allowed. */
178 if (sizeof (unsigned long) > 4 && ((value >> 32) == -1))
179 val &= 0xFFFFFFFF;
180
181 if (val > maxval)
182 {
183 /* xgettext:c-format */
184 sprintf (errbuf,
185 _("operand out of range (0x%lx not between 0 and 0x%lx)"),
186 val, maxval);
187 return errbuf;
188 }
189 }
190 else
191 {
192 if (! cgen_signed_overflow_ok_p (cd))
193 {
194 long minval = - (1L << (length - 1));
195 long maxval = (1L << (length - 1)) - 1;
196
197 if (value < minval || value > maxval)
198 {
199 sprintf
200 /* xgettext:c-format */
201 (errbuf, _("operand out of range (%ld not between %ld and %ld)"),
202 value, minval, maxval);
203 return errbuf;
204 }
205 }
206 }
207
208 #if CGEN_INT_INSN_P
209
210 {
211 int shift_within_word, shift_to_word, shift;
212
213 /* How to shift the value to BIT0 of the word. */
214 shift_to_word = total_length - (word_offset + word_length);
215
216 /* How to shift the value to the field within the word. */
217 if (CGEN_INSN_LSB0_P)
218 shift_within_word = start + 1 - length;
219 else
220 shift_within_word = word_length - start - length;
221
222 /* The total SHIFT, then mask in the value. */
223 shift = shift_to_word + shift_within_word;
224 *buffer = (*buffer & ~(mask << shift)) | ((value & mask) << shift);
225 }
226
227 #else /* ! CGEN_INT_INSN_P */
228
229 {
230 unsigned char *bufp = (unsigned char *) buffer + word_offset / 8;
231
232 insert_1 (cd, value, start, length, word_length, bufp);
233 }
234
235 #endif /* ! CGEN_INT_INSN_P */
236
237 return NULL;
238 }
239
240 /* Default insn builder (insert handler).
241 The instruction is recorded in CGEN_INT_INSN_P byte order (meaning
242 that if CGEN_INSN_BYTES_PTR is an int * and thus, the value is
243 recorded in host byte order, otherwise BUFFER is an array of bytes
244 and the value is recorded in target byte order).
245 The result is an error message or NULL if success. */
246
247 static const char *
248 insert_insn_normal (CGEN_CPU_DESC cd,
249 const CGEN_INSN * insn,
250 CGEN_FIELDS * fields,
251 CGEN_INSN_BYTES_PTR buffer,
252 bfd_vma pc)
253 {
254 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
255 unsigned long value;
256 const CGEN_SYNTAX_CHAR_TYPE * syn;
257
258 CGEN_INIT_INSERT (cd);
259 value = CGEN_INSN_BASE_VALUE (insn);
260
261 /* If we're recording insns as numbers (rather than a string of bytes),
262 target byte order handling is deferred until later. */
263
264 #if CGEN_INT_INSN_P
265
266 put_insn_int_value (cd, buffer, cd->base_insn_bitsize,
267 CGEN_FIELDS_BITSIZE (fields), value);
268
269 #else
270
271 cgen_put_insn_value (cd, buffer, min ((unsigned) cd->base_insn_bitsize,
272 (unsigned) CGEN_FIELDS_BITSIZE (fields)),
273 value);
274
275 #endif /* ! CGEN_INT_INSN_P */
276
277 /* ??? It would be better to scan the format's fields.
278 Still need to be able to insert a value based on the operand though;
279 e.g. storing a branch displacement that got resolved later.
280 Needs more thought first. */
281
282 for (syn = CGEN_SYNTAX_STRING (syntax); * syn; ++ syn)
283 {
284 const char *errmsg;
285
286 if (CGEN_SYNTAX_CHAR_P (* syn))
287 continue;
288
289 errmsg = (* cd->insert_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
290 fields, buffer, pc);
291 if (errmsg)
292 return errmsg;
293 }
294
295 return NULL;
296 }
297
298 #if CGEN_INT_INSN_P
299 /* Cover function to store an insn value into an integral insn. Must go here
300 because it needs <prefix>-desc.h for CGEN_INT_INSN_P. */
301
302 static void
303 put_insn_int_value (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
304 CGEN_INSN_BYTES_PTR buf,
305 int length,
306 int insn_length,
307 CGEN_INSN_INT value)
308 {
309 /* For architectures with insns smaller than the base-insn-bitsize,
310 length may be too big. */
311 if (length > insn_length)
312 *buf = value;
313 else
314 {
315 int shift = insn_length - length;
316 /* Written this way to avoid undefined behaviour. */
317 CGEN_INSN_INT mask = (((1L << (length - 1)) - 1) << 1) | 1;
318
319 *buf = (*buf & ~(mask << shift)) | ((value & mask) << shift);
320 }
321 }
322 #endif
323 \f
324 /* Operand extraction. */
325
326 #if ! CGEN_INT_INSN_P
327
328 /* Subroutine of extract_normal.
329 Ensure sufficient bytes are cached in EX_INFO.
330 OFFSET is the offset in bytes from the start of the insn of the value.
331 BYTES is the length of the needed value.
332 Returns 1 for success, 0 for failure. */
333
334 static CGEN_INLINE int
335 fill_cache (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
336 CGEN_EXTRACT_INFO *ex_info,
337 int offset,
338 int bytes,
339 bfd_vma pc)
340 {
341 /* It's doubtful that the middle part has already been fetched so
342 we don't optimize that case. kiss. */
343 unsigned int mask;
344 disassemble_info *info = (disassemble_info *) ex_info->dis_info;
345
346 /* First do a quick check. */
347 mask = (1 << bytes) - 1;
348 if (((ex_info->valid >> offset) & mask) == mask)
349 return 1;
350
351 /* Search for the first byte we need to read. */
352 for (mask = 1 << offset; bytes > 0; --bytes, ++offset, mask <<= 1)
353 if (! (mask & ex_info->valid))
354 break;
355
356 if (bytes)
357 {
358 int status;
359
360 pc += offset;
361 status = (*info->read_memory_func)
362 (pc, ex_info->insn_bytes + offset, bytes, info);
363
364 if (status != 0)
365 {
366 (*info->memory_error_func) (status, pc, info);
367 return 0;
368 }
369
370 ex_info->valid |= ((1 << bytes) - 1) << offset;
371 }
372
373 return 1;
374 }
375
376 /* Subroutine of extract_normal. */
377
378 static CGEN_INLINE long
379 extract_1 (CGEN_CPU_DESC cd,
380 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
381 int start,
382 int length,
383 int word_length,
384 unsigned char *bufp,
385 bfd_vma pc ATTRIBUTE_UNUSED)
386 {
387 unsigned long x;
388 int shift;
389
390 x = cgen_get_insn_value (cd, bufp, word_length);
391
392 if (CGEN_INSN_LSB0_P)
393 shift = (start + 1) - length;
394 else
395 shift = (word_length - (start + length));
396 return x >> shift;
397 }
398
399 #endif /* ! CGEN_INT_INSN_P */
400
401 /* Default extraction routine.
402
403 INSN_VALUE is the first base_insn_bitsize bits of the insn in host order,
404 or sometimes less for cases like the m32r where the base insn size is 32
405 but some insns are 16 bits.
406 ATTRS is a mask of the boolean attributes. We only need `SIGNED',
407 but for generality we take a bitmask of all of them.
408 WORD_OFFSET is the offset in bits from the start of the insn of the value.
409 WORD_LENGTH is the length of the word in bits in which the value resides.
410 START is the starting bit number in the word, architecture origin.
411 LENGTH is the length of VALUE in bits.
412 TOTAL_LENGTH is the total length of the insn in bits.
413
414 Returns 1 for success, 0 for failure. */
415
416 /* ??? The return code isn't properly used. wip. */
417
418 /* ??? This doesn't handle bfd_vma's. Create another function when
419 necessary. */
420
421 static int
422 extract_normal (CGEN_CPU_DESC cd,
423 #if ! CGEN_INT_INSN_P
424 CGEN_EXTRACT_INFO *ex_info,
425 #else
426 CGEN_EXTRACT_INFO *ex_info ATTRIBUTE_UNUSED,
427 #endif
428 CGEN_INSN_INT insn_value,
429 unsigned int attrs,
430 unsigned int word_offset,
431 unsigned int start,
432 unsigned int length,
433 unsigned int word_length,
434 unsigned int total_length,
435 #if ! CGEN_INT_INSN_P
436 bfd_vma pc,
437 #else
438 bfd_vma pc ATTRIBUTE_UNUSED,
439 #endif
440 long *valuep)
441 {
442 long value, mask;
443
444 /* If LENGTH is zero, this operand doesn't contribute to the value
445 so give it a standard value of zero. */
446 if (length == 0)
447 {
448 *valuep = 0;
449 return 1;
450 }
451
452 if (word_length > 8 * sizeof (CGEN_INSN_INT))
453 abort ();
454
455 /* For architectures with insns smaller than the insn-base-bitsize,
456 word_length may be too big. */
457 if (cd->min_insn_bitsize < cd->base_insn_bitsize)
458 {
459 if (word_offset + word_length > total_length)
460 word_length = total_length - word_offset;
461 }
462
463 /* Does the value reside in INSN_VALUE, and at the right alignment? */
464
465 if (CGEN_INT_INSN_P || (word_offset == 0 && word_length == total_length))
466 {
467 if (CGEN_INSN_LSB0_P)
468 value = insn_value >> ((word_offset + start + 1) - length);
469 else
470 value = insn_value >> (total_length - ( word_offset + start + length));
471 }
472
473 #if ! CGEN_INT_INSN_P
474
475 else
476 {
477 unsigned char *bufp = ex_info->insn_bytes + word_offset / 8;
478
479 if (word_length > 8 * sizeof (CGEN_INSN_INT))
480 abort ();
481
482 if (fill_cache (cd, ex_info, word_offset / 8, word_length / 8, pc) == 0)
483 return 0;
484
485 value = extract_1 (cd, ex_info, start, length, word_length, bufp, pc);
486 }
487
488 #endif /* ! CGEN_INT_INSN_P */
489
490 /* Written this way to avoid undefined behaviour. */
491 mask = (((1L << (length - 1)) - 1) << 1) | 1;
492
493 value &= mask;
494 /* sign extend? */
495 if (CGEN_BOOL_ATTR (attrs, CGEN_IFLD_SIGNED)
496 && (value & (1L << (length - 1))))
497 value |= ~mask;
498
499 *valuep = value;
500
501 return 1;
502 }
503
504 /* Default insn extractor.
505
506 INSN_VALUE is the first base_insn_bitsize bits, translated to host order.
507 The extracted fields are stored in FIELDS.
508 EX_INFO is used to handle reading variable length insns.
509 Return the length of the insn in bits, or 0 if no match,
510 or -1 if an error occurs fetching data (memory_error_func will have
511 been called). */
512
513 static int
514 extract_insn_normal (CGEN_CPU_DESC cd,
515 const CGEN_INSN *insn,
516 CGEN_EXTRACT_INFO *ex_info,
517 CGEN_INSN_INT insn_value,
518 CGEN_FIELDS *fields,
519 bfd_vma pc)
520 {
521 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
522 const CGEN_SYNTAX_CHAR_TYPE *syn;
523
524 CGEN_FIELDS_BITSIZE (fields) = CGEN_INSN_BITSIZE (insn);
525
526 CGEN_INIT_EXTRACT (cd);
527
528 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
529 {
530 int length;
531
532 if (CGEN_SYNTAX_CHAR_P (*syn))
533 continue;
534
535 length = (* cd->extract_operand) (cd, CGEN_SYNTAX_FIELD (*syn),
536 ex_info, insn_value, fields, pc);
537 if (length <= 0)
538 return length;
539 }
540
541 /* We recognized and successfully extracted this insn. */
542 return CGEN_INSN_BITSIZE (insn);
543 }
544 \f
545 /* Machine generated code added here. */
546
547 const char * xc16x_cgen_insert_operand
548 (CGEN_CPU_DESC, int, CGEN_FIELDS *, CGEN_INSN_BYTES_PTR, bfd_vma);
549
550 /* Main entry point for operand insertion.
551
552 This function is basically just a big switch statement. Earlier versions
553 used tables to look up the function to use, but
554 - if the table contains both assembler and disassembler functions then
555 the disassembler contains much of the assembler and vice-versa,
556 - there's a lot of inlining possibilities as things grow,
557 - using a switch statement avoids the function call overhead.
558
559 This function could be moved into `parse_insn_normal', but keeping it
560 separate makes clear the interface between `parse_insn_normal' and each of
561 the handlers. It's also needed by GAS to insert operands that couldn't be
562 resolved during parsing. */
563
564 const char *
565 xc16x_cgen_insert_operand (CGEN_CPU_DESC cd,
566 int opindex,
567 CGEN_FIELDS * fields,
568 CGEN_INSN_BYTES_PTR buffer,
569 bfd_vma pc ATTRIBUTE_UNUSED)
570 {
571 const char * errmsg = NULL;
572 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
573
574 switch (opindex)
575 {
576 case XC16X_OPERAND_REGNAM :
577 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
578 break;
579 case XC16X_OPERAND_BIT01 :
580 errmsg = insert_normal (cd, fields->f_op_1bit, 0, 0, 8, 1, 32, total_length, buffer);
581 break;
582 case XC16X_OPERAND_BIT1 :
583 errmsg = insert_normal (cd, fields->f_op_bit1, 0, 0, 11, 1, 32, total_length, buffer);
584 break;
585 case XC16X_OPERAND_BIT2 :
586 errmsg = insert_normal (cd, fields->f_op_bit2, 0, 0, 11, 2, 32, total_length, buffer);
587 break;
588 case XC16X_OPERAND_BIT4 :
589 errmsg = insert_normal (cd, fields->f_op_bit4, 0, 0, 11, 4, 32, total_length, buffer);
590 break;
591 case XC16X_OPERAND_BIT8 :
592 errmsg = insert_normal (cd, fields->f_op_bit8, 0, 0, 31, 8, 32, total_length, buffer);
593 break;
594 case XC16X_OPERAND_BITONE :
595 errmsg = insert_normal (cd, fields->f_op_onebit, 0, 0, 9, 1, 32, total_length, buffer);
596 break;
597 case XC16X_OPERAND_CADDR :
598 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
599 break;
600 case XC16X_OPERAND_COND :
601 errmsg = insert_normal (cd, fields->f_condcode, 0, 0, 7, 4, 32, total_length, buffer);
602 break;
603 case XC16X_OPERAND_DATA8 :
604 errmsg = insert_normal (cd, fields->f_data8, 0, 0, 23, 8, 32, total_length, buffer);
605 break;
606 case XC16X_OPERAND_DATAHI8 :
607 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
608 break;
609 case XC16X_OPERAND_DOT :
610 break;
611 case XC16X_OPERAND_DR :
612 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
613 break;
614 case XC16X_OPERAND_DRB :
615 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
616 break;
617 case XC16X_OPERAND_DRI :
618 errmsg = insert_normal (cd, fields->f_r4, 0, 0, 11, 4, 32, total_length, buffer);
619 break;
620 case XC16X_OPERAND_EXTCOND :
621 errmsg = insert_normal (cd, fields->f_extccode, 0, 0, 15, 5, 32, total_length, buffer);
622 break;
623 case XC16X_OPERAND_GENREG :
624 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
625 break;
626 case XC16X_OPERAND_HASH :
627 break;
628 case XC16X_OPERAND_ICOND :
629 errmsg = insert_normal (cd, fields->f_icondcode, 0, 0, 15, 4, 32, total_length, buffer);
630 break;
631 case XC16X_OPERAND_LBIT2 :
632 errmsg = insert_normal (cd, fields->f_op_lbit2, 0, 0, 15, 2, 32, total_length, buffer);
633 break;
634 case XC16X_OPERAND_LBIT4 :
635 errmsg = insert_normal (cd, fields->f_op_lbit4, 0, 0, 15, 4, 32, total_length, buffer);
636 break;
637 case XC16X_OPERAND_MASK8 :
638 errmsg = insert_normal (cd, fields->f_mask8, 0, 0, 23, 8, 32, total_length, buffer);
639 break;
640 case XC16X_OPERAND_MASKLO8 :
641 errmsg = insert_normal (cd, fields->f_datahi8, 0, 0, 31, 8, 32, total_length, buffer);
642 break;
643 case XC16X_OPERAND_MEMGR8 :
644 errmsg = insert_normal (cd, fields->f_memgr8, 0, 0, 31, 16, 32, total_length, buffer);
645 break;
646 case XC16X_OPERAND_MEMORY :
647 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
648 break;
649 case XC16X_OPERAND_PAG :
650 break;
651 case XC16X_OPERAND_PAGENUM :
652 errmsg = insert_normal (cd, fields->f_pagenum, 0, 0, 25, 10, 32, total_length, buffer);
653 break;
654 case XC16X_OPERAND_POF :
655 break;
656 case XC16X_OPERAND_QBIT :
657 errmsg = insert_normal (cd, fields->f_qbit, 0, 0, 7, 4, 32, total_length, buffer);
658 break;
659 case XC16X_OPERAND_QHIBIT :
660 errmsg = insert_normal (cd, fields->f_qhibit, 0, 0, 27, 4, 32, total_length, buffer);
661 break;
662 case XC16X_OPERAND_QLOBIT :
663 errmsg = insert_normal (cd, fields->f_qlobit, 0, 0, 31, 4, 32, total_length, buffer);
664 break;
665 case XC16X_OPERAND_REG8 :
666 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
667 break;
668 case XC16X_OPERAND_REGB8 :
669 errmsg = insert_normal (cd, fields->f_regb8, 0, 0, 15, 8, 32, total_length, buffer);
670 break;
671 case XC16X_OPERAND_REGBMEM8 :
672 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
673 break;
674 case XC16X_OPERAND_REGHI8 :
675 errmsg = insert_normal (cd, fields->f_reghi8, 0, 0, 23, 8, 32, total_length, buffer);
676 break;
677 case XC16X_OPERAND_REGMEM8 :
678 errmsg = insert_normal (cd, fields->f_regmem8, 0, 0, 15, 8, 32, total_length, buffer);
679 break;
680 case XC16X_OPERAND_REGOFF8 :
681 errmsg = insert_normal (cd, fields->f_regoff8, 0, 0, 15, 8, 32, total_length, buffer);
682 break;
683 case XC16X_OPERAND_REL :
684 errmsg = insert_normal (cd, fields->f_rel8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, buffer);
685 break;
686 case XC16X_OPERAND_RELHI :
687 errmsg = insert_normal (cd, fields->f_relhi8, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, buffer);
688 break;
689 case XC16X_OPERAND_SEG :
690 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
691 break;
692 case XC16X_OPERAND_SEGHI8 :
693 errmsg = insert_normal (cd, fields->f_segnum8, 0, 0, 23, 8, 32, total_length, buffer);
694 break;
695 case XC16X_OPERAND_SEGM :
696 break;
697 case XC16X_OPERAND_SOF :
698 break;
699 case XC16X_OPERAND_SR :
700 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
701 break;
702 case XC16X_OPERAND_SR2 :
703 errmsg = insert_normal (cd, fields->f_r0, 0, 0, 9, 2, 32, total_length, buffer);
704 break;
705 case XC16X_OPERAND_SRB :
706 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
707 break;
708 case XC16X_OPERAND_SRC1 :
709 errmsg = insert_normal (cd, fields->f_r1, 0, 0, 15, 4, 32, total_length, buffer);
710 break;
711 case XC16X_OPERAND_SRC2 :
712 errmsg = insert_normal (cd, fields->f_r2, 0, 0, 11, 4, 32, total_length, buffer);
713 break;
714 case XC16X_OPERAND_SRDIV :
715 errmsg = insert_normal (cd, fields->f_reg8, 0, 0, 15, 8, 32, total_length, buffer);
716 break;
717 case XC16X_OPERAND_U4 :
718 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
719 break;
720 case XC16X_OPERAND_UIMM16 :
721 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
722 break;
723 case XC16X_OPERAND_UIMM2 :
724 errmsg = insert_normal (cd, fields->f_uimm2, 0, 0, 13, 2, 32, total_length, buffer);
725 break;
726 case XC16X_OPERAND_UIMM3 :
727 errmsg = insert_normal (cd, fields->f_uimm3, 0, 0, 10, 3, 32, total_length, buffer);
728 break;
729 case XC16X_OPERAND_UIMM4 :
730 errmsg = insert_normal (cd, fields->f_uimm4, 0, 0, 15, 4, 32, total_length, buffer);
731 break;
732 case XC16X_OPERAND_UIMM7 :
733 errmsg = insert_normal (cd, fields->f_uimm7, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, buffer);
734 break;
735 case XC16X_OPERAND_UIMM8 :
736 errmsg = insert_normal (cd, fields->f_uimm8, 0, 0, 23, 8, 32, total_length, buffer);
737 break;
738 case XC16X_OPERAND_UPAG16 :
739 errmsg = insert_normal (cd, fields->f_uimm16, 0, 0, 31, 16, 32, total_length, buffer);
740 break;
741 case XC16X_OPERAND_UPOF16 :
742 errmsg = insert_normal (cd, fields->f_memory, 0, 0, 31, 16, 32, total_length, buffer);
743 break;
744 case XC16X_OPERAND_USEG16 :
745 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
746 break;
747 case XC16X_OPERAND_USEG8 :
748 errmsg = insert_normal (cd, fields->f_seg8, 0, 0, 15, 8, 32, total_length, buffer);
749 break;
750 case XC16X_OPERAND_USOF16 :
751 errmsg = insert_normal (cd, fields->f_offset16, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, buffer);
752 break;
753
754 default :
755 /* xgettext:c-format */
756 fprintf (stderr, _("Unrecognized field %d while building insn.\n"),
757 opindex);
758 abort ();
759 }
760
761 return errmsg;
762 }
763
764 int xc16x_cgen_extract_operand
765 (CGEN_CPU_DESC, int, CGEN_EXTRACT_INFO *, CGEN_INSN_INT, CGEN_FIELDS *, bfd_vma);
766
767 /* Main entry point for operand extraction.
768 The result is <= 0 for error, >0 for success.
769 ??? Actual values aren't well defined right now.
770
771 This function is basically just a big switch statement. Earlier versions
772 used tables to look up the function to use, but
773 - if the table contains both assembler and disassembler functions then
774 the disassembler contains much of the assembler and vice-versa,
775 - there's a lot of inlining possibilities as things grow,
776 - using a switch statement avoids the function call overhead.
777
778 This function could be moved into `print_insn_normal', but keeping it
779 separate makes clear the interface between `print_insn_normal' and each of
780 the handlers. */
781
782 int
783 xc16x_cgen_extract_operand (CGEN_CPU_DESC cd,
784 int opindex,
785 CGEN_EXTRACT_INFO *ex_info,
786 CGEN_INSN_INT insn_value,
787 CGEN_FIELDS * fields,
788 bfd_vma pc)
789 {
790 /* Assume success (for those operands that are nops). */
791 int length = 1;
792 unsigned int total_length = CGEN_FIELDS_BITSIZE (fields);
793
794 switch (opindex)
795 {
796 case XC16X_OPERAND_REGNAM :
797 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
798 break;
799 case XC16X_OPERAND_BIT01 :
800 length = extract_normal (cd, ex_info, insn_value, 0, 0, 8, 1, 32, total_length, pc, & fields->f_op_1bit);
801 break;
802 case XC16X_OPERAND_BIT1 :
803 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 1, 32, total_length, pc, & fields->f_op_bit1);
804 break;
805 case XC16X_OPERAND_BIT2 :
806 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 2, 32, total_length, pc, & fields->f_op_bit2);
807 break;
808 case XC16X_OPERAND_BIT4 :
809 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_op_bit4);
810 break;
811 case XC16X_OPERAND_BIT8 :
812 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_op_bit8);
813 break;
814 case XC16X_OPERAND_BITONE :
815 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 1, 32, total_length, pc, & fields->f_op_onebit);
816 break;
817 case XC16X_OPERAND_CADDR :
818 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
819 break;
820 case XC16X_OPERAND_COND :
821 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_condcode);
822 break;
823 case XC16X_OPERAND_DATA8 :
824 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_data8);
825 break;
826 case XC16X_OPERAND_DATAHI8 :
827 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
828 break;
829 case XC16X_OPERAND_DOT :
830 break;
831 case XC16X_OPERAND_DR :
832 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
833 break;
834 case XC16X_OPERAND_DRB :
835 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
836 break;
837 case XC16X_OPERAND_DRI :
838 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r4);
839 break;
840 case XC16X_OPERAND_EXTCOND :
841 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 5, 32, total_length, pc, & fields->f_extccode);
842 break;
843 case XC16X_OPERAND_GENREG :
844 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
845 break;
846 case XC16X_OPERAND_HASH :
847 break;
848 case XC16X_OPERAND_ICOND :
849 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_icondcode);
850 break;
851 case XC16X_OPERAND_LBIT2 :
852 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 2, 32, total_length, pc, & fields->f_op_lbit2);
853 break;
854 case XC16X_OPERAND_LBIT4 :
855 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_op_lbit4);
856 break;
857 case XC16X_OPERAND_MASK8 :
858 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_mask8);
859 break;
860 case XC16X_OPERAND_MASKLO8 :
861 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 8, 32, total_length, pc, & fields->f_datahi8);
862 break;
863 case XC16X_OPERAND_MEMGR8 :
864 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memgr8);
865 break;
866 case XC16X_OPERAND_MEMORY :
867 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
868 break;
869 case XC16X_OPERAND_PAG :
870 break;
871 case XC16X_OPERAND_PAGENUM :
872 length = extract_normal (cd, ex_info, insn_value, 0, 0, 25, 10, 32, total_length, pc, & fields->f_pagenum);
873 break;
874 case XC16X_OPERAND_POF :
875 break;
876 case XC16X_OPERAND_QBIT :
877 length = extract_normal (cd, ex_info, insn_value, 0, 0, 7, 4, 32, total_length, pc, & fields->f_qbit);
878 break;
879 case XC16X_OPERAND_QHIBIT :
880 length = extract_normal (cd, ex_info, insn_value, 0, 0, 27, 4, 32, total_length, pc, & fields->f_qhibit);
881 break;
882 case XC16X_OPERAND_QLOBIT :
883 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 4, 32, total_length, pc, & fields->f_qlobit);
884 break;
885 case XC16X_OPERAND_REG8 :
886 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
887 break;
888 case XC16X_OPERAND_REGB8 :
889 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regb8);
890 break;
891 case XC16X_OPERAND_REGBMEM8 :
892 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
893 break;
894 case XC16X_OPERAND_REGHI8 :
895 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_reghi8);
896 break;
897 case XC16X_OPERAND_REGMEM8 :
898 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regmem8);
899 break;
900 case XC16X_OPERAND_REGOFF8 :
901 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_regoff8);
902 break;
903 case XC16X_OPERAND_REL :
904 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 8, 32, total_length, pc, & fields->f_rel8);
905 break;
906 case XC16X_OPERAND_RELHI :
907 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 23, 8, 32, total_length, pc, & fields->f_relhi8);
908 break;
909 case XC16X_OPERAND_SEG :
910 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
911 break;
912 case XC16X_OPERAND_SEGHI8 :
913 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_segnum8);
914 break;
915 case XC16X_OPERAND_SEGM :
916 break;
917 case XC16X_OPERAND_SOF :
918 break;
919 case XC16X_OPERAND_SR :
920 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
921 break;
922 case XC16X_OPERAND_SR2 :
923 length = extract_normal (cd, ex_info, insn_value, 0, 0, 9, 2, 32, total_length, pc, & fields->f_r0);
924 break;
925 case XC16X_OPERAND_SRB :
926 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
927 break;
928 case XC16X_OPERAND_SRC1 :
929 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_r1);
930 break;
931 case XC16X_OPERAND_SRC2 :
932 length = extract_normal (cd, ex_info, insn_value, 0, 0, 11, 4, 32, total_length, pc, & fields->f_r2);
933 break;
934 case XC16X_OPERAND_SRDIV :
935 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_reg8);
936 break;
937 case XC16X_OPERAND_U4 :
938 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
939 break;
940 case XC16X_OPERAND_UIMM16 :
941 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
942 break;
943 case XC16X_OPERAND_UIMM2 :
944 length = extract_normal (cd, ex_info, insn_value, 0, 0, 13, 2, 32, total_length, pc, & fields->f_uimm2);
945 break;
946 case XC16X_OPERAND_UIMM3 :
947 length = extract_normal (cd, ex_info, insn_value, 0, 0, 10, 3, 32, total_length, pc, & fields->f_uimm3);
948 break;
949 case XC16X_OPERAND_UIMM4 :
950 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 4, 32, total_length, pc, & fields->f_uimm4);
951 break;
952 case XC16X_OPERAND_UIMM7 :
953 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 15, 7, 32, total_length, pc, & fields->f_uimm7);
954 break;
955 case XC16X_OPERAND_UIMM8 :
956 length = extract_normal (cd, ex_info, insn_value, 0, 0, 23, 8, 32, total_length, pc, & fields->f_uimm8);
957 break;
958 case XC16X_OPERAND_UPAG16 :
959 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_uimm16);
960 break;
961 case XC16X_OPERAND_UPOF16 :
962 length = extract_normal (cd, ex_info, insn_value, 0, 0, 31, 16, 32, total_length, pc, & fields->f_memory);
963 break;
964 case XC16X_OPERAND_USEG16 :
965 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
966 break;
967 case XC16X_OPERAND_USEG8 :
968 length = extract_normal (cd, ex_info, insn_value, 0, 0, 15, 8, 32, total_length, pc, & fields->f_seg8);
969 break;
970 case XC16X_OPERAND_USOF16 :
971 length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_RELOC)|(1<<CGEN_IFLD_ABS_ADDR), 0, 31, 16, 32, total_length, pc, & fields->f_offset16);
972 break;
973
974 default :
975 /* xgettext:c-format */
976 fprintf (stderr, _("Unrecognized field %d while decoding insn.\n"),
977 opindex);
978 abort ();
979 }
980
981 return length;
982 }
983
984 cgen_insert_fn * const xc16x_cgen_insert_handlers[] =
985 {
986 insert_insn_normal,
987 };
988
989 cgen_extract_fn * const xc16x_cgen_extract_handlers[] =
990 {
991 extract_insn_normal,
992 };
993
994 int xc16x_cgen_get_int_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
995 bfd_vma xc16x_cgen_get_vma_operand (CGEN_CPU_DESC, int, const CGEN_FIELDS *);
996
997 /* Getting values from cgen_fields is handled by a collection of functions.
998 They are distinguished by the type of the VALUE argument they return.
999 TODO: floating point, inlining support, remove cases where result type
1000 not appropriate. */
1001
1002 int
1003 xc16x_cgen_get_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1004 int opindex,
1005 const CGEN_FIELDS * fields)
1006 {
1007 int value;
1008
1009 switch (opindex)
1010 {
1011 case XC16X_OPERAND_REGNAM :
1012 value = fields->f_reg8;
1013 break;
1014 case XC16X_OPERAND_BIT01 :
1015 value = fields->f_op_1bit;
1016 break;
1017 case XC16X_OPERAND_BIT1 :
1018 value = fields->f_op_bit1;
1019 break;
1020 case XC16X_OPERAND_BIT2 :
1021 value = fields->f_op_bit2;
1022 break;
1023 case XC16X_OPERAND_BIT4 :
1024 value = fields->f_op_bit4;
1025 break;
1026 case XC16X_OPERAND_BIT8 :
1027 value = fields->f_op_bit8;
1028 break;
1029 case XC16X_OPERAND_BITONE :
1030 value = fields->f_op_onebit;
1031 break;
1032 case XC16X_OPERAND_CADDR :
1033 value = fields->f_offset16;
1034 break;
1035 case XC16X_OPERAND_COND :
1036 value = fields->f_condcode;
1037 break;
1038 case XC16X_OPERAND_DATA8 :
1039 value = fields->f_data8;
1040 break;
1041 case XC16X_OPERAND_DATAHI8 :
1042 value = fields->f_datahi8;
1043 break;
1044 case XC16X_OPERAND_DOT :
1045 value = 0;
1046 break;
1047 case XC16X_OPERAND_DR :
1048 value = fields->f_r1;
1049 break;
1050 case XC16X_OPERAND_DRB :
1051 value = fields->f_r1;
1052 break;
1053 case XC16X_OPERAND_DRI :
1054 value = fields->f_r4;
1055 break;
1056 case XC16X_OPERAND_EXTCOND :
1057 value = fields->f_extccode;
1058 break;
1059 case XC16X_OPERAND_GENREG :
1060 value = fields->f_regb8;
1061 break;
1062 case XC16X_OPERAND_HASH :
1063 value = 0;
1064 break;
1065 case XC16X_OPERAND_ICOND :
1066 value = fields->f_icondcode;
1067 break;
1068 case XC16X_OPERAND_LBIT2 :
1069 value = fields->f_op_lbit2;
1070 break;
1071 case XC16X_OPERAND_LBIT4 :
1072 value = fields->f_op_lbit4;
1073 break;
1074 case XC16X_OPERAND_MASK8 :
1075 value = fields->f_mask8;
1076 break;
1077 case XC16X_OPERAND_MASKLO8 :
1078 value = fields->f_datahi8;
1079 break;
1080 case XC16X_OPERAND_MEMGR8 :
1081 value = fields->f_memgr8;
1082 break;
1083 case XC16X_OPERAND_MEMORY :
1084 value = fields->f_memory;
1085 break;
1086 case XC16X_OPERAND_PAG :
1087 value = 0;
1088 break;
1089 case XC16X_OPERAND_PAGENUM :
1090 value = fields->f_pagenum;
1091 break;
1092 case XC16X_OPERAND_POF :
1093 value = 0;
1094 break;
1095 case XC16X_OPERAND_QBIT :
1096 value = fields->f_qbit;
1097 break;
1098 case XC16X_OPERAND_QHIBIT :
1099 value = fields->f_qhibit;
1100 break;
1101 case XC16X_OPERAND_QLOBIT :
1102 value = fields->f_qlobit;
1103 break;
1104 case XC16X_OPERAND_REG8 :
1105 value = fields->f_reg8;
1106 break;
1107 case XC16X_OPERAND_REGB8 :
1108 value = fields->f_regb8;
1109 break;
1110 case XC16X_OPERAND_REGBMEM8 :
1111 value = fields->f_regmem8;
1112 break;
1113 case XC16X_OPERAND_REGHI8 :
1114 value = fields->f_reghi8;
1115 break;
1116 case XC16X_OPERAND_REGMEM8 :
1117 value = fields->f_regmem8;
1118 break;
1119 case XC16X_OPERAND_REGOFF8 :
1120 value = fields->f_regoff8;
1121 break;
1122 case XC16X_OPERAND_REL :
1123 value = fields->f_rel8;
1124 break;
1125 case XC16X_OPERAND_RELHI :
1126 value = fields->f_relhi8;
1127 break;
1128 case XC16X_OPERAND_SEG :
1129 value = fields->f_seg8;
1130 break;
1131 case XC16X_OPERAND_SEGHI8 :
1132 value = fields->f_segnum8;
1133 break;
1134 case XC16X_OPERAND_SEGM :
1135 value = 0;
1136 break;
1137 case XC16X_OPERAND_SOF :
1138 value = 0;
1139 break;
1140 case XC16X_OPERAND_SR :
1141 value = fields->f_r2;
1142 break;
1143 case XC16X_OPERAND_SR2 :
1144 value = fields->f_r0;
1145 break;
1146 case XC16X_OPERAND_SRB :
1147 value = fields->f_r2;
1148 break;
1149 case XC16X_OPERAND_SRC1 :
1150 value = fields->f_r1;
1151 break;
1152 case XC16X_OPERAND_SRC2 :
1153 value = fields->f_r2;
1154 break;
1155 case XC16X_OPERAND_SRDIV :
1156 value = fields->f_reg8;
1157 break;
1158 case XC16X_OPERAND_U4 :
1159 value = fields->f_uimm4;
1160 break;
1161 case XC16X_OPERAND_UIMM16 :
1162 value = fields->f_uimm16;
1163 break;
1164 case XC16X_OPERAND_UIMM2 :
1165 value = fields->f_uimm2;
1166 break;
1167 case XC16X_OPERAND_UIMM3 :
1168 value = fields->f_uimm3;
1169 break;
1170 case XC16X_OPERAND_UIMM4 :
1171 value = fields->f_uimm4;
1172 break;
1173 case XC16X_OPERAND_UIMM7 :
1174 value = fields->f_uimm7;
1175 break;
1176 case XC16X_OPERAND_UIMM8 :
1177 value = fields->f_uimm8;
1178 break;
1179 case XC16X_OPERAND_UPAG16 :
1180 value = fields->f_uimm16;
1181 break;
1182 case XC16X_OPERAND_UPOF16 :
1183 value = fields->f_memory;
1184 break;
1185 case XC16X_OPERAND_USEG16 :
1186 value = fields->f_offset16;
1187 break;
1188 case XC16X_OPERAND_USEG8 :
1189 value = fields->f_seg8;
1190 break;
1191 case XC16X_OPERAND_USOF16 :
1192 value = fields->f_offset16;
1193 break;
1194
1195 default :
1196 /* xgettext:c-format */
1197 fprintf (stderr, _("Unrecognized field %d while getting int operand.\n"),
1198 opindex);
1199 abort ();
1200 }
1201
1202 return value;
1203 }
1204
1205 bfd_vma
1206 xc16x_cgen_get_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1207 int opindex,
1208 const CGEN_FIELDS * fields)
1209 {
1210 bfd_vma value;
1211
1212 switch (opindex)
1213 {
1214 case XC16X_OPERAND_REGNAM :
1215 value = fields->f_reg8;
1216 break;
1217 case XC16X_OPERAND_BIT01 :
1218 value = fields->f_op_1bit;
1219 break;
1220 case XC16X_OPERAND_BIT1 :
1221 value = fields->f_op_bit1;
1222 break;
1223 case XC16X_OPERAND_BIT2 :
1224 value = fields->f_op_bit2;
1225 break;
1226 case XC16X_OPERAND_BIT4 :
1227 value = fields->f_op_bit4;
1228 break;
1229 case XC16X_OPERAND_BIT8 :
1230 value = fields->f_op_bit8;
1231 break;
1232 case XC16X_OPERAND_BITONE :
1233 value = fields->f_op_onebit;
1234 break;
1235 case XC16X_OPERAND_CADDR :
1236 value = fields->f_offset16;
1237 break;
1238 case XC16X_OPERAND_COND :
1239 value = fields->f_condcode;
1240 break;
1241 case XC16X_OPERAND_DATA8 :
1242 value = fields->f_data8;
1243 break;
1244 case XC16X_OPERAND_DATAHI8 :
1245 value = fields->f_datahi8;
1246 break;
1247 case XC16X_OPERAND_DOT :
1248 value = 0;
1249 break;
1250 case XC16X_OPERAND_DR :
1251 value = fields->f_r1;
1252 break;
1253 case XC16X_OPERAND_DRB :
1254 value = fields->f_r1;
1255 break;
1256 case XC16X_OPERAND_DRI :
1257 value = fields->f_r4;
1258 break;
1259 case XC16X_OPERAND_EXTCOND :
1260 value = fields->f_extccode;
1261 break;
1262 case XC16X_OPERAND_GENREG :
1263 value = fields->f_regb8;
1264 break;
1265 case XC16X_OPERAND_HASH :
1266 value = 0;
1267 break;
1268 case XC16X_OPERAND_ICOND :
1269 value = fields->f_icondcode;
1270 break;
1271 case XC16X_OPERAND_LBIT2 :
1272 value = fields->f_op_lbit2;
1273 break;
1274 case XC16X_OPERAND_LBIT4 :
1275 value = fields->f_op_lbit4;
1276 break;
1277 case XC16X_OPERAND_MASK8 :
1278 value = fields->f_mask8;
1279 break;
1280 case XC16X_OPERAND_MASKLO8 :
1281 value = fields->f_datahi8;
1282 break;
1283 case XC16X_OPERAND_MEMGR8 :
1284 value = fields->f_memgr8;
1285 break;
1286 case XC16X_OPERAND_MEMORY :
1287 value = fields->f_memory;
1288 break;
1289 case XC16X_OPERAND_PAG :
1290 value = 0;
1291 break;
1292 case XC16X_OPERAND_PAGENUM :
1293 value = fields->f_pagenum;
1294 break;
1295 case XC16X_OPERAND_POF :
1296 value = 0;
1297 break;
1298 case XC16X_OPERAND_QBIT :
1299 value = fields->f_qbit;
1300 break;
1301 case XC16X_OPERAND_QHIBIT :
1302 value = fields->f_qhibit;
1303 break;
1304 case XC16X_OPERAND_QLOBIT :
1305 value = fields->f_qlobit;
1306 break;
1307 case XC16X_OPERAND_REG8 :
1308 value = fields->f_reg8;
1309 break;
1310 case XC16X_OPERAND_REGB8 :
1311 value = fields->f_regb8;
1312 break;
1313 case XC16X_OPERAND_REGBMEM8 :
1314 value = fields->f_regmem8;
1315 break;
1316 case XC16X_OPERAND_REGHI8 :
1317 value = fields->f_reghi8;
1318 break;
1319 case XC16X_OPERAND_REGMEM8 :
1320 value = fields->f_regmem8;
1321 break;
1322 case XC16X_OPERAND_REGOFF8 :
1323 value = fields->f_regoff8;
1324 break;
1325 case XC16X_OPERAND_REL :
1326 value = fields->f_rel8;
1327 break;
1328 case XC16X_OPERAND_RELHI :
1329 value = fields->f_relhi8;
1330 break;
1331 case XC16X_OPERAND_SEG :
1332 value = fields->f_seg8;
1333 break;
1334 case XC16X_OPERAND_SEGHI8 :
1335 value = fields->f_segnum8;
1336 break;
1337 case XC16X_OPERAND_SEGM :
1338 value = 0;
1339 break;
1340 case XC16X_OPERAND_SOF :
1341 value = 0;
1342 break;
1343 case XC16X_OPERAND_SR :
1344 value = fields->f_r2;
1345 break;
1346 case XC16X_OPERAND_SR2 :
1347 value = fields->f_r0;
1348 break;
1349 case XC16X_OPERAND_SRB :
1350 value = fields->f_r2;
1351 break;
1352 case XC16X_OPERAND_SRC1 :
1353 value = fields->f_r1;
1354 break;
1355 case XC16X_OPERAND_SRC2 :
1356 value = fields->f_r2;
1357 break;
1358 case XC16X_OPERAND_SRDIV :
1359 value = fields->f_reg8;
1360 break;
1361 case XC16X_OPERAND_U4 :
1362 value = fields->f_uimm4;
1363 break;
1364 case XC16X_OPERAND_UIMM16 :
1365 value = fields->f_uimm16;
1366 break;
1367 case XC16X_OPERAND_UIMM2 :
1368 value = fields->f_uimm2;
1369 break;
1370 case XC16X_OPERAND_UIMM3 :
1371 value = fields->f_uimm3;
1372 break;
1373 case XC16X_OPERAND_UIMM4 :
1374 value = fields->f_uimm4;
1375 break;
1376 case XC16X_OPERAND_UIMM7 :
1377 value = fields->f_uimm7;
1378 break;
1379 case XC16X_OPERAND_UIMM8 :
1380 value = fields->f_uimm8;
1381 break;
1382 case XC16X_OPERAND_UPAG16 :
1383 value = fields->f_uimm16;
1384 break;
1385 case XC16X_OPERAND_UPOF16 :
1386 value = fields->f_memory;
1387 break;
1388 case XC16X_OPERAND_USEG16 :
1389 value = fields->f_offset16;
1390 break;
1391 case XC16X_OPERAND_USEG8 :
1392 value = fields->f_seg8;
1393 break;
1394 case XC16X_OPERAND_USOF16 :
1395 value = fields->f_offset16;
1396 break;
1397
1398 default :
1399 /* xgettext:c-format */
1400 fprintf (stderr, _("Unrecognized field %d while getting vma operand.\n"),
1401 opindex);
1402 abort ();
1403 }
1404
1405 return value;
1406 }
1407
1408 void xc16x_cgen_set_int_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, int);
1409 void xc16x_cgen_set_vma_operand (CGEN_CPU_DESC, int, CGEN_FIELDS *, bfd_vma);
1410
1411 /* Stuffing values in cgen_fields is handled by a collection of functions.
1412 They are distinguished by the type of the VALUE argument they accept.
1413 TODO: floating point, inlining support, remove cases where argument type
1414 not appropriate. */
1415
1416 void
1417 xc16x_cgen_set_int_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1418 int opindex,
1419 CGEN_FIELDS * fields,
1420 int value)
1421 {
1422 switch (opindex)
1423 {
1424 case XC16X_OPERAND_REGNAM :
1425 fields->f_reg8 = value;
1426 break;
1427 case XC16X_OPERAND_BIT01 :
1428 fields->f_op_1bit = value;
1429 break;
1430 case XC16X_OPERAND_BIT1 :
1431 fields->f_op_bit1 = value;
1432 break;
1433 case XC16X_OPERAND_BIT2 :
1434 fields->f_op_bit2 = value;
1435 break;
1436 case XC16X_OPERAND_BIT4 :
1437 fields->f_op_bit4 = value;
1438 break;
1439 case XC16X_OPERAND_BIT8 :
1440 fields->f_op_bit8 = value;
1441 break;
1442 case XC16X_OPERAND_BITONE :
1443 fields->f_op_onebit = value;
1444 break;
1445 case XC16X_OPERAND_CADDR :
1446 fields->f_offset16 = value;
1447 break;
1448 case XC16X_OPERAND_COND :
1449 fields->f_condcode = value;
1450 break;
1451 case XC16X_OPERAND_DATA8 :
1452 fields->f_data8 = value;
1453 break;
1454 case XC16X_OPERAND_DATAHI8 :
1455 fields->f_datahi8 = value;
1456 break;
1457 case XC16X_OPERAND_DOT :
1458 break;
1459 case XC16X_OPERAND_DR :
1460 fields->f_r1 = value;
1461 break;
1462 case XC16X_OPERAND_DRB :
1463 fields->f_r1 = value;
1464 break;
1465 case XC16X_OPERAND_DRI :
1466 fields->f_r4 = value;
1467 break;
1468 case XC16X_OPERAND_EXTCOND :
1469 fields->f_extccode = value;
1470 break;
1471 case XC16X_OPERAND_GENREG :
1472 fields->f_regb8 = value;
1473 break;
1474 case XC16X_OPERAND_HASH :
1475 break;
1476 case XC16X_OPERAND_ICOND :
1477 fields->f_icondcode = value;
1478 break;
1479 case XC16X_OPERAND_LBIT2 :
1480 fields->f_op_lbit2 = value;
1481 break;
1482 case XC16X_OPERAND_LBIT4 :
1483 fields->f_op_lbit4 = value;
1484 break;
1485 case XC16X_OPERAND_MASK8 :
1486 fields->f_mask8 = value;
1487 break;
1488 case XC16X_OPERAND_MASKLO8 :
1489 fields->f_datahi8 = value;
1490 break;
1491 case XC16X_OPERAND_MEMGR8 :
1492 fields->f_memgr8 = value;
1493 break;
1494 case XC16X_OPERAND_MEMORY :
1495 fields->f_memory = value;
1496 break;
1497 case XC16X_OPERAND_PAG :
1498 break;
1499 case XC16X_OPERAND_PAGENUM :
1500 fields->f_pagenum = value;
1501 break;
1502 case XC16X_OPERAND_POF :
1503 break;
1504 case XC16X_OPERAND_QBIT :
1505 fields->f_qbit = value;
1506 break;
1507 case XC16X_OPERAND_QHIBIT :
1508 fields->f_qhibit = value;
1509 break;
1510 case XC16X_OPERAND_QLOBIT :
1511 fields->f_qlobit = value;
1512 break;
1513 case XC16X_OPERAND_REG8 :
1514 fields->f_reg8 = value;
1515 break;
1516 case XC16X_OPERAND_REGB8 :
1517 fields->f_regb8 = value;
1518 break;
1519 case XC16X_OPERAND_REGBMEM8 :
1520 fields->f_regmem8 = value;
1521 break;
1522 case XC16X_OPERAND_REGHI8 :
1523 fields->f_reghi8 = value;
1524 break;
1525 case XC16X_OPERAND_REGMEM8 :
1526 fields->f_regmem8 = value;
1527 break;
1528 case XC16X_OPERAND_REGOFF8 :
1529 fields->f_regoff8 = value;
1530 break;
1531 case XC16X_OPERAND_REL :
1532 fields->f_rel8 = value;
1533 break;
1534 case XC16X_OPERAND_RELHI :
1535 fields->f_relhi8 = value;
1536 break;
1537 case XC16X_OPERAND_SEG :
1538 fields->f_seg8 = value;
1539 break;
1540 case XC16X_OPERAND_SEGHI8 :
1541 fields->f_segnum8 = value;
1542 break;
1543 case XC16X_OPERAND_SEGM :
1544 break;
1545 case XC16X_OPERAND_SOF :
1546 break;
1547 case XC16X_OPERAND_SR :
1548 fields->f_r2 = value;
1549 break;
1550 case XC16X_OPERAND_SR2 :
1551 fields->f_r0 = value;
1552 break;
1553 case XC16X_OPERAND_SRB :
1554 fields->f_r2 = value;
1555 break;
1556 case XC16X_OPERAND_SRC1 :
1557 fields->f_r1 = value;
1558 break;
1559 case XC16X_OPERAND_SRC2 :
1560 fields->f_r2 = value;
1561 break;
1562 case XC16X_OPERAND_SRDIV :
1563 fields->f_reg8 = value;
1564 break;
1565 case XC16X_OPERAND_U4 :
1566 fields->f_uimm4 = value;
1567 break;
1568 case XC16X_OPERAND_UIMM16 :
1569 fields->f_uimm16 = value;
1570 break;
1571 case XC16X_OPERAND_UIMM2 :
1572 fields->f_uimm2 = value;
1573 break;
1574 case XC16X_OPERAND_UIMM3 :
1575 fields->f_uimm3 = value;
1576 break;
1577 case XC16X_OPERAND_UIMM4 :
1578 fields->f_uimm4 = value;
1579 break;
1580 case XC16X_OPERAND_UIMM7 :
1581 fields->f_uimm7 = value;
1582 break;
1583 case XC16X_OPERAND_UIMM8 :
1584 fields->f_uimm8 = value;
1585 break;
1586 case XC16X_OPERAND_UPAG16 :
1587 fields->f_uimm16 = value;
1588 break;
1589 case XC16X_OPERAND_UPOF16 :
1590 fields->f_memory = value;
1591 break;
1592 case XC16X_OPERAND_USEG16 :
1593 fields->f_offset16 = value;
1594 break;
1595 case XC16X_OPERAND_USEG8 :
1596 fields->f_seg8 = value;
1597 break;
1598 case XC16X_OPERAND_USOF16 :
1599 fields->f_offset16 = value;
1600 break;
1601
1602 default :
1603 /* xgettext:c-format */
1604 fprintf (stderr, _("Unrecognized field %d while setting int operand.\n"),
1605 opindex);
1606 abort ();
1607 }
1608 }
1609
1610 void
1611 xc16x_cgen_set_vma_operand (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
1612 int opindex,
1613 CGEN_FIELDS * fields,
1614 bfd_vma value)
1615 {
1616 switch (opindex)
1617 {
1618 case XC16X_OPERAND_REGNAM :
1619 fields->f_reg8 = value;
1620 break;
1621 case XC16X_OPERAND_BIT01 :
1622 fields->f_op_1bit = value;
1623 break;
1624 case XC16X_OPERAND_BIT1 :
1625 fields->f_op_bit1 = value;
1626 break;
1627 case XC16X_OPERAND_BIT2 :
1628 fields->f_op_bit2 = value;
1629 break;
1630 case XC16X_OPERAND_BIT4 :
1631 fields->f_op_bit4 = value;
1632 break;
1633 case XC16X_OPERAND_BIT8 :
1634 fields->f_op_bit8 = value;
1635 break;
1636 case XC16X_OPERAND_BITONE :
1637 fields->f_op_onebit = value;
1638 break;
1639 case XC16X_OPERAND_CADDR :
1640 fields->f_offset16 = value;
1641 break;
1642 case XC16X_OPERAND_COND :
1643 fields->f_condcode = value;
1644 break;
1645 case XC16X_OPERAND_DATA8 :
1646 fields->f_data8 = value;
1647 break;
1648 case XC16X_OPERAND_DATAHI8 :
1649 fields->f_datahi8 = value;
1650 break;
1651 case XC16X_OPERAND_DOT :
1652 break;
1653 case XC16X_OPERAND_DR :
1654 fields->f_r1 = value;
1655 break;
1656 case XC16X_OPERAND_DRB :
1657 fields->f_r1 = value;
1658 break;
1659 case XC16X_OPERAND_DRI :
1660 fields->f_r4 = value;
1661 break;
1662 case XC16X_OPERAND_EXTCOND :
1663 fields->f_extccode = value;
1664 break;
1665 case XC16X_OPERAND_GENREG :
1666 fields->f_regb8 = value;
1667 break;
1668 case XC16X_OPERAND_HASH :
1669 break;
1670 case XC16X_OPERAND_ICOND :
1671 fields->f_icondcode = value;
1672 break;
1673 case XC16X_OPERAND_LBIT2 :
1674 fields->f_op_lbit2 = value;
1675 break;
1676 case XC16X_OPERAND_LBIT4 :
1677 fields->f_op_lbit4 = value;
1678 break;
1679 case XC16X_OPERAND_MASK8 :
1680 fields->f_mask8 = value;
1681 break;
1682 case XC16X_OPERAND_MASKLO8 :
1683 fields->f_datahi8 = value;
1684 break;
1685 case XC16X_OPERAND_MEMGR8 :
1686 fields->f_memgr8 = value;
1687 break;
1688 case XC16X_OPERAND_MEMORY :
1689 fields->f_memory = value;
1690 break;
1691 case XC16X_OPERAND_PAG :
1692 break;
1693 case XC16X_OPERAND_PAGENUM :
1694 fields->f_pagenum = value;
1695 break;
1696 case XC16X_OPERAND_POF :
1697 break;
1698 case XC16X_OPERAND_QBIT :
1699 fields->f_qbit = value;
1700 break;
1701 case XC16X_OPERAND_QHIBIT :
1702 fields->f_qhibit = value;
1703 break;
1704 case XC16X_OPERAND_QLOBIT :
1705 fields->f_qlobit = value;
1706 break;
1707 case XC16X_OPERAND_REG8 :
1708 fields->f_reg8 = value;
1709 break;
1710 case XC16X_OPERAND_REGB8 :
1711 fields->f_regb8 = value;
1712 break;
1713 case XC16X_OPERAND_REGBMEM8 :
1714 fields->f_regmem8 = value;
1715 break;
1716 case XC16X_OPERAND_REGHI8 :
1717 fields->f_reghi8 = value;
1718 break;
1719 case XC16X_OPERAND_REGMEM8 :
1720 fields->f_regmem8 = value;
1721 break;
1722 case XC16X_OPERAND_REGOFF8 :
1723 fields->f_regoff8 = value;
1724 break;
1725 case XC16X_OPERAND_REL :
1726 fields->f_rel8 = value;
1727 break;
1728 case XC16X_OPERAND_RELHI :
1729 fields->f_relhi8 = value;
1730 break;
1731 case XC16X_OPERAND_SEG :
1732 fields->f_seg8 = value;
1733 break;
1734 case XC16X_OPERAND_SEGHI8 :
1735 fields->f_segnum8 = value;
1736 break;
1737 case XC16X_OPERAND_SEGM :
1738 break;
1739 case XC16X_OPERAND_SOF :
1740 break;
1741 case XC16X_OPERAND_SR :
1742 fields->f_r2 = value;
1743 break;
1744 case XC16X_OPERAND_SR2 :
1745 fields->f_r0 = value;
1746 break;
1747 case XC16X_OPERAND_SRB :
1748 fields->f_r2 = value;
1749 break;
1750 case XC16X_OPERAND_SRC1 :
1751 fields->f_r1 = value;
1752 break;
1753 case XC16X_OPERAND_SRC2 :
1754 fields->f_r2 = value;
1755 break;
1756 case XC16X_OPERAND_SRDIV :
1757 fields->f_reg8 = value;
1758 break;
1759 case XC16X_OPERAND_U4 :
1760 fields->f_uimm4 = value;
1761 break;
1762 case XC16X_OPERAND_UIMM16 :
1763 fields->f_uimm16 = value;
1764 break;
1765 case XC16X_OPERAND_UIMM2 :
1766 fields->f_uimm2 = value;
1767 break;
1768 case XC16X_OPERAND_UIMM3 :
1769 fields->f_uimm3 = value;
1770 break;
1771 case XC16X_OPERAND_UIMM4 :
1772 fields->f_uimm4 = value;
1773 break;
1774 case XC16X_OPERAND_UIMM7 :
1775 fields->f_uimm7 = value;
1776 break;
1777 case XC16X_OPERAND_UIMM8 :
1778 fields->f_uimm8 = value;
1779 break;
1780 case XC16X_OPERAND_UPAG16 :
1781 fields->f_uimm16 = value;
1782 break;
1783 case XC16X_OPERAND_UPOF16 :
1784 fields->f_memory = value;
1785 break;
1786 case XC16X_OPERAND_USEG16 :
1787 fields->f_offset16 = value;
1788 break;
1789 case XC16X_OPERAND_USEG8 :
1790 fields->f_seg8 = value;
1791 break;
1792 case XC16X_OPERAND_USOF16 :
1793 fields->f_offset16 = value;
1794 break;
1795
1796 default :
1797 /* xgettext:c-format */
1798 fprintf (stderr, _("Unrecognized field %d while setting vma operand.\n"),
1799 opindex);
1800 abort ();
1801 }
1802 }
1803
1804 /* Function to call before using the instruction builder tables. */
1805
1806 void
1807 xc16x_cgen_init_ibld_table (CGEN_CPU_DESC cd)
1808 {
1809 cd->insert_handlers = & xc16x_cgen_insert_handlers[0];
1810 cd->extract_handlers = & xc16x_cgen_extract_handlers[0];
1811
1812 cd->insert_operand = xc16x_cgen_insert_operand;
1813 cd->extract_operand = xc16x_cgen_extract_operand;
1814
1815 cd->get_int_operand = xc16x_cgen_get_int_operand;
1816 cd->set_int_operand = xc16x_cgen_set_int_operand;
1817 cd->get_vma_operand = xc16x_cgen_get_vma_operand;
1818 cd->set_vma_operand = xc16x_cgen_set_vma_operand;
1819 }
This page took 0.069793 seconds and 4 git commands to generate.