1 /* THIS FILE IS AUTOMAGICALLY GENERATED, DON'T EDIT IT */
13 #define ARG_IMM16 0x03
14 #define ARG_IMM32 0x04
16 #define ARG_IMMNMINUS1 0x05
17 #define ARG_IMM_1 0x06
18 #define ARG_IMM_2 0x07
19 #define ARG_DISP16 0x08
22 #define ARG_IMM1OR2 0x0b
23 #define ARG_DISP12 0x0b
24 #define ARG_DISP8 0x0c
25 #define ARG_IMM4M1 0x0d
26 #define CLASS_MASK 0x1fff0
31 #define CLASS_DISP 0x50
32 #define CLASS_IMM 0x60
34 #define CLASS_CTRL 0x80
35 #define CLASS_ADDRESS 0xd0
36 #define CLASS_0CCC 0xe0
37 #define CLASS_1CCC 0xf0
38 #define CLASS_0DISP7 0x100
39 #define CLASS_1DISP7 0x200
40 #define CLASS_01II 0x300
41 #define CLASS_00II 0x400
42 #define CLASS_BIT 0x500
43 #define CLASS_FLAGS 0x600
44 #define CLASS_IR 0x700
45 #define CLASS_DISP8 0x800
46 #define CLASS_BIT_1OR2 0x900
47 #define CLASS_REG 0x7000
48 #define CLASS_REG_BYTE 0x2000
49 #define CLASS_REG_WORD 0x3000
50 #define CLASS_REG_QUAD 0x4000
51 #define CLASS_REG_LONG 0x5000
52 #define CLASS_REGN0 0x8000
53 #define CLASS_PR 0x10000
145 #define OPC_outibr 91
152 #define OPC_resflg 98
174 #define OPC_setflg 120
177 #define OPC_sindb 123
178 #define OPC_sinib 124
179 #define OPC_sinibr 125
187 #define OPC_soutb 133
188 #define OPC_soutd 134
189 #define OPC_soutdb 135
190 #define OPC_soutib 136
191 #define OPC_soutibr 137
204 #define OPC_testb 150
205 #define OPC_testl 151
207 #define OPC_trdrb 153
209 #define OPC_trirb 155
210 #define OPC_trtdrb 156
211 #define OPC_trtib 157
212 #define OPC_trtirb 158
213 #define OPC_trtdb 159
215 #define OPC_tsetb 161
221 #define OPC_lddrb 167
226 #define OPC_ext0e 172
227 #define OPC_ext0f 172
228 #define OPC_ext8e 172
229 #define OPC_ext8f 172
230 #define OPC_rsvd36 172
231 #define OPC_rsvd38 172
232 #define OPC_rsvd78 172
233 #define OPC_rsvd7e 172
234 #define OPC_rsvd9d 172
235 #define OPC_rsvd9f 172
236 #define OPC_rsvdb9 172
237 #define OPC_rsvdbf 172
247 unsigned char opcode
;
249 unsigned int arg_info
[4];
250 unsigned int byte_info
[10];
256 opcode_entry_type z8k_table
[] = {
259 /* 1011 0101 ssss dddd *** adc rd,rs */
265 "adc",OPC_adc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
266 {CLASS_BIT
+0xb,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,0},
269 /* 1011 0100 ssss dddd *** adcb rbd,rbs */
275 "adcb",OPC_adcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
276 {CLASS_BIT
+0xb,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,1},
279 /* 0000 0001 ssN0 dddd *** add rd,@rs */
285 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
286 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,2},
289 /* 0100 0001 0000 dddd address_src *** add rd,address_src */
292 "add rd,address_src",16,9,
295 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
296 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,3},
299 /* 0100 0001 ssN0 dddd address_src *** add rd,address_src(rs) */
302 "add rd,address_src(rs)",16,10,
305 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
306 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,4},
309 /* 0000 0001 0000 dddd imm16 *** add rd,imm16 */
315 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
316 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,5},
319 /* 1000 0001 ssss dddd *** add rd,rs */
325 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
326 {CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,6},
329 /* 0000 0000 ssN0 dddd *** addb rbd,@rs */
335 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
336 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,7},
339 /* 0100 0000 0000 dddd address_src *** addb rbd,address_src */
342 "addb rbd,address_src",8,9,
345 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
346 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,8},
349 /* 0100 0000 ssN0 dddd address_src *** addb rbd,address_src(rs) */
352 "addb rbd,address_src(rs)",8,10,
355 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
356 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,9},
359 /* 0000 0000 0000 dddd imm8 imm8 *** addb rbd,imm8 */
365 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
366 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,10},
369 /* 1000 0000 ssss dddd *** addb rbd,rbs */
375 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
376 {CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,11},
379 /* 0001 0110 ssN0 dddd *** addl rrd,@rs */
382 "addl rrd,@rs",32,14,
385 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
386 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,12},
389 /* 0101 0110 0000 dddd address_src *** addl rrd,address_src */
392 "addl rrd,address_src",32,15,
395 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
396 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,13},
399 /* 0101 0110 ssN0 dddd address_src *** addl rrd,address_src(rs) */
402 "addl rrd,address_src(rs)",32,16,
405 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
406 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,14},
409 /* 0001 0110 0000 dddd imm32 *** addl rrd,imm32 */
412 "addl rrd,imm32",32,14,
415 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
416 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,15},
419 /* 1001 0110 ssss dddd *** addl rrd,rrs */
425 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
426 {CLASS_BIT
+9,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,16},
429 /* 0000 0111 ssN0 dddd *** and rd,@rs */
435 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
436 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,17},
439 /* 0100 0111 0000 dddd address_src *** and rd,address_src */
442 "and rd,address_src",16,9,
445 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
446 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,18},
449 /* 0100 0111 ssN0 dddd address_src *** and rd,address_src(rs) */
452 "and rd,address_src(rs)",16,10,
455 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
456 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,19},
459 /* 0000 0111 0000 dddd imm16 *** and rd,imm16 */
465 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
466 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,20},
469 /* 1000 0111 ssss dddd *** and rd,rs */
475 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
476 {CLASS_BIT
+8,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,21},
479 /* 0000 0110 ssN0 dddd *** andb rbd,@rs */
485 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
486 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,22},
489 /* 0100 0110 0000 dddd address_src *** andb rbd,address_src */
492 "andb rbd,address_src",8,9,
495 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
496 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,23},
499 /* 0100 0110 ssN0 dddd address_src *** andb rbd,address_src(rs) */
502 "andb rbd,address_src(rs)",8,10,
505 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
506 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,24},
509 /* 0000 0110 0000 dddd imm8 imm8 *** andb rbd,imm8 */
515 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
516 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,25},
519 /* 1000 0110 ssss dddd *** andb rbd,rbs */
525 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
526 {CLASS_BIT
+8,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,26},
529 /* 0010 0111 ddN0 imm4 *** bit @rd,imm4 */
535 "bit",OPC_bit
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
536 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,27},
539 /* 0110 0111 ddN0 imm4 address_dst *** bit address_dst(rd),imm4 */
542 "bit address_dst(rd),imm4",16,11,
545 "bit",OPC_bit
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
546 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,28},
549 /* 0110 0111 0000 imm4 address_dst *** bit address_dst,imm4 */
552 "bit address_dst,imm4",16,10,
555 "bit",OPC_bit
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
556 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,29},
559 /* 1010 0111 dddd imm4 *** bit rd,imm4 */
565 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
566 {CLASS_BIT
+0xa,CLASS_BIT
+7,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,30},
569 /* 0010 0111 0000 ssss 0000 dddd 0000 0000 *** bit rd,rs */
575 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
576 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,31},
579 /* 0010 0110 ddN0 imm4 *** bitb @rd,imm4 */
585 "bitb",OPC_bitb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
586 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,32},
589 /* 0110 0110 ddN0 imm4 address_dst *** bitb address_dst(rd),imm4 */
592 "bitb address_dst(rd),imm4",8,11,
595 "bitb",OPC_bitb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
596 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,33},
599 /* 0110 0110 0000 imm4 address_dst *** bitb address_dst,imm4 */
602 "bitb address_dst,imm4",8,10,
605 "bitb",OPC_bitb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
606 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,34},
609 /* 1010 0110 dddd imm4 *** bitb rbd,imm4 */
615 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
616 {CLASS_BIT
+0xa,CLASS_BIT
+6,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,35},
619 /* 0010 0110 0000 ssss 0000 dddd 0000 0000 *** bitb rbd,rs */
625 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
626 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,36},
629 /* 0011 0110 0000 0000 *** bpt */
636 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,37},
639 /* 0001 1111 ddN0 0000 *** call @rd */
645 "call",OPC_call
,0,{CLASS_IR
+(ARG_RD
),},
646 {CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,38},
649 /* 0101 1111 0000 0000 address_dst *** call address_dst */
652 "call address_dst",32,12,
655 "call",OPC_call
,0,{CLASS_DA
+(ARG_DST
),},
656 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,39},
659 /* 0101 1111 ddN0 0000 address_dst *** call address_dst(rd) */
662 "call address_dst(rd)",32,13,
665 "call",OPC_call
,0,{CLASS_X
+(ARG_RD
),},
666 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,40},
669 /* 1101 disp12 *** calr disp12 */
675 "calr",OPC_calr
,0,{CLASS_DISP
,},
676 {CLASS_BIT
+0xd,CLASS_DISP
+(ARG_DISP12
),0,0,0,0,0,0,0,},1,2,41},
679 /* 0000 1101 ddN0 1000 *** clr @rd */
685 "clr",OPC_clr
,0,{CLASS_IR
+(ARG_RD
),},
686 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,42},
689 /* 0100 1101 0000 1000 address_dst *** clr address_dst */
692 "clr address_dst",16,11,
695 "clr",OPC_clr
,0,{CLASS_DA
+(ARG_DST
),},
696 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,43},
699 /* 0100 1101 ddN0 1000 address_dst *** clr address_dst(rd) */
702 "clr address_dst(rd)",16,12,
705 "clr",OPC_clr
,0,{CLASS_X
+(ARG_RD
),},
706 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,44},
709 /* 1000 1101 dddd 1000 *** clr rd */
715 "clr",OPC_clr
,0,{CLASS_REG_WORD
+(ARG_RD
),},
716 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,45},
719 /* 0000 1100 ddN0 1000 *** clrb @rd */
725 "clrb",OPC_clrb
,0,{CLASS_IR
+(ARG_RD
),},
726 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,46},
729 /* 0100 1100 0000 1000 address_dst *** clrb address_dst */
732 "clrb address_dst",8,11,
735 "clrb",OPC_clrb
,0,{CLASS_DA
+(ARG_DST
),},
736 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,47},
739 /* 0100 1100 ddN0 1000 address_dst *** clrb address_dst(rd) */
742 "clrb address_dst(rd)",8,12,
745 "clrb",OPC_clrb
,0,{CLASS_X
+(ARG_RD
),},
746 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,48},
749 /* 1000 1100 dddd 1000 *** clrb rbd */
755 "clrb",OPC_clrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
756 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,49},
759 /* 0000 1101 ddN0 0000 *** com @rd */
765 "com",OPC_com
,0,{CLASS_IR
+(ARG_RD
),},
766 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,50},
769 /* 0100 1101 0000 0000 address_dst *** com address_dst */
772 "com address_dst",16,15,
775 "com",OPC_com
,0,{CLASS_DA
+(ARG_DST
),},
776 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,51},
779 /* 0100 1101 ddN0 0000 address_dst *** com address_dst(rd) */
782 "com address_dst(rd)",16,16,
785 "com",OPC_com
,0,{CLASS_X
+(ARG_RD
),},
786 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,52},
789 /* 1000 1101 dddd 0000 *** com rd */
795 "com",OPC_com
,0,{CLASS_REG_WORD
+(ARG_RD
),},
796 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,53},
799 /* 0000 1100 ddN0 0000 *** comb @rd */
805 "comb",OPC_comb
,0,{CLASS_IR
+(ARG_RD
),},
806 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,54},
809 /* 0100 1100 0000 0000 address_dst *** comb address_dst */
812 "comb address_dst",8,15,
815 "comb",OPC_comb
,0,{CLASS_DA
+(ARG_DST
),},
816 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,55},
819 /* 0100 1100 ddN0 0000 address_dst *** comb address_dst(rd) */
822 "comb address_dst(rd)",8,16,
825 "comb",OPC_comb
,0,{CLASS_X
+(ARG_RD
),},
826 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,56},
829 /* 1000 1100 dddd 0000 *** comb rbd */
835 "comb",OPC_comb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
836 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,57},
839 /* 1000 1101 flags 0101 *** comflg flags */
845 "comflg",OPC_comflg
,0,{CLASS_FLAGS
,},
846 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+5,0,0,0,0,0,},1,2,58},
849 /* 0000 1101 ddN0 0001 imm16 *** cp @rd,imm16 */
852 "cp @rd,imm16",16,11,
855 "cp",OPC_cp
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
856 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,59},
859 /* 0100 1101 ddN0 0001 address_dst imm16 *** cp address_dst(rd),imm16 */
862 "cp address_dst(rd),imm16",16,15,
865 "cp",OPC_cp
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
866 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,60},
869 /* 0100 1101 0000 0001 address_dst imm16 *** cp address_dst,imm16 */
872 "cp address_dst,imm16",16,14,
875 "cp",OPC_cp
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
876 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,61},
879 /* 0000 1011 ssN0 dddd *** cp rd,@rs */
885 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
886 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,62},
889 /* 0100 1011 0000 dddd address_src *** cp rd,address_src */
892 "cp rd,address_src",16,9,
895 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
896 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,63},
899 /* 0100 1011 ssN0 dddd address_src *** cp rd,address_src(rs) */
902 "cp rd,address_src(rs)",16,10,
905 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
906 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,64},
909 /* 0000 1011 0000 dddd imm16 *** cp rd,imm16 */
915 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
916 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,65},
919 /* 1000 1011 ssss dddd *** cp rd,rs */
925 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
926 {CLASS_BIT
+8,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,66},
929 /* 0000 1100 ddN0 0001 imm8 imm8 *** cpb @rd,imm8 */
935 "cpb",OPC_cpb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
936 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,67},
939 /* 0100 1100 ddN0 0001 address_dst imm8 imm8 *** cpb address_dst(rd),imm8 */
942 "cpb address_dst(rd),imm8",8,15,
945 "cpb",OPC_cpb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
946 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,68},
949 /* 0100 1100 0000 0001 address_dst imm8 imm8 *** cpb address_dst,imm8 */
952 "cpb address_dst,imm8",8,14,
955 "cpb",OPC_cpb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
956 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,69},
959 /* 0000 1010 ssN0 dddd *** cpb rbd,@rs */
965 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
966 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,70},
969 /* 0100 1010 0000 dddd address_src *** cpb rbd,address_src */
972 "cpb rbd,address_src",8,9,
975 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
976 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,71},
979 /* 0100 1010 ssN0 dddd address_src *** cpb rbd,address_src(rs) */
982 "cpb rbd,address_src(rs)",8,10,
985 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
986 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,72},
989 /* 0000 1010 0000 dddd imm8 imm8 *** cpb rbd,imm8 */
995 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
996 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,73},
999 /* 1000 1010 ssss dddd *** cpb rbd,rbs */
1005 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1006 {CLASS_BIT
+8,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,74},
1009 /* 1011 1011 ssN0 1000 0000 rrrr dddd cccc *** cpd rd,@rs,rr,cc */
1012 "cpd rd,@rs,rr,cc",16,11,
1015 "cpd",OPC_cpd
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1016 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,75},
1019 /* 1011 1010 ssN0 1000 0000 rrrr dddd cccc *** cpdb rbd,@rs,rr,cc */
1022 "cpdb rbd,@rs,rr,cc",8,11,
1025 "cpdb",OPC_cpdb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1026 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,76},
1029 /* 1011 1011 ssN0 1100 0000 rrrr dddd cccc *** cpdr rd,@rs,rr,cc */
1032 "cpdr rd,@rs,rr,cc",16,11,
1035 "cpdr",OPC_cpdr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1036 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,77},
1039 /* 1011 1010 ssN0 1100 0000 rrrr dddd cccc *** cpdrb rbd,@rs,rr,cc */
1042 "cpdrb rbd,@rs,rr,cc",8,11,
1045 "cpdrb",OPC_cpdrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1046 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,78},
1049 /* 1011 1011 ssN0 0000 0000 rrrr dddd cccc *** cpi rd,@rs,rr,cc */
1052 "cpi rd,@rs,rr,cc",16,11,
1055 "cpi",OPC_cpi
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1056 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,79},
1059 /* 1011 1010 ssN0 0000 0000 rrrr dddd cccc *** cpib rbd,@rs,rr,cc */
1062 "cpib rbd,@rs,rr,cc",8,11,
1065 "cpib",OPC_cpib
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1066 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,80},
1069 /* 1011 1011 ssN0 0100 0000 rrrr dddd cccc *** cpir rd,@rs,rr,cc */
1072 "cpir rd,@rs,rr,cc",16,11,
1075 "cpir",OPC_cpir
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1076 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,81},
1079 /* 1011 1010 ssN0 0100 0000 rrrr dddd cccc *** cpirb rbd,@rs,rr,cc */
1082 "cpirb rbd,@rs,rr,cc",8,11,
1085 "cpirb",OPC_cpirb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1086 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,82},
1089 /* 0001 0000 ssN0 dddd *** cpl rrd,@rs */
1092 "cpl rrd,@rs",32,14,
1095 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1096 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,83},
1099 /* 0101 0000 0000 dddd address_src *** cpl rrd,address_src */
1102 "cpl rrd,address_src",32,15,
1105 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1106 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,84},
1109 /* 0101 0000 ssN0 dddd address_src *** cpl rrd,address_src(rs) */
1112 "cpl rrd,address_src(rs)",32,16,
1115 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1116 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,85},
1119 /* 0001 0000 0000 dddd imm32 *** cpl rrd,imm32 */
1122 "cpl rrd,imm32",32,14,
1125 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1126 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,86},
1129 /* 1001 0000 ssss dddd *** cpl rrd,rrs */
1135 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1136 {CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,87},
1139 /* 1011 1011 ssN0 1010 0000 rrrr ddN0 cccc *** cpsd @rd,@rs,rr,cc */
1142 "cpsd @rd,@rs,rr,cc",16,11,
1145 "cpsd",OPC_cpsd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1146 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,88},
1149 /* 1011 1010 ssN0 1010 0000 rrrr ddN0 cccc *** cpsdb @rd,@rs,rr,cc */
1152 "cpsdb @rd,@rs,rr,cc",8,11,
1155 "cpsdb",OPC_cpsdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1156 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,89},
1159 /* 1011 1011 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdr @rd,@rs,rr,cc */
1162 "cpsdr @rd,@rs,rr,cc",16,11,
1165 "cpsdr",OPC_cpsdr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1166 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,90},
1169 /* 1011 1010 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdrb @rd,@rs,rr,cc */
1172 "cpsdrb @rd,@rs,rr,cc",8,11,
1175 "cpsdrb",OPC_cpsdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1176 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,91},
1179 /* 1011 1011 ssN0 0010 0000 rrrr ddN0 cccc *** cpsi @rd,@rs,rr,cc */
1182 "cpsi @rd,@rs,rr,cc",16,11,
1185 "cpsi",OPC_cpsi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1186 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,92},
1189 /* 1011 1010 ssN0 0010 0000 rrrr ddN0 cccc *** cpsib @rd,@rs,rr,cc */
1192 "cpsib @rd,@rs,rr,cc",8,11,
1195 "cpsib",OPC_cpsib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1196 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,93},
1199 /* 1011 1011 ssN0 0110 0000 rrrr ddN0 cccc *** cpsir @rd,@rs,rr,cc */
1202 "cpsir @rd,@rs,rr,cc",16,11,
1205 "cpsir",OPC_cpsir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1206 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,94},
1209 /* 1011 1010 ssN0 0110 0000 rrrr ddN0 cccc *** cpsirb @rd,@rs,rr,cc */
1212 "cpsirb @rd,@rs,rr,cc",8,11,
1215 "cpsirb",OPC_cpsirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1216 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,95},
1219 /* 1011 0000 dddd 0000 *** dab rbd */
1225 "dab",OPC_dab
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
1226 {CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,96},
1229 /* 1111 dddd 0disp7 *** dbjnz rbd,disp7 */
1232 "dbjnz rbd,disp7",16,11,
1235 "dbjnz",OPC_dbjnz
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
1236 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_0DISP7
,0,0,0,0,0,0,},2,2,97},
1239 /* 0010 1011 ddN0 imm4m1 *** dec @rd,imm4m1 */
1242 "dec @rd,imm4m1",16,11,
1245 "dec",OPC_dec
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1246 {CLASS_BIT
+2,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,98},
1249 /* 0110 1011 ddN0 imm4m1 address_dst *** dec address_dst(rd),imm4m1 */
1252 "dec address_dst(rd),imm4m1",16,14,
1255 "dec",OPC_dec
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1256 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,99},
1259 /* 0110 1011 0000 imm4m1 address_dst *** dec address_dst,imm4m1 */
1262 "dec address_dst,imm4m1",16,13,
1265 "dec",OPC_dec
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1266 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,100},
1269 /* 1010 1011 dddd imm4m1 *** dec rd,imm4m1 */
1272 "dec rd,imm4m1",16,4,
1275 "dec",OPC_dec
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1276 {CLASS_BIT
+0xa,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,101},
1279 /* 0010 1010 ddN0 imm4m1 *** decb @rd,imm4m1 */
1282 "decb @rd,imm4m1",8,11,
1285 "decb",OPC_decb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1286 {CLASS_BIT
+2,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,102},
1289 /* 0110 1010 ddN0 imm4m1 address_dst *** decb address_dst(rd),imm4m1 */
1292 "decb address_dst(rd),imm4m1",8,14,
1295 "decb",OPC_decb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1296 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,103},
1299 /* 0110 1010 0000 imm4m1 address_dst *** decb address_dst,imm4m1 */
1302 "decb address_dst,imm4m1",8,13,
1305 "decb",OPC_decb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1306 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,104},
1309 /* 1010 1010 dddd imm4m1 *** decb rbd,imm4m1 */
1312 "decb rbd,imm4m1",8,4,
1315 "decb",OPC_decb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1316 {CLASS_BIT
+0xa,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,105},
1319 /* 0111 1100 0000 00ii *** di i2 */
1325 "di",OPC_di
,0,{CLASS_IMM
+(ARG_IMM2
),},
1326 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_00II
,0,0,0,0,0,},1,2,106},
1329 /* 0001 1011 ssN0 dddd *** div rrd,@rs */
1332 "div rrd,@rs",16,107,
1335 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1336 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,107},
1339 /* 0101 1011 0000 dddd address_src *** div rrd,address_src */
1342 "div rrd,address_src",16,107,
1345 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1346 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,108},
1349 /* 0101 1011 ssN0 dddd address_src *** div rrd,address_src(rs) */
1352 "div rrd,address_src(rs)",16,107,
1355 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1356 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,109},
1359 /* 0001 1011 0000 dddd imm16 *** div rrd,imm16 */
1362 "div rrd,imm16",16,107,
1365 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1366 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,110},
1369 /* 1001 1011 ssss dddd *** div rrd,rs */
1372 "div rrd,rs",16,107,
1375 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1376 {CLASS_BIT
+9,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,111},
1379 /* 0001 1010 ssN0 dddd *** divl rqd,@rs */
1382 "divl rqd,@rs",32,744,
1385 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1386 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,112},
1389 /* 0101 1010 0000 dddd address_src *** divl rqd,address_src */
1392 "divl rqd,address_src",32,745,
1395 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1396 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,113},
1399 /* 0101 1010 ssN0 dddd address_src *** divl rqd,address_src(rs) */
1402 "divl rqd,address_src(rs)",32,746,
1405 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1406 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,114},
1409 /* 0001 1010 0000 dddd imm32 *** divl rqd,imm32 */
1412 "divl rqd,imm32",32,744,
1415 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1416 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,115},
1419 /* 1001 1010 ssss dddd *** divl rqd,rrs */
1422 "divl rqd,rrs",32,744,
1425 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1426 {CLASS_BIT
+9,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,116},
1429 /* 1111 dddd 1disp7 *** djnz rd,disp7 */
1432 "djnz rd,disp7",16,11,
1435 "djnz",OPC_djnz
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
1436 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_1DISP7
,0,0,0,0,0,0,},2,2,117},
1439 /* 0111 1100 0000 01ii *** ei i2 */
1445 "ei",OPC_ei
,0,{CLASS_IMM
+(ARG_IMM2
),},
1446 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_01II
,0,0,0,0,0,},1,2,118},
1449 /* 0010 1101 ssN0 dddd *** ex rd,@rs */
1455 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1456 {CLASS_BIT
+2,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,119},
1459 /* 0110 1101 0000 dddd address_src *** ex rd,address_src */
1462 "ex rd,address_src",16,15,
1465 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1466 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,120},
1469 /* 0110 1101 ssN0 dddd address_src *** ex rd,address_src(rs) */
1472 "ex rd,address_src(rs)",16,16,
1475 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1476 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,121},
1479 /* 1010 1101 ssss dddd *** ex rd,rs */
1485 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1486 {CLASS_BIT
+0xa,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,122},
1489 /* 0010 1100 ssN0 dddd *** exb rbd,@rs */
1495 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1496 {CLASS_BIT
+2,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,123},
1499 /* 0110 1100 0000 dddd address_src *** exb rbd,address_src */
1502 "exb rbd,address_src",8,15,
1505 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1506 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,124},
1509 /* 0110 1100 ssN0 dddd address_src *** exb rbd,address_src(rs) */
1512 "exb rbd,address_src(rs)",8,16,
1515 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1516 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,125},
1519 /* 1010 1100 ssss dddd *** exb rbd,rbs */
1525 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1526 {CLASS_BIT
+0xa,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,126},
1529 /* 0000 1110 imm8 *** ext0e imm8 */
1535 "ext0e",OPC_ext0e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1536 {CLASS_BIT
+0,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,127},
1539 /* 0000 1111 imm8 *** ext0f imm8 */
1545 "ext0f",OPC_ext0f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1546 {CLASS_BIT
+0,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,128},
1549 /* 1000 1110 imm8 *** ext8e imm8 */
1555 "ext8e",OPC_ext8e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1556 {CLASS_BIT
+8,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,129},
1559 /* 1000 1111 imm8 *** ext8f imm8 */
1565 "ext8f",OPC_ext8f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1566 {CLASS_BIT
+8,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,130},
1569 /* 1011 0001 dddd 1010 *** exts rrd */
1575 "exts",OPC_exts
,0,{CLASS_REG_LONG
+(ARG_RD
),},
1576 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xa,0,0,0,0,0,},1,2,131},
1579 /* 1011 0001 dddd 0000 *** extsb rd */
1585 "extsb",OPC_extsb
,0,{CLASS_REG_WORD
+(ARG_RD
),},
1586 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,132},
1589 /* 1011 0001 dddd 0111 *** extsl rqd */
1595 "extsl",OPC_extsl
,0,{CLASS_REG_QUAD
+(ARG_RD
),},
1596 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,0,0,0,0,0,},1,2,133},
1599 /* 0111 1010 0000 0000 *** halt */
1605 "halt",OPC_halt
,0,{0},
1606 {CLASS_BIT
+7,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,134},
1609 /* 0011 1101 ssN0 dddd *** in rd,@rs */
1615 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1616 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,135},
1619 /* 0011 1101 dddd 0100 imm16 *** in rd,imm16 */
1622 "in rd,imm16",16,12,
1625 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1626 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,136},
1629 /* 0011 1100 ssN0 dddd *** inb rbd,@rs */
1635 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1636 {CLASS_BIT
+3,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,137},
1639 /* 0011 1010 dddd 0100 imm16 *** inb rbd,imm16 */
1642 "inb rbd,imm16",8,10,
1645 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1646 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,138},
1649 /* 0010 1001 ddN0 imm4m1 *** inc @rd,imm4m1 */
1652 "inc @rd,imm4m1",16,11,
1655 "inc",OPC_inc
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1656 {CLASS_BIT
+2,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,139},
1659 /* 0110 1001 ddN0 imm4m1 address_dst *** inc address_dst(rd),imm4m1 */
1662 "inc address_dst(rd),imm4m1",16,14,
1665 "inc",OPC_inc
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1666 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,140},
1669 /* 0110 1001 0000 imm4m1 address_dst *** inc address_dst,imm4m1 */
1672 "inc address_dst,imm4m1",16,13,
1675 "inc",OPC_inc
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1676 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,141},
1679 /* 1010 1001 dddd imm4m1 *** inc rd,imm4m1 */
1682 "inc rd,imm4m1",16,4,
1685 "inc",OPC_inc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1686 {CLASS_BIT
+0xa,CLASS_BIT
+9,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,142},
1689 /* 0010 1000 ddN0 imm4m1 *** incb @rd,imm4m1 */
1692 "incb @rd,imm4m1",8,11,
1695 "incb",OPC_incb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1696 {CLASS_BIT
+2,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,143},
1699 /* 0110 1000 ddN0 imm4m1 address_dst *** incb address_dst(rd),imm4m1 */
1702 "incb address_dst(rd),imm4m1",8,14,
1705 "incb",OPC_incb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1706 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,144},
1709 /* 0110 1000 0000 imm4m1 address_dst *** incb address_dst,imm4m1 */
1712 "incb address_dst,imm4m1",8,13,
1715 "incb",OPC_incb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1716 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,145},
1719 /* 1010 1000 dddd imm4m1 *** incb rbd,imm4m1 */
1722 "incb rbd,imm4m1",8,4,
1725 "incb",OPC_incb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1726 {CLASS_BIT
+0xa,CLASS_BIT
+8,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,146},
1729 /* 0011 1011 ssN0 1000 0000 aaaa ddN0 1000 *** ind @rd,@rs,ra */
1732 "ind @rd,@rs,ra",16,21,
1735 "ind",OPC_ind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1736 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,147},
1739 /* 0011 1010 ssN0 1000 0000 aaaa ddN0 1000 *** indb @rd,@rs,rba */
1742 "indb @rd,@rs,rba",8,21,
1745 "indb",OPC_indb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
1746 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,148},
1749 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 1000 *** inib @rd,@rs,ra */
1752 "inib @rd,@rs,ra",8,21,
1755 "inib",OPC_inib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1756 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,149},
1759 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 0000 *** inibr @rd,@rs,ra */
1762 "inibr @rd,@rs,ra",16,21,
1765 "inibr",OPC_inibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1766 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,150},
1769 /* 0111 1011 0000 0000 *** iret */
1775 "iret",OPC_iret
,0,{0},
1776 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,151},
1779 /* 0001 1110 ddN0 cccc *** jp cc,@rd */
1785 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_IR
+(ARG_RD
),},
1786 {CLASS_BIT
+1,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,152},
1789 /* 0101 1110 0000 cccc address_dst *** jp cc,address_dst */
1792 "jp cc,address_dst",16,7,
1795 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_DA
+(ARG_DST
),},
1796 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,153},
1799 /* 0101 1110 ddN0 cccc address_dst *** jp cc,address_dst(rd) */
1802 "jp cc,address_dst(rd)",16,8,
1805 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_X
+(ARG_RD
),},
1806 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,154},
1809 /* 1110 cccc disp8 *** jr cc,disp8 */
1815 "jr",OPC_jr
,0,{CLASS_CC
,CLASS_DISP
,},
1816 {CLASS_BIT
+0xe,CLASS_CC
,CLASS_DISP8
,0,0,0,0,0,0,},2,2,155},
1819 /* 0000 1101 ddN0 0101 imm16 *** ld @rd,imm16 */
1822 "ld @rd,imm16",16,7,
1825 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1826 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,156},
1829 /* 0010 1111 ddN0 ssss *** ld @rd,rs */
1835 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1836 {CLASS_BIT
+2,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,157},
1839 /* 0100 1101 ddN0 0101 address_dst imm16 *** ld address_dst(rd),imm16 */
1842 "ld address_dst(rd),imm16",16,15,
1845 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1846 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,158},
1849 /* 0110 1111 ddN0 ssss address_dst *** ld address_dst(rd),rs */
1852 "ld address_dst(rd),rs",16,12,
1855 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1856 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,159},
1859 /* 0100 1101 0000 0101 address_dst imm16 *** ld address_dst,imm16 */
1862 "ld address_dst,imm16",16,14,
1865 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
1866 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,160},
1869 /* 0110 1111 0000 ssss address_dst *** ld address_dst,rs */
1872 "ld address_dst,rs",16,11,
1875 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),},
1876 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,161},
1879 /* 0011 0011 ddN0 ssss imm16 *** ld rd(imm16),rs */
1882 "ld rd(imm16),rs",16,14,
1885 "ld",OPC_ld
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1886 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,162},
1889 /* 0111 0011 ddN0 ssss 0000 xxxx 0000 0000 *** ld rd(rx),rs */
1892 "ld rd(rx),rs",16,14,
1895 "ld",OPC_ld
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1896 {CLASS_BIT
+7,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,163},
1899 /* 0010 0001 ssN0 dddd *** ld rd,@rs */
1905 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1906 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,164},
1909 /* 0110 0001 0000 dddd address_src *** ld rd,address_src */
1912 "ld rd,address_src",16,9,
1915 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1916 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,165},
1919 /* 0110 0001 ssN0 dddd address_src *** ld rd,address_src(rs) */
1922 "ld rd,address_src(rs)",16,10,
1925 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1926 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,166},
1929 /* 0010 0001 0000 dddd imm16 *** ld rd,imm16 */
1935 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1936 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,167},
1939 /* 1010 0001 ssss dddd *** ld rd,rs */
1945 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1946 {CLASS_BIT
+0xa,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,168},
1949 /* 0011 0001 ssN0 dddd imm16 *** ld rd,rs(imm16) */
1952 "ld rd,rs(imm16)",16,14,
1955 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1956 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,169},
1959 /* 0111 0001 ssN0 dddd 0000 xxxx 0000 0000 *** ld rd,rs(rx) */
1962 "ld rd,rs(rx)",16,14,
1965 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1966 {CLASS_BIT
+7,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,170},
1969 /* 0111 0110 0000 dddd address_src *** lda prd,address_src */
1972 "lda prd,address_src",16,12,
1975 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1976 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,171},
1979 /* 0111 0110 ssN0 dddd address_src *** lda prd,address_src(rs) */
1982 "lda prd,address_src(rs)",16,13,
1985 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1986 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,172},
1989 /* 0011 0100 ssN0 dddd imm16 *** lda prd,rs(imm16) */
1992 "lda prd,rs(imm16)",16,15,
1995 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1996 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,173},
1999 /* 0111 0100 ssN0 dddd 0000 xxxx 0000 0000 *** lda prd,rs(rx) */
2002 "lda prd,rs(rx)",16,15,
2005 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2006 {CLASS_BIT
+7,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,174},
2009 /* 0011 0100 0000 dddd disp16 *** ldar prd,disp16 */
2012 "ldar prd,disp16",16,15,
2015 "ldar",OPC_ldar
,0,{CLASS_PR
+(ARG_RD
),CLASS_DISP
,},
2016 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,175},
2019 /* 0000 1100 ddN0 0101 imm8 imm8 *** ldb @rd,imm8 */
2025 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2026 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,176},
2029 /* 0010 1110 ddN0 ssss *** ldb @rd,rbs */
2035 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2036 {CLASS_BIT
+2,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,177},
2039 /* 0100 1100 ddN0 0101 address_dst imm8 imm8 *** ldb address_dst(rd),imm8 */
2042 "ldb address_dst(rd),imm8",8,15,
2045 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2046 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,178},
2049 /* 0110 1110 ddN0 ssss address_dst *** ldb address_dst(rd),rbs */
2052 "ldb address_dst(rd),rbs",8,12,
2055 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2056 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,179},
2059 /* 0100 1100 0000 0101 address_dst imm8 imm8 *** ldb address_dst,imm8 */
2062 "ldb address_dst,imm8",8,14,
2065 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
2066 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,180},
2069 /* 0110 1110 0000 ssss address_dst *** ldb address_dst,rbs */
2072 "ldb address_dst,rbs",8,11,
2075 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_BYTE
+(ARG_RS
),},
2076 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,181},
2079 /* 0010 0000 ssN0 dddd *** ldb rbd,@rs */
2085 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2086 {CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,182},
2089 /* 0110 0000 0000 dddd address_src *** ldb rbd,address_src */
2092 "ldb rbd,address_src",8,9,
2095 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2096 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,183},
2099 /* 0110 0000 ssN0 dddd address_src *** ldb rbd,address_src(rs) */
2102 "ldb rbd,address_src(rs)",8,10,
2105 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2106 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,184},
2109 /* 1100 dddd imm8 *** ldb rbd,imm8 */
2115 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2116 {CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},2,2,185},
2119 /* 1010 0000 ssss dddd *** ldb rbd,rbs */
2125 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2126 {CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,186},
2129 /* 0011 0000 ssN0 dddd imm16 *** ldb rbd,rs(imm16) */
2132 "ldb rbd,rs(imm16)",8,14,
2135 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2136 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,187},
2139 /* 0111 0000 ssN0 dddd 0000 xxxx 0000 0000 *** ldb rbd,rs(rx) */
2142 "ldb rbd,rs(rx)",8,14,
2145 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2146 {CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,188},
2149 /* 0011 0010 ddN0 ssss imm16 *** ldb rd(imm16),rbs */
2152 "ldb rd(imm16),rbs",8,14,
2155 "ldb",OPC_ldb
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2156 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,189},
2159 /* 0111 0010 ddN0 ssss 0000 xxxx 0000 0000 *** ldb rd(rx),rbs */
2162 "ldb rd(rx),rbs",8,14,
2165 "ldb",OPC_ldb
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2166 {CLASS_BIT
+7,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,190},
2169 /* 0111 1101 ssss 1ccc *** ldctl ctrl,rs */
2172 "ldctl ctrl,rs",32,7,
2175 "ldctl",OPC_ldctl
,0,{CLASS_CTRL
,CLASS_REG_WORD
+(ARG_RS
),},
2176 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_1CCC
,0,0,0,0,0,},2,2,191},
2179 /* 0111 1101 dddd 0ccc *** ldctl rd,ctrl */
2182 "ldctl rd,ctrl",32,7,
2185 "ldctl",OPC_ldctl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_CTRL
,},
2186 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_0CCC
,0,0,0,0,0,},2,2,192},
2189 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 1000 *** ldd @rd,@rs,rr */
2192 "ldd @rd,@rs,rr",16,11,
2195 "ldd",OPC_ldd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2196 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,193},
2199 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 1000 *** lddb @rd,@rs,rr */
2202 "lddb @rd,@rs,rr",8,11,
2205 "lddb",OPC_lddb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2206 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,194},
2209 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 0000 *** lddr @rd,@rs,rr */
2212 "lddr @rd,@rs,rr",16,11,
2215 "lddr",OPC_lddr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2216 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,195},
2219 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 0000 *** lddrb @rd,@rs,rr */
2222 "lddrb @rd,@rs,rr",8,11,
2225 "lddrb",OPC_lddrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2226 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,196},
2229 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 1000 *** ldi @rd,@rs,rr */
2232 "ldi @rd,@rs,rr",16,11,
2235 "ldi",OPC_ldi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2236 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,197},
2239 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 1000 *** ldib @rd,@rs,rr */
2242 "ldib @rd,@rs,rr",8,11,
2245 "ldib",OPC_ldib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2246 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,198},
2249 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 0000 *** ldir @rd,@rs,rr */
2252 "ldir @rd,@rs,rr",16,11,
2255 "ldir",OPC_ldir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2256 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,199},
2259 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 0000 *** ldirb @rd,@rs,rr */
2262 "ldirb @rd,@rs,rr",8,11,
2265 "ldirb",OPC_ldirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2266 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,200},
2269 /* 1011 1101 dddd imm4 *** ldk rd,imm4 */
2275 "ldk",OPC_ldk
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2276 {CLASS_BIT
+0xb,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,201},
2279 /* 0001 1101 ddN0 ssss *** ldl @rd,rrs */
2282 "ldl @rd,rrs",32,11,
2285 "ldl",OPC_ldl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2286 {CLASS_BIT
+1,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,202},
2289 /* 0101 1101 ddN0 ssss address_dst *** ldl address_dst(rd),rrs */
2292 "ldl address_dst(rd),rrs",32,14,
2295 "ldl",OPC_ldl
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2296 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,203},
2299 /* 0101 1101 0000 ssss address_dst *** ldl address_dst,rrs */
2302 "ldl address_dst,rrs",32,15,
2305 "ldl",OPC_ldl
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_LONG
+(ARG_RS
),},
2306 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,204},
2309 /* 0011 0111 ddN0 ssss imm16 *** ldl rd(imm16),rrs */
2312 "ldl rd(imm16),rrs",32,17,
2315 "ldl",OPC_ldl
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2316 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,205},
2319 /* 0111 0111 ddN0 ssss 0000 xxxx 0000 0000 *** ldl rd(rx),rrs */
2322 "ldl rd(rx),rrs",32,17,
2325 "ldl",OPC_ldl
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2326 {CLASS_BIT
+7,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,206},
2329 /* 0001 0100 ssN0 dddd *** ldl rrd,@rs */
2332 "ldl rrd,@rs",32,11,
2335 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2336 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,207},
2339 /* 0101 0100 0000 dddd address_src *** ldl rrd,address_src */
2342 "ldl rrd,address_src",32,12,
2345 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2346 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,208},
2349 /* 0101 0100 ssN0 dddd address_src *** ldl rrd,address_src(rs) */
2352 "ldl rrd,address_src(rs)",32,13,
2355 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2356 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,209},
2359 /* 0001 0100 0000 dddd imm32 *** ldl rrd,imm32 */
2362 "ldl rrd,imm32",32,11,
2365 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2366 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,210},
2369 /* 1001 0100 ssss dddd *** ldl rrd,rrs */
2375 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2376 {CLASS_BIT
+9,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,211},
2379 /* 0011 0101 ssN0 dddd imm16 *** ldl rrd,rs(imm16) */
2382 "ldl rrd,rs(imm16)",32,17,
2385 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2386 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,212},
2389 /* 0111 0101 ssN0 dddd 0000 xxxx 0000 0000 *** ldl rrd,rs(rx) */
2392 "ldl rrd,rs(rx)",32,17,
2395 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2396 {CLASS_BIT
+7,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,213},
2399 /* 0001 1100 ddN0 1001 0000 ssss 0000 nminus1 *** ldm @rd,rs,n */
2402 "ldm @rd,rs,n",16,11,
2405 "ldm",OPC_ldm
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2406 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),0,},3,4,214},
2409 /* 0101 1100 ddN0 1001 0000 ssss 0000 nminus1 address_dst *** ldm address_dst(rd),rs,n */
2412 "ldm address_dst(rd),rs,n",16,15,
2415 "ldm",OPC_ldm
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2416 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,215},
2419 /* 0101 1100 0000 1001 0000 ssss 0000 nminus1 address_dst *** ldm address_dst,rs,n */
2422 "ldm address_dst,rs,n",16,14,
2425 "ldm",OPC_ldm
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2426 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,216},
2429 /* 0001 1100 ssN0 0001 0000 dddd 0000 nminus1 *** ldm rd,@rs,n */
2432 "ldm rd,@rs,n",16,11,
2435 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2436 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),0,},3,4,217},
2439 /* 0101 1100 ssN0 0001 0000 dddd 0000 nminus1 address_src *** ldm rd,address_src(rs),n */
2442 "ldm rd,address_src(rs),n",16,15,
2445 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2446 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,218},
2449 /* 0101 1100 0000 0001 0000 dddd 0000 nminus1 address_src *** ldm rd,address_src,n */
2452 "ldm rd,address_src,n",16,14,
2455 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),CLASS_IMM
+ (ARG_IMMN
),},
2456 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,219},
2459 /* 0011 1001 ssN0 0000 *** ldps @rs */
2465 "ldps",OPC_ldps
,0,{CLASS_IR
+(ARG_RS
),},
2466 {CLASS_BIT
+3,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,0,0,0,0,},1,2,220},
2469 /* 0111 1001 0000 0000 address_src *** ldps address_src */
2472 "ldps address_src",16,16,
2475 "ldps",OPC_ldps
,0,{CLASS_DA
+(ARG_SRC
),},
2476 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,221},
2479 /* 0111 1001 ssN0 0000 address_src *** ldps address_src(rs) */
2482 "ldps address_src(rs)",16,17,
2485 "ldps",OPC_ldps
,0,{CLASS_X
+(ARG_RS
),},
2486 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,222},
2489 /* 0011 0011 0000 ssss disp16 *** ldr disp16,rs */
2492 "ldr disp16,rs",16,14,
2495 "ldr",OPC_ldr
,0,{CLASS_DISP
,CLASS_REG_WORD
+(ARG_RS
),},
2496 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,223},
2499 /* 0011 0001 0000 dddd disp16 *** ldr rd,disp16 */
2502 "ldr rd,disp16",16,14,
2505 "ldr",OPC_ldr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
2506 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,224},
2509 /* 0011 0010 0000 ssss disp16 *** ldrb disp16,rbs */
2512 "ldrb disp16,rbs",8,14,
2515 "ldrb",OPC_ldrb
,0,{CLASS_DISP
,CLASS_REG_BYTE
+(ARG_RS
),},
2516 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,225},
2519 /* 0011 0000 0000 dddd disp16 *** ldrb rbd,disp16 */
2522 "ldrb rbd,disp16",8,14,
2525 "ldrb",OPC_ldrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
2526 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,226},
2529 /* 0011 0111 0000 ssss disp16 *** ldrl disp16,rrs */
2532 "ldrl disp16,rrs",32,17,
2535 "ldrl",OPC_ldrl
,0,{CLASS_DISP
,CLASS_REG_LONG
+(ARG_RS
),},
2536 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,227},
2539 /* 0011 0101 0000 dddd disp16 *** ldrl rrd,disp16 */
2542 "ldrl rrd,disp16",32,17,
2545 "ldrl",OPC_ldrl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DISP
,},
2546 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,228},
2549 /* 0111 1011 0000 1010 *** mbit */
2555 "mbit",OPC_mbit
,0,{0},
2556 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0xa,0,0,0,0,0,},0,2,229},
2559 /* 0111 1011 dddd 1101 *** mreq rd */
2565 "mreq",OPC_mreq
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2566 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,0,0,0,0,0,},1,2,230},
2569 /* 0111 1011 0000 1001 *** mres */
2575 "mres",OPC_mres
,0,{0},
2576 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+9,0,0,0,0,0,},0,2,231},
2579 /* 0111 1011 0000 1000 *** mset */
2585 "mset",OPC_mset
,0,{0},
2586 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+8,0,0,0,0,0,},0,2,232},
2589 /* 0001 1001 ssN0 dddd *** mult rrd,@rs */
2592 "mult rrd,@rs",16,70,
2595 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2596 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,233},
2599 /* 0101 1001 0000 dddd address_src *** mult rrd,address_src */
2602 "mult rrd,address_src",16,70,
2605 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2606 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,234},
2609 /* 0101 1001 ssN0 dddd address_src *** mult rrd,address_src(rs) */
2612 "mult rrd,address_src(rs)",16,70,
2615 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2616 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,235},
2619 /* 0001 1001 0000 dddd imm16 *** mult rrd,imm16 */
2622 "mult rrd,imm16",16,70,
2625 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2626 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,236},
2629 /* 1001 1001 ssss dddd *** mult rrd,rs */
2632 "mult rrd,rs",16,70,
2635 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2636 {CLASS_BIT
+9,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,237},
2639 /* 0001 1000 ssN0 dddd *** multl rqd,@rs */
2642 "multl rqd,@rs",32,282,
2645 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2646 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,238},
2649 /* 0101 1000 0000 dddd address_src *** multl rqd,address_src */
2652 "multl rqd,address_src",32,282,
2655 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2656 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,239},
2659 /* 0101 1000 ssN0 dddd address_src *** multl rqd,address_src(rs) */
2662 "multl rqd,address_src(rs)",32,282,
2665 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2666 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,240},
2669 /* 0001 1000 0000 dddd imm32 *** multl rqd,imm32 */
2672 "multl rqd,imm32",32,282,
2675 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2676 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,241},
2679 /* 1001 1000 ssss dddd *** multl rqd,rrs */
2682 "multl rqd,rrs",32,282,
2685 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2686 {CLASS_BIT
+9,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,242},
2689 /* 0000 1101 ddN0 0010 *** neg @rd */
2695 "neg",OPC_neg
,0,{CLASS_IR
+(ARG_RD
),},
2696 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,243},
2699 /* 0100 1101 0000 0010 address_dst *** neg address_dst */
2702 "neg address_dst",16,15,
2705 "neg",OPC_neg
,0,{CLASS_DA
+(ARG_DST
),},
2706 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,244},
2709 /* 0100 1101 ddN0 0010 address_dst *** neg address_dst(rd) */
2712 "neg address_dst(rd)",16,16,
2715 "neg",OPC_neg
,0,{CLASS_X
+(ARG_RD
),},
2716 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,245},
2719 /* 1000 1101 dddd 0010 *** neg rd */
2725 "neg",OPC_neg
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2726 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,246},
2729 /* 0000 1100 ddN0 0010 *** negb @rd */
2735 "negb",OPC_negb
,0,{CLASS_IR
+(ARG_RD
),},
2736 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,247},
2739 /* 0100 1100 0000 0010 address_dst *** negb address_dst */
2742 "negb address_dst",8,15,
2745 "negb",OPC_negb
,0,{CLASS_DA
+(ARG_DST
),},
2746 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,248},
2749 /* 0100 1100 ddN0 0010 address_dst *** negb address_dst(rd) */
2752 "negb address_dst(rd)",8,16,
2755 "negb",OPC_negb
,0,{CLASS_X
+(ARG_RD
),},
2756 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,249},
2759 /* 1000 1100 dddd 0010 *** negb rbd */
2765 "negb",OPC_negb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
2766 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,250},
2769 /* 1000 1101 0000 0111 *** nop */
2775 "nop",OPC_nop
,0,{0},
2776 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+7,0,0,0,0,0,},0,2,251},
2779 /* 0000 0101 ssN0 dddd *** or rd,@rs */
2785 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2786 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,252},
2789 /* 0100 0101 0000 dddd address_src *** or rd,address_src */
2792 "or rd,address_src",16,9,
2795 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2796 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,253},
2799 /* 0100 0101 ssN0 dddd address_src *** or rd,address_src(rs) */
2802 "or rd,address_src(rs)",16,10,
2805 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2806 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,254},
2809 /* 0000 0101 0000 dddd imm16 *** or rd,imm16 */
2815 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2816 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,255},
2819 /* 1000 0101 ssss dddd *** or rd,rs */
2825 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2826 {CLASS_BIT
+8,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,256},
2829 /* 0000 0100 ssN0 dddd *** orb rbd,@rs */
2835 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2836 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,257},
2839 /* 0100 0100 0000 dddd address_src *** orb rbd,address_src */
2842 "orb rbd,address_src",8,9,
2845 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2846 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,258},
2849 /* 0100 0100 ssN0 dddd address_src *** orb rbd,address_src(rs) */
2852 "orb rbd,address_src(rs)",8,10,
2855 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2856 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,259},
2859 /* 0000 0100 0000 dddd imm8 imm8 *** orb rbd,imm8 */
2865 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2866 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,260},
2869 /* 1000 0100 ssss dddd *** orb rbd,rbs */
2875 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2876 {CLASS_BIT
+8,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,261},
2879 /* 0011 1111 ddN0 ssss *** out @rd,rs */
2885 "out",OPC_out
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2886 {CLASS_BIT
+3,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,262},
2889 /* 0011 1011 ssss 0110 imm16 *** out imm16,rs */
2892 "out imm16,rs",16,0,
2895 "out",OPC_out
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
2896 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,263},
2899 /* 0011 1110 ddN0 ssss *** outb @rd,rbs */
2905 "outb",OPC_outb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2906 {CLASS_BIT
+3,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,264},
2909 /* 0011 1010 ssss 0110 imm16 *** outb imm16,rbs */
2912 "outb imm16,rbs",8,0,
2915 "outb",OPC_outb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
2916 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,265},
2919 /* 0011 1011 ssN0 1010 0000 aaaa ddN0 1000 *** outd @rd,@rs,ra */
2922 "outd @rd,@rs,ra",16,0,
2925 "outd",OPC_outd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2926 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,266},
2929 /* 0011 1010 ssN0 1010 0000 aaaa ddN0 1000 *** outdb @rd,@rs,rba */
2932 "outdb @rd,@rs,rba",16,0,
2935 "outdb",OPC_outdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
2936 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,267},
2939 /* 0011 1011 ssN0 0010 0000 aaaa ddN0 1000 *** outi @rd,@rs,ra */
2942 "outi @rd,@rs,ra",16,0,
2945 "outi",OPC_outi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2946 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,268},
2949 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 1000 *** outib @rd,@rs,ra */
2952 "outib @rd,@rs,ra",16,0,
2955 "outib",OPC_outib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2956 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,269},
2959 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 0000 *** outibr @rd,@rs,ra */
2962 "outibr @rd,@rs,ra",16,0,
2965 "outibr",OPC_outibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2966 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,270},
2969 /* 0001 0111 ssN0 ddN0 *** pop @rd,@rs */
2972 "pop @rd,@rs",16,12,
2975 "pop",OPC_pop
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2976 {CLASS_BIT
+1,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,271},
2979 /* 0101 0111 ssN0 ddN0 address_dst *** pop address_dst(rd),@rs */
2982 "pop address_dst(rd),@rs",16,16,
2985 "pop",OPC_pop
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2986 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,272},
2989 /* 0101 0111 ssN0 0000 address_dst *** pop address_dst,@rs */
2992 "pop address_dst,@rs",16,16,
2995 "pop",OPC_pop
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
2996 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,273},
2999 /* 1001 0111 ssN0 dddd *** pop rd,@rs */
3005 "pop",OPC_pop
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3006 {CLASS_BIT
+9,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,274},
3009 /* 0001 0101 ssN0 ddN0 *** popl @rd,@rs */
3012 "popl @rd,@rs",32,19,
3015 "popl",OPC_popl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3016 {CLASS_BIT
+1,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,275},
3019 /* 0101 0101 ssN0 ddN0 address_dst *** popl address_dst(rd),@rs */
3022 "popl address_dst(rd),@rs",32,23,
3025 "popl",OPC_popl
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3026 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,276},
3029 /* 0101 0101 ssN0 0000 address_dst *** popl address_dst,@rs */
3032 "popl address_dst,@rs",32,23,
3035 "popl",OPC_popl
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
3036 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,277},
3039 /* 1001 0101 ssN0 dddd *** popl rrd,@rs */
3042 "popl rrd,@rs",32,12,
3045 "popl",OPC_popl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3046 {CLASS_BIT
+9,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,278},
3049 /* 0001 0011 ddN0 ssN0 *** push @rd,@rs */
3052 "push @rd,@rs",16,13,
3055 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3056 {CLASS_BIT
+1,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,279},
3059 /* 0101 0011 ddN0 0000 address_src *** push @rd,address_src */
3062 "push @rd,address_src",16,14,
3065 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3066 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,280},
3069 /* 0101 0011 ddN0 ssN0 address_src *** push @rd,address_src(rs) */
3072 "push @rd,address_src(rs)",16,14,
3075 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3076 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,281},
3079 /* 0000 1101 ddN0 1001 imm16 *** push @rd,imm16 */
3082 "push @rd,imm16",16,12,
3085 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3086 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,282},
3089 /* 1001 0011 ddN0 ssss *** push @rd,rs */
3095 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3096 {CLASS_BIT
+9,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,283},
3099 /* 0001 0001 ddN0 ssN0 *** pushl @rd,@rs */
3102 "pushl @rd,@rs",32,20,
3105 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3106 {CLASS_BIT
+1,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,284},
3109 /* 0101 0001 ddN0 0000 address_src *** pushl @rd,address_src */
3112 "pushl @rd,address_src",32,21,
3115 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3116 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,285},
3119 /* 0101 0001 ddN0 ssN0 address_src *** pushl @rd,address_src(rs) */
3122 "pushl @rd,address_src(rs)",32,21,
3125 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3126 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,286},
3129 /* 1001 0001 ddN0 ssss *** pushl @rd,rrs */
3132 "pushl @rd,rrs",32,12,
3135 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
3136 {CLASS_BIT
+9,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,287},
3139 /* 0010 0011 ddN0 imm4 *** res @rd,imm4 */
3142 "res @rd,imm4",16,11,
3145 "res",OPC_res
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3146 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,288},
3149 /* 0110 0011 ddN0 imm4 address_dst *** res address_dst(rd),imm4 */
3152 "res address_dst(rd),imm4",16,14,
3155 "res",OPC_res
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3156 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,289},
3159 /* 0110 0011 0000 imm4 address_dst *** res address_dst,imm4 */
3162 "res address_dst,imm4",16,13,
3165 "res",OPC_res
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3166 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,290},
3169 /* 1010 0011 dddd imm4 *** res rd,imm4 */
3175 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3176 {CLASS_BIT
+0xa,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,291},
3179 /* 0010 0011 0000 ssss 0000 dddd 0000 0000 *** res rd,rs */
3185 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3186 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,292},
3189 /* 0010 0010 ddN0 imm4 *** resb @rd,imm4 */
3192 "resb @rd,imm4",8,11,
3195 "resb",OPC_resb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3196 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,293},
3199 /* 0110 0010 ddN0 imm4 address_dst *** resb address_dst(rd),imm4 */
3202 "resb address_dst(rd),imm4",8,14,
3205 "resb",OPC_resb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3206 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,294},
3209 /* 0110 0010 0000 imm4 address_dst *** resb address_dst,imm4 */
3212 "resb address_dst,imm4",8,13,
3215 "resb",OPC_resb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3216 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,295},
3219 /* 1010 0010 dddd imm4 *** resb rbd,imm4 */
3222 "resb rbd,imm4",8,4,
3225 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3226 {CLASS_BIT
+0xa,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,296},
3229 /* 0010 0010 0000 ssss 0000 dddd 0000 0000 *** resb rbd,rs */
3235 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3236 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,297},
3239 /* 1000 1101 flags 0011 *** resflg flags */
3242 "resflg flags",16,7,
3245 "resflg",OPC_resflg
,0,{CLASS_FLAGS
,},
3246 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+3,0,0,0,0,0,},1,2,298},
3249 /* 1001 1110 0000 cccc *** ret cc */
3255 "ret",OPC_ret
,0,{CLASS_CC
,},
3256 {CLASS_BIT
+9,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,0,0,0,0,0,},1,2,299},
3259 /* 1011 0011 dddd 00I0 *** rl rd,imm1or2 */
3262 "rl rd,imm1or2",16,6,
3265 "rl",OPC_rl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3266 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,300},
3269 /* 1011 0010 dddd 00I0 *** rlb rbd,imm1or2 */
3272 "rlb rbd,imm1or2",8,6,
3275 "rlb",OPC_rlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3276 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,301},
3279 /* 1011 0011 dddd 10I0 *** rlc rd,imm1or2 */
3282 "rlc rd,imm1or2",16,6,
3285 "rlc",OPC_rlc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3286 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,302},
3289 /* 1011 0010 dddd 10I0 *** rlcb rbd,imm1or2 */
3292 "rlcb rbd,imm1or2",8,9,
3295 "rlcb",OPC_rlcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3296 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,303},
3299 /* 1011 1110 aaaa bbbb *** rldb rbb,rba */
3305 "rldb",OPC_rldb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
3306 {CLASS_BIT
+0xb,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,304},
3309 /* 1011 0011 dddd 01I0 *** rr rd,imm1or2 */
3312 "rr rd,imm1or2",16,6,
3315 "rr",OPC_rr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3316 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,305},
3319 /* 1011 0010 dddd 01I0 *** rrb rbd,imm1or2 */
3322 "rrb rbd,imm1or2",8,6,
3325 "rrb",OPC_rrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3326 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,306},
3329 /* 1011 0011 dddd 11I0 *** rrc rd,imm1or2 */
3332 "rrc rd,imm1or2",16,6,
3335 "rrc",OPC_rrc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3336 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,307},
3339 /* 1011 0010 dddd 11I0 *** rrcb rbd,imm1or2 */
3342 "rrcb rbd,imm1or2",8,9,
3345 "rrcb",OPC_rrcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3346 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,308},
3349 /* 1011 1100 aaaa bbbb *** rrdb rbb,rba */
3355 "rrdb",OPC_rrdb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
3356 {CLASS_BIT
+0xb,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,309},
3359 /* 0011 0110 imm8 *** rsvd36 */
3365 "rsvd36",OPC_rsvd36
,0,{0},
3366 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,310},
3369 /* 0011 1000 imm8 *** rsvd38 */
3375 "rsvd38",OPC_rsvd38
,0,{0},
3376 {CLASS_BIT
+3,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,311},
3379 /* 0111 1000 imm8 *** rsvd78 */
3385 "rsvd78",OPC_rsvd78
,0,{0},
3386 {CLASS_BIT
+7,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,312},
3389 /* 0111 1110 imm8 *** rsvd7e */
3395 "rsvd7e",OPC_rsvd7e
,0,{0},
3396 {CLASS_BIT
+7,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,313},
3399 /* 1001 1101 imm8 *** rsvd9d */
3405 "rsvd9d",OPC_rsvd9d
,0,{0},
3406 {CLASS_BIT
+9,CLASS_BIT
+0xd,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,314},
3409 /* 1001 1111 imm8 *** rsvd9f */
3415 "rsvd9f",OPC_rsvd9f
,0,{0},
3416 {CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,315},
3419 /* 1011 1001 imm8 *** rsvdb9 */
3425 "rsvdb9",OPC_rsvdb9
,0,{0},
3426 {CLASS_BIT
+0xb,CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,316},
3429 /* 1011 1111 imm8 *** rsvdbf */
3435 "rsvdbf",OPC_rsvdbf
,0,{0},
3436 {CLASS_BIT
+0xb,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,317},
3439 /* 1011 0111 ssss dddd *** sbc rd,rs */
3445 "sbc",OPC_sbc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3446 {CLASS_BIT
+0xb,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,318},
3449 /* 1011 0110 ssss dddd *** sbcb rbd,rbs */
3455 "sbcb",OPC_sbcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3456 {CLASS_BIT
+0xb,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,319},
3459 /* 0111 1111 imm8 *** sc imm8 */
3465 "sc",OPC_sc
,0,{CLASS_IMM
+(ARG_IMM8
),},
3466 {CLASS_BIT
+7,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,320},
3469 /* 1011 0011 dddd 1011 0000 ssss 0000 0000 *** sda rd,rs */
3475 "sda",OPC_sda
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3476 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,321},
3479 /* 1011 0010 dddd 1011 0000 ssss 0000 0000 *** sdab rbd,rs */
3485 "sdab",OPC_sdab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3486 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,322},
3489 /* 1011 0011 dddd 1111 0000 ssss 0000 0000 *** sdal rrd,rs */
3492 "sdal rrd,rs",32,15,
3495 "sdal",OPC_sdal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3496 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,323},
3499 /* 1011 0011 dddd 0011 0000 ssss 0000 0000 *** sdl rd,rs */
3505 "sdl",OPC_sdl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3506 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,324},
3509 /* 1011 0010 dddd 0011 0000 ssss 0000 0000 *** sdlb rbd,rs */
3515 "sdlb",OPC_sdlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3516 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,325},
3519 /* 1011 0011 dddd 0111 0000 ssss 0000 0000 *** sdll rrd,rs */
3522 "sdll rrd,rs",32,15,
3525 "sdll",OPC_sdll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3526 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,326},
3529 /* 0010 0101 ddN0 imm4 *** set @rd,imm4 */
3532 "set @rd,imm4",16,11,
3535 "set",OPC_set
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3536 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,327},
3539 /* 0110 0101 ddN0 imm4 address_dst *** set address_dst(rd),imm4 */
3542 "set address_dst(rd),imm4",16,14,
3545 "set",OPC_set
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3546 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,328},
3549 /* 0110 0101 0000 imm4 address_dst *** set address_dst,imm4 */
3552 "set address_dst,imm4",16,13,
3555 "set",OPC_set
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3556 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,329},
3559 /* 1010 0101 dddd imm4 *** set rd,imm4 */
3565 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3566 {CLASS_BIT
+0xa,CLASS_BIT
+5,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,330},
3569 /* 0010 0101 0000 ssss 0000 dddd 0000 0000 *** set rd,rs */
3575 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3576 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,331},
3579 /* 0010 0100 ddN0 imm4 *** setb @rd,imm4 */
3582 "setb @rd,imm4",8,11,
3585 "setb",OPC_setb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3586 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,332},
3589 /* 0110 0100 ddN0 imm4 address_dst *** setb address_dst(rd),imm4 */
3592 "setb address_dst(rd),imm4",8,14,
3595 "setb",OPC_setb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3596 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,333},
3599 /* 0110 0100 0000 imm4 address_dst *** setb address_dst,imm4 */
3602 "setb address_dst,imm4",8,13,
3605 "setb",OPC_setb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3606 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,334},
3609 /* 1010 0100 dddd imm4 *** setb rbd,imm4 */
3612 "setb rbd,imm4",8,4,
3615 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3616 {CLASS_BIT
+0xa,CLASS_BIT
+4,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,335},
3619 /* 0010 0100 0000 ssss 0000 dddd 0000 0000 *** setb rbd,rs */
3625 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3626 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,336},
3629 /* 1000 1101 flags 0001 *** setflg flags */
3632 "setflg flags",16,7,
3635 "setflg",OPC_setflg
,0,{CLASS_FLAGS
,},
3636 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+1,0,0,0,0,0,},1,2,337},
3639 /* 0011 1010 dddd 0101 imm16 *** sinb rbd,imm16 */
3642 "sinb rbd,imm16",8,0,
3645 "sinb",OPC_sinb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3646 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,338},
3649 /* 0011 1011 dddd 0101 imm16 *** sinb rd,imm16 */
3652 "sinb rd,imm16",8,0,
3655 "sinb",OPC_sinb
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3656 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,339},
3659 /* 0011 1011 ssN0 1000 0001 aaaa ddN0 1000 *** sind @rd,@rs,ra */
3662 "sind @rd,@rs,ra",16,0,
3665 "sind",OPC_sind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3666 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,340},
3669 /* 0011 1010 ssN0 1000 0001 aaaa ddN0 1000 *** sindb @rd,@rs,rba */
3672 "sindb @rd,@rs,rba",8,0,
3675 "sindb",OPC_sindb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3676 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,341},
3679 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 1000 *** sinib @rd,@rs,ra */
3682 "sinib @rd,@rs,ra",8,0,
3685 "sinib",OPC_sinib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3686 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,342},
3689 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 0000 *** sinibr @rd,@rs,ra */
3692 "sinibr @rd,@rs,ra",16,0,
3695 "sinibr",OPC_sinibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3696 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,343},
3699 /* 1011 0011 dddd 1001 0000 0000 imm8 *** sla rd,imm8 */
3702 "sla rd,imm8",16,13,
3705 "sla",OPC_sla
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3706 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,344},
3709 /* 1011 0010 dddd 1001 0000 0000 imm8 *** slab rbd,imm8 */
3712 "slab rbd,imm8",8,13,
3715 "slab",OPC_slab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3716 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,345},
3719 /* 1011 0011 dddd 1101 0000 0000 imm8 *** slal rrd,imm8 */
3722 "slal rrd,imm8",32,13,
3725 "slal",OPC_slal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3726 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,346},
3729 /* 1011 0011 dddd 0001 0000 0000 imm8 *** sll rd,imm8 */
3732 "sll rd,imm8",16,13,
3735 "sll",OPC_sll
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3736 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,347},
3739 /* 1011 0010 dddd 0001 0000 0000 imm8 *** sllb rbd,imm8 */
3742 "sllb rbd,imm8",8,13,
3745 "sllb",OPC_sllb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3746 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,348},
3749 /* 1011 0011 dddd 0101 0000 0000 imm8 *** slll rrd,imm8 */
3752 "slll rrd,imm8",32,13,
3755 "slll",OPC_slll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3756 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,349},
3759 /* 0011 1011 ssss 0111 imm16 *** sout imm16,rs */
3762 "sout imm16,rs",16,0,
3765 "sout",OPC_sout
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
3766 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,350},
3769 /* 0011 1010 ssss 0111 imm16 *** soutb imm16,rbs */
3772 "soutb imm16,rbs",8,0,
3775 "soutb",OPC_soutb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
3776 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,351},
3779 /* 0011 1011 ssN0 1011 0000 aaaa ddN0 1000 *** soutd @rd,@rs,ra */
3782 "soutd @rd,@rs,ra",16,0,
3785 "soutd",OPC_soutd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3786 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,352},
3789 /* 0011 1010 ssN0 1011 0000 aaaa ddN0 1000 *** soutdb @rd,@rs,rba */
3792 "soutdb @rd,@rs,rba",8,0,
3795 "soutdb",OPC_soutdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3796 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,353},
3799 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 1000 *** soutib @rd,@rs,ra */
3802 "soutib @rd,@rs,ra",8,0,
3805 "soutib",OPC_soutib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3806 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,354},
3809 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 0000 *** soutibr @rd,@rs,ra */
3812 "soutibr @rd,@rs,ra",16,0,
3815 "soutibr",OPC_soutibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3816 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,355},
3819 /* 1011 0011 dddd 1001 1111 1111 nim8 *** sra rd,imm8 */
3822 "sra rd,imm8",16,13,
3825 "sra",OPC_sra
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3826 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,356},
3829 /* 1011 0010 dddd 1001 0000 0000 nim8 *** srab rbd,imm8 */
3832 "srab rbd,imm8",8,13,
3835 "srab",OPC_srab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3836 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,357},
3839 /* 1011 0011 dddd 1101 1111 1111 nim8 *** sral rrd,imm8 */
3842 "sral rrd,imm8",32,13,
3845 "sral",OPC_sral
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3846 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,358},
3849 /* 1011 0011 dddd 0001 1111 1111 nim8 *** srl rd,imm8 */
3852 "srl rd,imm8",16,13,
3855 "srl",OPC_srl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3856 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,359},
3859 /* 1011 0010 dddd 0001 0000 0000 nim8 *** srlb rbd,imm8 */
3862 "srlb rbd,imm8",8,13,
3865 "srlb",OPC_srlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3866 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,360},
3869 /* 1011 0011 dddd 0101 1111 1111 nim8 *** srll rrd,imm8 */
3872 "srll rrd,imm8",32,13,
3875 "srll",OPC_srll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3876 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,361},
3879 /* 0000 0011 ssN0 dddd *** sub rd,@rs */
3885 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3886 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,362},
3889 /* 0100 0011 0000 dddd address_src *** sub rd,address_src */
3892 "sub rd,address_src",16,9,
3895 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3896 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,363},
3899 /* 0100 0011 ssN0 dddd address_src *** sub rd,address_src(rs) */
3902 "sub rd,address_src(rs)",16,10,
3905 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3906 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,364},
3909 /* 0000 0011 0000 dddd imm16 *** sub rd,imm16 */
3912 "sub rd,imm16",16,7,
3915 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3916 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,365},
3919 /* 1000 0011 ssss dddd *** sub rd,rs */
3925 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3926 {CLASS_BIT
+8,CLASS_BIT
+3,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,366},
3929 /* 0000 0010 ssN0 dddd *** subb rbd,@rs */
3935 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3936 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,367},
3939 /* 0100 0010 0000 dddd address_src *** subb rbd,address_src */
3942 "subb rbd,address_src",8,9,
3945 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3946 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,368},
3949 /* 0100 0010 ssN0 dddd address_src *** subb rbd,address_src(rs) */
3952 "subb rbd,address_src(rs)",8,10,
3955 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3956 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,369},
3959 /* 0000 0010 0000 dddd imm8 imm8 *** subb rbd,imm8 */
3962 "subb rbd,imm8",8,7,
3965 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3966 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,370},
3969 /* 1000 0010 ssss dddd *** subb rbd,rbs */
3975 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3976 {CLASS_BIT
+8,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,371},
3979 /* 0001 0010 ssN0 dddd *** subl rrd,@rs */
3982 "subl rrd,@rs",32,14,
3985 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3986 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,372},
3989 /* 0101 0010 0000 dddd address_src *** subl rrd,address_src */
3992 "subl rrd,address_src",32,15,
3995 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3996 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,373},
3999 /* 0101 0010 ssN0 dddd address_src *** subl rrd,address_src(rs) */
4002 "subl rrd,address_src(rs)",32,16,
4005 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4006 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,374},
4009 /* 0001 0010 0000 dddd imm32 *** subl rrd,imm32 */
4012 "subl rrd,imm32",32,14,
4015 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
4016 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,375},
4019 /* 1001 0010 ssss dddd *** subl rrd,rrs */
4022 "subl rrd,rrs",32,8,
4025 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
4026 {CLASS_BIT
+9,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,376},
4029 /* 1010 1111 dddd cccc *** tcc cc,rd */
4035 "tcc",OPC_tcc
,0,{CLASS_CC
,CLASS_REG_WORD
+(ARG_RD
),},
4036 {CLASS_BIT
+0xa,CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,377},
4039 /* 1010 1110 dddd cccc *** tccb cc,rbd */
4045 "tccb",OPC_tccb
,0,{CLASS_CC
,CLASS_REG_BYTE
+(ARG_RD
),},
4046 {CLASS_BIT
+0xa,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,378},
4049 /* 0000 1101 ddN0 0100 *** test @rd */
4055 "test",OPC_test
,0,{CLASS_IR
+(ARG_RD
),},
4056 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,379},
4059 /* 0100 1101 0000 0100 address_dst *** test address_dst */
4062 "test address_dst",16,11,
4065 "test",OPC_test
,0,{CLASS_DA
+(ARG_DST
),},
4066 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,380},
4069 /* 0100 1101 ddN0 0100 address_dst *** test address_dst(rd) */
4072 "test address_dst(rd)",16,12,
4075 "test",OPC_test
,0,{CLASS_X
+(ARG_RD
),},
4076 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,381},
4079 /* 1000 1101 dddd 0100 *** test rd */
4085 "test",OPC_test
,0,{CLASS_REG_WORD
+(ARG_RD
),},
4086 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,382},
4089 /* 0000 1100 ddN0 0100 *** testb @rd */
4095 "testb",OPC_testb
,0,{CLASS_IR
+(ARG_RD
),},
4096 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,383},
4099 /* 0100 1100 0000 0100 address_dst *** testb address_dst */
4102 "testb address_dst",8,11,
4105 "testb",OPC_testb
,0,{CLASS_DA
+(ARG_DST
),},
4106 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,384},
4109 /* 0100 1100 ddN0 0100 address_dst *** testb address_dst(rd) */
4112 "testb address_dst(rd)",8,12,
4115 "testb",OPC_testb
,0,{CLASS_X
+(ARG_RD
),},
4116 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,385},
4119 /* 1000 1100 dddd 0100 *** testb rbd */
4125 "testb",OPC_testb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
4126 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,386},
4129 /* 0001 1100 ddN0 1000 *** testl @rd */
4135 "testl",OPC_testl
,0,{CLASS_IR
+(ARG_RD
),},
4136 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,387},
4139 /* 0101 1100 0000 1000 address_dst *** testl address_dst */
4142 "testl address_dst",32,16,
4145 "testl",OPC_testl
,0,{CLASS_DA
+(ARG_DST
),},
4146 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,388},
4149 /* 0101 1100 ddN0 1000 address_dst *** testl address_dst(rd) */
4152 "testl address_dst(rd)",32,17,
4155 "testl",OPC_testl
,0,{CLASS_X
+(ARG_RD
),},
4156 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,389},
4159 /* 1001 1100 dddd 1000 *** testl rrd */
4165 "testl",OPC_testl
,0,{CLASS_REG_LONG
+(ARG_RD
),},
4166 {CLASS_BIT
+9,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,390},
4169 /* 1011 1000 ddN0 1000 0000 aaaa ssN0 0000 *** trdb @rd,@rs,rba */
4172 "trdb @rd,@rs,rba",8,25,
4175 "trdb",OPC_trdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
4176 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,391},
4179 /* 1011 1000 ddN0 1100 0000 aaaa ssN0 0000 *** trdrb @rd,@rs,rba */
4182 "trdrb @rd,@rs,rba",8,25,
4185 "trdrb",OPC_trdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
4186 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,392},
4189 /* 1011 1000 ddN0 0000 0000 rrrr ssN0 0000 *** trib @rd,@rs,rbr */
4192 "trib @rd,@rs,rbr",8,25,
4195 "trib",OPC_trib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
4196 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,393},
4199 /* 1011 1000 ddN0 0100 0000 rrrr ssN0 0000 *** trirb @rd,@rs,rbr */
4202 "trirb @rd,@rs,rbr",8,25,
4205 "trirb",OPC_trirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
4206 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,394},
4209 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtdb @ra,@rb,rbr */
4212 "trtdb @ra,@rb,rbr",8,25,
4215 "trtdb",OPC_trtdb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4216 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,395},
4219 /* 1011 1000 aaN0 1110 0000 rrrr bbN0 1110 *** trtdrb @ra,@rb,rbr */
4222 "trtdrb @ra,@rb,rbr",8,25,
4225 "trtdrb",OPC_trtdrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4226 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,396},
4229 /* 1011 1000 aaN0 0010 0000 rrrr bbN0 0000 *** trtib @ra,@rb,rbr */
4232 "trtib @ra,@rb,rbr",8,25,
4235 "trtib",OPC_trtib
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4236 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,397},
4239 /* 1011 1000 aaN0 0110 0000 rrrr bbN0 1110 *** trtirb @ra,@rb,rbr */
4242 "trtirb @ra,@rb,rbr",8,25,
4245 "trtirb",OPC_trtirb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4246 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,398},
4249 /* 0000 1101 ddN0 0110 *** tset @rd */
4255 "tset",OPC_tset
,0,{CLASS_IR
+(ARG_RD
),},
4256 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,399},
4259 /* 0100 1101 0000 0110 address_dst *** tset address_dst */
4262 "tset address_dst",16,14,
4265 "tset",OPC_tset
,0,{CLASS_DA
+(ARG_DST
),},
4266 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,400},
4269 /* 0100 1101 ddN0 0110 address_dst *** tset address_dst(rd) */
4272 "tset address_dst(rd)",16,15,
4275 "tset",OPC_tset
,0,{CLASS_X
+(ARG_RD
),},
4276 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,401},
4279 /* 1000 1101 dddd 0110 *** tset rd */
4285 "tset",OPC_tset
,0,{CLASS_REG_WORD
+(ARG_RD
),},
4286 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,402},
4289 /* 0000 1100 ddN0 0110 *** tsetb @rd */
4295 "tsetb",OPC_tsetb
,0,{CLASS_IR
+(ARG_RD
),},
4296 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,403},
4299 /* 0100 1100 0000 0110 address_dst *** tsetb address_dst */
4302 "tsetb address_dst",8,14,
4305 "tsetb",OPC_tsetb
,0,{CLASS_DA
+(ARG_DST
),},
4306 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,404},
4309 /* 0100 1100 ddN0 0110 address_dst *** tsetb address_dst(rd) */
4312 "tsetb address_dst(rd)",8,15,
4315 "tsetb",OPC_tsetb
,0,{CLASS_X
+(ARG_RD
),},
4316 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,405},
4319 /* 1000 1100 dddd 0110 *** tsetb rbd */
4325 "tsetb",OPC_tsetb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
4326 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,406},
4329 /* 0000 1001 ssN0 dddd *** xor rd,@rs */
4335 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4336 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,407},
4339 /* 0100 1001 0000 dddd address_src *** xor rd,address_src */
4342 "xor rd,address_src",16,9,
4345 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4346 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,408},
4349 /* 0100 1001 ssN0 dddd address_src *** xor rd,address_src(rs) */
4352 "xor rd,address_src(rs)",16,10,
4355 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4356 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,409},
4359 /* 0000 1001 0000 dddd imm16 *** xor rd,imm16 */
4362 "xor rd,imm16",16,7,
4365 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
4366 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,410},
4369 /* 1000 1001 ssss dddd *** xor rd,rs */
4375 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
4376 {CLASS_BIT
+8,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,411},
4379 /* 0000 1000 ssN0 dddd *** xorb rbd,@rs */
4385 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4386 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,412},
4389 /* 0100 1000 0000 dddd address_src *** xorb rbd,address_src */
4392 "xorb rbd,address_src",8,9,
4395 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4396 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,413},
4399 /* 0100 1000 ssN0 dddd address_src *** xorb rbd,address_src(rs) */
4402 "xorb rbd,address_src(rs)",8,10,
4405 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4406 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,414},
4409 /* 0000 1000 0000 dddd imm8 imm8 *** xorb rbd,imm8 */
4412 "xorb rbd,imm8",8,7,
4415 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
4416 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,415},
4419 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
4425 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4426 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,416},
4429 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
4435 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4436 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,417},