1 /* THIS FILE IS AUTOMAGICALLY GENERATED, DON'T EDIT IT */
13 #define ARG_IMM16 0x03
14 #define ARG_IMM32 0x04
16 #define ARG_IMMNMINUS1 0x05
17 #define ARG_IMM_1 0x06
18 #define ARG_IMM_2 0x07
19 #define ARG_DISP16 0x08
22 #define ARG_IMM1OR2 0x0b
23 #define ARG_DISP12 0x0b
24 #define ARG_DISP8 0x0c
25 #define ARG_IMM4M1 0x0d
26 #define CLASS_MASK 0x1fff0
31 #define CLASS_DISP 0x50
32 #define CLASS_IMM 0x60
34 #define CLASS_CTRL 0x80
35 #define CLASS_ADDRESS 0xd0
36 #define CLASS_0CCC 0xe0
37 #define CLASS_1CCC 0xf0
38 #define CLASS_0DISP7 0x100
39 #define CLASS_1DISP7 0x200
40 #define CLASS_01II 0x300
41 #define CLASS_00II 0x400
42 #define CLASS_BIT 0x500
43 #define CLASS_FLAGS 0x600
44 #define CLASS_IR 0x700
45 #define CLASS_DISP8 0x800
46 #define CLASS_BIT_1OR2 0x900
47 #define CLASS_REG 0x7000
48 #define CLASS_REG_BYTE 0x2000
49 #define CLASS_REG_WORD 0x3000
50 #define CLASS_REG_QUAD 0x4000
51 #define CLASS_REG_LONG 0x5000
52 #define CLASS_REGN0 0x8000
53 #define CLASS_PR 0x10000
145 #define OPC_outibr 91
152 #define OPC_resflg 98
174 #define OPC_setflg 120
177 #define OPC_sindb 123
178 #define OPC_sinib 124
179 #define OPC_sinibr 125
187 #define OPC_soutb 133
188 #define OPC_soutd 134
189 #define OPC_soutdb 135
190 #define OPC_soutib 136
191 #define OPC_soutibr 137
204 #define OPC_testb 150
205 #define OPC_testl 151
207 #define OPC_trdrb 153
209 #define OPC_trirb 155
210 #define OPC_trtdrb 156
211 #define OPC_trtib 157
212 #define OPC_trtirb 158
213 #define OPC_trtrb 159
215 #define OPC_tsetb 161
221 #define OPC_lddrb 167
226 #define OPC_ext0e 172
227 #define OPC_ext0f 172
228 #define OPC_ext8e 172
229 #define OPC_ext8f 172
230 #define OPC_rsvd36 172
231 #define OPC_rsvd38 172
232 #define OPC_rsvd78 172
233 #define OPC_rsvd7e 172
234 #define OPC_rsvd9d 172
235 #define OPC_rsvd9f 172
236 #define OPC_rsvdb9 172
237 #define OPC_rsvdbf 172
239 #define OPC_ldctlb 174
241 #define OPC_trtdb 176
250 unsigned char opcode
;
251 void (*func
) PARAMS ((void));
252 unsigned int arg_info
[4];
253 unsigned int byte_info
[10];
259 opcode_entry_type z8k_table
[] = {
262 /* 1011 0101 ssss dddd *** adc rd,rs */
268 "adc",OPC_adc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
269 {CLASS_BIT
+0xb,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,0},
272 /* 1011 0100 ssss dddd *** adcb rbd,rbs */
278 "adcb",OPC_adcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
279 {CLASS_BIT
+0xb,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,1},
282 /* 0000 0001 ssN0 dddd *** add rd,@rs */
288 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
289 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,2},
292 /* 0100 0001 0000 dddd address_src *** add rd,address_src */
295 "add rd,address_src",16,9,
298 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
299 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,3},
302 /* 0100 0001 ssN0 dddd address_src *** add rd,address_src(rs) */
305 "add rd,address_src(rs)",16,10,
308 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
309 {CLASS_BIT
+4,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,4},
312 /* 0000 0001 0000 dddd imm16 *** add rd,imm16 */
318 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
319 {CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,5},
322 /* 1000 0001 ssss dddd *** add rd,rs */
328 "add",OPC_add
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
329 {CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,6},
332 /* 0000 0000 ssN0 dddd *** addb rbd,@rs */
338 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
339 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,7},
342 /* 0100 0000 0000 dddd address_src *** addb rbd,address_src */
345 "addb rbd,address_src",8,9,
348 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
349 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,8},
352 /* 0100 0000 ssN0 dddd address_src *** addb rbd,address_src(rs) */
355 "addb rbd,address_src(rs)",8,10,
358 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
359 {CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,9},
362 /* 0000 0000 0000 dddd imm8 imm8 *** addb rbd,imm8 */
368 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
369 {CLASS_BIT
+0,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,10},
372 /* 1000 0000 ssss dddd *** addb rbd,rbs */
378 "addb",OPC_addb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
379 {CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,11},
382 /* 0001 0110 ssN0 dddd *** addl rrd,@rs */
385 "addl rrd,@rs",32,14,
388 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
389 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,12},
392 /* 0101 0110 0000 dddd address_src *** addl rrd,address_src */
395 "addl rrd,address_src",32,15,
398 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
399 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,13},
402 /* 0101 0110 ssN0 dddd address_src *** addl rrd,address_src(rs) */
405 "addl rrd,address_src(rs)",32,16,
408 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
409 {CLASS_BIT
+5,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,14},
412 /* 0001 0110 0000 dddd imm32 *** addl rrd,imm32 */
415 "addl rrd,imm32",32,14,
418 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
419 {CLASS_BIT
+1,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,15},
422 /* 1001 0110 ssss dddd *** addl rrd,rrs */
428 "addl",OPC_addl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
429 {CLASS_BIT
+9,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,16},
432 /* 0000 0111 ssN0 dddd *** and rd,@rs */
438 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
439 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,17},
442 /* 0100 0111 0000 dddd address_src *** and rd,address_src */
445 "and rd,address_src",16,9,
448 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
449 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,18},
452 /* 0100 0111 ssN0 dddd address_src *** and rd,address_src(rs) */
455 "and rd,address_src(rs)",16,10,
458 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
459 {CLASS_BIT
+4,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,19},
462 /* 0000 0111 0000 dddd imm16 *** and rd,imm16 */
468 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
469 {CLASS_BIT
+0,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,20},
472 /* 1000 0111 ssss dddd *** and rd,rs */
478 "and",OPC_and
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
479 {CLASS_BIT
+8,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,21},
482 /* 0000 0110 ssN0 dddd *** andb rbd,@rs */
488 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
489 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,22},
492 /* 0100 0110 0000 dddd address_src *** andb rbd,address_src */
495 "andb rbd,address_src",8,9,
498 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
499 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,23},
502 /* 0100 0110 ssN0 dddd address_src *** andb rbd,address_src(rs) */
505 "andb rbd,address_src(rs)",8,10,
508 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
509 {CLASS_BIT
+4,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,24},
512 /* 0000 0110 0000 dddd imm8 imm8 *** andb rbd,imm8 */
518 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
519 {CLASS_BIT
+0,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,25},
522 /* 1000 0110 ssss dddd *** andb rbd,rbs */
528 "andb",OPC_andb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
529 {CLASS_BIT
+8,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,26},
532 /* 0010 0111 ddN0 imm4 *** bit @rd,imm4 */
538 "bit",OPC_bit
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
539 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,27},
542 /* 0110 0111 ddN0 imm4 address_dst *** bit address_dst(rd),imm4 */
545 "bit address_dst(rd),imm4",16,11,
548 "bit",OPC_bit
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
549 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,28},
552 /* 0110 0111 0000 imm4 address_dst *** bit address_dst,imm4 */
555 "bit address_dst,imm4",16,10,
558 "bit",OPC_bit
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
559 {CLASS_BIT
+6,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,29},
562 /* 1010 0111 dddd imm4 *** bit rd,imm4 */
568 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
569 {CLASS_BIT
+0xa,CLASS_BIT
+7,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,30},
572 /* 0010 0111 0000 ssss 0000 dddd 0000 0000 *** bit rd,rs */
578 "bit",OPC_bit
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
579 {CLASS_BIT
+2,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,31},
582 /* 0010 0110 ddN0 imm4 *** bitb @rd,imm4 */
588 "bitb",OPC_bitb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
589 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,32},
592 /* 0110 0110 ddN0 imm4 address_dst *** bitb address_dst(rd),imm4 */
595 "bitb address_dst(rd),imm4",8,11,
598 "bitb",OPC_bitb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
599 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,33},
602 /* 0110 0110 0000 imm4 address_dst *** bitb address_dst,imm4 */
605 "bitb address_dst,imm4",8,10,
608 "bitb",OPC_bitb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
609 {CLASS_BIT
+6,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,34},
612 /* 1010 0110 dddd imm4 *** bitb rbd,imm4 */
618 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
619 {CLASS_BIT
+0xa,CLASS_BIT
+6,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,35},
622 /* 0010 0110 0000 ssss 0000 dddd 0000 0000 *** bitb rbd,rs */
628 "bitb",OPC_bitb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
629 {CLASS_BIT
+2,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,36},
632 /* 0011 0110 0000 0000 *** bpt */
639 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,37},
642 /* 0001 1111 ddN0 0000 *** call @rd */
648 "call",OPC_call
,0,{CLASS_IR
+(ARG_RD
),},
649 {CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,38},
652 /* 0101 1111 0000 0000 address_dst *** call address_dst */
655 "call address_dst",32,12,
658 "call",OPC_call
,0,{CLASS_DA
+(ARG_DST
),},
659 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,39},
662 /* 0101 1111 ddN0 0000 address_dst *** call address_dst(rd) */
665 "call address_dst(rd)",32,13,
668 "call",OPC_call
,0,{CLASS_X
+(ARG_RD
),},
669 {CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,40},
672 /* 1101 disp12 *** calr disp12 */
678 "calr",OPC_calr
,0,{CLASS_DISP
,},
679 {CLASS_BIT
+0xd,CLASS_DISP
+(ARG_DISP12
),0,0,0,0,0,0,0,},1,2,41},
682 /* 0000 1101 ddN0 1000 *** clr @rd */
688 "clr",OPC_clr
,0,{CLASS_IR
+(ARG_RD
),},
689 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,42},
692 /* 0100 1101 0000 1000 address_dst *** clr address_dst */
695 "clr address_dst",16,11,
698 "clr",OPC_clr
,0,{CLASS_DA
+(ARG_DST
),},
699 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,43},
702 /* 0100 1101 ddN0 1000 address_dst *** clr address_dst(rd) */
705 "clr address_dst(rd)",16,12,
708 "clr",OPC_clr
,0,{CLASS_X
+(ARG_RD
),},
709 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,44},
712 /* 1000 1101 dddd 1000 *** clr rd */
718 "clr",OPC_clr
,0,{CLASS_REG_WORD
+(ARG_RD
),},
719 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,45},
722 /* 0000 1100 ddN0 1000 *** clrb @rd */
728 "clrb",OPC_clrb
,0,{CLASS_IR
+(ARG_RD
),},
729 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,46},
732 /* 0100 1100 0000 1000 address_dst *** clrb address_dst */
735 "clrb address_dst",8,11,
738 "clrb",OPC_clrb
,0,{CLASS_DA
+(ARG_DST
),},
739 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,47},
742 /* 0100 1100 ddN0 1000 address_dst *** clrb address_dst(rd) */
745 "clrb address_dst(rd)",8,12,
748 "clrb",OPC_clrb
,0,{CLASS_X
+(ARG_RD
),},
749 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,48},
752 /* 1000 1100 dddd 1000 *** clrb rbd */
758 "clrb",OPC_clrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
759 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,49},
762 /* 0000 1101 ddN0 0000 *** com @rd */
768 "com",OPC_com
,0,{CLASS_IR
+(ARG_RD
),},
769 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,50},
772 /* 0100 1101 0000 0000 address_dst *** com address_dst */
775 "com address_dst",16,15,
778 "com",OPC_com
,0,{CLASS_DA
+(ARG_DST
),},
779 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,51},
782 /* 0100 1101 ddN0 0000 address_dst *** com address_dst(rd) */
785 "com address_dst(rd)",16,16,
788 "com",OPC_com
,0,{CLASS_X
+(ARG_RD
),},
789 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,52},
792 /* 1000 1101 dddd 0000 *** com rd */
798 "com",OPC_com
,0,{CLASS_REG_WORD
+(ARG_RD
),},
799 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,53},
802 /* 0000 1100 ddN0 0000 *** comb @rd */
808 "comb",OPC_comb
,0,{CLASS_IR
+(ARG_RD
),},
809 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,54},
812 /* 0100 1100 0000 0000 address_dst *** comb address_dst */
815 "comb address_dst",8,15,
818 "comb",OPC_comb
,0,{CLASS_DA
+(ARG_DST
),},
819 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,55},
822 /* 0100 1100 ddN0 0000 address_dst *** comb address_dst(rd) */
825 "comb address_dst(rd)",8,16,
828 "comb",OPC_comb
,0,{CLASS_X
+(ARG_RD
),},
829 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,56},
832 /* 1000 1100 dddd 0000 *** comb rbd */
838 "comb",OPC_comb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
839 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,57},
842 /* 1000 1101 flags 0101 *** comflg flags */
848 "comflg",OPC_comflg
,0,{CLASS_FLAGS
,},
849 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+5,0,0,0,0,0,},1,2,58},
852 /* 0000 1101 ddN0 0001 imm16 *** cp @rd,imm16 */
855 "cp @rd,imm16",16,11,
858 "cp",OPC_cp
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
859 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,59},
862 /* 0100 1101 ddN0 0001 address_dst imm16 *** cp address_dst(rd),imm16 */
865 "cp address_dst(rd),imm16",16,15,
868 "cp",OPC_cp
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
869 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,60},
872 /* 0100 1101 0000 0001 address_dst imm16 *** cp address_dst,imm16 */
875 "cp address_dst,imm16",16,14,
878 "cp",OPC_cp
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
879 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,61},
882 /* 0000 1011 ssN0 dddd *** cp rd,@rs */
888 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
889 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,62},
892 /* 0100 1011 0000 dddd address_src *** cp rd,address_src */
895 "cp rd,address_src",16,9,
898 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
899 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,63},
902 /* 0100 1011 ssN0 dddd address_src *** cp rd,address_src(rs) */
905 "cp rd,address_src(rs)",16,10,
908 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
909 {CLASS_BIT
+4,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,64},
912 /* 0000 1011 0000 dddd imm16 *** cp rd,imm16 */
918 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
919 {CLASS_BIT
+0,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,65},
922 /* 1000 1011 ssss dddd *** cp rd,rs */
928 "cp",OPC_cp
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
929 {CLASS_BIT
+8,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,66},
932 /* 0000 1100 ddN0 0001 imm8 imm8 *** cpb @rd,imm8 */
938 "cpb",OPC_cpb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
939 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,67},
942 /* 0100 1100 ddN0 0001 address_dst imm8 imm8 *** cpb address_dst(rd),imm8 */
945 "cpb address_dst(rd),imm8",8,15,
948 "cpb",OPC_cpb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
949 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,68},
952 /* 0100 1100 0000 0001 address_dst imm8 imm8 *** cpb address_dst,imm8 */
955 "cpb address_dst,imm8",8,14,
958 "cpb",OPC_cpb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
959 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,69},
962 /* 0000 1010 ssN0 dddd *** cpb rbd,@rs */
968 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
969 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,70},
972 /* 0100 1010 0000 dddd address_src *** cpb rbd,address_src */
975 "cpb rbd,address_src",8,9,
978 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
979 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,71},
982 /* 0100 1010 ssN0 dddd address_src *** cpb rbd,address_src(rs) */
985 "cpb rbd,address_src(rs)",8,10,
988 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
989 {CLASS_BIT
+4,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,72},
992 /* 0000 1010 0000 dddd imm8 imm8 *** cpb rbd,imm8 */
998 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
999 {CLASS_BIT
+0,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,73},
1002 /* 1000 1010 ssss dddd *** cpb rbd,rbs */
1008 "cpb",OPC_cpb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1009 {CLASS_BIT
+8,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,74},
1012 /* 1011 1011 ssN0 1000 0000 rrrr dddd cccc *** cpd rd,@rs,rr,cc */
1015 "cpd rd,@rs,rr,cc",16,11,
1018 "cpd",OPC_cpd
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1019 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,75},
1022 /* 1011 1010 ssN0 1000 0000 rrrr dddd cccc *** cpdb rbd,@rs,rr,cc */
1025 "cpdb rbd,@rs,rr,cc",8,11,
1028 "cpdb",OPC_cpdb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1029 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,76},
1032 /* 1011 1011 ssN0 1100 0000 rrrr dddd cccc *** cpdr rd,@rs,rr,cc */
1035 "cpdr rd,@rs,rr,cc",16,11,
1038 "cpdr",OPC_cpdr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1039 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,77},
1042 /* 1011 1010 ssN0 1100 0000 rrrr dddd cccc *** cpdrb rbd,@rs,rr,cc */
1045 "cpdrb rbd,@rs,rr,cc",8,11,
1048 "cpdrb",OPC_cpdrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1049 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,78},
1052 /* 1011 1011 ssN0 0000 0000 rrrr dddd cccc *** cpi rd,@rs,rr,cc */
1055 "cpi rd,@rs,rr,cc",16,11,
1058 "cpi",OPC_cpi
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1059 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,79},
1062 /* 1011 1010 ssN0 0000 0000 rrrr dddd cccc *** cpib rbd,@rs,rr,cc */
1065 "cpib rbd,@rs,rr,cc",8,11,
1068 "cpib",OPC_cpib
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1069 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,80},
1072 /* 1011 1011 ssN0 0100 0000 rrrr dddd cccc *** cpir rd,@rs,rr,cc */
1075 "cpir rd,@rs,rr,cc",16,11,
1078 "cpir",OPC_cpir
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1079 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,81},
1082 /* 1011 1010 ssN0 0100 0000 rrrr dddd cccc *** cpirb rbd,@rs,rr,cc */
1085 "cpirb rbd,@rs,rr,cc",8,11,
1088 "cpirb",OPC_cpirb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1089 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REG
+(ARG_RD
),CLASS_CC
,0,},4,4,82},
1092 /* 0001 0000 ssN0 dddd *** cpl rrd,@rs */
1095 "cpl rrd,@rs",32,14,
1098 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1099 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,83},
1102 /* 0101 0000 0000 dddd address_src *** cpl rrd,address_src */
1105 "cpl rrd,address_src",32,15,
1108 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1109 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,84},
1112 /* 0101 0000 ssN0 dddd address_src *** cpl rrd,address_src(rs) */
1115 "cpl rrd,address_src(rs)",32,16,
1118 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1119 {CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,85},
1122 /* 0001 0000 0000 dddd imm32 *** cpl rrd,imm32 */
1125 "cpl rrd,imm32",32,14,
1128 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1129 {CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,86},
1132 /* 1001 0000 ssss dddd *** cpl rrd,rrs */
1138 "cpl",OPC_cpl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1139 {CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,87},
1142 /* 1011 1011 ssN0 1010 0000 rrrr ddN0 cccc *** cpsd @rd,@rs,rr,cc */
1145 "cpsd @rd,@rs,rr,cc",16,11,
1148 "cpsd",OPC_cpsd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1149 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,88},
1152 /* 1011 1010 ssN0 1010 0000 rrrr ddN0 cccc *** cpsdb @rd,@rs,rr,cc */
1155 "cpsdb @rd,@rs,rr,cc",8,11,
1158 "cpsdb",OPC_cpsdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1159 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,89},
1162 /* 1011 1011 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdr @rd,@rs,rr,cc */
1165 "cpsdr @rd,@rs,rr,cc",16,11,
1168 "cpsdr",OPC_cpsdr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1169 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,90},
1172 /* 1011 1010 ssN0 1110 0000 rrrr ddN0 cccc *** cpsdrb @rd,@rs,rr,cc */
1175 "cpsdrb @rd,@rs,rr,cc",8,11,
1178 "cpsdrb",OPC_cpsdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1179 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,91},
1182 /* 1011 1011 ssN0 0010 0000 rrrr ddN0 cccc *** cpsi @rd,@rs,rr,cc */
1185 "cpsi @rd,@rs,rr,cc",16,11,
1188 "cpsi",OPC_cpsi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1189 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,92},
1192 /* 1011 1010 ssN0 0010 0000 rrrr ddN0 cccc *** cpsib @rd,@rs,rr,cc */
1195 "cpsib @rd,@rs,rr,cc",8,11,
1198 "cpsib",OPC_cpsib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1199 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,93},
1202 /* 1011 1011 ssN0 0110 0000 rrrr ddN0 cccc *** cpsir @rd,@rs,rr,cc */
1205 "cpsir @rd,@rs,rr,cc",16,11,
1208 "cpsir",OPC_cpsir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1209 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,94},
1212 /* 1011 1010 ssN0 0110 0000 rrrr ddN0 cccc *** cpsirb @rd,@rs,rr,cc */
1215 "cpsirb @rd,@rs,rr,cc",8,11,
1218 "cpsirb",OPC_cpsirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),CLASS_CC
,},
1219 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,},4,4,95},
1222 /* 1011 0000 dddd 0000 *** dab rbd */
1228 "dab",OPC_dab
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
1229 {CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,96},
1232 /* 1111 dddd 0disp7 *** dbjnz rbd,disp7 */
1235 "dbjnz rbd,disp7",16,11,
1238 "dbjnz",OPC_dbjnz
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
1239 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_0DISP7
,0,0,0,0,0,0,},2,2,97},
1242 /* 0010 1011 ddN0 imm4m1 *** dec @rd,imm4m1 */
1245 "dec @rd,imm4m1",16,11,
1248 "dec",OPC_dec
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1249 {CLASS_BIT
+2,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,98},
1252 /* 0110 1011 ddN0 imm4m1 address_dst *** dec address_dst(rd),imm4m1 */
1255 "dec address_dst(rd),imm4m1",16,14,
1258 "dec",OPC_dec
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1259 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,99},
1262 /* 0110 1011 0000 imm4m1 address_dst *** dec address_dst,imm4m1 */
1265 "dec address_dst,imm4m1",16,13,
1268 "dec",OPC_dec
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1269 {CLASS_BIT
+6,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,100},
1272 /* 1010 1011 dddd imm4m1 *** dec rd,imm4m1 */
1275 "dec rd,imm4m1",16,4,
1278 "dec",OPC_dec
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1279 {CLASS_BIT
+0xa,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,101},
1282 /* 0010 1010 ddN0 imm4m1 *** decb @rd,imm4m1 */
1285 "decb @rd,imm4m1",8,11,
1288 "decb",OPC_decb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1289 {CLASS_BIT
+2,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,102},
1292 /* 0110 1010 ddN0 imm4m1 address_dst *** decb address_dst(rd),imm4m1 */
1295 "decb address_dst(rd),imm4m1",8,14,
1298 "decb",OPC_decb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1299 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,103},
1302 /* 0110 1010 0000 imm4m1 address_dst *** decb address_dst,imm4m1 */
1305 "decb address_dst,imm4m1",8,13,
1308 "decb",OPC_decb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1309 {CLASS_BIT
+6,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,104},
1312 /* 1010 1010 dddd imm4m1 *** decb rbd,imm4m1 */
1315 "decb rbd,imm4m1",8,4,
1318 "decb",OPC_decb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1319 {CLASS_BIT
+0xa,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,105},
1322 /* 0111 1100 0000 00ii *** di i2 */
1328 "di",OPC_di
,0,{CLASS_IMM
+(ARG_IMM2
),},
1329 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_00II
,0,0,0,0,0,},1,2,106},
1332 /* 0001 1011 ssN0 dddd *** div rrd,@rs */
1335 "div rrd,@rs",16,107,
1338 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1339 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,107},
1342 /* 0101 1011 0000 dddd address_src *** div rrd,address_src */
1345 "div rrd,address_src",16,107,
1348 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1349 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,108},
1352 /* 0101 1011 ssN0 dddd address_src *** div rrd,address_src(rs) */
1355 "div rrd,address_src(rs)",16,107,
1358 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1359 {CLASS_BIT
+5,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,109},
1362 /* 0001 1011 0000 dddd imm16 *** div rrd,imm16 */
1365 "div rrd,imm16",16,107,
1368 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1369 {CLASS_BIT
+1,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,110},
1372 /* 1001 1011 ssss dddd *** div rrd,rs */
1375 "div rrd,rs",16,107,
1378 "div",OPC_div
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1379 {CLASS_BIT
+9,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,111},
1382 /* 0001 1010 ssN0 dddd *** divl rqd,@rs */
1385 "divl rqd,@rs",32,744,
1388 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1389 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,112},
1392 /* 0101 1010 0000 dddd address_src *** divl rqd,address_src */
1395 "divl rqd,address_src",32,745,
1398 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1399 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,113},
1402 /* 0101 1010 ssN0 dddd address_src *** divl rqd,address_src(rs) */
1405 "divl rqd,address_src(rs)",32,746,
1408 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1409 {CLASS_BIT
+5,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,114},
1412 /* 0001 1010 0000 dddd imm32 *** divl rqd,imm32 */
1415 "divl rqd,imm32",32,744,
1418 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
1419 {CLASS_BIT
+1,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,115},
1422 /* 1001 1010 ssss dddd *** divl rqd,rrs */
1425 "divl rqd,rrs",32,744,
1428 "divl",OPC_divl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
1429 {CLASS_BIT
+9,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,116},
1432 /* 1111 dddd 1disp7 *** djnz rd,disp7 */
1435 "djnz rd,disp7",16,11,
1438 "djnz",OPC_djnz
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
1439 {CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_1DISP7
,0,0,0,0,0,0,},2,2,117},
1442 /* 0111 1100 0000 01ii *** ei i2 */
1448 "ei",OPC_ei
,0,{CLASS_IMM
+(ARG_IMM2
),},
1449 {CLASS_BIT
+7,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_01II
,0,0,0,0,0,},1,2,118},
1452 /* 0010 1101 ssN0 dddd *** ex rd,@rs */
1458 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1459 {CLASS_BIT
+2,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,119},
1462 /* 0110 1101 0000 dddd address_src *** ex rd,address_src */
1465 "ex rd,address_src",16,15,
1468 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1469 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,120},
1472 /* 0110 1101 ssN0 dddd address_src *** ex rd,address_src(rs) */
1475 "ex rd,address_src(rs)",16,16,
1478 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1479 {CLASS_BIT
+6,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,121},
1482 /* 1010 1101 ssss dddd *** ex rd,rs */
1488 "ex",OPC_ex
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1489 {CLASS_BIT
+0xa,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,122},
1492 /* 0010 1100 ssN0 dddd *** exb rbd,@rs */
1498 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1499 {CLASS_BIT
+2,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,123},
1502 /* 0110 1100 0000 dddd address_src *** exb rbd,address_src */
1505 "exb rbd,address_src",8,15,
1508 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1509 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,124},
1512 /* 0110 1100 ssN0 dddd address_src *** exb rbd,address_src(rs) */
1515 "exb rbd,address_src(rs)",8,16,
1518 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1519 {CLASS_BIT
+6,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,125},
1522 /* 1010 1100 ssss dddd *** exb rbd,rbs */
1528 "exb",OPC_exb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
1529 {CLASS_BIT
+0xa,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,126},
1532 /* 0000 1110 imm8 *** ext0e imm8 */
1538 "ext0e",OPC_ext0e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1539 {CLASS_BIT
+0,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,127},
1542 /* 0000 1111 imm8 *** ext0f imm8 */
1548 "ext0f",OPC_ext0f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1549 {CLASS_BIT
+0,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,128},
1552 /* 1000 1110 imm8 *** ext8e imm8 */
1558 "ext8e",OPC_ext8e
,0,{CLASS_IMM
+(ARG_IMM8
),},
1559 {CLASS_BIT
+8,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,129},
1562 /* 1000 1111 imm8 *** ext8f imm8 */
1568 "ext8f",OPC_ext8f
,0,{CLASS_IMM
+(ARG_IMM8
),},
1569 {CLASS_BIT
+8,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,130},
1572 /* 1011 0001 dddd 1010 *** exts rrd */
1578 "exts",OPC_exts
,0,{CLASS_REG_LONG
+(ARG_RD
),},
1579 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xa,0,0,0,0,0,},1,2,131},
1582 /* 1011 0001 dddd 0000 *** extsb rd */
1588 "extsb",OPC_extsb
,0,{CLASS_REG_WORD
+(ARG_RD
),},
1589 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,0,0,0,0,0,},1,2,132},
1592 /* 1011 0001 dddd 0111 *** extsl rqd */
1598 "extsl",OPC_extsl
,0,{CLASS_REG_QUAD
+(ARG_RD
),},
1599 {CLASS_BIT
+0xb,CLASS_BIT
+1,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,0,0,0,0,0,},1,2,133},
1602 /* 0111 1010 0000 0000 *** halt */
1608 "halt",OPC_halt
,0,{0},
1609 {CLASS_BIT
+7,CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,134},
1612 /* 0011 1101 ssN0 dddd *** in rd,@rs */
1618 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1619 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,135},
1622 /* 0011 1101 dddd 0100 imm16 *** in rd,imm16 */
1625 "in rd,imm16",16,12,
1628 "in",OPC_in
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1629 {CLASS_BIT
+3,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,136},
1632 /* 0011 1100 ssN0 dddd *** inb rbd,@rs */
1638 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1639 {CLASS_BIT
+3,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,137},
1642 /* 0011 1010 dddd 0100 imm16 *** inb rbd,imm16 */
1645 "inb rbd,imm16",8,10,
1648 "inb",OPC_inb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1649 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,138},
1652 /* 0010 1001 ddN0 imm4m1 *** inc @rd,imm4m1 */
1655 "inc @rd,imm4m1",16,11,
1658 "inc",OPC_inc
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1659 {CLASS_BIT
+2,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,139},
1662 /* 0110 1001 ddN0 imm4m1 address_dst *** inc address_dst(rd),imm4m1 */
1665 "inc address_dst(rd),imm4m1",16,14,
1668 "inc",OPC_inc
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1669 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,140},
1672 /* 0110 1001 0000 imm4m1 address_dst *** inc address_dst,imm4m1 */
1675 "inc address_dst,imm4m1",16,13,
1678 "inc",OPC_inc
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1679 {CLASS_BIT
+6,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,141},
1682 /* 1010 1001 dddd imm4m1 *** inc rd,imm4m1 */
1685 "inc rd,imm4m1",16,4,
1688 "inc",OPC_inc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1689 {CLASS_BIT
+0xa,CLASS_BIT
+9,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,142},
1692 /* 0010 1000 ddN0 imm4m1 *** incb @rd,imm4m1 */
1695 "incb @rd,imm4m1",8,11,
1698 "incb",OPC_incb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1699 {CLASS_BIT
+2,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,143},
1702 /* 0110 1000 ddN0 imm4m1 address_dst *** incb address_dst(rd),imm4m1 */
1705 "incb address_dst(rd),imm4m1",8,14,
1708 "incb",OPC_incb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1709 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,144},
1712 /* 0110 1000 0000 imm4m1 address_dst *** incb address_dst,imm4m1 */
1715 "incb address_dst,imm4m1",8,13,
1718 "incb",OPC_incb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4M1
),},
1719 {CLASS_BIT
+6,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4M1
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,145},
1722 /* 1010 1000 dddd imm4m1 *** incb rbd,imm4m1 */
1725 "incb rbd,imm4m1",8,4,
1728 "incb",OPC_incb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),},
1729 {CLASS_BIT
+0xa,CLASS_BIT
+8,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4M1
),0,0,0,0,0,},2,2,146},
1732 /* 0011 1011 ssN0 1000 0000 aaaa ddN0 1000 *** ind @rd,@rs,ra */
1735 "ind @rd,@rs,ra",16,21,
1738 "ind",OPC_ind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1739 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,147},
1742 /* 0011 1010 ssN0 1000 0000 aaaa ddN0 1000 *** indb @rd,@rs,rba */
1745 "indb @rd,@rs,rba",8,21,
1748 "indb",OPC_indb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
1749 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,148},
1752 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 1000 *** inib @rd,@rs,ra */
1755 "inib @rd,@rs,ra",8,21,
1758 "inib",OPC_inib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1759 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,149},
1762 /* 0011 1010 ssN0 0000 0000 aaaa ddN0 0000 *** inibr @rd,@rs,ra */
1765 "inibr @rd,@rs,ra",16,21,
1768 "inibr",OPC_inibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
1769 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,150},
1772 /* 0111 1011 0000 0000 *** iret */
1778 "iret",OPC_iret
,0,{0},
1779 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0,0,0,0,0,0,},0,2,151},
1782 /* 0001 1110 ddN0 cccc *** jp cc,@rd */
1788 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_IR
+(ARG_RD
),},
1789 {CLASS_BIT
+1,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,152},
1792 /* 0101 1110 0000 cccc address_dst *** jp cc,address_dst */
1795 "jp cc,address_dst",16,7,
1798 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_DA
+(ARG_DST
),},
1799 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,153},
1802 /* 0101 1110 ddN0 cccc address_dst *** jp cc,address_dst(rd) */
1805 "jp cc,address_dst(rd)",16,8,
1808 "jp",OPC_jp
,0,{CLASS_CC
,CLASS_X
+(ARG_RD
),},
1809 {CLASS_BIT
+5,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_CC
,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,154},
1812 /* 1110 cccc disp8 *** jr cc,disp8 */
1818 "jr",OPC_jr
,0,{CLASS_CC
,CLASS_DISP
,},
1819 {CLASS_BIT
+0xe,CLASS_CC
,CLASS_DISP8
,0,0,0,0,0,0,},2,2,155},
1822 /* 0000 1101 ddN0 0101 imm16 *** ld @rd,imm16 */
1825 "ld @rd,imm16",16,7,
1828 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1829 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,156},
1832 /* 0010 1111 ddN0 ssss *** ld @rd,rs */
1838 "ld",OPC_ld
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1839 {CLASS_BIT
+2,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,157},
1842 /* 0100 1101 ddN0 0101 address_dst imm16 *** ld address_dst(rd),imm16 */
1845 "ld address_dst(rd),imm16",16,15,
1848 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1849 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,158},
1852 /* 0110 1111 ddN0 ssss address_dst *** ld address_dst(rd),rs */
1855 "ld address_dst(rd),rs",16,12,
1858 "ld",OPC_ld
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1859 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,159},
1862 /* 0100 1101 0000 0101 address_dst imm16 *** ld address_dst,imm16 */
1865 "ld address_dst,imm16",16,14,
1868 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),},
1869 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM16
),0,0,0,},2,6,160},
1872 /* 0110 1111 0000 ssss address_dst *** ld address_dst,rs */
1875 "ld address_dst,rs",16,11,
1878 "ld",OPC_ld
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),},
1879 {CLASS_BIT
+6,CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,161},
1882 /* 0011 0011 ddN0 ssss imm16 *** ld rd(imm16),rs */
1885 "ld rd(imm16),rs",16,14,
1888 "ld",OPC_ld
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1889 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,162},
1892 /* 0111 0011 ddN0 ssss 0000 xxxx 0000 0000 *** ld rd(rx),rs */
1895 "ld rd(rx),rs",16,14,
1898 "ld",OPC_ld
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1899 {CLASS_BIT
+7,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,163},
1902 /* 0010 0001 ssN0 dddd *** ld rd,@rs */
1908 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
1909 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,164},
1912 /* 0110 0001 0000 dddd address_src *** ld rd,address_src */
1915 "ld rd,address_src",16,9,
1918 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1919 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,165},
1922 /* 0110 0001 ssN0 dddd address_src *** ld rd,address_src(rs) */
1925 "ld rd,address_src(rs)",16,10,
1928 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1929 {CLASS_BIT
+6,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,166},
1932 /* 0010 0001 0000 dddd imm16 *** ld rd,imm16 */
1938 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
1939 {CLASS_BIT
+2,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,167},
1942 /* 1010 0001 ssss dddd *** ld rd,rs */
1948 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
1949 {CLASS_BIT
+0xa,CLASS_BIT
+1,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,168},
1952 /* 0011 0001 ssN0 dddd imm16 *** ld rd,rs(imm16) */
1955 "ld rd,rs(imm16)",16,14,
1958 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1959 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,169},
1962 /* 0111 0001 ssN0 dddd 0000 xxxx 0000 0000 *** ld rd,rs(rx) */
1965 "ld rd,rs(rx)",16,14,
1968 "ld",OPC_ld
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
1969 {CLASS_BIT
+7,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,170},
1972 /* 0111 0110 0000 dddd address_src *** lda prd,address_src */
1975 "lda prd,address_src",16,12,
1978 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
1979 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,171},
1982 /* 0111 0110 ssN0 dddd address_src *** lda prd,address_src(rs) */
1985 "lda prd,address_src(rs)",16,13,
1988 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
1989 {CLASS_BIT
+7,CLASS_BIT
+6,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,172},
1992 /* 0011 0100 ssN0 dddd imm16 *** lda prd,rs(imm16) */
1995 "lda prd,rs(imm16)",16,15,
1998 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
1999 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,173},
2002 /* 0111 0100 ssN0 dddd 0000 xxxx 0000 0000 *** lda prd,rs(rx) */
2005 "lda prd,rs(rx)",16,15,
2008 "lda",OPC_lda
,0,{CLASS_PR
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2009 {CLASS_BIT
+7,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,174},
2012 /* 0011 0100 0000 dddd disp16 *** ldar prd,disp16 */
2015 "ldar prd,disp16",16,15,
2018 "ldar",OPC_ldar
,0,{CLASS_PR
+(ARG_RD
),CLASS_DISP
,},
2019 {CLASS_BIT
+3,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,175},
2022 /* 0000 1100 ddN0 0101 imm8 imm8 *** ldb @rd,imm8 */
2028 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2029 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,176},
2032 /* 0010 1110 ddN0 ssss *** ldb @rd,rbs */
2038 "ldb",OPC_ldb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2039 {CLASS_BIT
+2,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,177},
2042 /* 0100 1100 ddN0 0101 address_dst imm8 imm8 *** ldb address_dst(rd),imm8 */
2045 "ldb address_dst(rd),imm8",8,15,
2048 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2049 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,178},
2052 /* 0110 1110 ddN0 ssss address_dst *** ldb address_dst(rd),rbs */
2055 "ldb address_dst(rd),rbs",8,12,
2058 "ldb",OPC_ldb
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2059 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,179},
2062 /* 0100 1100 0000 0101 address_dst imm8 imm8 *** ldb address_dst,imm8 */
2065 "ldb address_dst,imm8",8,14,
2068 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),},
2069 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+5,CLASS_ADDRESS
+(ARG_DST
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,},2,6,180},
2072 /* 0110 1110 0000 ssss address_dst *** ldb address_dst,rbs */
2075 "ldb address_dst,rbs",8,11,
2078 "ldb",OPC_ldb
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_BYTE
+(ARG_RS
),},
2079 {CLASS_BIT
+6,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,181},
2082 /* 0010 0000 ssN0 dddd *** ldb rbd,@rs */
2088 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2089 {CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,182},
2092 /* 0110 0000 0000 dddd address_src *** ldb rbd,address_src */
2095 "ldb rbd,address_src",8,9,
2098 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2099 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,183},
2102 /* 0110 0000 ssN0 dddd address_src *** ldb rbd,address_src(rs) */
2105 "ldb rbd,address_src(rs)",8,10,
2108 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2109 {CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,184},
2112 /* 1100 dddd imm8 *** ldb rbd,imm8 */
2118 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2119 {CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},2,2,185},
2122 /* 1010 0000 ssss dddd *** ldb rbd,rbs */
2128 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2129 {CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,186},
2132 /* 0011 0000 ssN0 dddd imm16 *** ldb rbd,rs(imm16) */
2135 "ldb rbd,rs(imm16)",8,14,
2138 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2139 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,187},
2142 /* 0111 0000 ssN0 dddd 0000 xxxx 0000 0000 *** ldb rbd,rs(rx) */
2145 "ldb rbd,rs(rx)",8,14,
2148 "ldb",OPC_ldb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2149 {CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,188},
2152 /* 0011 0010 ddN0 ssss imm16 *** ldb rd(imm16),rbs */
2155 "ldb rd(imm16),rbs",8,14,
2158 "ldb",OPC_ldb
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2159 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,189},
2162 /* 0111 0010 ddN0 ssss 0000 xxxx 0000 0000 *** ldb rd(rx),rbs */
2165 "ldb rd(rx),rbs",8,14,
2168 "ldb",OPC_ldb
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2169 {CLASS_BIT
+7,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,190},
2172 /* 0111 1101 ssss 1ccc *** ldctl ctrl,rs */
2175 "ldctl ctrl,rs",32,7,
2178 "ldctl",OPC_ldctl
,0,{CLASS_CTRL
,CLASS_REG_WORD
+(ARG_RS
),},
2179 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RS
),CLASS_1CCC
,0,0,0,0,0,},2,2,191},
2182 /* 0111 1101 dddd 0ccc *** ldctl rd,ctrl */
2185 "ldctl rd,ctrl",32,7,
2188 "ldctl",OPC_ldctl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_CTRL
,},
2189 {CLASS_BIT
+7,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_0CCC
,0,0,0,0,0,},2,2,192},
2192 /* 1000 1100 ssss 1001 *** ldctlb ctrl,rbs */
2195 "ldctlb ctrl,rbs",32,7,
2198 "ldctlb",OPC_ldctlb
,0,{CLASS_CTRL
,CLASS_REG_BYTE
+(ARG_RS
),},
2199 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RS
),CLASS_BIT
+9,0,0,0,0,0,},2,2,193},
2202 /* 1000 1100 dddd 0001 *** ldctlb rbd,ctrl */
2205 "ldctlb rbd,ctrl",32,7,
2208 "ldctlb",OPC_ldctlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_CTRL
,},
2209 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,0,0,0,0,0,},2,2,194},
2212 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 1000 *** ldd @rd,@rs,rr */
2215 "ldd @rd,@rs,rr",16,11,
2218 "ldd",OPC_ldd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2219 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,195},
2222 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 1000 *** lddb @rd,@rs,rr */
2225 "lddb @rd,@rs,rr",8,11,
2228 "lddb",OPC_lddb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2229 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,196},
2232 /* 1011 1011 ssN0 1001 0000 rrrr ddN0 0000 *** lddr @rd,@rs,rr */
2235 "lddr @rd,@rs,rr",16,11,
2238 "lddr",OPC_lddr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2239 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,197},
2242 /* 1011 1010 ssN0 1001 0000 rrrr ddN0 0000 *** lddrb @rd,@rs,rr */
2245 "lddrb @rd,@rs,rr",8,11,
2248 "lddrb",OPC_lddrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2249 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,198},
2252 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 1000 *** ldi @rd,@rs,rr */
2255 "ldi @rd,@rs,rr",16,11,
2258 "ldi",OPC_ldi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2259 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,199},
2262 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 1000 *** ldib @rd,@rs,rr */
2265 "ldib @rd,@rs,rr",8,11,
2268 "ldib",OPC_ldib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2269 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,200},
2272 /* 1011 1011 ssN0 0001 0000 rrrr ddN0 0000 *** ldir @rd,@rs,rr */
2275 "ldir @rd,@rs,rr",16,11,
2278 "ldir",OPC_ldir
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2279 {CLASS_BIT
+0xb,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,201},
2282 /* 1011 1010 ssN0 0001 0000 rrrr ddN0 0000 *** ldirb @rd,@rs,rr */
2285 "ldirb @rd,@rs,rr",8,11,
2288 "ldirb",OPC_ldirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RR
),},
2289 {CLASS_BIT
+0xb,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,202},
2292 /* 1011 1101 dddd imm4 *** ldk rd,imm4 */
2298 "ldk",OPC_ldk
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
2299 {CLASS_BIT
+0xb,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,203},
2302 /* 0001 1101 ddN0 ssss *** ldl @rd,rrs */
2305 "ldl @rd,rrs",32,11,
2308 "ldl",OPC_ldl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2309 {CLASS_BIT
+1,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,204},
2312 /* 0101 1101 ddN0 ssss address_dst *** ldl address_dst(rd),rrs */
2315 "ldl address_dst(rd),rrs",32,14,
2318 "ldl",OPC_ldl
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2319 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,205},
2322 /* 0101 1101 0000 ssss address_dst *** ldl address_dst,rrs */
2325 "ldl address_dst,rrs",32,15,
2328 "ldl",OPC_ldl
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_LONG
+(ARG_RS
),},
2329 {CLASS_BIT
+5,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,206},
2332 /* 0011 0111 ddN0 ssss imm16 *** ldl rd(imm16),rrs */
2335 "ldl rd(imm16),rrs",32,17,
2338 "ldl",OPC_ldl
,0,{CLASS_BA
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2339 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,207},
2342 /* 0111 0111 ddN0 ssss 0000 xxxx 0000 0000 *** ldl rd(rx),rrs */
2345 "ldl rd(rx),rrs",32,17,
2348 "ldl",OPC_ldl
,0,{CLASS_BX
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2349 {CLASS_BIT
+7,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,208},
2352 /* 0001 0100 ssN0 dddd *** ldl rrd,@rs */
2355 "ldl rrd,@rs",32,11,
2358 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2359 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,209},
2362 /* 0101 0100 0000 dddd address_src *** ldl rrd,address_src */
2365 "ldl rrd,address_src",32,12,
2368 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2369 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,210},
2372 /* 0101 0100 ssN0 dddd address_src *** ldl rrd,address_src(rs) */
2375 "ldl rrd,address_src(rs)",32,13,
2378 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2379 {CLASS_BIT
+5,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,211},
2382 /* 0001 0100 0000 dddd imm32 *** ldl rrd,imm32 */
2385 "ldl rrd,imm32",32,11,
2388 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2389 {CLASS_BIT
+1,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,212},
2392 /* 1001 0100 ssss dddd *** ldl rrd,rrs */
2398 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2399 {CLASS_BIT
+9,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,213},
2402 /* 0011 0101 ssN0 dddd imm16 *** ldl rrd,rs(imm16) */
2405 "ldl rrd,rs(imm16)",32,17,
2408 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BA
+(ARG_RS
),},
2409 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,214},
2412 /* 0111 0101 ssN0 dddd 0000 xxxx 0000 0000 *** ldl rrd,rs(rx) */
2415 "ldl rrd,rs(rx)",32,17,
2418 "ldl",OPC_ldl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_BX
+(ARG_RS
),},
2419 {CLASS_BIT
+7,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_REG
+(ARG_RX
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,215},
2422 /* 0001 1100 ddN0 1001 0000 ssss 0000 nminus1 *** ldm @rd,rs,n */
2425 "ldm @rd,rs,n",16,11,
2428 "ldm",OPC_ldm
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2429 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),0,},3,4,216},
2432 /* 0101 1100 ddN0 1001 0000 ssss 0000 nminus1 address_dst *** ldm address_dst(rd),rs,n */
2435 "ldm address_dst(rd),rs,n",16,15,
2438 "ldm",OPC_ldm
,0,{CLASS_X
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2439 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,217},
2442 /* 0101 1100 0000 1001 0000 ssss 0000 nminus1 address_dst *** ldm address_dst,rs,n */
2445 "ldm address_dst,rs,n",16,14,
2448 "ldm",OPC_ldm
,0,{CLASS_DA
+(ARG_DST
),CLASS_REG_WORD
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2449 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_DST
),},3,6,218},
2452 /* 0001 1100 ssN0 0001 0000 dddd 0000 nminus1 *** ldm rd,@rs,n */
2455 "ldm rd,@rs,n",16,11,
2458 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2459 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),0,},3,4,219},
2462 /* 0101 1100 ssN0 0001 0000 dddd 0000 nminus1 address_src *** ldm rd,address_src(rs),n */
2465 "ldm rd,address_src(rs),n",16,15,
2468 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),CLASS_IMM
+ (ARG_IMMN
),},
2469 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,220},
2472 /* 0101 1100 0000 0001 0000 dddd 0000 nminus1 address_src *** ldm rd,address_src,n */
2475 "ldm rd,address_src,n",16,14,
2478 "ldm",OPC_ldm
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),CLASS_IMM
+ (ARG_IMMN
),},
2479 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_IMM
+(ARG_IMMNMINUS1
),CLASS_ADDRESS
+(ARG_SRC
),},3,6,221},
2482 /* 0011 1001 ssN0 0000 *** ldps @rs */
2488 "ldps",OPC_ldps
,0,{CLASS_IR
+(ARG_RS
),},
2489 {CLASS_BIT
+3,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,0,0,0,0,},1,2,222},
2492 /* 0111 1001 0000 0000 address_src *** ldps address_src */
2495 "ldps address_src",16,16,
2498 "ldps",OPC_ldps
,0,{CLASS_DA
+(ARG_SRC
),},
2499 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,223},
2502 /* 0111 1001 ssN0 0000 address_src *** ldps address_src(rs) */
2505 "ldps address_src(rs)",16,17,
2508 "ldps",OPC_ldps
,0,{CLASS_X
+(ARG_RS
),},
2509 {CLASS_BIT
+7,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},1,4,224},
2512 /* 0011 0011 0000 ssss disp16 *** ldr disp16,rs */
2515 "ldr disp16,rs",16,14,
2518 "ldr",OPC_ldr
,0,{CLASS_DISP
,CLASS_REG_WORD
+(ARG_RS
),},
2519 {CLASS_BIT
+3,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,225},
2522 /* 0011 0001 0000 dddd disp16 *** ldr rd,disp16 */
2525 "ldr rd,disp16",16,14,
2528 "ldr",OPC_ldr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DISP
,},
2529 {CLASS_BIT
+3,CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,226},
2532 /* 0011 0010 0000 ssss disp16 *** ldrb disp16,rbs */
2535 "ldrb disp16,rbs",8,14,
2538 "ldrb",OPC_ldrb
,0,{CLASS_DISP
,CLASS_REG_BYTE
+(ARG_RS
),},
2539 {CLASS_BIT
+3,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,227},
2542 /* 0011 0000 0000 dddd disp16 *** ldrb rbd,disp16 */
2545 "ldrb rbd,disp16",8,14,
2548 "ldrb",OPC_ldrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DISP
,},
2549 {CLASS_BIT
+3,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,228},
2552 /* 0011 0111 0000 ssss disp16 *** ldrl disp16,rrs */
2555 "ldrl disp16,rrs",32,17,
2558 "ldrl",OPC_ldrl
,0,{CLASS_DISP
,CLASS_REG_LONG
+(ARG_RS
),},
2559 {CLASS_BIT
+3,CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,229},
2562 /* 0011 0101 0000 dddd disp16 *** ldrl rrd,disp16 */
2565 "ldrl rrd,disp16",32,17,
2568 "ldrl",OPC_ldrl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DISP
,},
2569 {CLASS_BIT
+3,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_DISP
+(ARG_DISP16
),0,0,0,0,},2,4,230},
2572 /* 0111 1011 0000 1010 *** mbit */
2578 "mbit",OPC_mbit
,0,{0},
2579 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+0xa,0,0,0,0,0,},0,2,231},
2582 /* 0111 1011 dddd 1101 *** mreq rd */
2588 "mreq",OPC_mreq
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2589 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,0,0,0,0,0,},1,2,232},
2592 /* 0111 1011 0000 1001 *** mres */
2598 "mres",OPC_mres
,0,{0},
2599 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+9,0,0,0,0,0,},0,2,233},
2602 /* 0111 1011 0000 1000 *** mset */
2608 "mset",OPC_mset
,0,{0},
2609 {CLASS_BIT
+7,CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_BIT
+8,0,0,0,0,0,},0,2,234},
2612 /* 0001 1001 ssN0 dddd *** mult rrd,@rs */
2615 "mult rrd,@rs",16,70,
2618 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2619 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,235},
2622 /* 0101 1001 0000 dddd address_src *** mult rrd,address_src */
2625 "mult rrd,address_src",16,70,
2628 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2629 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,236},
2632 /* 0101 1001 ssN0 dddd address_src *** mult rrd,address_src(rs) */
2635 "mult rrd,address_src(rs)",16,70,
2638 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2639 {CLASS_BIT
+5,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,237},
2642 /* 0001 1001 0000 dddd imm16 *** mult rrd,imm16 */
2645 "mult rrd,imm16",16,70,
2648 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2649 {CLASS_BIT
+1,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,238},
2652 /* 1001 1001 ssss dddd *** mult rrd,rs */
2655 "mult rrd,rs",16,70,
2658 "mult",OPC_mult
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2659 {CLASS_BIT
+9,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,239},
2662 /* 0001 1000 ssN0 dddd *** multl rqd,@rs */
2665 "multl rqd,@rs",32,282,
2668 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2669 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,240},
2672 /* 0101 1000 0000 dddd address_src *** multl rqd,address_src */
2675 "multl rqd,address_src",32,282,
2678 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2679 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,241},
2682 /* 0101 1000 ssN0 dddd address_src *** multl rqd,address_src(rs) */
2685 "multl rqd,address_src(rs)",32,282,
2688 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2689 {CLASS_BIT
+5,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,242},
2692 /* 0001 1000 0000 dddd imm32 *** multl rqd,imm32 */
2695 "multl rqd,imm32",32,282,
2698 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
2699 {CLASS_BIT
+1,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,243},
2702 /* 1001 1000 ssss dddd *** multl rqd,rrs */
2705 "multl rqd,rrs",32,282,
2708 "multl",OPC_multl
,0,{CLASS_REG_QUAD
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
2709 {CLASS_BIT
+9,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,244},
2712 /* 0000 1101 ddN0 0010 *** neg @rd */
2718 "neg",OPC_neg
,0,{CLASS_IR
+(ARG_RD
),},
2719 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,245},
2722 /* 0100 1101 0000 0010 address_dst *** neg address_dst */
2725 "neg address_dst",16,15,
2728 "neg",OPC_neg
,0,{CLASS_DA
+(ARG_DST
),},
2729 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,246},
2732 /* 0100 1101 ddN0 0010 address_dst *** neg address_dst(rd) */
2735 "neg address_dst(rd)",16,16,
2738 "neg",OPC_neg
,0,{CLASS_X
+(ARG_RD
),},
2739 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,247},
2742 /* 1000 1101 dddd 0010 *** neg rd */
2748 "neg",OPC_neg
,0,{CLASS_REG_WORD
+(ARG_RD
),},
2749 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,248},
2752 /* 0000 1100 ddN0 0010 *** negb @rd */
2758 "negb",OPC_negb
,0,{CLASS_IR
+(ARG_RD
),},
2759 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,249},
2762 /* 0100 1100 0000 0010 address_dst *** negb address_dst */
2765 "negb address_dst",8,15,
2768 "negb",OPC_negb
,0,{CLASS_DA
+(ARG_DST
),},
2769 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,250},
2772 /* 0100 1100 ddN0 0010 address_dst *** negb address_dst(rd) */
2775 "negb address_dst(rd)",8,16,
2778 "negb",OPC_negb
,0,{CLASS_X
+(ARG_RD
),},
2779 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+2,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,251},
2782 /* 1000 1100 dddd 0010 *** negb rbd */
2788 "negb",OPC_negb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
2789 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+2,0,0,0,0,0,},1,2,252},
2792 /* 1000 1101 0000 0111 *** nop */
2798 "nop",OPC_nop
,0,{0},
2799 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+7,0,0,0,0,0,},0,2,253},
2802 /* 0000 0101 ssN0 dddd *** or rd,@rs */
2808 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2809 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,254},
2812 /* 0100 0101 0000 dddd address_src *** or rd,address_src */
2815 "or rd,address_src",16,9,
2818 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2819 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,255},
2822 /* 0100 0101 ssN0 dddd address_src *** or rd,address_src(rs) */
2825 "or rd,address_src(rs)",16,10,
2828 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2829 {CLASS_BIT
+4,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,256},
2832 /* 0000 0101 0000 dddd imm16 *** or rd,imm16 */
2838 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
2839 {CLASS_BIT
+0,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,257},
2842 /* 1000 0101 ssss dddd *** or rd,rs */
2848 "or",OPC_or
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2849 {CLASS_BIT
+8,CLASS_BIT
+5,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,258},
2852 /* 0000 0100 ssN0 dddd *** orb rbd,@rs */
2858 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2859 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,259},
2862 /* 0100 0100 0000 dddd address_src *** orb rbd,address_src */
2865 "orb rbd,address_src",8,9,
2868 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
2869 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,260},
2872 /* 0100 0100 ssN0 dddd address_src *** orb rbd,address_src(rs) */
2875 "orb rbd,address_src(rs)",8,10,
2878 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
2879 {CLASS_BIT
+4,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,261},
2882 /* 0000 0100 0000 dddd imm8 imm8 *** orb rbd,imm8 */
2888 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
2889 {CLASS_BIT
+0,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,262},
2892 /* 1000 0100 ssss dddd *** orb rbd,rbs */
2898 "orb",OPC_orb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2899 {CLASS_BIT
+8,CLASS_BIT
+4,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,263},
2902 /* 0011 1111 ddN0 ssss *** out @rd,rs */
2908 "out",OPC_out
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
2909 {CLASS_BIT
+3,CLASS_BIT
+0xf,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,264},
2912 /* 0011 1011 ssss 0110 imm16 *** out imm16,rs */
2915 "out imm16,rs",16,0,
2918 "out",OPC_out
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
2919 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,265},
2922 /* 0011 1110 ddN0 ssss *** outb @rd,rbs */
2928 "outb",OPC_outb
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
2929 {CLASS_BIT
+3,CLASS_BIT
+0xe,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,266},
2932 /* 0011 1010 ssss 0110 imm16 *** outb imm16,rbs */
2935 "outb imm16,rbs",8,0,
2938 "outb",OPC_outb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
2939 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,267},
2942 /* 0011 1011 ssN0 1010 0000 aaaa ddN0 1000 *** outd @rd,@rs,ra */
2945 "outd @rd,@rs,ra",16,0,
2948 "outd",OPC_outd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2949 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,268},
2952 /* 0011 1010 ssN0 1010 0000 aaaa ddN0 1000 *** outdb @rd,@rs,rba */
2955 "outdb @rd,@rs,rba",16,0,
2958 "outdb",OPC_outdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
2959 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,269},
2962 /* 0011 1011 ssN0 0010 0000 aaaa ddN0 1000 *** outi @rd,@rs,ra */
2965 "outi @rd,@rs,ra",16,0,
2968 "outi",OPC_outi
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2969 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,270},
2972 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 1000 *** outib @rd,@rs,ra */
2975 "outib @rd,@rs,ra",16,0,
2978 "outib",OPC_outib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2979 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,271},
2982 /* 0011 1010 ssN0 0010 0000 aaaa ddN0 0000 *** outibr @rd,@rs,ra */
2985 "outibr @rd,@rs,ra",16,0,
2988 "outibr",OPC_outibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
2989 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,272},
2992 /* 0001 0111 ssN0 ddN0 *** pop @rd,@rs */
2995 "pop @rd,@rs",16,12,
2998 "pop",OPC_pop
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
2999 {CLASS_BIT
+1,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,273},
3002 /* 0101 0111 ssN0 ddN0 address_dst *** pop address_dst(rd),@rs */
3005 "pop address_dst(rd),@rs",16,16,
3008 "pop",OPC_pop
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3009 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,274},
3012 /* 0101 0111 ssN0 0000 address_dst *** pop address_dst,@rs */
3015 "pop address_dst,@rs",16,16,
3018 "pop",OPC_pop
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
3019 {CLASS_BIT
+5,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,275},
3022 /* 1001 0111 ssN0 dddd *** pop rd,@rs */
3028 "pop",OPC_pop
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3029 {CLASS_BIT
+9,CLASS_BIT
+7,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,276},
3032 /* 0001 0101 ssN0 ddN0 *** popl @rd,@rs */
3035 "popl @rd,@rs",32,19,
3038 "popl",OPC_popl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3039 {CLASS_BIT
+1,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),0,0,0,0,0,},2,2,277},
3042 /* 0101 0101 ssN0 ddN0 address_dst *** popl address_dst(rd),@rs */
3045 "popl address_dst(rd),@rs",32,23,
3048 "popl",OPC_popl
,0,{CLASS_X
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3049 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REGN0
+(ARG_RD
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,278},
3052 /* 0101 0101 ssN0 0000 address_dst *** popl address_dst,@rs */
3055 "popl address_dst,@rs",32,23,
3058 "popl",OPC_popl
,0,{CLASS_DA
+(ARG_DST
),CLASS_IR
+(ARG_RS
),},
3059 {CLASS_BIT
+5,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,279},
3062 /* 1001 0101 ssN0 dddd *** popl rrd,@rs */
3065 "popl rrd,@rs",32,12,
3068 "popl",OPC_popl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3069 {CLASS_BIT
+9,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,280},
3072 /* 0001 0011 ddN0 ssN0 *** push @rd,@rs */
3075 "push @rd,@rs",16,13,
3078 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3079 {CLASS_BIT
+1,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,281},
3082 /* 0101 0011 ddN0 0000 address_src *** push @rd,address_src */
3085 "push @rd,address_src",16,14,
3088 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3089 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,282},
3092 /* 0101 0011 ddN0 ssN0 address_src *** push @rd,address_src(rs) */
3095 "push @rd,address_src(rs)",16,14,
3098 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3099 {CLASS_BIT
+5,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,283},
3102 /* 0000 1101 ddN0 1001 imm16 *** push @rd,imm16 */
3105 "push @rd,imm16",16,12,
3108 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3109 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,284},
3112 /* 1001 0011 ddN0 ssss *** push @rd,rs */
3118 "push",OPC_push
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3119 {CLASS_BIT
+9,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,285},
3122 /* 0001 0001 ddN0 ssN0 *** pushl @rd,@rs */
3125 "pushl @rd,@rs",32,20,
3128 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3129 {CLASS_BIT
+1,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),0,0,0,0,0,},2,2,286},
3132 /* 0101 0001 ddN0 0000 address_src *** pushl @rd,address_src */
3135 "pushl @rd,address_src",32,21,
3138 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3139 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,287},
3142 /* 0101 0001 ddN0 ssN0 address_src *** pushl @rd,address_src(rs) */
3145 "pushl @rd,address_src(rs)",32,21,
3148 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3149 {CLASS_BIT
+5,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REGN0
+(ARG_RS
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,288},
3152 /* 1001 0001 ddN0 ssss *** pushl @rd,rrs */
3155 "pushl @rd,rrs",32,12,
3158 "pushl",OPC_pushl
,0,{CLASS_IR
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
3159 {CLASS_BIT
+9,CLASS_BIT
+1,CLASS_REGN0
+(ARG_RD
),CLASS_REG
+(ARG_RS
),0,0,0,0,0,},2,2,289},
3162 /* 0010 0011 ddN0 imm4 *** res @rd,imm4 */
3165 "res @rd,imm4",16,11,
3168 "res",OPC_res
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3169 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,290},
3172 /* 0110 0011 ddN0 imm4 address_dst *** res address_dst(rd),imm4 */
3175 "res address_dst(rd),imm4",16,14,
3178 "res",OPC_res
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3179 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,291},
3182 /* 0110 0011 0000 imm4 address_dst *** res address_dst,imm4 */
3185 "res address_dst,imm4",16,13,
3188 "res",OPC_res
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3189 {CLASS_BIT
+6,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,292},
3192 /* 1010 0011 dddd imm4 *** res rd,imm4 */
3198 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3199 {CLASS_BIT
+0xa,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,293},
3202 /* 0010 0011 0000 ssss 0000 dddd 0000 0000 *** res rd,rs */
3208 "res",OPC_res
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3209 {CLASS_BIT
+2,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,294},
3212 /* 0010 0010 ddN0 imm4 *** resb @rd,imm4 */
3215 "resb @rd,imm4",8,11,
3218 "resb",OPC_resb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3219 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,295},
3222 /* 0110 0010 ddN0 imm4 address_dst *** resb address_dst(rd),imm4 */
3225 "resb address_dst(rd),imm4",8,14,
3228 "resb",OPC_resb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3229 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,296},
3232 /* 0110 0010 0000 imm4 address_dst *** resb address_dst,imm4 */
3235 "resb address_dst,imm4",8,13,
3238 "resb",OPC_resb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3239 {CLASS_BIT
+6,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,297},
3242 /* 1010 0010 dddd imm4 *** resb rbd,imm4 */
3245 "resb rbd,imm4",8,4,
3248 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3249 {CLASS_BIT
+0xa,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,298},
3252 /* 0010 0010 0000 ssss 0000 dddd 0000 0000 *** resb rbd,rs */
3258 "resb",OPC_resb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3259 {CLASS_BIT
+2,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,299},
3262 /* 1000 1101 flags 0011 *** resflg flags */
3265 "resflg flags",16,7,
3268 "resflg",OPC_resflg
,0,{CLASS_FLAGS
,},
3269 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+3,0,0,0,0,0,},1,2,300},
3272 /* 1001 1110 0000 cccc *** ret cc */
3278 "ret",OPC_ret
,0,{CLASS_CC
,},
3279 {CLASS_BIT
+9,CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_CC
,0,0,0,0,0,},1,2,301},
3282 /* 1011 0011 dddd 00I0 *** rl rd,imm1or2 */
3285 "rl rd,imm1or2",16,6,
3288 "rl",OPC_rl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3289 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,302},
3292 /* 1011 0010 dddd 00I0 *** rlb rbd,imm1or2 */
3295 "rlb rbd,imm1or2",8,6,
3298 "rlb",OPC_rlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3299 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0,0,0,0,0,0,},2,2,303},
3302 /* 1011 0011 dddd 10I0 *** rlc rd,imm1or2 */
3305 "rlc rd,imm1or2",16,6,
3308 "rlc",OPC_rlc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3309 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,304},
3312 /* 1011 0010 dddd 10I0 *** rlcb rbd,imm1or2 */
3315 "rlcb rbd,imm1or2",8,9,
3318 "rlcb",OPC_rlcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3319 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+8,0,0,0,0,0,},2,2,305},
3322 /* 1011 1110 aaaa bbbb *** rldb rbb,rba */
3328 "rldb",OPC_rldb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
3329 {CLASS_BIT
+0xb,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,306},
3332 /* 1011 0011 dddd 01I0 *** rr rd,imm1or2 */
3335 "rr rd,imm1or2",16,6,
3338 "rr",OPC_rr
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3339 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,307},
3342 /* 1011 0010 dddd 01I0 *** rrb rbd,imm1or2 */
3345 "rrb rbd,imm1or2",8,6,
3348 "rrb",OPC_rrb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3349 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+4,0,0,0,0,0,},2,2,308},
3352 /* 1011 0011 dddd 11I0 *** rrc rd,imm1or2 */
3355 "rrc rd,imm1or2",16,6,
3358 "rrc",OPC_rrc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3359 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,309},
3362 /* 1011 0010 dddd 11I0 *** rrcb rbd,imm1or2 */
3365 "rrcb rbd,imm1or2",8,9,
3368 "rrcb",OPC_rrcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM1OR2
),},
3369 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT_1OR2
+0xc,0,0,0,0,0,},2,2,310},
3372 /* 1011 1100 aaaa bbbb *** rrdb rbb,rba */
3378 "rrdb",OPC_rrdb
,0,{CLASS_REG_BYTE
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RA
),},
3379 {CLASS_BIT
+0xb,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RA
),CLASS_REG
+(ARG_RB
),0,0,0,0,0,},2,2,311},
3382 /* 0011 0110 imm8 *** rsvd36 */
3388 "rsvd36",OPC_rsvd36
,0,{0},
3389 {CLASS_BIT
+3,CLASS_BIT
+6,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,312},
3392 /* 0011 1000 imm8 *** rsvd38 */
3398 "rsvd38",OPC_rsvd38
,0,{0},
3399 {CLASS_BIT
+3,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,313},
3402 /* 0111 1000 imm8 *** rsvd78 */
3408 "rsvd78",OPC_rsvd78
,0,{0},
3409 {CLASS_BIT
+7,CLASS_BIT
+8,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,314},
3412 /* 0111 1110 imm8 *** rsvd7e */
3418 "rsvd7e",OPC_rsvd7e
,0,{0},
3419 {CLASS_BIT
+7,CLASS_BIT
+0xe,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,315},
3422 /* 1001 1101 imm8 *** rsvd9d */
3428 "rsvd9d",OPC_rsvd9d
,0,{0},
3429 {CLASS_BIT
+9,CLASS_BIT
+0xd,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,316},
3432 /* 1001 1111 imm8 *** rsvd9f */
3438 "rsvd9f",OPC_rsvd9f
,0,{0},
3439 {CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,317},
3442 /* 1011 1001 imm8 *** rsvdb9 */
3448 "rsvdb9",OPC_rsvdb9
,0,{0},
3449 {CLASS_BIT
+0xb,CLASS_BIT
+9,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,318},
3452 /* 1011 1111 imm8 *** rsvdbf */
3458 "rsvdbf",OPC_rsvdbf
,0,{0},
3459 {CLASS_BIT
+0xb,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},0,2,319},
3462 /* 1011 0111 ssss dddd *** sbc rd,rs */
3468 "sbc",OPC_sbc
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3469 {CLASS_BIT
+0xb,CLASS_BIT
+7,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,320},
3472 /* 1011 0110 ssss dddd *** sbcb rbd,rbs */
3478 "sbcb",OPC_sbcb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3479 {CLASS_BIT
+0xb,CLASS_BIT
+6,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,321},
3482 /* 0111 1111 imm8 *** sc imm8 */
3488 "sc",OPC_sc
,0,{CLASS_IMM
+(ARG_IMM8
),},
3489 {CLASS_BIT
+7,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_IMM8
),0,0,0,0,0,0,},1,2,322},
3492 /* 1011 0011 dddd 1011 0000 ssss 0000 0000 *** sda rd,rs */
3498 "sda",OPC_sda
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3499 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,323},
3502 /* 1011 0010 dddd 1011 0000 ssss 0000 0000 *** sdab rbd,rs */
3508 "sdab",OPC_sdab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3509 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,324},
3512 /* 1011 0011 dddd 1111 0000 ssss 0000 0000 *** sdal rrd,rs */
3515 "sdal rrd,rs",32,15,
3518 "sdal",OPC_sdal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3519 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xf,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,325},
3522 /* 1011 0011 dddd 0011 0000 ssss 0000 0000 *** sdl rd,rs */
3528 "sdl",OPC_sdl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3529 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,326},
3532 /* 1011 0010 dddd 0011 0000 ssss 0000 0000 *** sdlb rbd,rs */
3538 "sdlb",OPC_sdlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3539 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,327},
3542 /* 1011 0011 dddd 0111 0000 ssss 0000 0000 *** sdll rrd,rs */
3545 "sdll rrd,rs",32,15,
3548 "sdll",OPC_sdll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3549 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+7,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,328},
3552 /* 0010 0101 ddN0 imm4 *** set @rd,imm4 */
3555 "set @rd,imm4",16,11,
3558 "set",OPC_set
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3559 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,329},
3562 /* 0110 0101 ddN0 imm4 address_dst *** set address_dst(rd),imm4 */
3565 "set address_dst(rd),imm4",16,14,
3568 "set",OPC_set
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3569 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,330},
3572 /* 0110 0101 0000 imm4 address_dst *** set address_dst,imm4 */
3575 "set address_dst,imm4",16,13,
3578 "set",OPC_set
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3579 {CLASS_BIT
+6,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,331},
3582 /* 1010 0101 dddd imm4 *** set rd,imm4 */
3588 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3589 {CLASS_BIT
+0xa,CLASS_BIT
+5,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,332},
3592 /* 0010 0101 0000 ssss 0000 dddd 0000 0000 *** set rd,rs */
3598 "set",OPC_set
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3599 {CLASS_BIT
+2,CLASS_BIT
+5,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,333},
3602 /* 0010 0100 ddN0 imm4 *** setb @rd,imm4 */
3605 "setb @rd,imm4",8,11,
3608 "setb",OPC_setb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3609 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,334},
3612 /* 0110 0100 ddN0 imm4 address_dst *** setb address_dst(rd),imm4 */
3615 "setb address_dst(rd),imm4",8,14,
3618 "setb",OPC_setb
,0,{CLASS_X
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3619 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_REGN0
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,335},
3622 /* 0110 0100 0000 imm4 address_dst *** setb address_dst,imm4 */
3625 "setb address_dst,imm4",8,13,
3628 "setb",OPC_setb
,0,{CLASS_DA
+(ARG_DST
),CLASS_IMM
+(ARG_IMM4
),},
3629 {CLASS_BIT
+6,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM4
),CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},2,4,336},
3632 /* 1010 0100 dddd imm4 *** setb rbd,imm4 */
3635 "setb rbd,imm4",8,4,
3638 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),},
3639 {CLASS_BIT
+0xa,CLASS_BIT
+4,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM4
),0,0,0,0,0,},2,2,337},
3642 /* 0010 0100 0000 ssss 0000 dddd 0000 0000 *** setb rbd,rs */
3648 "setb",OPC_setb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3649 {CLASS_BIT
+2,CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RS
),CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,0,},2,4,338},
3652 /* 1000 1101 flags 0001 *** setflg flags */
3655 "setflg flags",16,7,
3658 "setflg",OPC_setflg
,0,{CLASS_FLAGS
,},
3659 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_FLAGS
,CLASS_BIT
+1,0,0,0,0,0,},1,2,339},
3662 /* 0011 1011 dddd 0101 imm16 *** sin rd,imm16 */
3668 "sin",OPC_sin
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3669 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,340},
3672 /* 0011 1010 dddd 0101 imm16 *** sinb rbd,imm16 */
3675 "sinb rbd,imm16",8,0,
3678 "sinb",OPC_sinb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3679 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,341},
3682 /* 0011 1011 ssN0 1000 0001 aaaa ddN0 1000 *** sind @rd,@rs,ra */
3685 "sind @rd,@rs,ra",16,0,
3688 "sind",OPC_sind
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3689 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,342},
3692 /* 0011 1010 ssN0 1000 0001 aaaa ddN0 1000 *** sindb @rd,@rs,rba */
3695 "sindb @rd,@rs,rba",8,0,
3698 "sindb",OPC_sindb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3699 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+8,CLASS_BIT
+1,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,343},
3702 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 1000 *** sinib @rd,@rs,ra */
3705 "sinib @rd,@rs,ra",8,0,
3708 "sinib",OPC_sinib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3709 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,344},
3712 /* 0011 1010 ssN0 0001 0000 aaaa ddN0 0000 *** sinibr @rd,@rs,ra */
3715 "sinibr @rd,@rs,ra",16,0,
3718 "sinibr",OPC_sinibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3719 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,345},
3722 /* 1011 0011 dddd 1001 0000 0000 imm8 *** sla rd,imm8 */
3725 "sla rd,imm8",16,13,
3728 "sla",OPC_sla
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3729 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,346},
3732 /* 1011 0010 dddd 1001 0000 0000 imm8 *** slab rbd,imm8 */
3735 "slab rbd,imm8",8,13,
3738 "slab",OPC_slab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3739 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,347},
3742 /* 1011 0011 dddd 1101 0000 0000 imm8 *** slal rrd,imm8 */
3745 "slal rrd,imm8",32,13,
3748 "slal",OPC_slal
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3749 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,348},
3752 /* 1011 0011 dddd 0001 0000 0000 imm8 *** sll rd,imm8 */
3755 "sll rd,imm8",16,13,
3758 "sll",OPC_sll
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3759 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,349},
3762 /* 1011 0010 dddd 0001 0000 0000 imm8 *** sllb rbd,imm8 */
3765 "sllb rbd,imm8",8,13,
3768 "sllb",OPC_sllb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3769 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,350},
3772 /* 1011 0011 dddd 0101 0000 0000 imm8 *** slll rrd,imm8 */
3775 "slll rrd,imm8",32,13,
3778 "slll",OPC_slll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3779 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_IMM8
),0,0,},2,4,351},
3782 /* 0011 1011 ssss 0111 imm16 *** sout imm16,rs */
3785 "sout imm16,rs",16,0,
3788 "sout",OPC_sout
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_WORD
+(ARG_RS
),},
3789 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,352},
3792 /* 0011 1010 ssss 0111 imm16 *** soutb imm16,rbs */
3795 "soutb imm16,rbs",8,0,
3798 "soutb",OPC_soutb
,0,{CLASS_IMM
+(ARG_IMM16
),CLASS_REG_BYTE
+(ARG_RS
),},
3799 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REG
+(ARG_RS
),CLASS_BIT
+7,CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,353},
3802 /* 0011 1011 ssN0 1011 0000 aaaa ddN0 1000 *** soutd @rd,@rs,ra */
3805 "soutd @rd,@rs,ra",16,0,
3808 "soutd",OPC_soutd
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3809 {CLASS_BIT
+3,CLASS_BIT
+0xb,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,354},
3812 /* 0011 1010 ssN0 1011 0000 aaaa ddN0 1000 *** soutdb @rd,@rs,rba */
3815 "soutdb @rd,@rs,rba",8,0,
3818 "soutdb",OPC_soutdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
3819 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0xb,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,355},
3822 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 1000 *** soutib @rd,@rs,ra */
3825 "soutib @rd,@rs,ra",8,0,
3828 "soutib",OPC_soutib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3829 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,},3,4,356},
3832 /* 0011 1010 ssN0 0011 0000 aaaa ddN0 0000 *** soutibr @rd,@rs,ra */
3835 "soutibr @rd,@rs,ra",16,0,
3838 "soutibr",OPC_soutibr
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_WORD
+(ARG_RA
),},
3839 {CLASS_BIT
+3,CLASS_BIT
+0xa,CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,0,},3,4,357},
3842 /* 1011 0011 dddd 1001 1111 1111 nim8 *** sra rd,imm8 */
3845 "sra rd,imm8",16,13,
3848 "sra",OPC_sra
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3849 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,358},
3852 /* 1011 0010 dddd 1001 0000 0000 nim8 *** srab rbd,imm8 */
3855 "srab rbd,imm8",8,13,
3858 "srab",OPC_srab
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3859 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+9,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,359},
3862 /* 1011 0011 dddd 1101 1111 1111 nim8 *** sral rrd,imm8 */
3865 "sral rrd,imm8",32,13,
3868 "sral",OPC_sral
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3869 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+0xd,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,360},
3872 /* 1011 0011 dddd 0001 1111 1111 nim8 *** srl rd,imm8 */
3875 "srl rd,imm8",16,13,
3878 "srl",OPC_srl
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3879 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,361},
3882 /* 1011 0010 dddd 0001 0000 0000 nim8 *** srlb rbd,imm8 */
3885 "srlb rbd,imm8",8,13,
3888 "srlb",OPC_srlb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3889 {CLASS_BIT
+0xb,CLASS_BIT
+2,CLASS_REG
+(ARG_RD
),CLASS_BIT
+1,CLASS_BIT
+0,CLASS_BIT
+0,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,362},
3892 /* 1011 0011 dddd 0101 1111 1111 nim8 *** srll rrd,imm8 */
3895 "srll rrd,imm8",32,13,
3898 "srll",OPC_srll
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3899 {CLASS_BIT
+0xb,CLASS_BIT
+3,CLASS_REG
+(ARG_RD
),CLASS_BIT
+5,CLASS_BIT
+0xf,CLASS_BIT
+0xf,CLASS_IMM
+(ARG_NIM8
),0,0,},2,4,363},
3902 /* 0000 0011 ssN0 dddd *** sub rd,@rs */
3908 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3909 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,364},
3912 /* 0100 0011 0000 dddd address_src *** sub rd,address_src */
3915 "sub rd,address_src",16,9,
3918 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3919 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,365},
3922 /* 0100 0011 ssN0 dddd address_src *** sub rd,address_src(rs) */
3925 "sub rd,address_src(rs)",16,10,
3928 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3929 {CLASS_BIT
+4,CLASS_BIT
+3,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,366},
3932 /* 0000 0011 0000 dddd imm16 *** sub rd,imm16 */
3935 "sub rd,imm16",16,7,
3938 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
3939 {CLASS_BIT
+0,CLASS_BIT
+3,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,367},
3942 /* 1000 0011 ssss dddd *** sub rd,rs */
3948 "sub",OPC_sub
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
3949 {CLASS_BIT
+8,CLASS_BIT
+3,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,368},
3952 /* 0000 0010 ssN0 dddd *** subb rbd,@rs */
3958 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
3959 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,369},
3962 /* 0100 0010 0000 dddd address_src *** subb rbd,address_src */
3965 "subb rbd,address_src",8,9,
3968 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
3969 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,370},
3972 /* 0100 0010 ssN0 dddd address_src *** subb rbd,address_src(rs) */
3975 "subb rbd,address_src(rs)",8,10,
3978 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
3979 {CLASS_BIT
+4,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,371},
3982 /* 0000 0010 0000 dddd imm8 imm8 *** subb rbd,imm8 */
3985 "subb rbd,imm8",8,7,
3988 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
3989 {CLASS_BIT
+0,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,372},
3992 /* 1000 0010 ssss dddd *** subb rbd,rbs */
3998 "subb",OPC_subb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
3999 {CLASS_BIT
+8,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,373},
4002 /* 0001 0010 ssN0 dddd *** subl rrd,@rs */
4005 "subl rrd,@rs",32,14,
4008 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4009 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,374},
4012 /* 0101 0010 0000 dddd address_src *** subl rrd,address_src */
4015 "subl rrd,address_src",32,15,
4018 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4019 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,375},
4022 /* 0101 0010 ssN0 dddd address_src *** subl rrd,address_src(rs) */
4025 "subl rrd,address_src(rs)",32,16,
4028 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4029 {CLASS_BIT
+5,CLASS_BIT
+2,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,376},
4032 /* 0001 0010 0000 dddd imm32 *** subl rrd,imm32 */
4035 "subl rrd,imm32",32,14,
4038 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),},
4039 {CLASS_BIT
+1,CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM32
),0,0,0,0,},2,6,377},
4042 /* 1001 0010 ssss dddd *** subl rrd,rrs */
4045 "subl rrd,rrs",32,8,
4048 "subl",OPC_subl
,0,{CLASS_REG_LONG
+(ARG_RD
),CLASS_REG_LONG
+(ARG_RS
),},
4049 {CLASS_BIT
+9,CLASS_BIT
+2,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,378},
4052 /* 1010 1111 dddd cccc *** tcc cc,rd */
4058 "tcc",OPC_tcc
,0,{CLASS_CC
,CLASS_REG_WORD
+(ARG_RD
),},
4059 {CLASS_BIT
+0xa,CLASS_BIT
+0xf,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,379},
4062 /* 1010 1110 dddd cccc *** tccb cc,rbd */
4068 "tccb",OPC_tccb
,0,{CLASS_CC
,CLASS_REG_BYTE
+(ARG_RD
),},
4069 {CLASS_BIT
+0xa,CLASS_BIT
+0xe,CLASS_REG
+(ARG_RD
),CLASS_CC
,0,0,0,0,0,},2,2,380},
4072 /* 0000 1101 ddN0 0100 *** test @rd */
4078 "test",OPC_test
,0,{CLASS_IR
+(ARG_RD
),},
4079 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,381},
4082 /* 0100 1101 0000 0100 address_dst *** test address_dst */
4085 "test address_dst",16,11,
4088 "test",OPC_test
,0,{CLASS_DA
+(ARG_DST
),},
4089 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,382},
4092 /* 0100 1101 ddN0 0100 address_dst *** test address_dst(rd) */
4095 "test address_dst(rd)",16,12,
4098 "test",OPC_test
,0,{CLASS_X
+(ARG_RD
),},
4099 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,383},
4102 /* 1000 1101 dddd 0100 *** test rd */
4108 "test",OPC_test
,0,{CLASS_REG_WORD
+(ARG_RD
),},
4109 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,384},
4112 /* 0000 1100 ddN0 0100 *** testb @rd */
4118 "testb",OPC_testb
,0,{CLASS_IR
+(ARG_RD
),},
4119 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,385},
4122 /* 0100 1100 0000 0100 address_dst *** testb address_dst */
4125 "testb address_dst",8,11,
4128 "testb",OPC_testb
,0,{CLASS_DA
+(ARG_DST
),},
4129 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,386},
4132 /* 0100 1100 ddN0 0100 address_dst *** testb address_dst(rd) */
4135 "testb address_dst(rd)",8,12,
4138 "testb",OPC_testb
,0,{CLASS_X
+(ARG_RD
),},
4139 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,387},
4142 /* 1000 1100 dddd 0100 *** testb rbd */
4148 "testb",OPC_testb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
4149 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+4,0,0,0,0,0,},1,2,388},
4152 /* 0001 1100 ddN0 1000 *** testl @rd */
4158 "testl",OPC_testl
,0,{CLASS_IR
+(ARG_RD
),},
4159 {CLASS_BIT
+1,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,389},
4162 /* 0101 1100 0000 1000 address_dst *** testl address_dst */
4165 "testl address_dst",32,16,
4168 "testl",OPC_testl
,0,{CLASS_DA
+(ARG_DST
),},
4169 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,390},
4172 /* 0101 1100 ddN0 1000 address_dst *** testl address_dst(rd) */
4175 "testl address_dst(rd)",32,17,
4178 "testl",OPC_testl
,0,{CLASS_X
+(ARG_RD
),},
4179 {CLASS_BIT
+5,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,391},
4182 /* 1001 1100 dddd 1000 *** testl rrd */
4188 "testl",OPC_testl
,0,{CLASS_REG_LONG
+(ARG_RD
),},
4189 {CLASS_BIT
+9,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+8,0,0,0,0,0,},1,2,392},
4192 /* 1011 1000 ddN0 1000 0000 aaaa ssN0 0000 *** trdb @rd,@rs,rba */
4195 "trdb @rd,@rs,rba",8,25,
4198 "trdb",OPC_trdb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
4199 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,393},
4202 /* 1011 1000 ddN0 1100 0000 aaaa ssN0 0000 *** trdrb @rd,@rs,rba */
4205 "trdrb @rd,@rs,rba",8,25,
4208 "trdrb",OPC_trdrb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RA
),},
4209 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_REG
+(ARG_RA
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,394},
4212 /* 1011 1000 ddN0 0000 0000 rrrr ssN0 0000 *** trib @rd,@rs,rbr */
4215 "trib @rd,@rs,rbr",8,25,
4218 "trib",OPC_trib
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
4219 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+0,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,395},
4222 /* 1011 1000 ddN0 0100 0000 rrrr ssN0 0000 *** trirb @rd,@rs,rbr */
4225 "trirb @rd,@rs,rbr",8,25,
4228 "trirb",OPC_trirb
,0,{CLASS_IR
+(ARG_RD
),CLASS_IR
+(ARG_RS
),CLASS_REG_BYTE
+(ARG_RR
),},
4229 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+4,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RS
),CLASS_BIT
+0,0,},3,4,396},
4232 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtdb @ra,@rb,rbr */
4235 "trtdb @ra,@rb,rbr",8,25,
4238 "trtdb",OPC_trtdb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4239 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,397},
4242 /* 1011 1000 aaN0 1110 0000 rrrr bbN0 1110 *** trtdrb @ra,@rb,rbr */
4245 "trtdrb @ra,@rb,rbr",8,25,
4248 "trtdrb",OPC_trtdrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4249 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xe,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,398},
4252 /* 1011 1000 aaN0 0010 0000 rrrr bbN0 0000 *** trtib @ra,@rb,rbr */
4255 "trtib @ra,@rb,rbr",8,25,
4258 "trtib",OPC_trtib
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4259 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+2,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,399},
4262 /* 1011 1000 aaN0 0110 0000 rrrr bbN0 1110 *** trtirb @ra,@rb,rbr */
4265 "trtirb @ra,@rb,rbr",8,25,
4268 "trtirb",OPC_trtirb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4269 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+6,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0xe,0,},3,4,400},
4272 /* 1011 1000 aaN0 1010 0000 rrrr bbN0 0000 *** trtrb @ra,@rb,rbr */
4275 "trtrb @ra,@rb,rbr",8,25,
4278 "trtrb",OPC_trtrb
,0,{CLASS_IR
+(ARG_RA
),CLASS_IR
+(ARG_RB
),CLASS_REG_BYTE
+(ARG_RR
),},
4279 {CLASS_BIT
+0xb,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RA
),CLASS_BIT
+0xa,CLASS_BIT
+0,CLASS_REG
+(ARG_RR
),CLASS_REGN0
+(ARG_RB
),CLASS_BIT
+0,0,},3,4,401},
4282 /* 0000 1101 ddN0 0110 *** tset @rd */
4288 "tset",OPC_tset
,0,{CLASS_IR
+(ARG_RD
),},
4289 {CLASS_BIT
+0,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,402},
4292 /* 0100 1101 0000 0110 address_dst *** tset address_dst */
4295 "tset address_dst",16,14,
4298 "tset",OPC_tset
,0,{CLASS_DA
+(ARG_DST
),},
4299 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,403},
4302 /* 0100 1101 ddN0 0110 address_dst *** tset address_dst(rd) */
4305 "tset address_dst(rd)",16,15,
4308 "tset",OPC_tset
,0,{CLASS_X
+(ARG_RD
),},
4309 {CLASS_BIT
+4,CLASS_BIT
+0xd,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,404},
4312 /* 1000 1101 dddd 0110 *** tset rd */
4318 "tset",OPC_tset
,0,{CLASS_REG_WORD
+(ARG_RD
),},
4319 {CLASS_BIT
+8,CLASS_BIT
+0xd,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,405},
4322 /* 0000 1100 ddN0 0110 *** tsetb @rd */
4328 "tsetb",OPC_tsetb
,0,{CLASS_IR
+(ARG_RD
),},
4329 {CLASS_BIT
+0,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,406},
4332 /* 0100 1100 0000 0110 address_dst *** tsetb address_dst */
4335 "tsetb address_dst",8,14,
4338 "tsetb",OPC_tsetb
,0,{CLASS_DA
+(ARG_DST
),},
4339 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_BIT
+0,CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,407},
4342 /* 0100 1100 ddN0 0110 address_dst *** tsetb address_dst(rd) */
4345 "tsetb address_dst(rd)",8,15,
4348 "tsetb",OPC_tsetb
,0,{CLASS_X
+(ARG_RD
),},
4349 {CLASS_BIT
+4,CLASS_BIT
+0xc,CLASS_REGN0
+(ARG_RD
),CLASS_BIT
+6,CLASS_ADDRESS
+(ARG_DST
),0,0,0,0,},1,4,408},
4352 /* 1000 1100 dddd 0110 *** tsetb rbd */
4358 "tsetb",OPC_tsetb
,0,{CLASS_REG_BYTE
+(ARG_RD
),},
4359 {CLASS_BIT
+8,CLASS_BIT
+0xc,CLASS_REG
+(ARG_RD
),CLASS_BIT
+6,0,0,0,0,0,},1,2,409},
4362 /* 0000 1001 ssN0 dddd *** xor rd,@rs */
4368 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4369 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,410},
4372 /* 0100 1001 0000 dddd address_src *** xor rd,address_src */
4375 "xor rd,address_src",16,9,
4378 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4379 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,411},
4382 /* 0100 1001 ssN0 dddd address_src *** xor rd,address_src(rs) */
4385 "xor rd,address_src(rs)",16,10,
4388 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4389 {CLASS_BIT
+4,CLASS_BIT
+9,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,412},
4392 /* 0000 1001 0000 dddd imm16 *** xor rd,imm16 */
4395 "xor rd,imm16",16,7,
4398 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),},
4399 {CLASS_BIT
+0,CLASS_BIT
+9,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM16
),0,0,0,0,},2,4,413},
4402 /* 1000 1001 ssss dddd *** xor rd,rs */
4408 "xor",OPC_xor
,0,{CLASS_REG_WORD
+(ARG_RD
),CLASS_REG_WORD
+(ARG_RS
),},
4409 {CLASS_BIT
+8,CLASS_BIT
+9,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,414},
4412 /* 0000 1000 ssN0 dddd *** xorb rbd,@rs */
4418 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IR
+(ARG_RS
),},
4419 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,415},
4422 /* 0100 1000 0000 dddd address_src *** xorb rbd,address_src */
4425 "xorb rbd,address_src",8,9,
4428 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_DA
+(ARG_SRC
),},
4429 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,416},
4432 /* 0100 1000 ssN0 dddd address_src *** xorb rbd,address_src(rs) */
4435 "xorb rbd,address_src(rs)",8,10,
4438 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_X
+(ARG_RS
),},
4439 {CLASS_BIT
+4,CLASS_BIT
+8,CLASS_REGN0
+(ARG_RS
),CLASS_REG
+(ARG_RD
),CLASS_ADDRESS
+(ARG_SRC
),0,0,0,0,},2,4,417},
4442 /* 0000 1000 0000 dddd imm8 imm8 *** xorb rbd,imm8 */
4445 "xorb rbd,imm8",8,7,
4448 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),},
4449 {CLASS_BIT
+0,CLASS_BIT
+8,CLASS_BIT
+0,CLASS_REG
+(ARG_RD
),CLASS_IMM
+(ARG_IMM8
),CLASS_IMM
+(ARG_IMM8
),0,0,0,},2,4,418},
4452 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
4458 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4459 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,419},
4462 /* 1000 1000 ssss dddd *** xorb rbd,rbs */
4468 "xorb",OPC_xorb
,0,{CLASS_REG_BYTE
+(ARG_RD
),CLASS_REG_BYTE
+(ARG_RS
),},
4469 {CLASS_BIT
+8,CLASS_BIT
+8,CLASS_REG
+(ARG_RS
),CLASS_REG
+(ARG_RD
),0,0,0,0,0,},2,2,420},
4477 NULL
,0,0,{0,0,0,0},{0,0,0,0,0,0,0,0,0,0},0,0,0}