Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...
[deliverable/linux.git] / scripts / Makefile.build
1 # ==========================================================================
2 # Building
3 # ==========================================================================
4
5 src := $(obj)
6
7 PHONY := __build
8 __build:
9
10 # Init all relevant variables used in kbuild files so
11 # 1) they have correct type
12 # 2) they do not inherit any value from the environment
13 obj-y :=
14 obj-m :=
15 lib-y :=
16 lib-m :=
17 always :=
18 targets :=
19 subdir-y :=
20 subdir-m :=
21 EXTRA_AFLAGS :=
22 EXTRA_CFLAGS :=
23 EXTRA_CPPFLAGS :=
24 EXTRA_LDFLAGS :=
25 asflags-y :=
26 ccflags-y :=
27 cppflags-y :=
28 ldflags-y :=
29
30 # Read auto.conf if it exists, otherwise ignore
31 -include include/config/auto.conf
32
33 include scripts/Kbuild.include
34
35 # For backward compatibility check that these variables do not change
36 save-cflags := $(CFLAGS)
37
38 # The filename Kbuild has precedence over Makefile
39 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
40 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
41 include $(kbuild-file)
42
43 # If the save-* variables changed error out
44 ifeq ($(KBUILD_NOPEDANTIC),)
45 ifneq ("$(save-cflags)","$(CFLAGS)")
46 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
47 endif
48 endif
49 include scripts/Makefile.lib
50
51 ifdef host-progs
52 ifneq ($(hostprogs-y),$(host-progs))
53 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
54 hostprogs-y += $(host-progs)
55 endif
56 endif
57
58 # Do not include host rules unless needed
59 ifneq ($(hostprogs-y)$(hostprogs-m),)
60 include scripts/Makefile.host
61 endif
62
63 ifneq ($(KBUILD_SRC),)
64 # Create output directory if not already present
65 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
66
67 # Create directories for object files if directory does not exist
68 # Needed when obj-y := dir/file.o syntax is used
69 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
70 endif
71
72 ifndef obj
73 $(warning kbuild: Makefile.build is included improperly)
74 endif
75
76 # ===========================================================================
77
78 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
79 lib-target := $(obj)/lib.a
80 endif
81
82 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
83 builtin-target := $(obj)/built-in.o
84 endif
85
86 modorder-target := $(obj)/modules.order
87
88 # We keep a list of all modules in $(MODVERDIR)
89
90 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
91 $(if $(KBUILD_MODULES),$(obj-m) $(modorder-target)) \
92 $(subdir-ym) $(always)
93 @:
94
95 # Linus' kernel sanity checking tool
96 ifneq ($(KBUILD_CHECKSRC),0)
97 ifeq ($(KBUILD_CHECKSRC),2)
98 quiet_cmd_force_checksrc = CHECK $<
99 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
100 else
101 quiet_cmd_checksrc = CHECK $<
102 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
103 endif
104 endif
105
106 # Do section mismatch analysis for each module/built-in.o
107 ifdef CONFIG_DEBUG_SECTION_MISMATCH
108 cmd_secanalysis = ; scripts/mod/modpost $@
109 endif
110
111 # Compile C sources (.c)
112 # ---------------------------------------------------------------------------
113
114 # Default is built-in, unless we know otherwise
115 modkern_cflags = $(if $(part-of-module), $(CFLAGS_MODULE), $(CFLAGS_KERNEL))
116 quiet_modtag := $(empty) $(empty)
117
118 $(real-objs-m) : part-of-module := y
119 $(real-objs-m:.o=.i) : part-of-module := y
120 $(real-objs-m:.o=.s) : part-of-module := y
121 $(real-objs-m:.o=.lst): part-of-module := y
122
123 $(real-objs-m) : quiet_modtag := [M]
124 $(real-objs-m:.o=.i) : quiet_modtag := [M]
125 $(real-objs-m:.o=.s) : quiet_modtag := [M]
126 $(real-objs-m:.o=.lst): quiet_modtag := [M]
127
128 $(obj-m) : quiet_modtag := [M]
129
130 # Default for not multi-part modules
131 modname = $(basetarget)
132
133 $(multi-objs-m) : modname = $(modname-multi)
134 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
135 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
136 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
137 $(multi-objs-y) : modname = $(modname-multi)
138 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
139 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
140 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
141
142 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
143 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
144
145 $(obj)/%.s: $(src)/%.c FORCE
146 $(call if_changed_dep,cc_s_c)
147
148 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
149 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
150
151 $(obj)/%.i: $(src)/%.c FORCE
152 $(call if_changed_dep,cc_i_c)
153
154 cmd_gensymtypes = \
155 $(CPP) -D__GENKSYMS__ $(c_flags) $< | \
156 $(GENKSYMS) -T $@ -a $(ARCH) \
157 $(if $(KBUILD_PRESERVE),-p) \
158 $(if $(1),-r $(firstword $(wildcard $(@:.symtypes=.symref) /dev/null)))
159
160 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
161 cmd_cc_symtypes_c = \
162 set -e; \
163 $(call cmd_gensymtypes, true) >/dev/null; \
164 test -s $@ || rm -f $@
165
166 $(obj)/%.symtypes : $(src)/%.c FORCE
167 $(call cmd,cc_symtypes_c)
168
169 # C (.c) files
170 # The C file is compiled and updated dependency information is generated.
171 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
172
173 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
174
175 ifndef CONFIG_MODVERSIONS
176 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
177
178 else
179 # When module versioning is enabled the following steps are executed:
180 # o compile a .tmp_<file>.o from <file>.c
181 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
182 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
183 # are done.
184 # o otherwise, we calculate symbol versions using the good old
185 # genksyms on the preprocessed source and postprocess them in a way
186 # that they are usable as a linker script
187 # o generate <file>.o from .tmp_<file>.o using the linker to
188 # replace the unresolved symbols __crc_exported_symbol with
189 # the actual value of the checksum generated by genksyms
190
191 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
192 cmd_modversions = \
193 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
194 $(call cmd_gensymtypes, $(KBUILD_SYMTYPES)) \
195 > $(@D)/.tmp_$(@F:.o=.ver); \
196 \
197 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
198 -T $(@D)/.tmp_$(@F:.o=.ver); \
199 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
200 else \
201 mv -f $(@D)/.tmp_$(@F) $@; \
202 fi;
203 endif
204
205 ifdef CONFIG_FTRACE_MCOUNT_RECORD
206 cmd_record_mcount = perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \
207 "$(if $(CONFIG_64BIT),64,32)" \
208 "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" "$(NM)" "$(RM)" "$(MV)" \
209 "$(if $(part-of-module),1,0)" "$(@)";
210 endif
211
212 define rule_cc_o_c
213 $(call echo-cmd,checksrc) $(cmd_checksrc) \
214 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
215 $(cmd_modversions) \
216 $(cmd_record_mcount) \
217 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
218 $(dot-target).tmp; \
219 rm -f $(depfile); \
220 mv -f $(dot-target).tmp $(dot-target).cmd
221 endef
222
223 # Built-in and composite module parts
224 $(obj)/%.o: $(src)/%.c FORCE
225 $(call cmd,force_checksrc)
226 $(call if_changed_rule,cc_o_c)
227
228 # Single-part modules are special since we need to mark them in $(MODVERDIR)
229
230 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
231 $(call cmd,force_checksrc)
232 $(call if_changed_rule,cc_o_c)
233 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
234
235 quiet_cmd_cc_lst_c = MKLST $@
236 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
237 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
238 System.map $(OBJDUMP) > $@
239
240 $(obj)/%.lst: $(src)/%.c FORCE
241 $(call if_changed_dep,cc_lst_c)
242
243 # Compile assembler sources (.S)
244 # ---------------------------------------------------------------------------
245
246 modkern_aflags := $(AFLAGS_KERNEL)
247
248 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
249 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
250
251 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
252 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
253
254 $(obj)/%.s: $(src)/%.S FORCE
255 $(call if_changed_dep,as_s_S)
256
257 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
258 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
259
260 $(obj)/%.o: $(src)/%.S FORCE
261 $(call if_changed_dep,as_o_S)
262
263 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
264 targets += $(extra-y) $(MAKECMDGOALS) $(always)
265
266 # Linker scripts preprocessor (.lds.S -> .lds)
267 # ---------------------------------------------------------------------------
268 quiet_cmd_cpp_lds_S = LDS $@
269 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
270
271 $(obj)/%.lds: $(src)/%.lds.S FORCE
272 $(call if_changed_dep,cpp_lds_S)
273
274 # Build the compiled-in targets
275 # ---------------------------------------------------------------------------
276
277 # To build objects in subdirs, we need to descend into the directories
278 $(sort $(subdir-obj-y)): $(subdir-ym) ;
279
280 #
281 # Rule to compile a set of .o files into one .o file
282 #
283 ifdef builtin-target
284 quiet_cmd_link_o_target = LD $@
285 # If the list of objects to link is empty, just create an empty built-in.o
286 cmd_link_o_target = $(if $(strip $(obj-y)),\
287 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^) \
288 $(cmd_secanalysis),\
289 rm -f $@; $(AR) rcs $@)
290
291 $(builtin-target): $(obj-y) FORCE
292 $(call if_changed,link_o_target)
293
294 targets += $(builtin-target)
295 endif # builtin-target
296
297 #
298 # Rule to create modules.order file
299 #
300 # Create commands to either record .ko file or cat modules.order from
301 # a subdirectory
302 modorder-cmds = \
303 $(foreach m, $(modorder), \
304 $(if $(filter %/modules.order, $m), \
305 cat $m;, echo kernel/$m;))
306
307 $(modorder-target): $(subdir-ym) FORCE
308 $(Q)(cat /dev/null; $(modorder-cmds)) > $@
309
310 #
311 # Rule to compile a set of .o files into one .a file
312 #
313 ifdef lib-target
314 quiet_cmd_link_l_target = AR $@
315 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
316
317 $(lib-target): $(lib-y) FORCE
318 $(call if_changed,link_l_target)
319
320 targets += $(lib-target)
321 endif
322
323 #
324 # Rule to link composite objects
325 #
326 # Composite objects are specified in kbuild makefile as follows:
327 # <composite-object>-objs := <list of .o files>
328 # or
329 # <composite-object>-y := <list of .o files>
330 link_multi_deps = \
331 $(filter $(addprefix $(obj)/, \
332 $($(subst $(obj)/,,$(@:.o=-objs))) \
333 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
334
335 quiet_cmd_link_multi-y = LD $@
336 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps) $(cmd_secanalysis)
337
338 quiet_cmd_link_multi-m = LD [M] $@
339 cmd_link_multi-m = $(cmd_link_multi-y)
340
341 # We would rather have a list of rules like
342 # foo.o: $(foo-objs)
343 # but that's not so easy, so we rather make all composite objects depend
344 # on the set of all their parts
345 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
346 $(call if_changed,link_multi-y)
347
348 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
349 $(call if_changed,link_multi-m)
350 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
351
352 targets += $(multi-used-y) $(multi-used-m)
353
354
355 # Descending
356 # ---------------------------------------------------------------------------
357
358 PHONY += $(subdir-ym)
359 $(subdir-ym):
360 $(Q)$(MAKE) $(build)=$@
361
362 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
363 # ---------------------------------------------------------------------------
364
365 PHONY += FORCE
366
367 FORCE:
368
369 # Read all saved command lines and dependencies for the $(targets) we
370 # may be building above, using $(if_changed{,_dep}). As an
371 # optimization, we don't need to read them if the target does not
372 # exist, we will rebuild anyway in that case.
373
374 targets := $(wildcard $(sort $(targets)))
375 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
376
377 ifneq ($(cmd_files),)
378 include $(cmd_files)
379 endif
380
381
382 # Declare the contents of the .PHONY variable as phony. We keep that
383 # information in a variable se we can use it in if_changed and friends.
384
385 .PHONY: $(PHONY)
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