1 # ==========================================================================
3 # ==========================================================================
10 # Init all relevant variables used in kbuild files so
11 # 1) they have correct type
12 # 2) they do not inherit any value from the environment
26 # Read .config if it exist, otherwise ignore
27 -include include/config/auto.conf
29 include scripts/Kbuild.include
31 # For backward compatibility check that these variables does not change
32 save-cflags := $(CFLAGS)
34 # The filename Kbuild has precedence over Makefile
35 kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src))
36 kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile)
37 include $(kbuild-file)
39 # If the save-* variables changed error out
40 ifeq ($(KBUILD_NOPEDANTIC),)
41 ifneq ("$(save-cflags)","$(CFLAGS)")
42 $(error CFLAGS was changed in "$(kbuild-file)". Fix it to use EXTRA_CFLAGS)
45 include scripts/Makefile.lib
48 ifneq ($(hostprogs-y),$(host-progs))
49 $(warning kbuild: $(obj)/Makefile - Usage of host-progs is deprecated. Please replace with hostprogs-y!)
50 hostprogs-y += $(host-progs)
54 # Do not include host rules unles needed
55 ifneq ($(hostprogs-y)$(hostprogs-m),)
56 include scripts/Makefile.host
59 ifneq ($(KBUILD_SRC),)
60 # Create output directory if not already present
61 _dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
63 # Create directories for object files if directory does not exist
64 # Needed when obj-y := dir/file.o syntax is used
65 _dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
69 $(warning kbuild: Makefile.build is included improperly)
72 # ===========================================================================
74 ifneq ($(strip $(lib-y) $(lib-m) $(lib-n) $(lib-)),)
75 lib-target := $(obj)/lib.a
78 ifneq ($(strip $(obj-y) $(obj-m) $(obj-n) $(obj-) $(lib-target)),)
79 builtin-target := $(obj)/built-in.o
82 # We keep a list of all modules in $(MODVERDIR)
84 __build: $(if $(KBUILD_BUILTIN),$(builtin-target) $(lib-target) $(extra-y)) \
85 $(if $(KBUILD_MODULES),$(obj-m)) \
86 $(subdir-ym) $(always)
89 # Linus' kernel sanity checking tool
90 ifneq ($(KBUILD_CHECKSRC),0)
91 ifeq ($(KBUILD_CHECKSRC),2)
92 quiet_cmd_force_checksrc = CHECK $<
93 cmd_force_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
95 quiet_cmd_checksrc = CHECK $<
96 cmd_checksrc = $(CHECK) $(CHECKFLAGS) $(c_flags) $< ;
101 # Compile C sources (.c)
102 # ---------------------------------------------------------------------------
104 # Default is built-in, unless we know otherwise
105 modkern_cflags := $(CFLAGS_KERNEL)
106 quiet_modtag := $(empty) $(empty)
108 $(real-objs-m) : modkern_cflags := $(CFLAGS_MODULE)
109 $(real-objs-m:.o=.i) : modkern_cflags := $(CFLAGS_MODULE)
110 $(real-objs-m:.o=.s) : modkern_cflags := $(CFLAGS_MODULE)
111 $(real-objs-m:.o=.lst): modkern_cflags := $(CFLAGS_MODULE)
113 $(real-objs-m) : quiet_modtag := [M]
114 $(real-objs-m:.o=.i) : quiet_modtag := [M]
115 $(real-objs-m:.o=.s) : quiet_modtag := [M]
116 $(real-objs-m:.o=.lst): quiet_modtag := [M]
118 $(obj-m) : quiet_modtag := [M]
120 # Default for not multi-part modules
121 modname = $(basetarget)
123 $(multi-objs-m) : modname = $(modname-multi)
124 $(multi-objs-m:.o=.i) : modname = $(modname-multi)
125 $(multi-objs-m:.o=.s) : modname = $(modname-multi)
126 $(multi-objs-m:.o=.lst) : modname = $(modname-multi)
127 $(multi-objs-y) : modname = $(modname-multi)
128 $(multi-objs-y:.o=.i) : modname = $(modname-multi)
129 $(multi-objs-y:.o=.s) : modname = $(modname-multi)
130 $(multi-objs-y:.o=.lst) : modname = $(modname-multi)
132 quiet_cmd_cc_s_c = CC $(quiet_modtag) $@
133 cmd_cc_s_c = $(CC) $(c_flags) -fverbose-asm -S -o $@ $<
135 $(obj)/%.s: $(src)/%.c FORCE
136 $(call if_changed_dep,cc_s_c)
138 quiet_cmd_cc_i_c = CPP $(quiet_modtag) $@
139 cmd_cc_i_c = $(CPP) $(c_flags) -o $@ $<
141 $(obj)/%.i: $(src)/%.c FORCE
142 $(call if_changed_dep,cc_i_c)
144 quiet_cmd_cc_symtypes_c = SYM $(quiet_modtag) $@
145 cmd_cc_symtypes_c = \
146 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
147 | $(GENKSYMS) -T $@ >/dev/null; \
148 test -s $@ || rm -f $@
150 $(obj)/%.symtypes : $(src)/%.c FORCE
151 $(call if_changed_dep,cc_symtypes_c)
154 # The C file is compiled and updated dependency information is generated.
155 # (See cmd_cc_o_c + relevant part of rule_cc_o_c)
157 quiet_cmd_cc_o_c = CC $(quiet_modtag) $@
159 ifndef CONFIG_MODVERSIONS
160 cmd_cc_o_c = $(CC) $(c_flags) -c -o $@ $<
163 # When module versioning is enabled the following steps are executed:
164 # o compile a .tmp_<file>.o from <file>.c
165 # o if .tmp_<file>.o doesn't contain a __ksymtab version, i.e. does
166 # not export symbols, we just rename .tmp_<file>.o to <file>.o and
168 # o otherwise, we calculate symbol versions using the good old
169 # genksyms on the preprocessed source and postprocess them in a way
170 # that they are usable as a linker script
171 # o generate <file>.o from .tmp_<file>.o using the linker to
172 # replace the unresolved symbols __crc_exported_symbol with
173 # the actual value of the checksum generated by genksyms
175 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
177 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
178 $(CPP) -D__GENKSYMS__ $(c_flags) $< \
179 | $(GENKSYMS) $(if $(KBUILD_SYMTYPES), \
180 -T $(@D)/$(@F:.o=.symtypes)) -a $(ARCH) \
181 > $(@D)/.tmp_$(@F:.o=.ver); \
183 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
184 -T $(@D)/.tmp_$(@F:.o=.ver); \
185 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
187 mv -f $(@D)/.tmp_$(@F) $@; \
192 $(call echo-cmd,checksrc) $(cmd_checksrc) \
193 $(call echo-cmd,cc_o_c) $(cmd_cc_o_c); \
195 scripts/basic/fixdep $(depfile) $@ '$(call make-cmd,cc_o_c)' > \
198 mv -f $(dot-target).tmp $(dot-target).cmd
201 # Built-in and composite module parts
202 $(obj)/%.o: $(src)/%.c FORCE
203 $(call cmd,force_checksrc)
204 $(call if_changed_rule,cc_o_c)
206 # Single-part modules are special since we need to mark them in $(MODVERDIR)
208 $(single-used-m): $(obj)/%.o: $(src)/%.c FORCE
209 $(call cmd,force_checksrc)
210 $(call if_changed_rule,cc_o_c)
211 @{ echo $(@:.o=.ko); echo $@; } > $(MODVERDIR)/$(@F:.o=.mod)
213 quiet_cmd_cc_lst_c = MKLST $@
214 cmd_cc_lst_c = $(CC) $(c_flags) -g -c -o $*.o $< && \
215 $(CONFIG_SHELL) $(srctree)/scripts/makelst $*.o \
216 System.map $(OBJDUMP) > $@
218 $(obj)/%.lst: $(src)/%.c FORCE
219 $(call if_changed_dep,cc_lst_c)
221 # Compile assembler sources (.S)
222 # ---------------------------------------------------------------------------
224 modkern_aflags := $(AFLAGS_KERNEL)
226 $(real-objs-m) : modkern_aflags := $(AFLAGS_MODULE)
227 $(real-objs-m:.o=.s): modkern_aflags := $(AFLAGS_MODULE)
229 quiet_cmd_as_s_S = CPP $(quiet_modtag) $@
230 cmd_as_s_S = $(CPP) $(a_flags) -o $@ $<
232 $(obj)/%.s: $(src)/%.S FORCE
233 $(call if_changed_dep,as_s_S)
235 quiet_cmd_as_o_S = AS $(quiet_modtag) $@
236 cmd_as_o_S = $(CC) $(a_flags) -c -o $@ $<
238 $(obj)/%.o: $(src)/%.S FORCE
239 $(call if_changed_dep,as_o_S)
241 targets += $(real-objs-y) $(real-objs-m) $(lib-y)
242 targets += $(extra-y) $(MAKECMDGOALS) $(always)
244 # Linker scripts preprocessor (.lds.S -> .lds)
245 # ---------------------------------------------------------------------------
246 quiet_cmd_cpp_lds_S = LDS $@
247 cmd_cpp_lds_S = $(CPP) $(cpp_flags) -D__ASSEMBLY__ -o $@ $<
249 $(obj)/%.lds: $(src)/%.lds.S FORCE
250 $(call if_changed_dep,cpp_lds_S)
252 # Build the compiled-in targets
253 # ---------------------------------------------------------------------------
255 # To build objects in subdirs, we need to descend into the directories
256 $(sort $(subdir-obj-y)): $(subdir-ym) ;
259 # Rule to compile a set of .o files into one .o file
262 quiet_cmd_link_o_target = LD $@
263 # If the list of objects to link is empty, just create an empty built-in.o
264 cmd_link_o_target = $(if $(strip $(obj-y)),\
265 $(LD) $(ld_flags) -r -o $@ $(filter $(obj-y), $^),\
266 rm -f $@; $(AR) rcs $@)
268 $(builtin-target): $(obj-y) FORCE
269 $(call if_changed,link_o_target)
271 targets += $(builtin-target)
272 endif # builtin-target
275 # Rule to compile a set of .o files into one .a file
278 quiet_cmd_link_l_target = AR $@
279 cmd_link_l_target = rm -f $@; $(AR) rcs $@ $(lib-y)
281 $(lib-target): $(lib-y) FORCE
282 $(call if_changed,link_l_target)
284 targets += $(lib-target)
288 # Rule to link composite objects
290 # Composite objects are specified in kbuild makefile as follows:
291 # <composite-object>-objs := <list of .o files>
293 # <composite-object>-y := <list of .o files>
295 $(filter $(addprefix $(obj)/, \
296 $($(subst $(obj)/,,$(@:.o=-objs))) \
297 $($(subst $(obj)/,,$(@:.o=-y)))), $^)
299 quiet_cmd_link_multi-y = LD $@
300 cmd_link_multi-y = $(LD) $(ld_flags) -r -o $@ $(link_multi_deps)
302 quiet_cmd_link_multi-m = LD [M] $@
303 cmd_link_multi-m = $(cmd_link_multi-y)
305 # We would rather have a list of rules like
307 # but that's not so easy, so we rather make all composite objects depend
308 # on the set of all their parts
309 $(multi-used-y) : %.o: $(multi-objs-y) FORCE
310 $(call if_changed,link_multi-y)
312 $(multi-used-m) : %.o: $(multi-objs-m) FORCE
313 $(call if_changed,link_multi-m)
314 @{ echo $(@:.o=.ko); echo $(link_multi_deps); } > $(MODVERDIR)/$(@F:.o=.mod)
316 targets += $(multi-used-y) $(multi-used-m)
320 # ---------------------------------------------------------------------------
322 PHONY += $(subdir-ym)
324 $(Q)$(MAKE) $(build)=$@
326 # Add FORCE to the prequisites of a target to force it to be always rebuilt.
327 # ---------------------------------------------------------------------------
333 # Read all saved command lines and dependencies for the $(targets) we
334 # may be building above, using $(if_changed{,_dep}). As an
335 # optimization, we don't need to read them if the target does not
336 # exist, we will rebuild anyway in that case.
338 targets := $(wildcard $(sort $(targets)))
339 cmd_files := $(wildcard $(foreach f,$(targets),$(dir $(f)).$(notdir $(f)).cmd))
341 ifneq ($(cmd_files),)
346 # Declare the contents of the .PHONY variable as phony. We keep that
347 # information in a variable se we can use it in if_changed and friends.