sim/bfin/dv-bfin_eppi.c

   1 /* Blackfin Enhanced Parallel Port Interface (EPPI) model
   2    For "new style" PPIs on BF54x/etc... parts.
   3
   4    Copyright (C) 2010-2011 Free Software Foundation, Inc.
   5    Contributed by Analog Devices, Inc.
   6
   7    This file is part of simulators.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "config.h"
  23
  24 #include "sim-main.h"
  25 #include "devices.h"
  26 #include "dv-bfin_eppi.h"
  27 #include "gui.h"
  28
  29 /* XXX: TX is merely a stub.  */
  30
  31 struct bfin_eppi
  32 {
  33   /* This top portion matches common dv_bfin struct.  */
  34   bu32 base;
  35   struct hw *dma_master;
  36   bool acked;
  37
  38   struct hw_event *handler;
  39   char saved_byte;
  40   int saved_count;
  41
  42   /* GUI state.  */
  43   void *gui_state;
  44   int color;
  45
  46   /* Order after here is important -- matches hardware MMR layout.  */
  47   bu16 BFIN_MMR_16(status);
  48   bu16 BFIN_MMR_16(hcount);
  49   bu16 BFIN_MMR_16(hdelay);
  50   bu16 BFIN_MMR_16(vcount);
  51   bu16 BFIN_MMR_16(vdelay);
  52   bu16 BFIN_MMR_16(frame);
  53   bu16 BFIN_MMR_16(line);
  54   bu16 BFIN_MMR_16(clkdiv);
  55   bu32 control, fs1w_hbl, fs1p_avpl, fsw2_lvb, fs2p_lavf, clip, err;
  56 };
  57 #define mmr_base()      offsetof(struct bfin_eppi, status)
  58 #define mmr_offset(mmr) (offsetof(struct bfin_eppi, mmr) - mmr_base())
  59
  60 static const char * const mmr_names[] = {
  61   "EPPI_STATUS", "EPPI_HCOUNT", "EPPI_HDELAY", "EPPI_VCOUNT", "EPPI_VDELAY",
  62   "EPPI_FRAME", "EPPI_LINE", "EPPI_CLKDIV", "EPPI_CONTROL", "EPPI_FS1W_HBL",
  63   "EPPI_FS1P_AVPL", "EPPI_FS2W_LVB", "EPPI_FS2P_LAVF", "EPPI_CLIP", "EPPI_ERR",
  64 };
  65 #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
  66
  67 static void
  68 bfin_eppi_gui_setup (struct bfin_eppi *eppi)
  69 {
  70   /* If we are in RX mode, nothing to do.  */
  71   if (!(eppi->control & PORT_DIR))
  72     return;
  73
  74   eppi->gui_state = bfin_gui_setup (eppi->gui_state,
  75                                     eppi->control & PORT_EN,
  76                                     eppi->hcount,
  77                                     eppi->vcount,
  78                                     eppi->color);
  79 }
  80
  81 static unsigned
  82 bfin_eppi_io_write_buffer (struct hw *me, const void *source,
  83                            int space, address_word addr, unsigned nr_bytes)
  84 {
  85   struct bfin_eppi *eppi = hw_data (me);
  86   bu32 mmr_off;
  87   bu32 value;
  88   bu16 *value16p;
  89   bu32 *value32p;
  90   void *valuep;
  91
  92   if (nr_bytes == 4)
  93     value = dv_load_4 (source);
  94   else
  95     value = dv_load_2 (source);
  96
  97   mmr_off = addr - eppi->base;
  98   valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off);
  99   value16p = valuep;
 100   value32p = valuep;
 101
 102   HW_TRACE_WRITE ();
 103
 104   switch (mmr_off)
 105     {
 106     case mmr_offset(status):
 107       dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
 108       dv_w1c_2 (value16p, value, 0);
 109       break;
 110     case mmr_offset(hcount):
 111     case mmr_offset(hdelay):
 112     case mmr_offset(vcount):
 113     case mmr_offset(vdelay):
 114     case mmr_offset(frame):
 115     case mmr_offset(line):
 116     case mmr_offset(clkdiv):
 117       dv_bfin_mmr_require_16 (me, addr, nr_bytes, true);
 118       *value16p = value;
 119       break;
 120     case mmr_offset(control):
 121       *value32p = value;
 122       bfin_eppi_gui_setup (eppi);
 123       break;
 124     case mmr_offset(fs1w_hbl):
 125     case mmr_offset(fs1p_avpl):
 126     case mmr_offset(fsw2_lvb):
 127     case mmr_offset(fs2p_lavf):
 128     case mmr_offset(clip):
 129     case mmr_offset(err):
 130       dv_bfin_mmr_require_32 (me, addr, nr_bytes, true);
 131       *value32p = value;
 132       break;
 133     default:
 134       dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
 135       break;
 136     }
 137
 138   return nr_bytes;
 139 }
 140
 141 static unsigned
 142 bfin_eppi_io_read_buffer (struct hw *me, void *dest,
 143                           int space, address_word addr, unsigned nr_bytes)
 144 {
 145   struct bfin_eppi *eppi = hw_data (me);
 146   bu32 mmr_off;
 147   bu16 *value16p;
 148   bu32 *value32p;
 149   void *valuep;
 150
 151   mmr_off = addr - eppi->base;
 152   valuep = (void *)((unsigned long)eppi + mmr_base() + mmr_off);
 153   value16p = valuep;
 154   value32p = valuep;
 155
 156   HW_TRACE_READ ();
 157
 158   switch (mmr_off)
 159     {
 160     case mmr_offset(status):
 161     case mmr_offset(hcount):
 162     case mmr_offset(hdelay):
 163     case mmr_offset(vcount):
 164     case mmr_offset(vdelay):
 165     case mmr_offset(frame):
 166     case mmr_offset(line):
 167     case mmr_offset(clkdiv):
 168       dv_bfin_mmr_require_16 (me, addr, nr_bytes, false);
 169       dv_store_2 (dest, *value16p);
 170       break;
 171     case mmr_offset(control):
 172     case mmr_offset(fs1w_hbl):
 173     case mmr_offset(fs1p_avpl):
 174     case mmr_offset(fsw2_lvb):
 175     case mmr_offset(fs2p_lavf):
 176     case mmr_offset(clip):
 177     case mmr_offset(err):
 178       dv_bfin_mmr_require_32 (me, addr, nr_bytes, false);
 179       dv_store_4 (dest, *value32p);
 180       break;
 181     default:
 182       dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
 183       break;
 184     }
 185
 186   return nr_bytes;
 187 }
 188
 189 static unsigned
 190 bfin_eppi_dma_read_buffer (struct hw *me, void *dest, int space,
 191                            unsigned_word addr, unsigned nr_bytes)
 192 {
 193   HW_TRACE_DMA_READ ();
 194   return 0;
 195 }
 196
 197 static unsigned
 198 bfin_eppi_dma_write_buffer (struct hw *me, const void *source,
 199                             int space, unsigned_word addr,
 200                             unsigned nr_bytes,
 201                             int violate_read_only_section)
 202 {
 203   struct bfin_eppi *eppi = hw_data (me);
 204
 205   HW_TRACE_DMA_WRITE ();
 206
 207   return bfin_gui_update (eppi->gui_state, source, nr_bytes);
 208 }
 209
 210 static const struct hw_port_descriptor bfin_eppi_ports[] = {
 211   { "stat", 0, 0, output_port, },
 212   { NULL, 0, 0, 0, },
 213 };
 214
 215 static void
 216 attach_bfin_eppi_regs (struct hw *me, struct bfin_eppi *eppi)
 217 {
 218   address_word attach_address;
 219   int attach_space;
 220   unsigned attach_size;
 221   reg_property_spec reg;
 222
 223   if (hw_find_property (me, "reg") == NULL)
 224     hw_abort (me, "Missing \"reg\" property");
 225
 226   if (!hw_find_reg_array_property (me, "reg", 0, &reg))
 227     hw_abort (me, "\"reg\" property must contain three addr/size entries");
 228
 229   hw_unit_address_to_attach_address (hw_parent (me),
 230                                      &reg.address,
 231                                      &attach_space, &attach_address, me);
 232   hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
 233
 234   if (attach_size != BFIN_MMR_EPPI_SIZE)
 235     hw_abort (me, "\"reg\" size must be %#x", BFIN_MMR_EPPI_SIZE);
 236
 237   hw_attach_address (hw_parent (me),
 238                      0, attach_space, attach_address, attach_size, me);
 239
 240   eppi->base = attach_address;
 241 }
 242
 243 static void
 244 bfin_eppi_finish (struct hw *me)
 245 {
 246   struct bfin_eppi *eppi;
 247   const char *color;
 248
 249   eppi = HW_ZALLOC (me, struct bfin_eppi);
 250
 251   set_hw_data (me, eppi);
 252   set_hw_io_read_buffer (me, bfin_eppi_io_read_buffer);
 253   set_hw_io_write_buffer (me, bfin_eppi_io_write_buffer);
 254   set_hw_dma_read_buffer (me, bfin_eppi_dma_read_buffer);
 255   set_hw_dma_write_buffer (me, bfin_eppi_dma_write_buffer);
 256   set_hw_ports (me, bfin_eppi_ports);
 257
 258   attach_bfin_eppi_regs (me, eppi);
 259
 260   /* Initialize the EPPI.  */
 261   if (hw_find_property (me, "color"))
 262     color = hw_find_string_property (me, "color");
 263   else
 264     color = NULL;
 265   eppi->color = bfin_gui_color (color);
 266 }
 267
 268 const struct hw_descriptor dv_bfin_eppi_descriptor[] = {
 269   {"bfin_eppi", bfin_eppi_finish,},
 270   {NULL, NULL},
 271 };