sim: bfin: new port
[deliverable/binutils-gdb.git] / sim / bfin / dv-bfin_jtag.c
1 /* Blackfin JTAG model.
2
3 Copyright (C) 2010-2011 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
5
6 This file is part of simulators.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20
21 #include "config.h"
22
23 #include "sim-main.h"
24 #include "devices.h"
25 #include "dv-bfin_jtag.h"
26
27 /* XXX: This is mostly a stub. There are more registers, but they're only
28 accessible via the JTAG scan chain and not the MMR interface. */
29
30 struct bfin_jtag
31 {
32 bu32 base;
33
34 /* Order after here is important -- matches hardware MMR layout. */
35 bu32 dspid;
36 bu32 _pad0;
37 bu32 dbgstat;
38 };
39 #define mmr_base() offsetof(struct bfin_jtag, dspid)
40 #define mmr_offset(mmr) (offsetof(struct bfin_jtag, mmr) - mmr_base())
41
42 static const char * const mmr_names[] = {
43 "DSPID", NULL, "DBGSTAT",
44 };
45 #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
46
47 static unsigned
48 bfin_jtag_io_write_buffer (struct hw *me, const void *source, int space,
49 address_word addr, unsigned nr_bytes)
50 {
51 struct bfin_jtag *jtag = hw_data (me);
52 bu32 mmr_off;
53 bu32 value;
54 bu32 *valuep;
55
56 value = dv_load_4 (source);
57 mmr_off = addr - jtag->base;
58 valuep = (void *)((unsigned long)jtag + mmr_base() + mmr_off);
59
60 HW_TRACE_WRITE ();
61
62 switch (mmr_off)
63 {
64 case mmr_offset(dbgstat):
65 dv_w1c_4 (valuep, value, ~0xc);
66 break;
67 case mmr_offset(dspid):
68 /* Discard writes to these. */
69 break;
70 default:
71 dv_bfin_mmr_invalid (me, addr, nr_bytes, true);
72 break;
73 }
74
75 return nr_bytes;
76 }
77
78 static unsigned
79 bfin_jtag_io_read_buffer (struct hw *me, void *dest, int space,
80 address_word addr, unsigned nr_bytes)
81 {
82 struct bfin_jtag *jtag = hw_data (me);
83 bu32 mmr_off;
84 bu32 value;
85 bu32 *valuep;
86
87 mmr_off = addr - jtag->base;
88 valuep = (void *)((unsigned long)jtag + mmr_base() + mmr_off);
89
90 HW_TRACE_READ ();
91
92 switch (mmr_off)
93 {
94 case mmr_offset(dbgstat):
95 case mmr_offset(dspid):
96 value = *valuep;
97 break;
98 default:
99 while (1) /* Core MMRs -> exception -> doesn't return. */
100 dv_bfin_mmr_invalid (me, addr, nr_bytes, false);
101 break;
102 }
103
104 dv_store_4 (dest, value);
105
106 return nr_bytes;
107 }
108
109 static void
110 attach_bfin_jtag_regs (struct hw *me, struct bfin_jtag *jtag)
111 {
112 address_word attach_address;
113 int attach_space;
114 unsigned attach_size;
115 reg_property_spec reg;
116
117 if (hw_find_property (me, "reg") == NULL)
118 hw_abort (me, "Missing \"reg\" property");
119
120 if (!hw_find_reg_array_property (me, "reg", 0, &reg))
121 hw_abort (me, "\"reg\" property must contain three addr/size entries");
122
123 hw_unit_address_to_attach_address (hw_parent (me),
124 &reg.address,
125 &attach_space, &attach_address, me);
126 hw_unit_size_to_attach_size (hw_parent (me), &reg.size, &attach_size, me);
127
128 if (attach_size != BFIN_COREMMR_JTAG_SIZE)
129 hw_abort (me, "\"reg\" size must be %#x", BFIN_COREMMR_JTAG_SIZE);
130
131 hw_attach_address (hw_parent (me),
132 0, attach_space, attach_address, attach_size, me);
133
134 jtag->base = attach_address;
135 }
136
137 static void
138 bfin_jtag_finish (struct hw *me)
139 {
140 struct bfin_jtag *jtag;
141
142 jtag = HW_ZALLOC (me, struct bfin_jtag);
143
144 set_hw_data (me, jtag);
145 set_hw_io_read_buffer (me, bfin_jtag_io_read_buffer);
146 set_hw_io_write_buffer (me, bfin_jtag_io_write_buffer);
147
148 attach_bfin_jtag_regs (me, jtag);
149
150 /* Initialize the JTAG state. */
151 jtag->dspid = bfin_model_get_dspid (hw_system (me));
152 }
153
154 const struct hw_descriptor dv_bfin_jtag_descriptor[] = {
155 {"bfin_jtag", bfin_jtag_finish,},
156 {NULL, NULL},
157 };
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