1 /* Blackfin Two Wire Interface (TWI) model
3 Copyright (C) 2010-2011 Free Software Foundation, Inc.
4 Contributed by Analog Devices, Inc.
6 This file is part of simulators.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "dv-bfin_twi.h"
27 /* XXX: This is merely a stub. */
31 /* This top portion matches common dv_bfin struct. */
33 struct hw
*dma_master
;
36 struct hw_event
*handler
;
40 bu16 xmt_fifo
, rcv_fifo
;
42 /* Order after here is important -- matches hardware MMR layout. */
43 bu16
BFIN_MMR_16(clkdiv
);
44 bu16
BFIN_MMR_16(control
);
45 bu16
BFIN_MMR_16(slave_ctl
);
46 bu16
BFIN_MMR_16(slave_stat
);
47 bu16
BFIN_MMR_16(slave_addr
);
48 bu16
BFIN_MMR_16(master_ctl
);
49 bu16
BFIN_MMR_16(master_stat
);
50 bu16
BFIN_MMR_16(master_addr
);
51 bu16
BFIN_MMR_16(int_stat
);
52 bu16
BFIN_MMR_16(int_mask
);
53 bu16
BFIN_MMR_16(fifo_ctl
);
54 bu16
BFIN_MMR_16(fifo_stat
);
56 bu16
BFIN_MMR_16(xmt_data8
);
57 bu16
BFIN_MMR_16(xmt_data16
);
58 bu16
BFIN_MMR_16(rcv_data8
);
59 bu16
BFIN_MMR_16(rcv_data16
);
61 #define mmr_base() offsetof(struct bfin_twi, clkdiv)
62 #define mmr_offset(mmr) (offsetof(struct bfin_twi, mmr) - mmr_base())
63 #define mmr_idx(mmr) (mmr_offset (mmr) / 4)
65 static const char * const mmr_names
[] = {
66 "TWI_CLKDIV", "TWI_CONTROL", "TWI_SLAVE_CTL", "TWI_SLAVE_STAT",
67 "TWI_SLAVE_ADDR", "TWI_MASTER_CTL", "TWI_MASTER_STAT", "TWI_MASTER_ADDR",
68 "TWI_INT_STAT", "TWI_INT_MASK", "TWI_FIFO_CTL", "TWI_FIFO_STAT",
69 [mmr_idx (xmt_data8
)] = "TWI_XMT_DATA8", "TWI_XMT_DATA16", "TWI_RCV_DATA8",
72 #define mmr_name(off) (mmr_names[(off) / 4] ? : "<INV>")
75 bfin_twi_io_write_buffer (struct hw
*me
, const void *source
, int space
,
76 address_word addr
, unsigned nr_bytes
)
78 struct bfin_twi
*twi
= hw_data (me
);
83 value
= dv_load_2 (source
);
84 mmr_off
= addr
- twi
->base
;
85 valuep
= (void *)((unsigned long)twi
+ mmr_base() + mmr_off
);
89 dv_bfin_mmr_require_16 (me
, addr
, nr_bytes
, true);
93 case mmr_offset(clkdiv
):
94 case mmr_offset(control
):
95 case mmr_offset(slave_ctl
):
96 case mmr_offset(slave_addr
):
97 case mmr_offset(master_ctl
):
98 case mmr_offset(master_addr
):
99 case mmr_offset(int_mask
):
100 case mmr_offset(fifo_ctl
):
103 case mmr_offset(int_stat
):
104 dv_w1c_2 (valuep
, value
, 0);
106 case mmr_offset(master_stat
):
107 dv_w1c_2 (valuep
, value
, MPROG
| SDASEN
| SCLSEN
| BUSBUSY
);
109 case mmr_offset(slave_stat
):
110 case mmr_offset(fifo_stat
):
111 case mmr_offset(rcv_data8
):
112 case mmr_offset(rcv_data16
):
113 /* These are all RO. XXX: Does these throw error ? */
115 case mmr_offset(xmt_data8
):
117 case mmr_offset(xmt_data16
):
118 twi
->xmt_fifo
= value
;
121 dv_bfin_mmr_invalid (me
, addr
, nr_bytes
, true);
129 bfin_twi_io_read_buffer (struct hw
*me
, void *dest
, int space
,
130 address_word addr
, unsigned nr_bytes
)
132 struct bfin_twi
*twi
= hw_data (me
);
136 mmr_off
= addr
- twi
->base
;
137 valuep
= (void *)((unsigned long)twi
+ mmr_base() + mmr_off
);
141 dv_bfin_mmr_require_16 (me
, addr
, nr_bytes
, false);
145 case mmr_offset(clkdiv
):
146 case mmr_offset(control
):
147 case mmr_offset(slave_ctl
):
148 case mmr_offset(slave_stat
):
149 case mmr_offset(slave_addr
):
150 case mmr_offset(master_ctl
):
151 case mmr_offset(master_stat
):
152 case mmr_offset(master_addr
):
153 case mmr_offset(int_stat
):
154 case mmr_offset(int_mask
):
155 case mmr_offset(fifo_ctl
):
156 case mmr_offset(fifo_stat
):
157 dv_store_2 (dest
, *valuep
);
159 case mmr_offset(rcv_data8
):
160 case mmr_offset(rcv_data16
):
161 dv_store_2 (dest
, twi
->rcv_fifo
);
163 case mmr_offset(xmt_data8
):
164 case mmr_offset(xmt_data16
):
165 /* These always read as 0. */
166 dv_store_2 (dest
, 0);
169 dv_bfin_mmr_invalid (me
, addr
, nr_bytes
, false);
176 static const struct hw_port_descriptor bfin_twi_ports
[] = {
177 { "stat", 0, 0, output_port
, },
182 attach_bfin_twi_regs (struct hw
*me
, struct bfin_twi
*twi
)
184 address_word attach_address
;
186 unsigned attach_size
;
187 reg_property_spec reg
;
189 if (hw_find_property (me
, "reg") == NULL
)
190 hw_abort (me
, "Missing \"reg\" property");
192 if (!hw_find_reg_array_property (me
, "reg", 0, ®
))
193 hw_abort (me
, "\"reg\" property must contain three addr/size entries");
195 hw_unit_address_to_attach_address (hw_parent (me
),
197 &attach_space
, &attach_address
, me
);
198 hw_unit_size_to_attach_size (hw_parent (me
), ®
.size
, &attach_size
, me
);
200 if (attach_size
!= BFIN_MMR_TWI_SIZE
)
201 hw_abort (me
, "\"reg\" size must be %#x", BFIN_MMR_TWI_SIZE
);
203 hw_attach_address (hw_parent (me
),
204 0, attach_space
, attach_address
, attach_size
, me
);
206 twi
->base
= attach_address
;
210 bfin_twi_finish (struct hw
*me
)
212 struct bfin_twi
*twi
;
214 twi
= HW_ZALLOC (me
, struct bfin_twi
);
216 set_hw_data (me
, twi
);
217 set_hw_io_read_buffer (me
, bfin_twi_io_read_buffer
);
218 set_hw_io_write_buffer (me
, bfin_twi_io_write_buffer
);
219 set_hw_ports (me
, bfin_twi_ports
);
221 attach_bfin_twi_regs (me
, twi
);
224 const struct hw_descriptor dv_bfin_twi_descriptor
[] = {
225 {"bfin_twi", bfin_twi_finish
,},