1 /* This file is part of the program psim.
3 Copyright (C) 1994-1997, Andrew Cagney <cagney@highland.com.au>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
26 #include "sim-assert.h"
33 /* TODO: create sim/common/device.h */
34 void device_error (device
*me
, char* message
, ...);
35 int device_io_read_buffer(device
*me
, void *dest
, int space
, address_word addr
, unsigned nr_bytes
, sim_cpu
*processor
, sim_cia cia
);
36 int device_io_write_buffer(device
*me
, const void *source
, int space
, address_word addr
, unsigned nr_bytes
, sim_cpu
*processor
, sim_cia cia
);
39 /* "core" module install handler.
41 This is called via sim_module_install to install the "core"
42 subsystem into the simulator. */
45 static MODULE_INIT_FN sim_core_init
;
46 static MODULE_UNINSTALL_FN sim_core_uninstall
;
51 sim_core_install (SIM_DESC sd
)
53 SIM_ASSERT (STATE_MAGIC (sd
) == SIM_MAGIC_NUMBER
);
55 /* establish the other handlers */
56 sim_module_add_uninstall_fn (sd
, sim_core_uninstall
);
57 sim_module_add_init_fn (sd
, sim_core_init
);
59 /* establish any initial data structures - none */
65 /* Uninstall the "core" subsystem from the simulator. */
69 sim_core_uninstall (SIM_DESC sd
)
71 sim_core
*core
= STATE_CORE(sd
);
73 /* blow away any mappings */
74 for (map
= 0; map
< nr_maps
; map
++) {
75 sim_core_mapping
*curr
= core
->common
.map
[map
].first
;
76 while (curr
!= NULL
) {
77 sim_core_mapping
*tbd
= curr
;
79 if (tbd
->free_buffer
!= NULL
) {
80 SIM_ASSERT(tbd
->buffer
!= NULL
);
81 zfree(tbd
->free_buffer
);
85 core
->common
.map
[map
].first
= NULL
;
93 sim_core_init (SIM_DESC sd
)
102 #ifndef SIM_CORE_SIGNAL
103 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
104 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
107 #if EXTERN_SIM_CORE_P
109 sim_core_signal (SIM_DESC sd
,
115 transfer_type transfer
,
116 sim_core_signals sig
)
118 const char *copy
= (transfer
== read_transfer
? "read" : "write");
119 address_word ip
= CIA_ADDR (cia
);
122 case sim_core_unmapped_signal
:
123 sim_io_eprintf (sd
, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
124 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
125 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGSEGV
);
127 case sim_core_unaligned_signal
:
128 sim_io_eprintf (sd
, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
129 nr_bytes
, copy
, (unsigned long) addr
, (unsigned long) ip
);
130 sim_engine_halt (sd
, cpu
, NULL
, cia
, sim_stopped
, SIM_SIGBUS
);
133 sim_engine_abort (sd
, cpu
, cia
,
134 "sim_core_signal - internal error - bad switch");
140 #if EXTERN_SIM_CORE_P
141 static sim_core_mapping
*
142 new_sim_core_mapping (SIM_DESC sd
,
146 address_word nr_bytes
,
156 sim_core_mapping
*new_mapping
= ZALLOC(sim_core_mapping
);
158 new_mapping
->level
= level
;
159 new_mapping
->space
= space
;
160 new_mapping
->base
= addr
;
161 new_mapping
->nr_bytes
= nr_bytes
;
162 new_mapping
->bound
= addr
+ (nr_bytes
- 1);
164 new_mapping
->mask
= (unsigned) 0 - 1;
166 new_mapping
->mask
= modulo
- 1;
167 new_mapping
->buffer
= buffer
;
168 new_mapping
->free_buffer
= free_buffer
;
169 new_mapping
->device
= device
;
175 #if EXTERN_SIM_CORE_P
177 sim_core_map_attach (SIM_DESC sd
,
178 sim_core_map
*access_map
,
182 address_word nr_bytes
,
185 struct hw
*client
, /*callback/default*/
187 device
*client
, /*callback/default*/
189 void *buffer
, /*raw_memory*/
190 void *free_buffer
) /*raw_memory*/
192 /* find the insertion point for this additional mapping and then
194 sim_core_mapping
*next_mapping
;
195 sim_core_mapping
**last_mapping
;
197 SIM_ASSERT ((client
== NULL
) != (buffer
== NULL
));
198 SIM_ASSERT ((client
== NULL
) >= (free_buffer
!= NULL
));
200 /* actually do occasionally get a zero size map */
204 device_error(client
, "called on sim_core_map_attach with size zero");
207 sim_hw_abort (sd
, client
, "called on sim_core_map_attach with size zero");
209 sim_io_error (sd
, "called on sim_core_map_attach with size zero");
212 /* find the insertion point (between last/next) */
213 next_mapping
= access_map
->first
;
214 last_mapping
= &access_map
->first
;
215 while(next_mapping
!= NULL
216 && (next_mapping
->level
< level
217 || (next_mapping
->level
== level
218 && next_mapping
->bound
< addr
)))
220 /* provided levels are the same */
221 /* assert: next_mapping->base > all bases before next_mapping */
222 /* assert: next_mapping->bound >= all bounds before next_mapping */
223 last_mapping
= &next_mapping
->next
;
224 next_mapping
= next_mapping
->next
;
227 /* check insertion point correct */
228 SIM_ASSERT (next_mapping
== NULL
|| next_mapping
->level
>= level
);
229 if (next_mapping
!= NULL
&& next_mapping
->level
== level
230 && next_mapping
->base
< (addr
+ (nr_bytes
- 1)))
233 device_error (client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
237 (long) (addr
+ (nr_bytes
- 1)),
239 (long) next_mapping
->base
,
240 (long) next_mapping
->bound
,
241 (long) next_mapping
->nr_bytes
);
244 sim_hw_abort (sd
, client
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
248 (long) (addr
+ (nr_bytes
- 1)),
250 (long) next_mapping
->base
,
251 (long) next_mapping
->bound
,
252 (long) next_mapping
->nr_bytes
);
254 sim_io_error (sd
, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
258 (long) (addr
+ (nr_bytes
- 1)),
260 (long) next_mapping
->base
,
261 (long) next_mapping
->bound
,
262 (long) next_mapping
->nr_bytes
);
265 /* create/insert the new mapping */
266 *last_mapping
= new_sim_core_mapping(sd
,
268 space
, addr
, nr_bytes
, modulo
,
269 client
, buffer
, free_buffer
);
270 (*last_mapping
)->next
= next_mapping
;
275 /* Attach memory or a memory mapped device to the simulator.
276 See sim-core.h for a full description. */
278 #if EXTERN_SIM_CORE_P
280 sim_core_attach (SIM_DESC sd
,
286 address_word nr_bytes
,
293 void *optional_buffer
)
295 sim_core
*memory
= STATE_CORE(sd
);
300 /* check for for attempt to use unimplemented per-processor core map */
302 sim_io_error (sd
, "sim_core_map_attach - processor specific memory map not yet supported");
304 /* verify modulo memory */
305 if (!WITH_MODULO_MEMORY
&& modulo
!= 0)
308 device_error (client
, "sim_core_attach - internal error - modulo memory disabled");
311 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo memory disabled");
313 sim_io_error (sd
, "sim_core_attach - internal error - modulo memory disabled");
315 if (client
!= NULL
&& modulo
!= 0)
318 device_error (client
, "sim_core_attach - internal error - modulo and callback memory conflict");
321 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo and callback memory conflict");
323 sim_io_error (sd
, "sim_core_attach - internal error - modulo and callback memory conflict");
327 unsigned mask
= modulo
- 1;
329 while (mask
>= sizeof (unsigned64
)) /* minimum modulo */
336 if (mask
!= sizeof (unsigned64
) - 1)
339 device_error (client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
342 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
344 sim_io_error (sd
, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo
);
348 /* verify consistency between device and buffer */
349 if (client
!= NULL
&& optional_buffer
!= NULL
)
352 device_error (client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
355 sim_hw_abort (sd
, client
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
357 sim_io_error (sd
, "sim_core_attach - internal error - conflicting buffer and attach arguments");
361 if (optional_buffer
== NULL
)
363 int padding
= (addr
% sizeof (unsigned64
));
364 unsigned long bytes
= (modulo
== 0 ? nr_bytes
: modulo
) + padding
;
365 free_buffer
= zalloc (bytes
);
366 buffer
= (char*) free_buffer
+ padding
;
370 buffer
= optional_buffer
;
381 /* attach the region to all applicable access maps */
386 if (mapmask
& (1 << map
))
388 sim_core_map_attach (sd
, &memory
->common
.map
[map
],
389 level
, space
, addr
, nr_bytes
, modulo
,
390 client
, buffer
, free_buffer
);
395 /* Just copy this map to each of the processor specific data structures.
396 FIXME - later this will be replaced by true processor specific
400 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
402 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
409 /* Remove any memory reference related to this address */
410 #if EXTERN_SIM_CORE_P
412 sim_core_map_detach (SIM_DESC sd
,
413 sim_core_map
*access_map
,
418 sim_core_mapping
**entry
;
419 for (entry
= &access_map
->first
;
421 entry
= &(*entry
)->next
)
423 if ((*entry
)->base
== addr
424 && (*entry
)->level
== level
425 && (*entry
)->space
== space
)
427 sim_core_mapping
*dead
= (*entry
);
428 (*entry
) = dead
->next
;
429 if (dead
->free_buffer
!= NULL
)
430 zfree (dead
->free_buffer
);
438 #if EXTERN_SIM_CORE_P
440 sim_core_detach (SIM_DESC sd
,
446 sim_core
*memory
= STATE_CORE (sd
);
448 for (map
= 0; map
< nr_maps
; map
++)
450 sim_core_map_detach (sd
, &memory
->common
.map
[map
],
451 level
, address_space
, addr
);
453 /* Just copy this update to each of the processor specific data
454 structures. FIXME - later this will be replaced by true
455 processor specific maps. */
458 for (i
= 0; i
< MAX_NR_PROCESSORS
; i
++)
460 CPU_CORE (STATE_CPU (sd
, i
))->common
= STATE_CORE (sd
)->common
;
467 STATIC_INLINE_SIM_CORE\
469 sim_core_find_mapping(sim_core_common
*core
,
473 transfer_type transfer
,
474 int abort
, /*either 0 or 1 - hint to inline/-O */
475 sim_cpu
*cpu
, /* abort => cpu != NULL */
478 sim_core_mapping
*mapping
= core
->map
[map
].first
;
479 ASSERT ((addr
& (nr_bytes
- 1)) == 0); /* must be aligned */
480 ASSERT ((addr
+ (nr_bytes
- 1)) >= addr
); /* must not wrap */
481 ASSERT (!abort
|| cpu
!= NULL
); /* abort needs a non null CPU */
482 while (mapping
!= NULL
)
484 if (addr
>= mapping
->base
485 && (addr
+ (nr_bytes
- 1)) <= mapping
->bound
)
487 mapping
= mapping
->next
;
491 SIM_CORE_SIGNAL (CPU_STATE (cpu
), cpu
, cia
, map
, nr_bytes
, addr
, transfer
,
492 sim_core_unmapped_signal
);
498 STATIC_INLINE_SIM_CORE\
500 sim_core_translate (sim_core_mapping
*mapping
,
503 if (WITH_MODULO_MEMORY
)
504 return (void *)((unsigned8
*) mapping
->buffer
505 + ((addr
- mapping
->base
) & mapping
->mask
));
507 return (void *)((unsigned8
*) mapping
->buffer
508 + addr
- mapping
->base
);
512 #if EXTERN_SIM_CORE_P
514 sim_core_read_buffer (SIM_DESC sd
,
521 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
525 unsigned_word raddr
= addr
+ count
;
526 sim_core_mapping
*mapping
=
527 sim_core_find_mapping (core
, map
,
528 raddr
, /*nr-bytes*/1,
530 0 /*dont-abort*/, NULL
, NULL_CIA
);
534 if (mapping
->device
!= NULL
)
536 int nr_bytes
= len
- count
;
537 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
538 nr_bytes
= mapping
->bound
- raddr
+ 1;
539 if (device_io_read_buffer (mapping
->device
,
540 (unsigned_1
*)buffer
+ count
,
545 CIA_GET (cpu
)) != nr_bytes
)
552 if (mapping
->device
!= NULL
)
554 int nr_bytes
= len
- count
;
555 if (raddr
+ nr_bytes
- 1> mapping
->bound
)
556 nr_bytes
= mapping
->bound
- raddr
+ 1;
557 if (sim_hw_io_read_buffer (sd
, mapping
->device
,
558 (unsigned_1
*)buffer
+ count
,
561 nr_bytes
) != nr_bytes
)
567 ((unsigned_1
*)buffer
)[count
] =
568 *(unsigned_1
*)sim_core_translate(mapping
, raddr
);
576 #if EXTERN_SIM_CORE_P
578 sim_core_write_buffer (SIM_DESC sd
,
585 sim_core_common
*core
= (cpu
== NULL
? &STATE_CORE (sd
)->common
: &CPU_CORE (cpu
)->common
);
589 unsigned_word raddr
= addr
+ count
;
590 sim_core_mapping
*mapping
=
591 sim_core_find_mapping (core
, map
,
592 raddr
, /*nr-bytes*/1,
594 0 /*dont-abort*/, NULL
, NULL_CIA
);
598 if (WITH_CALLBACK_MEMORY
599 && mapping
->device
!= NULL
)
601 int nr_bytes
= len
- count
;
602 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
603 nr_bytes
= mapping
->bound
- raddr
+ 1;
604 if (device_io_write_buffer (mapping
->device
,
605 (unsigned_1
*)buffer
+ count
,
610 CIA_GET(cpu
)) != nr_bytes
)
617 if (WITH_CALLBACK_MEMORY
618 && mapping
->device
!= NULL
)
620 int nr_bytes
= len
- count
;
621 if (raddr
+ nr_bytes
- 1 > mapping
->bound
)
622 nr_bytes
= mapping
->bound
- raddr
+ 1;
623 if (sim_hw_io_write_buffer (sd
, mapping
->device
,
624 (unsigned_1
*)buffer
+ count
,
627 nr_bytes
) != nr_bytes
)
633 *(unsigned_1
*)sim_core_translate(mapping
, raddr
) =
634 ((unsigned_1
*)buffer
)[count
];
642 #if EXTERN_SIM_CORE_P
644 sim_core_set_xor (SIM_DESC sd
,
648 /* set up the XOR map if required. */
649 if (WITH_XOR_ENDIAN
) {
651 sim_core
*core
= STATE_CORE (sd
);
652 sim_cpu_core
*cpu_core
= (cpu
!= NULL
? CPU_CORE (cpu
) : NULL
);
653 if (cpu_core
!= NULL
)
658 mask
= WITH_XOR_ENDIAN
- 1;
661 while (i
- 1 < WITH_XOR_ENDIAN
)
663 cpu_core
->xor[i
-1] = mask
;
664 mask
= (mask
<< 1) & (WITH_XOR_ENDIAN
- 1);
671 core
->byte_xor
= WITH_XOR_ENDIAN
- 1;
679 sim_engine_abort (sd
, NULL
, NULL_CIA
,
680 "Attempted to enable xor-endian mode when permenantly disabled.");
686 #if EXTERN_SIM_CORE_P
688 reverse_n (unsigned_1
*dest
,
689 const unsigned_1
*src
,
693 for (i
= 0; i
< nr_bytes
; i
++)
695 dest
[nr_bytes
- i
- 1] = src
[i
];
701 #if EXTERN_SIM_CORE_P
703 sim_core_xor_read_buffer (SIM_DESC sd
,
710 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
711 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
712 return sim_core_read_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
714 /* only break up transfers when xor-endian is both selected and enabled */
716 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero-sized array */
717 unsigned nr_transfered
= 0;
718 address_word start
= addr
;
719 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
721 /* initial and intermediate transfers are broken when they cross
722 an XOR endian boundary */
723 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
724 /* initial/intermediate transfers */
726 /* since xor-endian is enabled stop^xor defines the start
727 address of the transfer */
728 stop
= start
+ nr_this_transfer
- 1;
729 SIM_ASSERT (start
<= stop
);
730 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
731 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
733 return nr_transfered
;
734 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
735 nr_transfered
+= nr_this_transfer
;
736 nr_this_transfer
= WITH_XOR_ENDIAN
;
740 nr_this_transfer
= nr_bytes
- nr_transfered
;
741 stop
= start
+ nr_this_transfer
- 1;
742 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
743 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
745 return nr_transfered
;
746 reverse_n (&((unsigned_1
*)buffer
)[nr_transfered
], x
, nr_this_transfer
);
753 #if EXTERN_SIM_CORE_P
755 sim_core_xor_write_buffer (SIM_DESC sd
,
762 address_word byte_xor
= (cpu
== NULL
? STATE_CORE (sd
)->byte_xor
: CPU_CORE (cpu
)->xor[0]);
763 if (!WITH_XOR_ENDIAN
|| !byte_xor
)
764 return sim_core_write_buffer (sd
, cpu
, map
, buffer
, addr
, nr_bytes
);
766 /* only break up transfers when xor-endian is both selected and enabled */
768 unsigned_1 x
[WITH_XOR_ENDIAN
+ 1]; /* +1 to avoid zero sized array */
769 unsigned nr_transfered
= 0;
770 address_word start
= addr
;
771 unsigned nr_this_transfer
= (WITH_XOR_ENDIAN
- (addr
& ~(WITH_XOR_ENDIAN
- 1)));
773 /* initial and intermediate transfers are broken when they cross
774 an XOR endian boundary */
775 while (nr_transfered
+ nr_this_transfer
< nr_bytes
)
776 /* initial/intermediate transfers */
778 /* since xor-endian is enabled stop^xor defines the start
779 address of the transfer */
780 stop
= start
+ nr_this_transfer
- 1;
781 SIM_ASSERT (start
<= stop
);
782 SIM_ASSERT ((stop
^ byte_xor
) <= (start
^ byte_xor
));
783 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
784 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
786 return nr_transfered
;
787 nr_transfered
+= nr_this_transfer
;
788 nr_this_transfer
= WITH_XOR_ENDIAN
;
792 nr_this_transfer
= nr_bytes
- nr_transfered
;
793 stop
= start
+ nr_this_transfer
- 1;
794 SIM_ASSERT (stop
== (addr
+ nr_bytes
- 1));
795 reverse_n (x
, &((unsigned_1
*)buffer
)[nr_transfered
], nr_this_transfer
);
796 if (sim_core_read_buffer (sd
, cpu
, map
, x
, stop
^ byte_xor
, nr_this_transfer
)
798 return nr_transfered
;
806 /* define the read/write 1/2/4/8/16/word functions */
809 #include "sim-n-core.h"
812 #include "sim-n-core.h"
816 #include "sim-n-core.h"
820 #include "sim-n-core.h"
824 #include "sim-n-core.h"
827 #include "sim-n-core.h"
831 #include "sim-n-core.h"
834 #include "sim-n-core.h"
837 #include "sim-n-core.h"