sim/common/sim-core.c

   1 /* The common simulator framework for GDB, the GNU Debugger.
   2
   3    Copyright 2002-2015 Free Software Foundation, Inc.
   4
   5    Contributed by Andrew Cagney and Red Hat.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22
  23 #ifndef SIM_CORE_C
  24 #define SIM_CORE_C
  25
  26 #include "sim-main.h"
  27 #include "sim-assert.h"
  28
  29 #if (WITH_HW)
  30 #include "sim-hw.h"
  31 #define device_error(client, ...) device_error ((device *)(client), __VA_ARGS__)
  32 #define device_io_read_buffer(client, ...) device_io_read_buffer ((device *)(client), __VA_ARGS__)
  33 #define device_io_write_buffer(client, ...) device_io_write_buffer ((device *)(client), __VA_ARGS__)
  34 #endif
  35
  36 /* "core" module install handler.
  37
  38    This is called via sim_module_install to install the "core"
  39    subsystem into the simulator.  */
  40
  41 #if EXTERN_SIM_CORE_P
  42 static MODULE_INIT_FN sim_core_init;
  43 static MODULE_UNINSTALL_FN sim_core_uninstall;
  44 #endif
  45
  46 #if EXTERN_SIM_CORE_P
  47 SIM_RC
  48 sim_core_install (SIM_DESC sd)
  49 {
  50   SIM_ASSERT (STATE_MAGIC (sd) == SIM_MAGIC_NUMBER);
  51
  52   /* establish the other handlers */
  53   sim_module_add_uninstall_fn (sd, sim_core_uninstall);
  54   sim_module_add_init_fn (sd, sim_core_init);
  55
  56   /* establish any initial data structures - none */
  57   return SIM_RC_OK;
  58 }
  59 #endif
  60
  61
  62 /* Uninstall the "core" subsystem from the simulator.  */
  63
  64 #if EXTERN_SIM_CORE_P
  65 static void
  66 sim_core_uninstall (SIM_DESC sd)
  67 {
  68   sim_core *core = STATE_CORE (sd);
  69   unsigned map;
  70   /* blow away any mappings */
  71   for (map = 0; map < nr_maps; map++) {
  72     sim_core_mapping *curr = core->common.map[map].first;
  73     while (curr != NULL) {
  74       sim_core_mapping *tbd = curr;
  75       curr = curr->next;
  76       if (tbd->free_buffer != NULL) {
  77         SIM_ASSERT (tbd->buffer != NULL);
  78         free (tbd->free_buffer);
  79       }
  80       free (tbd);
  81     }
  82     core->common.map[map].first = NULL;
  83   }
  84 }
  85 #endif
  86
  87
  88 #if EXTERN_SIM_CORE_P
  89 static SIM_RC
  90 sim_core_init (SIM_DESC sd)
  91 {
  92   /* Nothing to do */
  93   return SIM_RC_OK;
  94 }
  95 #endif
  96
  97
  98
  99 #ifndef SIM_CORE_SIGNAL
 100 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
 101 sim_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), (TRANSFER), (ERROR))
 102 #endif
 103
 104 #if EXTERN_SIM_CORE_P
 105 void
 106 sim_core_signal (SIM_DESC sd,
 107                  sim_cpu *cpu,
 108                  sim_cia cia,
 109                  unsigned map,
 110                  int nr_bytes,
 111                  address_word addr,
 112                  transfer_type transfer,
 113                  sim_core_signals sig)
 114 {
 115   const char *copy = (transfer == read_transfer ? "read" : "write");
 116   address_word ip = CIA_ADDR (cia);
 117   switch (sig)
 118     {
 119     case sim_core_unmapped_signal:
 120       sim_io_eprintf (sd, "core: %d byte %s to unmapped address 0x%lx at 0x%lx\n",
 121                       nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
 122       sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGSEGV);
 123       break;
 124     case sim_core_unaligned_signal:
 125       sim_io_eprintf (sd, "core: %d byte misaligned %s to address 0x%lx at 0x%lx\n",
 126                       nr_bytes, copy, (unsigned long) addr, (unsigned long) ip);
 127       sim_engine_halt (sd, cpu, NULL, cia, sim_stopped, SIM_SIGBUS);
 128       break;
 129     default:
 130       sim_engine_abort (sd, cpu, cia,
 131                         "sim_core_signal - internal error - bad switch");
 132     }
 133 }
 134 #endif
 135
 136
 137 #if EXTERN_SIM_CORE_P
 138 static sim_core_mapping *
 139 new_sim_core_mapping (SIM_DESC sd,
 140                       int level,
 141                       int space,
 142                       address_word addr,
 143                       address_word nr_bytes,
 144                       unsigned modulo,
 145 #if WITH_HW
 146                       struct hw *device,
 147 #else
 148                       device *device,
 149 #endif
 150                       void *buffer,
 151                       void *free_buffer)
 152 {
 153   sim_core_mapping *new_mapping = ZALLOC (sim_core_mapping);
 154   /* common */
 155   new_mapping->level = level;
 156   new_mapping->space = space;
 157   new_mapping->base = addr;
 158   new_mapping->nr_bytes = nr_bytes;
 159   new_mapping->bound = addr + (nr_bytes - 1);
 160   new_mapping->mask = modulo - 1;
 161   new_mapping->buffer = buffer;
 162   new_mapping->free_buffer = free_buffer;
 163   new_mapping->device = device;
 164   return new_mapping;
 165 }
 166 #endif
 167
 168
 169 #if EXTERN_SIM_CORE_P
 170 static void
 171 sim_core_map_attach (SIM_DESC sd,
 172                      sim_core_map *access_map,
 173                      int level,
 174                      int space,
 175                      address_word addr,
 176                      address_word nr_bytes,
 177                      unsigned modulo,
 178 #if WITH_HW
 179                      struct hw *client, /*callback/default*/
 180 #else
 181                      device *client, /*callback/default*/
 182 #endif
 183                      void *buffer, /*raw_memory*/
 184                      void *free_buffer) /*raw_memory*/
 185 {
 186   /* find the insertion point for this additional mapping and then
 187      insert */
 188   sim_core_mapping *next_mapping;
 189   sim_core_mapping **last_mapping;
 190
 191   SIM_ASSERT ((client == NULL) != (buffer == NULL));
 192   SIM_ASSERT ((client == NULL) >= (free_buffer != NULL));
 193
 194   /* actually do occasionally get a zero size map */
 195   if (nr_bytes == 0)
 196     {
 197 #if (WITH_DEVICES)
 198       device_error (client, "called on sim_core_map_attach with size zero");
 199 #endif
 200 #if (WITH_HW)
 201       sim_hw_abort (sd, client, "called on sim_core_map_attach with size zero");
 202 #endif
 203       sim_io_error (sd, "called on sim_core_map_attach with size zero");
 204     }
 205
 206   /* find the insertion point (between last/next) */
 207   next_mapping = access_map->first;
 208   last_mapping = &access_map->first;
 209   while (next_mapping != NULL
 210         && (next_mapping->level < level
 211             || (next_mapping->level == level
 212                 && next_mapping->bound < addr)))
 213     {
 214       /* provided levels are the same */
 215       /* assert: next_mapping->base > all bases before next_mapping */
 216       /* assert: next_mapping->bound >= all bounds before next_mapping */
 217       last_mapping = &next_mapping->next;
 218       next_mapping = next_mapping->next;
 219     }
 220
 221   /* check insertion point correct */
 222   SIM_ASSERT (next_mapping == NULL || next_mapping->level >= level);
 223   if (next_mapping != NULL && next_mapping->level == level
 224       && next_mapping->base < (addr + (nr_bytes - 1)))
 225     {
 226 #if (WITH_DEVICES)
 227       device_error (client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
 228                     space,
 229                     (long) addr,
 230                     (long) (addr + nr_bytes - 1),
 231                     (long) nr_bytes,
 232                     next_mapping->space,
 233                     (long) next_mapping->base,
 234                     (long) next_mapping->bound,
 235                     (long) next_mapping->nr_bytes);
 236 #endif
 237 #if WITH_HW
 238       sim_hw_abort (sd, client, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
 239                     space,
 240                     (long) addr,
 241                     (long) (addr + (nr_bytes - 1)),
 242                     (long) nr_bytes,
 243                     next_mapping->space,
 244                     (long) next_mapping->base,
 245                     (long) next_mapping->bound,
 246                     (long) next_mapping->nr_bytes);
 247 #endif
 248       sim_io_error (sd, "memory map %d:0x%lx..0x%lx (%ld bytes) overlaps %d:0x%lx..0x%lx (%ld bytes)",
 249                     space,
 250                     (long) addr,
 251                     (long) (addr + (nr_bytes - 1)),
 252                     (long) nr_bytes,
 253                     next_mapping->space,
 254                     (long) next_mapping->base,
 255                     (long) next_mapping->bound,
 256                     (long) next_mapping->nr_bytes);
 257   }
 258
 259   /* create/insert the new mapping */
 260   *last_mapping = new_sim_core_mapping (sd,
 261                                         level,
 262                                         space, addr, nr_bytes, modulo,
 263                                         client, buffer, free_buffer);
 264   (*last_mapping)->next = next_mapping;
 265 }
 266 #endif
 267
 268
 269 /* Attach memory or a memory mapped device to the simulator.
 270    See sim-core.h for a full description.  */
 271
 272 #if EXTERN_SIM_CORE_P
 273 void
 274 sim_core_attach (SIM_DESC sd,
 275                  sim_cpu *cpu,
 276                  int level,
 277                  unsigned mapmask,
 278                  int space,
 279                  address_word addr,
 280                  address_word nr_bytes,
 281                  unsigned modulo,
 282 #if WITH_HW
 283                  struct hw *client,
 284 #else
 285                  device *client,
 286 #endif
 287                  void *optional_buffer)
 288 {
 289   sim_core *memory = STATE_CORE (sd);
 290   unsigned map;
 291   void *buffer;
 292   void *free_buffer;
 293
 294   /* check for for attempt to use unimplemented per-processor core map */
 295   if (cpu != NULL)
 296     sim_io_error (sd, "sim_core_map_attach - processor specific memory map not yet supported");
 297
 298   if (client != NULL && modulo != 0)
 299     {
 300 #if (WITH_DEVICES)
 301       device_error (client, "sim_core_attach - internal error - modulo and callback memory conflict");
 302 #endif
 303 #if (WITH_HW)
 304       sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo and callback memory conflict");
 305 #endif
 306       sim_io_error (sd, "sim_core_attach - internal error - modulo and callback memory conflict");
 307     }
 308   if (modulo != 0)
 309     {
 310       unsigned mask = modulo - 1;
 311       /* any zero bits */
 312       while (mask >= sizeof (unsigned64)) /* minimum modulo */
 313         {
 314           if ((mask & 1) == 0)
 315             mask = 0;
 316           else
 317             mask >>= 1;
 318         }
 319       if (mask != sizeof (unsigned64) - 1)
 320         {
 321 #if (WITH_DEVICES)
 322           device_error (client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
 323 #endif
 324 #if (WITH_HW)
 325           sim_hw_abort (sd, client, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
 326 #endif
 327           sim_io_error (sd, "sim_core_attach - internal error - modulo %lx not power of two", (long) modulo);
 328         }
 329     }
 330
 331   /* verify consistency between device and buffer */
 332   if (client != NULL && optional_buffer != NULL)
 333     {
 334 #if (WITH_DEVICES)
 335       device_error (client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
 336 #endif
 337 #if (WITH_HW)
 338       sim_hw_abort (sd, client, "sim_core_attach - internal error - conflicting buffer and attach arguments");
 339 #endif
 340       sim_io_error (sd, "sim_core_attach - internal error - conflicting buffer and attach arguments");
 341     }
 342   if (client == NULL)
 343     {
 344       if (optional_buffer == NULL)
 345         {
 346           int padding = (addr % sizeof (unsigned64));
 347           unsigned long bytes = (modulo == 0 ? nr_bytes : modulo) + padding;
 348           free_buffer = zalloc (bytes);
 349           buffer = (char*) free_buffer + padding;
 350         }
 351       else
 352         {
 353           buffer = optional_buffer;
 354           free_buffer = NULL;
 355         }
 356     }
 357   else
 358     {
 359       /* a device */
 360       buffer = NULL;
 361       free_buffer = NULL;
 362     }
 363
 364   /* attach the region to all applicable access maps */
 365   for (map = 0;
 366        map < nr_maps;
 367        map++)
 368     {
 369       if (mapmask & (1 << map))
 370         {
 371           sim_core_map_attach (sd, &memory->common.map[map],
 372                                level, space, addr, nr_bytes, modulo,
 373                                client, buffer, free_buffer);
 374           free_buffer = NULL;
 375         }
 376     }
 377
 378   /* Just copy this map to each of the processor specific data structures.
 379      FIXME - later this will be replaced by true processor specific
 380      maps. */
 381   {
 382     int i;
 383     for (i = 0; i < MAX_NR_PROCESSORS; i++)
 384       {
 385         CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
 386       }
 387   }
 388 }
 389 #endif
 390
 391
 392 /* Remove any memory reference related to this address */
 393 #if EXTERN_SIM_CORE_P
 394 static void
 395 sim_core_map_detach (SIM_DESC sd,
 396                      sim_core_map *access_map,
 397                      int level,
 398                      int space,
 399                      address_word addr)
 400 {
 401   sim_core_mapping **entry;
 402   for (entry = &access_map->first;
 403        (*entry) != NULL;
 404        entry = &(*entry)->next)
 405     {
 406       if ((*entry)->base == addr
 407           && (*entry)->level == level
 408           && (*entry)->space == space)
 409         {
 410           sim_core_mapping *dead = (*entry);
 411           (*entry) = dead->next;
 412           if (dead->free_buffer != NULL)
 413             free (dead->free_buffer);
 414           free (dead);
 415           return;
 416         }
 417     }
 418 }
 419 #endif
 420
 421 #if EXTERN_SIM_CORE_P
 422 void
 423 sim_core_detach (SIM_DESC sd,
 424                  sim_cpu *cpu,
 425                  int level,
 426                  int address_space,
 427                  address_word addr)
 428 {
 429   sim_core *memory = STATE_CORE (sd);
 430   unsigned map;
 431   for (map = 0; map < nr_maps; map++)
 432     {
 433       sim_core_map_detach (sd, &memory->common.map[map],
 434                            level, address_space, addr);
 435     }
 436   /* Just copy this update to each of the processor specific data
 437      structures.  FIXME - later this will be replaced by true
 438      processor specific maps. */
 439   {
 440     int i;
 441     for (i = 0; i < MAX_NR_PROCESSORS; i++)
 442       {
 443         CPU_CORE (STATE_CPU (sd, i))->common = STATE_CORE (sd)->common;
 444       }
 445   }
 446 }
 447 #endif
 448
 449
 450 STATIC_INLINE_SIM_CORE\
 451 (sim_core_mapping *)
 452 sim_core_find_mapping (sim_core_common *core,
 453                        unsigned map,
 454                        address_word addr,
 455                        unsigned nr_bytes,
 456                        transfer_type transfer,
 457                        int abort, /*either 0 or 1 - hint to inline/-O */
 458                        sim_cpu *cpu, /* abort => cpu != NULL */
 459                        sim_cia cia)
 460 {
 461   sim_core_mapping *mapping = core->map[map].first;
 462   ASSERT ((addr & (nr_bytes - 1)) == 0); /* must be aligned */
 463   ASSERT ((addr + (nr_bytes - 1)) >= addr); /* must not wrap */
 464   ASSERT (!abort || cpu != NULL); /* abort needs a non null CPU */
 465   while (mapping != NULL)
 466     {
 467       if (addr >= mapping->base
 468           && (addr + (nr_bytes - 1)) <= mapping->bound)
 469         return mapping;
 470       mapping = mapping->next;
 471     }
 472   if (abort)
 473     {
 474       SIM_CORE_SIGNAL (CPU_STATE (cpu), cpu, cia, map, nr_bytes, addr, transfer,
 475                        sim_core_unmapped_signal);
 476     }
 477   return NULL;
 478 }
 479
 480
 481 STATIC_INLINE_SIM_CORE\
 482 (void *)
 483 sim_core_translate (sim_core_mapping *mapping,
 484                     address_word addr)
 485 {
 486   return (void *)((unsigned8 *) mapping->buffer
 487                   + ((addr - mapping->base) & mapping->mask));
 488 }
 489
 490
 491 #if EXTERN_SIM_CORE_P
 492 unsigned
 493 sim_core_read_buffer (SIM_DESC sd,
 494                       sim_cpu *cpu,
 495                       unsigned map,
 496                       void *buffer,
 497                       address_word addr,
 498                       unsigned len)
 499 {
 500   sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
 501   unsigned count = 0;
 502   while (count < len)
 503  {
 504     address_word raddr = addr + count;
 505     sim_core_mapping *mapping =
 506       sim_core_find_mapping (core, map,
 507                             raddr, /*nr-bytes*/1,
 508                             read_transfer,
 509                             0 /*dont-abort*/, NULL, NULL_CIA);
 510     if (mapping == NULL)
 511       break;
 512 #if (WITH_DEVICES)
 513     if (mapping->device != NULL)
 514       {
 515         int nr_bytes = len - count;
 516         sim_cia cia = cpu ? CPU_PC_GET (cpu) : NULL_CIA;
 517         if (raddr + nr_bytes - 1> mapping->bound)
 518           nr_bytes = mapping->bound - raddr + 1;
 519         if (device_io_read_buffer (mapping->device,
 520                                    (unsigned_1*)buffer + count,
 521                                    mapping->space,
 522                                    raddr,
 523                                    nr_bytes,
 524                                    sd,
 525                                    cpu,
 526                                    cia) != nr_bytes)
 527           break;
 528         count += nr_bytes;
 529         continue;
 530       }
 531 #endif
 532 #if (WITH_HW)
 533     if (mapping->device != NULL)
 534       {
 535         int nr_bytes = len - count;
 536         if (raddr + nr_bytes - 1> mapping->bound)
 537           nr_bytes = mapping->bound - raddr + 1;
 538         if (sim_hw_io_read_buffer (sd, mapping->device,
 539                                    (unsigned_1*)buffer + count,
 540                                    mapping->space,
 541                                    raddr,
 542                                    nr_bytes) != nr_bytes)
 543           break;
 544         count += nr_bytes;
 545         continue;
 546       }
 547 #endif
 548     ((unsigned_1*)buffer)[count] =
 549       *(unsigned_1*)sim_core_translate (mapping, raddr);
 550     count += 1;
 551  }
 552   return count;
 553 }
 554 #endif
 555
 556
 557 #if EXTERN_SIM_CORE_P
 558 unsigned
 559 sim_core_write_buffer (SIM_DESC sd,
 560                        sim_cpu *cpu,
 561                        unsigned map,
 562                        const void *buffer,
 563                        address_word addr,
 564                        unsigned len)
 565 {
 566   sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
 567   unsigned count = 0;
 568   while (count < len)
 569     {
 570       address_word raddr = addr + count;
 571       sim_core_mapping *mapping =
 572         sim_core_find_mapping (core, map,
 573                                raddr, /*nr-bytes*/1,
 574                                write_transfer,
 575                                0 /*dont-abort*/, NULL, NULL_CIA);
 576       if (mapping == NULL)
 577         break;
 578 #if (WITH_DEVICES)
 579       if (WITH_CALLBACK_MEMORY
 580           && mapping->device != NULL)
 581         {
 582           int nr_bytes = len - count;
 583           sim_cia cia = cpu ? CPU_PC_GET (cpu) : NULL_CIA;
 584           if (raddr + nr_bytes - 1 > mapping->bound)
 585             nr_bytes = mapping->bound - raddr + 1;
 586           if (device_io_write_buffer (mapping->device,
 587                                       (unsigned_1*)buffer + count,
 588                                       mapping->space,
 589                                       raddr,
 590                                       nr_bytes,
 591                                       sd,
 592                                       cpu,
 593                                       cia) != nr_bytes)
 594             break;
 595           count += nr_bytes;
 596           continue;
 597         }
 598 #endif
 599 #if (WITH_HW)
 600       if (WITH_CALLBACK_MEMORY
 601           && mapping->device != NULL)
 602         {
 603           int nr_bytes = len - count;
 604           if (raddr + nr_bytes - 1 > mapping->bound)
 605             nr_bytes = mapping->bound - raddr + 1;
 606           if (sim_hw_io_write_buffer (sd, mapping->device,
 607                                       (unsigned_1*)buffer + count,
 608                                       mapping->space,
 609                                       raddr,
 610                                       nr_bytes) != nr_bytes)
 611             break;
 612           count += nr_bytes;
 613           continue;
 614         }
 615 #endif
 616       *(unsigned_1*)sim_core_translate (mapping, raddr) =
 617         ((unsigned_1*)buffer)[count];
 618       count += 1;
 619     }
 620   return count;
 621 }
 622 #endif
 623
 624
 625 #if EXTERN_SIM_CORE_P
 626 void
 627 sim_core_set_xor (SIM_DESC sd,
 628                   sim_cpu *cpu,
 629                   int is_xor)
 630 {
 631   /* set up the XOR map if required. */
 632   if (WITH_XOR_ENDIAN) {
 633     {
 634       sim_core *core = STATE_CORE (sd);
 635       sim_cpu_core *cpu_core = (cpu != NULL ? CPU_CORE (cpu) : NULL);
 636       if (cpu_core != NULL)
 637         {
 638           int i = 1;
 639           unsigned mask;
 640           if (is_xor)
 641             mask = WITH_XOR_ENDIAN - 1;
 642           else
 643             mask = 0;
 644           while (i - 1 < WITH_XOR_ENDIAN)
 645             {
 646               cpu_core->xor[i-1] = mask;
 647               mask = (mask << 1) & (WITH_XOR_ENDIAN - 1);
 648               i = (i << 1);
 649             }
 650         }
 651       else
 652         {
 653           if (is_xor)
 654             core->byte_xor = WITH_XOR_ENDIAN - 1;
 655           else
 656             core->byte_xor = 0;
 657         }
 658     }
 659   }
 660   else {
 661     if (is_xor)
 662       sim_engine_abort (sd, NULL, NULL_CIA,
 663                         "Attempted to enable xor-endian mode when permenantly disabled.");
 664   }
 665 }
 666 #endif
 667
 668
 669 #if EXTERN_SIM_CORE_P
 670 static void
 671 reverse_n (unsigned_1 *dest,
 672            const unsigned_1 *src,
 673            int nr_bytes)
 674 {
 675   int i;
 676   for (i = 0; i < nr_bytes; i++)
 677     {
 678       dest [nr_bytes - i - 1] = src [i];
 679     }
 680 }
 681 #endif
 682
 683
 684 #if EXTERN_SIM_CORE_P
 685 unsigned
 686 sim_core_xor_read_buffer (SIM_DESC sd,
 687                           sim_cpu *cpu,
 688                           unsigned map,
 689                           void *buffer,
 690                           address_word addr,
 691                           unsigned nr_bytes)
 692 {
 693   address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
 694   if (!WITH_XOR_ENDIAN || !byte_xor)
 695     return sim_core_read_buffer (sd, cpu, map, buffer, addr, nr_bytes);
 696   else
 697     /* only break up transfers when xor-endian is both selected and enabled */
 698     {
 699       unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero-sized array */
 700       unsigned nr_transfered = 0;
 701       address_word start = addr;
 702       unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
 703       address_word stop;
 704       /* initial and intermediate transfers are broken when they cross
 705          an XOR endian boundary */
 706       while (nr_transfered + nr_this_transfer < nr_bytes)
 707         /* initial/intermediate transfers */
 708         {
 709           /* since xor-endian is enabled stop^xor defines the start
 710              address of the transfer */
 711           stop = start + nr_this_transfer - 1;
 712           SIM_ASSERT (start <= stop);
 713           SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
 714           if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
 715               != nr_this_transfer)
 716             return nr_transfered;
 717           reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
 718           nr_transfered += nr_this_transfer;
 719           nr_this_transfer = WITH_XOR_ENDIAN;
 720           start = stop + 1;
 721         }
 722       /* final transfer */
 723       nr_this_transfer = nr_bytes - nr_transfered;
 724       stop = start + nr_this_transfer - 1;
 725       SIM_ASSERT (stop == (addr + nr_bytes - 1));
 726       if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
 727           != nr_this_transfer)
 728         return nr_transfered;
 729       reverse_n (&((unsigned_1*)buffer)[nr_transfered], x, nr_this_transfer);
 730       return nr_bytes;
 731     }
 732 }
 733 #endif
 734
 735
 736 #if EXTERN_SIM_CORE_P
 737 unsigned
 738 sim_core_xor_write_buffer (SIM_DESC sd,
 739                            sim_cpu *cpu,
 740                            unsigned map,
 741                            const void *buffer,
 742                            address_word addr,
 743                            unsigned nr_bytes)
 744 {
 745   address_word byte_xor = (cpu == NULL ? STATE_CORE (sd)->byte_xor : CPU_CORE (cpu)->xor[0]);
 746   if (!WITH_XOR_ENDIAN || !byte_xor)
 747     return sim_core_write_buffer (sd, cpu, map, buffer, addr, nr_bytes);
 748   else
 749     /* only break up transfers when xor-endian is both selected and enabled */
 750     {
 751       unsigned_1 x[WITH_XOR_ENDIAN + 1]; /* +1 to avoid zero sized array */
 752       unsigned nr_transfered = 0;
 753       address_word start = addr;
 754       unsigned nr_this_transfer = (WITH_XOR_ENDIAN - (addr & ~(WITH_XOR_ENDIAN - 1)));
 755       address_word stop;
 756       /* initial and intermediate transfers are broken when they cross
 757          an XOR endian boundary */
 758       while (nr_transfered + nr_this_transfer < nr_bytes)
 759         /* initial/intermediate transfers */
 760         {
 761           /* since xor-endian is enabled stop^xor defines the start
 762              address of the transfer */
 763           stop = start + nr_this_transfer - 1;
 764           SIM_ASSERT (start <= stop);
 765           SIM_ASSERT ((stop ^ byte_xor) <= (start ^ byte_xor));
 766           reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
 767           if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
 768               != nr_this_transfer)
 769             return nr_transfered;
 770           nr_transfered += nr_this_transfer;
 771           nr_this_transfer = WITH_XOR_ENDIAN;
 772           start = stop + 1;
 773         }
 774       /* final transfer */
 775       nr_this_transfer = nr_bytes - nr_transfered;
 776       stop = start + nr_this_transfer - 1;
 777       SIM_ASSERT (stop == (addr + nr_bytes - 1));
 778       reverse_n (x, &((unsigned_1*)buffer)[nr_transfered], nr_this_transfer);
 779       if (sim_core_read_buffer (sd, cpu, map, x, stop ^ byte_xor, nr_this_transfer)
 780           != nr_this_transfer)
 781         return nr_transfered;
 782       return nr_bytes;
 783     }
 784 }
 785 #endif
 786
 787 #if EXTERN_SIM_CORE_P
 788 void *
 789 sim_core_trans_addr (SIM_DESC sd,
 790                      sim_cpu *cpu,
 791                      unsigned map,
 792                      address_word addr)
 793 {
 794   sim_core_common *core = (cpu == NULL ? &STATE_CORE (sd)->common : &CPU_CORE (cpu)->common);
 795   sim_core_mapping *mapping =
 796     sim_core_find_mapping (core, map,
 797                            addr, /*nr-bytes*/1,
 798                            write_transfer,
 799                            0 /*dont-abort*/, NULL, NULL_CIA);
 800   if (mapping == NULL)
 801     return NULL;
 802   return sim_core_translate (mapping, addr);
 803 }
 804 #endif
 805
 806
 807
 808 /* define the read/write 1/2/4/8/16/word functions */
 809
 810 #define N 16
 811 #include "sim-n-core.h"
 812
 813 #define N 8
 814 #include "sim-n-core.h"
 815
 816 #define N 7
 817 #define M 8
 818 #include "sim-n-core.h"
 819
 820 #define N 6
 821 #define M 8
 822 #include "sim-n-core.h"
 823
 824 #define N 5
 825 #define M 8
 826 #include "sim-n-core.h"
 827
 828 #define N 4
 829 #include "sim-n-core.h"
 830
 831 #define N 3
 832 #define M 4
 833 #include "sim-n-core.h"
 834
 835 #define N 2
 836 #include "sim-n-core.h"
 837
 838 #define N 1
 839 #include "sim-n-core.h"
 840
 841 #endif