Fix PR ld/22727 (TLS breakage in PIC/PIE mode on SPARC).
[deliverable/binutils-gdb.git] / sim / configure.tgt
1 dnl Note that this file is intended to be included at the m4 level and not
2 dnl the shell level, so use sinclude(...) to pull it in.
3
4 # WHEN ADDING ENTRIES TO THIS MATRIX:
5
6 # Make sure that the left side always has two dashes. Otherwise you
7 # can get spurious matches. Even for unambiguous cases, do this as a
8 # convention, else the table becomes a real mess to understand and
9 # maintain.
10
11 dnl glue to avoid code duplication at top level
12 m4_ifndef([SIM_ARCH], [AC_DEFUN([SIM_ARCH],[sim_arch=$1])])
13
14 sim_igen=no
15 sim_arch=
16 case "${target}" in
17 aarch64*-*-*)
18 SIM_ARCH(aarch64)
19 ;;
20 arm*-*-*)
21 SIM_ARCH(arm)
22 ;;
23 avr*-*-*)
24 SIM_ARCH(avr)
25 ;;
26 bfin-*-*)
27 SIM_ARCH(bfin)
28 ;;
29 cr16*-*-*)
30 SIM_ARCH(cr16)
31 ;;
32 cris-*-* | crisv32-*-*)
33 SIM_ARCH(cris)
34 ;;
35 d10v-*-*)
36 SIM_ARCH(d10v)
37 ;;
38 frv-*-*)
39 SIM_ARCH(frv)
40 ;;
41 h8300*-*-*)
42 SIM_ARCH(h8300)
43 ;;
44 iq2000-*-*)
45 SIM_ARCH(iq2000)
46 ;;
47 lm32-*-*)
48 SIM_ARCH(lm32)
49 ;;
50 m32c-*-*)
51 SIM_ARCH(m32c)
52 ;;
53 m32r-*-*)
54 SIM_ARCH(m32r)
55 ;;
56 m68hc11-*-*|m6811-*-*)
57 SIM_ARCH(m68hc11)
58 ;;
59 mcore-*-*)
60 SIM_ARCH(mcore)
61 ;;
62 microblaze-*-*)
63 SIM_ARCH(microblaze)
64 ;;
65 mips*-*-*)
66 SIM_ARCH(mips)
67 sim_igen=yes
68 ;;
69 mn10300*-*-*)
70 SIM_ARCH(mn10300)
71 sim_igen=yes
72 ;;
73 moxie-*-*)
74 SIM_ARCH(moxie)
75 ;;
76 msp430*-*-*)
77 SIM_ARCH(msp430)
78 ;;
79 or1k-*-* | or1knd-*-*)
80 SIM_ARCH(or1k)
81 ;;
82 rl78-*-*)
83 SIM_ARCH(rl78)
84 ;;
85 rx-*-*)
86 SIM_ARCH(rx)
87 ;;
88 sh64*-*-*)
89 SIM_ARCH(sh64)
90 ;;
91 sh*-*-*)
92 SIM_ARCH(sh)
93 ;;
94 sparc-*-rtems*|sparc-*-elf*)
95 SIM_ARCH(erc32)
96 ;;
97 powerpc*-*-*)
98 SIM_ARCH(ppc)
99 ;;
100 ft32-*-*)
101 SIM_ARCH(ft32)
102 ;;
103 v850*-*-*)
104 SIM_ARCH(v850)
105 sim_igen=yes
106 ;;
107 esac
108 AC_SUBST(sim_arch)
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