5 #include "remote-sim.h"
9 #define IMEM_SIZE 18 /* D10V instruction memory size is 18 bits */
10 #define DMEM_SIZE 16 /* Data memory is 64K (but only 32K internal RAM) */
11 #define UMEM_SIZE 17 /* Each unified memory segment is 17 bits */
12 #define UMEM_SEGMENTS 128 /* Number of segments in unified memory region */
14 enum _leftright
{ LEFT_FIRST
, RIGHT_FIRST
};
17 static SIM_OPEN_KIND sim_kind
;
20 /* Set this to true to get the previous segment layout. */
22 int old_segment_mapping
;
24 host_callback
*d10v_callback
;
25 unsigned long ins_type_counters
[ (int)INS_MAX
];
29 static int init_text_p
= 0;
30 /* non-zero if we opened prog_bfd */
31 static int prog_bfd_was_opened_p
;
37 static long hash
PARAMS ((long insn
, int format
));
38 static struct hash_entry
*lookup_hash
PARAMS ((uint32 ins
, int size
));
39 static void get_operands
PARAMS ((struct simops
*s
, uint32 ins
));
40 static void do_long
PARAMS ((uint32 ins
));
41 static void do_2_short
PARAMS ((uint16 ins1
, uint16 ins2
, enum _leftright leftright
));
42 static void do_parallel
PARAMS ((uint16 ins1
, uint16 ins2
));
43 static char *add_commas
PARAMS ((char *buf
, int sizeof_buf
, unsigned long value
));
44 extern void sim_set_profile
PARAMS ((int n
));
45 extern void sim_set_profile_size
PARAMS ((int n
));
47 #ifdef NEED_UI_LOOP_HOOK
48 /* How often to run the ui_loop update, when in use */
49 #define UI_LOOP_POLL_INTERVAL 0x14000
51 /* Counter for the ui_loop_hook update */
52 static long ui_loop_hook_counter
= UI_LOOP_POLL_INTERVAL
;
54 /* Actual hook to call to run through gdb's gui event loop */
55 extern int (*ui_loop_hook
) PARAMS ((int signo
));
56 #endif /* NEED_UI_LOOP_HOOK */
59 #if defined(__GNUC__) && defined(__OPTIMIZE__)
60 #define INLINE __inline__
69 struct hash_entry
*next
;
76 struct hash_entry hash_table
[MAX_HASH
+1];
83 if (format
& LONG_OPCODE
)
84 return ((insn
& 0x3F000000) >> 24);
86 return((insn
& 0x7E00) >> 9);
89 INLINE
static struct hash_entry
*
90 lookup_hash (ins
, size
)
97 h
= &hash_table
[(ins
& 0x3F000000) >> 24];
99 h
= &hash_table
[(ins
& 0x7E00) >> 9];
101 while ((ins
& h
->mask
) != h
->opcode
|| h
->size
!= size
)
105 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR looking up hash for %x at PC %x\n",ins
, PC
);
114 get_operands (struct simops
*s
, uint32 ins
)
116 int i
, shift
, bits
, flags
;
118 for (i
=0; i
< s
->numops
; i
++)
120 shift
= s
->operands
[3*i
];
121 bits
= s
->operands
[3*i
+1];
122 flags
= s
->operands
[3*i
+2];
123 mask
= 0x7FFFFFFF >> (31 - bits
);
124 OP
[i
] = (ins
>> shift
) & mask
;
126 /* FIXME: for tracing, update values that need to be updated each
127 instruction decode cycle */
128 State
.trace
.psw
= PSW
;
135 if (!init_text_p
&& prog_bfd
!= NULL
)
138 for (s
= prog_bfd
->sections
; s
; s
= s
->next
)
139 if (strcmp (bfd_get_section_name (prog_bfd
, s
), ".text") == 0)
142 text_start
= bfd_get_section_vma (prog_bfd
, s
);
143 text_end
= text_start
+ bfd_section_size (prog_bfd
, s
);
148 return (PC
<< 2) + text_start
;
155 struct hash_entry
*h
;
157 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
158 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_long 0x%x\n", ins
);
160 h
= lookup_hash (ins
, 1);
161 get_operands (h
->ops
, ins
);
162 State
.ins_type
= INS_LONG
;
163 ins_type_counters
[ (int)State
.ins_type
]++;
168 do_2_short (ins1
, ins2
, leftright
)
170 enum _leftright leftright
;
172 struct hash_entry
*h
;
173 enum _ins_type first
, second
;
176 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
177 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_2_short 0x%x (%s) -> 0x%x\n",
178 ins1
, (leftright
) ? "left" : "right", ins2
);
181 if (leftright
== LEFT_FIRST
)
185 ins_type_counters
[ (int)INS_LEFTRIGHT
]++;
191 ins_type_counters
[ (int)INS_RIGHTLEFT
]++;
194 /* Issue the first instruction */
195 h
= lookup_hash (ins1
, 0);
196 get_operands (h
->ops
, ins1
);
197 State
.ins_type
= first
;
198 ins_type_counters
[ (int)State
.ins_type
]++;
201 /* Issue the second instruction (if the PC hasn't changed) */
202 if (!State
.pc_changed
&& !State
.exception
)
204 /* finish any existing instructions */
206 h
= lookup_hash (ins2
, 0);
207 get_operands (h
->ops
, ins2
);
208 State
.ins_type
= second
;
209 ins_type_counters
[ (int)State
.ins_type
]++;
210 ins_type_counters
[ (int)INS_CYCLES
]++;
213 else if (!State
.exception
)
214 ins_type_counters
[ (int)INS_COND_JUMP
]++;
218 do_parallel (ins1
, ins2
)
221 struct hash_entry
*h1
, *h2
;
223 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
224 (*d10v_callback
->printf_filtered
) (d10v_callback
, "do_parallel 0x%x || 0x%x\n", ins1
, ins2
);
226 ins_type_counters
[ (int)INS_PARALLEL
]++;
227 h1
= lookup_hash (ins1
, 0);
228 h2
= lookup_hash (ins2
, 0);
230 if (h1
->ops
->exec_type
== PARONLY
)
232 get_operands (h1
->ops
, ins1
);
233 State
.ins_type
= INS_LEFT_COND_TEST
;
234 ins_type_counters
[ (int)State
.ins_type
]++;
238 ins_type_counters
[ (int)INS_COND_TRUE
]++;
239 get_operands (h2
->ops
, ins2
);
240 State
.ins_type
= INS_RIGHT_COND_EXE
;
241 ins_type_counters
[ (int)State
.ins_type
]++;
245 ins_type_counters
[ (int)INS_COND_FALSE
]++;
247 else if (h2
->ops
->exec_type
== PARONLY
)
249 get_operands (h2
->ops
, ins2
);
250 State
.ins_type
= INS_RIGHT_COND_TEST
;
251 ins_type_counters
[ (int)State
.ins_type
]++;
255 ins_type_counters
[ (int)INS_COND_TRUE
]++;
256 get_operands (h1
->ops
, ins1
);
257 State
.ins_type
= INS_LEFT_COND_EXE
;
258 ins_type_counters
[ (int)State
.ins_type
]++;
262 ins_type_counters
[ (int)INS_COND_FALSE
]++;
266 get_operands (h1
->ops
, ins1
);
267 State
.ins_type
= INS_LEFT_PARALLEL
;
268 ins_type_counters
[ (int)State
.ins_type
]++;
270 if (!State
.exception
)
272 get_operands (h2
->ops
, ins2
);
273 State
.ins_type
= INS_RIGHT_PARALLEL
;
274 ins_type_counters
[ (int)State
.ins_type
]++;
281 add_commas(buf
, sizeof_buf
, value
)
287 char *endbuf
= buf
+ sizeof_buf
- 1;
297 *--endbuf
= (value
% 10) + '0';
298 } while ((value
/= 10) != 0);
312 for (i
=0;i
<UMEM_SEGMENTS
;i
++)
316 free (State
.umem
[i
]);
317 State
.umem
[i
] = NULL
;
324 State
.imem
= (uint8
*)calloc(1,1<<IMEM_SIZE
);
325 State
.dmem
= (uint8
*)calloc(1,1<<DMEM_SIZE
);
326 for (i
=1;i
<(UMEM_SEGMENTS
-1);i
++)
327 State
.umem
[i
] = NULL
;
328 State
.umem
[0] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
329 State
.umem
[1] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
330 State
.umem
[2] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
331 State
.umem
[UMEM_SEGMENTS
-1] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
332 if (!State
.imem
|| !State
.dmem
|| !State
.umem
[0] || !State
.umem
[1] || !State
.umem
[2] || !State
.umem
[UMEM_SEGMENTS
-1] )
334 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Memory allocation failed.\n");
339 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
342 (*d10v_callback
->printf_filtered
) (d10v_callback
,
343 "Allocated %s bytes instruction memory and\n",
344 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
346 (*d10v_callback
->printf_filtered
) (d10v_callback
, " %s bytes data memory.\n",
347 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)));
352 /* Transfer data to/from simulated memory. Since a bug in either the
353 simulated program or in gdb or the simulator itself may cause a
354 bogus address to be passed in, we need to do some sanity checking
355 on addresses to make sure they are within bounds. When an address
356 fails the bounds check, treat it as a zero length read/write rather
357 than aborting the entire run. */
360 xfer_mem (SIM_ADDR addr
,
361 unsigned char *buffer
,
365 unsigned char *memory
;
366 int segment
= ((addr
>> 24) & 0xff);
367 addr
= (addr
& 0x00ffffff);
370 if ((d10v_debug
& DEBUG_INSTRUCTION
) != 0)
374 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_write %d bytes to 0x%02x:%06x\n", size
, segment
, addr
);
378 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_read %d bytes from 0x%2x:%6x\n", size
, segment
, addr
);
383 /* To access data, we use the following mappings:
385 0x00xxxxxx: Physical unified memory segment (Unified memory)
386 0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)
387 0x02xxxxxx: Physical data memory segment (On-chip data memory)
388 0x10xxxxxx: Logical data address segment (DMAP translated memory)
389 0x11xxxxxx: Logical instruction address segment (IMAP translated memory)
391 Alternatively, the "old segment mapping" is still available by setting
392 old_segment_mapping to 1. It looks like this:
394 0x00xxxxxx: Logical data address segment (DMAP translated memory)
395 0x01xxxxxx: Logical instruction address segment (IMAP translated memory)
396 0x10xxxxxx: Physical data memory segment (On-chip data memory)
397 0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)
398 0x12xxxxxx: Physical unified memory segment (Unified memory)
402 /* However, if we've asked to use the previous generation of segment
403 mapping, rearrange the segments as follows. */
405 if (old_segment_mapping
)
409 case 0x00: /* DMAP translated memory */
412 case 0x01: /* IMAP translated memory */
415 case 0x10: /* On-chip data memory */
418 case 0x11: /* On-chip insn memory */
421 case 0x12: /* Unified memory */
429 case 0x10: /* DMAP translated memory */
432 for (byte
= 0; byte
< size
; byte
++)
434 uint8
*mem
= dmem_addr (addr
+ byte
);
445 case 0x11: /* IMAP translated memory */
448 for (byte
= 0; byte
< size
; byte
++)
450 uint8
*mem
= imem_addr (addr
+ byte
);
461 case 0x02: /* On-chip data memory */
463 addr
&= ((1 << DMEM_SIZE
) - 1);
464 if ((addr
+ size
) > (1 << DMEM_SIZE
))
466 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: data address 0x%x is outside range 0-0x%x.\n",
467 addr
+ size
- 1, (1 << DMEM_SIZE
) - 1);
470 memory
= State
.dmem
+ addr
;
474 case 0x01: /* On-chip insn memory */
476 addr
&= ((1 << IMEM_SIZE
) - 1);
477 if ((addr
+ size
) > (1 << IMEM_SIZE
))
479 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: instruction address 0x%x is outside range 0-0x%x.\n",
480 addr
+ size
- 1, (1 << IMEM_SIZE
) - 1);
483 memory
= State
.imem
+ addr
;
487 case 0x00: /* Unified memory */
489 int startsegment
, startoffset
; /* Segment and offset within segment where xfer starts */
490 int endsegment
, endoffset
; /* Segment and offset within segment where xfer ends */
492 startsegment
= addr
>> UMEM_SIZE
;
493 startoffset
= addr
& ((1 << UMEM_SIZE
) - 1);
494 endsegment
= (addr
+ size
) >> UMEM_SIZE
;
495 endoffset
= (addr
+ size
) & ((1 << UMEM_SIZE
) - 1);
497 /* FIXME: We do not currently implement xfers across segments,
498 so detect this case and fail gracefully. */
500 if ((startsegment
!= endsegment
) && !((endsegment
== (startsegment
+ 1)) && endoffset
== 0))
502 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: Unimplemented support for transfers across unified memory segment boundaries\n");
505 if (!State
.umem
[startsegment
])
508 if ((d10v_debug
& DEBUG_MEMSIZE
) != 0)
510 (*d10v_callback
->printf_filtered
) (d10v_callback
,"Allocating %s bytes unified memory to region %d\n",
511 add_commas (buffer
, sizeof (buffer
), (1UL<<IMEM_SIZE
)), startsegment
);
514 State
.umem
[startsegment
] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
516 if (!State
.umem
[startsegment
])
518 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: Memory allocation of 0x%x bytes failed.\n", 1<<UMEM_SIZE
);
521 memory
= State
.umem
[startsegment
] + startoffset
;
527 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: address 0x%lx is not in valid range\n", (long) addr
);
528 if (old_segment_mapping
)
530 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x00xxxxxx: Logical data address segment (DMAP translated memory)\n");
531 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x01xxxxxx: Logical instruction address segment (IMAP translated memory)\n");
532 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x10xxxxxx: Physical data memory segment (On-chip data memory)\n");
533 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x11xxxxxx: Physical instruction memory segment (On-chip insn memory)\n");
534 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x12xxxxxx: Phisical unified memory segment (Unified memory)\n");
538 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x00xxxxxx: Physical unified memory segment (Unified memory)\n");
539 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x01xxxxxx: Physical instruction memory segment (On-chip insn memory)\n");
540 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x02xxxxxx: Physical data memory segment (On-chip data memory)\n");
541 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x10xxxxxx: Logical data address segment (DMAP translated memory)\n");
542 (*d10v_callback
->printf_filtered
) (d10v_callback
, "0x11xxxxxx: Logical instruction address segment (IMAP translated memory)\n");
550 memcpy (memory
, buffer
, size
);
554 memcpy (buffer
, memory
, size
);
562 sim_write (sd
, addr
, buffer
, size
)
565 unsigned char *buffer
;
568 /* FIXME: this should be performing a virtual transfer */
569 return xfer_mem( addr
, buffer
, size
, 1);
573 sim_read (sd
, addr
, buffer
, size
)
576 unsigned char *buffer
;
579 /* FIXME: this should be performing a virtual transfer */
580 return xfer_mem( addr
, buffer
, size
, 0);
585 sim_open (kind
, callback
, abfd
, argv
)
587 host_callback
*callback
;
592 struct hash_entry
*h
;
593 static int init_p
= 0;
597 d10v_callback
= callback
;
599 old_segment_mapping
= 0;
601 for (p
= argv
+ 1; *p
; ++p
)
603 if (strcmp (*p
, "-oldseg") == 0)
604 old_segment_mapping
= 1;
606 else if (strcmp (*p
, "-t") == 0)
610 (*d10v_callback
->printf_filtered
) (d10v_callback
, "ERROR: unsupported option(s): %s\n",*p
);
613 /* put all the opcodes in the hash table */
616 for (s
= Simops
; s
->func
; s
++)
618 h
= &hash_table
[hash(s
->opcode
,s
->format
)];
620 /* go to the last entry in the chain */
626 h
->next
= (struct hash_entry
*) calloc(1,sizeof(struct hash_entry
));
628 perror ("malloc failure");
634 h
->opcode
= s
->opcode
;
635 h
->size
= s
->is_long
;
639 /* reset the processor state */
642 sim_create_inferior ((SIM_DESC
) 1, NULL
, NULL
, NULL
);
644 /* Fudge our descriptor. */
650 sim_close (sd
, quitting
)
654 if (prog_bfd
!= NULL
&& prog_bfd_was_opened_p
)
656 bfd_close (prog_bfd
);
658 prog_bfd_was_opened_p
= 0;
666 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile %d\n",n
);
670 sim_set_profile_size (n
)
673 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_set_profile_size %d\n",n
);
687 if ( (addr
& 0xfff0) != 0xff00)
689 (*d10v_callback
->printf_filtered
) (d10v_callback
, "Data address 0x%lx is in I/O space, pc = 0x%lx.\n",
690 (long)addr
, (long)decode_pc ());
691 State
.exception
= SIGBUS
;
694 return State
.dmem
+ addr
;
701 /* instruction memory */
702 return (DMAP
& 0xf) * 0x4000 + State
.imem
+ (addr
- 0x8000);
707 /* this is ugly because we allocate unified memory in 128K segments and */
708 /* dmap addresses 16k segments */
709 seg
= (DMAP
& 0x3ff) >> 3;
710 if (State
.umem
[seg
] == NULL
)
713 (*d10v_callback
->printf_filtered
) (d10v_callback
,"Allocating %d bytes unified memory to region %d\n", 1<<UMEM_SIZE
, seg
);
715 State
.umem
[seg
] = (uint8
*)calloc(1,1<<UMEM_SIZE
);
716 if (!State
.umem
[seg
])
718 (*d10v_callback
->printf_filtered
) (d10v_callback
,
719 "ERROR: alloc failed. unified memory region %d unmapped, pc = 0x%lx\n",
720 seg
, (long)decode_pc ());
721 State
.exception
= SIGBUS
;
724 return State
.umem
[seg
] + (DMAP
& 7) * 0x4000 + (addr
- 0x8000);
727 return State
.dmem
+ addr
;
732 imem_addr (uint32 pc
)
742 return State
.imem
+ pc
;
744 if (State
.umem
[imap
& 0xff] == NULL
)
747 /* Discard upper bit(s) of PC in case IMAP1 selects unified memory. */
748 pc
&= (1 << UMEM_SIZE
) - 1;
750 return State
.umem
[imap
& 0xff] + pc
;
754 static int stop_simulator
= 0;
765 /* Run (or resume) the program. */
767 sim_resume (sd
, step
, siggnal
)
774 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_resume (%d,%d) PC=0x%x\n",step,siggnal,PC); */
781 iaddr
= imem_addr ((uint32
)PC
<< 2);
784 State
.exception
= SIGBUS
;
788 inst
= get_longword( iaddr
);
790 State
.pc_changed
= 0;
791 ins_type_counters
[ (int)INS_CYCLES
]++;
793 switch (inst
& 0xC0000000)
796 /* long instruction */
797 do_long (inst
& 0x3FFFFFFF);
801 do_2_short ( inst
& 0x7FFF, (inst
& 0x3FFF8000) >> 15, RIGHT_FIRST
);
805 do_2_short ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF, LEFT_FIRST
);
808 do_parallel ((inst
& 0x3FFF8000) >> 15, inst
& 0x7FFF);
812 /* If the PC of the current instruction matches RPT_E then
813 schedule a branch to the loop start. If one of those
814 instructions happens to be a branch, than that instruction
816 if (!State
.pc_changed
)
818 if (PSW_RP
&& PC
== RPT_E
)
820 /* Note: The behavour of a branch instruction at RPT_E
821 is implementation dependant, this simulator takes the
822 branch. Branching to RPT_E is valid, the instruction
823 must be executed before the loop is taken. */
832 SET_RPT_C (RPT_C
- 1);
840 /* Check for a breakpoint trap on this instruction. This
841 overrides any pending branches or loops */
842 if (PSW_DB
&& PC
== IBA
)
846 SET_PSW (PSW
& PSW_SM_BIT
);
847 SET_PC (SDBT_VECTOR_START
);
850 /* Writeback all the DATA / PC changes */
853 #ifdef NEED_UI_LOOP_HOOK
854 if (ui_loop_hook
!= NULL
&& ui_loop_hook_counter
-- < 0)
856 ui_loop_hook_counter
= UI_LOOP_POLL_INTERVAL
;
859 #endif /* NEED_UI_LOOP_HOOK */
861 while ( !State
.exception
&& !stop_simulator
);
863 if (step
&& !State
.exception
)
864 State
.exception
= SIGTRAP
;
874 sim_resume (sd
, 0, 0);
879 sim_info (sd
, verbose
)
888 unsigned long left
= ins_type_counters
[ (int)INS_LEFT
] + ins_type_counters
[ (int)INS_LEFT_COND_EXE
];
889 unsigned long left_nops
= ins_type_counters
[ (int)INS_LEFT_NOPS
];
890 unsigned long left_parallel
= ins_type_counters
[ (int)INS_LEFT_PARALLEL
];
891 unsigned long left_cond
= ins_type_counters
[ (int)INS_LEFT_COND_TEST
];
892 unsigned long left_total
= left
+ left_parallel
+ left_cond
+ left_nops
;
894 unsigned long right
= ins_type_counters
[ (int)INS_RIGHT
] + ins_type_counters
[ (int)INS_RIGHT_COND_EXE
];
895 unsigned long right_nops
= ins_type_counters
[ (int)INS_RIGHT_NOPS
];
896 unsigned long right_parallel
= ins_type_counters
[ (int)INS_RIGHT_PARALLEL
];
897 unsigned long right_cond
= ins_type_counters
[ (int)INS_RIGHT_COND_TEST
];
898 unsigned long right_total
= right
+ right_parallel
+ right_cond
+ right_nops
;
900 unsigned long unknown
= ins_type_counters
[ (int)INS_UNKNOWN
];
901 unsigned long ins_long
= ins_type_counters
[ (int)INS_LONG
];
902 unsigned long parallel
= ins_type_counters
[ (int)INS_PARALLEL
];
903 unsigned long leftright
= ins_type_counters
[ (int)INS_LEFTRIGHT
];
904 unsigned long rightleft
= ins_type_counters
[ (int)INS_RIGHTLEFT
];
905 unsigned long cond_true
= ins_type_counters
[ (int)INS_COND_TRUE
];
906 unsigned long cond_false
= ins_type_counters
[ (int)INS_COND_FALSE
];
907 unsigned long cond_jump
= ins_type_counters
[ (int)INS_COND_JUMP
];
908 unsigned long cycles
= ins_type_counters
[ (int)INS_CYCLES
];
909 unsigned long total
= (unknown
+ left_total
+ right_total
+ ins_long
);
911 int size
= strlen (add_commas (buf1
, sizeof (buf1
), total
));
912 int parallel_size
= strlen (add_commas (buf1
, sizeof (buf1
),
913 (left_parallel
> right_parallel
) ? left_parallel
: right_parallel
));
914 int cond_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_cond
> right_cond
) ? left_cond
: right_cond
));
915 int nop_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left_nops
> right_nops
) ? left_nops
: right_nops
));
916 int normal_size
= strlen (add_commas (buf1
, sizeof (buf1
), (left
> right
) ? left
: right
));
918 (*d10v_callback
->printf_filtered
) (d10v_callback
,
919 "executed %*s left instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
920 size
, add_commas (buf1
, sizeof (buf1
), left_total
),
921 normal_size
, add_commas (buf2
, sizeof (buf2
), left
),
922 parallel_size
, add_commas (buf3
, sizeof (buf3
), left_parallel
),
923 cond_size
, add_commas (buf4
, sizeof (buf4
), left_cond
),
924 nop_size
, add_commas (buf5
, sizeof (buf5
), left_nops
));
926 (*d10v_callback
->printf_filtered
) (d10v_callback
,
927 "executed %*s right instruction(s), %*s normal, %*s parallel, %*s EXExxx, %*s nops\n",
928 size
, add_commas (buf1
, sizeof (buf1
), right_total
),
929 normal_size
, add_commas (buf2
, sizeof (buf2
), right
),
930 parallel_size
, add_commas (buf3
, sizeof (buf3
), right_parallel
),
931 cond_size
, add_commas (buf4
, sizeof (buf4
), right_cond
),
932 nop_size
, add_commas (buf5
, sizeof (buf5
), right_nops
));
935 (*d10v_callback
->printf_filtered
) (d10v_callback
,
936 "executed %*s long instruction(s)\n",
937 size
, add_commas (buf1
, sizeof (buf1
), ins_long
));
940 (*d10v_callback
->printf_filtered
) (d10v_callback
,
941 "executed %*s parallel instruction(s)\n",
942 size
, add_commas (buf1
, sizeof (buf1
), parallel
));
945 (*d10v_callback
->printf_filtered
) (d10v_callback
,
946 "executed %*s instruction(s) encoded L->R\n",
947 size
, add_commas (buf1
, sizeof (buf1
), leftright
));
950 (*d10v_callback
->printf_filtered
) (d10v_callback
,
951 "executed %*s instruction(s) encoded R->L\n",
952 size
, add_commas (buf1
, sizeof (buf1
), rightleft
));
955 (*d10v_callback
->printf_filtered
) (d10v_callback
,
956 "executed %*s unknown instruction(s)\n",
957 size
, add_commas (buf1
, sizeof (buf1
), unknown
));
960 (*d10v_callback
->printf_filtered
) (d10v_callback
,
961 "executed %*s instruction(s) due to EXExxx condition being true\n",
962 size
, add_commas (buf1
, sizeof (buf1
), cond_true
));
965 (*d10v_callback
->printf_filtered
) (d10v_callback
,
966 "skipped %*s instruction(s) due to EXExxx condition being false\n",
967 size
, add_commas (buf1
, sizeof (buf1
), cond_false
));
970 (*d10v_callback
->printf_filtered
) (d10v_callback
,
971 "skipped %*s instruction(s) due to conditional branch succeeding\n",
972 size
, add_commas (buf1
, sizeof (buf1
), cond_jump
));
974 (*d10v_callback
->printf_filtered
) (d10v_callback
,
975 "executed %*s cycle(s)\n",
976 size
, add_commas (buf1
, sizeof (buf1
), cycles
));
978 (*d10v_callback
->printf_filtered
) (d10v_callback
,
979 "executed %*s total instructions\n",
980 size
, add_commas (buf1
, sizeof (buf1
), total
));
984 sim_create_inferior (sd
, abfd
, argv
, env
)
990 bfd_vma start_address
;
992 /* reset all state information */
993 memset (&State
.regs
, 0, (int)&State
.imem
- (int)&State
.regs
[0]);
997 /* a hack to set r0/r1 with argc/argv */
998 /* some high memory that won't be overwritten by the stack soon */
999 bfd_vma addr
= 0x7C00;
1004 int size
= strlen (argv
[i
]) + 1;
1005 SW (addr
+ 2*i
, addr
+ p
);
1006 sim_write (sd
, addr
+ 0, argv
[i
], size
);
1016 start_address
= bfd_get_start_address (abfd
);
1018 start_address
= 0xffc0 << 2;
1021 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_create_inferior: PC=0x%lx\n", (long) start_address
);
1023 SET_CREG (PC_CR
, start_address
>> 2);
1025 /* cpu resets imap0 to 0 and imap1 to 0x7f, but D10V-EVA board */
1026 /* resets imap0 and imap1 to 0x1000. */
1027 if (old_segment_mapping
)
1046 sim_set_callbacks (p
)
1053 sim_stop_reason (sd
, reason
, sigrc
)
1055 enum sim_stop
*reason
;
1058 /* (*d10v_callback->printf_filtered) (d10v_callback, "sim_stop_reason: PC=0x%x\n",PC<<2); */
1060 switch (State
.exception
)
1062 case SIG_D10V_STOP
: /* stop instruction */
1063 *reason
= sim_exited
;
1067 case SIG_D10V_EXIT
: /* exit trap */
1068 *reason
= sim_exited
;
1072 default: /* some signal */
1073 *reason
= sim_stopped
;
1074 if (stop_simulator
&& !State
.exception
)
1077 *sigrc
= State
.exception
;
1085 sim_fetch_register (sd
, rn
, memory
, length
)
1088 unsigned char *memory
;
1092 WRITE_64 (memory
, ACC (rn
-35));
1094 WRITE_16 (memory
, IMAP0
);
1096 WRITE_16 (memory
, IMAP1
);
1098 WRITE_16 (memory
, DMAP
);
1100 WRITE_16 (memory
, CREG (rn
- 16));
1102 WRITE_16 (memory
, GPR (rn
));
1107 sim_store_register (sd
, rn
, memory
, length
)
1110 unsigned char *memory
;
1114 SET_ACC (rn
-35, READ_64 (memory
) & MASK40
);
1116 SET_DMAP( READ_16(memory
) );
1118 SET_IMAP1( READ_16(memory
) );
1120 SET_IMAP0( READ_16(memory
) );
1122 SET_CREG (rn
- 16, READ_16 (memory
));
1124 SET_GPR (rn
, READ_16 (memory
));
1131 sim_do_command (sd
, cmd
)
1135 (*d10v_callback
->printf_filtered
) (d10v_callback
, "sim_do_command: %s\n",cmd
);
1139 sim_load (sd
, prog
, abfd
, from_tty
)
1145 extern bfd
*sim_load_file (); /* ??? Don't know where this should live. */
1147 if (prog_bfd
!= NULL
&& prog_bfd_was_opened_p
)
1149 bfd_close (prog_bfd
);
1150 prog_bfd_was_opened_p
= 0;
1152 prog_bfd
= sim_load_file (sd
, myname
, d10v_callback
, prog
, abfd
,
1153 sim_kind
== SIM_OPEN_DEBUG
,
1154 1/*LMA*/, sim_write
);
1155 if (prog_bfd
== NULL
)
1157 prog_bfd_was_opened_p
= abfd
== NULL
;
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