sim/d30v/ChangeLog

   1 1999-01-12  Frank Ch. Eigler  <fche@cygnus.com>
   2
   3         * engine.c (unqueue_writes): Make PSW conflict resolution code
   4         conditional - disable it for MVTSYS || insn case.
   5
   6 1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
   7
   8         * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
   9         update.
  10         * engine.c (unqueue_writes): Make non-static.  Remove PSW_V/VA
  11         special case.
  12         (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
  13
  14 1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
  15
  16         * d30v-insns (do_ld2h): Sign-extend loaded half-words.
  17
  18 1999-01-05  Frank Ch. Eigler  <fche@cygnus.com>
  19
  20         * d30v-insns (do_ld2h): Read memory in word units.
  21         (do_ld4bh): Ditto.  Correct sign extension.
  22         (do_ld4bhu): Ditto.
  23         (do_st2h): Write memory in word units.
  24         (do_st4hb): Ditto.
  25         (st4hb): Correct mnemonic in igen template.
  26
  27 1998-12-08  Frank Ch. Eigler  <fche@cygnus.com>
  28
  29         * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
  30         (do_ld2w): Ditto.
  31         (do_ld4bh): Ditto.
  32         (do_ld4bhu): Ditto.
  33         (do_mulx2h): Ditto.
  34
  35 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
  36
  37         * d30v-insns (do_repeat): Don't set RP for repeat count 1.
  38
  39 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
  40
  41         * d30v-insns (do_src): Treat shift count -32 naturally instead of
  42         producing zero result.
  43
  44 1998-11-22  Frank Ch. Eigler  <fche@cygnus.com>
  45
  46         * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
  47
  48 1998-11-16  Frank Ch. Eigler  <fche@cygnus.com>
  49
  50         * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
  51         * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
  52
  53 1998-11-12  Frank Ch. Eigler  <fche@cygnus.com>
  54
  55         * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
  56         RPT_IS_CALL macro.
  57         * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
  58         * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
  59         (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
  60         * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
  61         (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
  62         * engine.c (sim_engine_run): Remove conditional setting of R62 based
  63         upon RPT_IS_CALL.
  64
  65 1998-11-08  Frank Ch. Eigler  <fche@cygnus.com>
  66
  67         * sim-calls.c (sim_open): Add dummy memory range over control
  68         register region (0x40000000..0x4000FFFF).
  69
  70 1998-11-06  Frank Ch. Eigler  <fche@cygnus.com>
  71
  72         * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
  73
  74 Tue Oct 13 11:01:16 1998  Frank Ch. Eigler  <fche@cygnus.com>
  75
  76         * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
  77         count -32 to produce zero result.
  78         (do_src): Ditto for shift count == -64.
  79
  80 Mon Oct 12 23:04:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
  81
  82         * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
  83         (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
  84         (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
  85         (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
  86         (do_src): Use loop to limit shift count to -64 .. 63.
  87
  88 Fri Oct  9 16:46:52 1998  Doug Evans  <devans@canuck.cygnus.com>
  89
  90         * sim-calls.c (get_insn_name): New fn.
  91         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
  92         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
  93
  94 Mon Sep 28 10:43:28 1998  Frank Ch. Eigler  <fche@cygnus.com>
  95
  96         * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
  97         correct MSB bit numbers for sign extension masks.
  98
  99 Fri Sep 25 17:32:27 1998  Frank Ch. Eigler  <fche@cygnus.com>
 100
 101         * engine.c (do_parallel): Unqueue writes if MU instruction was
 102         a MVTSYS, as identified by its left_kills_right_p side-effect.
 103
 104 Fri Sep 25 12:31:34 1998  Frank Ch. Eigler  <fche@cygnus.com>
 105
 106         * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
 107         shift/rotate counts to number of bits in width of operand; no
 108         longer saturate at maxima.
 109
 110 Tue Jul 14 18:39:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 111
 112         * cpu.h (left_kills_right_p): New flag for non-branch instructions
 113         that, when executed in left slot of a -> sequential pair, kill the
 114         right slot.
 115         * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
 116         * engine.c (do_2_short): Respect flag.
 117
 118 Thu Jun  4 16:48:58 1998  David Taylor  <taylor@texas.cygnus.com>
 119
 120         * d30v-insns (do_trap): don't save the bPSW and PSW based on
 121         current values because an instruction done in parallel with
 122         the trap might change them, instead set a flag do that
 123         unqueue_writes will take care of it.
 124         * engine.c (unqueue_writes): finish trap handling
 125         * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
 126         to make use of it; set by do_trap, tested and cleared by
 127         unqueue_writes.
 128
 129 Tue May 19 16:07:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
 130
 131         * engine.c (unqueue_writes): Suppress the all enqueued writes to
 132         the same flags in PSW except the last.
 133
 134 Fri May 15 11:38:59 1998  Frank Ch. Eigler  <fche@cygnus.com>
 135
 136         * d30v-insns (RETI): Correct instruction spelling to "reit".
 137
 138 Thu May 14 09:34:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 139
 140         * d30v-insns (dbt): Handle DBT at end of repeat block.
 141         (do_trap, dbt): Clear PSW_RP if at end of repeat block.
 142
 143 Thu May 14 07:41:41 1998  Frank Ch. Eigler  <fche@cygnus.com>
 144
 145         * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
 146         instead of next PC.
 147
 148 Wed May 13 11:03:40 1998  Frank Ch. Eigler  <fche@cygnus.com>
 149
 150         * engine.c (sim_engine_run): Move DDBT handling after instruction
 151         decode/execute stage.
 152
 153 Tue May 12 12:14:53 1998  Frank Ch. Eigler  <fche@cygnus.com>
 154
 155         * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
 156         properly handle negative saturation inputs.
 157
 158 Tue May 12 11:11:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 159
 160         * engine.c (sim_engine_run): Decrement RPT_C only under more
 161         restricted conditions.
 162
 163 Mon May 11 17:33:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
 164
 165         * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
 166         unchanged.
 167
 168 Mon May 11 16:27:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
 169
 170         * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
 171         functionality.
 172
 173 Fri May  8 16:44:19 1998  Frank Ch. Eigler  <fche@cygnus.com>
 174
 175         * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
 176         instruction in repeat block.
 177         (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
 178         is last instruction in repeat block.
 179
 180 Fri May  8 11:06:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
 181
 182         * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
 183         macro.
 184         * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
 185
 186 Wed May  6 19:40:56 1998  Doug Evans  <devans@canuck.cygnus.com>
 187
 188         * sim-main.h (INSN_NAME): New arg `cpu'.
 189
 190 Fri May  1 14:24:30 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 191
 192         * d30v-insns: Fix parameter list to sim_engine_abort.
 193
 194 Thu Apr 30 14:28:00 1998  Fred Fish  <fnf@cygnus.com>
 195
 196         * d30v-insns (do_sath): Add additional argument that determines
 197         whether or not the F4 (PSW_S) bit in the PSW is updated.
 198         (SAT2H): Do not update PSW_S bit.
 199         (SATHp): Do update PSW_S bit.
 200
 201 Tue Apr 28 23:36:00 1998  Fred Fish  <fnf@cygnus.com>
 202
 203         * d30v-insns (SRAHp, SRLHp):  Immediate values are signed 6 bit
 204         values, not 5 bit values.
 205
 206 Wed Apr 29 12:57:55 1998  Frank Ch. Eigler  <fche@cygnus.com>
 207
 208         * d30v-insns (do_incr): Check modular arithmetic limits after
 209         postincrement/postdecrement, rather than before, to match
 210         erroneous hardware behavior.
 211
 212 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 213
 214         * configure: Regenerated to track ../common/aclocal.m4 changes.
 215
 216 Mon Apr 27 19:42:00 1998  Fred Fish  <fnf@cygnus.com>
 217
 218         * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
 219
 220 Mon Apr 27 14:55:00 1998  Fred Fish  <fnf@cygnus.com>
 221
 222         * d30v-insns (do_mulx2h): Low order results go in ra+1, high
 223         order in ra.
 224
 225 Mon Apr 27 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
 226
 227         * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
 228         multiply of high and low fields from operands.
 229
 230 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 231
 232         * configure: Regenerated to track ../common/aclocal.m4 changes.
 233         * config.in: Ditto.
 234
 235 Sun Apr 26 15:20:20 1998  Tom Tromey  <tromey@cygnus.com>
 236
 237         * acconfig.h: New file.
 238         * configure.in: Reverted change of Apr 24; use sinclude again.
 239
 240 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 241
 242         * configure: Regenerated to track ../common/aclocal.m4 changes.
 243         * config.in: Ditto.
 244
 245 Fri Apr 24 11:20:00 1998  Tom Tromey  <tromey@cygnus.com>
 246
 247         * configure.in: Don't call sinclude.
 248
 249 Wed Apr 22 21:23:00 1998  Fred Fish  <fnf@cygnus.com>
 250
 251         * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
 252         * d30v-insns (MVTACC): Use new RbU and RcU macros.
 253
 254 Wed Apr 22 20:52:00 1998  Fred Fish  <fnf@cygnus.com>
 255
 256         * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
 257         * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
 258         RbH and RbL.
 259
 260 Mon Apr 13 16:59:00 1998  Fred Fish  <fnf@cygnus.com>
 261
 262         * d30v-insns (do_srl): Avoid undefined behavior of host compiler
 263         when shifting left by more than 31 bits.
 264
 265 Tue Apr  7 18:09:00 1998  Fred Fish  <fnf@cygnus.com>
 266
 267         * engine.c (sim_engine_run): Remove at_loop_end variable. Add
 268         rp_was_set and rpt_c_was_nonzero variables.  Major restructuring of
 269         code before and after instruction execution to properly handle state
 270         of the RP bit in the PSW, the value in RPT_C, and other loop related
 271         problems.
 272
 273 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 274
 275         * configure: Regenerated to track ../common/aclocal.m4 changes.
 276
 277 Fri Apr  3 15:26:00 1998  Fred Fish  <fnf@cygnus.com>
 278
 279         * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
 280         BASE_ADDRESS constant.
 281         * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
 282
 283 Fri Apr  3 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
 284
 285         * cpu.h (EIT_VB): Define macro to access EIT_VB register.
 286         (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
 287         * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
 288
 289 Tue Mar 31 19:00:00 1998  Fred Fish <fnf@cygnus.com>
 290
 291         * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
 292         just pcdisp.
 293
 294 Mon Mar 30 20:30:00 1998  Fred Fish  <fnf@cygnus.com>
 295
 296         * engine.c (sim_engine_run): Add at_loop_end.  Rework end of loop
 297         code to use this to both reset PSW_RP when needed and to set PC
 298         to RPT_S for another pass through the loop.
 299
 300 Mon Mar 30 16:12:00 1998  Fred Fish  <fnf@cygnus.com>
 301
 302         * engine.c (sim_engine_run): Change code that handles RPT_* regs
 303         and PSW_RP bit in PSW so that PSW_RP is always set while executing
 304         the loop and loop terminates upon completion of the pass for which
 305         RPT_C is zero.  More closely follow logic in architecture manual.
 306
 307 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 308
 309         * configure: Regenerated to track ../common/aclocal.m4 changes.
 310
 311 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 312
 313         * configure: Regenerated to track ../common/aclocal.m4 changes.
 314
 315 Thu Mar 19 00:25:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 316
 317         * sim-calls.c (sim_open): Move memory-region commands back to
 318         before the call to sim_parse_args.
 319         (d30v_option_handler): Implement extmem-size option using
 320         memory-delete and memory-region commands.
 321
 322         * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
 323         correct number and type of arguments.
 324
 325 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 326
 327         * configure: Regenerated to track ../common/aclocal.m4 changes.
 328
 329 Wed Mar 11 13:56:32 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 330
 331         * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
 332         read_map and write_map resp.
 333
 334         * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
 335
 336 Mon Mar  2 13:34:08 1998  Fred Fish  <fnf@cygnus.com>
 337
 338         * d30v-insns (do_repeat): Abort repeat instructions that have
 339         a repeat count of zero.
 340
 341 Fri Feb 27 18:44:12 1998  Doug Evans  <devans@canuck.cygnus.com>
 342
 343         * sim-calls.c (sim_open): Update call to sim_add_option_table.
 344
 345 Thu Feb 26 18:34:31 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 346
 347         * sim-calls.c (sim_info): Delete.
 348
 349 Wed Feb 25 14:44:58 1998  Michael Meissner  <meissner@cygnus.com>
 350
 351         * d30v-insns (mvtsys): If moving to EIT_VB register, and with
 352         valid bits.  Optimize code somewhat.
 353
 354         * cpu.h (eit_vector_base_cr): New CR we need to special case.
 355         (EIT_VALID): Valid bits for EIT_VB register.
 356
 357         * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
 358         in the low 16 bits of the register.
 359
 360         * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
 361         results.
 362         (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
 363         result back to the registers.
 364
 365 Tue Feb 24 18:09:52 1998  Fred Fish  <fnf@cygnus.com>
 366
 367         * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
 368         r0 to always be zero.
 369         * cpu.h (GPR_SET): Define.
 370
 371 Tue Feb 24 14:12:57 1998  Michael Meissner  <meissner@cygnus.com>
 372
 373         * d30v-insns (do_sath): Do saturation in 32 bits, before
 374         converting to 16.
 375         (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
 376         (do_sath_p): Delete, no longer used.
 377         (sathp): Call do_sath, not do_sath_p.
 378
 379 Mon Feb 23 15:55:14 1998  Michael Meissner  <meissner@cygnus.com>
 380
 381         * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
 382         call sim_engine_halt.
 383         (sr{a,l}hp): Implement missing instructions.
 384         (do_trap): Print high order PSW bits in human readable fashion.
 385         (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
 386
 387         * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
 388
 389         * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
 390         being > 0.  If RPT_C is decremented to 0, clear PSW RP bit.
 391
 392 Fri Feb 20 10:13:34 1998  Fred Fish  <fnf@cygnus.com>
 393
 394         * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
 395
 396 Tue Feb 17 12:39:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 397
 398         * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
 399         length parameter.  Return -1.
 400
 401 Fri Feb  6 17:39:54 1998  Michael Meissner  <meissner@cygnus.com>
 402
 403         * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
 404
 405 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 406
 407         * configure: Regenerated to track ../common/aclocal.m4 changes.
 408
 409 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 410
 411         * configure: Regenerated to track ../common/aclocal.m4 changes.
 412
 413 Fri Jan 30 08:29:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 414
 415         * engine.c (sim_engine_run): Add parameter nr_cpus.
 416
 417 Fri Jan 30 17:09:37 1998  Michael Meissner  <meissner@cygnus.com>
 418
 419         * d30v-insns (jsrtzr): Check for register == 0, not != 0.
 420
 421 Wed Jan 21 17:52:04 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 422
 423         * engine.c (do_stack_swap): Make type of new_sp unsigned.
 424
 425 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 426
 427         * configure: Regenerated to track ../common/aclocal.m4 changes.
 428
 429 Mon Jan  5 16:04:17 1998  Andrew Cagney  <cagney@sanguine.cygnus.com>
 430
 431         * sim-calls.c (sim_info): Call profile_print.
 432
 433         * sim-main.h: Enable instruction profiling.
 434
 435 Thu Dec 18 12:21:38 1997  Michael Meissner  <meissner@cygnus.com>
 436
 437         * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
 438         and overflow bits.  Don't look at the current value of PSW.
 439         (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
 440         question.  Don't look at the current value of PSW.
 441
 442         * d30v-insns: All instructions that set the PSW, will only queue
 443         up the particular bits in question that were set by the
 444         instruction.  Don't look at the current value of PSW.
 445
 446 Wed Dec 17 11:41:44 1997  Michael Meissner  <meissner@cygnus.com>
 447
 448         * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
 449         (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
 450
 451         * engine.c (trace_alu32): When changing BPSW/DPSW, print the
 452         special PSW bits.
 453
 454         * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
 455         (do_cmp{,u}_cc): Print which cc value was used if not in switch
 456         statement.
 457         (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
 458         (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
 459
 460 Tue Dec 16 18:17:26 1997  Michael Meissner  <meissner@cygnus.com>
 461
 462         * d30v-insns (mulx2h): Add missing instruction.  Complain if
 463         register is not even.
 464         (do_{add,sub}h_ppp): Get correct high/low values.  Also correctly
 465         handle short immediates.
 466         (do_ld{2w,4bh}): Don't load r0 if ra == 0.
 467
 468         * engine.c (d30v_interrupt_event): Remove unused variable
 469         (unqueue_writes): Ditto.
 470
 471 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 472
 473         * configure: Regenerated to track ../common/aclocal.m4 changes.
 474         * config.in: Ditto.
 475
 476 Sat Dec 13 23:40:17 1997  Michael Meissner  <meissner@cygnus.com>
 477
 478         * cpu.h (_write{32,64}): New structures for keeping track of
 479         queued writes to registers.
 480         (_sim_cpu): Add _write{32,64} structures.  Make is_delayed_call
 481         unsigned32 also.
 482         (WRITE{32,64}*): New macros for queueing up writes to registers.
 483
 484         * alu.h (ALU16_END): Take field that says whether we are setting
 485         the high or low half word.  Queue up changes to registers.
 486         (ALU32_END): Queue up changes to registers.
 487         (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
 488
 489         * sim-main.h (do_stack_swap): Remove declaration.
 490
 491         * engine.c (do_stack_swap): Make static.
 492         (unqueue_writes): New function to unqueue all changes to 32 and 64
 493         bit registers in order.  Implement --trace-alu.  Reset high water
 494         marks for # of queued registers.  If PSW changed, possibly update
 495         stack pointer.
 496         (do_{long,2_short,parallel}): Unqueue register writes at the
 497         appropriate time.
 498
 499         * d30v-insns: Modify all insns to queue changes to registers,
 500         rather than do them immediately so that parallel instructions get
 501         the right values for inputs.  Rewrite 16 bit operations to be done
 502         in terms of masked 32 bit registers.  Don't call do_stack_swap any
 503         more here.
 504
 505 Thu Dec 11 10:06:02 1997  Michael Meissner  <meissner@cygnus.com>
 506
 507         * sim-calls.c (d30v_option_handler): Add support for --extmem-size
 508         to size external memory.
 509         (sim_open): Ditto.  Default if no --extmem-size option is 8 meg.
 510
 511 Wed Dec 10 01:08:24 1997  Jim Blandy  <jimb@zwingli.cygnus.com>
 512
 513         * d30v-insns (do_rot2h): Clip rotate amounts to four bits.  The
 514         upper bits, and the sign of the rotation amount, are red herrings.
 515         (do_sra, do_srl): Handle shifts greater than 32 bits.
 516         (do_srah, do_sral): Properly sign-extend value and shift amount.
 517         Handle shifts larger than 16 bits.
 518
 519 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 520
 521         * configure: Regenerated to track ../common/aclocal.m4 changes.
 522
 523 Mon Dec  1 15:10:44 1997  Michael Meissner  <meissner@cygnus.com>
 524
 525         * d30v-insns (do_sub2h): For short instruction, correctly
 526         dupplicate lower 16 bits of immediate in upper 16 bits.
 527         (sat2z): Fix typo that ignored the upper half of the register.
 528         (do_satz): If < 0, set *ra to 0, if not call do_sat.
 529         (mvtsys): Before setting PSW, and with PSW_VALID.
 530
 531         * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
 532
 533 Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 534
 535         * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
 536         printf, return dummy at end.
 537
 538 Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 539
 540         * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
 541         ALU_ADDC.
 542         (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
 543         (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
 544         (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
 545
 546         * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
 547         ALU16_HAD_CARRY.
 548         (ALU32_END): Ditto.
 549
 550         * sim-main.h (string.h, strings.h): Include.
 551
 552         * sim-calls.c: Delete inclusion of string.h and strings.h.
 553
 554 Sun Nov 30 17:29:25 1997  Michael Meissner  <meissner@cygnus.com>
 555
 556         * configure.in (--enable-sim-trapdump): New switch to control
 557         whether traps 0..30 dump out the registers or do the real trap.
 558         * configure: Regenerate.
 559
 560         * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
 561         appropriate --{en,dis}able-sim-trapdump is done.
 562
 563         * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
 564         (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
 565         (d30v_option_handler): Add support for --trace-trapdump.
 566         (d30v_options): Ditto.
 567         (sim_open): Ditto.
 568
 569         * d30v-insns (do_trap): Do register dump if --trace-trapdump and
 570         not the system call trap.  Remove support for calling old function
 571         sim_io_syscalls.
 572
 573 Sat Nov 29 18:54:55 1997  Michael Meissner  <meissner@cygnus.com>
 574
 575         * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
 576         (TRACE_CALL_P): Non-zero if --trace-call.
 577         (TRACE_ACTION): Non-zero if there is a tracing action at the end
 578         of processing an instruction boundary.
 579         (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
 580         (d30v_next_insn): Delete, now trace_action field in cpu state.
 581
 582         * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
 583         state.
 584         (return_occurred): Minimum saved register to check is now 34.
 585
 586         * engine.c (sim_engine_run): Change call tracing to use
 587         trace_action field in cpu state.
 588
 589         * sim-calls.c (d30v_option_handler): Handle d30v specific options.
 590         (d30v_options): D30V specific options.  Right now, --trace-call.
 591         (sim_open): Register d30v specific options.
 592
 593         * d30v-insns (call, return insns): Move --trace-debug call/return
 594         tracing action to d30v specific --trace-call option.
 595
 596 Fri Nov 28 20:12:48 1997  Michael Meissner  <meissner@cygnus.com>
 597
 598         * cpu.h (CREG): Rename from CR.
 599
 600         * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
 601         (do_trap): Use CREG, not CR.  Switch to using cb_syscall.
 602
 603 Thu Nov 27 19:25:43 1997  Michael Meissner  <meissner@cygnus.com>
 604
 605         * cpu.h (ACC): Define as short cut to accumulators.
 606
 607         * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
 608         rotate instruction.
 609         (do_trap): Make trap 30 print out accumulators and first 16
 610         control registers as well.
 611         (do_avg): Sign extend to 64 bit type before doing add/shift.
 612         (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
 613
 614 Wed Nov 26 15:20:24 1997  Doug Evans  <devans@canuck.cygnus.com>
 615
 616         * Makefile.in (NL_TARGET): Define.
 617
 618 Wed Nov 26 16:55:38 1997  Michael Meissner  <meissner@cygnus.com>
 619
 620         * cpu.h (d30v_next_insn): New flag for things we are supposed to
 621         trace between instruction words.
 622         ({call,return}_occurred): Remove index argument.
 623         (d30v_{read,write}_mem): Add declarations.
 624
 625         * cpu.c (d30v_next_insn): New flag for things we are supposed to
 626         trace between instruction words.
 627         ({call,return}_occurred): Remove index argument.
 628         (d30v_{read,write}_mem): New functions for reading/writing
 629         simulated memory in the new common system call support.
 630
 631         * d30v-insns: Set emacs C mode.
 632         (call/return insns): Set bit to trace call at instruction
 633         boundary, rather than doing it here.
 634         (do_trap): Set up to use new common system call interface.
 635
 636         * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
 637         function call/return tracing.
 638
 639 Mon Nov 24 16:40:49 1997  Michael Meissner  <meissner@cygnus.com>
 640
 641         * d30v-insns (bnot): Correctly reset bit in question.
 642         (do_trap): Use common system call emulation support, rather than
 643         our home grown support.
 644
 645 Sun Nov 23 22:47:20 1997  Michael Meissner  <meissner@cygnus.com>
 646
 647         * d30v-insns (mvfacc): Immediate field is unsigned, allowing
 648         shifts of up to 63 to be encoded.  Also do shift signed, rather
 649         than unsigned.
 650
 651         * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
 652
 653         * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
 654         extends.
 655
 656 Sat Nov 22 19:04:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 657
 658         * d30v-insns (illegal, wrong_slot): Replace SIGILL with
 659         SIM_SIGILL.
 660
 661         * sim-calls.c (signal.h): Do not include, replaced by
 662         sim-signal.h.
 663
 664         * sim-main.h (signal.h): Do not include, include sim-signal.h
 665         instead.
 666
 667 Fri Nov 21 09:33:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 668
 669         * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
 670         (return_occurred): Use zfree instead of free.
 671
 672 Wed Nov 19 13:28:09 1997  Michael Meissner  <meissner@cygnus.com>
 673
 674         * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
 675         files in $(ENGINE_H).
 676
 677         * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
 678         a VAL argument to add/subtract along with the carry.
 679
 680 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 681
 682         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 683
 684 Tue Nov 18 13:56:15 1997  Michael Meissner  <meissner@cygnus.com>
 685
 686         * d30v-insns (do_trap): Change to new system call numbers.  Add
 687         read emulation.
 688
 689 Mon Nov 17 14:43:45 1997  Michael Meissner  <meissner@cygnus.com>
 690
 691         * d30v-insns (mulx): Add mulx instruction.
 692
 693 Sun Nov 16 19:06:56 1997  Michael Meissner  <meissner@cygnus.com>
 694
 695         * cpu.c ({call,return}_occurred): New trace functions to mark
 696         function calls and returns and check whether all saved registers
 697         really were saved.
 698
 699         * cpu.h ({call,return}_occurred): Add declaration.
 700
 701         * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
 702         --trace-debug to trace function calls.
 703         (jmp register pattern): If this is a jump r62 and --trace-debug,
 704         call return_occurred to trace function calls.
 705         (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
 706         (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
 707         (do_st2w): Ditto.
 708
 709 Sat Nov 15 20:57:57 1997  Michael Meissner  <meissner@cygnus.com>
 710
 711         * d30v-insns: Undo changes from Nov. 11, allowing for odd register
 712         pairs, since the machine doesn't support such usage.  Trap on odd
 713         registers, rather than give a warning.  Keep do_src and do_trap
 714         changes.
 715
 716 Fri Nov 14 11:59:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 717
 718         * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
 719
 720 Tue Nov 11 18:26:03 1997  Michael Meissner  <meissner@cygnus.com>
 721
 722         * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
 723         for register being r63.  Change callers ld2{h,w}, ld4bh{,u}.
 724         (get_reg_not_r63): Rename from get_even_reg, and only check for
 725         register r63.  Change callers st2{w,h}, st4b.
 726         (do_src): Correct register pair for shift left.
 727         (do_trap): Temporarily make trap 30 print out the registers.
 728
 729 Tue Nov  4 08:51:22 1997  Michael Meissner  <meissner@cygnus.com>
 730
 731         * d30v-insns (do_trap): Make trap 31 be used for system calls.
 732         Add primitive write and exit system calls.
 733
 734         * Makefile (FILTER): New make variable to filter out known igen
 735         warnings.
 736         (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
 737         out warnings that should be ignored by default.
 738
 739 Fri Oct 31 19:36:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 740
 741         * sim-calls.c (sim_open): Change EIT to memory region.
 742
 743 Fri Oct 17 16:51:31 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 744
 745         * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
 746         (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
 747
 748 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 749
 750         * configure: Regenerated to track ../common/aclocal.m4 changes.
 751
 752 Mon Sep 29 15:23:35 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
 753
 754         * d30v-insns (MVFSYS MVTSYS):  Fix bit patterns so that these
 755         instructions get recognised.
 756
 757 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 758
 759         * configure: Regenerated to track ../common/aclocal.m4 changes.
 760
 761 Wed Sep 24 17:51:43 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
 762
 763         * Makefile.in (SIM_OBJS):  Add sim-break.o.
 764         * (INCLUDE_DEPS):  Add tconfig.h.
 765         * alu.h (MEM STORE):  Change to sim_core_read/write_unaligned to
 766         allow for trapping unaligned accesses.
 767         * cpu.h:  Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
 768         mechanism.
 769         * d30v-insn (short syscall):  Use syscall 5 for breakpoint insn.
 770         * sim-calls.c (sim_fetch_register sim_store_register):  Implement.
 771         * tconfig.in:  Define SIM_HAVE_BREAKPOINTS to enable intrinsic
 772         breakpoint mechanism.
 773
 774 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 775
 776         * configure: Regenerated to track ../common/aclocal.m4 changes.
 777
 778 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 779
 780         * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
 781         SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
 782         (SIM_EXTRA_CFLAGS): Update.
 783
 784 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 785
 786         * configure.in: Specify strict alignment.
 787         * configure: Regenerated to track ../common/aclocal.m4 changes.
 788
 789 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 790
 791         * configure: Regenerated to track ../common/aclocal.m4 changes.
 792
 793 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 794
 795         * configure: Regenerated to track ../common/aclocal.m4 changes.
 796
 797 Fri Sep 12 16:13:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 798
 799         * sim-calls.c (sim_open): Change memory to
 800         internal inst. RAM h'00000000-h'0000ffff (64KB)
 801         internal data RAM  h'20000000-h'20007fff (32KB)
 802         external RAM       h'80000000-h'803fffff (4MB)
 803         EIT                h'fffff000-h'ffffffff
 804
 805
 806 Thu Sep 11 08:59:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 807
 808         * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
 809
 810         * sim-calls.c (sim_read): Delete. use sim-hrw.
 811         (sim_write): Delete, use sim-hrw.
 812
 813
 814 Tue Sep  9 01:36:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 815
 816         * ic-d30v (imm_5): Update nr args passed to LSMASKED.
 817
 818         * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
 819         computing the max sat value incorrectly.
 820
 821 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 822
 823         * configure: Regenerated to track ../common/aclocal.m4 changes.
 824
 825 Fri Sep  5 09:15:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 826
 827         * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
 828         type cast instead of SIGNED64 macro.
 829
 830 Thu Sep  4 10:28:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 831
 832         * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
 833
 834         * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
 835         calls.
 836         (sim_open): If no memory, use memory commands to establish d30v
 837         ram.
 838         (d30v_option_handler): Delete, replased by sim-memopt.c.
 839         (sim_create_inferior): Call sim_module_init.
 840
 841         * sim-main.h (struct sim_state): Remove members eit_ram,
 842         sizeof_eit_ram, external_ram, baseof_external_ram,
 843         sizeof_external_ram. Using generic memory model instead.
 844
 845 Mon Sep  1 11:04:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 846
 847         * sim-calls.c (sim_open): Use sim_state_alloc.
 848
 849 Sat Aug 30 10:01:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 850
 851         * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
 852
 853         * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
 854         not -1.
 855
 856 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 857
 858         * configure: Regenerated to track ../common/aclocal.m4 changes.
 859         * config.in: Ditto.
 860
 861 Wed Aug 27 13:41:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 862
 863         * sim-calls.c (sim_open): Add call to sim_analyze_program, update
 864         call to sim_config.
 865
 866         * sim-calls.c (sim_create_inferior): Add ABFD argument.
 867         Initialize CPU registers including PC.
 868         (sim_load): Delete, using sim-hload.
 869
 870         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 871
 872 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 873
 874         * configure: Regenerated to track ../common/aclocal.m4 changes.
 875         * config.in: Ditto.
 876
 877 Mon Aug 25 15:41:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 878
 879         * sim-calls.c (sim_open): Add ABFD argument.
 880         (sim_open): Move sim_config call to after sim_parse_args.
 881         (sim_open): Check sim_config return status.
 882
 883 Fri Aug 22 16:38:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 884
 885         * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
 886         (do_subh_ppp): Compute rc=rb-src instead of src-rb.
 887         (do_addh_ppp): Ditto.
 888
 889 Fri Jun 27 14:43:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 890
 891         * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
 892         wrong.  Update handling of PSW[DS] bit.
 893         (dbt): Fix debug trap address.
 894
 895         * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
 896
 897 Tue Jun 24 12:41:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 898
 899         * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
 900         (DBT): Use PSW_SET to update PSW.
 901
 902         * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
 903
 904 Tue Jun 24 12:16:14 1997  Andrew Cagney  <cagney@b2.cygnus.com>
 905
 906         * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
 907         that they are of class %s instead of class function.
 908
 909 Tue Jun 10 12:26:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 910
 911         * sim-main.h (engine_error, engine_restart, engine_halt,
 912         engine_run_until_stop): Delete prototypes.  Functions deleted
 913         earlier.
 914         (do_interrupt_handler): Add prototype.
 915         (sim_state): Add pending_event member to struct.
 916
 917         * sim-calls.c (sim_open): Configure interrupt handler.
 918         * engine.c (d30v_interrupt_event): New function.  Deliver external
 919         interrupt to processor.
 920
 921         * d30v-insns (do_stack_swap): Move function from here.
 922         * engine.c (do_stack_swap): To here.
 923         * sim-main.h (do_stack_swap): Add prototype.
 924
 925         * cpu.h (registers): Change current_sp to an int.
 926         * d30v-insn (do_stack_swap): Update.
 927
 928 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 929
 930         * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
 931         instruction.
 932         (str_XXX): Fix case of XX == 3 - return "-".
 933
 934 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 935
 936         * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
 937         wrong order.
 938
 939         * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
 940         three.
 941         (MUL, MUL2H, MULHX): X field 01 instead of 10.
 942
 943 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 944
 945         * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
 946         (dbt, rtd): New instructions.
 947
 948         * cpu.h (NR_CONTROL_REGISTERS): Now 15.
 949         (debug_program_status_word_cr, debug_program_counter_cr): Add
 950         debug control registers. Renumber other control registers.
 951         (PSW_DS): New PSW bit.
 952         (DPC, DPSW): Define.
 953
 954 Wed May 28 13:45:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 955
 956         * engine.c (sim_engine_run): Check the event queue on every cycle.
 957
 958         * sim-calls.c (sim_size): Delete.
 959         (sim_do_command): Call sim_args_command.
 960         (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
 961         (simulation): Delete global now depend on sd argument.
 962         (sim_open): Initialize sim-watch.
 963         (d30v_option_handler): New function, parse mem-size argument.
 964
 965 Tue May 27 14:03:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 966
 967         * sim-calls.c (sim_set_callbacks): Delete.
 968         (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
 969
 970         * engine.c (engine_init): Delete.  Handled in sim_open.
 971         (engine_create): Ditto.
 972
 973 Tue May 20 10:15:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 974
 975         * sim-calls.c (sim_open): Add callback argument.
 976         (sim_set_callbacks): Delete SIM_DESC argument.
 977
 978 Mon May 19 14:59:32 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 979
 980         * sim-calls.c (sim_open): Set the sim.base magic number.
 981
 982 Fri May 16 15:25:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 983
 984         * d30v-insns: Replace engine_error with common sim_engine_abort.
 985         * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
 986
 987         * engine.c (engine_run_until_stop): Rename this.
 988         (sim_engine_run): To this. Simplify - most moved to common.
 989
 990         * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
 991         Delete. Replaced by common code.
 992
 993         * engine.c (engine_error, engine_restart, engine_halt): Ditto.
 994
 995         * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
 996         Define as NOPs.
 997
 998 Mon May  5 23:05:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 999
1000         * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1001         ../common.
1002         * sim-calls.c (sim_open): Ditto.
1003
1004         * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1005         notice.
1006
1007 Fri May  2 12:01:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1008
1009         * sim-calls.c (sim-options.h, sim-utils.h): Include.
1010         * Makefile.in (sim-calls.o): Add dependencies.
1011
1012         * d30v-insns (address_word): Remove cia argument from support
1013         functions, igen now does this automatically.
1014
1015         * Makefile.in (tmp-igen): Include line number information in
1016         generated files.
1017
1018         * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1019         simulator base type sim_state_base.
1020         (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1021         "sim-base.h".
1022
1023         * sim-main.h (sim_state): Track recomendations in common
1024         directory.
1025         * cpu.h (sim_cpu): Ditto.
1026         * engine.c (do_2_short, do_parallel): Ditto.
1027         * cpu.h (GPR): Ditto.
1028         * alu.h (MEM, IMEM, STORE): Ditto.
1029         * cpu.c (is_wrong_slot): Ditto.
1030         * ic-d30v (Aa, Ab): Ditto.
1031
1032 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1033
1034         * configure: Regenerated to track ../common/aclocal.m4 changes.
1035         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1036         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1037         parsing fails.  Call sim_post_argv_init.
1038         (sim_close): Call sim_module_uninstall.
1039
1040 Fri Apr 18 13:44:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1041
1042         * sim-calls.c (sim_stop): New function.
1043
1044 Thu Apr 17 02:57:55 1997  Doug Evans  <dje@canuck.cygnus.com>
1045
1046         * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1047         (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1048         (SIM_RUN_OBJS): Change from run.o to nrun.o.
1049         * cpu.h (sim_cpu): New member base.  Delete members trace, sd.
1050         (cpu_traces): Delete.
1051         * engine.c (engine_init): Set backlink from cpu to state.
1052         * sim-calls.c: #include bfd.h.
1053         (sim_open): Set STATE_OPEN_KIND.  Call sim_pre_argv_init,
1054         sim_parse_args.
1055         (sim_load): Return SIM_RC.  New arg abfd.
1056         Call sim_load_file to load file into simulator.
1057         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1058         (sim_trace): Delete.
1059         * sim-main.h (struct sim_state): sim_state_base is typedef now.
1060         (STATE_CPU): Define.
1061
1062 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1063
1064         * configure: Regenerated to track ../common/aclocal.m4 changes.
1065         * config.in: Ditto.
1066
1067 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1068
1069         * Makefile.in (SIM_EXTRA_DEPS): Define.
1070         (SIM_OBJS): Add sim-utils.o.
1071         (SIM_GEN): Delete tmp-common.
1072         (SIM_EXTRA_CLEAN): Delete clean-common.
1073         (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1074         (tmp-common,clean-common): Delete.
1075         (ENGINE_H): sim-state.h renamed to sim-main.h.
1076         (clean-igen): Delete tmp-insns.
1077
1078         * cpu.c: sim-state.h renamed to sim-main.h.
1079         * engine.c: Likewise.
1080         * sim-calls.c: Likewise.
1081         (zalloc,zfree): Moved to ../common/sim-utils.c.
1082         * sim-main.h: Renamed from sim-state.h.
1083
1084         * sim-calls.c (sim_open): New arg `kind'.
1085
1086         * configure: Regenerated to track ../common/aclocal.m4 changes.
1087
1088 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1089
1090         * configure: Regenerated to track ../common/aclocal.m4 changes.
1091
1092 Wed Apr  2 11:13:15 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1093
1094         * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1095
1096         * engine.c (current_target_byte_order, current_host_byte_order,
1097         current_environment, current_alignment, current_floating_point,
1098         current_model_issue, current_stdio): Delete, moved to
1099         ../common/sim-config.c
1100
1101 Mon Mar 24 14:50:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1102
1103         * d30v-insns (do_ldw): Load 4 bytes not 2.
1104         (do_incr, LD*, ST*): Increment register not its value.
1105
1106 Mon Mar 24 09:59:53 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1107
1108         * cpu.c (is_wrong_slot): Ditto.
1109         (is_condition_ok): Ditto.
1110
1111         * sim-calls.c (sim_trace): Ditto.
1112
1113         * engine.c (engine_init): Ditto.
1114         (do_2_short): Ditto.
1115         (engine_run_until_stop): Ditto.
1116
1117         * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1118         and `cpu *processor' arguments as igen now handles this.
1119
1120         * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1121         processor to cpu.
1122
1123         * sim-state.h: Update.
1124
1125 Fri Mar 21 12:52:12 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1126
1127         * d30v-insns (do_sat): Correct calculation of saturate lower
1128         bound.
1129         (do_sath): Ditto.
1130         (do_satzh, do_satz): Arguments should be signed.
1131
1132         * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1133         moment.
1134         (filter_filename): Drop.
1135
1136         * cpu.h (is_wrong_slot): Correct declaration name - was
1137         is_valid_slot.
1138
1139         * engine.c (do_parallel): Plicate GCC.
1140         (engine_error): Ditto.
1141         (engine_run_until_stop): Ditto.
1142         * cpu.c (is_wrong_slot): Ditto.
1143         (is_condition_ok): Ditto.
1144         * sim-calls.c (sim_size): Ditto.
1145         (sim_read): Ditto.
1146         (sim_trace): Ditto.
1147
1148         * engine.h, engine.c (engine_create): Add missing prototype to
1149         header file.  Clean up missing variables.
1150
1151         * configure.in (unistd.h, string.h, strings.h): Configure in.
1152         * configure, config.in: Rebuild.
1153
1154 Thu Mar 20 19:40:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1155
1156         * d30v-insns (void): Provide a second emul instruction using a
1157         branch prefix.
1158
1159 Tue Mar 18 20:51:42 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1160
1161         * d30v-insn (do_sat*): Pass all necessary args.
1162
1163 Tue Mar 18 18:49:10 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1164
1165         * d30v-insns (SAT*): Issue warning when bit overflow.
1166         (EMUL): Exit with GPR[2] not 2.
1167
1168 Tue Mar 18 14:24:09 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1169
1170         * sim-state.h: New file rename engine.h.
1171         (sim_state): Rename engine strut to sim_state, rename events and
1172         core members.
1173
1174         * engine.c: Update.
1175         * cpu.h, cpu.c: Ditto.
1176         * alu.h: Ditto.
1177         * d30v-insns: Ditto.
1178         * sim-calls.c: Ditto.
1179
1180         * Makefile.in (sim-*.c): Moved to ../common.
1181
1182 Tue Mar 18 10:39:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1183
1184         * d30v-insns (do_mac): Adding wrong register.
1185         (do_macs): Ditto.
1186         (do_msub): Ditto.
1187         (do_msubs): Ditto.
1188
1189         * ic-d30v: Put back definitions of RaH, RaL, et.al.
1190         (do_sra2h, do_srah): Use.
1191         (do_srl2h, do_srlh): Use.
1192
1193         * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1194
1195 Tue Mar 18 03:01:25 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1196
1197         * d30v-insns: Specify wild insted of reserved bits.
1198         (void):
1199
1200 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1201
1202         * configure: Re-generate.
1203
1204 Mon Mar 17 14:35:37 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1205
1206         * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1207         options. Allow RESERVED_BITS to be configured.
1208         * configure: Re-generate.
1209
1210         * Makefile.in (sim-*.h): Drop, not needed.
1211         (sim-*.c): Make each explicit so that they automatically update.
1212
1213 Sat Mar 15 02:34:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1214
1215         * ic-d30v (imm long): Incorrect calculation.
1216
1217         * d30v-insns (EMUL): Finish exit, write-string emul-call.
1218
1219         * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1220         tracing.
1221
1222 Sat Mar 15 02:10:31 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1223
1224         * configure.in: Enable common options - endian, inline and
1225         warnings.
1226         * configure: Regenerate.
1227
1228 Fri Mar 14 16:11:50 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1229
1230         * Makefile.in (cpu.o): Update dependencies.
1231         * cpu.c (is_condition_ok): Update PSW bit manipulations.
1232
1233 Fri Mar 14 12:49:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1234
1235         * configure.in: Autoconfig m4
1236         * configure: Regenerate.
1237
1238         * Makefile.in: Use m4 to preprocess d30v-insns.
1239         * d30v-insn: Adjust.
1240
1241 Thu Mar 13 12:44:54 1997  Doug Evans  <dje@canuck.cygnus.com>
1242
1243         * sim-calls.c (sim_open): New SIM_DESC result.  Argument is now
1244         in argv form.
1245         (other sim_*): New SIM_DESC argument.
1246
1247 Wed Mar 12 19:05:45 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1248
1249         * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1250
1251         * engine.c (engine_run_until_stop): Handle delayed subroutine
1252         call.
1253         * d30v-insn: Ditto.
1254
1255         * ic-d30v: For Rb and Rc always return the value and not the
1256         equation.
1257         * d30v-insn: Use.
1258
1259         * ic-d30v (val_Ra): Returns 0 or RA.
1260         * d30v-insn: Use.
1261
1262         * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1263         the register index to be even, issusing a warning if it was not.
1264         (LD*, ST*): Use.
1265
1266 Wed Mar 12 14:57:26 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1267
1268         * d30v-insns (do_trap): Implement TRAP instruction.
1269
1270         * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1271         onto PSW bit.
1272         * ic-d30v: Drop F* expressions.
1273         * d30v-insn: Use more explicit PSW_FLAG_ ops.
1274         * cpu.h (PSW_*): Redo PSW bit values.
1275         * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1276         backwards.
1277
1278         * d30v-insn (MVFSYS, MVTSYS): Implement.
1279         * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1280
1281 Wed Mar 12 14:12:11 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1282
1283         * cpu.h (RPT_IS_CALL): New macro for processor field
1284         is_delayed_call.  That in turn used as a flag to indicate if a
1285         delayed branch or delayed call is to occure.
1286         * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1287         (do_dbrai): Ditto.
1288         (do_dbsr): Ditto.
1289         (do_dbsr): Ditto.
1290         (do_djmp): Ditto.
1291         (do_djmpi): Dotto.
1292         (do_djsr): Ditto.
1293         (do_djsri): Ditto.
1294         (void):
1295
1296         * d30v-insn (do_incr): Finish - handle modulo registers.
1297
1298         * d30v-insns (CMPU): Include all possible compare
1299         operations. Issue a warning where op defined by the processor
1300         spec.
1301
1302 Wed Mar 12 13:55:55 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1303
1304         * d30v-insns: Add a new instruction class _EMUL and a new
1305         instruction EMUL that emulates a few basic IO operations.
1306
1307         * Makefile.in (tmp-igen): Filter in emul instructions.
1308
1309 Fri Mar  7 20:32:13 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1310
1311         * d30v-insns (void): Fill in the gaps.
1312
1313 Wed Feb 26 09:31:10 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
1314
1315         * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1316
1317         * ic-d30v (cache): Update to use H_word, L_word added to
1318         sim-endian.h.
1319
1320 Tue Feb 25 15:26:51 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
1321
1322         * Makefile.in (tmp-igen): Correctly run $(MAKE).
1323
1324 Thu Feb 20 20:30:31 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1325
1326         * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1327         files dependant on tmp-igen. Define ENGINE_H.
1328
1329 Sun Feb 16 16:42:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1330
1331         * configure.in: New file - follow Doug Evans instructions.
1332         * Makefile.in: Ditto.
1333