sim/d30v/ChangeLog

   1 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * configure: Regenerated to track ../common/aclocal.m4 changes.
   4
   5 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
   6
   7         * configure: Regenerated to track ../common/aclocal.m4 changes.
   8
   9 Wed Sep  1 11:38:21 1999  Andrew Cagney  <cagney@b1.cygnus.com>
  10
  11         * d30v-insns: Cast CIA to LONG in printfs.
  12
  13 Tue Aug 31 01:32:22 1999  Andrew Cagney  <cagney@b1.cygnus.com>
  14
  15         * cpu.h (unqueue_writes): Add declaration.
  16
  17 1999-05-27  Michael Meissner  <meissner@cygnus.com>
  18
  19         * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI
  20         instruction loop is too small.
  21
  22 1999-05-08  Felix Lee  <flee@cygnus.com>
  23
  24         * configure: Regenerated to track ../common/aclocal.m4 changes.
  25
  26 1999-03-16  Martin Hunt  <hunt@cygnus.com>
  27         From Frank Ch. Eigler  <fche@cygnus.com>
  28
  29         * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history.
  30         * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p.
  31         (do_sath): Detect MVTSYS by new flag.
  32         * engine.c (unqueue_writes): Detect MVTSYS by new flag.
  33         (do_2_short, do_parallel): Initialize new flag.
  34
  35 1999-02-26  Frank Ch. Eigler  <fche@cygnus.com>
  36
  37         * tconfig.in (SIM_HANDLES_LMA): Make it so.
  38
  39 1999-01-12  Frank Ch. Eigler  <fche@cygnus.com>
  40
  41         * engine.c (unqueue_writes): Make PSW conflict resolution code
  42         conditional - disable it for MVTSYS || insn case.
  43
  44 1999-01-11  Frank Ch. Eigler  <fche@cygnus.com>
  45
  46         * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG
  47         update.
  48         * engine.c (unqueue_writes): Make non-static.  Remove PSW_V/VA
  49         special case.
  50         (do_parallel): Don't drain PSW write queue for MVTSYS || insn.
  51
  52 1999-01-07  Frank Ch. Eigler  <fche@cygnus.com>
  53
  54         * d30v-insns (do_ld2h): Sign-extend loaded half-words.
  55
  56 1999-01-05  Frank Ch. Eigler  <fche@cygnus.com>
  57
  58         * d30v-insns (do_ld2h): Read memory in word units.
  59         (do_ld4bh): Ditto.  Correct sign extension.
  60         (do_ld4bhu): Ditto.
  61         (do_st2h): Write memory in word units.
  62         (do_st4hb): Ditto.
  63         (st4hb): Correct mnemonic in igen template.
  64
  65 1998-12-08  Frank Ch. Eigler  <fche@cygnus.com>
  66
  67         * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn.
  68         (do_ld2w): Ditto.
  69         (do_ld4bh): Ditto.
  70         (do_ld4bhu): Ditto.
  71         (do_mulx2h): Ditto.
  72
  73 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
  74
  75         * d30v-insns (do_repeat): Don't set RP for repeat count 1.
  76
  77 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
  78
  79         * d30v-insns (do_src): Treat shift count -32 naturally instead of
  80         producing zero result.
  81
  82 1998-11-22  Frank Ch. Eigler  <fche@cygnus.com>
  83
  84         * d30v-insns (do_src): Limit SRC shift count to -32 .. 31.
  85
  86 1998-11-16  Frank Ch. Eigler  <fche@cygnus.com>
  87
  88         * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2.
  89         * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here.
  90
  91 1998-11-12  Frank Ch. Eigler  <fche@cygnus.com>
  92
  93         * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated
  94         RPT_IS_CALL macro.
  95         * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call.
  96         * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto.
  97         (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto.
  98         * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead.
  99         (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto.
 100         * engine.c (sim_engine_run): Remove conditional setting of R62 based
 101         upon RPT_IS_CALL.
 102
 103 1998-11-08  Frank Ch. Eigler  <fche@cygnus.com>
 104
 105         * sim-calls.c (sim_open): Add dummy memory range over control
 106         register region (0x40000000..0x4000FFFF).
 107
 108 1998-11-06  Frank Ch. Eigler  <fche@cygnus.com>
 109
 110         * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0.
 111
 112 Tue Oct 13 11:01:16 1998  Frank Ch. Eigler  <fche@cygnus.com>
 113
 114         * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift
 115         count -32 to produce zero result.
 116         (do_src): Ditto for shift count == -64.
 117
 118 Mon Oct 12 23:04:11 1998  Frank Ch. Eigler  <fche@cygnus.com>
 119
 120         * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking.
 121         (do_sra,do_srl): Use loop to limit shift count to -32 .. 31.
 122         (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31.
 123         (sra2h,srl2h): Use loop to limit shift count to -16 .. 15.
 124         (do_src): Use loop to limit shift count to -64 .. 63.
 125
 126 Fri Oct  9 16:46:52 1998  Doug Evans  <devans@canuck.cygnus.com>
 127
 128         * sim-calls.c (get_insn_name): New fn.
 129         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
 130         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
 131
 132 Mon Sep 28 10:43:28 1998  Frank Ch. Eigler  <fche@cygnus.com>
 133
 134         * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use
 135         correct MSB bit numbers for sign extension masks.
 136
 137 Fri Sep 25 17:32:27 1998  Frank Ch. Eigler  <fche@cygnus.com>
 138
 139         * engine.c (do_parallel): Unqueue writes if MU instruction was
 140         a MVTSYS, as identified by its left_kills_right_p side-effect.
 141
 142 Fri Sep 25 12:31:34 1998  Frank Ch. Eigler  <fche@cygnus.com>
 143
 144         * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask
 145         shift/rotate counts to number of bits in width of operand; no
 146         longer saturate at maxima.
 147
 148 Tue Jul 14 18:39:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 149
 150         * cpu.h (left_kills_right_p): New flag for non-branch instructions
 151         that, when executed in left slot of a -> sequential pair, kill the
 152         right slot.
 153         * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands.
 154         * engine.c (do_2_short): Respect flag.
 155
 156 Thu Jun  4 16:48:58 1998  David Taylor  <taylor@texas.cygnus.com>
 157
 158         * d30v-insns (do_trap): don't save the bPSW and PSW based on
 159         current values because an instruction done in parallel with
 160         the trap might change them, instead set a flag do that
 161         unqueue_writes will take care of it.
 162         * engine.c (unqueue_writes): finish trap handling
 163         * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP
 164         to make use of it; set by do_trap, tested and cleared by
 165         unqueue_writes.
 166
 167 Tue May 19 16:07:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
 168
 169         * engine.c (unqueue_writes): Suppress the all enqueued writes to
 170         the same flags in PSW except the last.
 171
 172 Fri May 15 11:38:59 1998  Frank Ch. Eigler  <fche@cygnus.com>
 173
 174         * d30v-insns (RETI): Correct instruction spelling to "reit".
 175
 176 Thu May 14 09:34:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 177
 178         * d30v-insns (dbt): Handle DBT at end of repeat block.
 179         (do_trap, dbt): Clear PSW_RP if at end of repeat block.
 180
 181 Thu May 14 07:41:41 1998  Frank Ch. Eigler  <fche@cygnus.com>
 182
 183         * engine.c (sim_engine_run): Trigger DDBT based on previous PC,
 184         instead of next PC.
 185
 186 Wed May 13 11:03:40 1998  Frank Ch. Eigler  <fche@cygnus.com>
 187
 188         * engine.c (sim_engine_run): Move DDBT handling after instruction
 189         decode/execute stage.
 190
 191 Tue May 12 12:14:53 1998  Frank Ch. Eigler  <fche@cygnus.com>
 192
 193         * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to
 194         properly handle negative saturation inputs.
 195
 196 Tue May 12 11:11:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 197
 198         * engine.c (sim_engine_run): Decrement RPT_C only under more
 199         restricted conditions.
 200
 201 Mon May 11 17:33:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
 202
 203         * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data
 204         unchanged.
 205
 206 Mon May 11 16:27:04 1998  Frank Ch. Eigler  <fche@cygnus.com>
 207
 208         * engine.c (sim_engine_run): Implement DDBT (debugger debug trap)
 209         functionality.
 210
 211 Fri May  8 16:44:19 1998  Frank Ch. Eigler  <fche@cygnus.com>
 212
 213         * d30v-insns (do_trap): Set bPC to RPT_S if trap is last
 214         instruction in repeat block.
 215         (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch
 216         is last instruction in repeat block.
 217
 218 Fri May  8 11:06:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
 219
 220         * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag
 221         macro.
 222         * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit.
 223
 224 Wed May  6 19:40:56 1998  Doug Evans  <devans@canuck.cygnus.com>
 225
 226         * sim-main.h (INSN_NAME): New arg `cpu'.
 227
 228 Fri May  1 14:24:30 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 229
 230         * d30v-insns: Fix parameter list to sim_engine_abort.
 231
 232 Thu Apr 30 14:28:00 1998  Fred Fish  <fnf@cygnus.com>
 233
 234         * d30v-insns (do_sath): Add additional argument that determines
 235         whether or not the F4 (PSW_S) bit in the PSW is updated.
 236         (SAT2H): Do not update PSW_S bit.
 237         (SATHp): Do update PSW_S bit.
 238
 239 Tue Apr 28 23:36:00 1998  Fred Fish  <fnf@cygnus.com>
 240
 241         * d30v-insns (SRAHp, SRLHp):  Immediate values are signed 6 bit
 242         values, not 5 bit values.
 243
 244 Wed Apr 29 12:57:55 1998  Frank Ch. Eigler  <fche@cygnus.com>
 245
 246         * d30v-insns (do_incr): Check modular arithmetic limits after
 247         postincrement/postdecrement, rather than before, to match
 248         erroneous hardware behavior.
 249
 250 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 251
 252         * configure: Regenerated to track ../common/aclocal.m4 changes.
 253
 254 Mon Apr 27 19:42:00 1998  Fred Fish  <fnf@cygnus.com>
 255
 256         * d30v-insns (do_trap): Clear all bits in PSW except SM and DB.
 257
 258 Mon Apr 27 14:55:00 1998  Fred Fish  <fnf@cygnus.com>
 259
 260         * d30v-insns (do_mulx2h): Low order results go in ra+1, high
 261         order in ra.
 262
 263 Mon Apr 27 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
 264
 265         * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed
 266         multiply of high and low fields from operands.
 267
 268 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 269
 270         * configure: Regenerated to track ../common/aclocal.m4 changes.
 271         * config.in: Ditto.
 272
 273 Sun Apr 26 15:20:20 1998  Tom Tromey  <tromey@cygnus.com>
 274
 275         * acconfig.h: New file.
 276         * configure.in: Reverted change of Apr 24; use sinclude again.
 277
 278 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 279
 280         * configure: Regenerated to track ../common/aclocal.m4 changes.
 281         * config.in: Ditto.
 282
 283 Fri Apr 24 11:20:00 1998  Tom Tromey  <tromey@cygnus.com>
 284
 285         * configure.in: Don't call sinclude.
 286
 287 Wed Apr 22 21:23:00 1998  Fred Fish  <fnf@cygnus.com>
 288
 289         * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc.
 290         * d30v-insns (MVTACC): Use new RbU and RcU macros.
 291
 292 Wed Apr 22 20:52:00 1998  Fred Fish  <fnf@cygnus.com>
 293
 294         * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL.
 295         * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of
 296         RbH and RbL.
 297
 298 Mon Apr 13 16:59:00 1998  Fred Fish  <fnf@cygnus.com>
 299
 300         * d30v-insns (do_srl): Avoid undefined behavior of host compiler
 301         when shifting left by more than 31 bits.
 302
 303 Tue Apr  7 18:09:00 1998  Fred Fish  <fnf@cygnus.com>
 304
 305         * engine.c (sim_engine_run): Remove at_loop_end variable. Add
 306         rp_was_set and rpt_c_was_nonzero variables.  Major restructuring of
 307         code before and after instruction execution to properly handle state
 308         of the RP bit in the PSW, the value in RPT_C, and other loop related
 309         problems.
 310
 311 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 312
 313         * configure: Regenerated to track ../common/aclocal.m4 changes.
 314
 315 Fri Apr  3 15:26:00 1998  Fred Fish  <fnf@cygnus.com>
 316
 317         * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded
 318         BASE_ADDRESS constant.
 319         * cpu.h (BASE_ADDRESS): Remove constant not used any longer.
 320
 321 Fri Apr  3 14:42:00 1998  Fred Fish  <fnf@cygnus.com>
 322
 323         * cpu.h (EIT_VB): Define macro to access EIT_VB register.
 324         (EIT_VB_DEFAULT): Define value of EIT_VB register after reset.
 325         * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT.
 326
 327 Tue Mar 31 19:00:00 1998  Fred Fish <fnf@cygnus.com>
 328
 329         * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than
 330         just pcdisp.
 331
 332 Mon Mar 30 20:30:00 1998  Fred Fish  <fnf@cygnus.com>
 333
 334         * engine.c (sim_engine_run): Add at_loop_end.  Rework end of loop
 335         code to use this to both reset PSW_RP when needed and to set PC
 336         to RPT_S for another pass through the loop.
 337
 338 Mon Mar 30 16:12:00 1998  Fred Fish  <fnf@cygnus.com>
 339
 340         * engine.c (sim_engine_run): Change code that handles RPT_* regs
 341         and PSW_RP bit in PSW so that PSW_RP is always set while executing
 342         the loop and loop terminates upon completion of the pass for which
 343         RPT_C is zero.  More closely follow logic in architecture manual.
 344
 345 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 346
 347         * configure: Regenerated to track ../common/aclocal.m4 changes.
 348
 349 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 350
 351         * configure: Regenerated to track ../common/aclocal.m4 changes.
 352
 353 Thu Mar 19 00:25:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 354
 355         * sim-calls.c (sim_open): Move memory-region commands back to
 356         before the call to sim_parse_args.
 357         (d30v_option_handler): Implement extmem-size option using
 358         memory-delete and memory-region commands.
 359
 360         * sim-calls.c (d30v_option_handler): Use ANSI-C argument list,
 361         correct number and type of arguments.
 362
 363 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 364
 365         * configure: Regenerated to track ../common/aclocal.m4 changes.
 366
 367 Wed Mar 11 13:56:32 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map,
 370         read_map and write_map resp.
 371
 372         * cpu.c (d30v_read_mem, d30v_write_mem): Ditto.
 373
 374 Mon Mar  2 13:34:08 1998  Fred Fish  <fnf@cygnus.com>
 375
 376         * d30v-insns (do_repeat): Abort repeat instructions that have
 377         a repeat count of zero.
 378
 379 Fri Feb 27 18:44:12 1998  Doug Evans  <devans@canuck.cygnus.com>
 380
 381         * sim-calls.c (sim_open): Update call to sim_add_option_table.
 382
 383 Thu Feb 26 18:34:31 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 384
 385         * sim-calls.c (sim_info): Delete.
 386
 387 Wed Feb 25 14:44:58 1998  Michael Meissner  <meissner@cygnus.com>
 388
 389         * d30v-insns (mvtsys): If moving to EIT_VB register, and with
 390         valid bits.  Optimize code somewhat.
 391
 392         * cpu.h (eit_vector_base_cr): New CR we need to special case.
 393         (EIT_VALID): Valid bits for EIT_VB register.
 394
 395         * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is
 396         in the low 16 bits of the register.
 397
 398         * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back
 399         results.
 400         (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing
 401         result back to the registers.
 402
 403 Tue Feb 24 18:09:52 1998  Fred Fish  <fnf@cygnus.com>
 404
 405         * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force
 406         r0 to always be zero.
 407         * cpu.h (GPR_SET): Define.
 408
 409 Tue Feb 24 14:12:57 1998  Michael Meissner  <meissner@cygnus.com>
 410
 411         * d30v-insns (do_sath): Do saturation in 32 bits, before
 412         converting to 16.
 413         (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend.
 414         (do_sath_p): Delete, no longer used.
 415         (sathp): Call do_sath, not do_sath_p.
 416
 417 Mon Feb 23 15:55:14 1998  Michael Meissner  <meissner@cygnus.com>
 418
 419         * d30v-insns (illegal,wrong_slot): Print \n after PC and before we
 420         call sim_engine_halt.
 421         (sr{a,l}hp): Implement missing instructions.
 422         (do_trap): Print high order PSW bits in human readable fashion.
 423         (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP.
 424
 425         * alu.h (PSW_SET_QUEUE): New macro to set PSW bits.
 426
 427         * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C
 428         being > 0.  If RPT_C is decremented to 0, clear PSW RP bit.
 429
 430 Fri Feb 20 10:13:34 1998  Fred Fish  <fnf@cygnus.com>
 431
 432         * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020.
 433
 434 Tue Feb 17 12:39:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 435
 436         * sim-calls.c (sim_store_register, sim_fetch_register): Pass in
 437         length parameter.  Return -1.
 438
 439 Fri Feb  6 17:39:54 1998  Michael Meissner  <meissner@cygnus.com>
 440
 441         * d30v-insns (do_dbrai): Correct typo, use shift, not comparison.
 442
 443 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 444
 445         * configure: Regenerated to track ../common/aclocal.m4 changes.
 446
 447 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 448
 449         * configure: Regenerated to track ../common/aclocal.m4 changes.
 450
 451 Fri Jan 30 08:29:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 452
 453         * engine.c (sim_engine_run): Add parameter nr_cpus.
 454
 455 Fri Jan 30 17:09:37 1998  Michael Meissner  <meissner@cygnus.com>
 456
 457         * d30v-insns (jsrtzr): Check for register == 0, not != 0.
 458
 459 Wed Jan 21 17:52:04 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 460
 461         * engine.c (do_stack_swap): Make type of new_sp unsigned.
 462
 463 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 464
 465         * configure: Regenerated to track ../common/aclocal.m4 changes.
 466
 467 Mon Jan  5 16:04:17 1998  Andrew Cagney  <cagney@sanguine.cygnus.com>
 468
 469         * sim-calls.c (sim_info): Call profile_print.
 470
 471         * sim-main.h: Enable instruction profiling.
 472
 473 Thu Dec 18 12:21:38 1997  Michael Meissner  <meissner@cygnus.com>
 474
 475         * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry
 476         and overflow bits.  Don't look at the current value of PSW.
 477         (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in
 478         question.  Don't look at the current value of PSW.
 479
 480         * d30v-insns: All instructions that set the PSW, will only queue
 481         up the particular bits in question that were set by the
 482         instruction.  Don't look at the current value of PSW.
 483
 484 Wed Dec 17 11:41:44 1997  Michael Meissner  <meissner@cygnus.com>
 485
 486         * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW.
 487         (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set.
 488
 489         * engine.c (trace_alu32): When changing BPSW/DPSW, print the
 490         special PSW bits.
 491
 492         * d30v-insns (do_cmp_cc): Fix cmpps and cmpng.
 493         (do_cmp{,u}_cc): Print which cc value was used if not in switch
 494         statement.
 495         (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}.
 496         (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID.
 497
 498 Tue Dec 16 18:17:26 1997  Michael Meissner  <meissner@cygnus.com>
 499
 500         * d30v-insns (mulx2h): Add missing instruction.  Complain if
 501         register is not even.
 502         (do_{add,sub}h_ppp): Get correct high/low values.  Also correctly
 503         handle short immediates.
 504         (do_ld{2w,4bh}): Don't load r0 if ra == 0.
 505
 506         * engine.c (d30v_interrupt_event): Remove unused variable
 507         (unqueue_writes): Ditto.
 508
 509 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 510
 511         * configure: Regenerated to track ../common/aclocal.m4 changes.
 512         * config.in: Ditto.
 513
 514 Sat Dec 13 23:40:17 1997  Michael Meissner  <meissner@cygnus.com>
 515
 516         * cpu.h (_write{32,64}): New structures for keeping track of
 517         queued writes to registers.
 518         (_sim_cpu): Add _write{32,64} structures.  Make is_delayed_call
 519         unsigned32 also.
 520         (WRITE{32,64}*): New macros for queueing up writes to registers.
 521
 522         * alu.h (ALU16_END): Take field that says whether we are setting
 523         the high or low half word.  Queue up changes to registers.
 524         (ALU32_END): Queue up changes to registers.
 525         (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up.
 526
 527         * sim-main.h (do_stack_swap): Remove declaration.
 528
 529         * engine.c (do_stack_swap): Make static.
 530         (unqueue_writes): New function to unqueue all changes to 32 and 64
 531         bit registers in order.  Implement --trace-alu.  Reset high water
 532         marks for # of queued registers.  If PSW changed, possibly update
 533         stack pointer.
 534         (do_{long,2_short,parallel}): Unqueue register writes at the
 535         appropriate time.
 536
 537         * d30v-insns: Modify all insns to queue changes to registers,
 538         rather than do them immediately so that parallel instructions get
 539         the right values for inputs.  Rewrite 16 bit operations to be done
 540         in terms of masked 32 bit registers.  Don't call do_stack_swap any
 541         more here.
 542
 543 Thu Dec 11 10:06:02 1997  Michael Meissner  <meissner@cygnus.com>
 544
 545         * sim-calls.c (d30v_option_handler): Add support for --extmem-size
 546         to size external memory.
 547         (sim_open): Ditto.  Default if no --extmem-size option is 8 meg.
 548
 549 Wed Dec 10 01:08:24 1997  Jim Blandy  <jimb@zwingli.cygnus.com>
 550
 551         * d30v-insns (do_rot2h): Clip rotate amounts to four bits.  The
 552         upper bits, and the sign of the rotation amount, are red herrings.
 553         (do_sra, do_srl): Handle shifts greater than 32 bits.
 554         (do_srah, do_sral): Properly sign-extend value and shift amount.
 555         Handle shifts larger than 16 bits.
 556
 557 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 558
 559         * configure: Regenerated to track ../common/aclocal.m4 changes.
 560
 561 Mon Dec  1 15:10:44 1997  Michael Meissner  <meissner@cygnus.com>
 562
 563         * d30v-insns (do_sub2h): For short instruction, correctly
 564         dupplicate lower 16 bits of immediate in upper 16 bits.
 565         (sat2z): Fix typo that ignored the upper half of the register.
 566         (do_satz): If < 0, set *ra to 0, if not call do_sat.
 567         (mvtsys): Before setting PSW, and with PSW_VALID.
 568
 569         * cpu.h (PSW_VALID): Mask for bits in PSW that is valid.
 570
 571 Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 572
 573         * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in
 574         printf, return dummy at end.
 575
 576 Mon Dec  1 15:05:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 577
 578         * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with
 579         ALU_ADDC.
 580         (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C.
 581         (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB.
 582         (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B.
 583
 584         * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of
 585         ALU16_HAD_CARRY.
 586         (ALU32_END): Ditto.
 587
 588         * sim-main.h (string.h, strings.h): Include.
 589
 590         * sim-calls.c: Delete inclusion of string.h and strings.h.
 591
 592 Sun Nov 30 17:29:25 1997  Michael Meissner  <meissner@cygnus.com>
 593
 594         * configure.in (--enable-sim-trapdump): New switch to control
 595         whether traps 0..30 dump out the registers or do the real trap.
 596         * configure: Regenerate.
 597
 598         * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if
 599         appropriate --{en,dis}able-sim-trapdump is done.
 600
 601         * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE.
 602         (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump.
 603         (d30v_option_handler): Add support for --trace-trapdump.
 604         (d30v_options): Ditto.
 605         (sim_open): Ditto.
 606
 607         * d30v-insns (do_trap): Do register dump if --trace-trapdump and
 608         not the system call trap.  Remove support for calling old function
 609         sim_io_syscalls.
 610
 611 Sat Nov 29 18:54:55 1997  Michael Meissner  <meissner@cygnus.com>
 612
 613         * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields.
 614         (TRACE_CALL_P): Non-zero if --trace-call.
 615         (TRACE_ACTION): Non-zero if there is a tracing action at the end
 616         of processing an instruction boundary.
 617         (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return.
 618         (d30v_next_insn): Delete, now trace_action field in cpu state.
 619
 620         * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu
 621         state.
 622         (return_occurred): Minimum saved register to check is now 34.
 623
 624         * engine.c (sim_engine_run): Change call tracing to use
 625         trace_action field in cpu state.
 626
 627         * sim-calls.c (d30v_option_handler): Handle d30v specific options.
 628         (d30v_options): D30V specific options.  Right now, --trace-call.
 629         (sim_open): Register d30v specific options.
 630
 631         * d30v-insns (call, return insns): Move --trace-debug call/return
 632         tracing action to d30v specific --trace-call option.
 633
 634 Fri Nov 28 20:12:48 1997  Michael Meissner  <meissner@cygnus.com>
 635
 636         * cpu.h (CREG): Rename from CR.
 637
 638         * d30v-insns (do_{addc,subb}): Explicitly import the carry bit.
 639         (do_trap): Use CREG, not CR.  Switch to using cb_syscall.
 640
 641 Thu Nov 27 19:25:43 1997  Michael Meissner  <meissner@cygnus.com>
 642
 643         * cpu.h (ACC): Define as short cut to accumulators.
 644
 645         * d30v-insns (do_rot): Delete explicit function, use ROT32 to do
 646         rotate instruction.
 647         (do_trap): Make trap 30 print out accumulators and first 16
 648         control registers as well.
 649         (do_avg): Sign extend to 64 bit type before doing add/shift.
 650         (do_avg2h): Sign extend 16 bit chunks before doing add/shift.
 651
 652 Wed Nov 26 15:20:24 1997  Doug Evans  <devans@canuck.cygnus.com>
 653
 654         * Makefile.in (NL_TARGET): Define.
 655
 656 Wed Nov 26 16:55:38 1997  Michael Meissner  <meissner@cygnus.com>
 657
 658         * cpu.h (d30v_next_insn): New flag for things we are supposed to
 659         trace between instruction words.
 660         ({call,return}_occurred): Remove index argument.
 661         (d30v_{read,write}_mem): Add declarations.
 662
 663         * cpu.c (d30v_next_insn): New flag for things we are supposed to
 664         trace between instruction words.
 665         ({call,return}_occurred): Remove index argument.
 666         (d30v_{read,write}_mem): New functions for reading/writing
 667         simulated memory in the new common system call support.
 668
 669         * d30v-insns: Set emacs C mode.
 670         (call/return insns): Set bit to trace call at instruction
 671         boundary, rather than doing it here.
 672         (do_trap): Set up to use new common system call interface.
 673
 674         * engine.c (sim_engine_run): If d30v_next_insn is non zero, do
 675         function call/return tracing.
 676
 677 Mon Nov 24 16:40:49 1997  Michael Meissner  <meissner@cygnus.com>
 678
 679         * d30v-insns (bnot): Correctly reset bit in question.
 680         (do_trap): Use common system call emulation support, rather than
 681         our home grown support.
 682
 683 Sun Nov 23 22:47:20 1997  Michael Meissner  <meissner@cygnus.com>
 684
 685         * d30v-insns (mvfacc): Immediate field is unsigned, allowing
 686         shifts of up to 63 to be encoded.  Also do shift signed, rather
 687         than unsigned.
 688
 689         * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants.
 690
 691         * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign
 692         extends.
 693
 694 Sat Nov 22 19:04:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 695
 696         * d30v-insns (illegal, wrong_slot): Replace SIGILL with
 697         SIM_SIGILL.
 698
 699         * sim-calls.c (signal.h): Do not include, replaced by
 700         sim-signal.h.
 701
 702         * sim-main.h (signal.h): Do not include, include sim-signal.h
 703         instead.
 704
 705 Fri Nov 21 09:33:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 706
 707         * cpu.c (call_occurred): Use ZALLOC instead of xmalloc.
 708         (return_occurred): Use zfree instead of free.
 709
 710 Wed Nov 19 13:28:09 1997  Michael Meissner  <meissner@cygnus.com>
 711
 712         * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include
 713         files in $(ENGINE_H).
 714
 715         * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes
 716         a VAL argument to add/subtract along with the carry.
 717
 718 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 719
 720         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 721
 722 Tue Nov 18 13:56:15 1997  Michael Meissner  <meissner@cygnus.com>
 723
 724         * d30v-insns (do_trap): Change to new system call numbers.  Add
 725         read emulation.
 726
 727 Mon Nov 17 14:43:45 1997  Michael Meissner  <meissner@cygnus.com>
 728
 729         * d30v-insns (mulx): Add mulx instruction.
 730
 731 Sun Nov 16 19:06:56 1997  Michael Meissner  <meissner@cygnus.com>
 732
 733         * cpu.c ({call,return}_occurred): New trace functions to mark
 734         function calls and returns and check whether all saved registers
 735         really were saved.
 736
 737         * cpu.h ({call,return}_occurred): Add declaration.
 738
 739         * d30v-insns ({bsr, jsr} patterns): Call call_occurred if
 740         --trace-debug to trace function calls.
 741         (jmp register pattern): If this is a jump r62 and --trace-debug,
 742         call return_occurred to trace function calls.
 743         (bsr{tnz,tzr}): Move setting r62 inside conditional against reg.
 744         (do_ld2w): Grab memory in 64-bit chunk, to check alignment.
 745         (do_st2w): Ditto.
 746
 747 Sat Nov 15 20:57:57 1997  Michael Meissner  <meissner@cygnus.com>
 748
 749         * d30v-insns: Undo changes from Nov. 11, allowing for odd register
 750         pairs, since the machine doesn't support such usage.  Trap on odd
 751         registers, rather than give a warning.  Keep do_src and do_trap
 752         changes.
 753
 754 Fri Nov 14 11:59:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 755
 756         * d30v-insns (do_trap): Pacify compiler warnings for printf calls.
 757
 758 Tue Nov 11 18:26:03 1997  Michael Meissner  <meissner@cygnus.com>
 759
 760         * d30v-insns (not_r63_reg): Rename from make_even_reg, only check
 761         for register being r63.  Change callers ld2{h,w}, ld4bh{,u}.
 762         (get_reg_not_r63): Rename from get_even_reg, and only check for
 763         register r63.  Change callers st2{w,h}, st4b.
 764         (do_src): Correct register pair for shift left.
 765         (do_trap): Temporarily make trap 30 print out the registers.
 766
 767 Tue Nov  4 08:51:22 1997  Michael Meissner  <meissner@cygnus.com>
 768
 769         * d30v-insns (do_trap): Make trap 31 be used for system calls.
 770         Add primitive write and exit system calls.
 771
 772         * Makefile (FILTER): New make variable to filter out known igen
 773         warnings.
 774         (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter
 775         out warnings that should be ignored by default.
 776
 777 Fri Oct 31 19:36:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 778
 779         * sim-calls.c (sim_open): Change EIT to memory region.
 780
 781 Fri Oct 17 16:51:31 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 782
 783         * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT.
 784         (ALU32_END): Get result from ALU32_OVERFLOW_RESULT.
 785
 786 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 787
 788         * configure: Regenerated to track ../common/aclocal.m4 changes.
 789
 790 Mon Sep 29 15:23:35 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
 791
 792         * d30v-insns (MVFSYS MVTSYS):  Fix bit patterns so that these
 793         instructions get recognised.
 794
 795 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 796
 797         * configure: Regenerated to track ../common/aclocal.m4 changes.
 798
 799 Wed Sep 24 17:51:43 1997  Stu Grossman  <grossman@babylon-5.cygnus.com>
 800
 801         * Makefile.in (SIM_OBJS):  Add sim-break.o.
 802         * (INCLUDE_DEPS):  Add tconfig.h.
 803         * alu.h (MEM STORE):  Change to sim_core_read/write_unaligned to
 804         allow for trapping unaligned accesses.
 805         * cpu.h:  Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint
 806         mechanism.
 807         * d30v-insn (short syscall):  Use syscall 5 for breakpoint insn.
 808         * sim-calls.c (sim_fetch_register sim_store_register):  Implement.
 809         * tconfig.in:  Define SIM_HAVE_BREAKPOINTS to enable intrinsic
 810         breakpoint mechanism.
 811
 812 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 813
 814         * configure: Regenerated to track ../common/aclocal.m4 changes.
 815
 816 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 817
 818         * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN,
 819         SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common.
 820         (SIM_EXTRA_CFLAGS): Update.
 821
 822 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 823
 824         * configure.in: Specify strict alignment.
 825         * configure: Regenerated to track ../common/aclocal.m4 changes.
 826
 827 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 828
 829         * configure: Regenerated to track ../common/aclocal.m4 changes.
 830
 831 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 832
 833         * configure: Regenerated to track ../common/aclocal.m4 changes.
 834
 835 Fri Sep 12 16:13:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 836
 837         * sim-calls.c (sim_open): Change memory to
 838         internal inst. RAM h'00000000-h'0000ffff (64KB)
 839         internal data RAM  h'20000000-h'20007fff (32KB)
 840         external RAM       h'80000000-h'803fffff (4MB)
 841         EIT                h'fffff000-h'ffffffff
 842
 843
 844 Thu Sep 11 08:59:34 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 845
 846         * Makefile.in (SIM_OBJS): Add sim-hrw.o module.
 847
 848         * sim-calls.c (sim_read): Delete. use sim-hrw.
 849         (sim_write): Delete, use sim-hrw.
 850
 851
 852 Tue Sep  9 01:36:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 853
 854         * ic-d30v (imm_5): Update nr args passed to LSMASKED.
 855
 856         * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix,
 857         computing the max sat value incorrectly.
 858
 859 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
 860
 861         * configure: Regenerated to track ../common/aclocal.m4 changes.
 862
 863 Fri Sep  5 09:15:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 864
 865         * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit
 866         type cast instead of SIGNED64 macro.
 867
 868 Thu Sep  4 10:28:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 869
 870         * Makefile.in (SIM_OBJS): Include sim-memopt.o module.
 871
 872         * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach
 873         calls.
 874         (sim_open): If no memory, use memory commands to establish d30v
 875         ram.
 876         (d30v_option_handler): Delete, replased by sim-memopt.c.
 877         (sim_create_inferior): Call sim_module_init.
 878
 879         * sim-main.h (struct sim_state): Remove members eit_ram,
 880         sizeof_eit_ram, external_ram, baseof_external_ram,
 881         sizeof_external_ram. Using generic memory model instead.
 882
 883 Mon Sep  1 11:04:09 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 884
 885         * sim-calls.c (sim_open): Use sim_state_alloc.
 886
 887 Sat Aug 30 10:01:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 888
 889         * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define.
 890
 891         * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS
 892         not -1.
 893
 894 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 895
 896         * configure: Regenerated to track ../common/aclocal.m4 changes.
 897         * config.in: Ditto.
 898
 899 Wed Aug 27 13:41:54 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 900
 901         * sim-calls.c (sim_open): Add call to sim_analyze_program, update
 902         call to sim_config.
 903
 904         * sim-calls.c (sim_create_inferior): Add ABFD argument.
 905         Initialize CPU registers including PC.
 906         (sim_load): Delete, using sim-hload.
 907
 908         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
 909
 910 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 911
 912         * configure: Regenerated to track ../common/aclocal.m4 changes.
 913         * config.in: Ditto.
 914
 915 Mon Aug 25 15:41:44 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 916
 917         * sim-calls.c (sim_open): Add ABFD argument.
 918         (sim_open): Move sim_config call to after sim_parse_args.
 919         (sim_open): Check sim_config return status.
 920
 921 Fri Aug 22 16:38:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 922
 923         * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp.
 924         (do_subh_ppp): Compute rc=rb-src instead of src-rb.
 925         (do_addh_ppp): Ditto.
 926
 927 Fri Jun 27 14:43:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 928
 929         * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was
 930         wrong.  Update handling of PSW[DS] bit.
 931         (dbt): Fix debug trap address.
 932
 933         * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers.
 934
 935 Tue Jun 24 12:41:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 936
 937         * d30v-insns (DBT, RTD): Swap the stack after updating the PSW.
 938         (DBT): Use PSW_SET to update PSW.
 939
 940         * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit.
 941
 942 Tue Jun 24 12:16:14 1997  Andrew Cagney  <cagney@b2.cygnus.com>
 943
 944         * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so
 945         that they are of class %s instead of class function.
 946
 947 Tue Jun 10 12:26:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 948
 949         * sim-main.h (engine_error, engine_restart, engine_halt,
 950         engine_run_until_stop): Delete prototypes.  Functions deleted
 951         earlier.
 952         (do_interrupt_handler): Add prototype.
 953         (sim_state): Add pending_event member to struct.
 954
 955         * sim-calls.c (sim_open): Configure interrupt handler.
 956         * engine.c (d30v_interrupt_event): New function.  Deliver external
 957         interrupt to processor.
 958
 959         * d30v-insns (do_stack_swap): Move function from here.
 960         * engine.c (do_stack_swap): To here.
 961         * sim-main.h (do_stack_swap): Add prototype.
 962
 963         * cpu.h (registers): Change current_sp to an int.
 964         * d30v-insn (do_stack_swap): Update.
 965
 966 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 967
 968         * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of
 969         instruction.
 970         (str_XXX): Fix case of XX == 3 - return "-".
 971
 972 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 973
 974         * engine.c (sim_engine_run): Issuing L->R and R->L instructions in
 975         wrong order.
 976
 977         * d30v-insn (CMPUcc imm long): With of RB field should be 6 not
 978         three.
 979         (MUL, MUL2H, MULHX): X field 01 instead of 10.
 980
 981 Thu Jun  5 12:54:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 982
 983         * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW.
 984         (dbt, rtd): New instructions.
 985
 986         * cpu.h (NR_CONTROL_REGISTERS): Now 15.
 987         (debug_program_status_word_cr, debug_program_counter_cr): Add
 988         debug control registers. Renumber other control registers.
 989         (PSW_DS): New PSW bit.
 990         (DPC, DPSW): Define.
 991
 992 Wed May 28 13:45:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 993
 994         * engine.c (sim_engine_run): Check the event queue on every cycle.
 995
 996         * sim-calls.c (sim_size): Delete.
 997         (sim_do_command): Call sim_args_command.
 998         (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct.
 999         (simulation): Delete global now depend on sd argument.
1000         (sim_open): Initialize sim-watch.
1001         (d30v_option_handler): New function, parse mem-size argument.
1002
1003 Tue May 27 14:03:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1004
1005         * sim-calls.c (sim_set_callbacks): Delete.
1006         (sim_write): Pass NULL cpu arg to sim_core_write_buffer.
1007
1008         * engine.c (engine_init): Delete.  Handled in sim_open.
1009         (engine_create): Ditto.
1010
1011 Tue May 20 10:15:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1012
1013         * sim-calls.c (sim_open): Add callback argument.
1014         (sim_set_callbacks): Delete SIM_DESC argument.
1015
1016 Mon May 19 14:59:32 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1017
1018         * sim-calls.c (sim_open): Set the sim.base magic number.
1019
1020 Fri May 16 15:25:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1021
1022         * d30v-insns: Replace engine_error with common sim_engine_abort.
1023         * cpu.c (is_condition_ok, is_wrong_slot): Ditto.
1024
1025         * engine.c (engine_run_until_stop): Rename this.
1026         (sim_engine_run): To this. Simplify - most moved to common.
1027
1028         * sim-calls.c (sim_stop_reason, sim_resume, sim_stop):
1029         Delete. Replaced by common code.
1030
1031         * engine.c (engine_error, engine_restart, engine_halt): Ditto.
1032
1033         * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK):
1034         Define as NOPs.
1035
1036 Mon May  5 23:05:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1037
1038         * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in
1039         ../common.
1040         * sim-calls.c (sim_open): Ditto.
1041
1042         * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright
1043         notice.
1044
1045 Fri May  2 12:01:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1046
1047         * sim-calls.c (sim-options.h, sim-utils.h): Include.
1048         * Makefile.in (sim-calls.o): Add dependencies.
1049
1050         * d30v-insns (address_word): Remove cia argument from support
1051         functions, igen now does this automatically.
1052
1053         * Makefile.in (tmp-igen): Include line number information in
1054         generated files.
1055
1056         * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to
1057         simulator base type sim_state_base.
1058         (sim-core.h, sim-events.h, sim-io.h): Replace with #include
1059         "sim-base.h".
1060
1061         * sim-main.h (sim_state): Track recomendations in common
1062         directory.
1063         * cpu.h (sim_cpu): Ditto.
1064         * engine.c (do_2_short, do_parallel): Ditto.
1065         * cpu.h (GPR): Ditto.
1066         * alu.h (MEM, IMEM, STORE): Ditto.
1067         * cpu.c (is_wrong_slot): Ditto.
1068         * ic-d30v (Aa, Ab): Ditto.
1069
1070 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1071
1072         * configure: Regenerated to track ../common/aclocal.m4 changes.
1073         * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o.
1074         * sim-calls.c (sim_open): Call sim_module_uninstall if argument
1075         parsing fails.  Call sim_post_argv_init.
1076         (sim_close): Call sim_module_uninstall.
1077
1078 Fri Apr 18 13:44:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1079
1080         * sim-calls.c (sim_stop): New function.
1081
1082 Thu Apr 17 02:57:55 1997  Doug Evans  <dje@canuck.cygnus.com>
1083
1084         * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o.
1085         (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete.
1086         (SIM_RUN_OBJS): Change from run.o to nrun.o.
1087         * cpu.h (sim_cpu): New member base.  Delete members trace, sd.
1088         (cpu_traces): Delete.
1089         * engine.c (engine_init): Set backlink from cpu to state.
1090         * sim-calls.c: #include bfd.h.
1091         (sim_open): Set STATE_OPEN_KIND.  Call sim_pre_argv_init,
1092         sim_parse_args.
1093         (sim_load): Return SIM_RC.  New arg abfd.
1094         Call sim_load_file to load file into simulator.
1095         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1096         (sim_trace): Delete.
1097         * sim-main.h (struct sim_state): sim_state_base is typedef now.
1098         (STATE_CPU): Define.
1099
1100 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1101
1102         * configure: Regenerated to track ../common/aclocal.m4 changes.
1103         * config.in: Ditto.
1104
1105 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1106
1107         * Makefile.in (SIM_EXTRA_DEPS): Define.
1108         (SIM_OBJS): Add sim-utils.o.
1109         (SIM_GEN): Delete tmp-common.
1110         (SIM_EXTRA_CLEAN): Delete clean-common.
1111         (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in.
1112         (tmp-common,clean-common): Delete.
1113         (ENGINE_H): sim-state.h renamed to sim-main.h.
1114         (clean-igen): Delete tmp-insns.
1115
1116         * cpu.c: sim-state.h renamed to sim-main.h.
1117         * engine.c: Likewise.
1118         * sim-calls.c: Likewise.
1119         (zalloc,zfree): Moved to ../common/sim-utils.c.
1120         * sim-main.h: Renamed from sim-state.h.
1121
1122         * sim-calls.c (sim_open): New arg `kind'.
1123
1124         * configure: Regenerated to track ../common/aclocal.m4 changes.
1125
1126 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1127
1128         * configure: Regenerated to track ../common/aclocal.m4 changes.
1129
1130 Wed Apr  2 11:13:15 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1131
1132         * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o
1133
1134         * engine.c (current_target_byte_order, current_host_byte_order,
1135         current_environment, current_alignment, current_floating_point,
1136         current_model_issue, current_stdio): Delete, moved to
1137         ../common/sim-config.c
1138
1139 Mon Mar 24 14:50:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1140
1141         * d30v-insns (do_ldw): Load 4 bytes not 2.
1142         (do_incr, LD*, ST*): Increment register not its value.
1143
1144 Mon Mar 24 09:59:53 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1145
1146         * cpu.c (is_wrong_slot): Ditto.
1147         (is_condition_ok): Ditto.
1148
1149         * sim-calls.c (sim_trace): Ditto.
1150
1151         * engine.c (engine_init): Ditto.
1152         (do_2_short): Ditto.
1153         (engine_run_until_stop): Ditto.
1154
1155         * d30v-insns (void): Update. For functions, remove `SIM_DESC sd'
1156         and `cpu *processor' arguments as igen now handles this.
1157
1158         * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable
1159         processor to cpu.
1160
1161         * sim-state.h: Update.
1162
1163 Fri Mar 21 12:52:12 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1164
1165         * d30v-insns (do_sat): Correct calculation of saturate lower
1166         bound.
1167         (do_sath): Ditto.
1168         (do_satzh, do_satz): Arguments should be signed.
1169
1170         * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for
1171         moment.
1172         (filter_filename): Drop.
1173
1174         * cpu.h (is_wrong_slot): Correct declaration name - was
1175         is_valid_slot.
1176
1177         * engine.c (do_parallel): Plicate GCC.
1178         (engine_error): Ditto.
1179         (engine_run_until_stop): Ditto.
1180         * cpu.c (is_wrong_slot): Ditto.
1181         (is_condition_ok): Ditto.
1182         * sim-calls.c (sim_size): Ditto.
1183         (sim_read): Ditto.
1184         (sim_trace): Ditto.
1185
1186         * engine.h, engine.c (engine_create): Add missing prototype to
1187         header file.  Clean up missing variables.
1188
1189         * configure.in (unistd.h, string.h, strings.h): Configure in.
1190         * configure, config.in: Rebuild.
1191
1192 Thu Mar 20 19:40:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1193
1194         * d30v-insns (void): Provide a second emul instruction using a
1195         branch prefix.
1196
1197 Tue Mar 18 20:51:42 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1198
1199         * d30v-insn (do_sat*): Pass all necessary args.
1200
1201 Tue Mar 18 18:49:10 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1202
1203         * d30v-insns (SAT*): Issue warning when bit overflow.
1204         (EMUL): Exit with GPR[2] not 2.
1205
1206 Tue Mar 18 14:24:09 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1207
1208         * sim-state.h: New file rename engine.h.
1209         (sim_state): Rename engine strut to sim_state, rename events and
1210         core members.
1211
1212         * engine.c: Update.
1213         * cpu.h, cpu.c: Ditto.
1214         * alu.h: Ditto.
1215         * d30v-insns: Ditto.
1216         * sim-calls.c: Ditto.
1217
1218         * Makefile.in (sim-*.c): Moved to ../common.
1219
1220 Tue Mar 18 10:39:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1221
1222         * d30v-insns (do_mac): Adding wrong register.
1223         (do_macs): Ditto.
1224         (do_msub): Ditto.
1225         (do_msubs): Ditto.
1226
1227         * ic-d30v: Put back definitions of RaH, RaL, et.al.
1228         (do_sra2h, do_srah): Use.
1229         (do_srl2h, do_srlh): Use.
1230
1231         * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate.
1232
1233 Tue Mar 18 03:01:25 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1234
1235         * d30v-insns: Specify wild insted of reserved bits.
1236         (void):
1237
1238 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1239
1240         * configure: Re-generate.
1241
1242 Mon Mar 17 14:35:37 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1243
1244         * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_*
1245         options. Allow RESERVED_BITS to be configured.
1246         * configure: Re-generate.
1247
1248         * Makefile.in (sim-*.h): Drop, not needed.
1249         (sim-*.c): Make each explicit so that they automatically update.
1250
1251 Sat Mar 15 02:34:30 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1252
1253         * ic-d30v (imm long): Incorrect calculation.
1254
1255         * d30v-insns (EMUL): Finish exit, write-string emul-call.
1256
1257         * sim-calls.c (sim_trace): Have sim-trace enable basic instruction
1258         tracing.
1259
1260 Sat Mar 15 02:10:31 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1261
1262         * configure.in: Enable common options - endian, inline and
1263         warnings.
1264         * configure: Regenerate.
1265
1266 Fri Mar 14 16:11:50 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1267
1268         * Makefile.in (cpu.o): Update dependencies.
1269         * cpu.c (is_condition_ok): Update PSW bit manipulations.
1270
1271 Fri Mar 14 12:49:20 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1272
1273         * configure.in: Autoconfig m4
1274         * configure: Regenerate.
1275
1276         * Makefile.in: Use m4 to preprocess d30v-insns.
1277         * d30v-insn: Adjust.
1278
1279 Thu Mar 13 12:44:54 1997  Doug Evans  <dje@canuck.cygnus.com>
1280
1281         * sim-calls.c (sim_open): New SIM_DESC result.  Argument is now
1282         in argv form.
1283         (other sim_*): New SIM_DESC argument.
1284
1285 Wed Mar 12 19:05:45 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1286
1287         * sim-calls.c (sim_open): Create all the d30v RAM blocks.
1288
1289         * engine.c (engine_run_until_stop): Handle delayed subroutine
1290         call.
1291         * d30v-insn: Ditto.
1292
1293         * ic-d30v: For Rb and Rc always return the value and not the
1294         equation.
1295         * d30v-insn: Use.
1296
1297         * ic-d30v (val_Ra): Returns 0 or RA.
1298         * d30v-insn: Use.
1299
1300         * d30v-insn (make_even_reg, get_even_reg): New functions. Force
1301         the register index to be even, issusing a warning if it was not.
1302         (LD*, ST*): Use.
1303
1304 Wed Mar 12 14:57:26 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1305
1306         * d30v-insns (do_trap): Implement TRAP instruction.
1307
1308         * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag
1309         onto PSW bit.
1310         * ic-d30v: Drop F* expressions.
1311         * d30v-insn: Use more explicit PSW_FLAG_ ops.
1312         * cpu.h (PSW_*): Redo PSW bit values.
1313         * alu.h (ALU*_END): Update. Fix setting of overflow - logic was
1314         backwards.
1315
1316         * d30v-insn (MVFSYS, MVTSYS): Implement.
1317         * cpu.h (PSWH, PSWL): New macros for high, low word of PSW.
1318
1319 Wed Mar 12 14:12:11 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1320
1321         * cpu.h (RPT_IS_CALL): New macro for processor field
1322         is_delayed_call.  That in turn used as a flag to indicate if a
1323         delayed branch or delayed call is to occure.
1324         * d30v-insns (do_dbra): Set/clear RPT_IS_CALL;
1325         (do_dbrai): Ditto.
1326         (do_dbsr): Ditto.
1327         (do_dbsr): Ditto.
1328         (do_djmp): Ditto.
1329         (do_djmpi): Dotto.
1330         (do_djsr): Ditto.
1331         (do_djsri): Ditto.
1332         (void):
1333
1334         * d30v-insn (do_incr): Finish - handle modulo registers.
1335
1336         * d30v-insns (CMPU): Include all possible compare
1337         operations. Issue a warning where op defined by the processor
1338         spec.
1339
1340 Wed Mar 12 13:55:55 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1341
1342         * d30v-insns: Add a new instruction class _EMUL and a new
1343         instruction EMUL that emulates a few basic IO operations.
1344
1345         * Makefile.in (tmp-igen): Filter in emul instructions.
1346
1347 Fri Mar  7 20:32:13 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1348
1349         * d30v-insns (void): Fill in the gaps.
1350
1351 Wed Feb 26 09:31:10 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
1352
1353         * Makefile.in (tmp-igen): Include ic-d30v in dependencies.
1354
1355         * ic-d30v (cache): Update to use H_word, L_word added to
1356         sim-endian.h.
1357
1358 Tue Feb 25 15:26:51 1997  Andrew Cagney  <cagney@kremvax.tpgi.com.au>
1359
1360         * Makefile.in (tmp-igen): Correctly run $(MAKE).
1361
1362 Thu Feb 20 20:30:31 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1363
1364         * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated
1365         files dependant on tmp-igen. Define ENGINE_H.
1366
1367 Sun Feb 16 16:42:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1368
1369         * configure.in: New file - follow Doug Evans instructions.
1370         * Makefile.in: Ditto.
1371