* interf.c (sim_open): Undo patch to add -E support.
[deliverable/binutils-gdb.git] / sim / erc32 / interf.c
1 /*
2 * This file is part of SIS.
3 *
4 * SIS, SPARC instruction simulator V1.6 Copyright (C) 1995 Jiri Gaisler,
5 * European Space Agency
6 *
7 * This program is free software; you can redistribute it and/or modify it under
8 * the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
10 * any later version.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 675
19 * Mass Ave, Cambridge, MA 02139, USA.
20 *
21 */
22
23 #include <signal.h>
24 #include <string.h>
25 #include <stdio.h>
26 #include <sys/fcntl.h>
27 #include "sis.h"
28 #include "bfd.h"
29 #include <dis-asm.h>
30
31 #include "remote-sim.h"
32
33 #ifndef fprintf
34 extern fprintf();
35 #endif
36
37 #define VAL(x) strtol(x,(char *)NULL,0)
38
39 extern char **buildargv(char *input);
40
41 extern struct disassemble_info dinfo;
42 extern struct pstate sregs;
43 extern struct estate ebase;
44
45 extern int ctrl_c;
46 extern int nfp;
47 extern int ift;
48 extern int rom8;
49 extern int wrp;
50 extern int sis_verbose;
51 extern char *sis_version;
52 extern struct estate ebase;
53 extern struct evcell evbuf[];
54 extern struct irqcell irqarr[];
55 extern int irqpend, ext_irl;
56 extern int sparclite;
57 extern int termsave;
58 extern char uart_dev1[], uart_dev2[];
59
60 int sis_gdb_break = 1;
61
62 host_callback *sim_callback;
63
64 run_sim(sregs, go, icount, dis)
65 struct pstate *sregs;
66 int go;
67 unsigned int icount;
68 int dis;
69 {
70 int mexc, ws;
71
72 if (sis_verbose)
73 (*sim_callback->printf_filtered) (sim_callback, "resuming at %x\n",
74 sregs->pc);
75 init_stdio();
76 sregs->starttime = time(NULL);
77 while ((!sregs->err_mode & (go || (icount > 0))) &&
78 ((sregs->bptnum == 0) || !(sregs->bphit = check_bpt(sregs)))) {
79
80 sregs->fhold = 0;
81 sregs->hold = 0;
82 sregs->icnt = 0;
83
84 check_interrupts(sregs);
85 if (sregs->trap) {
86 sregs->err_mode = execute_trap(sregs);
87 } else {
88 if (sregs->psr & 0x080)
89 sregs->asi = 8;
90 else
91 sregs->asi = 9;
92
93 mexc = memory_read(sregs->asi, sregs->pc, &sregs->inst, &sregs->hold);
94 if (sregs->annul) {
95 sregs->annul = 0;
96 sregs->icnt = 1;
97 sregs->pc = sregs->npc;
98 sregs->npc = sregs->npc + 4;
99 } else {
100 if (mexc) {
101 sregs->trap = I_ACC_EXC;
102 } else {
103 if (sregs->histlen) {
104 sregs->histbuf[sregs->histind].addr = sregs->pc;
105 sregs->histbuf[sregs->histind].time = ebase.simtime;
106 sregs->histind++;
107 if (sregs->histind >= sregs->histlen)
108 sregs->histind = 0;
109 }
110 if (dis) {
111 printf(" %8d ", ebase.simtime);
112 dis_mem(sregs->pc, 1, &dinfo);
113 }
114 if ((sis_gdb_break) && (sregs->inst == 0x91d02001)) {
115 if (sis_verbose)
116 (*sim_callback->printf_filtered) (sim_callback,
117 "SW BP hit at %x\n", sregs->pc);
118 sim_stop();
119 restore_stdio();
120 clearerr(stdin);
121 return (BPT_HIT);
122 } else
123 dispatch_instruction(sregs);
124 }
125 icount--;
126 }
127 if (sregs->trap) {
128 sregs->err_mode = execute_trap(sregs);
129 }
130 }
131 advance_time(sregs);
132 if (ctrl_c) {
133 go = icount = 0;
134 }
135 }
136 sim_stop();
137 sregs->tottime += time(NULL) - sregs->starttime;
138 restore_stdio();
139 clearerr(stdin);
140 if (sregs->err_mode)
141 error_mode(sregs->pc);
142 if (sregs->err_mode)
143 return (ERROR);
144 if (sregs->bphit) {
145 if (sis_verbose)
146 (*sim_callback->printf_filtered) (sim_callback,
147 "HW BP hit at %x\n", sregs->pc);
148 return (BPT_HIT);
149 }
150 if (ctrl_c) {
151 ctrl_c = 0;
152 return (CTRL_C);
153 }
154 return (TIME_OUT);
155 }
156
157 void
158 sim_set_callbacks (sd, ptr)
159 SIM_DESC sd;
160 host_callback *ptr;
161 {
162 sim_callback = ptr;
163 }
164
165 void
166 sim_size (memsize)
167 int memsize;
168 {
169 }
170
171 SIM_DESC
172 sim_open(kind, argv)
173 SIM_OPEN_KIND kind;
174 char **argv;
175 {
176
177 int argc = 0;
178 int cont = 1;
179 int stat = 1;
180 int grdl = 0;
181 int freq = 15;
182
183 (*sim_callback->printf_filtered) (sim_callback, "\n SIS - SPARC instruction simulator %s\n", sis_version);
184 (*sim_callback->printf_filtered) (sim_callback, " Bug-reports to Jiri Gaisler ESA/ESTEC (jgais@wd.estec.esa.nl)\n");
185 while (argv[argc])
186 argc++;
187 while (stat < argc) {
188 if (argv[stat][0] == '-') {
189 if (strcmp(argv[stat], "-v") == 0) {
190 sis_verbose = 1;
191 } else
192 if (strcmp(argv[stat], "-nfp") == 0) {
193 (*sim_callback->printf_filtered) (sim_callback, "no FPU\n");
194 nfp = 1;
195 } else
196 if (strcmp(argv[stat], "-ift") == 0) {
197 ift = 1;
198 } else
199 if (strcmp(argv[stat], "-sparclite") == 0) {
200 (*sim_callback->printf_filtered) (sim_callback, "simulating Sparclite\n");
201 sparclite = 1;
202 } else
203 if (strcmp(argv[stat], "-wrp") == 0) {
204 wrp = 1;
205 } else
206 if (strcmp(argv[stat], "-rom8") == 0) {
207 rom8 = 1;
208 } else
209 if (strcmp(argv[stat], "-uart1") == 0) {
210 if ((stat + 1) < argc)
211 strcpy(uart_dev1, argv[++stat]);
212 } else
213 if (strcmp(argv[stat], "-uart2") == 0) {
214 if ((stat + 1) < argc)
215 strcpy(uart_dev2, argv[++stat]);
216 } else
217 if (strcmp(argv[stat], "-nogdb") == 0) {
218 (*sim_callback->printf_filtered) (sim_callback, "disabling GDB trap handling for breakpoints\n");
219 sis_gdb_break = 0;
220 } else
221 if (strcmp(argv[stat], "-freq") == 0)
222 if ((stat + 1) < argc) {
223 freq = VAL(argv[++stat]);
224 (*sim_callback->printf_filtered) (sim_callback, " ERC32 freq %d Mhz\n", freq);
225 }
226 } else
227 bfd_load(argv[stat]);
228 stat++;
229 }
230 sregs.freq = freq;
231 termsave = fcntl(0, F_GETFL, 0);
232 INIT_DISASSEMBLE_INFO(dinfo, stdout,(fprintf_ftype)fprintf);
233 dinfo.endian = BFD_ENDIAN_BIG;
234 init_signals();
235 reset_all();
236 ebase.simtime = 0;
237 init_sim();
238 init_bpt(&sregs);
239 reset_stat(&sregs);
240
241 /* Fudge our descriptor for now. */
242 return (SIM_DESC) 1;
243 }
244
245 void
246 sim_close(sd, quitting)
247 SIM_DESC sd;
248 int quitting;
249 {
250
251 exit_sim();
252 fcntl(0, F_SETFL, termsave);
253
254 };
255
256 /* For communication from sim_load to sim_create_inferior. */
257 static bfd_vma start_address;
258
259 SIM_RC
260 sim_load(sd, prog, abfd, from_tty)
261 SIM_DESC sd;
262 char *prog;
263 bfd *abfd;
264 int from_tty;
265 {
266 start_address = bfd_load (prog);
267 return (0);
268 }
269
270 SIM_RC
271 sim_create_inferior(sd, argv, env)
272 SIM_DESC sd;
273 char **argv;
274 char **env;
275 {
276 ebase.simtime = 0;
277 reset_all();
278 reset_stat(&sregs);
279 sregs.pc = start_address & ~3;
280 sregs.npc = sregs.pc + 4;
281 return SIM_RC_OK;
282 }
283
284 void
285 sim_store_register(sd, regno, value)
286 SIM_DESC sd;
287 int regno;
288 unsigned char *value;
289 {
290 /* FIXME: Review the computation of regval. */
291 int regval = (value[0] << 24) | (value[1] << 16) | (value[2] << 8) | value[3];
292 set_regi(&sregs, regno, regval);
293 }
294
295
296 void
297 sim_fetch_register(sd, regno, buf)
298 SIM_DESC sd;
299 int regno;
300 unsigned char *buf;
301 {
302 get_regi(&sregs, regno, buf);
303 }
304
305 int
306 sim_write(sd, mem, buf, length)
307 SIM_DESC sd;
308 SIM_ADDR mem;
309 unsigned char *buf;
310 int length;
311 {
312 return (sis_memory_write(mem, buf, length));
313 }
314
315 int
316 sim_read(sd, mem, buf, length)
317 SIM_DESC sd;
318 SIM_ADDR mem;
319 unsigned char *buf;
320 int length;
321 {
322 return (sis_memory_read(mem, buf, length));
323 }
324
325 void
326 sim_info(sd, verbose)
327 SIM_DESC sd;
328 int verbose;
329 {
330 show_stat(&sregs);
331 }
332
333 int simstat = OK;
334
335 void
336 sim_stop_reason(sd, reason, sigrc)
337 SIM_DESC sd;
338 enum sim_stop * reason;
339 int *sigrc;
340 {
341
342 switch (simstat) {
343 case CTRL_C:
344 *reason = sim_stopped;
345 *sigrc = SIGINT;
346 break;
347 case OK:
348 case TIME_OUT:
349 case BPT_HIT:
350 *reason = sim_stopped;
351 #ifdef _WIN32
352 #define SIGTRAP 5
353 #endif
354 *sigrc = SIGTRAP;
355 break;
356 case ERROR:
357 *sigrc = 0;
358 *reason = sim_exited;
359 }
360 ctrl_c = 0;
361 simstat = OK;
362 }
363
364 /* Flush all register windows out to the stack. Starting after the invalid
365 window, flush all windows up to, and including the current window. This
366 allows GDB to do backtraces and look at local variables for frames that
367 are still in the register windows. Note that strictly speaking, this
368 behavior is *wrong* for several reasons. First, it doesn't use the window
369 overflow handlers. It therefore assumes standard frame layouts and window
370 handling policies. Second, it changes system state behind the back of the
371 target program. I expect this to mainly pose problems when debugging trap
372 handlers.
373 */
374
375 #define PSR_CWP 0x7
376
377 static void
378 flush_windows ()
379 {
380 int invwin;
381 int cwp;
382 int win;
383 int ws;
384
385 /* Keep current window handy */
386
387 cwp = sregs.psr & PSR_CWP;
388
389 /* Calculate the invalid window from the wim. */
390
391 for (invwin = 0; invwin <= PSR_CWP; invwin++)
392 if ((sregs.wim >> invwin) & 1)
393 break;
394
395 /* Start saving with the window after the invalid window. */
396
397 invwin = (invwin - 1) & PSR_CWP;
398
399 for (win = invwin; ; win = (win - 1) & PSR_CWP)
400 {
401 uint32 sp;
402 int i;
403
404 sp = sregs.r[(win * 16 + 14) & 0x7f];
405
406 for (i = 0; i < 16; i++)
407 memory_write (11, sp + 4 * i, &sregs.r[(win * 16 + 16 + i) & 0x7f], 2,
408 &ws);
409
410 if (win == cwp)
411 break;
412 }
413 }
414
415 void
416 sim_resume(SIM_DESC sd, int step, int siggnal)
417 {
418 simstat = run_sim(&sregs, 1, 0, 0);
419
420 if (sis_gdb_break) flush_windows ();
421 }
422
423 int
424 sim_trace (sd)
425 SIM_DESC sd;
426 {
427 /* FIXME: unfinished */
428 sim_resume (sd, 0, 0);
429 return 1;
430 }
431
432 void
433 sim_kill(SIM_DESC sd)
434 {
435 }
436
437 void
438 sim_do_command(sd, cmd)
439 SIM_DESC sd;
440 char *cmd;
441 {
442 exec_cmd(&sregs, cmd);
443 }
444
445 #if 0 /* FIXME: These shouldn't exist. */
446
447 int
448 sim_insert_breakpoint(int addr)
449 {
450 if (sregs.bptnum < BPT_MAX) {
451 sregs.bpts[sregs.bptnum] = addr & ~0x3;
452 sregs.bptnum++;
453 if (sis_verbose)
454 (*sim_callback->printf_filtered) (sim_callback, "inserted HW BP at %x\n", addr);
455 return 0;
456 } else
457 return 1;
458 }
459
460 int
461 sim_remove_breakpoint(int addr)
462 {
463 int i = 0;
464
465 while ((i < sregs.bptnum) && (sregs.bpts[i] != addr))
466 i++;
467 if (addr == sregs.bpts[i]) {
468 for (; i < sregs.bptnum - 1; i++)
469 sregs.bpts[i] = sregs.bpts[i + 1];
470 sregs.bptnum -= 1;
471 if (sis_verbose)
472 (*sim_callback->printf_filtered) (sim_callback, "removed HW BP at %x\n", addr);
473 return 0;
474 }
475 return 1;
476 }
477
478 #endif
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