sim/fr30/cpu.h

   1 /* CPU family header for fr30bf.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifndef CPU_FR30BF_H
  26 #define CPU_FR30BF_H
  27
  28 /* Maximum number of instructions that are fetched at a time.
  29    This is for LIW type instructions sets (e.g. m32r).  */
  30 #define MAX_LIW_INSNS 1
  31
  32 /* Maximum number of instructions that can be executed in parallel.  */
  33 #define MAX_PARALLEL_INSNS 1
  34
  35 /* CPU state information.  */
  36 typedef struct {
  37   /* Hardware elements.  */
  38   struct {
  39   /* program counter */
  40   USI h_pc;
  41 #define GET_H_PC() CPU (h_pc)
  42 #define SET_H_PC(x) (CPU (h_pc) = (x))
  43   /* general registers */
  44   SI h_gr[16];
  45 #define GET_H_GR(a1) CPU (h_gr)[a1]
  46 #define SET_H_GR(a1, x) (CPU (h_gr)[a1] = (x))
  47   /* coprocessor registers */
  48   SI h_cr[16];
  49 #define GET_H_CR(a1) CPU (h_cr)[a1]
  50 #define SET_H_CR(a1, x) (CPU (h_cr)[a1] = (x))
  51   /* dedicated registers */
  52   SI h_dr[6];
  53 /* GET_H_DR macro user-written */
  54 /* SET_H_DR macro user-written */
  55   /* program status */
  56   USI h_ps;
  57 /* GET_H_PS macro user-written */
  58 /* SET_H_PS macro user-written */
  59   /* General Register 13 explicitely required */
  60   SI h_r13;
  61 #define GET_H_R13() CPU (h_r13)
  62 #define SET_H_R13(x) (CPU (h_r13) = (x))
  63   /* General Register 14 explicitely required */
  64   SI h_r14;
  65 #define GET_H_R14() CPU (h_r14)
  66 #define SET_H_R14(x) (CPU (h_r14) = (x))
  67   /* General Register 15 explicitely required */
  68   SI h_r15;
  69 #define GET_H_R15() CPU (h_r15)
  70 #define SET_H_R15(x) (CPU (h_r15) = (x))
  71   /* negative         bit */
  72   BI h_nbit;
  73 #define GET_H_NBIT() CPU (h_nbit)
  74 #define SET_H_NBIT(x) (CPU (h_nbit) = (x))
  75   /* zero             bit */
  76   BI h_zbit;
  77 #define GET_H_ZBIT() CPU (h_zbit)
  78 #define SET_H_ZBIT(x) (CPU (h_zbit) = (x))
  79   /* overflow         bit */
  80   BI h_vbit;
  81 #define GET_H_VBIT() CPU (h_vbit)
  82 #define SET_H_VBIT(x) (CPU (h_vbit) = (x))
  83   /* carry            bit */
  84   BI h_cbit;
  85 #define GET_H_CBIT() CPU (h_cbit)
  86 #define SET_H_CBIT(x) (CPU (h_cbit) = (x))
  87   /* interrupt enable bit */
  88   BI h_ibit;
  89 #define GET_H_IBIT() CPU (h_ibit)
  90 #define SET_H_IBIT(x) (CPU (h_ibit) = (x))
  91   /* stack            bit */
  92   BI h_sbit;
  93 /* GET_H_SBIT macro user-written */
  94 /* SET_H_SBIT macro user-written */
  95   /* trace trap       bit */
  96   BI h_tbit;
  97 #define GET_H_TBIT() CPU (h_tbit)
  98 #define SET_H_TBIT(x) (CPU (h_tbit) = (x))
  99   /* division 0       bit */
 100   BI h_d0bit;
 101 #define GET_H_D0BIT() CPU (h_d0bit)
 102 #define SET_H_D0BIT(x) (CPU (h_d0bit) = (x))
 103   /* division 1       bit */
 104   BI h_d1bit;
 105 #define GET_H_D1BIT() CPU (h_d1bit)
 106 #define SET_H_D1BIT(x) (CPU (h_d1bit) = (x))
 107   /* condition code   bits */
 108   UQI h_ccr;
 109 /* GET_H_CCR macro user-written */
 110 /* SET_H_CCR macro user-written */
 111   /* system condition bits */
 112   UQI h_scr;
 113 /* GET_H_SCR macro user-written */
 114 /* SET_H_SCR macro user-written */
 115   /* interrupt level  mask */
 116   UQI h_ilm;
 117 /* GET_H_ILM macro user-written */
 118 /* SET_H_ILM macro user-written */
 119   } hardware;
 120 #define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
 121 } FR30BF_CPU_DATA;
 122
 123 /* Cover fns for register access.  */
 124 USI fr30bf_h_pc_get (SIM_CPU *);
 125 void fr30bf_h_pc_set (SIM_CPU *, USI);
 126 SI fr30bf_h_gr_get (SIM_CPU *, UINT);
 127 void fr30bf_h_gr_set (SIM_CPU *, UINT, SI);
 128 SI fr30bf_h_cr_get (SIM_CPU *, UINT);
 129 void fr30bf_h_cr_set (SIM_CPU *, UINT, SI);
 130 SI fr30bf_h_dr_get (SIM_CPU *, UINT);
 131 void fr30bf_h_dr_set (SIM_CPU *, UINT, SI);
 132 USI fr30bf_h_ps_get (SIM_CPU *);
 133 void fr30bf_h_ps_set (SIM_CPU *, USI);
 134 SI fr30bf_h_r13_get (SIM_CPU *);
 135 void fr30bf_h_r13_set (SIM_CPU *, SI);
 136 SI fr30bf_h_r14_get (SIM_CPU *);
 137 void fr30bf_h_r14_set (SIM_CPU *, SI);
 138 SI fr30bf_h_r15_get (SIM_CPU *);
 139 void fr30bf_h_r15_set (SIM_CPU *, SI);
 140 BI fr30bf_h_nbit_get (SIM_CPU *);
 141 void fr30bf_h_nbit_set (SIM_CPU *, BI);
 142 BI fr30bf_h_zbit_get (SIM_CPU *);
 143 void fr30bf_h_zbit_set (SIM_CPU *, BI);
 144 BI fr30bf_h_vbit_get (SIM_CPU *);
 145 void fr30bf_h_vbit_set (SIM_CPU *, BI);
 146 BI fr30bf_h_cbit_get (SIM_CPU *);
 147 void fr30bf_h_cbit_set (SIM_CPU *, BI);
 148 BI fr30bf_h_ibit_get (SIM_CPU *);
 149 void fr30bf_h_ibit_set (SIM_CPU *, BI);
 150 BI fr30bf_h_sbit_get (SIM_CPU *);
 151 void fr30bf_h_sbit_set (SIM_CPU *, BI);
 152 BI fr30bf_h_tbit_get (SIM_CPU *);
 153 void fr30bf_h_tbit_set (SIM_CPU *, BI);
 154 BI fr30bf_h_d0bit_get (SIM_CPU *);
 155 void fr30bf_h_d0bit_set (SIM_CPU *, BI);
 156 BI fr30bf_h_d1bit_get (SIM_CPU *);
 157 void fr30bf_h_d1bit_set (SIM_CPU *, BI);
 158 UQI fr30bf_h_ccr_get (SIM_CPU *);
 159 void fr30bf_h_ccr_set (SIM_CPU *, UQI);
 160 UQI fr30bf_h_scr_get (SIM_CPU *);
 161 void fr30bf_h_scr_set (SIM_CPU *, UQI);
 162 UQI fr30bf_h_ilm_get (SIM_CPU *);
 163 void fr30bf_h_ilm_set (SIM_CPU *, UQI);
 164
 165 /* These must be hand-written.  */
 166 extern CPUREG_FETCH_FN fr30bf_fetch_register;
 167 extern CPUREG_STORE_FN fr30bf_store_register;
 168
 169 typedef struct {
 170   UINT load_regs;
 171   UINT load_regs_pending;
 172 } MODEL_FR30_1_DATA;
 173
 174 union sem_fields {
 175     struct { /* empty sformat for unspecified field list */
 176       int empty;
 177     } fmt_empty;
 178     struct { /* e.g. add $Rj,$Ri */
 179       SI * i_Ri;
 180       SI * i_Rj;
 181       unsigned char in_Ri;
 182       unsigned char in_Rj;
 183       unsigned char out_Ri;
 184     } fmt_add;
 185     struct { /* e.g. add $u4,$Ri */
 186       UINT f_u4;
 187       SI * i_Ri;
 188       unsigned char in_Ri;
 189       unsigned char out_Ri;
 190     } fmt_addi;
 191     struct { /* e.g. add2 $m4,$Ri */
 192       SI f_m4;
 193       SI * i_Ri;
 194       unsigned char in_Ri;
 195       unsigned char out_Ri;
 196     } fmt_add2;
 197     struct { /* e.g. addc $Rj,$Ri */
 198       SI * i_Ri;
 199       SI * i_Rj;
 200       unsigned char in_Ri;
 201       unsigned char in_Rj;
 202       unsigned char out_Ri;
 203     } fmt_addc;
 204     struct { /* e.g. addn $Rj,$Ri */
 205       SI * i_Ri;
 206       SI * i_Rj;
 207       unsigned char in_Ri;
 208       unsigned char in_Rj;
 209       unsigned char out_Ri;
 210     } fmt_addn;
 211     struct { /* e.g. addn $u4,$Ri */
 212       UINT f_u4;
 213       SI * i_Ri;
 214       unsigned char in_Ri;
 215       unsigned char out_Ri;
 216     } fmt_addni;
 217     struct { /* e.g. addn2 $m4,$Ri */
 218       SI f_m4;
 219       SI * i_Ri;
 220       unsigned char in_Ri;
 221       unsigned char out_Ri;
 222     } fmt_addn2;
 223     struct { /* e.g. cmp $Rj,$Ri */
 224       SI * i_Ri;
 225       SI * i_Rj;
 226       unsigned char in_Ri;
 227       unsigned char in_Rj;
 228     } fmt_cmp;
 229     struct { /* e.g. cmp $u4,$Ri */
 230       UINT f_u4;
 231       SI * i_Ri;
 232       unsigned char in_Ri;
 233     } fmt_cmpi;
 234     struct { /* e.g. cmp2 $m4,$Ri */
 235       SI f_m4;
 236       SI * i_Ri;
 237       unsigned char in_Ri;
 238     } fmt_cmp2;
 239     struct { /* e.g. and $Rj,$Ri */
 240       SI * i_Ri;
 241       SI * i_Rj;
 242       unsigned char in_Ri;
 243       unsigned char in_Rj;
 244       unsigned char out_Ri;
 245     } fmt_and;
 246     struct { /* e.g. and $Rj,@$Ri */
 247       SI * i_Ri;
 248       SI * i_Rj;
 249       unsigned char in_Ri;
 250       unsigned char in_Rj;
 251     } fmt_andm;
 252     struct { /* e.g. andh $Rj,@$Ri */
 253       SI * i_Ri;
 254       SI * i_Rj;
 255       unsigned char in_Ri;
 256       unsigned char in_Rj;
 257     } fmt_andh;
 258     struct { /* e.g. andb $Rj,@$Ri */
 259       SI * i_Ri;
 260       SI * i_Rj;
 261       unsigned char in_Ri;
 262       unsigned char in_Rj;
 263     } fmt_andb;
 264     struct { /* e.g. bandl $u4,@$Ri */
 265       UINT f_u4;
 266       SI * i_Ri;
 267       unsigned char in_Ri;
 268     } fmt_bandl;
 269     struct { /* e.g. btstl $u4,@$Ri */
 270       UINT f_u4;
 271       SI * i_Ri;
 272       unsigned char in_Ri;
 273     } fmt_btstl;
 274     struct { /* e.g. mul $Rj,$Ri */
 275       SI * i_Ri;
 276       SI * i_Rj;
 277       unsigned char in_Ri;
 278       unsigned char in_Rj;
 279     } fmt_mul;
 280     struct { /* e.g. mulu $Rj,$Ri */
 281       SI * i_Ri;
 282       SI * i_Rj;
 283       unsigned char in_Ri;
 284       unsigned char in_Rj;
 285     } fmt_mulu;
 286     struct { /* e.g. mulh $Rj,$Ri */
 287       SI * i_Ri;
 288       SI * i_Rj;
 289       unsigned char in_Ri;
 290       unsigned char in_Rj;
 291     } fmt_mulh;
 292     struct { /* e.g. div0s $Ri */
 293       SI * i_Ri;
 294       unsigned char in_Ri;
 295     } fmt_div0s;
 296     struct { /* e.g. div0u $Ri */
 297       int empty;
 298     } fmt_div0u;
 299     struct { /* e.g. div1 $Ri */
 300       SI * i_Ri;
 301       unsigned char in_Ri;
 302     } fmt_div1;
 303     struct { /* e.g. div2 $Ri */
 304       SI * i_Ri;
 305       unsigned char in_Ri;
 306     } fmt_div2;
 307     struct { /* e.g. div3 */
 308       int empty;
 309     } fmt_div3;
 310     struct { /* e.g. div4s */
 311       int empty;
 312     } fmt_div4s;
 313     struct { /* e.g. lsl $Rj,$Ri */
 314       SI * i_Ri;
 315       SI * i_Rj;
 316       unsigned char in_Ri;
 317       unsigned char in_Rj;
 318       unsigned char out_Ri;
 319     } fmt_lsl;
 320     struct { /* e.g. lsl $u4,$Ri */
 321       UINT f_u4;
 322       SI * i_Ri;
 323       unsigned char in_Ri;
 324       unsigned char out_Ri;
 325     } fmt_lsli;
 326     struct { /* e.g. ldi:8 $i8,$Ri */
 327       UINT f_i8;
 328       SI * i_Ri;
 329       unsigned char out_Ri;
 330     } fmt_ldi8;
 331     struct { /* e.g. ldi:20 $i20,$Ri */
 332       UINT f_i20;
 333       SI * i_Ri;
 334       unsigned char out_Ri;
 335     } fmt_ldi20;
 336     struct { /* e.g. ldi:32 $i32,$Ri */
 337       UINT f_i32;
 338       SI * i_Ri;
 339       unsigned char out_Ri;
 340     } fmt_ldi32;
 341     struct { /* e.g. ld @$Rj,$Ri */
 342       SI * i_Rj;
 343       SI * i_Ri;
 344       unsigned char in_Rj;
 345       unsigned char out_Ri;
 346     } fmt_ld;
 347     struct { /* e.g. lduh @$Rj,$Ri */
 348       SI * i_Rj;
 349       SI * i_Ri;
 350       unsigned char in_Rj;
 351       unsigned char out_Ri;
 352     } fmt_lduh;
 353     struct { /* e.g. ldub @$Rj,$Ri */
 354       SI * i_Rj;
 355       SI * i_Ri;
 356       unsigned char in_Rj;
 357       unsigned char out_Ri;
 358     } fmt_ldub;
 359     struct { /* e.g. ld @($R13,$Rj),$Ri */
 360       SI * i_Rj;
 361       SI * i_Ri;
 362       unsigned char in_Rj;
 363       unsigned char in_h_gr_13;
 364       unsigned char out_Ri;
 365     } fmt_ldr13;
 366     struct { /* e.g. lduh @($R13,$Rj),$Ri */
 367       SI * i_Rj;
 368       SI * i_Ri;
 369       unsigned char in_Rj;
 370       unsigned char in_h_gr_13;
 371       unsigned char out_Ri;
 372     } fmt_ldr13uh;
 373     struct { /* e.g. ldub @($R13,$Rj),$Ri */
 374       SI * i_Rj;
 375       SI * i_Ri;
 376       unsigned char in_Rj;
 377       unsigned char in_h_gr_13;
 378       unsigned char out_Ri;
 379     } fmt_ldr13ub;
 380     struct { /* e.g. ld @($R14,$disp10),$Ri */
 381       SI f_disp10;
 382       SI * i_Ri;
 383       unsigned char in_h_gr_14;
 384       unsigned char out_Ri;
 385     } fmt_ldr14;
 386     struct { /* e.g. lduh @($R14,$disp9),$Ri */
 387       SI f_disp9;
 388       SI * i_Ri;
 389       unsigned char in_h_gr_14;
 390       unsigned char out_Ri;
 391     } fmt_ldr14uh;
 392     struct { /* e.g. ldub @($R14,$disp8),$Ri */
 393       INT f_disp8;
 394       SI * i_Ri;
 395       unsigned char in_h_gr_14;
 396       unsigned char out_Ri;
 397     } fmt_ldr14ub;
 398     struct { /* e.g. ld @($R15,$udisp6),$Ri */
 399       USI f_udisp6;
 400       SI * i_Ri;
 401       unsigned char in_h_gr_15;
 402       unsigned char out_Ri;
 403     } fmt_ldr15;
 404     struct { /* e.g. ld @$R15+,$Ri */
 405       UINT f_Ri;
 406       SI * i_Ri;
 407       unsigned char in_h_gr_15;
 408       unsigned char out_Ri;
 409       unsigned char out_h_gr_15;
 410     } fmt_ldr15gr;
 411     struct { /* e.g. ld @$R15+,$Rs2 */
 412       UINT f_Rs2;
 413       unsigned char in_h_gr_15;
 414       unsigned char out_h_gr_15;
 415     } fmt_ldr15dr;
 416     struct { /* e.g. ld @$R15+,$ps */
 417       int empty;
 418       unsigned char in_h_gr_15;
 419       unsigned char out_h_gr_15;
 420     } fmt_ldr15ps;
 421     struct { /* e.g. st $Ri,@$Rj */
 422       SI * i_Ri;
 423       SI * i_Rj;
 424       unsigned char in_Ri;
 425       unsigned char in_Rj;
 426     } fmt_st;
 427     struct { /* e.g. sth $Ri,@$Rj */
 428       SI * i_Ri;
 429       SI * i_Rj;
 430       unsigned char in_Ri;
 431       unsigned char in_Rj;
 432     } fmt_sth;
 433     struct { /* e.g. stb $Ri,@$Rj */
 434       SI * i_Ri;
 435       SI * i_Rj;
 436       unsigned char in_Ri;
 437       unsigned char in_Rj;
 438     } fmt_stb;
 439     struct { /* e.g. st $Ri,@($R13,$Rj) */
 440       SI * i_Ri;
 441       SI * i_Rj;
 442       unsigned char in_Ri;
 443       unsigned char in_Rj;
 444       unsigned char in_h_gr_13;
 445     } fmt_str13;
 446     struct { /* e.g. sth $Ri,@($R13,$Rj) */
 447       SI * i_Ri;
 448       SI * i_Rj;
 449       unsigned char in_Ri;
 450       unsigned char in_Rj;
 451       unsigned char in_h_gr_13;
 452     } fmt_str13h;
 453     struct { /* e.g. stb $Ri,@($R13,$Rj) */
 454       SI * i_Ri;
 455       SI * i_Rj;
 456       unsigned char in_Ri;
 457       unsigned char in_Rj;
 458       unsigned char in_h_gr_13;
 459     } fmt_str13b;
 460     struct { /* e.g. st $Ri,@($R14,$disp10) */
 461       SI f_disp10;
 462       SI * i_Ri;
 463       unsigned char in_Ri;
 464       unsigned char in_h_gr_14;
 465     } fmt_str14;
 466     struct { /* e.g. sth $Ri,@($R14,$disp9) */
 467       SI f_disp9;
 468       SI * i_Ri;
 469       unsigned char in_Ri;
 470       unsigned char in_h_gr_14;
 471     } fmt_str14h;
 472     struct { /* e.g. stb $Ri,@($R14,$disp8) */
 473       INT f_disp8;
 474       SI * i_Ri;
 475       unsigned char in_Ri;
 476       unsigned char in_h_gr_14;
 477     } fmt_str14b;
 478     struct { /* e.g. st $Ri,@($R15,$udisp6) */
 479       USI f_udisp6;
 480       SI * i_Ri;
 481       unsigned char in_Ri;
 482       unsigned char in_h_gr_15;
 483     } fmt_str15;
 484     struct { /* e.g. st $Ri,@-$R15 */
 485       SI * i_Ri;
 486       unsigned char in_Ri;
 487       unsigned char in_h_gr_15;
 488       unsigned char out_h_gr_15;
 489     } fmt_str15gr;
 490     struct { /* e.g. st $Rs2,@-$R15 */
 491       UINT f_Rs2;
 492       unsigned char in_h_gr_15;
 493       unsigned char out_h_gr_15;
 494     } fmt_str15dr;
 495     struct { /* e.g. st $ps,@-$R15 */
 496       int empty;
 497       unsigned char in_h_gr_15;
 498       unsigned char out_h_gr_15;
 499     } fmt_str15ps;
 500     struct { /* e.g. mov $Rj,$Ri */
 501       SI * i_Rj;
 502       SI * i_Ri;
 503       unsigned char in_Rj;
 504       unsigned char out_Ri;
 505     } fmt_mov;
 506     struct { /* e.g. mov $Rs1,$Ri */
 507       UINT f_Rs1;
 508       SI * i_Ri;
 509       unsigned char out_Ri;
 510     } fmt_movdr;
 511     struct { /* e.g. mov $ps,$Ri */
 512       SI * i_Ri;
 513       unsigned char out_Ri;
 514     } fmt_movps;
 515     struct { /* e.g. mov $Ri,$Rs1 */
 516       UINT f_Rs1;
 517       SI * i_Ri;
 518       unsigned char in_Ri;
 519     } fmt_mov2dr;
 520     struct { /* e.g. mov $Ri,$ps */
 521       SI * i_Ri;
 522       unsigned char in_Ri;
 523     } fmt_mov2ps;
 524     struct { /* e.g. bno:d $label9 */
 525       int empty;
 526     } fmt_bnod;
 527     struct { /* e.g. dmov $R13,@$dir10 */
 528       USI f_dir10;
 529       unsigned char in_h_gr_13;
 530     } fmt_dmovr13;
 531     struct { /* e.g. dmovh $R13,@$dir9 */
 532       USI f_dir9;
 533       unsigned char in_h_gr_13;
 534     } fmt_dmovr13h;
 535     struct { /* e.g. dmovb $R13,@$dir8 */
 536       UINT f_dir8;
 537       unsigned char in_h_gr_13;
 538     } fmt_dmovr13b;
 539     struct { /* e.g. dmov @$R13+,@$dir10 */
 540       USI f_dir10;
 541       unsigned char in_h_gr_13;
 542       unsigned char out_h_gr_13;
 543     } fmt_dmovr13pi;
 544     struct { /* e.g. dmovh @$R13+,@$dir9 */
 545       USI f_dir9;
 546       unsigned char in_h_gr_13;
 547       unsigned char out_h_gr_13;
 548     } fmt_dmovr13pih;
 549     struct { /* e.g. dmovb @$R13+,@$dir8 */
 550       UINT f_dir8;
 551       unsigned char in_h_gr_13;
 552       unsigned char out_h_gr_13;
 553     } fmt_dmovr13pib;
 554     struct { /* e.g. dmov @$R15+,@$dir10 */
 555       USI f_dir10;
 556       unsigned char in_h_gr_15;
 557       unsigned char out_h_gr_15;
 558     } fmt_dmovr15pi;
 559     struct { /* e.g. dmov @$dir10,$R13 */
 560       USI f_dir10;
 561       unsigned char out_h_gr_13;
 562     } fmt_dmov2r13;
 563     struct { /* e.g. dmovh @$dir9,$R13 */
 564       USI f_dir9;
 565       unsigned char out_h_gr_13;
 566     } fmt_dmov2r13h;
 567     struct { /* e.g. dmovb @$dir8,$R13 */
 568       UINT f_dir8;
 569       unsigned char out_h_gr_13;
 570     } fmt_dmov2r13b;
 571     struct { /* e.g. dmov @$dir10,@$R13+ */
 572       USI f_dir10;
 573       unsigned char in_h_gr_13;
 574       unsigned char out_h_gr_13;
 575     } fmt_dmov2r13pi;
 576     struct { /* e.g. dmovh @$dir9,@$R13+ */
 577       USI f_dir9;
 578       unsigned char in_h_gr_13;
 579       unsigned char out_h_gr_13;
 580     } fmt_dmov2r13pih;
 581     struct { /* e.g. dmovb @$dir8,@$R13+ */
 582       UINT f_dir8;
 583       unsigned char in_h_gr_13;
 584       unsigned char out_h_gr_13;
 585     } fmt_dmov2r13pib;
 586     struct { /* e.g. dmov @$dir10,@-$R15 */
 587       USI f_dir10;
 588       unsigned char in_h_gr_15;
 589       unsigned char out_h_gr_15;
 590     } fmt_dmov2r15pd;
 591     struct { /* e.g. ldres @$Ri+,$u4 */
 592       SI * i_Ri;
 593       unsigned char in_Ri;
 594       unsigned char out_Ri;
 595     } fmt_ldres;
 596     struct { /* e.g. copop $u4c,$ccc,$CRj,$CRi */
 597       int empty;
 598     } fmt_copop;
 599     struct { /* e.g. copld $u4c,$ccc,$Rjc,$CRi */
 600       int empty;
 601     } fmt_copld;
 602     struct { /* e.g. copst $u4c,$ccc,$CRj,$Ric */
 603       int empty;
 604     } fmt_copst;
 605     struct { /* e.g. nop */
 606       int empty;
 607     } fmt_nop;
 608     struct { /* e.g. andccr $u8 */
 609       UINT f_u8;
 610     } fmt_andccr;
 611     struct { /* e.g. stilm $u8 */
 612       UINT f_u8;
 613     } fmt_stilm;
 614     struct { /* e.g. addsp $s10 */
 615       SI f_s10;
 616       unsigned char in_h_gr_15;
 617       unsigned char out_h_gr_15;
 618     } fmt_addsp;
 619     struct { /* e.g. extsb $Ri */
 620       SI * i_Ri;
 621       unsigned char in_Ri;
 622       unsigned char out_Ri;
 623     } fmt_extsb;
 624     struct { /* e.g. extub $Ri */
 625       SI * i_Ri;
 626       unsigned char in_Ri;
 627       unsigned char out_Ri;
 628     } fmt_extub;
 629     struct { /* e.g. extsh $Ri */
 630       SI * i_Ri;
 631       unsigned char in_Ri;
 632       unsigned char out_Ri;
 633     } fmt_extsh;
 634     struct { /* e.g. extuh $Ri */
 635       SI * i_Ri;
 636       unsigned char in_Ri;
 637       unsigned char out_Ri;
 638     } fmt_extuh;
 639     struct { /* e.g. ldm0 ($reglist_low_ld) */
 640       UINT f_reglist_low_ld;
 641       unsigned char in_h_gr_15;
 642       unsigned char out_h_gr_0;
 643       unsigned char out_h_gr_1;
 644       unsigned char out_h_gr_15;
 645       unsigned char out_h_gr_2;
 646       unsigned char out_h_gr_3;
 647       unsigned char out_h_gr_4;
 648       unsigned char out_h_gr_5;
 649       unsigned char out_h_gr_6;
 650       unsigned char out_h_gr_7;
 651     } fmt_ldm0;
 652     struct { /* e.g. ldm1 ($reglist_hi_ld) */
 653       UINT f_reglist_hi_ld;
 654       unsigned char in_h_gr_15;
 655       unsigned char out_h_gr_10;
 656       unsigned char out_h_gr_11;
 657       unsigned char out_h_gr_12;
 658       unsigned char out_h_gr_13;
 659       unsigned char out_h_gr_14;
 660       unsigned char out_h_gr_15;
 661       unsigned char out_h_gr_8;
 662       unsigned char out_h_gr_9;
 663     } fmt_ldm1;
 664     struct { /* e.g. stm0 ($reglist_low_st) */
 665       UINT f_reglist_low_st;
 666       unsigned char in_h_gr_0;
 667       unsigned char in_h_gr_1;
 668       unsigned char in_h_gr_15;
 669       unsigned char in_h_gr_2;
 670       unsigned char in_h_gr_3;
 671       unsigned char in_h_gr_4;
 672       unsigned char in_h_gr_5;
 673       unsigned char in_h_gr_6;
 674       unsigned char in_h_gr_7;
 675       unsigned char out_h_gr_15;
 676     } fmt_stm0;
 677     struct { /* e.g. stm1 ($reglist_hi_st) */
 678       UINT f_reglist_hi_st;
 679       unsigned char in_h_gr_10;
 680       unsigned char in_h_gr_11;
 681       unsigned char in_h_gr_12;
 682       unsigned char in_h_gr_13;
 683       unsigned char in_h_gr_14;
 684       unsigned char in_h_gr_15;
 685       unsigned char in_h_gr_8;
 686       unsigned char in_h_gr_9;
 687       unsigned char out_h_gr_15;
 688     } fmt_stm1;
 689     struct { /* e.g. enter $u10 */
 690       USI f_u10;
 691       unsigned char in_h_gr_14;
 692       unsigned char in_h_gr_15;
 693       unsigned char out_h_gr_14;
 694       unsigned char out_h_gr_15;
 695     } fmt_enter;
 696     struct { /* e.g. leave */
 697       int empty;
 698       unsigned char in_h_gr_14;
 699       unsigned char in_h_gr_15;
 700       unsigned char out_h_gr_14;
 701       unsigned char out_h_gr_15;
 702     } fmt_leave;
 703     struct { /* e.g. xchb @$Rj,$Ri */
 704       SI * i_Ri;
 705       SI * i_Rj;
 706       unsigned char in_Ri;
 707       unsigned char in_Rj;
 708       unsigned char out_Ri;
 709     } fmt_xchb;
 710   /* cti insns, kept separately so addr_cache is in fixed place */
 711   struct {
 712     union {
 713     struct { /* e.g. jmp @$Ri */
 714       SI * i_Ri;
 715       unsigned char in_Ri;
 716     } fmt_jmp;
 717     struct { /* e.g. call @$Ri */
 718       SI * i_Ri;
 719       unsigned char in_Ri;
 720     } fmt_callr;
 721     struct { /* e.g. call $label12 */
 722       IADDR i_label12;
 723     } fmt_call;
 724     struct { /* e.g. ret */
 725       int empty;
 726     } fmt_ret;
 727     struct { /* e.g. int $u8 */
 728       UINT f_u8;
 729     } fmt_int;
 730     struct { /* e.g. inte */
 731       int empty;
 732     } fmt_inte;
 733     struct { /* e.g. reti */
 734       int empty;
 735     } fmt_reti;
 736     struct { /* e.g. bra:d $label9 */
 737       IADDR i_label9;
 738     } fmt_brad;
 739     struct { /* e.g. beq:d $label9 */
 740       IADDR i_label9;
 741     } fmt_beqd;
 742     struct { /* e.g. bc:d $label9 */
 743       IADDR i_label9;
 744     } fmt_bcd;
 745     struct { /* e.g. bn:d $label9 */
 746       IADDR i_label9;
 747     } fmt_bnd;
 748     struct { /* e.g. bv:d $label9 */
 749       IADDR i_label9;
 750     } fmt_bvd;
 751     struct { /* e.g. blt:d $label9 */
 752       IADDR i_label9;
 753     } fmt_bltd;
 754     struct { /* e.g. ble:d $label9 */
 755       IADDR i_label9;
 756     } fmt_bled;
 757     struct { /* e.g. bls:d $label9 */
 758       IADDR i_label9;
 759     } fmt_blsd;
 760     } fields;
 761 #if WITH_SCACHE_PBB
 762     SEM_PC addr_cache;
 763 #endif
 764   } cti;
 765 #if WITH_SCACHE_PBB
 766   /* Writeback handler.  */
 767   struct {
 768     /* Pointer to argbuf entry for insn whose results need writing back.  */
 769     const struct argbuf *abuf;
 770   } write;
 771   /* x-before handler */
 772   struct {
 773     /*const SCACHE *insns[MAX_PARALLEL_INSNS];*/
 774     int first_p;
 775   } before;
 776   /* x-after handler */
 777   struct {
 778     int empty;
 779   } after;
 780   /* This entry is used to terminate each pbb.  */
 781   struct {
 782     /* Number of insns in pbb.  */
 783     int insn_count;
 784     /* Next pbb to execute.  */
 785     SCACHE *next;
 786   } chain;
 787 #endif
 788 };
 789
 790 /* The ARGBUF struct.  */
 791 struct argbuf {
 792   /* These are the baseclass definitions.  */
 793   IADDR addr;
 794   const IDESC *idesc;
 795   char trace_p;
 796   char profile_p;
 797   /* cpu specific data follows */
 798   union sem semantic;
 799   int written;
 800   union sem_fields fields;
 801 };
 802
 803 /* A cached insn.
 804
 805    ??? SCACHE used to contain more than just argbuf.  We could delete the
 806    type entirely and always just use ARGBUF, but for future concerns and as
 807    a level of abstraction it is left in.  */
 808
 809 struct scache {
 810   struct argbuf argbuf;
 811 };
 812
 813 /* Macros to simplify extraction, reading and semantic code.
 814    These define and assign the local vars that contain the insn's fields.  */
 815
 816 #define EXTRACT_IFMT_EMPTY_VARS \
 817   /* Instruction fields.  */ \
 818   unsigned int length;
 819 #define EXTRACT_IFMT_EMPTY_CODE \
 820   length = 0; \
 821
 822 #define EXTRACT_IFMT_ADD_VARS \
 823   /* Instruction fields.  */ \
 824   UINT f_op1; \
 825   UINT f_op2; \
 826   UINT f_Rj; \
 827   UINT f_Ri; \
 828   unsigned int length;
 829 #define EXTRACT_IFMT_ADD_CODE \
 830   length = 2; \
 831   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 832   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 833   f_Rj = EXTRACT_UINT (insn, 16, 8, 4); \
 834   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 835
 836 #define EXTRACT_IFMT_ADDI_VARS \
 837   /* Instruction fields.  */ \
 838   UINT f_op1; \
 839   UINT f_op2; \
 840   UINT f_u4; \
 841   UINT f_Ri; \
 842   unsigned int length;
 843 #define EXTRACT_IFMT_ADDI_CODE \
 844   length = 2; \
 845   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 846   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 847   f_u4 = EXTRACT_UINT (insn, 16, 8, 4); \
 848   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 849
 850 #define EXTRACT_IFMT_ADD2_VARS \
 851   /* Instruction fields.  */ \
 852   UINT f_op1; \
 853   UINT f_op2; \
 854   SI f_m4; \
 855   UINT f_Ri; \
 856   unsigned int length;
 857 #define EXTRACT_IFMT_ADD2_CODE \
 858   length = 2; \
 859   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 860   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 861   f_m4 = ((EXTRACT_UINT (insn, 16, 8, 4)) | (((-1) << (4)))); \
 862   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 863
 864 #define EXTRACT_IFMT_DIV0S_VARS \
 865   /* Instruction fields.  */ \
 866   UINT f_op1; \
 867   UINT f_op2; \
 868   UINT f_op3; \
 869   UINT f_Ri; \
 870   unsigned int length;
 871 #define EXTRACT_IFMT_DIV0S_CODE \
 872   length = 2; \
 873   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 874   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 875   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
 876   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 877
 878 #define EXTRACT_IFMT_DIV3_VARS \
 879   /* Instruction fields.  */ \
 880   UINT f_op1; \
 881   UINT f_op2; \
 882   UINT f_op3; \
 883   UINT f_op4; \
 884   unsigned int length;
 885 #define EXTRACT_IFMT_DIV3_CODE \
 886   length = 2; \
 887   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 888   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 889   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
 890   f_op4 = EXTRACT_UINT (insn, 16, 12, 4); \
 891
 892 #define EXTRACT_IFMT_LDI8_VARS \
 893   /* Instruction fields.  */ \
 894   UINT f_op1; \
 895   UINT f_i8; \
 896   UINT f_Ri; \
 897   unsigned int length;
 898 #define EXTRACT_IFMT_LDI8_CODE \
 899   length = 2; \
 900   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 901   f_i8 = EXTRACT_UINT (insn, 16, 4, 8); \
 902   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 903
 904 #define EXTRACT_IFMT_LDI20_VARS \
 905   /* Instruction fields.  */ \
 906   UINT f_op1; \
 907   UINT f_i20; \
 908   UINT f_i20_4; \
 909   UINT f_i20_16; \
 910   UINT f_op2; \
 911   UINT f_Ri; \
 912   /* Contents of trailing part of insn.  */ \
 913   UINT word_1; \
 914   unsigned int length;
 915 #define EXTRACT_IFMT_LDI20_CODE \
 916   length = 4; \
 917   word_1 = GETIMEMUHI (current_cpu, pc + 2); \
 918   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 919   f_i20_4 = EXTRACT_UINT (insn, 16, 8, 4); \
 920   f_i20_16 = (0|(EXTRACT_UINT (word_1, 16, 0, 16) << 0)); \
 921 do {\
 922   f_i20 = ((((f_i20_4) << (16))) | (f_i20_16));\
 923 } while (0);\
 924   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 925   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 926
 927 #define EXTRACT_IFMT_LDI32_VARS \
 928   /* Instruction fields.  */ \
 929   UINT f_op1; \
 930   UINT f_i32; \
 931   UINT f_op2; \
 932   UINT f_op3; \
 933   UINT f_Ri; \
 934   /* Contents of trailing part of insn.  */ \
 935   UINT word_1; \
 936   unsigned int length;
 937 #define EXTRACT_IFMT_LDI32_CODE \
 938   length = 6; \
 939   word_1 = GETIMEMUSI (current_cpu, pc + 2); \
 940   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 941   f_i32 = (0|(EXTRACT_UINT (word_1, 32, 0, 32) << 0)); \
 942   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 943   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
 944   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 945
 946 #define EXTRACT_IFMT_LDR14_VARS \
 947   /* Instruction fields.  */ \
 948   UINT f_op1; \
 949   SI f_disp10; \
 950   UINT f_Ri; \
 951   unsigned int length;
 952 #define EXTRACT_IFMT_LDR14_CODE \
 953   length = 2; \
 954   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 955   f_disp10 = ((EXTRACT_INT (insn, 16, 4, 8)) << (2)); \
 956   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 957
 958 #define EXTRACT_IFMT_LDR14UH_VARS \
 959   /* Instruction fields.  */ \
 960   UINT f_op1; \
 961   SI f_disp9; \
 962   UINT f_Ri; \
 963   unsigned int length;
 964 #define EXTRACT_IFMT_LDR14UH_CODE \
 965   length = 2; \
 966   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 967   f_disp9 = ((EXTRACT_INT (insn, 16, 4, 8)) << (1)); \
 968   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 969
 970 #define EXTRACT_IFMT_LDR14UB_VARS \
 971   /* Instruction fields.  */ \
 972   UINT f_op1; \
 973   INT f_disp8; \
 974   UINT f_Ri; \
 975   unsigned int length;
 976 #define EXTRACT_IFMT_LDR14UB_CODE \
 977   length = 2; \
 978   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 979   f_disp8 = EXTRACT_INT (insn, 16, 4, 8); \
 980   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 981
 982 #define EXTRACT_IFMT_LDR15_VARS \
 983   /* Instruction fields.  */ \
 984   UINT f_op1; \
 985   UINT f_op2; \
 986   USI f_udisp6; \
 987   UINT f_Ri; \
 988   unsigned int length;
 989 #define EXTRACT_IFMT_LDR15_CODE \
 990   length = 2; \
 991   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
 992   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
 993   f_udisp6 = ((EXTRACT_UINT (insn, 16, 8, 4)) << (2)); \
 994   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
 995
 996 #define EXTRACT_IFMT_LDR15DR_VARS \
 997   /* Instruction fields.  */ \
 998   UINT f_op1; \
 999   UINT f_op2; \
1000   UINT f_op3; \
1001   UINT f_Rs2; \
1002   unsigned int length;
1003 #define EXTRACT_IFMT_LDR15DR_CODE \
1004   length = 2; \
1005   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1006   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1007   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
1008   f_Rs2 = EXTRACT_UINT (insn, 16, 12, 4); \
1009
1010 #define EXTRACT_IFMT_MOVDR_VARS \
1011   /* Instruction fields.  */ \
1012   UINT f_op1; \
1013   UINT f_op2; \
1014   UINT f_Rs1; \
1015   UINT f_Ri; \
1016   unsigned int length;
1017 #define EXTRACT_IFMT_MOVDR_CODE \
1018   length = 2; \
1019   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1020   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1021   f_Rs1 = EXTRACT_UINT (insn, 16, 8, 4); \
1022   f_Ri = EXTRACT_UINT (insn, 16, 12, 4); \
1023
1024 #define EXTRACT_IFMT_CALL_VARS \
1025   /* Instruction fields.  */ \
1026   UINT f_op1; \
1027   UINT f_op5; \
1028   SI f_rel12; \
1029   unsigned int length;
1030 #define EXTRACT_IFMT_CALL_CODE \
1031   length = 2; \
1032   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1033   f_op5 = EXTRACT_UINT (insn, 16, 4, 1); \
1034   f_rel12 = ((((EXTRACT_INT (insn, 16, 5, 11)) << (1))) + (((pc) + (2)))); \
1035
1036 #define EXTRACT_IFMT_INT_VARS \
1037   /* Instruction fields.  */ \
1038   UINT f_op1; \
1039   UINT f_op2; \
1040   UINT f_u8; \
1041   unsigned int length;
1042 #define EXTRACT_IFMT_INT_CODE \
1043   length = 2; \
1044   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1045   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1046   f_u8 = EXTRACT_UINT (insn, 16, 8, 8); \
1047
1048 #define EXTRACT_IFMT_BRAD_VARS \
1049   /* Instruction fields.  */ \
1050   UINT f_op1; \
1051   UINT f_cc; \
1052   SI f_rel9; \
1053   unsigned int length;
1054 #define EXTRACT_IFMT_BRAD_CODE \
1055   length = 2; \
1056   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1057   f_cc = EXTRACT_UINT (insn, 16, 4, 4); \
1058   f_rel9 = ((((EXTRACT_INT (insn, 16, 8, 8)) << (1))) + (((pc) + (2)))); \
1059
1060 #define EXTRACT_IFMT_DMOVR13_VARS \
1061   /* Instruction fields.  */ \
1062   UINT f_op1; \
1063   UINT f_op2; \
1064   USI f_dir10; \
1065   unsigned int length;
1066 #define EXTRACT_IFMT_DMOVR13_CODE \
1067   length = 2; \
1068   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1069   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1070   f_dir10 = ((EXTRACT_UINT (insn, 16, 8, 8)) << (2)); \
1071
1072 #define EXTRACT_IFMT_DMOVR13H_VARS \
1073   /* Instruction fields.  */ \
1074   UINT f_op1; \
1075   UINT f_op2; \
1076   USI f_dir9; \
1077   unsigned int length;
1078 #define EXTRACT_IFMT_DMOVR13H_CODE \
1079   length = 2; \
1080   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1081   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1082   f_dir9 = ((EXTRACT_UINT (insn, 16, 8, 8)) << (1)); \
1083
1084 #define EXTRACT_IFMT_DMOVR13B_VARS \
1085   /* Instruction fields.  */ \
1086   UINT f_op1; \
1087   UINT f_op2; \
1088   UINT f_dir8; \
1089   unsigned int length;
1090 #define EXTRACT_IFMT_DMOVR13B_CODE \
1091   length = 2; \
1092   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1093   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1094   f_dir8 = EXTRACT_UINT (insn, 16, 8, 8); \
1095
1096 #define EXTRACT_IFMT_COPOP_VARS \
1097   /* Instruction fields.  */ \
1098   UINT f_op1; \
1099   UINT f_ccc; \
1100   UINT f_op2; \
1101   UINT f_op3; \
1102   UINT f_CRj; \
1103   UINT f_u4c; \
1104   UINT f_CRi; \
1105   /* Contents of trailing part of insn.  */ \
1106   UINT word_1; \
1107   unsigned int length;
1108 #define EXTRACT_IFMT_COPOP_CODE \
1109   length = 4; \
1110   word_1 = GETIMEMUHI (current_cpu, pc + 2); \
1111   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1112   f_ccc = (0|(EXTRACT_UINT (word_1, 16, 0, 8) << 0)); \
1113   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1114   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
1115   f_CRj = (0|(EXTRACT_UINT (word_1, 16, 8, 4) << 0)); \
1116   f_u4c = EXTRACT_UINT (insn, 16, 12, 4); \
1117   f_CRi = (0|(EXTRACT_UINT (word_1, 16, 12, 16) << 0)); \
1118
1119 #define EXTRACT_IFMT_COPLD_VARS \
1120   /* Instruction fields.  */ \
1121   UINT f_op1; \
1122   UINT f_ccc; \
1123   UINT f_op2; \
1124   UINT f_op3; \
1125   UINT f_Rjc; \
1126   UINT f_u4c; \
1127   UINT f_CRi; \
1128   /* Contents of trailing part of insn.  */ \
1129   UINT word_1; \
1130   unsigned int length;
1131 #define EXTRACT_IFMT_COPLD_CODE \
1132   length = 4; \
1133   word_1 = GETIMEMUHI (current_cpu, pc + 2); \
1134   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1135   f_ccc = (0|(EXTRACT_UINT (word_1, 16, 0, 8) << 0)); \
1136   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1137   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
1138   f_Rjc = (0|(EXTRACT_UINT (word_1, 16, 8, 4) << 0)); \
1139   f_u4c = EXTRACT_UINT (insn, 16, 12, 4); \
1140   f_CRi = (0|(EXTRACT_UINT (word_1, 16, 12, 16) << 0)); \
1141
1142 #define EXTRACT_IFMT_COPST_VARS \
1143   /* Instruction fields.  */ \
1144   UINT f_op1; \
1145   UINT f_ccc; \
1146   UINT f_op2; \
1147   UINT f_op3; \
1148   UINT f_CRj; \
1149   UINT f_u4c; \
1150   UINT f_Ric; \
1151   /* Contents of trailing part of insn.  */ \
1152   UINT word_1; \
1153   unsigned int length;
1154 #define EXTRACT_IFMT_COPST_CODE \
1155   length = 4; \
1156   word_1 = GETIMEMUHI (current_cpu, pc + 2); \
1157   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1158   f_ccc = (0|(EXTRACT_UINT (word_1, 16, 0, 8) << 0)); \
1159   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1160   f_op3 = EXTRACT_UINT (insn, 16, 8, 4); \
1161   f_CRj = (0|(EXTRACT_UINT (word_1, 16, 8, 4) << 0)); \
1162   f_u4c = EXTRACT_UINT (insn, 16, 12, 4); \
1163   f_Ric = (0|(EXTRACT_UINT (word_1, 16, 12, 16) << 0)); \
1164
1165 #define EXTRACT_IFMT_ADDSP_VARS \
1166   /* Instruction fields.  */ \
1167   UINT f_op1; \
1168   UINT f_op2; \
1169   SI f_s10; \
1170   unsigned int length;
1171 #define EXTRACT_IFMT_ADDSP_CODE \
1172   length = 2; \
1173   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1174   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1175   f_s10 = ((EXTRACT_INT (insn, 16, 8, 8)) << (2)); \
1176
1177 #define EXTRACT_IFMT_LDM0_VARS \
1178   /* Instruction fields.  */ \
1179   UINT f_op1; \
1180   UINT f_op2; \
1181   UINT f_reglist_low_ld; \
1182   unsigned int length;
1183 #define EXTRACT_IFMT_LDM0_CODE \
1184   length = 2; \
1185   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1186   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1187   f_reglist_low_ld = EXTRACT_UINT (insn, 16, 8, 8); \
1188
1189 #define EXTRACT_IFMT_LDM1_VARS \
1190   /* Instruction fields.  */ \
1191   UINT f_op1; \
1192   UINT f_op2; \
1193   UINT f_reglist_hi_ld; \
1194   unsigned int length;
1195 #define EXTRACT_IFMT_LDM1_CODE \
1196   length = 2; \
1197   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1198   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1199   f_reglist_hi_ld = EXTRACT_UINT (insn, 16, 8, 8); \
1200
1201 #define EXTRACT_IFMT_STM0_VARS \
1202   /* Instruction fields.  */ \
1203   UINT f_op1; \
1204   UINT f_op2; \
1205   UINT f_reglist_low_st; \
1206   unsigned int length;
1207 #define EXTRACT_IFMT_STM0_CODE \
1208   length = 2; \
1209   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1210   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1211   f_reglist_low_st = EXTRACT_UINT (insn, 16, 8, 8); \
1212
1213 #define EXTRACT_IFMT_STM1_VARS \
1214   /* Instruction fields.  */ \
1215   UINT f_op1; \
1216   UINT f_op2; \
1217   UINT f_reglist_hi_st; \
1218   unsigned int length;
1219 #define EXTRACT_IFMT_STM1_CODE \
1220   length = 2; \
1221   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1222   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1223   f_reglist_hi_st = EXTRACT_UINT (insn, 16, 8, 8); \
1224
1225 #define EXTRACT_IFMT_ENTER_VARS \
1226   /* Instruction fields.  */ \
1227   UINT f_op1; \
1228   UINT f_op2; \
1229   USI f_u10; \
1230   unsigned int length;
1231 #define EXTRACT_IFMT_ENTER_CODE \
1232   length = 2; \
1233   f_op1 = EXTRACT_UINT (insn, 16, 0, 4); \
1234   f_op2 = EXTRACT_UINT (insn, 16, 4, 4); \
1235   f_u10 = ((EXTRACT_UINT (insn, 16, 8, 8)) << (2)); \
1236
1237 /* Collection of various things for the trace handler to use.  */
1238
1239 typedef struct trace_record {
1240   IADDR pc;
1241   /* FIXME:wip */
1242 } TRACE_RECORD;
1243
1244 #endif /* CPU_FR30BF_H */