sim/i960/traps.c

   1 /* i960 exception, interrupt, and trap (EIT) support
   2    Copyright (C) 1998, 1999 Free Software Foundation, Inc.
   3    Contributed by Cygnus Solutions.
   4
   5 This file is part of GDB, the GNU debugger.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2, or (at your option)
  10 any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License along
  18 with this program; if not, write to the Free Software Foundation, Inc.,
  19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #include "sim-main.h"
  22 #include "targ-vals.h"
  23
  24 /* The semantic code invokes this for illegal (unrecognized) instructions.  */
  25
  26 void
  27 sim_engine_invalid_insn (SIM_CPU *current_cpu, IADDR cia)
  28 {
  29   SIM_DESC sd = CPU_STATE (current_cpu);
  30
  31 #if 0
  32   if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
  33     {
  34       h_bsm_set (current_cpu, h_sm_get (current_cpu));
  35       h_bie_set (current_cpu, h_ie_get (current_cpu));
  36       h_bcond_set (current_cpu, h_cond_get (current_cpu));
  37       /* sm not changed */
  38       h_ie_set (current_cpu, 0);
  39       h_cond_set (current_cpu, 0);
  40
  41       h_bpc_set (current_cpu, cia);
  42
  43       sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
  44                           EIT_RSVD_INSN_ADDR);
  45     }
  46   else
  47 #endif
  48     sim_engine_halt (sd, current_cpu, NULL, cia, sim_stopped, SIM_SIGILL);
  49 }
  50
  51 /* Process an address exception.  */
  52
  53 void
  54 i960_core_signal (SIM_DESC sd, SIM_CPU *current_cpu, sim_cia cia,
  55                   unsigned int map, int nr_bytes, address_word addr,
  56                   transfer_type transfer, sim_core_signals sig)
  57 {
  58 #if 0
  59   if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
  60     {
  61       h_bsm_set (current_cpu, h_sm_get (current_cpu));
  62       h_bie_set (current_cpu, h_ie_get (current_cpu));
  63       h_bcond_set (current_cpu, h_cond_get (current_cpu));
  64       /* sm not changed */
  65       h_ie_set (current_cpu, 0);
  66       h_cond_set (current_cpu, 0);
  67
  68       h_bpc_set (current_cpu, cia);
  69
  70       sim_engine_restart (CPU_STATE (current_cpu), current_cpu, NULL,
  71                           EIT_ADDR_EXCP_ADDR);
  72     }
  73   else
  74 #endif
  75     sim_core_signal (sd, current_cpu, cia, map, nr_bytes, addr,
  76                      transfer, sig);
  77 }
  78 \f
  79 /* Read/write functions for system call interface.  */
  80
  81 static int
  82 syscall_read_mem (host_callback *cb, struct cb_syscall *sc,
  83                   unsigned long taddr, char *buf, int bytes)
  84 {
  85   SIM_DESC sd = (SIM_DESC) sc->p1;
  86   SIM_CPU *cpu = (SIM_CPU *) sc->p2;
  87
  88   return sim_core_read_buffer (sd, cpu, read_map, buf, taddr, bytes);
  89 }
  90
  91 static int
  92 syscall_write_mem (host_callback *cb, struct cb_syscall *sc,
  93                    unsigned long taddr, const char *buf, int bytes)
  94 {
  95   SIM_DESC sd = (SIM_DESC) sc->p1;
  96   SIM_CPU *cpu = (SIM_CPU *) sc->p2;
  97
  98   return sim_core_write_buffer (sd, cpu, write_map, buf, taddr, bytes);
  99 }
 100
 101 /* Trap support.
 102    The result is the pc address to continue at.
 103    Preprocessing like saving the various registers has already been done.  */
 104
 105 USI
 106 i960_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
 107 {
 108   SIM_DESC sd = CPU_STATE (current_cpu);
 109   host_callback *cb = STATE_CALLBACK (sd);
 110
 111 #ifdef SIM_HAVE_BREAKPOINTS
 112   /* Check for breakpoints "owned" by the simulator first, regardless
 113      of --environment.  */
 114   if (num == TRAP_BREAKPOINT)
 115     {
 116       /* First try sim-break.c.  If it's a breakpoint the simulator "owns"
 117          it doesn't return.  Otherwise it returns and let's us try.  */
 118       sim_handle_breakpoint (sd, current_cpu, pc);
 119       /* Fall through.  */
 120     }
 121 #endif
 122
 123 #if 0
 124   /* ??? wilson, don't know what this does.  */
 125   if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT)
 126     {
 127       /* The new pc is the trap vector entry.
 128          We assume there's a branch there to some handler.  */
 129       USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
 130       return new_pc;
 131     }
 132 #endif
 133
 134   switch (num)
 135     {
 136     default:
 137     case TRAP_SYSCALL :
 138       {
 139         CB_SYSCALL s;
 140
 141         CB_SYSCALL_INIT (&s);
 142         s.func = num;
 143         s.arg1 = a_i960_h_gr_get (current_cpu, 16);
 144         s.arg2 = a_i960_h_gr_get (current_cpu, 17);
 145         s.arg3 = a_i960_h_gr_get (current_cpu, 18);
 146
 147         if (s.func == TARGET_SYS_exit)
 148           {
 149             sim_engine_halt (sd, current_cpu, NULL, pc, sim_exited, s.arg1);
 150           }
 151
 152         s.p1 = (PTR) sd;
 153         s.p2 = (PTR) current_cpu;
 154         s.read_mem = syscall_read_mem;
 155         s.write_mem = syscall_write_mem;
 156         cb_syscall (cb, &s);
 157         /* ??? This stuff is probably wrong, but libgloss doesn't look at
 158            these values, so it shouldn't matter.  */
 159         a_i960_h_gr_set (current_cpu, 18, s.errcode);
 160         a_i960_h_gr_set (current_cpu, 16, s.result);
 161         a_i960_h_gr_set (current_cpu, 17, s.result2);
 162         break;
 163       }
 164
 165     case TRAP_BREAKPOINT:
 166       sim_engine_halt (sd, current_cpu, NULL, NULL_CIA,
 167                        sim_stopped, SIM_SIGTRAP);
 168       break;
 169
 170 #if 0
 171       /* ??? wilson, don't know what this does.  */
 172     default :
 173       {
 174         USI new_pc = EIT_TRAP_BASE_ADDR + num * 4;
 175         return new_pc;
 176       }
 177 #endif
 178     }
 179
 180   /* Fake an "rte" insn.  */
 181   /* FIXME: Should duplicate all of rte processing.  */
 182   return (pc & -4) + 4;
 183 }
 184
 185 /* Breakpoint support.
 186    The result is the pc address to continue at.  */
 187 /* ??? This is an editted copy of the above.  */
 188
 189 USI
 190 i960_breakpoint (SIM_CPU *current_cpu, PCADDR pc)
 191 {
 192   SIM_DESC sd = CPU_STATE (current_cpu);
 193   host_callback *cb = STATE_CALLBACK (sd);
 194
 195 #ifdef SIM_HAVE_BREAKPOINTS
 196   /* Check for breakpoints "owned" by the simulator first, regardless
 197      of --environment.  */
 198   if (num == TRAP_BREAKPOINT)
 199     {
 200       /* First try sim-break.c.  If it's a breakpoint the simulator "owns"
 201          it doesn't return.  Otherwise it returns and let's us try.  */
 202       sim_handle_breakpoint (sd, current_cpu, pc);
 203       /* Fall through.  */
 204     }
 205 #endif
 206
 207   sim_engine_halt (sd, current_cpu, NULL, NULL_CIA,
 208                    sim_stopped, SIM_SIGTRAP);
 209
 210   /* Fake an "rte" insn.  */
 211   /* FIXME: Should duplicate all of rte processing.  */
 212   return (pc & -4) + 4;
 213 }