1 /* Main simulator entry points specific to the IQ2000.
2 Copyright (C) 2000-2021 Free Software Foundation, Inc.
3 Contributed by Cygnus Solutions.
5 This file is part of the GNU simulators.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "sim-options.h"
25 #include "libiberty.h"
28 static void free_state (SIM_DESC
);
30 /* Cover function for sim_cgen_disassemble_insn. */
33 iq2000bf_disassemble_insn (SIM_CPU
*cpu
, const CGEN_INSN
*insn
,
34 const ARGBUF
*abuf
, IADDR pc
, char *buf
)
36 sim_cgen_disassemble_insn(cpu
, insn
, abuf
, pc
, buf
);
39 /* Cover function of sim_state_free to free the cpu buffers as well. */
42 free_state (SIM_DESC sd
)
44 if (STATE_MODULES (sd
) != NULL
)
45 sim_module_uninstall (sd
);
46 sim_cpu_free_all (sd
);
50 /* Create an instance of the simulator. */
53 sim_open (kind
, callback
, abfd
, argv
)
55 host_callback
*callback
;
61 SIM_DESC sd
= sim_state_alloc (kind
, callback
);
63 /* The cpu data is kept in a separately allocated chunk of memory. */
64 if (sim_cpu_alloc_all (sd
, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK
)
70 #if 0 /* FIXME: pc is in mach-specific struct */
71 /* FIXME: watchpoints code shouldn't need this */
73 SIM_CPU
*current_cpu
= STATE_CPU (sd
, 0);
74 STATE_WATCHPOINTS (sd
)->pc
= &(PC
);
78 if (sim_pre_argv_init (sd
, argv
[0]) != SIM_RC_OK
)
84 /* The parser will print an error message for us, so we silently return. */
85 if (sim_parse_args (sd
, argv
) != SIM_RC_OK
)
91 /* Allocate core managed memory. */
92 sim_do_commandf (sd
, "memory region 0x%lx,0x%lx", IQ2000_INSN_VALUE
, IQ2000_INSN_MEM_SIZE
);
93 sim_do_commandf (sd
, "memory region 0x%lx,0x%lx", IQ2000_DATA_VALUE
, IQ2000_DATA_MEM_SIZE
);
95 /* check for/establish the reference program image */
96 if (sim_analyze_program (sd
,
97 (STATE_PROG_ARGV (sd
) != NULL
98 ? *STATE_PROG_ARGV (sd
)
106 /* Establish any remaining configuration options. */
107 if (sim_config (sd
) != SIM_RC_OK
)
113 if (sim_post_argv_init (sd
) != SIM_RC_OK
)
119 /* Open a copy of the cpu descriptor table. */
121 CGEN_CPU_DESC cd
= iq2000_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd
)->printable_name
,
124 for (i
= 0; i
< MAX_NR_PROCESSORS
; ++i
)
126 SIM_CPU
*cpu
= STATE_CPU (sd
, i
);
127 CPU_CPU_DESC (cpu
) = cd
;
128 CPU_DISASSEMBLER (cpu
) = iq2000bf_disassemble_insn
;
130 iq2000_cgen_init_dis (cd
);
133 /* Initialize various cgen things not done by common framework.
134 Must be done after iq2000_cgen_cpu_open. */
141 sim_create_inferior (sd
, abfd
, argv
, envp
)
147 SIM_CPU
*current_cpu
= STATE_CPU (sd
, 0);
151 addr
= bfd_get_start_address (abfd
);
154 sim_pc_set (current_cpu
, addr
);
156 /* Standalone mode (i.e. `run`) will take care of the argv for us in
157 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
158 with `gdb`), we need to handle it because the user can change the
159 argv on the fly via gdb's 'run'. */
160 if (STATE_PROG_ARGV (sd
) != argv
)
162 freeargv (STATE_PROG_ARGV (sd
));
163 STATE_PROG_ARGV (sd
) = dupargv (argv
);