sim: sim-stop/sim-reason/sim-reg: move to common obj list
[deliverable/binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996-2015 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
25 TRAPS_OBJ = @traps_obj@
26
27 SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
29 sim-hload.o \
30 sim-model.o \
31 cgen-utils.o cgen-trace.o cgen-scache.o \
32 cgen-run.o \
33 sim-if.o arch.o \
34 $(M32R_OBJS) \
35 $(M32RX_OBJS) \
36 $(M32R2_OBJS) \
37 $(TRAPS_OBJ) \
38 devices.o
39
40 # Extra headers included by sim-main.h.
41 SIM_EXTRA_DEPS = \
42 $(CGEN_INCLUDE_DEPS) \
43 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
44
45 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
46
47 SIM_EXTRA_CLEAN = m32r-clean
48
49 # This selects the m32r newlib/libgloss syscall definitions.
50 NL_TARGET = -DNL_TARGET_m32r
51
52 ## COMMON_POST_CONFIG_FRAG
53
54 arch = m32r
55
56 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
57
58 arch.o: arch.c $(SIM_MAIN_DEPS)
59
60 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
61 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
62 devices.o: devices.c $(SIM_MAIN_DEPS)
63
64 # M32R objs
65
66 M32RBF_INCLUDE_DEPS = \
67 $(CGEN_MAIN_CPU_DEPS) \
68 cpu.h decode.h eng.h
69
70 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
71
72 # FIXME: Use of `mono' is wip.
73 mloop.c eng.h: stamp-mloop ; @true
74 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
75 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
76 -mono -fast -pbb -switch sem-switch.c \
77 -cpu m32rbf -infile $(srcdir)/mloop.in
78 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
79 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
80 touch stamp-mloop
81 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
82
83 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
84 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
85 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
86 model.o: model.c $(M32RBF_INCLUDE_DEPS)
87
88 # M32RX objs
89
90 M32RXF_INCLUDE_DEPS = \
91 $(CGEN_MAIN_CPU_DEPS) \
92 cpux.h decodex.h engx.h
93
94 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
95
96 # FIXME: Use of `mono' is wip.
97 mloopx.c engx.h: stamp-xmloop ; @true
98 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
99 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
100 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
101 -cpu m32rxf -infile $(srcdir)/mloopx.in \
102 -outfile-suffix x
103 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
104 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
105 touch stamp-xmloop
106 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
107
108 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
109 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
110 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
111 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
112
113 # M32R2 objs
114
115 M32R2F_INCLUDE_DEPS = \
116 $(CGEN_MAIN_CPU_DEPS) \
117 cpu2.h decode2.h eng2.h
118
119 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
120
121 # FIXME: Use of `mono' is wip.
122 mloop2.c eng2.h: stamp-2mloop ; @true
123 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
124 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
125 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
126 -cpu m32r2f -infile $(srcdir)/mloop2.in \
127 -outfile-suffix 2
128 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
129 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
130 touch stamp-2mloop
131
132 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
133 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
134 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
135 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
136 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
137
138 m32r-clean:
139 rm -f mloop.c eng.h stamp-mloop
140 rm -f mloopx.c engx.h stamp-xmloop
141 rm -f mloop2.c eng2.h stamp-2mloop
142 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
143 rm -f tmp-*
144
145 # cgen support, enable with --enable-cgen-maint
146 CGEN_MAINT = ; @true
147 # The following line is commented in or out depending upon --enable-cgen-maint.
148 @CGEN_MAINT@CGEN_MAINT =
149
150 # NOTE: Generated source files are specified as full paths,
151 # e.g. $(srcdir)/arch.c, because make may decide the files live
152 # in objdir otherwise.
153
154 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
155 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
156 archfile=$(CPU_DIR)/m32r.cpu \
157 FLAGS="with-scache with-profile=fn"
158 touch stamp-arch
159 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
160 @true
161
162 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
163 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
164 cpu=m32rbf mach=m32r SUFFIX= \
165 archfile=$(CPU_DIR)/m32r.cpu \
166 FLAGS="with-scache with-profile=fn" \
167 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
168 touch stamp-cpu
169 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
170 @true
171
172 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
173 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
174 cpu=m32rxf mach=m32rx SUFFIX=x \
175 archfile=$(CPU_DIR)/m32r.cpu \
176 FLAGS="with-scache with-profile=fn" \
177 EXTRAFILES="$(CGEN_CPU_SEMSW)"
178 touch stamp-xcpu
179 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
180 @true
181
182 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
183 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
184 cpu=m32r2f mach=m32r2 SUFFIX=2 \
185 archfile=$(CPU_DIR)/m32r.cpu \
186 FLAGS="with-scache with-profile=fn" \
187 EXTRAFILES="$(CGEN_CPU_SEMSW)"
188 touch stamp-2cpu
189 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
190 @true
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