sim/m32r/Makefile.in

   1 # Makefile template for Configure for the m32r simulator
   2 # Copyright (C) 1996, 1997, 1998, 1999, 2000, 2003 Free Software Foundation, Inc.
   3 # Contributed by Cygnus Support.
   4 #
   5 # This file is part of GDB, the GNU debugger.
   6 #
   7 # This program is free software; you can redistribute it and/or modify
   8 # it under the terms of the GNU General Public License as published by
   9 # the Free Software Foundation; either version 2 of the License, or
  10 # (at your option) any later version.
  11 #
  12 # This program is distributed in the hope that it will be useful,
  13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 # GNU General Public License for more details.
  16 #
  17 # You should have received a copy of the GNU General Public License along
  18 # with this program; if not, write to the Free Software Foundation, Inc.,
  19 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20
  21 ## COMMON_PRE_CONFIG_FRAG
  22
  23 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
  24 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
  25 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
  26 TRAPS_OBJ = @traps_obj@
  27
  28 CONFIG_DEVICES = dv-sockser.o
  29 CONFIG_DEVICES =
  30
  31 SIM_OBJS = \
  32         $(SIM_NEW_COMMON_OBJS) \
  33         sim-cpu.o \
  34         sim-hload.o \
  35         sim-hrw.o \
  36         sim-model.o \
  37         sim-reg.o \
  38         cgen-utils.o cgen-trace.o cgen-scache.o \
  39         cgen-run.o sim-reason.o sim-engine.o sim-stop.o \
  40         sim-if.o arch.o \
  41         $(M32R_OBJS) \
  42         $(M32RX_OBJS) \
  43         $(M32R2_OBJS) \
  44         $(TRAPS_OBJ) \
  45         devices.o \
  46         $(CONFIG_DEVICES)
  47
  48 # Extra headers included by sim-main.h.
  49 SIM_EXTRA_DEPS = \
  50         $(CGEN_INCLUDE_DEPS) \
  51         arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
  52
  53 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
  54
  55 SIM_RUN_OBJS = nrun.o
  56 SIM_EXTRA_CLEAN = m32r-clean
  57
  58 # This selects the m32r newlib/libgloss syscall definitions.
  59 NL_TARGET = -DNL_TARGET_m32r
  60
  61 ## COMMON_POST_CONFIG_FRAG
  62
  63 arch = m32r
  64
  65 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
  66
  67 arch.o: arch.c $(SIM_MAIN_DEPS)
  68
  69 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
  70 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
  71 devices.o: devices.c $(SIM_MAIN_DEPS)
  72
  73 # M32R objs
  74
  75 M32RBF_INCLUDE_DEPS = \
  76         $(CGEN_MAIN_CPU_DEPS) \
  77         cpu.h decode.h eng.h
  78
  79 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
  80
  81 # FIXME: Use of `mono' is wip.
  82 mloop.c eng.h: stamp-mloop
  83 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
  84         $(SHELL) $(srccom)/genmloop.sh \
  85                 -mono -fast -pbb -switch sem-switch.c \
  86                 -cpu m32rbf -infile $(srcdir)/mloop.in
  87         $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
  88         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
  89         touch stamp-mloop
  90 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
  91
  92 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
  93 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
  94 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
  95 model.o: model.c $(M32RBF_INCLUDE_DEPS)
  96
  97 # M32RX objs
  98
  99 M32RXF_INCLUDE_DEPS = \
 100         $(CGEN_MAIN_CPU_DEPS) \
 101         cpux.h decodex.h engx.h
 102
 103 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
 104
 105 # FIXME: Use of `mono' is wip.
 106 mloopx.c engx.h: stamp-xmloop
 107 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
 108         $(SHELL) $(srccom)/genmloop.sh \
 109                 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
 110                 -cpu m32rxf -infile $(srcdir)/mloopx.in
 111         $(SHELL) $(srcroot)/move-if-change eng.hin engx.h
 112         $(SHELL) $(srcroot)/move-if-change mloop.cin mloopx.c
 113         touch stamp-xmloop
 114 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
 115
 116 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
 117 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
 118 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
 119 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
 120
 121 # M32R2 objs
 122
 123 M32R2F_INCLUDE_DEPS = \
 124         $(CGEN_MAIN_CPU_DEPS) \
 125         cpu2.h decode2.h eng2.h
 126
 127 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
 128
 129 # FIXME: Use of `mono' is wip.
 130 mloop2.c eng2.h: stamp-2mloop
 131 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
 132         $(SHELL) $(srccom)/genmloop.sh \
 133                 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
 134                 -cpu m32r2f -infile $(srcdir)/mloop2.in
 135         $(SHELL) $(srcroot)/move-if-change eng.hin eng2.h
 136         $(SHELL) $(srcroot)/move-if-change mloop.cin mloop2.c
 137         touch stamp-2mloop
 138
 139 mloop2.o:  mloop2.c sem2-switch.c $(M32R2F_INCLUDE_DEPS)
 140 cpu2.o:    cpu2.c    $(M32R2F_INCLUDE_DEPS)
 141 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
 142 sem2.o:    sem2.c    $(M32R2F_INCLUDE_DEPS)
 143 model2.o:  model2.c  $(M32R2F_INCLUDE_DEPS)
 144
 145 m32r-clean:
 146         rm -f mloop.c eng.h stamp-mloop
 147         rm -f mloopx.c engx.h stamp-xmloop
 148         rm -f mloop2.c eng2.h stamp-2mloop
 149         rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
 150         rm -f tmp-*
 151
 152 # cgen support, enable with --enable-cgen-maint
 153 CGEN_MAINT = ; @true
 154 # The following line is commented in or out depending upon --enable-cgen-maint.
 155 @CGEN_MAINT@CGEN_MAINT =
 156
 157 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 158         $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
 159           archfile=$(CGEN_CPU_DIR)/m32r.cpu \
 160           FLAGS="with-scache with-profile=fn"
 161         touch stamp-arch
 162 arch.h arch.c cpuall.h: $(CGEN_MAINT) stamp-arch
 163
 164 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 165         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 166           cpu=m32rbf mach=m32r SUFFIX= \
 167           archfile=$(CGEN_CPU_DIR)/m32r.cpu \
 168           FLAGS="with-scache with-profile=fn" \
 169           EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
 170         touch stamp-cpu
 171 cpu.h sem.c sem-switch.c model.c decode.c decode.h: $(CGEN_MAINT) stamp-cpu
 172
 173 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 174         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 175           cpu=m32rxf mach=m32rx SUFFIX=x \
 176           archfile=$(CGEN_CPU_DIR)/m32r.cpu \
 177           FLAGS="with-scache with-profile=fn" \
 178           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 179         touch stamp-xcpu
 180 cpux.h semx-switch.c modelx.c decodex.c decodex.h: $(CGEN_MAINT) stamp-xcpu
 181
 182 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CGEN_CPU_DIR)/m32r.cpu
 183         $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
 184           cpu=m32r2f mach=m32r2 SUFFIX=2 \
 185           archfile=$(CGEN_CPU_DIR)/m32r.cpu \
 186           FLAGS="with-scache with-profile=fn" \
 187           EXTRAFILES="$(CGEN_CPU_SEMSW)"
 188         touch stamp-2cpu
 189 cpu2.h sem2-switch.c model2.c decode2.c decode2.h: $(CGEN_MAINT) stamp-2cpu