sim: move sim-engine.o/sim-hrw.o to the common list
[deliverable/binutils-gdb.git] / sim / m32r / Makefile.in
1 # Makefile template for Configure for the m32r simulator
2 # Copyright (C) 1996-2015 Free Software Foundation, Inc.
3 # Contributed by Cygnus Support.
4 #
5 # This file is part of GDB, the GNU debugger.
6 #
7 # This program is free software; you can redistribute it and/or modify
8 # it under the terms of the GNU General Public License as published by
9 # the Free Software Foundation; either version 3 of the License, or
10 # (at your option) any later version.
11 #
12 # This program is distributed in the hope that it will be useful,
13 # but WITHOUT ANY WARRANTY; without even the implied warranty of
14 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 # GNU General Public License for more details.
16 #
17 # You should have received a copy of the GNU General Public License
18 # along with this program. If not, see <http://www.gnu.org/licenses/>.
19
20 ## COMMON_PRE_CONFIG_FRAG
21
22 M32R_OBJS = m32r.o cpu.o decode.o sem.o model.o mloop.o
23 M32RX_OBJS = m32rx.o cpux.o decodex.o modelx.o mloopx.o
24 M32R2_OBJS = m32r2.o cpu2.o decode2.o model2.o mloop2.o
25 TRAPS_OBJ = @traps_obj@
26
27 SIM_OBJS = \
28 $(SIM_NEW_COMMON_OBJS) \
29 sim-cpu.o \
30 sim-hload.o \
31 sim-model.o \
32 sim-reg.o \
33 cgen-utils.o cgen-trace.o cgen-scache.o \
34 cgen-run.o sim-reason.o sim-stop.o \
35 sim-if.o arch.o \
36 $(M32R_OBJS) \
37 $(M32RX_OBJS) \
38 $(M32R2_OBJS) \
39 $(TRAPS_OBJ) \
40 devices.o
41
42 # Extra headers included by sim-main.h.
43 SIM_EXTRA_DEPS = \
44 $(CGEN_INCLUDE_DEPS) \
45 arch.h cpuall.h m32r-sim.h $(srcdir)/../../opcodes/m32r-desc.h
46
47 SIM_EXTRA_CFLAGS = @sim_extra_cflags@
48
49 SIM_EXTRA_CLEAN = m32r-clean
50
51 # This selects the m32r newlib/libgloss syscall definitions.
52 NL_TARGET = -DNL_TARGET_m32r
53
54 ## COMMON_POST_CONFIG_FRAG
55
56 arch = m32r
57
58 sim-if.o: sim-if.c $(SIM_MAIN_DEPS) $(srcdir)/../common/sim-core.h
59
60 arch.o: arch.c $(SIM_MAIN_DEPS)
61
62 traps.o: traps.c targ-vals.h $(SIM_MAIN_DEPS)
63 traps-linux.o: traps.c syscall.h targ-vals.h $(SIM_MAIN_DEPS)
64 devices.o: devices.c $(SIM_MAIN_DEPS)
65
66 # M32R objs
67
68 M32RBF_INCLUDE_DEPS = \
69 $(CGEN_MAIN_CPU_DEPS) \
70 cpu.h decode.h eng.h
71
72 m32r.o: m32r.c $(M32RBF_INCLUDE_DEPS)
73
74 # FIXME: Use of `mono' is wip.
75 mloop.c eng.h: stamp-mloop ; @true
76 stamp-mloop: $(srcdir)/../common/genmloop.sh mloop.in Makefile
77 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
78 -mono -fast -pbb -switch sem-switch.c \
79 -cpu m32rbf -infile $(srcdir)/mloop.in
80 $(SHELL) $(srcroot)/move-if-change eng.hin eng.h
81 $(SHELL) $(srcroot)/move-if-change mloop.cin mloop.c
82 touch stamp-mloop
83 mloop.o: mloop.c sem-switch.c $(M32RBF_INCLUDE_DEPS)
84
85 cpu.o: cpu.c $(M32RBF_INCLUDE_DEPS)
86 decode.o: decode.c $(M32RBF_INCLUDE_DEPS)
87 sem.o: sem.c $(M32RBF_INCLUDE_DEPS)
88 model.o: model.c $(M32RBF_INCLUDE_DEPS)
89
90 # M32RX objs
91
92 M32RXF_INCLUDE_DEPS = \
93 $(CGEN_MAIN_CPU_DEPS) \
94 cpux.h decodex.h engx.h
95
96 m32rx.o: m32rx.c $(M32RXF_INCLUDE_DEPS)
97
98 # FIXME: Use of `mono' is wip.
99 mloopx.c engx.h: stamp-xmloop ; @true
100 stamp-xmloop: $(srcdir)/../common/genmloop.sh mloopx.in Makefile
101 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
102 -mono -no-fast -pbb -parallel-write -switch semx-switch.c \
103 -cpu m32rxf -infile $(srcdir)/mloopx.in \
104 -outfile-suffix x
105 $(SHELL) $(srcroot)/move-if-change engx.hin engx.h
106 $(SHELL) $(srcroot)/move-if-change mloopx.cin mloopx.c
107 touch stamp-xmloop
108 mloopx.o: mloopx.c semx-switch.c $(M32RXF_INCLUDE_DEPS)
109
110 cpux.o: cpux.c $(M32RXF_INCLUDE_DEPS)
111 decodex.o: decodex.c $(M32RXF_INCLUDE_DEPS)
112 semx.o: semx.c $(M32RXF_INCLUDE_DEPS)
113 modelx.o: modelx.c $(M32RXF_INCLUDE_DEPS)
114
115 # M32R2 objs
116
117 M32R2F_INCLUDE_DEPS = \
118 $(CGEN_MAIN_CPU_DEPS) \
119 cpu2.h decode2.h eng2.h
120
121 m32r2.o: m32r2.c $(M32R2F_INCLUDE_DEPS)
122
123 # FIXME: Use of `mono' is wip.
124 mloop2.c eng2.h: stamp-2mloop ; @true
125 stamp-2mloop: $(srcdir)/../common/genmloop.sh mloop2.in Makefile
126 $(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \
127 -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \
128 -cpu m32r2f -infile $(srcdir)/mloop2.in \
129 -outfile-suffix 2
130 $(SHELL) $(srcroot)/move-if-change eng2.hin eng2.h
131 $(SHELL) $(srcroot)/move-if-change mloop2.cin mloop2.c
132 touch stamp-2mloop
133
134 mloop2.o: mloop2.c $(srcdir)/sem2-switch.c $(M32R2F_INCLUDE_DEPS)
135 cpu2.o: cpu2.c $(M32R2F_INCLUDE_DEPS)
136 decode2.o: decode2.c $(M32R2F_INCLUDE_DEPS)
137 sem2.o: sem2.c $(M32R2F_INCLUDE_DEPS)
138 model2.o: model2.c $(M32R2F_INCLUDE_DEPS)
139
140 m32r-clean:
141 rm -f mloop.c eng.h stamp-mloop
142 rm -f mloopx.c engx.h stamp-xmloop
143 rm -f mloop2.c eng2.h stamp-2mloop
144 rm -f stamp-arch stamp-cpu stamp-xcpu stamp-2cpu
145 rm -f tmp-*
146
147 # cgen support, enable with --enable-cgen-maint
148 CGEN_MAINT = ; @true
149 # The following line is commented in or out depending upon --enable-cgen-maint.
150 @CGEN_MAINT@CGEN_MAINT =
151
152 # NOTE: Generated source files are specified as full paths,
153 # e.g. $(srcdir)/arch.c, because make may decide the files live
154 # in objdir otherwise.
155
156 stamp-arch: $(CGEN_READ_SCM) $(CGEN_ARCH_SCM) $(CPU_DIR)/m32r.cpu Makefile
157 $(MAKE) cgen-arch $(CGEN_FLAGS_TO_PASS) mach=all \
158 archfile=$(CPU_DIR)/m32r.cpu \
159 FLAGS="with-scache with-profile=fn"
160 touch stamp-arch
161 $(srcdir)/arch.h $(srcdir)/arch.c $(srcdir)/cpuall.h: $(CGEN_MAINT) stamp-arch
162 @true
163
164 stamp-cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
165 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
166 cpu=m32rbf mach=m32r SUFFIX= \
167 archfile=$(CPU_DIR)/m32r.cpu \
168 FLAGS="with-scache with-profile=fn" \
169 EXTRAFILES="$(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)"
170 touch stamp-cpu
171 $(srcdir)/cpu.h $(srcdir)/sem.c $(srcdir)/sem-switch.c $(srcdir)/model.c $(srcdir)/decode.c $(srcdir)/decode.h: $(CGEN_MAINT) stamp-cpu
172 @true
173
174 stamp-xcpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
175 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
176 cpu=m32rxf mach=m32rx SUFFIX=x \
177 archfile=$(CPU_DIR)/m32r.cpu \
178 FLAGS="with-scache with-profile=fn" \
179 EXTRAFILES="$(CGEN_CPU_SEMSW)"
180 touch stamp-xcpu
181 $(srcdir)/cpux.h $(srcdir)/semx-switch.c $(srcdir)/modelx.c $(srcdir)/decodex.c $(srcdir)/decodex.h: $(CGEN_MAINT) stamp-xcpu
182 @true
183
184 stamp-2cpu: $(CGEN_READ_SCM) $(CGEN_CPU_SCM) $(CGEN_DECODE_SCM) $(CPU_DIR)/m32r.cpu Makefile
185 $(MAKE) cgen-cpu-decode $(CGEN_FLAGS_TO_PASS) \
186 cpu=m32r2f mach=m32r2 SUFFIX=2 \
187 archfile=$(CPU_DIR)/m32r.cpu \
188 FLAGS="with-scache with-profile=fn" \
189 EXTRAFILES="$(CGEN_CPU_SEMSW)"
190 touch stamp-2cpu
191 $(srcdir)/cpu2.h $(srcdir)/sem2-switch.c $(srcdir)/model2.c $(srcdir)/decode2.c $(srcdir)/decode2.h: $(CGEN_MAINT) stamp-2cpu
192 @true
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