Broke parsing of !<val>!<val> when adding support for =<field>. Fix.
[deliverable/binutils-gdb.git] / sim / m32r / cpuall.h
1 /* Simulator CPU header for m32r.
2
3 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
4
5 This file is part of the GNU Simulators.
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License along
18 with this program; if not, write to the Free Software Foundation, Inc.,
19 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20
21 */
22
23 #ifndef M32R_CPUALL_H
24 #define M32R_CPUALL_H
25
26 extern const IMP_PROPERTIES m32r_imp_properties;
27
28 extern const MODEL m32r_models[];
29
30 #ifndef WANT_CPU
31 /* The ARGBUF struct. */
32 struct argbuf {
33 /* These are the baseclass definitions. */
34 unsigned int length;
35 PCADDR addr;
36 const struct cgen_insn *opcode;
37 /* unsigned long insn; - no longer needed */
38 /* cpu specific data follows */
39 };
40 #endif
41
42 #ifndef WANT_CPU
43 /* A cached insn.
44 This is also used in the non-scache case. In this situation we assume
45 the cache size is 1, and do a few things a little differently. */
46
47 struct scache {
48 IADDR next;
49 union {
50 #if ! WITH_SEM_SWITCH_FULL
51 SEMANTIC_FN *sem_fn;
52 #endif
53 #if ! WITH_SEM_SWITCH_FAST
54 #if WITH_SCACHE
55 SEMANTIC_CACHE_FN *sem_fast_fn;
56 #else
57 SEMANTIC_FN *sem_fast_fn;
58 #endif
59 #endif
60 #if WITH_SEM_SWITCH_FULL || WITH_SEM_SWITCH_FAST
61 #ifdef __GNUC__
62 void *sem_case;
63 #else
64 int sem_case;
65 #endif
66 #endif
67 } semantic;
68 struct argbuf argbuf;
69 };
70 #endif
71
72 #endif /* M32R_CPUALL_H */
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