sim/m32r/mainloop.in

   1 # This shell script emits C code. -*- C -*-
   2 # Main loop and support routines for the M32R.
   3 # Copyright (C) 1996, 1997 Free Software Foundation, Inc.
   4 # Contributed by Cygnus Support.
   5 #
   6 # This file is part of GDB, the GNU debugger.
   7 #
   8 # This program is free software; you can redistribute it and/or modify
   9 # it under the terms of the GNU General Public License as published by
  10 # the Free Software Foundation; either version 2, or (at your option)
  11 # any later version.
  12 #
  13 # This program is distributed in the hope that it will be useful,
  14 # but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 # GNU General Public License for more details.
  17 #
  18 # You should have received a copy of the GNU General Public License along
  19 # with this program; if not, write to the Free Software Foundation, Inc.,
  20 # 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  21
  22 # Syntax:
  23 # /bin/sh mainloop.in {init|normal|fast|support}
  24
  25 # ??? There's lots of conditional compilation here.
  26 # After a few more ports are done, revisit.
  27
  28 case "x$1" in
  29
  30 xinit)
  31
  32 cat <<EOF
  33 #if defined (WITH_SCACHE) && defined (USE_SEM_SWITCH) && defined (__GNUC__)
  34 {
  35   static decode_init_p = 0;
  36   if (! decode_init_p)
  37     {
  38 /* ??? Later maybe paste sem-switch.c in when building mainloop.c.  */
  39 #define DEFINE_LABELS
  40 #include "sem-switch.c"
  41       decode_init_p = 1;
  42     }
  43 }
  44 #endif
  45 EOF
  46
  47 ;;
  48
  49 xnormal | xfast)
  50
  51 cat <<EOF
  52
  53 #if WITH_SCACHE
  54
  55 {
  56   int hash;
  57   SCACHE *sc;
  58
  59   /* First step: look up current insn in hash table.  */
  60   hash = SCACHE_HASH_PC (sd, PC);
  61   sc = CPU_SCACHE_CACHE (current_cpu) + hash;
  62
  63   /* If the entry isn't the one we want (cache miss),
  64      fetch and decode the instruction.  */
  65   if (sc->argbuf.addr != PC)
  66     {
  67       PCADDR pc = PC;
  68       insn_t insn;
  69
  70 #if ! FAST
  71       PROFILE_COUNT_SCACHE_MISS (current_cpu);
  72 #endif
  73
  74       /* This only occurs when single stepping.
  75          The test is unnecessary otherwise, but the cost is teensy,
  76          compared with decoding/extraction.  */
  77       if (pc & 3)
  78         {
  79           insn = GETMEMUHI (current_cpu, pc);
  80           do_extract_insn16 (current_cpu, pc, insn & 0x7fff, sc, FAST);
  81         }
  82       else
  83         {
  84           insn = GETMEMUSI (current_cpu, pc);
  85
  86           if (insn & 0x80000000)
  87             {
  88               do_extract_insn32 (current_cpu, pc, insn, sc, FAST);
  89             }
  90           else
  91             {
  92               /* 2 16 bit insns.  Ignore parallel case for now
  93                  (2nd always nop).  Decode both as we know there's room.
  94                  ??? Could do a test for an unconditional branch in the
  95                  left slot if one wanted to.  */
  96               do_extract_insn16 (current_cpu, pc, insn >> 16, sc, FAST);
  97               do_extract_insn16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, FAST);
  98             }
  99         }
 100     }
 101 #if ! FAST
 102   else
 103     {
 104       PROFILE_COUNT_SCACHE_HIT (current_cpu);
 105     }
 106 #endif
 107
 108 #if 0 /*FIXME:wip*/
 109
 110   /* Run until we get a cache miss.  */
 111   do
 112     {
 113 #if ! FAST
 114       TRACE_INSN_INIT (current_cpu);
 115       TRACE_INSN (current_cpu, sc->argbuf.opcode, &sc->argbuf, sc->argbuf.addr);
 116 #endif
 117
 118       sc = (*sc->semantic.sem_fn) (current_cpu, sc);
 119
 120 #if ! FAST
 121       TRACE_INSN_FINI (current_cpu);
 122 #endif
 123     }
 124   while (sc->argbuf.addr == PC);
 125
 126 #if ! FAST
 127   PROFILE_COUNT_INSN (current_cpu, pc, CGEN_INSN_INDEX (sc->argbuf.opcode));
 128 #endif
 129
 130 #else /* !wip */
 131
 132 #if ! FAST
 133   TRACE_INSN_INIT (current_cpu);
 134   TRACE_INSN (current_cpu, sc->argbuf.opcode, &sc->argbuf, sc->argbuf.addr);
 135 #endif
 136
 137 #if FAST && defined (USE_SEM_SWITCH)
 138 #define DEFINE_SWITCH
 139 #include "sem-switch.c"
 140 #else
 141   PC = (*sc->semantic.sem_fn) (current_cpu, sc);
 142 #endif
 143
 144 #if ! FAST
 145   TRACE_INSN_FINI (current_cpu);
 146
 147   PROFILE_COUNT_INSN (current_cpu, pc, CGEN_INSN_INDEX (sc->argbuf.opcode));
 148 #endif
 149
 150 #endif /* !wip */
 151 }
 152
 153 #else /* ! WITH_SCACHE */
 154
 155 {
 156   insn_t insn;
 157
 158   if (PC & 3)
 159     {
 160       insn = GETMEMUHI (current_cpu, PC);
 161       PC = do_insn16 (current_cpu, PC, insn & 0x7fff);
 162     }
 163   else
 164     {
 165       insn = GETMEMUSI (current_cpu, PC);
 166
 167       if (insn & 0x80000000)
 168         {
 169           /* 32 bit insn */
 170           PC = do_insn32 (current_cpu, PC, insn);
 171         }
 172       else
 173         {
 174           /* 2 16 bit insns.  Ignore parallel case for now
 175              (2nd always nop).  */
 176
 177           PCADDR oldpc = PC;
 178           PC = do_insn16 (current_cpu, PC, insn >> 16);
 179           if (PC == oldpc + 2)
 180             {
 181               PC = do_insn16 (current_cpu, PC, insn & 0x7fff);
 182             }
 183         }
 184     }
 185 }
 186
 187 #endif /* ! WITH_SCACHE */
 188
 189 EOF
 190
 191 ;;
 192
 193 xsupport)
 194
 195 cat <<EOF
 196
 197 #if WITH_SCACHE
 198
 199 #ifdef __GNUC__
 200 #define DO_INLINE inline
 201 #else
 202 #define DO_INLINE
 203 #endif
 204
 205 /* FAST is optimized out by GCC.  */
 206
 207 static DO_INLINE void
 208 do_extract_insn16 (SIM_CPU *cpu, PCADDR pc, insn_t insn,
 209                    SCACHE *sc, int fast)
 210 {
 211   DECODE *d = decode (insn);
 212   (*d->extract) (cpu, pc, insn, &sc->argbuf);
 213   if (fast)
 214     {
 215 #ifdef USE_SEM_SWITCH
 216 #ifdef __GNUC__
 217       sc->semantic.sem_case = d->semantic_lab;
 218 #else
 219       sc->semantic.sem_case = d->insn_type;
 220 #endif
 221 #else
 222       sc->semantic.sem_fn = d->semantic_fast;
 223 #endif
 224     }
 225   else
 226     {
 227       sc->semantic.sem_fn = d->semantic_fast;
 228       sc->argbuf.opcode = d->opcode;
 229     }
 230   sc->next = pc + 2;
 231 }
 232
 233 static DO_INLINE void
 234 do_extract_insn32 (SIM_CPU *cpu, PCADDR pc, insn_t insn,
 235                    SCACHE *sc, int fast)
 236 {
 237   /* 32 bit insn */
 238   DECODE *d = decode (insn >> 16);
 239   (*d->extract) (cpu, pc, insn, &sc->argbuf);
 240   if (fast)
 241     {
 242 #ifdef USE_SEM_SWITCH
 243 #ifdef __GNUC__
 244       sc->semantic.sem_case = d->semantic_lab;
 245 #else
 246       sc->semantic.sem_case = d->insn_type;
 247 #endif
 248 #else
 249       sc->semantic.sem_fn = d->semantic_fast;
 250 #endif
 251     }
 252   else
 253     {
 254       sc->semantic.sem_fn = d->semantic_fast;
 255       sc->argbuf.opcode = d->opcode;
 256     }
 257   sc->next = pc + 4;
 258 }
 259
 260 #endif /* WITH_SCACHE */
 261
 262 static PCADDR
 263 do_insn16 (cpu, pc, insn)
 264      SIM_CPU *cpu;
 265      PCADDR pc;
 266      insn_t insn;
 267 {
 268   DECODE *d;
 269   ARGBUF argbuf;
 270
 271   d = decode (insn);
 272   (*d->extract) (cpu, pc, insn, &argbuf);
 273   argbuf.opcode = d->opcode;
 274
 275   TRACE_INSN_INIT (cpu);
 276   TRACE_INSN (cpu, d->opcode, &argbuf, pc);
 277
 278   pc = (*d->semantic) (cpu, &argbuf);
 279
 280   TRACE_INSN_FINI (cpu);
 281
 282   PROFILE_COUNT_INSN (cpu, pc, d->insn_type);
 283
 284   return pc;
 285 }
 286
 287 static PCADDR
 288 do_insn32 (cpu, pc, insn)
 289      SIM_CPU *cpu;
 290      PCADDR pc;
 291      insn_t insn;
 292 {
 293   DECODE *d;
 294   ARGBUF argbuf;
 295
 296   d = decode (insn >> 16);
 297   (*d->extract) (cpu, pc, insn, &argbuf);
 298   argbuf.opcode = d->opcode;
 299
 300   TRACE_INSN_INIT (cpu);
 301   TRACE_INSN (cpu, d->opcode, &argbuf, pc);
 302
 303   pc = (*d->semantic) (cpu, &argbuf);
 304
 305   TRACE_INSN_FINI (cpu);
 306
 307   PROFILE_COUNT_INSN (cpu, pc, d->insn_type);
 308
 309   return pc;
 310 }
 311
 312 EOF
 313
 314 ;;
 315
 316 *)
 317   echo "Invalid argument to mainloop.in: $1" >&2
 318   exit 1
 319   ;;
 320
 321 esac