sim/m32r/readx.c

   1 /* Simulator instruction operand reader for m32r.
   2
   3 This file is machine generated with CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26 #undef DEFINE_LABELS
  27
  28   /* The labels have the case they have because the enum of insn types
  29      is all uppercase and in the non-stdc case the fmt symbol is built
  30      into the enum name.
  31
  32      The order here must match the order in m32rx_decode_vars in decode.c.  */
  33
  34   static void *labels[] = {
  35     && case_read_READ_ILLEGAL,
  36     && case_read_READ_FMT_0_ADD,
  37     && case_read_READ_FMT_1_ADD3,
  38     && case_read_READ_FMT_0_ADD,
  39     && case_read_READ_FMT_2_AND3,
  40     && case_read_READ_FMT_0_ADD,
  41     && case_read_READ_FMT_3_OR3,
  42     && case_read_READ_FMT_0_ADD,
  43     && case_read_READ_FMT_2_AND3,
  44     && case_read_READ_FMT_4_ADDI,
  45     && case_read_READ_FMT_0_ADD,
  46     && case_read_READ_FMT_5_ADDV3,
  47     && case_read_READ_FMT_6_ADDX,
  48     && case_read_READ_FMT_7_BC8,
  49     && case_read_READ_FMT_8_BC24,
  50     && case_read_READ_FMT_9_BEQ,
  51     && case_read_READ_FMT_10_BEQZ,
  52     && case_read_READ_FMT_10_BEQZ,
  53     && case_read_READ_FMT_10_BEQZ,
  54     && case_read_READ_FMT_10_BEQZ,
  55     && case_read_READ_FMT_10_BEQZ,
  56     && case_read_READ_FMT_10_BEQZ,
  57     && case_read_READ_FMT_11_BL8,
  58     && case_read_READ_FMT_12_BL24,
  59     && case_read_READ_FMT_13_BCL8,
  60     && case_read_READ_FMT_14_BCL24,
  61     && case_read_READ_FMT_7_BC8,
  62     && case_read_READ_FMT_8_BC24,
  63     && case_read_READ_FMT_9_BEQ,
  64     && case_read_READ_FMT_15_BRA8,
  65     && case_read_READ_FMT_16_BRA24,
  66     && case_read_READ_FMT_13_BCL8,
  67     && case_read_READ_FMT_14_BCL24,
  68     && case_read_READ_FMT_17_CMP,
  69     && case_read_READ_FMT_18_CMPI,
  70     && case_read_READ_FMT_17_CMP,
  71     && case_read_READ_FMT_19_CMPUI,
  72     && case_read_READ_FMT_17_CMP,
  73     && case_read_READ_FMT_20_CMPZ,
  74     && case_read_READ_FMT_21_DIV,
  75     && case_read_READ_FMT_21_DIV,
  76     && case_read_READ_FMT_21_DIV,
  77     && case_read_READ_FMT_21_DIV,
  78     && case_read_READ_FMT_21_DIV,
  79     && case_read_READ_FMT_22_JC,
  80     && case_read_READ_FMT_22_JC,
  81     && case_read_READ_FMT_23_JL,
  82     && case_read_READ_FMT_24_JMP,
  83     && case_read_READ_FMT_25_LD,
  84     && case_read_READ_FMT_26_LD_D,
  85     && case_read_READ_FMT_27_LDB,
  86     && case_read_READ_FMT_28_LDB_D,
  87     && case_read_READ_FMT_29_LDH,
  88     && case_read_READ_FMT_30_LDH_D,
  89     && case_read_READ_FMT_27_LDB,
  90     && case_read_READ_FMT_28_LDB_D,
  91     && case_read_READ_FMT_29_LDH,
  92     && case_read_READ_FMT_30_LDH_D,
  93     && case_read_READ_FMT_25_LD,
  94     && case_read_READ_FMT_31_LD24,
  95     && case_read_READ_FMT_32_LDI8,
  96     && case_read_READ_FMT_33_LDI16,
  97     && case_read_READ_FMT_0_ADD,
  98     && case_read_READ_FMT_34_MACHI_A,
  99     && case_read_READ_FMT_34_MACHI_A,
 100     && case_read_READ_FMT_0_ADD,
 101     && case_read_READ_FMT_35_MULHI_A,
 102     && case_read_READ_FMT_35_MULHI_A,
 103     && case_read_READ_FMT_36_MV,
 104     && case_read_READ_FMT_37_MVFACHI_A,
 105     && case_read_READ_FMT_37_MVFACHI_A,
 106     && case_read_READ_FMT_37_MVFACHI_A,
 107     && case_read_READ_FMT_38_MVFC,
 108     && case_read_READ_FMT_39_MVTACHI_A,
 109     && case_read_READ_FMT_39_MVTACHI_A,
 110     && case_read_READ_FMT_40_MVTC,
 111     && case_read_READ_FMT_36_MV,
 112     && case_read_READ_FMT_41_NOP,
 113     && case_read_READ_FMT_36_MV,
 114     && case_read_READ_FMT_42_RAC_D,
 115     && case_read_READ_FMT_43_RAC_DS,
 116     && case_read_READ_FMT_44_RAC_DSI,
 117     && case_read_READ_FMT_42_RAC_D,
 118     && case_read_READ_FMT_43_RAC_DS,
 119     && case_read_READ_FMT_44_RAC_DSI,
 120     && case_read_READ_FMT_45_RTE,
 121     && case_read_READ_FMT_46_SETH,
 122     && case_read_READ_FMT_0_ADD,
 123     && case_read_READ_FMT_5_ADDV3,
 124     && case_read_READ_FMT_47_SLLI,
 125     && case_read_READ_FMT_0_ADD,
 126     && case_read_READ_FMT_5_ADDV3,
 127     && case_read_READ_FMT_47_SLLI,
 128     && case_read_READ_FMT_0_ADD,
 129     && case_read_READ_FMT_5_ADDV3,
 130     && case_read_READ_FMT_47_SLLI,
 131     && case_read_READ_FMT_17_CMP,
 132     && case_read_READ_FMT_48_ST_D,
 133     && case_read_READ_FMT_17_CMP,
 134     && case_read_READ_FMT_48_ST_D,
 135     && case_read_READ_FMT_17_CMP,
 136     && case_read_READ_FMT_48_ST_D,
 137     && case_read_READ_FMT_17_CMP,
 138     && case_read_READ_FMT_17_CMP,
 139     && case_read_READ_FMT_0_ADD,
 140     && case_read_READ_FMT_0_ADD,
 141     && case_read_READ_FMT_6_ADDX,
 142     && case_read_READ_FMT_49_TRAP,
 143     && case_read_READ_FMT_17_CMP,
 144     && case_read_READ_FMT_50_SATB,
 145     && case_read_READ_FMT_50_SATB,
 146     && case_read_READ_FMT_51_SAT,
 147     && case_read_READ_FMT_20_CMPZ,
 148     && case_read_READ_FMT_52_SADD,
 149     && case_read_READ_FMT_53_MACWU1,
 150     && case_read_READ_FMT_54_MSBLO,
 151     && case_read_READ_FMT_17_CMP,
 152     && case_read_READ_FMT_53_MACWU1,
 153     && case_read_READ_FMT_55_SC,
 154     && case_read_READ_FMT_55_SC,
 155     0
 156   };
 157   extern DECODE *m32rx_decode_vars[];
 158   int i;
 159
 160   for (i = 0; m32rx_decode_vars[i] != 0; ++i)
 161     m32rx_decode_vars[i]->read = labels[i];
 162
 163 #endif /* DEFINE_LABELS */
 164
 165 #ifdef DEFINE_SWITCH
 166 #undef DEFINE_SWITCH
 167
 168 {
 169   SWITCH (read, decode->read)
 170     {
 171
 172     CASE (read, READ_ILLEGAL) :
 173     {
 174       sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
 175     }
 176     BREAK (read);
 177
 178     CASE (read, READ_FMT_0_ADD) : /* e.g. add $dr,$sr */
 179     {
 180 #define OPRND(f) par_exec->operands.fmt_0_add.f
 181   EXTRACT_FMT_0_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 182   EXTRACT_FMT_0_ADD_CODE
 183
 184       /* Fetch the input operands for the semantic handler.  */
 185       OPRND (dr) = CPU (h_gr[f_r1]);
 186       OPRND (sr) = CPU (h_gr[f_r2]);
 187 #undef OPRND
 188     }
 189     BREAK (read);
 190
 191     CASE (read, READ_FMT_1_ADD3) : /* e.g. add3 $dr,$sr,#$slo16 */
 192     {
 193 #define OPRND(f) par_exec->operands.fmt_1_add3.f
 194   EXTRACT_FMT_1_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 195   EXTRACT_FMT_1_ADD3_CODE
 196
 197       /* Fetch the input operands for the semantic handler.  */
 198       OPRND (slo16) = f_simm16;
 199       OPRND (sr) = CPU (h_gr[f_r2]);
 200 #undef OPRND
 201     }
 202     BREAK (read);
 203
 204     CASE (read, READ_FMT_2_AND3) : /* e.g. and3 $dr,$sr,#$uimm16 */
 205     {
 206 #define OPRND(f) par_exec->operands.fmt_2_and3.f
 207   EXTRACT_FMT_2_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 208   EXTRACT_FMT_2_AND3_CODE
 209
 210       /* Fetch the input operands for the semantic handler.  */
 211       OPRND (sr) = CPU (h_gr[f_r2]);
 212       OPRND (uimm16) = f_uimm16;
 213 #undef OPRND
 214     }
 215     BREAK (read);
 216
 217     CASE (read, READ_FMT_3_OR3) : /* e.g. or3 $dr,$sr,#$ulo16 */
 218     {
 219 #define OPRND(f) par_exec->operands.fmt_3_or3.f
 220   EXTRACT_FMT_3_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 221   EXTRACT_FMT_3_OR3_CODE
 222
 223       /* Fetch the input operands for the semantic handler.  */
 224       OPRND (sr) = CPU (h_gr[f_r2]);
 225       OPRND (ulo16) = f_uimm16;
 226 #undef OPRND
 227     }
 228     BREAK (read);
 229
 230     CASE (read, READ_FMT_4_ADDI) : /* e.g. addi $dr,#$simm8 */
 231     {
 232 #define OPRND(f) par_exec->operands.fmt_4_addi.f
 233   EXTRACT_FMT_4_ADDI_VARS /* f-op1 f-r1 f-simm8 */
 234   EXTRACT_FMT_4_ADDI_CODE
 235
 236       /* Fetch the input operands for the semantic handler.  */
 237       OPRND (dr) = CPU (h_gr[f_r1]);
 238       OPRND (simm8) = f_simm8;
 239 #undef OPRND
 240     }
 241     BREAK (read);
 242
 243     CASE (read, READ_FMT_5_ADDV3) : /* e.g. addv3 $dr,$sr,#$simm16 */
 244     {
 245 #define OPRND(f) par_exec->operands.fmt_5_addv3.f
 246   EXTRACT_FMT_5_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 247   EXTRACT_FMT_5_ADDV3_CODE
 248
 249       /* Fetch the input operands for the semantic handler.  */
 250       OPRND (simm16) = f_simm16;
 251       OPRND (sr) = CPU (h_gr[f_r2]);
 252 #undef OPRND
 253     }
 254     BREAK (read);
 255
 256     CASE (read, READ_FMT_6_ADDX) : /* e.g. addx $dr,$sr */
 257     {
 258 #define OPRND(f) par_exec->operands.fmt_6_addx.f
 259   EXTRACT_FMT_6_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
 260   EXTRACT_FMT_6_ADDX_CODE
 261
 262       /* Fetch the input operands for the semantic handler.  */
 263       OPRND (condbit) = CPU (h_cond);
 264       OPRND (dr) = CPU (h_gr[f_r1]);
 265       OPRND (sr) = CPU (h_gr[f_r2]);
 266 #undef OPRND
 267     }
 268     BREAK (read);
 269
 270     CASE (read, READ_FMT_7_BC8) : /* e.g. bc $disp8 */
 271     {
 272 #define OPRND(f) par_exec->operands.fmt_7_bc8.f
 273   EXTRACT_FMT_7_BC8_VARS /* f-op1 f-r1 f-disp8 */
 274   EXTRACT_FMT_7_BC8_CODE
 275
 276       /* Fetch the input operands for the semantic handler.  */
 277       OPRND (condbit) = CPU (h_cond);
 278       OPRND (disp8) = f_disp8;
 279 #undef OPRND
 280     }
 281     BREAK (read);
 282
 283     CASE (read, READ_FMT_8_BC24) : /* e.g. bc $disp24 */
 284     {
 285 #define OPRND(f) par_exec->operands.fmt_8_bc24.f
 286   EXTRACT_FMT_8_BC24_VARS /* f-op1 f-r1 f-disp24 */
 287   EXTRACT_FMT_8_BC24_CODE
 288
 289       /* Fetch the input operands for the semantic handler.  */
 290       OPRND (condbit) = CPU (h_cond);
 291       OPRND (disp24) = f_disp24;
 292 #undef OPRND
 293     }
 294     BREAK (read);
 295
 296     CASE (read, READ_FMT_9_BEQ) : /* e.g. beq $src1,$src2,$disp16 */
 297     {
 298 #define OPRND(f) par_exec->operands.fmt_9_beq.f
 299   EXTRACT_FMT_9_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 300   EXTRACT_FMT_9_BEQ_CODE
 301
 302       /* Fetch the input operands for the semantic handler.  */
 303       OPRND (disp16) = f_disp16;
 304       OPRND (src1) = CPU (h_gr[f_r1]);
 305       OPRND (src2) = CPU (h_gr[f_r2]);
 306 #undef OPRND
 307     }
 308     BREAK (read);
 309
 310     CASE (read, READ_FMT_10_BEQZ) : /* e.g. beqz $src2,$disp16 */
 311     {
 312 #define OPRND(f) par_exec->operands.fmt_10_beqz.f
 313   EXTRACT_FMT_10_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 314   EXTRACT_FMT_10_BEQZ_CODE
 315
 316       /* Fetch the input operands for the semantic handler.  */
 317       OPRND (disp16) = f_disp16;
 318       OPRND (src2) = CPU (h_gr[f_r2]);
 319 #undef OPRND
 320     }
 321     BREAK (read);
 322
 323     CASE (read, READ_FMT_11_BL8) : /* e.g. bl $disp8 */
 324     {
 325 #define OPRND(f) par_exec->operands.fmt_11_bl8.f
 326   EXTRACT_FMT_11_BL8_VARS /* f-op1 f-r1 f-disp8 */
 327   EXTRACT_FMT_11_BL8_CODE
 328
 329       /* Fetch the input operands for the semantic handler.  */
 330       OPRND (disp8) = f_disp8;
 331       OPRND (pc) = CPU (h_pc);
 332 #undef OPRND
 333     }
 334     BREAK (read);
 335
 336     CASE (read, READ_FMT_12_BL24) : /* e.g. bl $disp24 */
 337     {
 338 #define OPRND(f) par_exec->operands.fmt_12_bl24.f
 339   EXTRACT_FMT_12_BL24_VARS /* f-op1 f-r1 f-disp24 */
 340   EXTRACT_FMT_12_BL24_CODE
 341
 342       /* Fetch the input operands for the semantic handler.  */
 343       OPRND (disp24) = f_disp24;
 344       OPRND (pc) = CPU (h_pc);
 345 #undef OPRND
 346     }
 347     BREAK (read);
 348
 349     CASE (read, READ_FMT_13_BCL8) : /* e.g. bcl $disp8 */
 350     {
 351 #define OPRND(f) par_exec->operands.fmt_13_bcl8.f
 352   EXTRACT_FMT_13_BCL8_VARS /* f-op1 f-r1 f-disp8 */
 353   EXTRACT_FMT_13_BCL8_CODE
 354
 355       /* Fetch the input operands for the semantic handler.  */
 356       OPRND (condbit) = CPU (h_cond);
 357       OPRND (disp8) = f_disp8;
 358       OPRND (pc) = CPU (h_pc);
 359 #undef OPRND
 360     }
 361     BREAK (read);
 362
 363     CASE (read, READ_FMT_14_BCL24) : /* e.g. bcl $disp24 */
 364     {
 365 #define OPRND(f) par_exec->operands.fmt_14_bcl24.f
 366   EXTRACT_FMT_14_BCL24_VARS /* f-op1 f-r1 f-disp24 */
 367   EXTRACT_FMT_14_BCL24_CODE
 368
 369       /* Fetch the input operands for the semantic handler.  */
 370       OPRND (condbit) = CPU (h_cond);
 371       OPRND (disp24) = f_disp24;
 372       OPRND (pc) = CPU (h_pc);
 373 #undef OPRND
 374     }
 375     BREAK (read);
 376
 377     CASE (read, READ_FMT_15_BRA8) : /* e.g. bra $disp8 */
 378     {
 379 #define OPRND(f) par_exec->operands.fmt_15_bra8.f
 380   EXTRACT_FMT_15_BRA8_VARS /* f-op1 f-r1 f-disp8 */
 381   EXTRACT_FMT_15_BRA8_CODE
 382
 383       /* Fetch the input operands for the semantic handler.  */
 384       OPRND (disp8) = f_disp8;
 385 #undef OPRND
 386     }
 387     BREAK (read);
 388
 389     CASE (read, READ_FMT_16_BRA24) : /* e.g. bra $disp24 */
 390     {
 391 #define OPRND(f) par_exec->operands.fmt_16_bra24.f
 392   EXTRACT_FMT_16_BRA24_VARS /* f-op1 f-r1 f-disp24 */
 393   EXTRACT_FMT_16_BRA24_CODE
 394
 395       /* Fetch the input operands for the semantic handler.  */
 396       OPRND (disp24) = f_disp24;
 397 #undef OPRND
 398     }
 399     BREAK (read);
 400
 401     CASE (read, READ_FMT_17_CMP) : /* e.g. cmp $src1,$src2 */
 402     {
 403 #define OPRND(f) par_exec->operands.fmt_17_cmp.f
 404   EXTRACT_FMT_17_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 405   EXTRACT_FMT_17_CMP_CODE
 406
 407       /* Fetch the input operands for the semantic handler.  */
 408       OPRND (src1) = CPU (h_gr[f_r1]);
 409       OPRND (src2) = CPU (h_gr[f_r2]);
 410 #undef OPRND
 411     }
 412     BREAK (read);
 413
 414     CASE (read, READ_FMT_18_CMPI) : /* e.g. cmpi $src2,#$simm16 */
 415     {
 416 #define OPRND(f) par_exec->operands.fmt_18_cmpi.f
 417   EXTRACT_FMT_18_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 418   EXTRACT_FMT_18_CMPI_CODE
 419
 420       /* Fetch the input operands for the semantic handler.  */
 421       OPRND (simm16) = f_simm16;
 422       OPRND (src2) = CPU (h_gr[f_r2]);
 423 #undef OPRND
 424     }
 425     BREAK (read);
 426
 427     CASE (read, READ_FMT_19_CMPUI) : /* e.g. cmpui $src2,#$uimm16 */
 428     {
 429 #define OPRND(f) par_exec->operands.fmt_19_cmpui.f
 430   EXTRACT_FMT_19_CMPUI_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 431   EXTRACT_FMT_19_CMPUI_CODE
 432
 433       /* Fetch the input operands for the semantic handler.  */
 434       OPRND (src2) = CPU (h_gr[f_r2]);
 435       OPRND (uimm16) = f_uimm16;
 436 #undef OPRND
 437     }
 438     BREAK (read);
 439
 440     CASE (read, READ_FMT_20_CMPZ) : /* e.g. cmpz $src2 */
 441     {
 442 #define OPRND(f) par_exec->operands.fmt_20_cmpz.f
 443   EXTRACT_FMT_20_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
 444   EXTRACT_FMT_20_CMPZ_CODE
 445
 446       /* Fetch the input operands for the semantic handler.  */
 447       OPRND (src2) = CPU (h_gr[f_r2]);
 448 #undef OPRND
 449     }
 450     BREAK (read);
 451
 452     CASE (read, READ_FMT_21_DIV) : /* e.g. div $dr,$sr */
 453     {
 454 #define OPRND(f) par_exec->operands.fmt_21_div.f
 455   EXTRACT_FMT_21_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 456   EXTRACT_FMT_21_DIV_CODE
 457
 458       /* Fetch the input operands for the semantic handler.  */
 459       OPRND (dr) = CPU (h_gr[f_r1]);
 460       OPRND (sr) = CPU (h_gr[f_r2]);
 461 #undef OPRND
 462     }
 463     BREAK (read);
 464
 465     CASE (read, READ_FMT_22_JC) : /* e.g. jc $sr */
 466     {
 467 #define OPRND(f) par_exec->operands.fmt_22_jc.f
 468   EXTRACT_FMT_22_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 469   EXTRACT_FMT_22_JC_CODE
 470
 471       /* Fetch the input operands for the semantic handler.  */
 472       OPRND (condbit) = CPU (h_cond);
 473       OPRND (sr) = CPU (h_gr[f_r2]);
 474 #undef OPRND
 475     }
 476     BREAK (read);
 477
 478     CASE (read, READ_FMT_23_JL) : /* e.g. jl $sr */
 479     {
 480 #define OPRND(f) par_exec->operands.fmt_23_jl.f
 481   EXTRACT_FMT_23_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
 482   EXTRACT_FMT_23_JL_CODE
 483
 484       /* Fetch the input operands for the semantic handler.  */
 485       OPRND (pc) = CPU (h_pc);
 486       OPRND (sr) = CPU (h_gr[f_r2]);
 487 #undef OPRND
 488     }
 489     BREAK (read);
 490
 491     CASE (read, READ_FMT_24_JMP) : /* e.g. jmp $sr */
 492     {
 493 #define OPRND(f) par_exec->operands.fmt_24_jmp.f
 494   EXTRACT_FMT_24_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 495   EXTRACT_FMT_24_JMP_CODE
 496
 497       /* Fetch the input operands for the semantic handler.  */
 498       OPRND (sr) = CPU (h_gr[f_r2]);
 499 #undef OPRND
 500     }
 501     BREAK (read);
 502
 503     CASE (read, READ_FMT_25_LD) : /* e.g. ld $dr,@$sr */
 504     {
 505 #define OPRND(f) par_exec->operands.fmt_25_ld.f
 506   EXTRACT_FMT_25_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 507   EXTRACT_FMT_25_LD_CODE
 508
 509       /* Fetch the input operands for the semantic handler.  */
 510       OPRND (h_memory_sr) = GETMEMSI (current_cpu, CPU (h_gr[f_r2]));
 511       OPRND (sr) = CPU (h_gr[f_r2]);
 512 #undef OPRND
 513     }
 514     BREAK (read);
 515
 516     CASE (read, READ_FMT_26_LD_D) : /* e.g. ld $dr,@($slo16,$sr) */
 517     {
 518 #define OPRND(f) par_exec->operands.fmt_26_ld_d.f
 519   EXTRACT_FMT_26_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 520   EXTRACT_FMT_26_LD_D_CODE
 521
 522       /* Fetch the input operands for the semantic handler.  */
 523       OPRND (h_memory_add_WI_sr_slo16) = GETMEMSI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
 524       OPRND (slo16) = f_simm16;
 525       OPRND (sr) = CPU (h_gr[f_r2]);
 526 #undef OPRND
 527     }
 528     BREAK (read);
 529
 530     CASE (read, READ_FMT_27_LDB) : /* e.g. ldb $dr,@$sr */
 531     {
 532 #define OPRND(f) par_exec->operands.fmt_27_ldb.f
 533   EXTRACT_FMT_27_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
 534   EXTRACT_FMT_27_LDB_CODE
 535
 536       /* Fetch the input operands for the semantic handler.  */
 537       OPRND (h_memory_sr) = GETMEMQI (current_cpu, CPU (h_gr[f_r2]));
 538       OPRND (sr) = CPU (h_gr[f_r2]);
 539 #undef OPRND
 540     }
 541     BREAK (read);
 542
 543     CASE (read, READ_FMT_28_LDB_D) : /* e.g. ldb $dr,@($slo16,$sr) */
 544     {
 545 #define OPRND(f) par_exec->operands.fmt_28_ldb_d.f
 546   EXTRACT_FMT_28_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 547   EXTRACT_FMT_28_LDB_D_CODE
 548
 549       /* Fetch the input operands for the semantic handler.  */
 550       OPRND (h_memory_add_WI_sr_slo16) = GETMEMQI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
 551       OPRND (slo16) = f_simm16;
 552       OPRND (sr) = CPU (h_gr[f_r2]);
 553 #undef OPRND
 554     }
 555     BREAK (read);
 556
 557     CASE (read, READ_FMT_29_LDH) : /* e.g. ldh $dr,@$sr */
 558     {
 559 #define OPRND(f) par_exec->operands.fmt_29_ldh.f
 560   EXTRACT_FMT_29_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
 561   EXTRACT_FMT_29_LDH_CODE
 562
 563       /* Fetch the input operands for the semantic handler.  */
 564       OPRND (h_memory_sr) = GETMEMHI (current_cpu, CPU (h_gr[f_r2]));
 565       OPRND (sr) = CPU (h_gr[f_r2]);
 566 #undef OPRND
 567     }
 568     BREAK (read);
 569
 570     CASE (read, READ_FMT_30_LDH_D) : /* e.g. ldh $dr,@($slo16,$sr) */
 571     {
 572 #define OPRND(f) par_exec->operands.fmt_30_ldh_d.f
 573   EXTRACT_FMT_30_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 574   EXTRACT_FMT_30_LDH_D_CODE
 575
 576       /* Fetch the input operands for the semantic handler.  */
 577       OPRND (h_memory_add_WI_sr_slo16) = GETMEMHI (current_cpu, ADDSI (CPU (h_gr[f_r2]), f_simm16));
 578       OPRND (slo16) = f_simm16;
 579       OPRND (sr) = CPU (h_gr[f_r2]);
 580 #undef OPRND
 581     }
 582     BREAK (read);
 583
 584     CASE (read, READ_FMT_31_LD24) : /* e.g. ld24 $dr,#$uimm24 */
 585     {
 586 #define OPRND(f) par_exec->operands.fmt_31_ld24.f
 587   EXTRACT_FMT_31_LD24_VARS /* f-op1 f-r1 f-uimm24 */
 588   EXTRACT_FMT_31_LD24_CODE
 589
 590       /* Fetch the input operands for the semantic handler.  */
 591       OPRND (uimm24) = f_uimm24;
 592 #undef OPRND
 593     }
 594     BREAK (read);
 595
 596     CASE (read, READ_FMT_32_LDI8) : /* e.g. ldi $dr,#$simm8 */
 597     {
 598 #define OPRND(f) par_exec->operands.fmt_32_ldi8.f
 599   EXTRACT_FMT_32_LDI8_VARS /* f-op1 f-r1 f-simm8 */
 600   EXTRACT_FMT_32_LDI8_CODE
 601
 602       /* Fetch the input operands for the semantic handler.  */
 603       OPRND (simm8) = f_simm8;
 604 #undef OPRND
 605     }
 606     BREAK (read);
 607
 608     CASE (read, READ_FMT_33_LDI16) : /* e.g. ldi $dr,$slo16 */
 609     {
 610 #define OPRND(f) par_exec->operands.fmt_33_ldi16.f
 611   EXTRACT_FMT_33_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 612   EXTRACT_FMT_33_LDI16_CODE
 613
 614       /* Fetch the input operands for the semantic handler.  */
 615       OPRND (slo16) = f_simm16;
 616 #undef OPRND
 617     }
 618     BREAK (read);
 619
 620     CASE (read, READ_FMT_34_MACHI_A) : /* e.g. machi $src1,$src2,$acc */
 621     {
 622 #define OPRND(f) par_exec->operands.fmt_34_machi_a.f
 623   EXTRACT_FMT_34_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
 624   EXTRACT_FMT_34_MACHI_A_CODE
 625
 626       /* Fetch the input operands for the semantic handler.  */
 627       OPRND (acc) = m32rx_h_accums_get (current_cpu, f_acc);
 628       OPRND (src1) = CPU (h_gr[f_r1]);
 629       OPRND (src2) = CPU (h_gr[f_r2]);
 630 #undef OPRND
 631     }
 632     BREAK (read);
 633
 634     CASE (read, READ_FMT_35_MULHI_A) : /* e.g. mulhi $src1,$src2,$acc */
 635     {
 636 #define OPRND(f) par_exec->operands.fmt_35_mulhi_a.f
 637   EXTRACT_FMT_35_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
 638   EXTRACT_FMT_35_MULHI_A_CODE
 639
 640       /* Fetch the input operands for the semantic handler.  */
 641       OPRND (src1) = CPU (h_gr[f_r1]);
 642       OPRND (src2) = CPU (h_gr[f_r2]);
 643 #undef OPRND
 644     }
 645     BREAK (read);
 646
 647     CASE (read, READ_FMT_36_MV) : /* e.g. mv $dr,$sr */
 648     {
 649 #define OPRND(f) par_exec->operands.fmt_36_mv.f
 650   EXTRACT_FMT_36_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
 651   EXTRACT_FMT_36_MV_CODE
 652
 653       /* Fetch the input operands for the semantic handler.  */
 654       OPRND (sr) = CPU (h_gr[f_r2]);
 655 #undef OPRND
 656     }
 657     BREAK (read);
 658
 659     CASE (read, READ_FMT_37_MVFACHI_A) : /* e.g. mvfachi $dr,$accs */
 660     {
 661 #define OPRND(f) par_exec->operands.fmt_37_mvfachi_a.f
 662   EXTRACT_FMT_37_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
 663   EXTRACT_FMT_37_MVFACHI_A_CODE
 664
 665       /* Fetch the input operands for the semantic handler.  */
 666       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 667 #undef OPRND
 668     }
 669     BREAK (read);
 670
 671     CASE (read, READ_FMT_38_MVFC) : /* e.g. mvfc $dr,$scr */
 672     {
 673 #define OPRND(f) par_exec->operands.fmt_38_mvfc.f
 674   EXTRACT_FMT_38_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 675   EXTRACT_FMT_38_MVFC_CODE
 676
 677       /* Fetch the input operands for the semantic handler.  */
 678       OPRND (scr) = m32rx_h_cr_get (current_cpu, f_r2);
 679 #undef OPRND
 680     }
 681     BREAK (read);
 682
 683     CASE (read, READ_FMT_39_MVTACHI_A) : /* e.g. mvtachi $src1,$accs */
 684     {
 685 #define OPRND(f) par_exec->operands.fmt_39_mvtachi_a.f
 686   EXTRACT_FMT_39_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
 687   EXTRACT_FMT_39_MVTACHI_A_CODE
 688
 689       /* Fetch the input operands for the semantic handler.  */
 690       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 691       OPRND (src1) = CPU (h_gr[f_r1]);
 692 #undef OPRND
 693     }
 694     BREAK (read);
 695
 696     CASE (read, READ_FMT_40_MVTC) : /* e.g. mvtc $sr,$dcr */
 697     {
 698 #define OPRND(f) par_exec->operands.fmt_40_mvtc.f
 699   EXTRACT_FMT_40_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 700   EXTRACT_FMT_40_MVTC_CODE
 701
 702       /* Fetch the input operands for the semantic handler.  */
 703       OPRND (sr) = CPU (h_gr[f_r2]);
 704 #undef OPRND
 705     }
 706     BREAK (read);
 707
 708     CASE (read, READ_FMT_41_NOP) : /* e.g. nop */
 709     {
 710 #define OPRND(f) par_exec->operands.fmt_41_nop.f
 711   EXTRACT_FMT_41_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 712   EXTRACT_FMT_41_NOP_CODE
 713
 714       /* Fetch the input operands for the semantic handler.  */
 715 #undef OPRND
 716     }
 717     BREAK (read);
 718
 719     CASE (read, READ_FMT_42_RAC_D) : /* e.g. rac $accd */
 720     {
 721 #define OPRND(f) par_exec->operands.fmt_42_rac_d.f
 722   EXTRACT_FMT_42_RAC_D_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
 723   EXTRACT_FMT_42_RAC_D_CODE
 724
 725       /* Fetch the input operands for the semantic handler.  */
 726       OPRND (accum) = CPU (h_accum);
 727 #undef OPRND
 728     }
 729     BREAK (read);
 730
 731     CASE (read, READ_FMT_43_RAC_DS) : /* e.g. rac $accd,$accs */
 732     {
 733 #define OPRND(f) par_exec->operands.fmt_43_rac_ds.f
 734   EXTRACT_FMT_43_RAC_DS_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
 735   EXTRACT_FMT_43_RAC_DS_CODE
 736
 737       /* Fetch the input operands for the semantic handler.  */
 738       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 739 #undef OPRND
 740     }
 741     BREAK (read);
 742
 743     CASE (read, READ_FMT_44_RAC_DSI) : /* e.g. rac $accd,$accs,#$imm1 */
 744     {
 745 #define OPRND(f) par_exec->operands.fmt_44_rac_dsi.f
 746   EXTRACT_FMT_44_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
 747   EXTRACT_FMT_44_RAC_DSI_CODE
 748
 749       /* Fetch the input operands for the semantic handler.  */
 750       OPRND (accs) = m32rx_h_accums_get (current_cpu, f_accs);
 751       OPRND (imm1) = f_imm1;
 752 #undef OPRND
 753     }
 754     BREAK (read);
 755
 756     CASE (read, READ_FMT_45_RTE) : /* e.g. rte */
 757     {
 758 #define OPRND(f) par_exec->operands.fmt_45_rte.f
 759   EXTRACT_FMT_45_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
 760   EXTRACT_FMT_45_RTE_CODE
 761
 762       /* Fetch the input operands for the semantic handler.  */
 763       OPRND (h_bcond_0) = CPU (h_bcond);
 764       OPRND (h_bie_0) = CPU (h_bie);
 765       OPRND (h_bpc_0) = CPU (h_bpc);
 766       OPRND (h_bsm_0) = CPU (h_bsm);
 767 #undef OPRND
 768     }
 769     BREAK (read);
 770
 771     CASE (read, READ_FMT_46_SETH) : /* e.g. seth $dr,#$hi16 */
 772     {
 773 #define OPRND(f) par_exec->operands.fmt_46_seth.f
 774   EXTRACT_FMT_46_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
 775   EXTRACT_FMT_46_SETH_CODE
 776
 777       /* Fetch the input operands for the semantic handler.  */
 778       OPRND (hi16) = f_hi16;
 779 #undef OPRND
 780     }
 781     BREAK (read);
 782
 783     CASE (read, READ_FMT_47_SLLI) : /* e.g. slli $dr,#$uimm5 */
 784     {
 785 #define OPRND(f) par_exec->operands.fmt_47_slli.f
 786   EXTRACT_FMT_47_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
 787   EXTRACT_FMT_47_SLLI_CODE
 788
 789       /* Fetch the input operands for the semantic handler.  */
 790       OPRND (dr) = CPU (h_gr[f_r1]);
 791       OPRND (uimm5) = f_uimm5;
 792 #undef OPRND
 793     }
 794     BREAK (read);
 795
 796     CASE (read, READ_FMT_48_ST_D) : /* e.g. st $src1,@($slo16,$src2) */
 797     {
 798 #define OPRND(f) par_exec->operands.fmt_48_st_d.f
 799   EXTRACT_FMT_48_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 800   EXTRACT_FMT_48_ST_D_CODE
 801
 802       /* Fetch the input operands for the semantic handler.  */
 803       OPRND (slo16) = f_simm16;
 804       OPRND (src1) = CPU (h_gr[f_r1]);
 805       OPRND (src2) = CPU (h_gr[f_r2]);
 806 #undef OPRND
 807     }
 808     BREAK (read);
 809
 810     CASE (read, READ_FMT_49_TRAP) : /* e.g. trap #$uimm4 */
 811     {
 812 #define OPRND(f) par_exec->operands.fmt_49_trap.f
 813   EXTRACT_FMT_49_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
 814   EXTRACT_FMT_49_TRAP_CODE
 815
 816       /* Fetch the input operands for the semantic handler.  */
 817       OPRND (uimm4) = f_uimm4;
 818 #undef OPRND
 819     }
 820     BREAK (read);
 821
 822     CASE (read, READ_FMT_50_SATB) : /* e.g. satb $dr,$src2 */
 823     {
 824 #define OPRND(f) par_exec->operands.fmt_50_satb.f
 825   EXTRACT_FMT_50_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 826   EXTRACT_FMT_50_SATB_CODE
 827
 828       /* Fetch the input operands for the semantic handler.  */
 829       OPRND (src2) = CPU (h_gr[f_r2]);
 830 #undef OPRND
 831     }
 832     BREAK (read);
 833
 834     CASE (read, READ_FMT_51_SAT) : /* e.g. sat $dr,$src2 */
 835     {
 836 #define OPRND(f) par_exec->operands.fmt_51_sat.f
 837   EXTRACT_FMT_51_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 838   EXTRACT_FMT_51_SAT_CODE
 839
 840       /* Fetch the input operands for the semantic handler.  */
 841       OPRND (condbit) = CPU (h_cond);
 842       OPRND (src2) = CPU (h_gr[f_r2]);
 843 #undef OPRND
 844     }
 845     BREAK (read);
 846
 847     CASE (read, READ_FMT_52_SADD) : /* e.g. sadd */
 848     {
 849 #define OPRND(f) par_exec->operands.fmt_52_sadd.f
 850   EXTRACT_FMT_52_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 851   EXTRACT_FMT_52_SADD_CODE
 852
 853       /* Fetch the input operands for the semantic handler.  */
 854       OPRND (h_accums_0) = m32rx_h_accums_get (current_cpu, 0);
 855       OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1);
 856 #undef OPRND
 857     }
 858     BREAK (read);
 859
 860     CASE (read, READ_FMT_53_MACWU1) : /* e.g. macwu1 $src1,$src2 */
 861     {
 862 #define OPRND(f) par_exec->operands.fmt_53_macwu1.f
 863   EXTRACT_FMT_53_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
 864   EXTRACT_FMT_53_MACWU1_CODE
 865
 866       /* Fetch the input operands for the semantic handler.  */
 867       OPRND (h_accums_1) = m32rx_h_accums_get (current_cpu, 1);
 868       OPRND (src1) = CPU (h_gr[f_r1]);
 869       OPRND (src2) = CPU (h_gr[f_r2]);
 870 #undef OPRND
 871     }
 872     BREAK (read);
 873
 874     CASE (read, READ_FMT_54_MSBLO) : /* e.g. msblo $src1,$src2 */
 875     {
 876 #define OPRND(f) par_exec->operands.fmt_54_msblo.f
 877   EXTRACT_FMT_54_MSBLO_VARS /* f-op1 f-r1 f-op2 f-r2 */
 878   EXTRACT_FMT_54_MSBLO_CODE
 879
 880       /* Fetch the input operands for the semantic handler.  */
 881       OPRND (accum) = CPU (h_accum);
 882       OPRND (src1) = CPU (h_gr[f_r1]);
 883       OPRND (src2) = CPU (h_gr[f_r2]);
 884 #undef OPRND
 885     }
 886     BREAK (read);
 887
 888     CASE (read, READ_FMT_55_SC) : /* e.g. sc */
 889     {
 890 #define OPRND(f) par_exec->operands.fmt_55_sc.f
 891   EXTRACT_FMT_55_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
 892   EXTRACT_FMT_55_SC_CODE
 893
 894       /* Fetch the input operands for the semantic handler.  */
 895       OPRND (condbit) = CPU (h_cond);
 896 #undef OPRND
 897     }
 898     BREAK (read);
 899
 900     }
 901   ENDSWITCH (read) /* End of read switch.  */
 902 }
 903
 904 #endif /* DEFINE_SWITCH */