sim/m32r/sem-switch.c

   1 /* Simulator instruction semantics for m32r.
   2
   3 This file is machine generated with CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26 #undef DEFINE_LABELS
  27
  28   /* The labels have the case they have because the enum of insn types
  29      is all uppercase and in the non-stdc case the insn symbol is built
  30      into the enum name.
  31
  32      The order here must match the order in m32r_decode_vars in decode.c.  */
  33
  34   static void *labels[] = {
  35     && case_sem_INSN_ILLEGAL,
  36     && case_sem_INSN_ADD,
  37     && case_sem_INSN_ADD3,
  38     && case_sem_INSN_AND,
  39     && case_sem_INSN_AND3,
  40     && case_sem_INSN_OR,
  41     && case_sem_INSN_OR3,
  42     && case_sem_INSN_XOR,
  43     && case_sem_INSN_XOR3,
  44     && case_sem_INSN_ADDI,
  45     && case_sem_INSN_ADDV,
  46     && case_sem_INSN_ADDV3,
  47     && case_sem_INSN_ADDX,
  48     && case_sem_INSN_BC8,
  49     && case_sem_INSN_BC24,
  50     && case_sem_INSN_BEQ,
  51     && case_sem_INSN_BEQZ,
  52     && case_sem_INSN_BGEZ,
  53     && case_sem_INSN_BGTZ,
  54     && case_sem_INSN_BLEZ,
  55     && case_sem_INSN_BLTZ,
  56     && case_sem_INSN_BNEZ,
  57     && case_sem_INSN_BL8,
  58     && case_sem_INSN_BL24,
  59     && case_sem_INSN_BNC8,
  60     && case_sem_INSN_BNC24,
  61     && case_sem_INSN_BNE,
  62     && case_sem_INSN_BRA8,
  63     && case_sem_INSN_BRA24,
  64     && case_sem_INSN_CMP,
  65     && case_sem_INSN_CMPI,
  66     && case_sem_INSN_CMPU,
  67     && case_sem_INSN_CMPUI,
  68     && case_sem_INSN_DIV,
  69     && case_sem_INSN_DIVU,
  70     && case_sem_INSN_REM,
  71     && case_sem_INSN_REMU,
  72     && case_sem_INSN_JL,
  73     && case_sem_INSN_JMP,
  74     && case_sem_INSN_LD,
  75     && case_sem_INSN_LD_D,
  76     && case_sem_INSN_LDB,
  77     && case_sem_INSN_LDB_D,
  78     && case_sem_INSN_LDH,
  79     && case_sem_INSN_LDH_D,
  80     && case_sem_INSN_LDUB,
  81     && case_sem_INSN_LDUB_D,
  82     && case_sem_INSN_LDUH,
  83     && case_sem_INSN_LDUH_D,
  84     && case_sem_INSN_LD_PLUS,
  85     && case_sem_INSN_LD24,
  86     && case_sem_INSN_LDI8,
  87     && case_sem_INSN_LDI16,
  88     && case_sem_INSN_LOCK,
  89     && case_sem_INSN_MACHI,
  90     && case_sem_INSN_MACLO,
  91     && case_sem_INSN_MACWHI,
  92     && case_sem_INSN_MACWLO,
  93     && case_sem_INSN_MUL,
  94     && case_sem_INSN_MULHI,
  95     && case_sem_INSN_MULLO,
  96     && case_sem_INSN_MULWHI,
  97     && case_sem_INSN_MULWLO,
  98     && case_sem_INSN_MV,
  99     && case_sem_INSN_MVFACHI,
 100     && case_sem_INSN_MVFACLO,
 101     && case_sem_INSN_MVFACMI,
 102     && case_sem_INSN_MVFC,
 103     && case_sem_INSN_MVTACHI,
 104     && case_sem_INSN_MVTACLO,
 105     && case_sem_INSN_MVTC,
 106     && case_sem_INSN_NEG,
 107     && case_sem_INSN_NOP,
 108     && case_sem_INSN_NOT,
 109     && case_sem_INSN_RAC,
 110     && case_sem_INSN_RACH,
 111     && case_sem_INSN_RTE,
 112     && case_sem_INSN_SETH,
 113     && case_sem_INSN_SLL,
 114     && case_sem_INSN_SLL3,
 115     && case_sem_INSN_SLLI,
 116     && case_sem_INSN_SRA,
 117     && case_sem_INSN_SRA3,
 118     && case_sem_INSN_SRAI,
 119     && case_sem_INSN_SRL,
 120     && case_sem_INSN_SRL3,
 121     && case_sem_INSN_SRLI,
 122     && case_sem_INSN_ST,
 123     && case_sem_INSN_ST_D,
 124     && case_sem_INSN_STB,
 125     && case_sem_INSN_STB_D,
 126     && case_sem_INSN_STH,
 127     && case_sem_INSN_STH_D,
 128     && case_sem_INSN_ST_PLUS,
 129     && case_sem_INSN_ST_MINUS,
 130     && case_sem_INSN_SUB,
 131     && case_sem_INSN_SUBV,
 132     && case_sem_INSN_SUBX,
 133     && case_sem_INSN_TRAP,
 134     && case_sem_INSN_UNLOCK,
 135     0
 136   };
 137   extern DECODE *m32r_decode_vars[];
 138   int i;
 139
 140   for (i = 0; m32r_decode_vars[i] != 0; ++i)
 141     m32r_decode_vars[i]->semantic_lab = labels[i];
 142
 143 #endif /* DEFINE_LABELS */
 144
 145 #ifdef DEFINE_SWITCH
 146 #undef DEFINE_SWITCH
 147
 148 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 149    off frills like tracing and profiling.  */
 150 /* FIXME: A better way would be to have TRACE_RESULT check for something
 151    that can cause it to be optimized out.  */
 152
 153 #if FAST_P
 154 #undef TRACE_RESULT
 155 #define TRACE_RESULT(cpu, name, type, val)
 156 #endif
 157
 158 #undef GET_ATTR
 159 #define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
 160
 161 {
 162   SEM_ARG sem_arg = sc;
 163   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 164   CIA new_pc;
 165
 166   SWITCH (sem, sem_arg->semantic.sem_case)
 167     {
 168
 169   CASE (sem, INSN_ILLEGAL) :
 170 {
 171   sim_engine_halt (CPU_STATE (current_cpu), current_cpu, NULL, NULL_CIA/*FIXME*/,
 172                    sim_stopped, SIM_SIGILL);
 173   BREAK (sem);
 174 }
 175
 176   CASE (sem, INSN_ADD) : /* add $dr,$sr */
 177 {
 178 #define FLD(f) abuf->fields.fmt_0_add.f
 179   new_pc = SEM_NEXT_PC (sem_arg, 2);
 180
 181 * FLD (f_r1) = ADDSI (* FLD (f_r1), * FLD (f_r2));
 182   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 183
 184 #undef FLD
 185 }
 186   BREAK (sem);
 187
 188   CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,#$slo16 */
 189 {
 190 #define FLD(f) abuf->fields.fmt_1_add3.f
 191   new_pc = SEM_NEXT_PC (sem_arg, 4);
 192
 193 * FLD (f_r1) = ADDSI (* FLD (f_r2), FLD (f_simm16));
 194   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 195
 196 #undef FLD
 197 }
 198   BREAK (sem);
 199
 200   CASE (sem, INSN_AND) : /* and $dr,$sr */
 201 {
 202 #define FLD(f) abuf->fields.fmt_0_add.f
 203   new_pc = SEM_NEXT_PC (sem_arg, 2);
 204
 205 * FLD (f_r1) = ANDSI (* FLD (f_r1), * FLD (f_r2));
 206   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 207
 208 #undef FLD
 209 }
 210   BREAK (sem);
 211
 212   CASE (sem, INSN_AND3) : /* and3 $dr,$sr,#$uimm16 */
 213 {
 214 #define FLD(f) abuf->fields.fmt_2_and3.f
 215   new_pc = SEM_NEXT_PC (sem_arg, 4);
 216
 217 * FLD (f_r1) = ANDSI (* FLD (f_r2), FLD (f_uimm16));
 218   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 219
 220 #undef FLD
 221 }
 222   BREAK (sem);
 223
 224   CASE (sem, INSN_OR) : /* or $dr,$sr */
 225 {
 226 #define FLD(f) abuf->fields.fmt_0_add.f
 227   new_pc = SEM_NEXT_PC (sem_arg, 2);
 228
 229 * FLD (f_r1) = ORSI (* FLD (f_r1), * FLD (f_r2));
 230   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 231
 232 #undef FLD
 233 }
 234   BREAK (sem);
 235
 236   CASE (sem, INSN_OR3) : /* or3 $dr,$sr,#$ulo16 */
 237 {
 238 #define FLD(f) abuf->fields.fmt_3_or3.f
 239   new_pc = SEM_NEXT_PC (sem_arg, 4);
 240
 241 * FLD (f_r1) = ORSI (* FLD (f_r2), FLD (f_uimm16));
 242   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 243
 244 #undef FLD
 245 }
 246   BREAK (sem);
 247
 248   CASE (sem, INSN_XOR) : /* xor $dr,$sr */
 249 {
 250 #define FLD(f) abuf->fields.fmt_0_add.f
 251   new_pc = SEM_NEXT_PC (sem_arg, 2);
 252
 253 * FLD (f_r1) = XORSI (* FLD (f_r1), * FLD (f_r2));
 254   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 255
 256 #undef FLD
 257 }
 258   BREAK (sem);
 259
 260   CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,#$uimm16 */
 261 {
 262 #define FLD(f) abuf->fields.fmt_2_and3.f
 263   new_pc = SEM_NEXT_PC (sem_arg, 4);
 264
 265 * FLD (f_r1) = XORSI (* FLD (f_r2), FLD (f_uimm16));
 266   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 267
 268 #undef FLD
 269 }
 270   BREAK (sem);
 271
 272   CASE (sem, INSN_ADDI) : /* addi $dr,#$simm8 */
 273 {
 274 #define FLD(f) abuf->fields.fmt_4_addi.f
 275   new_pc = SEM_NEXT_PC (sem_arg, 2);
 276
 277 * FLD (f_r1) = ADDSI (* FLD (f_r1), FLD (f_simm8));
 278   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 279
 280 #undef FLD
 281 }
 282   BREAK (sem);
 283
 284   CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
 285 {
 286 #define FLD(f) abuf->fields.fmt_5_addv.f
 287   new_pc = SEM_NEXT_PC (sem_arg, 2);
 288
 289 do {
 290   BI temp1;SI temp0;
 291   temp0 = ADDSI (* FLD (f_r1), * FLD (f_r2));
 292   temp1 = ADDOFSI (* FLD (f_r1), * FLD (f_r2), 0);
 293 * FLD (f_r1) = temp0;
 294   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 295   CPU (h_cond) = temp1;
 296   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 297 } while (0);
 298
 299 #undef FLD
 300 }
 301   BREAK (sem);
 302
 303   CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,#$simm16 */
 304 {
 305 #define FLD(f) abuf->fields.fmt_6_addv3.f
 306   new_pc = SEM_NEXT_PC (sem_arg, 4);
 307
 308 do {
 309   BI temp1;SI temp0;
 310   temp0 = ADDSI (* FLD (f_r2), FLD (f_simm16));
 311   temp1 = ADDOFSI (* FLD (f_r2), FLD (f_simm16), 0);
 312 * FLD (f_r1) = temp0;
 313   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 314   CPU (h_cond) = temp1;
 315   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 316 } while (0);
 317
 318 #undef FLD
 319 }
 320   BREAK (sem);
 321
 322   CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
 323 {
 324 #define FLD(f) abuf->fields.fmt_7_addx.f
 325   new_pc = SEM_NEXT_PC (sem_arg, 2);
 326
 327 do {
 328   BI temp1;SI temp0;
 329   temp0 = ADDCSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
 330   temp1 = ADDCFSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
 331 * FLD (f_r1) = temp0;
 332   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 333   CPU (h_cond) = temp1;
 334   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 335 } while (0);
 336
 337 #undef FLD
 338 }
 339   BREAK (sem);
 340
 341   CASE (sem, INSN_BC8) : /* bc $disp8 */
 342 {
 343 #define FLD(f) abuf->fields.fmt_8_bc8.f
 344   new_pc = SEM_NEXT_PC (sem_arg, 2);
 345
 346 if (CPU (h_cond)) {
 347   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
 348   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 349 }
 350
 351 #undef FLD
 352 }
 353   BREAK (sem);
 354
 355   CASE (sem, INSN_BC24) : /* bc $disp24 */
 356 {
 357 #define FLD(f) abuf->fields.fmt_9_bc24.f
 358   new_pc = SEM_NEXT_PC (sem_arg, 4);
 359
 360 if (CPU (h_cond)) {
 361   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
 362   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 363 }
 364
 365 #undef FLD
 366 }
 367   BREAK (sem);
 368
 369   CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
 370 {
 371 #define FLD(f) abuf->fields.fmt_10_beq.f
 372   new_pc = SEM_NEXT_PC (sem_arg, 4);
 373
 374 if (EQSI (* FLD (f_r1), * FLD (f_r2))) {
 375   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 376   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 377 }
 378
 379 #undef FLD
 380 }
 381   BREAK (sem);
 382
 383   CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
 384 {
 385 #define FLD(f) abuf->fields.fmt_11_beqz.f
 386   new_pc = SEM_NEXT_PC (sem_arg, 4);
 387
 388 if (EQSI (* FLD (f_r2), 0)) {
 389   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 390   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 391 }
 392
 393 #undef FLD
 394 }
 395   BREAK (sem);
 396
 397   CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
 398 {
 399 #define FLD(f) abuf->fields.fmt_11_beqz.f
 400   new_pc = SEM_NEXT_PC (sem_arg, 4);
 401
 402 if (GESI (* FLD (f_r2), 0)) {
 403   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 404   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 405 }
 406
 407 #undef FLD
 408 }
 409   BREAK (sem);
 410
 411   CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
 412 {
 413 #define FLD(f) abuf->fields.fmt_11_beqz.f
 414   new_pc = SEM_NEXT_PC (sem_arg, 4);
 415
 416 if (GTSI (* FLD (f_r2), 0)) {
 417   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 418   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 419 }
 420
 421 #undef FLD
 422 }
 423   BREAK (sem);
 424
 425   CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
 426 {
 427 #define FLD(f) abuf->fields.fmt_11_beqz.f
 428   new_pc = SEM_NEXT_PC (sem_arg, 4);
 429
 430 if (LESI (* FLD (f_r2), 0)) {
 431   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 432   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 433 }
 434
 435 #undef FLD
 436 }
 437   BREAK (sem);
 438
 439   CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
 440 {
 441 #define FLD(f) abuf->fields.fmt_11_beqz.f
 442   new_pc = SEM_NEXT_PC (sem_arg, 4);
 443
 444 if (LTSI (* FLD (f_r2), 0)) {
 445   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 446   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 447 }
 448
 449 #undef FLD
 450 }
 451   BREAK (sem);
 452
 453   CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
 454 {
 455 #define FLD(f) abuf->fields.fmt_11_beqz.f
 456   new_pc = SEM_NEXT_PC (sem_arg, 4);
 457
 458 if (NESI (* FLD (f_r2), 0)) {
 459   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 460   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 461 }
 462
 463 #undef FLD
 464 }
 465   BREAK (sem);
 466
 467   CASE (sem, INSN_BL8) : /* bl $disp8 */
 468 {
 469 #define FLD(f) abuf->fields.fmt_12_bl8.f
 470   new_pc = SEM_NEXT_PC (sem_arg, 2);
 471
 472 do {
 473   CPU (h_gr[14]) = ADDSI (ANDSI (CPU (h_pc), -4), 4);
 474   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 475   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
 476   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 477 } while (0);
 478
 479 #undef FLD
 480 }
 481   BREAK (sem);
 482
 483   CASE (sem, INSN_BL24) : /* bl $disp24 */
 484 {
 485 #define FLD(f) abuf->fields.fmt_13_bl24.f
 486   new_pc = SEM_NEXT_PC (sem_arg, 4);
 487
 488 do {
 489   CPU (h_gr[14]) = ADDSI (CPU (h_pc), 4);
 490   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 491   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
 492   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 493 } while (0);
 494
 495 #undef FLD
 496 }
 497   BREAK (sem);
 498
 499   CASE (sem, INSN_BNC8) : /* bnc $disp8 */
 500 {
 501 #define FLD(f) abuf->fields.fmt_8_bc8.f
 502   new_pc = SEM_NEXT_PC (sem_arg, 2);
 503
 504 if (NOTBI (CPU (h_cond))) {
 505   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
 506   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 507 }
 508
 509 #undef FLD
 510 }
 511   BREAK (sem);
 512
 513   CASE (sem, INSN_BNC24) : /* bnc $disp24 */
 514 {
 515 #define FLD(f) abuf->fields.fmt_9_bc24.f
 516   new_pc = SEM_NEXT_PC (sem_arg, 4);
 517
 518 if (NOTBI (CPU (h_cond))) {
 519   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
 520   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 521 }
 522
 523 #undef FLD
 524 }
 525   BREAK (sem);
 526
 527   CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
 528 {
 529 #define FLD(f) abuf->fields.fmt_10_beq.f
 530   new_pc = SEM_NEXT_PC (sem_arg, 4);
 531
 532 if (NESI (* FLD (f_r1), * FLD (f_r2))) {
 533   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp16)));
 534   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 535 }
 536
 537 #undef FLD
 538 }
 539   BREAK (sem);
 540
 541   CASE (sem, INSN_BRA8) : /* bra $disp8 */
 542 {
 543 #define FLD(f) abuf->fields.fmt_14_bra8.f
 544   new_pc = SEM_NEXT_PC (sem_arg, 2);
 545
 546   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp8)));
 547   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 548
 549 #undef FLD
 550 }
 551   BREAK (sem);
 552
 553   CASE (sem, INSN_BRA24) : /* bra $disp24 */
 554 {
 555 #define FLD(f) abuf->fields.fmt_15_bra24.f
 556   new_pc = SEM_NEXT_PC (sem_arg, 4);
 557
 558   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, FLD (f_disp24)));
 559   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 560
 561 #undef FLD
 562 }
 563   BREAK (sem);
 564
 565   CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
 566 {
 567 #define FLD(f) abuf->fields.fmt_16_cmp.f
 568   new_pc = SEM_NEXT_PC (sem_arg, 2);
 569
 570   CPU (h_cond) = LTSI (* FLD (f_r1), * FLD (f_r2));
 571   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 572
 573 #undef FLD
 574 }
 575   BREAK (sem);
 576
 577   CASE (sem, INSN_CMPI) : /* cmpi $src2,#$simm16 */
 578 {
 579 #define FLD(f) abuf->fields.fmt_17_cmpi.f
 580   new_pc = SEM_NEXT_PC (sem_arg, 4);
 581
 582   CPU (h_cond) = LTSI (* FLD (f_r2), FLD (f_simm16));
 583   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 584
 585 #undef FLD
 586 }
 587   BREAK (sem);
 588
 589   CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
 590 {
 591 #define FLD(f) abuf->fields.fmt_16_cmp.f
 592   new_pc = SEM_NEXT_PC (sem_arg, 2);
 593
 594   CPU (h_cond) = LTUSI (* FLD (f_r1), * FLD (f_r2));
 595   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 596
 597 #undef FLD
 598 }
 599   BREAK (sem);
 600
 601   CASE (sem, INSN_CMPUI) : /* cmpui $src2,#$uimm16 */
 602 {
 603 #define FLD(f) abuf->fields.fmt_18_cmpui.f
 604   new_pc = SEM_NEXT_PC (sem_arg, 4);
 605
 606   CPU (h_cond) = LTUSI (* FLD (f_r2), FLD (f_uimm16));
 607   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 608
 609 #undef FLD
 610 }
 611   BREAK (sem);
 612
 613   CASE (sem, INSN_DIV) : /* div $dr,$sr */
 614 {
 615 #define FLD(f) abuf->fields.fmt_19_div.f
 616   new_pc = SEM_NEXT_PC (sem_arg, 4);
 617
 618 if (NESI (* FLD (f_r2), 0)) {
 619 * FLD (f_r1) = DIVSI (* FLD (f_r1), * FLD (f_r2));
 620   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 621 }
 622
 623 #undef FLD
 624 }
 625   BREAK (sem);
 626
 627   CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
 628 {
 629 #define FLD(f) abuf->fields.fmt_19_div.f
 630   new_pc = SEM_NEXT_PC (sem_arg, 4);
 631
 632 if (NESI (* FLD (f_r2), 0)) {
 633 * FLD (f_r1) = UDIVSI (* FLD (f_r1), * FLD (f_r2));
 634   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 635 }
 636
 637 #undef FLD
 638 }
 639   BREAK (sem);
 640
 641   CASE (sem, INSN_REM) : /* rem $dr,$sr */
 642 {
 643 #define FLD(f) abuf->fields.fmt_19_div.f
 644   new_pc = SEM_NEXT_PC (sem_arg, 4);
 645
 646 if (NESI (* FLD (f_r2), 0)) {
 647 * FLD (f_r1) = MODSI (* FLD (f_r1), * FLD (f_r2));
 648   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 649 }
 650
 651 #undef FLD
 652 }
 653   BREAK (sem);
 654
 655   CASE (sem, INSN_REMU) : /* remu $dr,$sr */
 656 {
 657 #define FLD(f) abuf->fields.fmt_19_div.f
 658   new_pc = SEM_NEXT_PC (sem_arg, 4);
 659
 660 if (NESI (* FLD (f_r2), 0)) {
 661 * FLD (f_r1) = UMODSI (* FLD (f_r1), * FLD (f_r2));
 662   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 663 }
 664
 665 #undef FLD
 666 }
 667   BREAK (sem);
 668
 669   CASE (sem, INSN_JL) : /* jl $sr */
 670 {
 671 #define FLD(f) abuf->fields.fmt_20_jl.f
 672   new_pc = SEM_NEXT_PC (sem_arg, 2);
 673
 674 do {
 675   SI temp1;SI temp0;
 676   temp0 = ADDSI (ANDSI (CPU (h_pc), -4), 4);
 677   temp1 = * FLD (f_r2);
 678   CPU (h_gr[14]) = temp0;
 679   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 680   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
 681   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 682 } while (0);
 683
 684 #undef FLD
 685 }
 686   BREAK (sem);
 687
 688   CASE (sem, INSN_JMP) : /* jmp $sr */
 689 {
 690 #define FLD(f) abuf->fields.fmt_21_jmp.f
 691   new_pc = SEM_NEXT_PC (sem_arg, 2);
 692
 693   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, * FLD (f_r2)));
 694   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 695
 696 #undef FLD
 697 }
 698   BREAK (sem);
 699
 700   CASE (sem, INSN_LD) : /* ld $dr,@$sr */
 701 {
 702 #define FLD(f) abuf->fields.fmt_22_ld.f
 703   new_pc = SEM_NEXT_PC (sem_arg, 2);
 704
 705 * FLD (f_r1) = GETMEMSI (current_cpu, * FLD (f_r2));
 706   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 707
 708 #undef FLD
 709 }
 710   BREAK (sem);
 711
 712   CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
 713 {
 714 #define FLD(f) abuf->fields.fmt_23_ld_d.f
 715   new_pc = SEM_NEXT_PC (sem_arg, 4);
 716
 717 * FLD (f_r1) = GETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)));
 718   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 719
 720 #undef FLD
 721 }
 722   BREAK (sem);
 723
 724   CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
 725 {
 726 #define FLD(f) abuf->fields.fmt_24_ldb.f
 727   new_pc = SEM_NEXT_PC (sem_arg, 2);
 728
 729 * FLD (f_r1) = EXTQISI (GETMEMQI (current_cpu, * FLD (f_r2)));
 730   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 731
 732 #undef FLD
 733 }
 734   BREAK (sem);
 735
 736   CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
 737 {
 738 #define FLD(f) abuf->fields.fmt_25_ldb_d.f
 739   new_pc = SEM_NEXT_PC (sem_arg, 4);
 740
 741 * FLD (f_r1) = EXTQISI (GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
 742   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 743
 744 #undef FLD
 745 }
 746   BREAK (sem);
 747
 748   CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
 749 {
 750 #define FLD(f) abuf->fields.fmt_26_ldh.f
 751   new_pc = SEM_NEXT_PC (sem_arg, 2);
 752
 753 * FLD (f_r1) = EXTHISI (GETMEMHI (current_cpu, * FLD (f_r2)));
 754   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 755
 756 #undef FLD
 757 }
 758   BREAK (sem);
 759
 760   CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
 761 {
 762 #define FLD(f) abuf->fields.fmt_27_ldh_d.f
 763   new_pc = SEM_NEXT_PC (sem_arg, 4);
 764
 765 * FLD (f_r1) = EXTHISI (GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
 766   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 767
 768 #undef FLD
 769 }
 770   BREAK (sem);
 771
 772   CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
 773 {
 774 #define FLD(f) abuf->fields.fmt_24_ldb.f
 775   new_pc = SEM_NEXT_PC (sem_arg, 2);
 776
 777 * FLD (f_r1) = ZEXTQISI (GETMEMQI (current_cpu, * FLD (f_r2)));
 778   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 779
 780 #undef FLD
 781 }
 782   BREAK (sem);
 783
 784   CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
 785 {
 786 #define FLD(f) abuf->fields.fmt_25_ldb_d.f
 787   new_pc = SEM_NEXT_PC (sem_arg, 4);
 788
 789 * FLD (f_r1) = ZEXTQISI (GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
 790   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 791
 792 #undef FLD
 793 }
 794   BREAK (sem);
 795
 796   CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
 797 {
 798 #define FLD(f) abuf->fields.fmt_26_ldh.f
 799   new_pc = SEM_NEXT_PC (sem_arg, 2);
 800
 801 * FLD (f_r1) = ZEXTHISI (GETMEMHI (current_cpu, * FLD (f_r2)));
 802   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 803
 804 #undef FLD
 805 }
 806   BREAK (sem);
 807
 808   CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
 809 {
 810 #define FLD(f) abuf->fields.fmt_27_ldh_d.f
 811   new_pc = SEM_NEXT_PC (sem_arg, 4);
 812
 813 * FLD (f_r1) = ZEXTHISI (GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
 814   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 815
 816 #undef FLD
 817 }
 818   BREAK (sem);
 819
 820   CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
 821 {
 822 #define FLD(f) abuf->fields.fmt_28_ld_plus.f
 823   new_pc = SEM_NEXT_PC (sem_arg, 2);
 824
 825 do {
 826   SI temp1;SI temp0;
 827   temp0 = GETMEMSI (current_cpu, * FLD (f_r2));
 828   temp1 = ADDSI (* FLD (f_r2), 4);
 829 * FLD (f_r1) = temp0;
 830   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 831 * FLD (f_r2) = temp1;
 832   TRACE_RESULT (current_cpu, "sr", 'x', * FLD (f_r2));
 833 } while (0);
 834
 835 #undef FLD
 836 }
 837   BREAK (sem);
 838
 839   CASE (sem, INSN_LD24) : /* ld24 $dr,#$uimm24 */
 840 {
 841 #define FLD(f) abuf->fields.fmt_29_ld24.f
 842   new_pc = SEM_NEXT_PC (sem_arg, 4);
 843
 844 * FLD (f_r1) = FLD (f_uimm24);
 845   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 846
 847 #undef FLD
 848 }
 849   BREAK (sem);
 850
 851   CASE (sem, INSN_LDI8) : /* ldi $dr,#$simm8 */
 852 {
 853 #define FLD(f) abuf->fields.fmt_30_ldi8.f
 854   new_pc = SEM_NEXT_PC (sem_arg, 2);
 855
 856 * FLD (f_r1) = FLD (f_simm8);
 857   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 858
 859 #undef FLD
 860 }
 861   BREAK (sem);
 862
 863   CASE (sem, INSN_LDI16) : /* ldi $dr,$slo16 */
 864 {
 865 #define FLD(f) abuf->fields.fmt_31_ldi16.f
 866   new_pc = SEM_NEXT_PC (sem_arg, 4);
 867
 868 * FLD (f_r1) = FLD (f_simm16);
 869   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 870
 871 #undef FLD
 872 }
 873   BREAK (sem);
 874
 875   CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
 876 {
 877 #define FLD(f) abuf->fields.fmt_32_lock.f
 878   new_pc = SEM_NEXT_PC (sem_arg, 2);
 879
 880 do {
 881   CPU (h_lock) = 1;
 882   TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
 883 * FLD (f_r1) = GETMEMSI (current_cpu, * FLD (f_r2));
 884   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 885 } while (0);
 886
 887 #undef FLD
 888 }
 889   BREAK (sem);
 890
 891   CASE (sem, INSN_MACHI) : /* machi $src1,$src2 */
 892 {
 893 #define FLD(f) abuf->fields.fmt_33_machi.f
 894   new_pc = SEM_NEXT_PC (sem_arg, 2);
 895
 896   CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8);
 897   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 898
 899 #undef FLD
 900 }
 901   BREAK (sem);
 902
 903   CASE (sem, INSN_MACLO) : /* maclo $src1,$src2 */
 904 {
 905 #define FLD(f) abuf->fields.fmt_33_machi.f
 906   new_pc = SEM_NEXT_PC (sem_arg, 2);
 907
 908   CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (SLLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8);
 909   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 910
 911 #undef FLD
 912 }
 913   BREAK (sem);
 914
 915   CASE (sem, INSN_MACWHI) : /* macwhi $src1,$src2 */
 916 {
 917 #define FLD(f) abuf->fields.fmt_33_machi.f
 918   new_pc = SEM_NEXT_PC (sem_arg, 2);
 919
 920   CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16))))), 8), 8);
 921   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 922
 923 #undef FLD
 924 }
 925   BREAK (sem);
 926
 927   CASE (sem, INSN_MACWLO) : /* macwlo $src1,$src2 */
 928 {
 929 #define FLD(f) abuf->fields.fmt_33_machi.f
 930   new_pc = SEM_NEXT_PC (sem_arg, 2);
 931
 932   CPU (h_accum) = SRADI (SLLDI (ADDDI (CPU (h_accum), MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2))))), 8), 8);
 933   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 934
 935 #undef FLD
 936 }
 937   BREAK (sem);
 938
 939   CASE (sem, INSN_MUL) : /* mul $dr,$sr */
 940 {
 941 #define FLD(f) abuf->fields.fmt_0_add.f
 942   new_pc = SEM_NEXT_PC (sem_arg, 2);
 943
 944 * FLD (f_r1) = MULSI (* FLD (f_r1), * FLD (f_r2));
 945   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
 946
 947 #undef FLD
 948 }
 949   BREAK (sem);
 950
 951   CASE (sem, INSN_MULHI) : /* mulhi $src1,$src2 */
 952 {
 953 #define FLD(f) abuf->fields.fmt_34_mulhi.f
 954   new_pc = SEM_NEXT_PC (sem_arg, 2);
 955
 956   CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (f_r1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 16), 16);
 957   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 958
 959 #undef FLD
 960 }
 961   BREAK (sem);
 962
 963   CASE (sem, INSN_MULLO) : /* mullo $src1,$src2 */
 964 {
 965 #define FLD(f) abuf->fields.fmt_34_mulhi.f
 966   new_pc = SEM_NEXT_PC (sem_arg, 2);
 967
 968   CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (f_r1), 16)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 16), 16);
 969   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 970
 971 #undef FLD
 972 }
 973   BREAK (sem);
 974
 975   CASE (sem, INSN_MULWHI) : /* mulwhi $src1,$src2 */
 976 {
 977 #define FLD(f) abuf->fields.fmt_34_mulhi.f
 978   new_pc = SEM_NEXT_PC (sem_arg, 2);
 979
 980   CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (f_r2), 16)))), 8), 8);
 981   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 982
 983 #undef FLD
 984 }
 985   BREAK (sem);
 986
 987   CASE (sem, INSN_MULWLO) : /* mulwlo $src1,$src2 */
 988 {
 989 #define FLD(f) abuf->fields.fmt_34_mulhi.f
 990   new_pc = SEM_NEXT_PC (sem_arg, 2);
 991
 992   CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (f_r1)), EXTHIDI (TRUNCSIHI (* FLD (f_r2)))), 8), 8);
 993   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
 994
 995 #undef FLD
 996 }
 997   BREAK (sem);
 998
 999   CASE (sem, INSN_MV) : /* mv $dr,$sr */
1000 {
1001 #define FLD(f) abuf->fields.fmt_35_mv.f
1002   new_pc = SEM_NEXT_PC (sem_arg, 2);
1003
1004 * FLD (f_r1) = * FLD (f_r2);
1005   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1006
1007 #undef FLD
1008 }
1009   BREAK (sem);
1010
1011   CASE (sem, INSN_MVFACHI) : /* mvfachi $dr */
1012 {
1013 #define FLD(f) abuf->fields.fmt_36_mvfachi.f
1014   new_pc = SEM_NEXT_PC (sem_arg, 2);
1015
1016 * FLD (f_r1) = TRUNCDISI (SRADI (CPU (h_accum), 32));
1017   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1018
1019 #undef FLD
1020 }
1021   BREAK (sem);
1022
1023   CASE (sem, INSN_MVFACLO) : /* mvfaclo $dr */
1024 {
1025 #define FLD(f) abuf->fields.fmt_36_mvfachi.f
1026   new_pc = SEM_NEXT_PC (sem_arg, 2);
1027
1028 * FLD (f_r1) = TRUNCDISI (CPU (h_accum));
1029   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1030
1031 #undef FLD
1032 }
1033   BREAK (sem);
1034
1035   CASE (sem, INSN_MVFACMI) : /* mvfacmi $dr */
1036 {
1037 #define FLD(f) abuf->fields.fmt_36_mvfachi.f
1038   new_pc = SEM_NEXT_PC (sem_arg, 2);
1039
1040 * FLD (f_r1) = TRUNCDISI (SRADI (CPU (h_accum), 16));
1041   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1042
1043 #undef FLD
1044 }
1045   BREAK (sem);
1046
1047   CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
1048 {
1049 #define FLD(f) abuf->fields.fmt_37_mvfc.f
1050   new_pc = SEM_NEXT_PC (sem_arg, 2);
1051
1052 * FLD (f_r1) = m32r_h_cr_get (current_cpu, FLD (f_r2));
1053   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1054
1055 #undef FLD
1056 }
1057   BREAK (sem);
1058
1059   CASE (sem, INSN_MVTACHI) : /* mvtachi $src1 */
1060 {
1061 #define FLD(f) abuf->fields.fmt_38_mvtachi.f
1062   new_pc = SEM_NEXT_PC (sem_arg, 2);
1063
1064   CPU (h_accum) = ORDI (ANDDI (CPU (h_accum), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (f_r1)), 32));
1065   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1066
1067 #undef FLD
1068 }
1069   BREAK (sem);
1070
1071   CASE (sem, INSN_MVTACLO) : /* mvtaclo $src1 */
1072 {
1073 #define FLD(f) abuf->fields.fmt_38_mvtachi.f
1074   new_pc = SEM_NEXT_PC (sem_arg, 2);
1075
1076   CPU (h_accum) = ORDI (ANDDI (CPU (h_accum), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (f_r1)));
1077   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1078
1079 #undef FLD
1080 }
1081   BREAK (sem);
1082
1083   CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
1084 {
1085 #define FLD(f) abuf->fields.fmt_39_mvtc.f
1086   new_pc = SEM_NEXT_PC (sem_arg, 2);
1087
1088 m32r_h_cr_set (current_cpu, FLD (f_r1), * FLD (f_r2));
1089   TRACE_RESULT (current_cpu, "dcr", 'x', m32r_h_cr_get (current_cpu, FLD (f_r1)));
1090
1091 #undef FLD
1092 }
1093   BREAK (sem);
1094
1095   CASE (sem, INSN_NEG) : /* neg $dr,$sr */
1096 {
1097 #define FLD(f) abuf->fields.fmt_35_mv.f
1098   new_pc = SEM_NEXT_PC (sem_arg, 2);
1099
1100 * FLD (f_r1) = NEGSI (* FLD (f_r2));
1101   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1102
1103 #undef FLD
1104 }
1105   BREAK (sem);
1106
1107   CASE (sem, INSN_NOP) : /* nop */
1108 {
1109 #define FLD(f) abuf->fields.fmt_40_nop.f
1110   new_pc = SEM_NEXT_PC (sem_arg, 2);
1111
1112 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
1113
1114 #undef FLD
1115 }
1116   BREAK (sem);
1117
1118   CASE (sem, INSN_NOT) : /* not $dr,$sr */
1119 {
1120 #define FLD(f) abuf->fields.fmt_35_mv.f
1121   new_pc = SEM_NEXT_PC (sem_arg, 2);
1122
1123 * FLD (f_r1) = INVSI (* FLD (f_r2));
1124   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1125
1126 #undef FLD
1127 }
1128   BREAK (sem);
1129
1130   CASE (sem, INSN_RAC) : /* rac */
1131 {
1132 #define FLD(f) abuf->fields.fmt_41_rac.f
1133   new_pc = SEM_NEXT_PC (sem_arg, 2);
1134
1135 do {
1136   DI tmp_tmp1;
1137   tmp_tmp1 = SLLDI (CPU (h_accum), 1);
1138   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
1139   CPU (h_accum) = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
1140   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1141 } while (0);
1142
1143 #undef FLD
1144 }
1145   BREAK (sem);
1146
1147   CASE (sem, INSN_RACH) : /* rach */
1148 {
1149 #define FLD(f) abuf->fields.fmt_41_rac.f
1150   new_pc = SEM_NEXT_PC (sem_arg, 2);
1151
1152 do {
1153   DI tmp_tmp1;
1154   tmp_tmp1 = ANDDI (CPU (h_accum), MAKEDI (16777215, 0xffffffff));
1155 if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
1156   tmp_tmp1 = MAKEDI (16383, 0x80000000);
1157 } else {
1158 if (ANDIFSI (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
1159   tmp_tmp1 = MAKEDI (16760832, 0);
1160 } else {
1161   tmp_tmp1 = ANDDI (ADDDI (CPU (h_accum), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1162 }
1163 }
1164   tmp_tmp1 = SLLDI (tmp_tmp1, 1);
1165   CPU (h_accum) = SRADI (SLLDI (tmp_tmp1, 7), 7);
1166   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1167 } while (0);
1168
1169 #undef FLD
1170 }
1171   BREAK (sem);
1172
1173   CASE (sem, INSN_RTE) : /* rte */
1174 {
1175 #define FLD(f) abuf->fields.fmt_42_rte.f
1176   new_pc = SEM_NEXT_PC (sem_arg, 2);
1177
1178 do {
1179   CPU (h_sm) = CPU (h_bsm);
1180   TRACE_RESULT (current_cpu, "h-sm-0", 'x', CPU (h_sm));
1181   CPU (h_ie) = CPU (h_bie);
1182   TRACE_RESULT (current_cpu, "h-ie-0", 'x', CPU (h_ie));
1183   CPU (h_cond) = CPU (h_bcond);
1184   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1185   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, CPU (h_bpc)));
1186   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
1187 } while (0);
1188
1189 #undef FLD
1190 }
1191   BREAK (sem);
1192
1193   CASE (sem, INSN_SETH) : /* seth $dr,#$hi16 */
1194 {
1195 #define FLD(f) abuf->fields.fmt_43_seth.f
1196   new_pc = SEM_NEXT_PC (sem_arg, 4);
1197
1198 * FLD (f_r1) = SLLSI (FLD (f_hi16), 16);
1199   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1200
1201 #undef FLD
1202 }
1203   BREAK (sem);
1204
1205   CASE (sem, INSN_SLL) : /* sll $dr,$sr */
1206 {
1207 #define FLD(f) abuf->fields.fmt_0_add.f
1208   new_pc = SEM_NEXT_PC (sem_arg, 2);
1209
1210 * FLD (f_r1) = SLLSI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
1211   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1212
1213 #undef FLD
1214 }
1215   BREAK (sem);
1216
1217   CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,#$simm16 */
1218 {
1219 #define FLD(f) abuf->fields.fmt_44_sll3.f
1220   new_pc = SEM_NEXT_PC (sem_arg, 4);
1221
1222 * FLD (f_r1) = SLLSI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
1223   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1224
1225 #undef FLD
1226 }
1227   BREAK (sem);
1228
1229   CASE (sem, INSN_SLLI) : /* slli $dr,#$uimm5 */
1230 {
1231 #define FLD(f) abuf->fields.fmt_45_slli.f
1232   new_pc = SEM_NEXT_PC (sem_arg, 2);
1233
1234 * FLD (f_r1) = SLLSI (* FLD (f_r1), FLD (f_uimm5));
1235   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1236
1237 #undef FLD
1238 }
1239   BREAK (sem);
1240
1241   CASE (sem, INSN_SRA) : /* sra $dr,$sr */
1242 {
1243 #define FLD(f) abuf->fields.fmt_0_add.f
1244   new_pc = SEM_NEXT_PC (sem_arg, 2);
1245
1246 * FLD (f_r1) = SRASI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
1247   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1248
1249 #undef FLD
1250 }
1251   BREAK (sem);
1252
1253   CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,#$simm16 */
1254 {
1255 #define FLD(f) abuf->fields.fmt_44_sll3.f
1256   new_pc = SEM_NEXT_PC (sem_arg, 4);
1257
1258 * FLD (f_r1) = SRASI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
1259   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1260
1261 #undef FLD
1262 }
1263   BREAK (sem);
1264
1265   CASE (sem, INSN_SRAI) : /* srai $dr,#$uimm5 */
1266 {
1267 #define FLD(f) abuf->fields.fmt_45_slli.f
1268   new_pc = SEM_NEXT_PC (sem_arg, 2);
1269
1270 * FLD (f_r1) = SRASI (* FLD (f_r1), FLD (f_uimm5));
1271   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1272
1273 #undef FLD
1274 }
1275   BREAK (sem);
1276
1277   CASE (sem, INSN_SRL) : /* srl $dr,$sr */
1278 {
1279 #define FLD(f) abuf->fields.fmt_0_add.f
1280   new_pc = SEM_NEXT_PC (sem_arg, 2);
1281
1282 * FLD (f_r1) = SRLSI (* FLD (f_r1), ANDSI (* FLD (f_r2), 31));
1283   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1284
1285 #undef FLD
1286 }
1287   BREAK (sem);
1288
1289   CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,#$simm16 */
1290 {
1291 #define FLD(f) abuf->fields.fmt_44_sll3.f
1292   new_pc = SEM_NEXT_PC (sem_arg, 4);
1293
1294 * FLD (f_r1) = SRLSI (* FLD (f_r2), ANDSI (FLD (f_simm16), 31));
1295   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1296
1297 #undef FLD
1298 }
1299   BREAK (sem);
1300
1301   CASE (sem, INSN_SRLI) : /* srli $dr,#$uimm5 */
1302 {
1303 #define FLD(f) abuf->fields.fmt_45_slli.f
1304   new_pc = SEM_NEXT_PC (sem_arg, 2);
1305
1306 * FLD (f_r1) = SRLSI (* FLD (f_r1), FLD (f_uimm5));
1307   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1308
1309 #undef FLD
1310 }
1311   BREAK (sem);
1312
1313   CASE (sem, INSN_ST) : /* st $src1,@$src2 */
1314 {
1315 #define FLD(f) abuf->fields.fmt_46_st.f
1316   new_pc = SEM_NEXT_PC (sem_arg, 2);
1317
1318 SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
1319   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
1320
1321 #undef FLD
1322 }
1323   BREAK (sem);
1324
1325   CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
1326 {
1327 #define FLD(f) abuf->fields.fmt_47_st_d.f
1328   new_pc = SEM_NEXT_PC (sem_arg, 4);
1329
1330 SETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
1331   TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
1332
1333 #undef FLD
1334 }
1335   BREAK (sem);
1336
1337   CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
1338 {
1339 #define FLD(f) abuf->fields.fmt_48_stb.f
1340   new_pc = SEM_NEXT_PC (sem_arg, 2);
1341
1342 SETMEMQI (current_cpu, * FLD (f_r2), * FLD (f_r1));
1343   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, * FLD (f_r2)));
1344
1345 #undef FLD
1346 }
1347   BREAK (sem);
1348
1349   CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
1350 {
1351 #define FLD(f) abuf->fields.fmt_49_stb_d.f
1352   new_pc = SEM_NEXT_PC (sem_arg, 4);
1353
1354 SETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
1355   TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
1356
1357 #undef FLD
1358 }
1359   BREAK (sem);
1360
1361   CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
1362 {
1363 #define FLD(f) abuf->fields.fmt_50_sth.f
1364   new_pc = SEM_NEXT_PC (sem_arg, 2);
1365
1366 SETMEMHI (current_cpu, * FLD (f_r2), * FLD (f_r1));
1367   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, * FLD (f_r2)));
1368
1369 #undef FLD
1370 }
1371   BREAK (sem);
1372
1373   CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
1374 {
1375 #define FLD(f) abuf->fields.fmt_51_sth_d.f
1376   new_pc = SEM_NEXT_PC (sem_arg, 4);
1377
1378 SETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16)), * FLD (f_r1));
1379   TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (* FLD (f_r2), FLD (f_simm16))));
1380
1381 #undef FLD
1382 }
1383   BREAK (sem);
1384
1385   CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
1386 {
1387 #define FLD(f) abuf->fields.fmt_52_st_plus.f
1388   new_pc = SEM_NEXT_PC (sem_arg, 2);
1389
1390 do {
1391   SI tmp_new_src2;
1392   tmp_new_src2 = ADDSI (* FLD (f_r2), 4);
1393 SETMEMSI (current_cpu, tmp_new_src2, * FLD (f_r1));
1394   TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
1395 * FLD (f_r2) = tmp_new_src2;
1396   TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
1397 } while (0);
1398
1399 #undef FLD
1400 }
1401   BREAK (sem);
1402
1403   CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
1404 {
1405 #define FLD(f) abuf->fields.fmt_52_st_plus.f
1406   new_pc = SEM_NEXT_PC (sem_arg, 2);
1407
1408 do {
1409   SI tmp_new_src2;
1410   tmp_new_src2 = SUBSI (* FLD (f_r2), 4);
1411 SETMEMSI (current_cpu, tmp_new_src2, * FLD (f_r1));
1412   TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
1413 * FLD (f_r2) = tmp_new_src2;
1414   TRACE_RESULT (current_cpu, "src2", 'x', * FLD (f_r2));
1415 } while (0);
1416
1417 #undef FLD
1418 }
1419   BREAK (sem);
1420
1421   CASE (sem, INSN_SUB) : /* sub $dr,$sr */
1422 {
1423 #define FLD(f) abuf->fields.fmt_0_add.f
1424   new_pc = SEM_NEXT_PC (sem_arg, 2);
1425
1426 * FLD (f_r1) = SUBSI (* FLD (f_r1), * FLD (f_r2));
1427   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1428
1429 #undef FLD
1430 }
1431   BREAK (sem);
1432
1433   CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
1434 {
1435 #define FLD(f) abuf->fields.fmt_5_addv.f
1436   new_pc = SEM_NEXT_PC (sem_arg, 2);
1437
1438 do {
1439   BI temp1;SI temp0;
1440   temp0 = SUBSI (* FLD (f_r1), * FLD (f_r2));
1441   temp1 = SUBOFSI (* FLD (f_r1), * FLD (f_r2), 0);
1442 * FLD (f_r1) = temp0;
1443   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1444   CPU (h_cond) = temp1;
1445   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1446 } while (0);
1447
1448 #undef FLD
1449 }
1450   BREAK (sem);
1451
1452   CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
1453 {
1454 #define FLD(f) abuf->fields.fmt_7_addx.f
1455   new_pc = SEM_NEXT_PC (sem_arg, 2);
1456
1457 do {
1458   BI temp1;SI temp0;
1459   temp0 = SUBCSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
1460   temp1 = SUBCFSI (* FLD (f_r1), * FLD (f_r2), CPU (h_cond));
1461 * FLD (f_r1) = temp0;
1462   TRACE_RESULT (current_cpu, "dr", 'x', * FLD (f_r1));
1463   CPU (h_cond) = temp1;
1464   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1465 } while (0);
1466
1467 #undef FLD
1468 }
1469   BREAK (sem);
1470
1471   CASE (sem, INSN_TRAP) : /* trap #$uimm4 */
1472 {
1473 #define FLD(f) abuf->fields.fmt_53_trap.f
1474   new_pc = SEM_NEXT_PC (sem_arg, 2);
1475
1476 do {
1477 m32r_h_cr_set (current_cpu, 6, ADDSI (CPU (h_pc), 4));
1478   TRACE_RESULT (current_cpu, "h-cr-6", 'x', m32r_h_cr_get (current_cpu, 6));
1479 m32r_h_cr_set (current_cpu, 0, ANDSI (SRLSI (m32r_h_cr_get (current_cpu, 0), 8), 33488896));
1480   TRACE_RESULT (current_cpu, "h-cr-0", 'x', m32r_h_cr_get (current_cpu, 0));
1481 do_trap (current_cpu, FLD (f_uimm4));
1482 ; /*clobber*/
1483 } while (0);
1484
1485 #undef FLD
1486 }
1487   BREAK (sem);
1488
1489   CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
1490 {
1491 #define FLD(f) abuf->fields.fmt_54_unlock.f
1492   new_pc = SEM_NEXT_PC (sem_arg, 2);
1493
1494 do {
1495 if (CPU (h_lock)) {
1496 SETMEMSI (current_cpu, * FLD (f_r2), * FLD (f_r1));
1497   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, * FLD (f_r2)));
1498 }
1499   CPU (h_lock) = 0;
1500   TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
1501 } while (0);
1502
1503 #undef FLD
1504 }
1505   BREAK (sem);
1506
1507
1508     }
1509   ENDSWITCH (sem) /* End of semantic switch.  */
1510
1511   PC = new_pc;
1512 }
1513
1514 #endif /* DEFINE_SWITCH */