sim/m32r/sem2-switch.c

   1 /* Simulator instruction semantics for m32r2f.
   2
   3 THIS FILE IS MACHINE GENERATED WITH CGEN.
   4
   5 Copyright 1996-2010 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU simulators.
   8
   9    This file is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    It is distributed in the hope that it will be useful, but WITHOUT
  15    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  16    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  17    License for more details.
  18
  19    You should have received a copy of the GNU General Public License along
  20    with this program; if not, write to the Free Software Foundation, Inc.,
  21    51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
  22
  23 */
  24
  25 #ifdef DEFINE_LABELS
  26
  27   /* The labels have the case they have because the enum of insn types
  28      is all uppercase and in the non-stdc case the insn symbol is built
  29      into the enum name.  */
  30
  31   static struct {
  32     int index;
  33     void *label;
  34   } labels[] = {
  35     { M32R2F_INSN_X_INVALID, && case_sem_INSN_X_INVALID },
  36     { M32R2F_INSN_X_AFTER, && case_sem_INSN_X_AFTER },
  37     { M32R2F_INSN_X_BEFORE, && case_sem_INSN_X_BEFORE },
  38     { M32R2F_INSN_X_CTI_CHAIN, && case_sem_INSN_X_CTI_CHAIN },
  39     { M32R2F_INSN_X_CHAIN, && case_sem_INSN_X_CHAIN },
  40     { M32R2F_INSN_X_BEGIN, && case_sem_INSN_X_BEGIN },
  41     { M32R2F_INSN_ADD, && case_sem_INSN_ADD },
  42     { M32R2F_INSN_ADD3, && case_sem_INSN_ADD3 },
  43     { M32R2F_INSN_AND, && case_sem_INSN_AND },
  44     { M32R2F_INSN_AND3, && case_sem_INSN_AND3 },
  45     { M32R2F_INSN_OR, && case_sem_INSN_OR },
  46     { M32R2F_INSN_OR3, && case_sem_INSN_OR3 },
  47     { M32R2F_INSN_XOR, && case_sem_INSN_XOR },
  48     { M32R2F_INSN_XOR3, && case_sem_INSN_XOR3 },
  49     { M32R2F_INSN_ADDI, && case_sem_INSN_ADDI },
  50     { M32R2F_INSN_ADDV, && case_sem_INSN_ADDV },
  51     { M32R2F_INSN_ADDV3, && case_sem_INSN_ADDV3 },
  52     { M32R2F_INSN_ADDX, && case_sem_INSN_ADDX },
  53     { M32R2F_INSN_BC8, && case_sem_INSN_BC8 },
  54     { M32R2F_INSN_BC24, && case_sem_INSN_BC24 },
  55     { M32R2F_INSN_BEQ, && case_sem_INSN_BEQ },
  56     { M32R2F_INSN_BEQZ, && case_sem_INSN_BEQZ },
  57     { M32R2F_INSN_BGEZ, && case_sem_INSN_BGEZ },
  58     { M32R2F_INSN_BGTZ, && case_sem_INSN_BGTZ },
  59     { M32R2F_INSN_BLEZ, && case_sem_INSN_BLEZ },
  60     { M32R2F_INSN_BLTZ, && case_sem_INSN_BLTZ },
  61     { M32R2F_INSN_BNEZ, && case_sem_INSN_BNEZ },
  62     { M32R2F_INSN_BL8, && case_sem_INSN_BL8 },
  63     { M32R2F_INSN_BL24, && case_sem_INSN_BL24 },
  64     { M32R2F_INSN_BCL8, && case_sem_INSN_BCL8 },
  65     { M32R2F_INSN_BCL24, && case_sem_INSN_BCL24 },
  66     { M32R2F_INSN_BNC8, && case_sem_INSN_BNC8 },
  67     { M32R2F_INSN_BNC24, && case_sem_INSN_BNC24 },
  68     { M32R2F_INSN_BNE, && case_sem_INSN_BNE },
  69     { M32R2F_INSN_BRA8, && case_sem_INSN_BRA8 },
  70     { M32R2F_INSN_BRA24, && case_sem_INSN_BRA24 },
  71     { M32R2F_INSN_BNCL8, && case_sem_INSN_BNCL8 },
  72     { M32R2F_INSN_BNCL24, && case_sem_INSN_BNCL24 },
  73     { M32R2F_INSN_CMP, && case_sem_INSN_CMP },
  74     { M32R2F_INSN_CMPI, && case_sem_INSN_CMPI },
  75     { M32R2F_INSN_CMPU, && case_sem_INSN_CMPU },
  76     { M32R2F_INSN_CMPUI, && case_sem_INSN_CMPUI },
  77     { M32R2F_INSN_CMPEQ, && case_sem_INSN_CMPEQ },
  78     { M32R2F_INSN_CMPZ, && case_sem_INSN_CMPZ },
  79     { M32R2F_INSN_DIV, && case_sem_INSN_DIV },
  80     { M32R2F_INSN_DIVU, && case_sem_INSN_DIVU },
  81     { M32R2F_INSN_REM, && case_sem_INSN_REM },
  82     { M32R2F_INSN_REMU, && case_sem_INSN_REMU },
  83     { M32R2F_INSN_REMH, && case_sem_INSN_REMH },
  84     { M32R2F_INSN_REMUH, && case_sem_INSN_REMUH },
  85     { M32R2F_INSN_REMB, && case_sem_INSN_REMB },
  86     { M32R2F_INSN_REMUB, && case_sem_INSN_REMUB },
  87     { M32R2F_INSN_DIVUH, && case_sem_INSN_DIVUH },
  88     { M32R2F_INSN_DIVB, && case_sem_INSN_DIVB },
  89     { M32R2F_INSN_DIVUB, && case_sem_INSN_DIVUB },
  90     { M32R2F_INSN_DIVH, && case_sem_INSN_DIVH },
  91     { M32R2F_INSN_JC, && case_sem_INSN_JC },
  92     { M32R2F_INSN_JNC, && case_sem_INSN_JNC },
  93     { M32R2F_INSN_JL, && case_sem_INSN_JL },
  94     { M32R2F_INSN_JMP, && case_sem_INSN_JMP },
  95     { M32R2F_INSN_LD, && case_sem_INSN_LD },
  96     { M32R2F_INSN_LD_D, && case_sem_INSN_LD_D },
  97     { M32R2F_INSN_LDB, && case_sem_INSN_LDB },
  98     { M32R2F_INSN_LDB_D, && case_sem_INSN_LDB_D },
  99     { M32R2F_INSN_LDH, && case_sem_INSN_LDH },
 100     { M32R2F_INSN_LDH_D, && case_sem_INSN_LDH_D },
 101     { M32R2F_INSN_LDUB, && case_sem_INSN_LDUB },
 102     { M32R2F_INSN_LDUB_D, && case_sem_INSN_LDUB_D },
 103     { M32R2F_INSN_LDUH, && case_sem_INSN_LDUH },
 104     { M32R2F_INSN_LDUH_D, && case_sem_INSN_LDUH_D },
 105     { M32R2F_INSN_LD_PLUS, && case_sem_INSN_LD_PLUS },
 106     { M32R2F_INSN_LD24, && case_sem_INSN_LD24 },
 107     { M32R2F_INSN_LDI8, && case_sem_INSN_LDI8 },
 108     { M32R2F_INSN_LDI16, && case_sem_INSN_LDI16 },
 109     { M32R2F_INSN_LOCK, && case_sem_INSN_LOCK },
 110     { M32R2F_INSN_MACHI_A, && case_sem_INSN_MACHI_A },
 111     { M32R2F_INSN_MACLO_A, && case_sem_INSN_MACLO_A },
 112     { M32R2F_INSN_MACWHI_A, && case_sem_INSN_MACWHI_A },
 113     { M32R2F_INSN_MACWLO_A, && case_sem_INSN_MACWLO_A },
 114     { M32R2F_INSN_MUL, && case_sem_INSN_MUL },
 115     { M32R2F_INSN_MULHI_A, && case_sem_INSN_MULHI_A },
 116     { M32R2F_INSN_MULLO_A, && case_sem_INSN_MULLO_A },
 117     { M32R2F_INSN_MULWHI_A, && case_sem_INSN_MULWHI_A },
 118     { M32R2F_INSN_MULWLO_A, && case_sem_INSN_MULWLO_A },
 119     { M32R2F_INSN_MV, && case_sem_INSN_MV },
 120     { M32R2F_INSN_MVFACHI_A, && case_sem_INSN_MVFACHI_A },
 121     { M32R2F_INSN_MVFACLO_A, && case_sem_INSN_MVFACLO_A },
 122     { M32R2F_INSN_MVFACMI_A, && case_sem_INSN_MVFACMI_A },
 123     { M32R2F_INSN_MVFC, && case_sem_INSN_MVFC },
 124     { M32R2F_INSN_MVTACHI_A, && case_sem_INSN_MVTACHI_A },
 125     { M32R2F_INSN_MVTACLO_A, && case_sem_INSN_MVTACLO_A },
 126     { M32R2F_INSN_MVTC, && case_sem_INSN_MVTC },
 127     { M32R2F_INSN_NEG, && case_sem_INSN_NEG },
 128     { M32R2F_INSN_NOP, && case_sem_INSN_NOP },
 129     { M32R2F_INSN_NOT, && case_sem_INSN_NOT },
 130     { M32R2F_INSN_RAC_DSI, && case_sem_INSN_RAC_DSI },
 131     { M32R2F_INSN_RACH_DSI, && case_sem_INSN_RACH_DSI },
 132     { M32R2F_INSN_RTE, && case_sem_INSN_RTE },
 133     { M32R2F_INSN_SETH, && case_sem_INSN_SETH },
 134     { M32R2F_INSN_SLL, && case_sem_INSN_SLL },
 135     { M32R2F_INSN_SLL3, && case_sem_INSN_SLL3 },
 136     { M32R2F_INSN_SLLI, && case_sem_INSN_SLLI },
 137     { M32R2F_INSN_SRA, && case_sem_INSN_SRA },
 138     { M32R2F_INSN_SRA3, && case_sem_INSN_SRA3 },
 139     { M32R2F_INSN_SRAI, && case_sem_INSN_SRAI },
 140     { M32R2F_INSN_SRL, && case_sem_INSN_SRL },
 141     { M32R2F_INSN_SRL3, && case_sem_INSN_SRL3 },
 142     { M32R2F_INSN_SRLI, && case_sem_INSN_SRLI },
 143     { M32R2F_INSN_ST, && case_sem_INSN_ST },
 144     { M32R2F_INSN_ST_D, && case_sem_INSN_ST_D },
 145     { M32R2F_INSN_STB, && case_sem_INSN_STB },
 146     { M32R2F_INSN_STB_D, && case_sem_INSN_STB_D },
 147     { M32R2F_INSN_STH, && case_sem_INSN_STH },
 148     { M32R2F_INSN_STH_D, && case_sem_INSN_STH_D },
 149     { M32R2F_INSN_ST_PLUS, && case_sem_INSN_ST_PLUS },
 150     { M32R2F_INSN_STH_PLUS, && case_sem_INSN_STH_PLUS },
 151     { M32R2F_INSN_STB_PLUS, && case_sem_INSN_STB_PLUS },
 152     { M32R2F_INSN_ST_MINUS, && case_sem_INSN_ST_MINUS },
 153     { M32R2F_INSN_SUB, && case_sem_INSN_SUB },
 154     { M32R2F_INSN_SUBV, && case_sem_INSN_SUBV },
 155     { M32R2F_INSN_SUBX, && case_sem_INSN_SUBX },
 156     { M32R2F_INSN_TRAP, && case_sem_INSN_TRAP },
 157     { M32R2F_INSN_UNLOCK, && case_sem_INSN_UNLOCK },
 158     { M32R2F_INSN_SATB, && case_sem_INSN_SATB },
 159     { M32R2F_INSN_SATH, && case_sem_INSN_SATH },
 160     { M32R2F_INSN_SAT, && case_sem_INSN_SAT },
 161     { M32R2F_INSN_PCMPBZ, && case_sem_INSN_PCMPBZ },
 162     { M32R2F_INSN_SADD, && case_sem_INSN_SADD },
 163     { M32R2F_INSN_MACWU1, && case_sem_INSN_MACWU1 },
 164     { M32R2F_INSN_MSBLO, && case_sem_INSN_MSBLO },
 165     { M32R2F_INSN_MULWU1, && case_sem_INSN_MULWU1 },
 166     { M32R2F_INSN_MACLH1, && case_sem_INSN_MACLH1 },
 167     { M32R2F_INSN_SC, && case_sem_INSN_SC },
 168     { M32R2F_INSN_SNC, && case_sem_INSN_SNC },
 169     { M32R2F_INSN_CLRPSW, && case_sem_INSN_CLRPSW },
 170     { M32R2F_INSN_SETPSW, && case_sem_INSN_SETPSW },
 171     { M32R2F_INSN_BSET, && case_sem_INSN_BSET },
 172     { M32R2F_INSN_BCLR, && case_sem_INSN_BCLR },
 173     { M32R2F_INSN_BTST, && case_sem_INSN_BTST },
 174     { M32R2F_INSN_PAR_ADD, && case_sem_INSN_PAR_ADD },
 175     { M32R2F_INSN_WRITE_ADD, && case_sem_INSN_WRITE_ADD },
 176     { M32R2F_INSN_PAR_AND, && case_sem_INSN_PAR_AND },
 177     { M32R2F_INSN_WRITE_AND, && case_sem_INSN_WRITE_AND },
 178     { M32R2F_INSN_PAR_OR, && case_sem_INSN_PAR_OR },
 179     { M32R2F_INSN_WRITE_OR, && case_sem_INSN_WRITE_OR },
 180     { M32R2F_INSN_PAR_XOR, && case_sem_INSN_PAR_XOR },
 181     { M32R2F_INSN_WRITE_XOR, && case_sem_INSN_WRITE_XOR },
 182     { M32R2F_INSN_PAR_ADDI, && case_sem_INSN_PAR_ADDI },
 183     { M32R2F_INSN_WRITE_ADDI, && case_sem_INSN_WRITE_ADDI },
 184     { M32R2F_INSN_PAR_ADDV, && case_sem_INSN_PAR_ADDV },
 185     { M32R2F_INSN_WRITE_ADDV, && case_sem_INSN_WRITE_ADDV },
 186     { M32R2F_INSN_PAR_ADDX, && case_sem_INSN_PAR_ADDX },
 187     { M32R2F_INSN_WRITE_ADDX, && case_sem_INSN_WRITE_ADDX },
 188     { M32R2F_INSN_PAR_BC8, && case_sem_INSN_PAR_BC8 },
 189     { M32R2F_INSN_WRITE_BC8, && case_sem_INSN_WRITE_BC8 },
 190     { M32R2F_INSN_PAR_BL8, && case_sem_INSN_PAR_BL8 },
 191     { M32R2F_INSN_WRITE_BL8, && case_sem_INSN_WRITE_BL8 },
 192     { M32R2F_INSN_PAR_BCL8, && case_sem_INSN_PAR_BCL8 },
 193     { M32R2F_INSN_WRITE_BCL8, && case_sem_INSN_WRITE_BCL8 },
 194     { M32R2F_INSN_PAR_BNC8, && case_sem_INSN_PAR_BNC8 },
 195     { M32R2F_INSN_WRITE_BNC8, && case_sem_INSN_WRITE_BNC8 },
 196     { M32R2F_INSN_PAR_BRA8, && case_sem_INSN_PAR_BRA8 },
 197     { M32R2F_INSN_WRITE_BRA8, && case_sem_INSN_WRITE_BRA8 },
 198     { M32R2F_INSN_PAR_BNCL8, && case_sem_INSN_PAR_BNCL8 },
 199     { M32R2F_INSN_WRITE_BNCL8, && case_sem_INSN_WRITE_BNCL8 },
 200     { M32R2F_INSN_PAR_CMP, && case_sem_INSN_PAR_CMP },
 201     { M32R2F_INSN_WRITE_CMP, && case_sem_INSN_WRITE_CMP },
 202     { M32R2F_INSN_PAR_CMPU, && case_sem_INSN_PAR_CMPU },
 203     { M32R2F_INSN_WRITE_CMPU, && case_sem_INSN_WRITE_CMPU },
 204     { M32R2F_INSN_PAR_CMPEQ, && case_sem_INSN_PAR_CMPEQ },
 205     { M32R2F_INSN_WRITE_CMPEQ, && case_sem_INSN_WRITE_CMPEQ },
 206     { M32R2F_INSN_PAR_CMPZ, && case_sem_INSN_PAR_CMPZ },
 207     { M32R2F_INSN_WRITE_CMPZ, && case_sem_INSN_WRITE_CMPZ },
 208     { M32R2F_INSN_PAR_JC, && case_sem_INSN_PAR_JC },
 209     { M32R2F_INSN_WRITE_JC, && case_sem_INSN_WRITE_JC },
 210     { M32R2F_INSN_PAR_JNC, && case_sem_INSN_PAR_JNC },
 211     { M32R2F_INSN_WRITE_JNC, && case_sem_INSN_WRITE_JNC },
 212     { M32R2F_INSN_PAR_JL, && case_sem_INSN_PAR_JL },
 213     { M32R2F_INSN_WRITE_JL, && case_sem_INSN_WRITE_JL },
 214     { M32R2F_INSN_PAR_JMP, && case_sem_INSN_PAR_JMP },
 215     { M32R2F_INSN_WRITE_JMP, && case_sem_INSN_WRITE_JMP },
 216     { M32R2F_INSN_PAR_LD, && case_sem_INSN_PAR_LD },
 217     { M32R2F_INSN_WRITE_LD, && case_sem_INSN_WRITE_LD },
 218     { M32R2F_INSN_PAR_LDB, && case_sem_INSN_PAR_LDB },
 219     { M32R2F_INSN_WRITE_LDB, && case_sem_INSN_WRITE_LDB },
 220     { M32R2F_INSN_PAR_LDH, && case_sem_INSN_PAR_LDH },
 221     { M32R2F_INSN_WRITE_LDH, && case_sem_INSN_WRITE_LDH },
 222     { M32R2F_INSN_PAR_LDUB, && case_sem_INSN_PAR_LDUB },
 223     { M32R2F_INSN_WRITE_LDUB, && case_sem_INSN_WRITE_LDUB },
 224     { M32R2F_INSN_PAR_LDUH, && case_sem_INSN_PAR_LDUH },
 225     { M32R2F_INSN_WRITE_LDUH, && case_sem_INSN_WRITE_LDUH },
 226     { M32R2F_INSN_PAR_LD_PLUS, && case_sem_INSN_PAR_LD_PLUS },
 227     { M32R2F_INSN_WRITE_LD_PLUS, && case_sem_INSN_WRITE_LD_PLUS },
 228     { M32R2F_INSN_PAR_LDI8, && case_sem_INSN_PAR_LDI8 },
 229     { M32R2F_INSN_WRITE_LDI8, && case_sem_INSN_WRITE_LDI8 },
 230     { M32R2F_INSN_PAR_LOCK, && case_sem_INSN_PAR_LOCK },
 231     { M32R2F_INSN_WRITE_LOCK, && case_sem_INSN_WRITE_LOCK },
 232     { M32R2F_INSN_PAR_MACHI_A, && case_sem_INSN_PAR_MACHI_A },
 233     { M32R2F_INSN_WRITE_MACHI_A, && case_sem_INSN_WRITE_MACHI_A },
 234     { M32R2F_INSN_PAR_MACLO_A, && case_sem_INSN_PAR_MACLO_A },
 235     { M32R2F_INSN_WRITE_MACLO_A, && case_sem_INSN_WRITE_MACLO_A },
 236     { M32R2F_INSN_PAR_MACWHI_A, && case_sem_INSN_PAR_MACWHI_A },
 237     { M32R2F_INSN_WRITE_MACWHI_A, && case_sem_INSN_WRITE_MACWHI_A },
 238     { M32R2F_INSN_PAR_MACWLO_A, && case_sem_INSN_PAR_MACWLO_A },
 239     { M32R2F_INSN_WRITE_MACWLO_A, && case_sem_INSN_WRITE_MACWLO_A },
 240     { M32R2F_INSN_PAR_MUL, && case_sem_INSN_PAR_MUL },
 241     { M32R2F_INSN_WRITE_MUL, && case_sem_INSN_WRITE_MUL },
 242     { M32R2F_INSN_PAR_MULHI_A, && case_sem_INSN_PAR_MULHI_A },
 243     { M32R2F_INSN_WRITE_MULHI_A, && case_sem_INSN_WRITE_MULHI_A },
 244     { M32R2F_INSN_PAR_MULLO_A, && case_sem_INSN_PAR_MULLO_A },
 245     { M32R2F_INSN_WRITE_MULLO_A, && case_sem_INSN_WRITE_MULLO_A },
 246     { M32R2F_INSN_PAR_MULWHI_A, && case_sem_INSN_PAR_MULWHI_A },
 247     { M32R2F_INSN_WRITE_MULWHI_A, && case_sem_INSN_WRITE_MULWHI_A },
 248     { M32R2F_INSN_PAR_MULWLO_A, && case_sem_INSN_PAR_MULWLO_A },
 249     { M32R2F_INSN_WRITE_MULWLO_A, && case_sem_INSN_WRITE_MULWLO_A },
 250     { M32R2F_INSN_PAR_MV, && case_sem_INSN_PAR_MV },
 251     { M32R2F_INSN_WRITE_MV, && case_sem_INSN_WRITE_MV },
 252     { M32R2F_INSN_PAR_MVFACHI_A, && case_sem_INSN_PAR_MVFACHI_A },
 253     { M32R2F_INSN_WRITE_MVFACHI_A, && case_sem_INSN_WRITE_MVFACHI_A },
 254     { M32R2F_INSN_PAR_MVFACLO_A, && case_sem_INSN_PAR_MVFACLO_A },
 255     { M32R2F_INSN_WRITE_MVFACLO_A, && case_sem_INSN_WRITE_MVFACLO_A },
 256     { M32R2F_INSN_PAR_MVFACMI_A, && case_sem_INSN_PAR_MVFACMI_A },
 257     { M32R2F_INSN_WRITE_MVFACMI_A, && case_sem_INSN_WRITE_MVFACMI_A },
 258     { M32R2F_INSN_PAR_MVFC, && case_sem_INSN_PAR_MVFC },
 259     { M32R2F_INSN_WRITE_MVFC, && case_sem_INSN_WRITE_MVFC },
 260     { M32R2F_INSN_PAR_MVTACHI_A, && case_sem_INSN_PAR_MVTACHI_A },
 261     { M32R2F_INSN_WRITE_MVTACHI_A, && case_sem_INSN_WRITE_MVTACHI_A },
 262     { M32R2F_INSN_PAR_MVTACLO_A, && case_sem_INSN_PAR_MVTACLO_A },
 263     { M32R2F_INSN_WRITE_MVTACLO_A, && case_sem_INSN_WRITE_MVTACLO_A },
 264     { M32R2F_INSN_PAR_MVTC, && case_sem_INSN_PAR_MVTC },
 265     { M32R2F_INSN_WRITE_MVTC, && case_sem_INSN_WRITE_MVTC },
 266     { M32R2F_INSN_PAR_NEG, && case_sem_INSN_PAR_NEG },
 267     { M32R2F_INSN_WRITE_NEG, && case_sem_INSN_WRITE_NEG },
 268     { M32R2F_INSN_PAR_NOP, && case_sem_INSN_PAR_NOP },
 269     { M32R2F_INSN_WRITE_NOP, && case_sem_INSN_WRITE_NOP },
 270     { M32R2F_INSN_PAR_NOT, && case_sem_INSN_PAR_NOT },
 271     { M32R2F_INSN_WRITE_NOT, && case_sem_INSN_WRITE_NOT },
 272     { M32R2F_INSN_PAR_RAC_DSI, && case_sem_INSN_PAR_RAC_DSI },
 273     { M32R2F_INSN_WRITE_RAC_DSI, && case_sem_INSN_WRITE_RAC_DSI },
 274     { M32R2F_INSN_PAR_RACH_DSI, && case_sem_INSN_PAR_RACH_DSI },
 275     { M32R2F_INSN_WRITE_RACH_DSI, && case_sem_INSN_WRITE_RACH_DSI },
 276     { M32R2F_INSN_PAR_RTE, && case_sem_INSN_PAR_RTE },
 277     { M32R2F_INSN_WRITE_RTE, && case_sem_INSN_WRITE_RTE },
 278     { M32R2F_INSN_PAR_SLL, && case_sem_INSN_PAR_SLL },
 279     { M32R2F_INSN_WRITE_SLL, && case_sem_INSN_WRITE_SLL },
 280     { M32R2F_INSN_PAR_SLLI, && case_sem_INSN_PAR_SLLI },
 281     { M32R2F_INSN_WRITE_SLLI, && case_sem_INSN_WRITE_SLLI },
 282     { M32R2F_INSN_PAR_SRA, && case_sem_INSN_PAR_SRA },
 283     { M32R2F_INSN_WRITE_SRA, && case_sem_INSN_WRITE_SRA },
 284     { M32R2F_INSN_PAR_SRAI, && case_sem_INSN_PAR_SRAI },
 285     { M32R2F_INSN_WRITE_SRAI, && case_sem_INSN_WRITE_SRAI },
 286     { M32R2F_INSN_PAR_SRL, && case_sem_INSN_PAR_SRL },
 287     { M32R2F_INSN_WRITE_SRL, && case_sem_INSN_WRITE_SRL },
 288     { M32R2F_INSN_PAR_SRLI, && case_sem_INSN_PAR_SRLI },
 289     { M32R2F_INSN_WRITE_SRLI, && case_sem_INSN_WRITE_SRLI },
 290     { M32R2F_INSN_PAR_ST, && case_sem_INSN_PAR_ST },
 291     { M32R2F_INSN_WRITE_ST, && case_sem_INSN_WRITE_ST },
 292     { M32R2F_INSN_PAR_STB, && case_sem_INSN_PAR_STB },
 293     { M32R2F_INSN_WRITE_STB, && case_sem_INSN_WRITE_STB },
 294     { M32R2F_INSN_PAR_STH, && case_sem_INSN_PAR_STH },
 295     { M32R2F_INSN_WRITE_STH, && case_sem_INSN_WRITE_STH },
 296     { M32R2F_INSN_PAR_ST_PLUS, && case_sem_INSN_PAR_ST_PLUS },
 297     { M32R2F_INSN_WRITE_ST_PLUS, && case_sem_INSN_WRITE_ST_PLUS },
 298     { M32R2F_INSN_PAR_STH_PLUS, && case_sem_INSN_PAR_STH_PLUS },
 299     { M32R2F_INSN_WRITE_STH_PLUS, && case_sem_INSN_WRITE_STH_PLUS },
 300     { M32R2F_INSN_PAR_STB_PLUS, && case_sem_INSN_PAR_STB_PLUS },
 301     { M32R2F_INSN_WRITE_STB_PLUS, && case_sem_INSN_WRITE_STB_PLUS },
 302     { M32R2F_INSN_PAR_ST_MINUS, && case_sem_INSN_PAR_ST_MINUS },
 303     { M32R2F_INSN_WRITE_ST_MINUS, && case_sem_INSN_WRITE_ST_MINUS },
 304     { M32R2F_INSN_PAR_SUB, && case_sem_INSN_PAR_SUB },
 305     { M32R2F_INSN_WRITE_SUB, && case_sem_INSN_WRITE_SUB },
 306     { M32R2F_INSN_PAR_SUBV, && case_sem_INSN_PAR_SUBV },
 307     { M32R2F_INSN_WRITE_SUBV, && case_sem_INSN_WRITE_SUBV },
 308     { M32R2F_INSN_PAR_SUBX, && case_sem_INSN_PAR_SUBX },
 309     { M32R2F_INSN_WRITE_SUBX, && case_sem_INSN_WRITE_SUBX },
 310     { M32R2F_INSN_PAR_TRAP, && case_sem_INSN_PAR_TRAP },
 311     { M32R2F_INSN_WRITE_TRAP, && case_sem_INSN_WRITE_TRAP },
 312     { M32R2F_INSN_PAR_UNLOCK, && case_sem_INSN_PAR_UNLOCK },
 313     { M32R2F_INSN_WRITE_UNLOCK, && case_sem_INSN_WRITE_UNLOCK },
 314     { M32R2F_INSN_PAR_PCMPBZ, && case_sem_INSN_PAR_PCMPBZ },
 315     { M32R2F_INSN_WRITE_PCMPBZ, && case_sem_INSN_WRITE_PCMPBZ },
 316     { M32R2F_INSN_PAR_SADD, && case_sem_INSN_PAR_SADD },
 317     { M32R2F_INSN_WRITE_SADD, && case_sem_INSN_WRITE_SADD },
 318     { M32R2F_INSN_PAR_MACWU1, && case_sem_INSN_PAR_MACWU1 },
 319     { M32R2F_INSN_WRITE_MACWU1, && case_sem_INSN_WRITE_MACWU1 },
 320     { M32R2F_INSN_PAR_MSBLO, && case_sem_INSN_PAR_MSBLO },
 321     { M32R2F_INSN_WRITE_MSBLO, && case_sem_INSN_WRITE_MSBLO },
 322     { M32R2F_INSN_PAR_MULWU1, && case_sem_INSN_PAR_MULWU1 },
 323     { M32R2F_INSN_WRITE_MULWU1, && case_sem_INSN_WRITE_MULWU1 },
 324     { M32R2F_INSN_PAR_MACLH1, && case_sem_INSN_PAR_MACLH1 },
 325     { M32R2F_INSN_WRITE_MACLH1, && case_sem_INSN_WRITE_MACLH1 },
 326     { M32R2F_INSN_PAR_SC, && case_sem_INSN_PAR_SC },
 327     { M32R2F_INSN_WRITE_SC, && case_sem_INSN_WRITE_SC },
 328     { M32R2F_INSN_PAR_SNC, && case_sem_INSN_PAR_SNC },
 329     { M32R2F_INSN_WRITE_SNC, && case_sem_INSN_WRITE_SNC },
 330     { M32R2F_INSN_PAR_CLRPSW, && case_sem_INSN_PAR_CLRPSW },
 331     { M32R2F_INSN_WRITE_CLRPSW, && case_sem_INSN_WRITE_CLRPSW },
 332     { M32R2F_INSN_PAR_SETPSW, && case_sem_INSN_PAR_SETPSW },
 333     { M32R2F_INSN_WRITE_SETPSW, && case_sem_INSN_WRITE_SETPSW },
 334     { M32R2F_INSN_PAR_BTST, && case_sem_INSN_PAR_BTST },
 335     { M32R2F_INSN_WRITE_BTST, && case_sem_INSN_WRITE_BTST },
 336     { 0, 0 }
 337   };
 338   int i;
 339
 340   for (i = 0; labels[i].label != 0; ++i)
 341     {
 342 #if FAST_P
 343       CPU_IDESC (current_cpu) [labels[i].index].sem_fast_lab = labels[i].label;
 344 #else
 345       CPU_IDESC (current_cpu) [labels[i].index].sem_full_lab = labels[i].label;
 346 #endif
 347     }
 348
 349 #undef DEFINE_LABELS
 350 #endif /* DEFINE_LABELS */
 351
 352 #ifdef DEFINE_SWITCH
 353
 354 /* If hyper-fast [well not unnecessarily slow] execution is selected, turn
 355    off frills like tracing and profiling.  */
 356 /* FIXME: A better way would be to have TRACE_RESULT check for something
 357    that can cause it to be optimized out.  Another way would be to emit
 358    special handlers into the instruction "stream".  */
 359
 360 #if FAST_P
 361 #undef TRACE_RESULT
 362 #define TRACE_RESULT(cpu, abuf, name, type, val)
 363 #endif
 364
 365 #undef GET_ATTR
 366 #if defined (__STDC__) || defined (ALMOST_STDC) || defined (HAVE_STRINGIZE)
 367 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
 368 #else
 369 #define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_/**/attr)
 370 #endif
 371
 372 {
 373
 374 #if WITH_SCACHE_PBB
 375
 376 /* Branch to next handler without going around main loop.  */
 377 #define NEXT(vpc) goto * SEM_ARGBUF (vpc) -> semantic.sem_case
 378 SWITCH (sem, SEM_ARGBUF (vpc) -> semantic.sem_case)
 379
 380 #else /* ! WITH_SCACHE_PBB */
 381
 382 #define NEXT(vpc) BREAK (sem)
 383 #ifdef __GNUC__
 384 #if FAST_P
 385   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_fast_lab)
 386 #else
 387   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->sem_full_lab)
 388 #endif
 389 #else
 390   SWITCH (sem, SEM_ARGBUF (sc) -> idesc->num)
 391 #endif
 392
 393 #endif /* ! WITH_SCACHE_PBB */
 394
 395     {
 396
 397   CASE (sem, INSN_X_INVALID) : /* --invalid-- */
 398 {
 399   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 400   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 401 #define FLD(f) abuf->fields.fmt_empty.f
 402   int UNUSED written = 0;
 403   IADDR UNUSED pc = abuf->addr;
 404   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 405
 406   {
 407     /* Update the recorded pc in the cpu state struct.
 408        Only necessary for WITH_SCACHE case, but to avoid the
 409        conditional compilation ....  */
 410     SET_H_PC (pc);
 411     /* Virtual insns have zero size.  Overwrite vpc with address of next insn
 412        using the default-insn-bitsize spec.  When executing insns in parallel
 413        we may want to queue the fault and continue execution.  */
 414     vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 415     vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
 416   }
 417
 418 #undef FLD
 419 }
 420   NEXT (vpc);
 421
 422   CASE (sem, INSN_X_AFTER) : /* --after-- */
 423 {
 424   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 425   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 426 #define FLD(f) abuf->fields.fmt_empty.f
 427   int UNUSED written = 0;
 428   IADDR UNUSED pc = abuf->addr;
 429   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 430
 431   {
 432 #if WITH_SCACHE_PBB_M32R2F
 433     m32r2f_pbb_after (current_cpu, sem_arg);
 434 #endif
 435   }
 436
 437 #undef FLD
 438 }
 439   NEXT (vpc);
 440
 441   CASE (sem, INSN_X_BEFORE) : /* --before-- */
 442 {
 443   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 444   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 445 #define FLD(f) abuf->fields.fmt_empty.f
 446   int UNUSED written = 0;
 447   IADDR UNUSED pc = abuf->addr;
 448   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 449
 450   {
 451 #if WITH_SCACHE_PBB_M32R2F
 452     m32r2f_pbb_before (current_cpu, sem_arg);
 453 #endif
 454   }
 455
 456 #undef FLD
 457 }
 458   NEXT (vpc);
 459
 460   CASE (sem, INSN_X_CTI_CHAIN) : /* --cti-chain-- */
 461 {
 462   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 463   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 464 #define FLD(f) abuf->fields.fmt_empty.f
 465   int UNUSED written = 0;
 466   IADDR UNUSED pc = abuf->addr;
 467   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 468
 469   {
 470 #if WITH_SCACHE_PBB_M32R2F
 471 #ifdef DEFINE_SWITCH
 472     vpc = m32r2f_pbb_cti_chain (current_cpu, sem_arg,
 473                                pbb_br_type, pbb_br_npc);
 474     BREAK (sem);
 475 #else
 476     /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
 477     vpc = m32r2f_pbb_cti_chain (current_cpu, sem_arg,
 478                                CPU_PBB_BR_TYPE (current_cpu),
 479                                CPU_PBB_BR_NPC (current_cpu));
 480 #endif
 481 #endif
 482   }
 483
 484 #undef FLD
 485 }
 486   NEXT (vpc);
 487
 488   CASE (sem, INSN_X_CHAIN) : /* --chain-- */
 489 {
 490   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 491   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 492 #define FLD(f) abuf->fields.fmt_empty.f
 493   int UNUSED written = 0;
 494   IADDR UNUSED pc = abuf->addr;
 495   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 496
 497   {
 498 #if WITH_SCACHE_PBB_M32R2F
 499     vpc = m32r2f_pbb_chain (current_cpu, sem_arg);
 500 #ifdef DEFINE_SWITCH
 501     BREAK (sem);
 502 #endif
 503 #endif
 504   }
 505
 506 #undef FLD
 507 }
 508   NEXT (vpc);
 509
 510   CASE (sem, INSN_X_BEGIN) : /* --begin-- */
 511 {
 512   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 513   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 514 #define FLD(f) abuf->fields.fmt_empty.f
 515   int UNUSED written = 0;
 516   IADDR UNUSED pc = abuf->addr;
 517   vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
 518
 519   {
 520 #if WITH_SCACHE_PBB_M32R2F
 521 #if defined DEFINE_SWITCH || defined FAST_P
 522     /* In the switch case FAST_P is a constant, allowing several optimizations
 523        in any called inline functions.  */
 524     vpc = m32r2f_pbb_begin (current_cpu, FAST_P);
 525 #else
 526 #if 0 /* cgen engine can't handle dynamic fast/full switching yet.  */
 527     vpc = m32r2f_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
 528 #else
 529     vpc = m32r2f_pbb_begin (current_cpu, 0);
 530 #endif
 531 #endif
 532 #endif
 533   }
 534
 535 #undef FLD
 536 }
 537   NEXT (vpc);
 538
 539   CASE (sem, INSN_ADD) : /* add $dr,$sr */
 540 {
 541   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 542   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 543 #define FLD(f) abuf->fields.sfmt_add.f
 544   int UNUSED written = 0;
 545   IADDR UNUSED pc = abuf->addr;
 546   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 547
 548   {
 549     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
 550     * FLD (i_dr) = opval;
 551     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 552   }
 553
 554 #undef FLD
 555 }
 556   NEXT (vpc);
 557
 558   CASE (sem, INSN_ADD3) : /* add3 $dr,$sr,$hash$slo16 */
 559 {
 560   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 561   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 562 #define FLD(f) abuf->fields.sfmt_add3.f
 563   int UNUSED written = 0;
 564   IADDR UNUSED pc = abuf->addr;
 565   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 566
 567   {
 568     SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
 569     * FLD (i_dr) = opval;
 570     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 571   }
 572
 573 #undef FLD
 574 }
 575   NEXT (vpc);
 576
 577   CASE (sem, INSN_AND) : /* and $dr,$sr */
 578 {
 579   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 580   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 581 #define FLD(f) abuf->fields.sfmt_add.f
 582   int UNUSED written = 0;
 583   IADDR UNUSED pc = abuf->addr;
 584   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 585
 586   {
 587     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
 588     * FLD (i_dr) = opval;
 589     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 590   }
 591
 592 #undef FLD
 593 }
 594   NEXT (vpc);
 595
 596   CASE (sem, INSN_AND3) : /* and3 $dr,$sr,$uimm16 */
 597 {
 598   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 599   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 600 #define FLD(f) abuf->fields.sfmt_and3.f
 601   int UNUSED written = 0;
 602   IADDR UNUSED pc = abuf->addr;
 603   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 604
 605   {
 606     SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
 607     * FLD (i_dr) = opval;
 608     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 609   }
 610
 611 #undef FLD
 612 }
 613   NEXT (vpc);
 614
 615   CASE (sem, INSN_OR) : /* or $dr,$sr */
 616 {
 617   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 618   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 619 #define FLD(f) abuf->fields.sfmt_add.f
 620   int UNUSED written = 0;
 621   IADDR UNUSED pc = abuf->addr;
 622   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 623
 624   {
 625     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
 626     * FLD (i_dr) = opval;
 627     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 628   }
 629
 630 #undef FLD
 631 }
 632   NEXT (vpc);
 633
 634   CASE (sem, INSN_OR3) : /* or3 $dr,$sr,$hash$ulo16 */
 635 {
 636   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 637   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 638 #define FLD(f) abuf->fields.sfmt_and3.f
 639   int UNUSED written = 0;
 640   IADDR UNUSED pc = abuf->addr;
 641   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 642
 643   {
 644     SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
 645     * FLD (i_dr) = opval;
 646     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 647   }
 648
 649 #undef FLD
 650 }
 651   NEXT (vpc);
 652
 653   CASE (sem, INSN_XOR) : /* xor $dr,$sr */
 654 {
 655   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 656   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 657 #define FLD(f) abuf->fields.sfmt_add.f
 658   int UNUSED written = 0;
 659   IADDR UNUSED pc = abuf->addr;
 660   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 661
 662   {
 663     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
 664     * FLD (i_dr) = opval;
 665     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 666   }
 667
 668 #undef FLD
 669 }
 670   NEXT (vpc);
 671
 672   CASE (sem, INSN_XOR3) : /* xor3 $dr,$sr,$uimm16 */
 673 {
 674   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 675   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 676 #define FLD(f) abuf->fields.sfmt_and3.f
 677   int UNUSED written = 0;
 678   IADDR UNUSED pc = abuf->addr;
 679   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 680
 681   {
 682     SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
 683     * FLD (i_dr) = opval;
 684     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 685   }
 686
 687 #undef FLD
 688 }
 689   NEXT (vpc);
 690
 691   CASE (sem, INSN_ADDI) : /* addi $dr,$simm8 */
 692 {
 693   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 694   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 695 #define FLD(f) abuf->fields.sfmt_addi.f
 696   int UNUSED written = 0;
 697   IADDR UNUSED pc = abuf->addr;
 698   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 699
 700   {
 701     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
 702     * FLD (i_dr) = opval;
 703     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 704   }
 705
 706 #undef FLD
 707 }
 708   NEXT (vpc);
 709
 710   CASE (sem, INSN_ADDV) : /* addv $dr,$sr */
 711 {
 712   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 713   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 714 #define FLD(f) abuf->fields.sfmt_add.f
 715   int UNUSED written = 0;
 716   IADDR UNUSED pc = abuf->addr;
 717   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 718
 719 {
 720   SI temp0;BI temp1;
 721   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
 722   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
 723   {
 724     SI opval = temp0;
 725     * FLD (i_dr) = opval;
 726     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 727   }
 728   {
 729     BI opval = temp1;
 730     CPU (h_cond) = opval;
 731     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 732   }
 733 }
 734
 735 #undef FLD
 736 }
 737   NEXT (vpc);
 738
 739   CASE (sem, INSN_ADDV3) : /* addv3 $dr,$sr,$simm16 */
 740 {
 741   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 742   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 743 #define FLD(f) abuf->fields.sfmt_add3.f
 744   int UNUSED written = 0;
 745   IADDR UNUSED pc = abuf->addr;
 746   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 747
 748 {
 749   SI temp0;BI temp1;
 750   temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
 751   temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
 752   {
 753     SI opval = temp0;
 754     * FLD (i_dr) = opval;
 755     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 756   }
 757   {
 758     BI opval = temp1;
 759     CPU (h_cond) = opval;
 760     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 761   }
 762 }
 763
 764 #undef FLD
 765 }
 766   NEXT (vpc);
 767
 768   CASE (sem, INSN_ADDX) : /* addx $dr,$sr */
 769 {
 770   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 771   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 772 #define FLD(f) abuf->fields.sfmt_add.f
 773   int UNUSED written = 0;
 774   IADDR UNUSED pc = abuf->addr;
 775   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 776
 777 {
 778   SI temp0;BI temp1;
 779   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 780   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
 781   {
 782     SI opval = temp0;
 783     * FLD (i_dr) = opval;
 784     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
 785   }
 786   {
 787     BI opval = temp1;
 788     CPU (h_cond) = opval;
 789     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
 790   }
 791 }
 792
 793 #undef FLD
 794 }
 795   NEXT (vpc);
 796
 797   CASE (sem, INSN_BC8) : /* bc.s $disp8 */
 798 {
 799   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 800   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 801 #define FLD(f) abuf->fields.sfmt_bl8.f
 802   int UNUSED written = 0;
 803   IADDR UNUSED pc = abuf->addr;
 804   SEM_BRANCH_INIT
 805   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
 806
 807 if (CPU (h_cond)) {
 808   {
 809     USI opval = FLD (i_disp8);
 810     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 811     written |= (1 << 2);
 812     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 813   }
 814 }
 815
 816   abuf->written = written;
 817   SEM_BRANCH_FINI (vpc);
 818 #undef FLD
 819 }
 820   NEXT (vpc);
 821
 822   CASE (sem, INSN_BC24) : /* bc.l $disp24 */
 823 {
 824   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 825   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 826 #define FLD(f) abuf->fields.sfmt_bl24.f
 827   int UNUSED written = 0;
 828   IADDR UNUSED pc = abuf->addr;
 829   SEM_BRANCH_INIT
 830   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 831
 832 if (CPU (h_cond)) {
 833   {
 834     USI opval = FLD (i_disp24);
 835     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 836     written |= (1 << 2);
 837     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 838   }
 839 }
 840
 841   abuf->written = written;
 842   SEM_BRANCH_FINI (vpc);
 843 #undef FLD
 844 }
 845   NEXT (vpc);
 846
 847   CASE (sem, INSN_BEQ) : /* beq $src1,$src2,$disp16 */
 848 {
 849   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 850   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 851 #define FLD(f) abuf->fields.sfmt_beq.f
 852   int UNUSED written = 0;
 853   IADDR UNUSED pc = abuf->addr;
 854   SEM_BRANCH_INIT
 855   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 856
 857 if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
 858   {
 859     USI opval = FLD (i_disp16);
 860     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 861     written |= (1 << 3);
 862     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 863   }
 864 }
 865
 866   abuf->written = written;
 867   SEM_BRANCH_FINI (vpc);
 868 #undef FLD
 869 }
 870   NEXT (vpc);
 871
 872   CASE (sem, INSN_BEQZ) : /* beqz $src2,$disp16 */
 873 {
 874   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 875   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 876 #define FLD(f) abuf->fields.sfmt_beq.f
 877   int UNUSED written = 0;
 878   IADDR UNUSED pc = abuf->addr;
 879   SEM_BRANCH_INIT
 880   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 881
 882 if (EQSI (* FLD (i_src2), 0)) {
 883   {
 884     USI opval = FLD (i_disp16);
 885     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 886     written |= (1 << 2);
 887     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 888   }
 889 }
 890
 891   abuf->written = written;
 892   SEM_BRANCH_FINI (vpc);
 893 #undef FLD
 894 }
 895   NEXT (vpc);
 896
 897   CASE (sem, INSN_BGEZ) : /* bgez $src2,$disp16 */
 898 {
 899   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 900   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 901 #define FLD(f) abuf->fields.sfmt_beq.f
 902   int UNUSED written = 0;
 903   IADDR UNUSED pc = abuf->addr;
 904   SEM_BRANCH_INIT
 905   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 906
 907 if (GESI (* FLD (i_src2), 0)) {
 908   {
 909     USI opval = FLD (i_disp16);
 910     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 911     written |= (1 << 2);
 912     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 913   }
 914 }
 915
 916   abuf->written = written;
 917   SEM_BRANCH_FINI (vpc);
 918 #undef FLD
 919 }
 920   NEXT (vpc);
 921
 922   CASE (sem, INSN_BGTZ) : /* bgtz $src2,$disp16 */
 923 {
 924   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 925   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 926 #define FLD(f) abuf->fields.sfmt_beq.f
 927   int UNUSED written = 0;
 928   IADDR UNUSED pc = abuf->addr;
 929   SEM_BRANCH_INIT
 930   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 931
 932 if (GTSI (* FLD (i_src2), 0)) {
 933   {
 934     USI opval = FLD (i_disp16);
 935     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 936     written |= (1 << 2);
 937     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 938   }
 939 }
 940
 941   abuf->written = written;
 942   SEM_BRANCH_FINI (vpc);
 943 #undef FLD
 944 }
 945   NEXT (vpc);
 946
 947   CASE (sem, INSN_BLEZ) : /* blez $src2,$disp16 */
 948 {
 949   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 950   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 951 #define FLD(f) abuf->fields.sfmt_beq.f
 952   int UNUSED written = 0;
 953   IADDR UNUSED pc = abuf->addr;
 954   SEM_BRANCH_INIT
 955   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 956
 957 if (LESI (* FLD (i_src2), 0)) {
 958   {
 959     USI opval = FLD (i_disp16);
 960     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 961     written |= (1 << 2);
 962     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 963   }
 964 }
 965
 966   abuf->written = written;
 967   SEM_BRANCH_FINI (vpc);
 968 #undef FLD
 969 }
 970   NEXT (vpc);
 971
 972   CASE (sem, INSN_BLTZ) : /* bltz $src2,$disp16 */
 973 {
 974   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
 975   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 976 #define FLD(f) abuf->fields.sfmt_beq.f
 977   int UNUSED written = 0;
 978   IADDR UNUSED pc = abuf->addr;
 979   SEM_BRANCH_INIT
 980   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
 981
 982 if (LTSI (* FLD (i_src2), 0)) {
 983   {
 984     USI opval = FLD (i_disp16);
 985     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
 986     written |= (1 << 2);
 987     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
 988   }
 989 }
 990
 991   abuf->written = written;
 992   SEM_BRANCH_FINI (vpc);
 993 #undef FLD
 994 }
 995   NEXT (vpc);
 996
 997   CASE (sem, INSN_BNEZ) : /* bnez $src2,$disp16 */
 998 {
 999   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1000   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1001 #define FLD(f) abuf->fields.sfmt_beq.f
1002   int UNUSED written = 0;
1003   IADDR UNUSED pc = abuf->addr;
1004   SEM_BRANCH_INIT
1005   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1006
1007 if (NESI (* FLD (i_src2), 0)) {
1008   {
1009     USI opval = FLD (i_disp16);
1010     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1011     written |= (1 << 2);
1012     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1013   }
1014 }
1015
1016   abuf->written = written;
1017   SEM_BRANCH_FINI (vpc);
1018 #undef FLD
1019 }
1020   NEXT (vpc);
1021
1022   CASE (sem, INSN_BL8) : /* bl.s $disp8 */
1023 {
1024   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1025   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1026 #define FLD(f) abuf->fields.sfmt_bl8.f
1027   int UNUSED written = 0;
1028   IADDR UNUSED pc = abuf->addr;
1029   SEM_BRANCH_INIT
1030   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1031
1032 {
1033   {
1034     SI opval = ADDSI (ANDSI (pc, -4), 4);
1035     CPU (h_gr[((UINT) 14)]) = opval;
1036     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1037   }
1038   {
1039     USI opval = FLD (i_disp8);
1040     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1041     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1042   }
1043 }
1044
1045   SEM_BRANCH_FINI (vpc);
1046 #undef FLD
1047 }
1048   NEXT (vpc);
1049
1050   CASE (sem, INSN_BL24) : /* bl.l $disp24 */
1051 {
1052   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1053   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1054 #define FLD(f) abuf->fields.sfmt_bl24.f
1055   int UNUSED written = 0;
1056   IADDR UNUSED pc = abuf->addr;
1057   SEM_BRANCH_INIT
1058   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1059
1060 {
1061   {
1062     SI opval = ADDSI (pc, 4);
1063     CPU (h_gr[((UINT) 14)]) = opval;
1064     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1065   }
1066   {
1067     USI opval = FLD (i_disp24);
1068     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1069     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1070   }
1071 }
1072
1073   SEM_BRANCH_FINI (vpc);
1074 #undef FLD
1075 }
1076   NEXT (vpc);
1077
1078   CASE (sem, INSN_BCL8) : /* bcl.s $disp8 */
1079 {
1080   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1081   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1082 #define FLD(f) abuf->fields.sfmt_bl8.f
1083   int UNUSED written = 0;
1084   IADDR UNUSED pc = abuf->addr;
1085   SEM_BRANCH_INIT
1086   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1087
1088 if (CPU (h_cond)) {
1089 {
1090   {
1091     SI opval = ADDSI (ANDSI (pc, -4), 4);
1092     CPU (h_gr[((UINT) 14)]) = opval;
1093     written |= (1 << 3);
1094     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1095   }
1096   {
1097     USI opval = FLD (i_disp8);
1098     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1099     written |= (1 << 4);
1100     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1101   }
1102 }
1103 }
1104
1105   abuf->written = written;
1106   SEM_BRANCH_FINI (vpc);
1107 #undef FLD
1108 }
1109   NEXT (vpc);
1110
1111   CASE (sem, INSN_BCL24) : /* bcl.l $disp24 */
1112 {
1113   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1114   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1115 #define FLD(f) abuf->fields.sfmt_bl24.f
1116   int UNUSED written = 0;
1117   IADDR UNUSED pc = abuf->addr;
1118   SEM_BRANCH_INIT
1119   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1120
1121 if (CPU (h_cond)) {
1122 {
1123   {
1124     SI opval = ADDSI (pc, 4);
1125     CPU (h_gr[((UINT) 14)]) = opval;
1126     written |= (1 << 3);
1127     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1128   }
1129   {
1130     USI opval = FLD (i_disp24);
1131     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1132     written |= (1 << 4);
1133     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1134   }
1135 }
1136 }
1137
1138   abuf->written = written;
1139   SEM_BRANCH_FINI (vpc);
1140 #undef FLD
1141 }
1142   NEXT (vpc);
1143
1144   CASE (sem, INSN_BNC8) : /* bnc.s $disp8 */
1145 {
1146   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1147   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1148 #define FLD(f) abuf->fields.sfmt_bl8.f
1149   int UNUSED written = 0;
1150   IADDR UNUSED pc = abuf->addr;
1151   SEM_BRANCH_INIT
1152   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1153
1154 if (NOTBI (CPU (h_cond))) {
1155   {
1156     USI opval = FLD (i_disp8);
1157     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1158     written |= (1 << 2);
1159     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1160   }
1161 }
1162
1163   abuf->written = written;
1164   SEM_BRANCH_FINI (vpc);
1165 #undef FLD
1166 }
1167   NEXT (vpc);
1168
1169   CASE (sem, INSN_BNC24) : /* bnc.l $disp24 */
1170 {
1171   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1172   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1173 #define FLD(f) abuf->fields.sfmt_bl24.f
1174   int UNUSED written = 0;
1175   IADDR UNUSED pc = abuf->addr;
1176   SEM_BRANCH_INIT
1177   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1178
1179 if (NOTBI (CPU (h_cond))) {
1180   {
1181     USI opval = FLD (i_disp24);
1182     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1183     written |= (1 << 2);
1184     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1185   }
1186 }
1187
1188   abuf->written = written;
1189   SEM_BRANCH_FINI (vpc);
1190 #undef FLD
1191 }
1192   NEXT (vpc);
1193
1194   CASE (sem, INSN_BNE) : /* bne $src1,$src2,$disp16 */
1195 {
1196   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1197   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1198 #define FLD(f) abuf->fields.sfmt_beq.f
1199   int UNUSED written = 0;
1200   IADDR UNUSED pc = abuf->addr;
1201   SEM_BRANCH_INIT
1202   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1203
1204 if (NESI (* FLD (i_src1), * FLD (i_src2))) {
1205   {
1206     USI opval = FLD (i_disp16);
1207     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1208     written |= (1 << 3);
1209     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1210   }
1211 }
1212
1213   abuf->written = written;
1214   SEM_BRANCH_FINI (vpc);
1215 #undef FLD
1216 }
1217   NEXT (vpc);
1218
1219   CASE (sem, INSN_BRA8) : /* bra.s $disp8 */
1220 {
1221   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1222   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1223 #define FLD(f) abuf->fields.sfmt_bl8.f
1224   int UNUSED written = 0;
1225   IADDR UNUSED pc = abuf->addr;
1226   SEM_BRANCH_INIT
1227   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1228
1229   {
1230     USI opval = FLD (i_disp8);
1231     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1232     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1233   }
1234
1235   SEM_BRANCH_FINI (vpc);
1236 #undef FLD
1237 }
1238   NEXT (vpc);
1239
1240   CASE (sem, INSN_BRA24) : /* bra.l $disp24 */
1241 {
1242   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1243   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1244 #define FLD(f) abuf->fields.sfmt_bl24.f
1245   int UNUSED written = 0;
1246   IADDR UNUSED pc = abuf->addr;
1247   SEM_BRANCH_INIT
1248   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1249
1250   {
1251     USI opval = FLD (i_disp24);
1252     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1253     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1254   }
1255
1256   SEM_BRANCH_FINI (vpc);
1257 #undef FLD
1258 }
1259   NEXT (vpc);
1260
1261   CASE (sem, INSN_BNCL8) : /* bncl.s $disp8 */
1262 {
1263   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1264   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1265 #define FLD(f) abuf->fields.sfmt_bl8.f
1266   int UNUSED written = 0;
1267   IADDR UNUSED pc = abuf->addr;
1268   SEM_BRANCH_INIT
1269   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1270
1271 if (NOTBI (CPU (h_cond))) {
1272 {
1273   {
1274     SI opval = ADDSI (ANDSI (pc, -4), 4);
1275     CPU (h_gr[((UINT) 14)]) = opval;
1276     written |= (1 << 3);
1277     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1278   }
1279   {
1280     USI opval = FLD (i_disp8);
1281     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1282     written |= (1 << 4);
1283     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1284   }
1285 }
1286 }
1287
1288   abuf->written = written;
1289   SEM_BRANCH_FINI (vpc);
1290 #undef FLD
1291 }
1292   NEXT (vpc);
1293
1294   CASE (sem, INSN_BNCL24) : /* bncl.l $disp24 */
1295 {
1296   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1297   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1298 #define FLD(f) abuf->fields.sfmt_bl24.f
1299   int UNUSED written = 0;
1300   IADDR UNUSED pc = abuf->addr;
1301   SEM_BRANCH_INIT
1302   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1303
1304 if (NOTBI (CPU (h_cond))) {
1305 {
1306   {
1307     SI opval = ADDSI (pc, 4);
1308     CPU (h_gr[((UINT) 14)]) = opval;
1309     written |= (1 << 3);
1310     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1311   }
1312   {
1313     USI opval = FLD (i_disp24);
1314     SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
1315     written |= (1 << 4);
1316     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1317   }
1318 }
1319 }
1320
1321   abuf->written = written;
1322   SEM_BRANCH_FINI (vpc);
1323 #undef FLD
1324 }
1325   NEXT (vpc);
1326
1327   CASE (sem, INSN_CMP) : /* cmp $src1,$src2 */
1328 {
1329   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1330   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1331 #define FLD(f) abuf->fields.sfmt_st_plus.f
1332   int UNUSED written = 0;
1333   IADDR UNUSED pc = abuf->addr;
1334   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1335
1336   {
1337     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
1338     CPU (h_cond) = opval;
1339     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1340   }
1341
1342 #undef FLD
1343 }
1344   NEXT (vpc);
1345
1346   CASE (sem, INSN_CMPI) : /* cmpi $src2,$simm16 */
1347 {
1348   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1349   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1350 #define FLD(f) abuf->fields.sfmt_st_d.f
1351   int UNUSED written = 0;
1352   IADDR UNUSED pc = abuf->addr;
1353   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1354
1355   {
1356     BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
1357     CPU (h_cond) = opval;
1358     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1359   }
1360
1361 #undef FLD
1362 }
1363   NEXT (vpc);
1364
1365   CASE (sem, INSN_CMPU) : /* cmpu $src1,$src2 */
1366 {
1367   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1368   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1369 #define FLD(f) abuf->fields.sfmt_st_plus.f
1370   int UNUSED written = 0;
1371   IADDR UNUSED pc = abuf->addr;
1372   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1373
1374   {
1375     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
1376     CPU (h_cond) = opval;
1377     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1378   }
1379
1380 #undef FLD
1381 }
1382   NEXT (vpc);
1383
1384   CASE (sem, INSN_CMPUI) : /* cmpui $src2,$simm16 */
1385 {
1386   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1387   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1388 #define FLD(f) abuf->fields.sfmt_st_d.f
1389   int UNUSED written = 0;
1390   IADDR UNUSED pc = abuf->addr;
1391   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1392
1393   {
1394     BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
1395     CPU (h_cond) = opval;
1396     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1397   }
1398
1399 #undef FLD
1400 }
1401   NEXT (vpc);
1402
1403   CASE (sem, INSN_CMPEQ) : /* cmpeq $src1,$src2 */
1404 {
1405   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1406   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1407 #define FLD(f) abuf->fields.sfmt_st_plus.f
1408   int UNUSED written = 0;
1409   IADDR UNUSED pc = abuf->addr;
1410   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1411
1412   {
1413     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
1414     CPU (h_cond) = opval;
1415     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1416   }
1417
1418 #undef FLD
1419 }
1420   NEXT (vpc);
1421
1422   CASE (sem, INSN_CMPZ) : /* cmpz $src2 */
1423 {
1424   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1425   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1426 #define FLD(f) abuf->fields.sfmt_st_plus.f
1427   int UNUSED written = 0;
1428   IADDR UNUSED pc = abuf->addr;
1429   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1430
1431   {
1432     BI opval = EQSI (* FLD (i_src2), 0);
1433     CPU (h_cond) = opval;
1434     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
1435   }
1436
1437 #undef FLD
1438 }
1439   NEXT (vpc);
1440
1441   CASE (sem, INSN_DIV) : /* div $dr,$sr */
1442 {
1443   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1444   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1445 #define FLD(f) abuf->fields.sfmt_add.f
1446   int UNUSED written = 0;
1447   IADDR UNUSED pc = abuf->addr;
1448   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1449
1450 if (NESI (* FLD (i_sr), 0)) {
1451   {
1452     SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1453     * FLD (i_dr) = opval;
1454     written |= (1 << 2);
1455     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1456   }
1457 }
1458
1459   abuf->written = written;
1460 #undef FLD
1461 }
1462   NEXT (vpc);
1463
1464   CASE (sem, INSN_DIVU) : /* divu $dr,$sr */
1465 {
1466   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1467   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1468 #define FLD(f) abuf->fields.sfmt_add.f
1469   int UNUSED written = 0;
1470   IADDR UNUSED pc = abuf->addr;
1471   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1472
1473 if (NESI (* FLD (i_sr), 0)) {
1474   {
1475     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1476     * FLD (i_dr) = opval;
1477     written |= (1 << 2);
1478     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1479   }
1480 }
1481
1482   abuf->written = written;
1483 #undef FLD
1484 }
1485   NEXT (vpc);
1486
1487   CASE (sem, INSN_REM) : /* rem $dr,$sr */
1488 {
1489   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1490   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1491 #define FLD(f) abuf->fields.sfmt_add.f
1492   int UNUSED written = 0;
1493   IADDR UNUSED pc = abuf->addr;
1494   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1495
1496 if (NESI (* FLD (i_sr), 0)) {
1497   {
1498     SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1499     * FLD (i_dr) = opval;
1500     written |= (1 << 2);
1501     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1502   }
1503 }
1504
1505   abuf->written = written;
1506 #undef FLD
1507 }
1508   NEXT (vpc);
1509
1510   CASE (sem, INSN_REMU) : /* remu $dr,$sr */
1511 {
1512   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1513   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1514 #define FLD(f) abuf->fields.sfmt_add.f
1515   int UNUSED written = 0;
1516   IADDR UNUSED pc = abuf->addr;
1517   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1518
1519 if (NESI (* FLD (i_sr), 0)) {
1520   {
1521     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1522     * FLD (i_dr) = opval;
1523     written |= (1 << 2);
1524     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1525   }
1526 }
1527
1528   abuf->written = written;
1529 #undef FLD
1530 }
1531   NEXT (vpc);
1532
1533   CASE (sem, INSN_REMH) : /* remh $dr,$sr */
1534 {
1535   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1536   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1537 #define FLD(f) abuf->fields.sfmt_add.f
1538   int UNUSED written = 0;
1539   IADDR UNUSED pc = abuf->addr;
1540   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1541
1542 if (NESI (* FLD (i_sr), 0)) {
1543   {
1544     SI opval = MODSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1545     * FLD (i_dr) = opval;
1546     written |= (1 << 2);
1547     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1548   }
1549 }
1550
1551   abuf->written = written;
1552 #undef FLD
1553 }
1554   NEXT (vpc);
1555
1556   CASE (sem, INSN_REMUH) : /* remuh $dr,$sr */
1557 {
1558   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1559   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1560 #define FLD(f) abuf->fields.sfmt_add.f
1561   int UNUSED written = 0;
1562   IADDR UNUSED pc = abuf->addr;
1563   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1564
1565 if (NESI (* FLD (i_sr), 0)) {
1566   {
1567     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1568     * FLD (i_dr) = opval;
1569     written |= (1 << 2);
1570     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1571   }
1572 }
1573
1574   abuf->written = written;
1575 #undef FLD
1576 }
1577   NEXT (vpc);
1578
1579   CASE (sem, INSN_REMB) : /* remb $dr,$sr */
1580 {
1581   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1582   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1583 #define FLD(f) abuf->fields.sfmt_add.f
1584   int UNUSED written = 0;
1585   IADDR UNUSED pc = abuf->addr;
1586   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1587
1588 if (NESI (* FLD (i_sr), 0)) {
1589   {
1590     SI opval = MODSI (EXTBISI (TRUNCSIBI (* FLD (i_dr))), * FLD (i_sr));
1591     * FLD (i_dr) = opval;
1592     written |= (1 << 2);
1593     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1594   }
1595 }
1596
1597   abuf->written = written;
1598 #undef FLD
1599 }
1600   NEXT (vpc);
1601
1602   CASE (sem, INSN_REMUB) : /* remub $dr,$sr */
1603 {
1604   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1605   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1606 #define FLD(f) abuf->fields.sfmt_add.f
1607   int UNUSED written = 0;
1608   IADDR UNUSED pc = abuf->addr;
1609   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1610
1611 if (NESI (* FLD (i_sr), 0)) {
1612   {
1613     SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1614     * FLD (i_dr) = opval;
1615     written |= (1 << 2);
1616     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1617   }
1618 }
1619
1620   abuf->written = written;
1621 #undef FLD
1622 }
1623   NEXT (vpc);
1624
1625   CASE (sem, INSN_DIVUH) : /* divuh $dr,$sr */
1626 {
1627   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1628   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1629 #define FLD(f) abuf->fields.sfmt_add.f
1630   int UNUSED written = 0;
1631   IADDR UNUSED pc = abuf->addr;
1632   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1633
1634 if (NESI (* FLD (i_sr), 0)) {
1635   {
1636     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1637     * FLD (i_dr) = opval;
1638     written |= (1 << 2);
1639     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1640   }
1641 }
1642
1643   abuf->written = written;
1644 #undef FLD
1645 }
1646   NEXT (vpc);
1647
1648   CASE (sem, INSN_DIVB) : /* divb $dr,$sr */
1649 {
1650   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1651   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1652 #define FLD(f) abuf->fields.sfmt_add.f
1653   int UNUSED written = 0;
1654   IADDR UNUSED pc = abuf->addr;
1655   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1656
1657 if (NESI (* FLD (i_sr), 0)) {
1658   {
1659     SI opval = DIVSI (EXTBISI (TRUNCSIBI (* FLD (i_dr))), * FLD (i_sr));
1660     * FLD (i_dr) = opval;
1661     written |= (1 << 2);
1662     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1663   }
1664 }
1665
1666   abuf->written = written;
1667 #undef FLD
1668 }
1669   NEXT (vpc);
1670
1671   CASE (sem, INSN_DIVUB) : /* divub $dr,$sr */
1672 {
1673   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1674   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1675 #define FLD(f) abuf->fields.sfmt_add.f
1676   int UNUSED written = 0;
1677   IADDR UNUSED pc = abuf->addr;
1678   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1679
1680 if (NESI (* FLD (i_sr), 0)) {
1681   {
1682     SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1683     * FLD (i_dr) = opval;
1684     written |= (1 << 2);
1685     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1686   }
1687 }
1688
1689   abuf->written = written;
1690 #undef FLD
1691 }
1692   NEXT (vpc);
1693
1694   CASE (sem, INSN_DIVH) : /* divh $dr,$sr */
1695 {
1696   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1697   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1698 #define FLD(f) abuf->fields.sfmt_add.f
1699   int UNUSED written = 0;
1700   IADDR UNUSED pc = abuf->addr;
1701   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1702
1703 if (NESI (* FLD (i_sr), 0)) {
1704   {
1705     SI opval = DIVSI (EXTHISI (TRUNCSIHI (* FLD (i_dr))), * FLD (i_sr));
1706     * FLD (i_dr) = opval;
1707     written |= (1 << 2);
1708     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1709   }
1710 }
1711
1712   abuf->written = written;
1713 #undef FLD
1714 }
1715   NEXT (vpc);
1716
1717   CASE (sem, INSN_JC) : /* jc $sr */
1718 {
1719   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1720   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1721 #define FLD(f) abuf->fields.sfmt_jl.f
1722   int UNUSED written = 0;
1723   IADDR UNUSED pc = abuf->addr;
1724   SEM_BRANCH_INIT
1725   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1726
1727 if (CPU (h_cond)) {
1728   {
1729     USI opval = ANDSI (* FLD (i_sr), -4);
1730     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1731     written |= (1 << 2);
1732     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1733   }
1734 }
1735
1736   abuf->written = written;
1737   SEM_BRANCH_FINI (vpc);
1738 #undef FLD
1739 }
1740   NEXT (vpc);
1741
1742   CASE (sem, INSN_JNC) : /* jnc $sr */
1743 {
1744   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1745   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1746 #define FLD(f) abuf->fields.sfmt_jl.f
1747   int UNUSED written = 0;
1748   IADDR UNUSED pc = abuf->addr;
1749   SEM_BRANCH_INIT
1750   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1751
1752 if (NOTBI (CPU (h_cond))) {
1753   {
1754     USI opval = ANDSI (* FLD (i_sr), -4);
1755     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1756     written |= (1 << 2);
1757     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1758   }
1759 }
1760
1761   abuf->written = written;
1762   SEM_BRANCH_FINI (vpc);
1763 #undef FLD
1764 }
1765   NEXT (vpc);
1766
1767   CASE (sem, INSN_JL) : /* jl $sr */
1768 {
1769   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1770   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1771 #define FLD(f) abuf->fields.sfmt_jl.f
1772   int UNUSED written = 0;
1773   IADDR UNUSED pc = abuf->addr;
1774   SEM_BRANCH_INIT
1775   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1776
1777 {
1778   SI temp0;USI temp1;
1779   temp0 = ADDSI (ANDSI (pc, -4), 4);
1780   temp1 = ANDSI (* FLD (i_sr), -4);
1781   {
1782     SI opval = temp0;
1783     CPU (h_gr[((UINT) 14)]) = opval;
1784     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1785   }
1786   {
1787     USI opval = temp1;
1788     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1789     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1790   }
1791 }
1792
1793   SEM_BRANCH_FINI (vpc);
1794 #undef FLD
1795 }
1796   NEXT (vpc);
1797
1798   CASE (sem, INSN_JMP) : /* jmp $sr */
1799 {
1800   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1801   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1802 #define FLD(f) abuf->fields.sfmt_jl.f
1803   int UNUSED written = 0;
1804   IADDR UNUSED pc = abuf->addr;
1805   SEM_BRANCH_INIT
1806   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1807
1808   {
1809     USI opval = ANDSI (* FLD (i_sr), -4);
1810     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1811     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1812   }
1813
1814   SEM_BRANCH_FINI (vpc);
1815 #undef FLD
1816 }
1817   NEXT (vpc);
1818
1819   CASE (sem, INSN_LD) : /* ld $dr,@$sr */
1820 {
1821   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1822   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1823 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1824   int UNUSED written = 0;
1825   IADDR UNUSED pc = abuf->addr;
1826   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1827
1828   {
1829     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1830     * FLD (i_dr) = opval;
1831     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1832   }
1833
1834 #undef FLD
1835 }
1836   NEXT (vpc);
1837
1838   CASE (sem, INSN_LD_D) : /* ld $dr,@($slo16,$sr) */
1839 {
1840   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1841   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1842 #define FLD(f) abuf->fields.sfmt_add3.f
1843   int UNUSED written = 0;
1844   IADDR UNUSED pc = abuf->addr;
1845   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1846
1847   {
1848     SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1849     * FLD (i_dr) = opval;
1850     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1851   }
1852
1853 #undef FLD
1854 }
1855   NEXT (vpc);
1856
1857   CASE (sem, INSN_LDB) : /* ldb $dr,@$sr */
1858 {
1859   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1860   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1861 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1862   int UNUSED written = 0;
1863   IADDR UNUSED pc = abuf->addr;
1864   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1865
1866   {
1867     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1868     * FLD (i_dr) = opval;
1869     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1870   }
1871
1872 #undef FLD
1873 }
1874   NEXT (vpc);
1875
1876   CASE (sem, INSN_LDB_D) : /* ldb $dr,@($slo16,$sr) */
1877 {
1878   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1879   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1880 #define FLD(f) abuf->fields.sfmt_add3.f
1881   int UNUSED written = 0;
1882   IADDR UNUSED pc = abuf->addr;
1883   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1884
1885   {
1886     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1887     * FLD (i_dr) = opval;
1888     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1889   }
1890
1891 #undef FLD
1892 }
1893   NEXT (vpc);
1894
1895   CASE (sem, INSN_LDH) : /* ldh $dr,@$sr */
1896 {
1897   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1898   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1899 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1900   int UNUSED written = 0;
1901   IADDR UNUSED pc = abuf->addr;
1902   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1903
1904   {
1905     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1906     * FLD (i_dr) = opval;
1907     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1908   }
1909
1910 #undef FLD
1911 }
1912   NEXT (vpc);
1913
1914   CASE (sem, INSN_LDH_D) : /* ldh $dr,@($slo16,$sr) */
1915 {
1916   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1917   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1918 #define FLD(f) abuf->fields.sfmt_add3.f
1919   int UNUSED written = 0;
1920   IADDR UNUSED pc = abuf->addr;
1921   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1922
1923   {
1924     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1925     * FLD (i_dr) = opval;
1926     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1927   }
1928
1929 #undef FLD
1930 }
1931   NEXT (vpc);
1932
1933   CASE (sem, INSN_LDUB) : /* ldub $dr,@$sr */
1934 {
1935   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1936   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1937 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1938   int UNUSED written = 0;
1939   IADDR UNUSED pc = abuf->addr;
1940   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1941
1942   {
1943     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1944     * FLD (i_dr) = opval;
1945     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1946   }
1947
1948 #undef FLD
1949 }
1950   NEXT (vpc);
1951
1952   CASE (sem, INSN_LDUB_D) : /* ldub $dr,@($slo16,$sr) */
1953 {
1954   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1955   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1956 #define FLD(f) abuf->fields.sfmt_add3.f
1957   int UNUSED written = 0;
1958   IADDR UNUSED pc = abuf->addr;
1959   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1960
1961   {
1962     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1963     * FLD (i_dr) = opval;
1964     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1965   }
1966
1967 #undef FLD
1968 }
1969   NEXT (vpc);
1970
1971   CASE (sem, INSN_LDUH) : /* lduh $dr,@$sr */
1972 {
1973   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1974   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1975 #define FLD(f) abuf->fields.sfmt_ld_plus.f
1976   int UNUSED written = 0;
1977   IADDR UNUSED pc = abuf->addr;
1978   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1979
1980   {
1981     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1982     * FLD (i_dr) = opval;
1983     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
1984   }
1985
1986 #undef FLD
1987 }
1988   NEXT (vpc);
1989
1990   CASE (sem, INSN_LDUH_D) : /* lduh $dr,@($slo16,$sr) */
1991 {
1992   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
1993   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1994 #define FLD(f) abuf->fields.sfmt_add3.f
1995   int UNUSED written = 0;
1996   IADDR UNUSED pc = abuf->addr;
1997   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1998
1999   {
2000     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
2001     * FLD (i_dr) = opval;
2002     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2003   }
2004
2005 #undef FLD
2006 }
2007   NEXT (vpc);
2008
2009   CASE (sem, INSN_LD_PLUS) : /* ld $dr,@$sr+ */
2010 {
2011   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2012   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2013 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2014   int UNUSED written = 0;
2015   IADDR UNUSED pc = abuf->addr;
2016   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2017
2018 {
2019   SI temp0;SI temp1;
2020   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
2021   temp1 = ADDSI (* FLD (i_sr), 4);
2022   {
2023     SI opval = temp0;
2024     * FLD (i_dr) = opval;
2025     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2026   }
2027   {
2028     SI opval = temp1;
2029     * FLD (i_sr) = opval;
2030     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2031   }
2032 }
2033
2034 #undef FLD
2035 }
2036   NEXT (vpc);
2037
2038   CASE (sem, INSN_LD24) : /* ld24 $dr,$uimm24 */
2039 {
2040   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2041   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2042 #define FLD(f) abuf->fields.sfmt_ld24.f
2043   int UNUSED written = 0;
2044   IADDR UNUSED pc = abuf->addr;
2045   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2046
2047   {
2048     SI opval = FLD (i_uimm24);
2049     * FLD (i_dr) = opval;
2050     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2051   }
2052
2053 #undef FLD
2054 }
2055   NEXT (vpc);
2056
2057   CASE (sem, INSN_LDI8) : /* ldi8 $dr,$simm8 */
2058 {
2059   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2060   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2061 #define FLD(f) abuf->fields.sfmt_addi.f
2062   int UNUSED written = 0;
2063   IADDR UNUSED pc = abuf->addr;
2064   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2065
2066   {
2067     SI opval = FLD (f_simm8);
2068     * FLD (i_dr) = opval;
2069     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2070   }
2071
2072 #undef FLD
2073 }
2074   NEXT (vpc);
2075
2076   CASE (sem, INSN_LDI16) : /* ldi16 $dr,$hash$slo16 */
2077 {
2078   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2079   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2080 #define FLD(f) abuf->fields.sfmt_add3.f
2081   int UNUSED written = 0;
2082   IADDR UNUSED pc = abuf->addr;
2083   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2084
2085   {
2086     SI opval = FLD (f_simm16);
2087     * FLD (i_dr) = opval;
2088     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2089   }
2090
2091 #undef FLD
2092 }
2093   NEXT (vpc);
2094
2095   CASE (sem, INSN_LOCK) : /* lock $dr,@$sr */
2096 {
2097   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2098   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2099 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2100   int UNUSED written = 0;
2101   IADDR UNUSED pc = abuf->addr;
2102   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2103
2104 {
2105   {
2106     BI opval = 1;
2107     CPU (h_lock) = opval;
2108     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2109   }
2110   {
2111     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
2112     * FLD (i_dr) = opval;
2113     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2114   }
2115 }
2116
2117 #undef FLD
2118 }
2119   NEXT (vpc);
2120
2121   CASE (sem, INSN_MACHI_A) : /* machi $src1,$src2,$acc */
2122 {
2123   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2124   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2125 #define FLD(f) abuf->fields.sfmt_machi_a.f
2126   int UNUSED written = 0;
2127   IADDR UNUSED pc = abuf->addr;
2128   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2129
2130   {
2131     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
2132     SET_H_ACCUMS (FLD (f_acc), opval);
2133     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2134   }
2135
2136 #undef FLD
2137 }
2138   NEXT (vpc);
2139
2140   CASE (sem, INSN_MACLO_A) : /* maclo $src1,$src2,$acc */
2141 {
2142   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2143   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2144 #define FLD(f) abuf->fields.sfmt_machi_a.f
2145   int UNUSED written = 0;
2146   IADDR UNUSED pc = abuf->addr;
2147   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2148
2149   {
2150     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
2151     SET_H_ACCUMS (FLD (f_acc), opval);
2152     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2153   }
2154
2155 #undef FLD
2156 }
2157   NEXT (vpc);
2158
2159   CASE (sem, INSN_MACWHI_A) : /* macwhi $src1,$src2,$acc */
2160 {
2161   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2162   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2163 #define FLD(f) abuf->fields.sfmt_machi_a.f
2164   int UNUSED written = 0;
2165   IADDR UNUSED pc = abuf->addr;
2166   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2167
2168   {
2169     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
2170     SET_H_ACCUMS (FLD (f_acc), opval);
2171     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2172   }
2173
2174 #undef FLD
2175 }
2176   NEXT (vpc);
2177
2178   CASE (sem, INSN_MACWLO_A) : /* macwlo $src1,$src2,$acc */
2179 {
2180   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2181   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2182 #define FLD(f) abuf->fields.sfmt_machi_a.f
2183   int UNUSED written = 0;
2184   IADDR UNUSED pc = abuf->addr;
2185   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2186
2187   {
2188     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
2189     SET_H_ACCUMS (FLD (f_acc), opval);
2190     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2191   }
2192
2193 #undef FLD
2194 }
2195   NEXT (vpc);
2196
2197   CASE (sem, INSN_MUL) : /* mul $dr,$sr */
2198 {
2199   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2200   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2201 #define FLD(f) abuf->fields.sfmt_add.f
2202   int UNUSED written = 0;
2203   IADDR UNUSED pc = abuf->addr;
2204   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2205
2206   {
2207     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
2208     * FLD (i_dr) = opval;
2209     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2210   }
2211
2212 #undef FLD
2213 }
2214   NEXT (vpc);
2215
2216   CASE (sem, INSN_MULHI_A) : /* mulhi $src1,$src2,$acc */
2217 {
2218   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2219   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2220 #define FLD(f) abuf->fields.sfmt_machi_a.f
2221   int UNUSED written = 0;
2222   IADDR UNUSED pc = abuf->addr;
2223   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2224
2225   {
2226     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
2227     SET_H_ACCUMS (FLD (f_acc), opval);
2228     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2229   }
2230
2231 #undef FLD
2232 }
2233   NEXT (vpc);
2234
2235   CASE (sem, INSN_MULLO_A) : /* mullo $src1,$src2,$acc */
2236 {
2237   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2238   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2239 #define FLD(f) abuf->fields.sfmt_machi_a.f
2240   int UNUSED written = 0;
2241   IADDR UNUSED pc = abuf->addr;
2242   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2243
2244   {
2245     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
2246     SET_H_ACCUMS (FLD (f_acc), opval);
2247     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2248   }
2249
2250 #undef FLD
2251 }
2252   NEXT (vpc);
2253
2254   CASE (sem, INSN_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
2255 {
2256   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2257   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2258 #define FLD(f) abuf->fields.sfmt_machi_a.f
2259   int UNUSED written = 0;
2260   IADDR UNUSED pc = abuf->addr;
2261   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2262
2263   {
2264     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
2265     SET_H_ACCUMS (FLD (f_acc), opval);
2266     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2267   }
2268
2269 #undef FLD
2270 }
2271   NEXT (vpc);
2272
2273   CASE (sem, INSN_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
2274 {
2275   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2276   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2277 #define FLD(f) abuf->fields.sfmt_machi_a.f
2278   int UNUSED written = 0;
2279   IADDR UNUSED pc = abuf->addr;
2280   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2281
2282   {
2283     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
2284     SET_H_ACCUMS (FLD (f_acc), opval);
2285     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2286   }
2287
2288 #undef FLD
2289 }
2290   NEXT (vpc);
2291
2292   CASE (sem, INSN_MV) : /* mv $dr,$sr */
2293 {
2294   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2295   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2296 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2297   int UNUSED written = 0;
2298   IADDR UNUSED pc = abuf->addr;
2299   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2300
2301   {
2302     SI opval = * FLD (i_sr);
2303     * FLD (i_dr) = opval;
2304     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2305   }
2306
2307 #undef FLD
2308 }
2309   NEXT (vpc);
2310
2311   CASE (sem, INSN_MVFACHI_A) : /* mvfachi $dr,$accs */
2312 {
2313   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2314   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2315 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2316   int UNUSED written = 0;
2317   IADDR UNUSED pc = abuf->addr;
2318   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2319
2320   {
2321     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
2322     * FLD (i_dr) = opval;
2323     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2324   }
2325
2326 #undef FLD
2327 }
2328   NEXT (vpc);
2329
2330   CASE (sem, INSN_MVFACLO_A) : /* mvfaclo $dr,$accs */
2331 {
2332   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2333   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2334 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2335   int UNUSED written = 0;
2336   IADDR UNUSED pc = abuf->addr;
2337   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2338
2339   {
2340     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
2341     * FLD (i_dr) = opval;
2342     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2343   }
2344
2345 #undef FLD
2346 }
2347   NEXT (vpc);
2348
2349   CASE (sem, INSN_MVFACMI_A) : /* mvfacmi $dr,$accs */
2350 {
2351   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2352   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2353 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
2354   int UNUSED written = 0;
2355   IADDR UNUSED pc = abuf->addr;
2356   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2357
2358   {
2359     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
2360     * FLD (i_dr) = opval;
2361     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2362   }
2363
2364 #undef FLD
2365 }
2366   NEXT (vpc);
2367
2368   CASE (sem, INSN_MVFC) : /* mvfc $dr,$scr */
2369 {
2370   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2371   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2372 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2373   int UNUSED written = 0;
2374   IADDR UNUSED pc = abuf->addr;
2375   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2376
2377   {
2378     SI opval = GET_H_CR (FLD (f_r2));
2379     * FLD (i_dr) = opval;
2380     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2381   }
2382
2383 #undef FLD
2384 }
2385   NEXT (vpc);
2386
2387   CASE (sem, INSN_MVTACHI_A) : /* mvtachi $src1,$accs */
2388 {
2389   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2390   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2391 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2392   int UNUSED written = 0;
2393   IADDR UNUSED pc = abuf->addr;
2394   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2395
2396   {
2397     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
2398     SET_H_ACCUMS (FLD (f_accs), opval);
2399     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2400   }
2401
2402 #undef FLD
2403 }
2404   NEXT (vpc);
2405
2406   CASE (sem, INSN_MVTACLO_A) : /* mvtaclo $src1,$accs */
2407 {
2408   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2409   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2410 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
2411   int UNUSED written = 0;
2412   IADDR UNUSED pc = abuf->addr;
2413   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2414
2415   {
2416     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
2417     SET_H_ACCUMS (FLD (f_accs), opval);
2418     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2419   }
2420
2421 #undef FLD
2422 }
2423   NEXT (vpc);
2424
2425   CASE (sem, INSN_MVTC) : /* mvtc $sr,$dcr */
2426 {
2427   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2428   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2429 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2430   int UNUSED written = 0;
2431   IADDR UNUSED pc = abuf->addr;
2432   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2433
2434   {
2435     USI opval = * FLD (i_sr);
2436     SET_H_CR (FLD (f_r1), opval);
2437     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2438   }
2439
2440 #undef FLD
2441 }
2442   NEXT (vpc);
2443
2444   CASE (sem, INSN_NEG) : /* neg $dr,$sr */
2445 {
2446   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2447   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2448 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2449   int UNUSED written = 0;
2450   IADDR UNUSED pc = abuf->addr;
2451   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2452
2453   {
2454     SI opval = NEGSI (* FLD (i_sr));
2455     * FLD (i_dr) = opval;
2456     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2457   }
2458
2459 #undef FLD
2460 }
2461   NEXT (vpc);
2462
2463   CASE (sem, INSN_NOP) : /* nop */
2464 {
2465   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2466   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2467 #define FLD(f) abuf->fields.fmt_empty.f
2468   int UNUSED written = 0;
2469   IADDR UNUSED pc = abuf->addr;
2470   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2471
2472 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2473
2474 #undef FLD
2475 }
2476   NEXT (vpc);
2477
2478   CASE (sem, INSN_NOT) : /* not $dr,$sr */
2479 {
2480   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2481   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2482 #define FLD(f) abuf->fields.sfmt_ld_plus.f
2483   int UNUSED written = 0;
2484   IADDR UNUSED pc = abuf->addr;
2485   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2486
2487   {
2488     SI opval = INVSI (* FLD (i_sr));
2489     * FLD (i_dr) = opval;
2490     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2491   }
2492
2493 #undef FLD
2494 }
2495   NEXT (vpc);
2496
2497   CASE (sem, INSN_RAC_DSI) : /* rac $accd,$accs,$imm1 */
2498 {
2499   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2500   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2501 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2502   int UNUSED written = 0;
2503   IADDR UNUSED pc = abuf->addr;
2504   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2505
2506 {
2507   DI tmp_tmp1;
2508   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2509   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2510   {
2511     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
2512     SET_H_ACCUMS (FLD (f_accd), opval);
2513     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2514   }
2515 }
2516
2517 #undef FLD
2518 }
2519   NEXT (vpc);
2520
2521   CASE (sem, INSN_RACH_DSI) : /* rach $accd,$accs,$imm1 */
2522 {
2523   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2524   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2525 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
2526   int UNUSED written = 0;
2527   IADDR UNUSED pc = abuf->addr;
2528   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2529
2530 {
2531   DI tmp_tmp1;
2532   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
2533   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2534   {
2535     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
2536     SET_H_ACCUMS (FLD (f_accd), opval);
2537     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
2538   }
2539 }
2540
2541 #undef FLD
2542 }
2543   NEXT (vpc);
2544
2545   CASE (sem, INSN_RTE) : /* rte */
2546 {
2547   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2548   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2549 #define FLD(f) abuf->fields.fmt_empty.f
2550   int UNUSED written = 0;
2551   IADDR UNUSED pc = abuf->addr;
2552   SEM_BRANCH_INIT
2553   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2554
2555 {
2556   {
2557     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
2558     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2559     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2560   }
2561   {
2562     USI opval = GET_H_CR (((UINT) 14));
2563     SET_H_CR (((UINT) 6), opval);
2564     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
2565   }
2566   {
2567     UQI opval = CPU (h_bpsw);
2568     SET_H_PSW (opval);
2569     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2570   }
2571   {
2572     UQI opval = CPU (h_bbpsw);
2573     CPU (h_bpsw) = opval;
2574     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2575   }
2576 }
2577
2578   SEM_BRANCH_FINI (vpc);
2579 #undef FLD
2580 }
2581   NEXT (vpc);
2582
2583   CASE (sem, INSN_SETH) : /* seth $dr,$hash$hi16 */
2584 {
2585   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2586   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2587 #define FLD(f) abuf->fields.sfmt_seth.f
2588   int UNUSED written = 0;
2589   IADDR UNUSED pc = abuf->addr;
2590   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2591
2592   {
2593     SI opval = SLLSI (FLD (f_hi16), 16);
2594     * FLD (i_dr) = opval;
2595     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2596   }
2597
2598 #undef FLD
2599 }
2600   NEXT (vpc);
2601
2602   CASE (sem, INSN_SLL) : /* sll $dr,$sr */
2603 {
2604   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2605   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2606 #define FLD(f) abuf->fields.sfmt_add.f
2607   int UNUSED written = 0;
2608   IADDR UNUSED pc = abuf->addr;
2609   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2610
2611   {
2612     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2613     * FLD (i_dr) = opval;
2614     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2615   }
2616
2617 #undef FLD
2618 }
2619   NEXT (vpc);
2620
2621   CASE (sem, INSN_SLL3) : /* sll3 $dr,$sr,$simm16 */
2622 {
2623   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2624   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2625 #define FLD(f) abuf->fields.sfmt_add3.f
2626   int UNUSED written = 0;
2627   IADDR UNUSED pc = abuf->addr;
2628   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2629
2630   {
2631     SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2632     * FLD (i_dr) = opval;
2633     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2634   }
2635
2636 #undef FLD
2637 }
2638   NEXT (vpc);
2639
2640   CASE (sem, INSN_SLLI) : /* slli $dr,$uimm5 */
2641 {
2642   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2643   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2644 #define FLD(f) abuf->fields.sfmt_slli.f
2645   int UNUSED written = 0;
2646   IADDR UNUSED pc = abuf->addr;
2647   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2648
2649   {
2650     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2651     * FLD (i_dr) = opval;
2652     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2653   }
2654
2655 #undef FLD
2656 }
2657   NEXT (vpc);
2658
2659   CASE (sem, INSN_SRA) : /* sra $dr,$sr */
2660 {
2661   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2662   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2663 #define FLD(f) abuf->fields.sfmt_add.f
2664   int UNUSED written = 0;
2665   IADDR UNUSED pc = abuf->addr;
2666   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2667
2668   {
2669     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2670     * FLD (i_dr) = opval;
2671     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2672   }
2673
2674 #undef FLD
2675 }
2676   NEXT (vpc);
2677
2678   CASE (sem, INSN_SRA3) : /* sra3 $dr,$sr,$simm16 */
2679 {
2680   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2681   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2682 #define FLD(f) abuf->fields.sfmt_add3.f
2683   int UNUSED written = 0;
2684   IADDR UNUSED pc = abuf->addr;
2685   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2686
2687   {
2688     SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2689     * FLD (i_dr) = opval;
2690     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2691   }
2692
2693 #undef FLD
2694 }
2695   NEXT (vpc);
2696
2697   CASE (sem, INSN_SRAI) : /* srai $dr,$uimm5 */
2698 {
2699   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2700   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2701 #define FLD(f) abuf->fields.sfmt_slli.f
2702   int UNUSED written = 0;
2703   IADDR UNUSED pc = abuf->addr;
2704   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2705
2706   {
2707     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2708     * FLD (i_dr) = opval;
2709     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2710   }
2711
2712 #undef FLD
2713 }
2714   NEXT (vpc);
2715
2716   CASE (sem, INSN_SRL) : /* srl $dr,$sr */
2717 {
2718   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2719   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2720 #define FLD(f) abuf->fields.sfmt_add.f
2721   int UNUSED written = 0;
2722   IADDR UNUSED pc = abuf->addr;
2723   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2724
2725   {
2726     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2727     * FLD (i_dr) = opval;
2728     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2729   }
2730
2731 #undef FLD
2732 }
2733   NEXT (vpc);
2734
2735   CASE (sem, INSN_SRL3) : /* srl3 $dr,$sr,$simm16 */
2736 {
2737   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2738   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2739 #define FLD(f) abuf->fields.sfmt_add3.f
2740   int UNUSED written = 0;
2741   IADDR UNUSED pc = abuf->addr;
2742   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2743
2744   {
2745     SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2746     * FLD (i_dr) = opval;
2747     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2748   }
2749
2750 #undef FLD
2751 }
2752   NEXT (vpc);
2753
2754   CASE (sem, INSN_SRLI) : /* srli $dr,$uimm5 */
2755 {
2756   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2757   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2758 #define FLD(f) abuf->fields.sfmt_slli.f
2759   int UNUSED written = 0;
2760   IADDR UNUSED pc = abuf->addr;
2761   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2762
2763   {
2764     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2765     * FLD (i_dr) = opval;
2766     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2767   }
2768
2769 #undef FLD
2770 }
2771   NEXT (vpc);
2772
2773   CASE (sem, INSN_ST) : /* st $src1,@$src2 */
2774 {
2775   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2776   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2777 #define FLD(f) abuf->fields.sfmt_st_plus.f
2778   int UNUSED written = 0;
2779   IADDR UNUSED pc = abuf->addr;
2780   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2781
2782   {
2783     SI opval = * FLD (i_src1);
2784     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2785     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2786   }
2787
2788 #undef FLD
2789 }
2790   NEXT (vpc);
2791
2792   CASE (sem, INSN_ST_D) : /* st $src1,@($slo16,$src2) */
2793 {
2794   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2795   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2796 #define FLD(f) abuf->fields.sfmt_st_d.f
2797   int UNUSED written = 0;
2798   IADDR UNUSED pc = abuf->addr;
2799   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2800
2801   {
2802     SI opval = * FLD (i_src1);
2803     SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2804     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2805   }
2806
2807 #undef FLD
2808 }
2809   NEXT (vpc);
2810
2811   CASE (sem, INSN_STB) : /* stb $src1,@$src2 */
2812 {
2813   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2814   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2815 #define FLD(f) abuf->fields.sfmt_st_plus.f
2816   int UNUSED written = 0;
2817   IADDR UNUSED pc = abuf->addr;
2818   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2819
2820   {
2821     QI opval = * FLD (i_src1);
2822     SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2823     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2824   }
2825
2826 #undef FLD
2827 }
2828   NEXT (vpc);
2829
2830   CASE (sem, INSN_STB_D) : /* stb $src1,@($slo16,$src2) */
2831 {
2832   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2833   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2834 #define FLD(f) abuf->fields.sfmt_st_d.f
2835   int UNUSED written = 0;
2836   IADDR UNUSED pc = abuf->addr;
2837   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2838
2839   {
2840     QI opval = * FLD (i_src1);
2841     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2842     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2843   }
2844
2845 #undef FLD
2846 }
2847   NEXT (vpc);
2848
2849   CASE (sem, INSN_STH) : /* sth $src1,@$src2 */
2850 {
2851   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2852   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2853 #define FLD(f) abuf->fields.sfmt_st_plus.f
2854   int UNUSED written = 0;
2855   IADDR UNUSED pc = abuf->addr;
2856   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2857
2858   {
2859     HI opval = * FLD (i_src1);
2860     SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2861     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2862   }
2863
2864 #undef FLD
2865 }
2866   NEXT (vpc);
2867
2868   CASE (sem, INSN_STH_D) : /* sth $src1,@($slo16,$src2) */
2869 {
2870   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2871   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2872 #define FLD(f) abuf->fields.sfmt_st_d.f
2873   int UNUSED written = 0;
2874   IADDR UNUSED pc = abuf->addr;
2875   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2876
2877   {
2878     HI opval = * FLD (i_src1);
2879     SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2880     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2881   }
2882
2883 #undef FLD
2884 }
2885   NEXT (vpc);
2886
2887   CASE (sem, INSN_ST_PLUS) : /* st $src1,@+$src2 */
2888 {
2889   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2890   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2891 #define FLD(f) abuf->fields.sfmt_st_plus.f
2892   int UNUSED written = 0;
2893   IADDR UNUSED pc = abuf->addr;
2894   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2895
2896 {
2897   SI tmp_new_src2;
2898   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2899   {
2900     SI opval = * FLD (i_src1);
2901     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2902     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2903   }
2904   {
2905     SI opval = tmp_new_src2;
2906     * FLD (i_src2) = opval;
2907     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2908   }
2909 }
2910
2911 #undef FLD
2912 }
2913   NEXT (vpc);
2914
2915   CASE (sem, INSN_STH_PLUS) : /* sth $src1,@$src2+ */
2916 {
2917   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2918   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2919 #define FLD(f) abuf->fields.sfmt_st_plus.f
2920   int UNUSED written = 0;
2921   IADDR UNUSED pc = abuf->addr;
2922   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2923
2924 {
2925   SI tmp_new_src2;
2926   tmp_new_src2 = * FLD (i_src2);
2927   {
2928     HI opval = * FLD (i_src1);
2929     SETMEMHI (current_cpu, pc, tmp_new_src2, opval);
2930     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2931   }
2932   {
2933     SI opval = ADDSI (tmp_new_src2, 2);
2934     * FLD (i_src2) = opval;
2935     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2936   }
2937 }
2938
2939 #undef FLD
2940 }
2941   NEXT (vpc);
2942
2943   CASE (sem, INSN_STB_PLUS) : /* stb $src1,@$src2+ */
2944 {
2945   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2946   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2947 #define FLD(f) abuf->fields.sfmt_st_plus.f
2948   int UNUSED written = 0;
2949   IADDR UNUSED pc = abuf->addr;
2950   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2951
2952 {
2953   SI tmp_new_src2;
2954   tmp_new_src2 = * FLD (i_src2);
2955   {
2956     QI opval = * FLD (i_src1);
2957     SETMEMQI (current_cpu, pc, tmp_new_src2, opval);
2958     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2959   }
2960   {
2961     SI opval = ADDSI (tmp_new_src2, 1);
2962     * FLD (i_src2) = opval;
2963     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2964   }
2965 }
2966
2967 #undef FLD
2968 }
2969   NEXT (vpc);
2970
2971   CASE (sem, INSN_ST_MINUS) : /* st $src1,@-$src2 */
2972 {
2973   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
2974   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2975 #define FLD(f) abuf->fields.sfmt_st_plus.f
2976   int UNUSED written = 0;
2977   IADDR UNUSED pc = abuf->addr;
2978   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2979
2980 {
2981   SI tmp_new_src2;
2982   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2983   {
2984     SI opval = * FLD (i_src1);
2985     SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2986     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2987   }
2988   {
2989     SI opval = tmp_new_src2;
2990     * FLD (i_src2) = opval;
2991     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
2992   }
2993 }
2994
2995 #undef FLD
2996 }
2997   NEXT (vpc);
2998
2999   CASE (sem, INSN_SUB) : /* sub $dr,$sr */
3000 {
3001   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3002   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3003 #define FLD(f) abuf->fields.sfmt_add.f
3004   int UNUSED written = 0;
3005   IADDR UNUSED pc = abuf->addr;
3006   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3007
3008   {
3009     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
3010     * FLD (i_dr) = opval;
3011     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3012   }
3013
3014 #undef FLD
3015 }
3016   NEXT (vpc);
3017
3018   CASE (sem, INSN_SUBV) : /* subv $dr,$sr */
3019 {
3020   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3021   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3022 #define FLD(f) abuf->fields.sfmt_add.f
3023   int UNUSED written = 0;
3024   IADDR UNUSED pc = abuf->addr;
3025   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3026
3027 {
3028   SI temp0;BI temp1;
3029   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
3030   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3031   {
3032     SI opval = temp0;
3033     * FLD (i_dr) = opval;
3034     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3035   }
3036   {
3037     BI opval = temp1;
3038     CPU (h_cond) = opval;
3039     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3040   }
3041 }
3042
3043 #undef FLD
3044 }
3045   NEXT (vpc);
3046
3047   CASE (sem, INSN_SUBX) : /* subx $dr,$sr */
3048 {
3049   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3050   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3051 #define FLD(f) abuf->fields.sfmt_add.f
3052   int UNUSED written = 0;
3053   IADDR UNUSED pc = abuf->addr;
3054   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3055
3056 {
3057   SI temp0;BI temp1;
3058   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3059   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3060   {
3061     SI opval = temp0;
3062     * FLD (i_dr) = opval;
3063     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3064   }
3065   {
3066     BI opval = temp1;
3067     CPU (h_cond) = opval;
3068     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3069   }
3070 }
3071
3072 #undef FLD
3073 }
3074   NEXT (vpc);
3075
3076   CASE (sem, INSN_TRAP) : /* trap $uimm4 */
3077 {
3078   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3079   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3080 #define FLD(f) abuf->fields.sfmt_trap.f
3081   int UNUSED written = 0;
3082   IADDR UNUSED pc = abuf->addr;
3083   SEM_BRANCH_INIT
3084   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3085
3086 {
3087   {
3088     USI opval = GET_H_CR (((UINT) 6));
3089     SET_H_CR (((UINT) 14), opval);
3090     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3091   }
3092   {
3093     USI opval = ADDSI (pc, 4);
3094     SET_H_CR (((UINT) 6), opval);
3095     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3096   }
3097   {
3098     UQI opval = CPU (h_bpsw);
3099     CPU (h_bbpsw) = opval;
3100     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
3101   }
3102   {
3103     UQI opval = GET_H_PSW ();
3104     CPU (h_bpsw) = opval;
3105     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
3106   }
3107   {
3108     UQI opval = ANDQI (GET_H_PSW (), 128);
3109     SET_H_PSW (opval);
3110     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
3111   }
3112   {
3113     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
3114     SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
3115     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3116   }
3117 }
3118
3119   SEM_BRANCH_FINI (vpc);
3120 #undef FLD
3121 }
3122   NEXT (vpc);
3123
3124   CASE (sem, INSN_UNLOCK) : /* unlock $src1,@$src2 */
3125 {
3126   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3127   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3128 #define FLD(f) abuf->fields.sfmt_st_plus.f
3129   int UNUSED written = 0;
3130   IADDR UNUSED pc = abuf->addr;
3131   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3132
3133 {
3134 if (CPU (h_lock)) {
3135   {
3136     SI opval = * FLD (i_src1);
3137     SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
3138     written |= (1 << 4);
3139     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3140   }
3141 }
3142   {
3143     BI opval = 0;
3144     CPU (h_lock) = opval;
3145     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
3146   }
3147 }
3148
3149   abuf->written = written;
3150 #undef FLD
3151 }
3152   NEXT (vpc);
3153
3154   CASE (sem, INSN_SATB) : /* satb $dr,$sr */
3155 {
3156   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3157   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3158 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3159   int UNUSED written = 0;
3160   IADDR UNUSED pc = abuf->addr;
3161   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3162
3163   {
3164     SI opval = (GESI (* FLD (i_sr), 127)) ? (127) : (LESI (* FLD (i_sr), -128)) ? (-128) : (* FLD (i_sr));
3165     * FLD (i_dr) = opval;
3166     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3167   }
3168
3169 #undef FLD
3170 }
3171   NEXT (vpc);
3172
3173   CASE (sem, INSN_SATH) : /* sath $dr,$sr */
3174 {
3175   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3176   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3177 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3178   int UNUSED written = 0;
3179   IADDR UNUSED pc = abuf->addr;
3180   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3181
3182   {
3183     SI opval = (GESI (* FLD (i_sr), 32767)) ? (32767) : (LESI (* FLD (i_sr), -32768)) ? (-32768) : (* FLD (i_sr));
3184     * FLD (i_dr) = opval;
3185     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3186   }
3187
3188 #undef FLD
3189 }
3190   NEXT (vpc);
3191
3192   CASE (sem, INSN_SAT) : /* sat $dr,$sr */
3193 {
3194   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3195   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3196 #define FLD(f) abuf->fields.sfmt_ld_plus.f
3197   int UNUSED written = 0;
3198   IADDR UNUSED pc = abuf->addr;
3199   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3200
3201   {
3202     SI opval = ((CPU (h_cond)) ? (((LTSI (* FLD (i_sr), 0)) ? (2147483647) : (0x80000000))) : (* FLD (i_sr)));
3203     * FLD (i_dr) = opval;
3204     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3205   }
3206
3207 #undef FLD
3208 }
3209   NEXT (vpc);
3210
3211   CASE (sem, INSN_PCMPBZ) : /* pcmpbz $src2 */
3212 {
3213   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3214   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3215 #define FLD(f) abuf->fields.sfmt_st_plus.f
3216   int UNUSED written = 0;
3217   IADDR UNUSED pc = abuf->addr;
3218   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3219
3220   {
3221     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
3222     CPU (h_cond) = opval;
3223     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3224   }
3225
3226 #undef FLD
3227 }
3228   NEXT (vpc);
3229
3230   CASE (sem, INSN_SADD) : /* sadd */
3231 {
3232   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3233   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3234 #define FLD(f) abuf->fields.fmt_empty.f
3235   int UNUSED written = 0;
3236   IADDR UNUSED pc = abuf->addr;
3237   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3238
3239   {
3240     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
3241     SET_H_ACCUMS (((UINT) 0), opval);
3242     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3243   }
3244
3245 #undef FLD
3246 }
3247   NEXT (vpc);
3248
3249   CASE (sem, INSN_MACWU1) : /* macwu1 $src1,$src2 */
3250 {
3251   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3252   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3253 #define FLD(f) abuf->fields.sfmt_st_plus.f
3254   int UNUSED written = 0;
3255   IADDR UNUSED pc = abuf->addr;
3256   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3257
3258   {
3259     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
3260     SET_H_ACCUMS (((UINT) 1), opval);
3261     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3262   }
3263
3264 #undef FLD
3265 }
3266   NEXT (vpc);
3267
3268   CASE (sem, INSN_MSBLO) : /* msblo $src1,$src2 */
3269 {
3270   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3271   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3272 #define FLD(f) abuf->fields.sfmt_st_plus.f
3273   int UNUSED written = 0;
3274   IADDR UNUSED pc = abuf->addr;
3275   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3276
3277   {
3278     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
3279     SET_H_ACCUM (opval);
3280     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
3281   }
3282
3283 #undef FLD
3284 }
3285   NEXT (vpc);
3286
3287   CASE (sem, INSN_MULWU1) : /* mulwu1 $src1,$src2 */
3288 {
3289   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3290   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3291 #define FLD(f) abuf->fields.sfmt_st_plus.f
3292   int UNUSED written = 0;
3293   IADDR UNUSED pc = abuf->addr;
3294   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3295
3296   {
3297     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
3298     SET_H_ACCUMS (((UINT) 1), opval);
3299     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3300   }
3301
3302 #undef FLD
3303 }
3304   NEXT (vpc);
3305
3306   CASE (sem, INSN_MACLH1) : /* maclh1 $src1,$src2 */
3307 {
3308   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3309   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3310 #define FLD(f) abuf->fields.sfmt_st_plus.f
3311   int UNUSED written = 0;
3312   IADDR UNUSED pc = abuf->addr;
3313   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3314
3315   {
3316     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
3317     SET_H_ACCUMS (((UINT) 1), opval);
3318     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
3319   }
3320
3321 #undef FLD
3322 }
3323   NEXT (vpc);
3324
3325   CASE (sem, INSN_SC) : /* sc */
3326 {
3327   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3328   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3329 #define FLD(f) abuf->fields.fmt_empty.f
3330   int UNUSED written = 0;
3331   IADDR UNUSED pc = abuf->addr;
3332   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3333
3334 if (ZEXTBISI (CPU (h_cond)))
3335   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3336
3337 #undef FLD
3338 }
3339   NEXT (vpc);
3340
3341   CASE (sem, INSN_SNC) : /* snc */
3342 {
3343   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3344   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3345 #define FLD(f) abuf->fields.fmt_empty.f
3346   int UNUSED written = 0;
3347   IADDR UNUSED pc = abuf->addr;
3348   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3349
3350 if (ZEXTBISI (NOTBI (CPU (h_cond))))
3351   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
3352
3353 #undef FLD
3354 }
3355   NEXT (vpc);
3356
3357   CASE (sem, INSN_CLRPSW) : /* clrpsw $uimm8 */
3358 {
3359   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3360   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3361 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3362   int UNUSED written = 0;
3363   IADDR UNUSED pc = abuf->addr;
3364   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3365
3366   {
3367     USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
3368     SET_H_CR (((UINT) 0), opval);
3369     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3370   }
3371
3372 #undef FLD
3373 }
3374   NEXT (vpc);
3375
3376   CASE (sem, INSN_SETPSW) : /* setpsw $uimm8 */
3377 {
3378   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3379   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3380 #define FLD(f) abuf->fields.sfmt_clrpsw.f
3381   int UNUSED written = 0;
3382   IADDR UNUSED pc = abuf->addr;
3383   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3384
3385   {
3386     USI opval = FLD (f_uimm8);
3387     SET_H_CR (((UINT) 0), opval);
3388     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
3389   }
3390
3391 #undef FLD
3392 }
3393   NEXT (vpc);
3394
3395   CASE (sem, INSN_BSET) : /* bset $uimm3,@($slo16,$sr) */
3396 {
3397   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3398   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3399 #define FLD(f) abuf->fields.sfmt_bset.f
3400   int UNUSED written = 0;
3401   IADDR UNUSED pc = abuf->addr;
3402   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3403
3404   {
3405     QI opval = ORQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), SLLQI (1, SUBSI (7, FLD (f_uimm3))));
3406     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3407     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3408   }
3409
3410 #undef FLD
3411 }
3412   NEXT (vpc);
3413
3414   CASE (sem, INSN_BCLR) : /* bclr $uimm3,@($slo16,$sr) */
3415 {
3416   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3418 #define FLD(f) abuf->fields.sfmt_bset.f
3419   int UNUSED written = 0;
3420   IADDR UNUSED pc = abuf->addr;
3421   vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
3422
3423   {
3424     QI opval = ANDQI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))), INVQI (SLLQI (1, SUBSI (7, FLD (f_uimm3)))));
3425     SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)), opval);
3426     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
3427   }
3428
3429 #undef FLD
3430 }
3431   NEXT (vpc);
3432
3433   CASE (sem, INSN_BTST) : /* btst $uimm3,$sr */
3434 {
3435   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3436   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3437 #define FLD(f) abuf->fields.sfmt_bset.f
3438   int UNUSED written = 0;
3439   IADDR UNUSED pc = abuf->addr;
3440   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3441
3442   {
3443     BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
3444     CPU (h_cond) = opval;
3445     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3446   }
3447
3448 #undef FLD
3449 }
3450   NEXT (vpc);
3451
3452   CASE (sem, INSN_PAR_ADD) : /* add $dr,$sr */
3453 {
3454   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3455   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3456 #define FLD(f) abuf->fields.sfmt_add.f
3457 #define OPRND(f) par_exec->operands.sfmt_add.f
3458   int UNUSED written = 0;
3459   IADDR UNUSED pc = abuf->addr;
3460   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3461
3462   {
3463     SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
3464     OPRND (dr) = opval;
3465     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3466   }
3467
3468 #undef OPRND
3469 #undef FLD
3470 }
3471   NEXT (vpc);
3472
3473 CASE (sem, INSN_WRITE_ADD) : /* add $dr,$sr */
3474   {
3475     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3476     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3477 #define FLD(f) abuf->fields.sfmt_add.f
3478 #define OPRND(f) par_exec->operands.sfmt_add.f
3479     int UNUSED written = abuf->written;
3480     IADDR UNUSED pc = abuf->addr;
3481     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3482
3483   * FLD (i_dr) = OPRND (dr);
3484
3485 #undef OPRND
3486 #undef FLD
3487   }
3488   NEXT (vpc);
3489
3490   CASE (sem, INSN_PAR_AND) : /* and $dr,$sr */
3491 {
3492   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3493   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3494 #define FLD(f) abuf->fields.sfmt_add.f
3495 #define OPRND(f) par_exec->operands.sfmt_add.f
3496   int UNUSED written = 0;
3497   IADDR UNUSED pc = abuf->addr;
3498   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3499
3500   {
3501     SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
3502     OPRND (dr) = opval;
3503     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3504   }
3505
3506 #undef OPRND
3507 #undef FLD
3508 }
3509   NEXT (vpc);
3510
3511 CASE (sem, INSN_WRITE_AND) : /* and $dr,$sr */
3512   {
3513     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3514     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3515 #define FLD(f) abuf->fields.sfmt_add.f
3516 #define OPRND(f) par_exec->operands.sfmt_add.f
3517     int UNUSED written = abuf->written;
3518     IADDR UNUSED pc = abuf->addr;
3519     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3520
3521   * FLD (i_dr) = OPRND (dr);
3522
3523 #undef OPRND
3524 #undef FLD
3525   }
3526   NEXT (vpc);
3527
3528   CASE (sem, INSN_PAR_OR) : /* or $dr,$sr */
3529 {
3530   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3531   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3532 #define FLD(f) abuf->fields.sfmt_add.f
3533 #define OPRND(f) par_exec->operands.sfmt_add.f
3534   int UNUSED written = 0;
3535   IADDR UNUSED pc = abuf->addr;
3536   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3537
3538   {
3539     SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
3540     OPRND (dr) = opval;
3541     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3542   }
3543
3544 #undef OPRND
3545 #undef FLD
3546 }
3547   NEXT (vpc);
3548
3549 CASE (sem, INSN_WRITE_OR) : /* or $dr,$sr */
3550   {
3551     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3552     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3553 #define FLD(f) abuf->fields.sfmt_add.f
3554 #define OPRND(f) par_exec->operands.sfmt_add.f
3555     int UNUSED written = abuf->written;
3556     IADDR UNUSED pc = abuf->addr;
3557     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3558
3559   * FLD (i_dr) = OPRND (dr);
3560
3561 #undef OPRND
3562 #undef FLD
3563   }
3564   NEXT (vpc);
3565
3566   CASE (sem, INSN_PAR_XOR) : /* xor $dr,$sr */
3567 {
3568   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3569   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3570 #define FLD(f) abuf->fields.sfmt_add.f
3571 #define OPRND(f) par_exec->operands.sfmt_add.f
3572   int UNUSED written = 0;
3573   IADDR UNUSED pc = abuf->addr;
3574   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3575
3576   {
3577     SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
3578     OPRND (dr) = opval;
3579     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3580   }
3581
3582 #undef OPRND
3583 #undef FLD
3584 }
3585   NEXT (vpc);
3586
3587 CASE (sem, INSN_WRITE_XOR) : /* xor $dr,$sr */
3588   {
3589     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3590     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3591 #define FLD(f) abuf->fields.sfmt_add.f
3592 #define OPRND(f) par_exec->operands.sfmt_add.f
3593     int UNUSED written = abuf->written;
3594     IADDR UNUSED pc = abuf->addr;
3595     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3596
3597   * FLD (i_dr) = OPRND (dr);
3598
3599 #undef OPRND
3600 #undef FLD
3601   }
3602   NEXT (vpc);
3603
3604   CASE (sem, INSN_PAR_ADDI) : /* addi $dr,$simm8 */
3605 {
3606   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3607   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3608 #define FLD(f) abuf->fields.sfmt_addi.f
3609 #define OPRND(f) par_exec->operands.sfmt_addi.f
3610   int UNUSED written = 0;
3611   IADDR UNUSED pc = abuf->addr;
3612   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3613
3614   {
3615     SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
3616     OPRND (dr) = opval;
3617     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3618   }
3619
3620 #undef OPRND
3621 #undef FLD
3622 }
3623   NEXT (vpc);
3624
3625 CASE (sem, INSN_WRITE_ADDI) : /* addi $dr,$simm8 */
3626   {
3627     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3628     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3629 #define FLD(f) abuf->fields.sfmt_addi.f
3630 #define OPRND(f) par_exec->operands.sfmt_addi.f
3631     int UNUSED written = abuf->written;
3632     IADDR UNUSED pc = abuf->addr;
3633     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3634
3635   * FLD (i_dr) = OPRND (dr);
3636
3637 #undef OPRND
3638 #undef FLD
3639   }
3640   NEXT (vpc);
3641
3642   CASE (sem, INSN_PAR_ADDV) : /* addv $dr,$sr */
3643 {
3644   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3645   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3646 #define FLD(f) abuf->fields.sfmt_add.f
3647 #define OPRND(f) par_exec->operands.sfmt_addv.f
3648   int UNUSED written = 0;
3649   IADDR UNUSED pc = abuf->addr;
3650   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3651
3652 {
3653   SI temp0;BI temp1;
3654   temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
3655   temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
3656   {
3657     SI opval = temp0;
3658     OPRND (dr) = opval;
3659     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3660   }
3661   {
3662     BI opval = temp1;
3663     OPRND (condbit) = opval;
3664     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3665   }
3666 }
3667
3668 #undef OPRND
3669 #undef FLD
3670 }
3671   NEXT (vpc);
3672
3673 CASE (sem, INSN_WRITE_ADDV) : /* addv $dr,$sr */
3674   {
3675     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3676     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3677 #define FLD(f) abuf->fields.sfmt_add.f
3678 #define OPRND(f) par_exec->operands.sfmt_addv.f
3679     int UNUSED written = abuf->written;
3680     IADDR UNUSED pc = abuf->addr;
3681     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3682
3683   CPU (h_cond) = OPRND (condbit);
3684   * FLD (i_dr) = OPRND (dr);
3685
3686 #undef OPRND
3687 #undef FLD
3688   }
3689   NEXT (vpc);
3690
3691   CASE (sem, INSN_PAR_ADDX) : /* addx $dr,$sr */
3692 {
3693   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3694   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3695 #define FLD(f) abuf->fields.sfmt_add.f
3696 #define OPRND(f) par_exec->operands.sfmt_addx.f
3697   int UNUSED written = 0;
3698   IADDR UNUSED pc = abuf->addr;
3699   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3700
3701 {
3702   SI temp0;BI temp1;
3703   temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3704   temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
3705   {
3706     SI opval = temp0;
3707     OPRND (dr) = opval;
3708     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3709   }
3710   {
3711     BI opval = temp1;
3712     OPRND (condbit) = opval;
3713     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
3714   }
3715 }
3716
3717 #undef OPRND
3718 #undef FLD
3719 }
3720   NEXT (vpc);
3721
3722 CASE (sem, INSN_WRITE_ADDX) : /* addx $dr,$sr */
3723   {
3724     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3725     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3726 #define FLD(f) abuf->fields.sfmt_add.f
3727 #define OPRND(f) par_exec->operands.sfmt_addx.f
3728     int UNUSED written = abuf->written;
3729     IADDR UNUSED pc = abuf->addr;
3730     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3731
3732   CPU (h_cond) = OPRND (condbit);
3733   * FLD (i_dr) = OPRND (dr);
3734
3735 #undef OPRND
3736 #undef FLD
3737   }
3738   NEXT (vpc);
3739
3740   CASE (sem, INSN_PAR_BC8) : /* bc.s $disp8 */
3741 {
3742   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3743   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3744 #define FLD(f) abuf->fields.sfmt_bl8.f
3745 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3746   int UNUSED written = 0;
3747   IADDR UNUSED pc = abuf->addr;
3748   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3749
3750 if (CPU (h_cond)) {
3751   {
3752     USI opval = FLD (i_disp8);
3753     OPRND (pc) = opval;
3754     written |= (1 << 2);
3755     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3756   }
3757 }
3758
3759   abuf->written = written;
3760 #undef OPRND
3761 #undef FLD
3762 }
3763   NEXT (vpc);
3764
3765 CASE (sem, INSN_WRITE_BC8) : /* bc.s $disp8 */
3766   {
3767     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3768     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3769 #define FLD(f) abuf->fields.sfmt_bl8.f
3770 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3771     int UNUSED written = abuf->written;
3772     IADDR UNUSED pc = abuf->addr;
3773     SEM_BRANCH_INIT
3774     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3775
3776   if (written & (1 << 2))
3777     {
3778       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3779     }
3780
3781   SEM_BRANCH_FINI (vpc);
3782 #undef OPRND
3783 #undef FLD
3784   }
3785   NEXT (vpc);
3786
3787   CASE (sem, INSN_PAR_BL8) : /* bl.s $disp8 */
3788 {
3789   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3790   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3791 #define FLD(f) abuf->fields.sfmt_bl8.f
3792 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3793   int UNUSED written = 0;
3794   IADDR UNUSED pc = abuf->addr;
3795   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3796
3797 {
3798   {
3799     SI opval = ADDSI (ANDSI (pc, -4), 4);
3800     OPRND (h_gr_SI_14) = opval;
3801     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3802   }
3803   {
3804     USI opval = FLD (i_disp8);
3805     OPRND (pc) = opval;
3806     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3807   }
3808 }
3809
3810 #undef OPRND
3811 #undef FLD
3812 }
3813   NEXT (vpc);
3814
3815 CASE (sem, INSN_WRITE_BL8) : /* bl.s $disp8 */
3816   {
3817     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3818     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3819 #define FLD(f) abuf->fields.sfmt_bl8.f
3820 #define OPRND(f) par_exec->operands.sfmt_bl8.f
3821     int UNUSED written = abuf->written;
3822     IADDR UNUSED pc = abuf->addr;
3823     SEM_BRANCH_INIT
3824     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3825
3826   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3827   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3828
3829   SEM_BRANCH_FINI (vpc);
3830 #undef OPRND
3831 #undef FLD
3832   }
3833   NEXT (vpc);
3834
3835   CASE (sem, INSN_PAR_BCL8) : /* bcl.s $disp8 */
3836 {
3837   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3838   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3839 #define FLD(f) abuf->fields.sfmt_bl8.f
3840 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3841   int UNUSED written = 0;
3842   IADDR UNUSED pc = abuf->addr;
3843   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3844
3845 if (CPU (h_cond)) {
3846 {
3847   {
3848     SI opval = ADDSI (ANDSI (pc, -4), 4);
3849     OPRND (h_gr_SI_14) = opval;
3850     written |= (1 << 3);
3851     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3852   }
3853   {
3854     USI opval = FLD (i_disp8);
3855     OPRND (pc) = opval;
3856     written |= (1 << 4);
3857     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3858   }
3859 }
3860 }
3861
3862   abuf->written = written;
3863 #undef OPRND
3864 #undef FLD
3865 }
3866   NEXT (vpc);
3867
3868 CASE (sem, INSN_WRITE_BCL8) : /* bcl.s $disp8 */
3869   {
3870     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3871     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3872 #define FLD(f) abuf->fields.sfmt_bl8.f
3873 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3874     int UNUSED written = abuf->written;
3875     IADDR UNUSED pc = abuf->addr;
3876     SEM_BRANCH_INIT
3877     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3878
3879   if (written & (1 << 3))
3880     {
3881       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
3882     }
3883   if (written & (1 << 4))
3884     {
3885       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3886     }
3887
3888   SEM_BRANCH_FINI (vpc);
3889 #undef OPRND
3890 #undef FLD
3891   }
3892   NEXT (vpc);
3893
3894   CASE (sem, INSN_PAR_BNC8) : /* bnc.s $disp8 */
3895 {
3896   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3897   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3898 #define FLD(f) abuf->fields.sfmt_bl8.f
3899 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3900   int UNUSED written = 0;
3901   IADDR UNUSED pc = abuf->addr;
3902   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3903
3904 if (NOTBI (CPU (h_cond))) {
3905   {
3906     USI opval = FLD (i_disp8);
3907     OPRND (pc) = opval;
3908     written |= (1 << 2);
3909     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3910   }
3911 }
3912
3913   abuf->written = written;
3914 #undef OPRND
3915 #undef FLD
3916 }
3917   NEXT (vpc);
3918
3919 CASE (sem, INSN_WRITE_BNC8) : /* bnc.s $disp8 */
3920   {
3921     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3922     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3923 #define FLD(f) abuf->fields.sfmt_bl8.f
3924 #define OPRND(f) par_exec->operands.sfmt_bc8.f
3925     int UNUSED written = abuf->written;
3926     IADDR UNUSED pc = abuf->addr;
3927     SEM_BRANCH_INIT
3928     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3929
3930   if (written & (1 << 2))
3931     {
3932       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3933     }
3934
3935   SEM_BRANCH_FINI (vpc);
3936 #undef OPRND
3937 #undef FLD
3938   }
3939   NEXT (vpc);
3940
3941   CASE (sem, INSN_PAR_BRA8) : /* bra.s $disp8 */
3942 {
3943   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3944   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3945 #define FLD(f) abuf->fields.sfmt_bl8.f
3946 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3947   int UNUSED written = 0;
3948   IADDR UNUSED pc = abuf->addr;
3949   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3950
3951   {
3952     USI opval = FLD (i_disp8);
3953     OPRND (pc) = opval;
3954     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
3955   }
3956
3957 #undef OPRND
3958 #undef FLD
3959 }
3960   NEXT (vpc);
3961
3962 CASE (sem, INSN_WRITE_BRA8) : /* bra.s $disp8 */
3963   {
3964     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3965     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
3966 #define FLD(f) abuf->fields.sfmt_bl8.f
3967 #define OPRND(f) par_exec->operands.sfmt_bra8.f
3968     int UNUSED written = abuf->written;
3969     IADDR UNUSED pc = abuf->addr;
3970     SEM_BRANCH_INIT
3971     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
3972
3973   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
3974
3975   SEM_BRANCH_FINI (vpc);
3976 #undef OPRND
3977 #undef FLD
3978   }
3979   NEXT (vpc);
3980
3981   CASE (sem, INSN_PAR_BNCL8) : /* bncl.s $disp8 */
3982 {
3983   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
3984   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3985 #define FLD(f) abuf->fields.sfmt_bl8.f
3986 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
3987   int UNUSED written = 0;
3988   IADDR UNUSED pc = abuf->addr;
3989   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
3990
3991 if (NOTBI (CPU (h_cond))) {
3992 {
3993   {
3994     SI opval = ADDSI (ANDSI (pc, -4), 4);
3995     OPRND (h_gr_SI_14) = opval;
3996     written |= (1 << 3);
3997     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
3998   }
3999   {
4000     USI opval = FLD (i_disp8);
4001     OPRND (pc) = opval;
4002     written |= (1 << 4);
4003     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4004   }
4005 }
4006 }
4007
4008   abuf->written = written;
4009 #undef OPRND
4010 #undef FLD
4011 }
4012   NEXT (vpc);
4013
4014 CASE (sem, INSN_WRITE_BNCL8) : /* bncl.s $disp8 */
4015   {
4016     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4017     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4018 #define FLD(f) abuf->fields.sfmt_bl8.f
4019 #define OPRND(f) par_exec->operands.sfmt_bcl8.f
4020     int UNUSED written = abuf->written;
4021     IADDR UNUSED pc = abuf->addr;
4022     SEM_BRANCH_INIT
4023     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4024
4025   if (written & (1 << 3))
4026     {
4027       CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4028     }
4029   if (written & (1 << 4))
4030     {
4031       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4032     }
4033
4034   SEM_BRANCH_FINI (vpc);
4035 #undef OPRND
4036 #undef FLD
4037   }
4038   NEXT (vpc);
4039
4040   CASE (sem, INSN_PAR_CMP) : /* cmp $src1,$src2 */
4041 {
4042   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4043   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4044 #define FLD(f) abuf->fields.sfmt_st_plus.f
4045 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4046   int UNUSED written = 0;
4047   IADDR UNUSED pc = abuf->addr;
4048   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4049
4050   {
4051     BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
4052     OPRND (condbit) = opval;
4053     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4054   }
4055
4056 #undef OPRND
4057 #undef FLD
4058 }
4059   NEXT (vpc);
4060
4061 CASE (sem, INSN_WRITE_CMP) : /* cmp $src1,$src2 */
4062   {
4063     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4064     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4065 #define FLD(f) abuf->fields.sfmt_st_plus.f
4066 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4067     int UNUSED written = abuf->written;
4068     IADDR UNUSED pc = abuf->addr;
4069     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4070
4071   CPU (h_cond) = OPRND (condbit);
4072
4073 #undef OPRND
4074 #undef FLD
4075   }
4076   NEXT (vpc);
4077
4078   CASE (sem, INSN_PAR_CMPU) : /* cmpu $src1,$src2 */
4079 {
4080   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4081   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4082 #define FLD(f) abuf->fields.sfmt_st_plus.f
4083 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4084   int UNUSED written = 0;
4085   IADDR UNUSED pc = abuf->addr;
4086   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4087
4088   {
4089     BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
4090     OPRND (condbit) = opval;
4091     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4092   }
4093
4094 #undef OPRND
4095 #undef FLD
4096 }
4097   NEXT (vpc);
4098
4099 CASE (sem, INSN_WRITE_CMPU) : /* cmpu $src1,$src2 */
4100   {
4101     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4102     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4103 #define FLD(f) abuf->fields.sfmt_st_plus.f
4104 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4105     int UNUSED written = abuf->written;
4106     IADDR UNUSED pc = abuf->addr;
4107     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4108
4109   CPU (h_cond) = OPRND (condbit);
4110
4111 #undef OPRND
4112 #undef FLD
4113   }
4114   NEXT (vpc);
4115
4116   CASE (sem, INSN_PAR_CMPEQ) : /* cmpeq $src1,$src2 */
4117 {
4118   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4119   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4120 #define FLD(f) abuf->fields.sfmt_st_plus.f
4121 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4122   int UNUSED written = 0;
4123   IADDR UNUSED pc = abuf->addr;
4124   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4125
4126   {
4127     BI opval = EQSI (* FLD (i_src1), * FLD (i_src2));
4128     OPRND (condbit) = opval;
4129     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4130   }
4131
4132 #undef OPRND
4133 #undef FLD
4134 }
4135   NEXT (vpc);
4136
4137 CASE (sem, INSN_WRITE_CMPEQ) : /* cmpeq $src1,$src2 */
4138   {
4139     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4140     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4141 #define FLD(f) abuf->fields.sfmt_st_plus.f
4142 #define OPRND(f) par_exec->operands.sfmt_cmp.f
4143     int UNUSED written = abuf->written;
4144     IADDR UNUSED pc = abuf->addr;
4145     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4146
4147   CPU (h_cond) = OPRND (condbit);
4148
4149 #undef OPRND
4150 #undef FLD
4151   }
4152   NEXT (vpc);
4153
4154   CASE (sem, INSN_PAR_CMPZ) : /* cmpz $src2 */
4155 {
4156   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4157   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4158 #define FLD(f) abuf->fields.sfmt_st_plus.f
4159 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
4160   int UNUSED written = 0;
4161   IADDR UNUSED pc = abuf->addr;
4162   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4163
4164   {
4165     BI opval = EQSI (* FLD (i_src2), 0);
4166     OPRND (condbit) = opval;
4167     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
4168   }
4169
4170 #undef OPRND
4171 #undef FLD
4172 }
4173   NEXT (vpc);
4174
4175 CASE (sem, INSN_WRITE_CMPZ) : /* cmpz $src2 */
4176   {
4177     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4178     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4179 #define FLD(f) abuf->fields.sfmt_st_plus.f
4180 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
4181     int UNUSED written = abuf->written;
4182     IADDR UNUSED pc = abuf->addr;
4183     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4184
4185   CPU (h_cond) = OPRND (condbit);
4186
4187 #undef OPRND
4188 #undef FLD
4189   }
4190   NEXT (vpc);
4191
4192   CASE (sem, INSN_PAR_JC) : /* jc $sr */
4193 {
4194   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4195   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4196 #define FLD(f) abuf->fields.sfmt_jl.f
4197 #define OPRND(f) par_exec->operands.sfmt_jc.f
4198   int UNUSED written = 0;
4199   IADDR UNUSED pc = abuf->addr;
4200   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4201
4202 if (CPU (h_cond)) {
4203   {
4204     USI opval = ANDSI (* FLD (i_sr), -4);
4205     OPRND (pc) = opval;
4206     written |= (1 << 2);
4207     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4208   }
4209 }
4210
4211   abuf->written = written;
4212 #undef OPRND
4213 #undef FLD
4214 }
4215   NEXT (vpc);
4216
4217 CASE (sem, INSN_WRITE_JC) : /* jc $sr */
4218   {
4219     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4220     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4221 #define FLD(f) abuf->fields.sfmt_jl.f
4222 #define OPRND(f) par_exec->operands.sfmt_jc.f
4223     int UNUSED written = abuf->written;
4224     IADDR UNUSED pc = abuf->addr;
4225     SEM_BRANCH_INIT
4226     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4227
4228   if (written & (1 << 2))
4229     {
4230       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4231     }
4232
4233   SEM_BRANCH_FINI (vpc);
4234 #undef OPRND
4235 #undef FLD
4236   }
4237   NEXT (vpc);
4238
4239   CASE (sem, INSN_PAR_JNC) : /* jnc $sr */
4240 {
4241   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4242   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4243 #define FLD(f) abuf->fields.sfmt_jl.f
4244 #define OPRND(f) par_exec->operands.sfmt_jc.f
4245   int UNUSED written = 0;
4246   IADDR UNUSED pc = abuf->addr;
4247   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4248
4249 if (NOTBI (CPU (h_cond))) {
4250   {
4251     USI opval = ANDSI (* FLD (i_sr), -4);
4252     OPRND (pc) = opval;
4253     written |= (1 << 2);
4254     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4255   }
4256 }
4257
4258   abuf->written = written;
4259 #undef OPRND
4260 #undef FLD
4261 }
4262   NEXT (vpc);
4263
4264 CASE (sem, INSN_WRITE_JNC) : /* jnc $sr */
4265   {
4266     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4267     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4268 #define FLD(f) abuf->fields.sfmt_jl.f
4269 #define OPRND(f) par_exec->operands.sfmt_jc.f
4270     int UNUSED written = abuf->written;
4271     IADDR UNUSED pc = abuf->addr;
4272     SEM_BRANCH_INIT
4273     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4274
4275   if (written & (1 << 2))
4276     {
4277       SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4278     }
4279
4280   SEM_BRANCH_FINI (vpc);
4281 #undef OPRND
4282 #undef FLD
4283   }
4284   NEXT (vpc);
4285
4286   CASE (sem, INSN_PAR_JL) : /* jl $sr */
4287 {
4288   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4290 #define FLD(f) abuf->fields.sfmt_jl.f
4291 #define OPRND(f) par_exec->operands.sfmt_jl.f
4292   int UNUSED written = 0;
4293   IADDR UNUSED pc = abuf->addr;
4294   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4295
4296 {
4297   SI temp0;USI temp1;
4298   temp0 = ADDSI (ANDSI (pc, -4), 4);
4299   temp1 = ANDSI (* FLD (i_sr), -4);
4300   {
4301     SI opval = temp0;
4302     OPRND (h_gr_SI_14) = opval;
4303     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4304   }
4305   {
4306     USI opval = temp1;
4307     OPRND (pc) = opval;
4308     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4309   }
4310 }
4311
4312 #undef OPRND
4313 #undef FLD
4314 }
4315   NEXT (vpc);
4316
4317 CASE (sem, INSN_WRITE_JL) : /* jl $sr */
4318   {
4319     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4320     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4321 #define FLD(f) abuf->fields.sfmt_jl.f
4322 #define OPRND(f) par_exec->operands.sfmt_jl.f
4323     int UNUSED written = abuf->written;
4324     IADDR UNUSED pc = abuf->addr;
4325     SEM_BRANCH_INIT
4326     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4327
4328   CPU (h_gr[((UINT) 14)]) = OPRND (h_gr_SI_14);
4329   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4330
4331   SEM_BRANCH_FINI (vpc);
4332 #undef OPRND
4333 #undef FLD
4334   }
4335   NEXT (vpc);
4336
4337   CASE (sem, INSN_PAR_JMP) : /* jmp $sr */
4338 {
4339   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4340   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4341 #define FLD(f) abuf->fields.sfmt_jl.f
4342 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4343   int UNUSED written = 0;
4344   IADDR UNUSED pc = abuf->addr;
4345   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4346
4347   {
4348     USI opval = ANDSI (* FLD (i_sr), -4);
4349     OPRND (pc) = opval;
4350     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
4351   }
4352
4353 #undef OPRND
4354 #undef FLD
4355 }
4356   NEXT (vpc);
4357
4358 CASE (sem, INSN_WRITE_JMP) : /* jmp $sr */
4359   {
4360     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4361     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4362 #define FLD(f) abuf->fields.sfmt_jl.f
4363 #define OPRND(f) par_exec->operands.sfmt_jmp.f
4364     int UNUSED written = abuf->written;
4365     IADDR UNUSED pc = abuf->addr;
4366     SEM_BRANCH_INIT
4367     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4368
4369   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
4370
4371   SEM_BRANCH_FINI (vpc);
4372 #undef OPRND
4373 #undef FLD
4374   }
4375   NEXT (vpc);
4376
4377   CASE (sem, INSN_PAR_LD) : /* ld $dr,@$sr */
4378 {
4379   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4380   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4381 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4382 #define OPRND(f) par_exec->operands.sfmt_ld.f
4383   int UNUSED written = 0;
4384   IADDR UNUSED pc = abuf->addr;
4385   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4386
4387   {
4388     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4389     OPRND (dr) = opval;
4390     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4391   }
4392
4393 #undef OPRND
4394 #undef FLD
4395 }
4396   NEXT (vpc);
4397
4398 CASE (sem, INSN_WRITE_LD) : /* ld $dr,@$sr */
4399   {
4400     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4401     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4402 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4403 #define OPRND(f) par_exec->operands.sfmt_ld.f
4404     int UNUSED written = abuf->written;
4405     IADDR UNUSED pc = abuf->addr;
4406     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4407
4408   * FLD (i_dr) = OPRND (dr);
4409
4410 #undef OPRND
4411 #undef FLD
4412   }
4413   NEXT (vpc);
4414
4415   CASE (sem, INSN_PAR_LDB) : /* ldb $dr,@$sr */
4416 {
4417   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4418   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4419 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4420 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4421   int UNUSED written = 0;
4422   IADDR UNUSED pc = abuf->addr;
4423   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4424
4425   {
4426     SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4427     OPRND (dr) = opval;
4428     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4429   }
4430
4431 #undef OPRND
4432 #undef FLD
4433 }
4434   NEXT (vpc);
4435
4436 CASE (sem, INSN_WRITE_LDB) : /* ldb $dr,@$sr */
4437   {
4438     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4439     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4440 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4441 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4442     int UNUSED written = abuf->written;
4443     IADDR UNUSED pc = abuf->addr;
4444     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4445
4446   * FLD (i_dr) = OPRND (dr);
4447
4448 #undef OPRND
4449 #undef FLD
4450   }
4451   NEXT (vpc);
4452
4453   CASE (sem, INSN_PAR_LDH) : /* ldh $dr,@$sr */
4454 {
4455   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4456   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4457 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4458 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4459   int UNUSED written = 0;
4460   IADDR UNUSED pc = abuf->addr;
4461   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4462
4463   {
4464     SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4465     OPRND (dr) = opval;
4466     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4467   }
4468
4469 #undef OPRND
4470 #undef FLD
4471 }
4472   NEXT (vpc);
4473
4474 CASE (sem, INSN_WRITE_LDH) : /* ldh $dr,@$sr */
4475   {
4476     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4477     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4478 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4479 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4480     int UNUSED written = abuf->written;
4481     IADDR UNUSED pc = abuf->addr;
4482     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4483
4484   * FLD (i_dr) = OPRND (dr);
4485
4486 #undef OPRND
4487 #undef FLD
4488   }
4489   NEXT (vpc);
4490
4491   CASE (sem, INSN_PAR_LDUB) : /* ldub $dr,@$sr */
4492 {
4493   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4494   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4495 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4496 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4497   int UNUSED written = 0;
4498   IADDR UNUSED pc = abuf->addr;
4499   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4500
4501   {
4502     SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
4503     OPRND (dr) = opval;
4504     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4505   }
4506
4507 #undef OPRND
4508 #undef FLD
4509 }
4510   NEXT (vpc);
4511
4512 CASE (sem, INSN_WRITE_LDUB) : /* ldub $dr,@$sr */
4513   {
4514     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4515     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4516 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4517 #define OPRND(f) par_exec->operands.sfmt_ldb.f
4518     int UNUSED written = abuf->written;
4519     IADDR UNUSED pc = abuf->addr;
4520     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4521
4522   * FLD (i_dr) = OPRND (dr);
4523
4524 #undef OPRND
4525 #undef FLD
4526   }
4527   NEXT (vpc);
4528
4529   CASE (sem, INSN_PAR_LDUH) : /* lduh $dr,@$sr */
4530 {
4531   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4532   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4533 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4534 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4535   int UNUSED written = 0;
4536   IADDR UNUSED pc = abuf->addr;
4537   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4538
4539   {
4540     SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
4541     OPRND (dr) = opval;
4542     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4543   }
4544
4545 #undef OPRND
4546 #undef FLD
4547 }
4548   NEXT (vpc);
4549
4550 CASE (sem, INSN_WRITE_LDUH) : /* lduh $dr,@$sr */
4551   {
4552     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4553     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4554 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4555 #define OPRND(f) par_exec->operands.sfmt_ldh.f
4556     int UNUSED written = abuf->written;
4557     IADDR UNUSED pc = abuf->addr;
4558     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4559
4560   * FLD (i_dr) = OPRND (dr);
4561
4562 #undef OPRND
4563 #undef FLD
4564   }
4565   NEXT (vpc);
4566
4567   CASE (sem, INSN_PAR_LD_PLUS) : /* ld $dr,@$sr+ */
4568 {
4569   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4570   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4571 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4572 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4573   int UNUSED written = 0;
4574   IADDR UNUSED pc = abuf->addr;
4575   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4576
4577 {
4578   SI temp0;SI temp1;
4579   temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4580   temp1 = ADDSI (* FLD (i_sr), 4);
4581   {
4582     SI opval = temp0;
4583     OPRND (dr) = opval;
4584     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4585   }
4586   {
4587     SI opval = temp1;
4588     OPRND (sr) = opval;
4589     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4590   }
4591 }
4592
4593 #undef OPRND
4594 #undef FLD
4595 }
4596   NEXT (vpc);
4597
4598 CASE (sem, INSN_WRITE_LD_PLUS) : /* ld $dr,@$sr+ */
4599   {
4600     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4601     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4602 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4603 #define OPRND(f) par_exec->operands.sfmt_ld_plus.f
4604     int UNUSED written = abuf->written;
4605     IADDR UNUSED pc = abuf->addr;
4606     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4607
4608   * FLD (i_dr) = OPRND (dr);
4609   * FLD (i_sr) = OPRND (sr);
4610
4611 #undef OPRND
4612 #undef FLD
4613   }
4614   NEXT (vpc);
4615
4616   CASE (sem, INSN_PAR_LDI8) : /* ldi8 $dr,$simm8 */
4617 {
4618   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4619   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4620 #define FLD(f) abuf->fields.sfmt_addi.f
4621 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4622   int UNUSED written = 0;
4623   IADDR UNUSED pc = abuf->addr;
4624   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4625
4626   {
4627     SI opval = FLD (f_simm8);
4628     OPRND (dr) = opval;
4629     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4630   }
4631
4632 #undef OPRND
4633 #undef FLD
4634 }
4635   NEXT (vpc);
4636
4637 CASE (sem, INSN_WRITE_LDI8) : /* ldi8 $dr,$simm8 */
4638   {
4639     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4640     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4641 #define FLD(f) abuf->fields.sfmt_addi.f
4642 #define OPRND(f) par_exec->operands.sfmt_ldi8.f
4643     int UNUSED written = abuf->written;
4644     IADDR UNUSED pc = abuf->addr;
4645     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4646
4647   * FLD (i_dr) = OPRND (dr);
4648
4649 #undef OPRND
4650 #undef FLD
4651   }
4652   NEXT (vpc);
4653
4654   CASE (sem, INSN_PAR_LOCK) : /* lock $dr,@$sr */
4655 {
4656   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4657   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4658 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4659 #define OPRND(f) par_exec->operands.sfmt_lock.f
4660   int UNUSED written = 0;
4661   IADDR UNUSED pc = abuf->addr;
4662   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4663
4664 {
4665   {
4666     BI opval = 1;
4667     OPRND (h_lock_BI) = opval;
4668     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
4669   }
4670   {
4671     SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
4672     OPRND (dr) = opval;
4673     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4674   }
4675 }
4676
4677 #undef OPRND
4678 #undef FLD
4679 }
4680   NEXT (vpc);
4681
4682 CASE (sem, INSN_WRITE_LOCK) : /* lock $dr,@$sr */
4683   {
4684     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4685     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4686 #define FLD(f) abuf->fields.sfmt_ld_plus.f
4687 #define OPRND(f) par_exec->operands.sfmt_lock.f
4688     int UNUSED written = abuf->written;
4689     IADDR UNUSED pc = abuf->addr;
4690     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4691
4692   * FLD (i_dr) = OPRND (dr);
4693   CPU (h_lock) = OPRND (h_lock_BI);
4694
4695 #undef OPRND
4696 #undef FLD
4697   }
4698   NEXT (vpc);
4699
4700   CASE (sem, INSN_PAR_MACHI_A) : /* machi $src1,$src2,$acc */
4701 {
4702   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4703   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4704 #define FLD(f) abuf->fields.sfmt_machi_a.f
4705 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4706   int UNUSED written = 0;
4707   IADDR UNUSED pc = abuf->addr;
4708   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4709
4710   {
4711     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
4712     OPRND (acc) = opval;
4713     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4714   }
4715
4716 #undef OPRND
4717 #undef FLD
4718 }
4719   NEXT (vpc);
4720
4721 CASE (sem, INSN_WRITE_MACHI_A) : /* machi $src1,$src2,$acc */
4722   {
4723     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4724     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4725 #define FLD(f) abuf->fields.sfmt_machi_a.f
4726 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4727     int UNUSED written = abuf->written;
4728     IADDR UNUSED pc = abuf->addr;
4729     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4730
4731   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4732
4733 #undef OPRND
4734 #undef FLD
4735   }
4736   NEXT (vpc);
4737
4738   CASE (sem, INSN_PAR_MACLO_A) : /* maclo $src1,$src2,$acc */
4739 {
4740   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4741   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4742 #define FLD(f) abuf->fields.sfmt_machi_a.f
4743 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4744   int UNUSED written = 0;
4745   IADDR UNUSED pc = abuf->addr;
4746   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4747
4748   {
4749     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
4750     OPRND (acc) = opval;
4751     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4752   }
4753
4754 #undef OPRND
4755 #undef FLD
4756 }
4757   NEXT (vpc);
4758
4759 CASE (sem, INSN_WRITE_MACLO_A) : /* maclo $src1,$src2,$acc */
4760   {
4761     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4762     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4763 #define FLD(f) abuf->fields.sfmt_machi_a.f
4764 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4765     int UNUSED written = abuf->written;
4766     IADDR UNUSED pc = abuf->addr;
4767     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4768
4769   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4770
4771 #undef OPRND
4772 #undef FLD
4773   }
4774   NEXT (vpc);
4775
4776   CASE (sem, INSN_PAR_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4777 {
4778   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4779   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4780 #define FLD(f) abuf->fields.sfmt_machi_a.f
4781 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4782   int UNUSED written = 0;
4783   IADDR UNUSED pc = abuf->addr;
4784   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4785
4786   {
4787     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))));
4788     OPRND (acc) = opval;
4789     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4790   }
4791
4792 #undef OPRND
4793 #undef FLD
4794 }
4795   NEXT (vpc);
4796
4797 CASE (sem, INSN_WRITE_MACWHI_A) : /* macwhi $src1,$src2,$acc */
4798   {
4799     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4800     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4801 #define FLD(f) abuf->fields.sfmt_machi_a.f
4802 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4803     int UNUSED written = abuf->written;
4804     IADDR UNUSED pc = abuf->addr;
4805     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4806
4807   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4808
4809 #undef OPRND
4810 #undef FLD
4811   }
4812   NEXT (vpc);
4813
4814   CASE (sem, INSN_PAR_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4815 {
4816   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4817   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4818 #define FLD(f) abuf->fields.sfmt_machi_a.f
4819 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4820   int UNUSED written = 0;
4821   IADDR UNUSED pc = abuf->addr;
4822   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4823
4824   {
4825     DI opval = ADDDI (GET_H_ACCUMS (FLD (f_acc)), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))));
4826     OPRND (acc) = opval;
4827     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4828   }
4829
4830 #undef OPRND
4831 #undef FLD
4832 }
4833   NEXT (vpc);
4834
4835 CASE (sem, INSN_WRITE_MACWLO_A) : /* macwlo $src1,$src2,$acc */
4836   {
4837     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4838     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4839 #define FLD(f) abuf->fields.sfmt_machi_a.f
4840 #define OPRND(f) par_exec->operands.sfmt_machi_a.f
4841     int UNUSED written = abuf->written;
4842     IADDR UNUSED pc = abuf->addr;
4843     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4844
4845   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4846
4847 #undef OPRND
4848 #undef FLD
4849   }
4850   NEXT (vpc);
4851
4852   CASE (sem, INSN_PAR_MUL) : /* mul $dr,$sr */
4853 {
4854   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4855   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4856 #define FLD(f) abuf->fields.sfmt_add.f
4857 #define OPRND(f) par_exec->operands.sfmt_add.f
4858   int UNUSED written = 0;
4859   IADDR UNUSED pc = abuf->addr;
4860   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4861
4862   {
4863     SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
4864     OPRND (dr) = opval;
4865     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
4866   }
4867
4868 #undef OPRND
4869 #undef FLD
4870 }
4871   NEXT (vpc);
4872
4873 CASE (sem, INSN_WRITE_MUL) : /* mul $dr,$sr */
4874   {
4875     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4876     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4877 #define FLD(f) abuf->fields.sfmt_add.f
4878 #define OPRND(f) par_exec->operands.sfmt_add.f
4879     int UNUSED written = abuf->written;
4880     IADDR UNUSED pc = abuf->addr;
4881     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4882
4883   * FLD (i_dr) = OPRND (dr);
4884
4885 #undef OPRND
4886 #undef FLD
4887   }
4888   NEXT (vpc);
4889
4890   CASE (sem, INSN_PAR_MULHI_A) : /* mulhi $src1,$src2,$acc */
4891 {
4892   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4893   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4894 #define FLD(f) abuf->fields.sfmt_machi_a.f
4895 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4896   int UNUSED written = 0;
4897   IADDR UNUSED pc = abuf->addr;
4898   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4899
4900   {
4901     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
4902     OPRND (acc) = opval;
4903     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4904   }
4905
4906 #undef OPRND
4907 #undef FLD
4908 }
4909   NEXT (vpc);
4910
4911 CASE (sem, INSN_WRITE_MULHI_A) : /* mulhi $src1,$src2,$acc */
4912   {
4913     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4914     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4915 #define FLD(f) abuf->fields.sfmt_machi_a.f
4916 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4917     int UNUSED written = abuf->written;
4918     IADDR UNUSED pc = abuf->addr;
4919     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4920
4921   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4922
4923 #undef OPRND
4924 #undef FLD
4925   }
4926   NEXT (vpc);
4927
4928   CASE (sem, INSN_PAR_MULLO_A) : /* mullo $src1,$src2,$acc */
4929 {
4930   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4931   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4932 #define FLD(f) abuf->fields.sfmt_machi_a.f
4933 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4934   int UNUSED written = 0;
4935   IADDR UNUSED pc = abuf->addr;
4936   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4937
4938   {
4939     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
4940     OPRND (acc) = opval;
4941     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4942   }
4943
4944 #undef OPRND
4945 #undef FLD
4946 }
4947   NEXT (vpc);
4948
4949 CASE (sem, INSN_WRITE_MULLO_A) : /* mullo $src1,$src2,$acc */
4950   {
4951     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4952     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4953 #define FLD(f) abuf->fields.sfmt_machi_a.f
4954 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4955     int UNUSED written = abuf->written;
4956     IADDR UNUSED pc = abuf->addr;
4957     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4958
4959   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4960
4961 #undef OPRND
4962 #undef FLD
4963   }
4964   NEXT (vpc);
4965
4966   CASE (sem, INSN_PAR_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4967 {
4968   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4969   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
4970 #define FLD(f) abuf->fields.sfmt_machi_a.f
4971 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4972   int UNUSED written = 0;
4973   IADDR UNUSED pc = abuf->addr;
4974   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
4975
4976   {
4977     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))));
4978     OPRND (acc) = opval;
4979     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
4980   }
4981
4982 #undef OPRND
4983 #undef FLD
4984 }
4985   NEXT (vpc);
4986
4987 CASE (sem, INSN_WRITE_MULWHI_A) : /* mulwhi $src1,$src2,$acc */
4988   {
4989     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
4990     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
4991 #define FLD(f) abuf->fields.sfmt_machi_a.f
4992 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
4993     int UNUSED written = abuf->written;
4994     IADDR UNUSED pc = abuf->addr;
4995     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
4996
4997   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
4998
4999 #undef OPRND
5000 #undef FLD
5001   }
5002   NEXT (vpc);
5003
5004   CASE (sem, INSN_PAR_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
5005 {
5006   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5007   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5008 #define FLD(f) abuf->fields.sfmt_machi_a.f
5009 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
5010   int UNUSED written = 0;
5011   IADDR UNUSED pc = abuf->addr;
5012   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5013
5014   {
5015     DI opval = MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))));
5016     OPRND (acc) = opval;
5017     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5018   }
5019
5020 #undef OPRND
5021 #undef FLD
5022 }
5023   NEXT (vpc);
5024
5025 CASE (sem, INSN_WRITE_MULWLO_A) : /* mulwlo $src1,$src2,$acc */
5026   {
5027     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5028     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5029 #define FLD(f) abuf->fields.sfmt_machi_a.f
5030 #define OPRND(f) par_exec->operands.sfmt_mulhi_a.f
5031     int UNUSED written = abuf->written;
5032     IADDR UNUSED pc = abuf->addr;
5033     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5034
5035   SET_H_ACCUMS (FLD (f_acc), OPRND (acc));
5036
5037 #undef OPRND
5038 #undef FLD
5039   }
5040   NEXT (vpc);
5041
5042   CASE (sem, INSN_PAR_MV) : /* mv $dr,$sr */
5043 {
5044   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5045   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5046 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5047 #define OPRND(f) par_exec->operands.sfmt_mv.f
5048   int UNUSED written = 0;
5049   IADDR UNUSED pc = abuf->addr;
5050   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5051
5052   {
5053     SI opval = * FLD (i_sr);
5054     OPRND (dr) = opval;
5055     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5056   }
5057
5058 #undef OPRND
5059 #undef FLD
5060 }
5061   NEXT (vpc);
5062
5063 CASE (sem, INSN_WRITE_MV) : /* mv $dr,$sr */
5064   {
5065     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5066     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5067 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5068 #define OPRND(f) par_exec->operands.sfmt_mv.f
5069     int UNUSED written = abuf->written;
5070     IADDR UNUSED pc = abuf->addr;
5071     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5072
5073   * FLD (i_dr) = OPRND (dr);
5074
5075 #undef OPRND
5076 #undef FLD
5077   }
5078   NEXT (vpc);
5079
5080   CASE (sem, INSN_PAR_MVFACHI_A) : /* mvfachi $dr,$accs */
5081 {
5082   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5083   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5084 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5085 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5086   int UNUSED written = 0;
5087   IADDR UNUSED pc = abuf->addr;
5088   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5089
5090   {
5091     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 32));
5092     OPRND (dr) = opval;
5093     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5094   }
5095
5096 #undef OPRND
5097 #undef FLD
5098 }
5099   NEXT (vpc);
5100
5101 CASE (sem, INSN_WRITE_MVFACHI_A) : /* mvfachi $dr,$accs */
5102   {
5103     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5104     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5105 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5106 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5107     int UNUSED written = abuf->written;
5108     IADDR UNUSED pc = abuf->addr;
5109     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5110
5111   * FLD (i_dr) = OPRND (dr);
5112
5113 #undef OPRND
5114 #undef FLD
5115   }
5116   NEXT (vpc);
5117
5118   CASE (sem, INSN_PAR_MVFACLO_A) : /* mvfaclo $dr,$accs */
5119 {
5120   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5121   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5122 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5123 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5124   int UNUSED written = 0;
5125   IADDR UNUSED pc = abuf->addr;
5126   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5127
5128   {
5129     SI opval = TRUNCDISI (GET_H_ACCUMS (FLD (f_accs)));
5130     OPRND (dr) = opval;
5131     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5132   }
5133
5134 #undef OPRND
5135 #undef FLD
5136 }
5137   NEXT (vpc);
5138
5139 CASE (sem, INSN_WRITE_MVFACLO_A) : /* mvfaclo $dr,$accs */
5140   {
5141     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5142     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5143 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5144 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5145     int UNUSED written = abuf->written;
5146     IADDR UNUSED pc = abuf->addr;
5147     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5148
5149   * FLD (i_dr) = OPRND (dr);
5150
5151 #undef OPRND
5152 #undef FLD
5153   }
5154   NEXT (vpc);
5155
5156   CASE (sem, INSN_PAR_MVFACMI_A) : /* mvfacmi $dr,$accs */
5157 {
5158   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5159   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5160 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5161 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5162   int UNUSED written = 0;
5163   IADDR UNUSED pc = abuf->addr;
5164   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5165
5166   {
5167     SI opval = TRUNCDISI (SRADI (GET_H_ACCUMS (FLD (f_accs)), 16));
5168     OPRND (dr) = opval;
5169     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5170   }
5171
5172 #undef OPRND
5173 #undef FLD
5174 }
5175   NEXT (vpc);
5176
5177 CASE (sem, INSN_WRITE_MVFACMI_A) : /* mvfacmi $dr,$accs */
5178   {
5179     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5180     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5181 #define FLD(f) abuf->fields.sfmt_mvfachi_a.f
5182 #define OPRND(f) par_exec->operands.sfmt_mvfachi_a.f
5183     int UNUSED written = abuf->written;
5184     IADDR UNUSED pc = abuf->addr;
5185     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5186
5187   * FLD (i_dr) = OPRND (dr);
5188
5189 #undef OPRND
5190 #undef FLD
5191   }
5192   NEXT (vpc);
5193
5194   CASE (sem, INSN_PAR_MVFC) : /* mvfc $dr,$scr */
5195 {
5196   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5197   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5198 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5199 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5200   int UNUSED written = 0;
5201   IADDR UNUSED pc = abuf->addr;
5202   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5203
5204   {
5205     SI opval = GET_H_CR (FLD (f_r2));
5206     OPRND (dr) = opval;
5207     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5208   }
5209
5210 #undef OPRND
5211 #undef FLD
5212 }
5213   NEXT (vpc);
5214
5215 CASE (sem, INSN_WRITE_MVFC) : /* mvfc $dr,$scr */
5216   {
5217     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5218     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5219 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5220 #define OPRND(f) par_exec->operands.sfmt_mvfc.f
5221     int UNUSED written = abuf->written;
5222     IADDR UNUSED pc = abuf->addr;
5223     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5224
5225   * FLD (i_dr) = OPRND (dr);
5226
5227 #undef OPRND
5228 #undef FLD
5229   }
5230   NEXT (vpc);
5231
5232   CASE (sem, INSN_PAR_MVTACHI_A) : /* mvtachi $src1,$accs */
5233 {
5234   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5235   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5236 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5237 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5238   int UNUSED written = 0;
5239   IADDR UNUSED pc = abuf->addr;
5240   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5241
5242   {
5243     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
5244     OPRND (accs) = opval;
5245     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5246   }
5247
5248 #undef OPRND
5249 #undef FLD
5250 }
5251   NEXT (vpc);
5252
5253 CASE (sem, INSN_WRITE_MVTACHI_A) : /* mvtachi $src1,$accs */
5254   {
5255     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5256     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5257 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5258 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5259     int UNUSED written = abuf->written;
5260     IADDR UNUSED pc = abuf->addr;
5261     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5262
5263   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5264
5265 #undef OPRND
5266 #undef FLD
5267   }
5268   NEXT (vpc);
5269
5270   CASE (sem, INSN_PAR_MVTACLO_A) : /* mvtaclo $src1,$accs */
5271 {
5272   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5273   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5274 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5275 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5276   int UNUSED written = 0;
5277   IADDR UNUSED pc = abuf->addr;
5278   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5279
5280   {
5281     DI opval = ORDI (ANDDI (GET_H_ACCUMS (FLD (f_accs)), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
5282     OPRND (accs) = opval;
5283     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5284   }
5285
5286 #undef OPRND
5287 #undef FLD
5288 }
5289   NEXT (vpc);
5290
5291 CASE (sem, INSN_WRITE_MVTACLO_A) : /* mvtaclo $src1,$accs */
5292   {
5293     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5294     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5295 #define FLD(f) abuf->fields.sfmt_mvtachi_a.f
5296 #define OPRND(f) par_exec->operands.sfmt_mvtachi_a.f
5297     int UNUSED written = abuf->written;
5298     IADDR UNUSED pc = abuf->addr;
5299     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5300
5301   SET_H_ACCUMS (FLD (f_accs), OPRND (accs));
5302
5303 #undef OPRND
5304 #undef FLD
5305   }
5306   NEXT (vpc);
5307
5308   CASE (sem, INSN_PAR_MVTC) : /* mvtc $sr,$dcr */
5309 {
5310   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5311   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5312 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5313 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5314   int UNUSED written = 0;
5315   IADDR UNUSED pc = abuf->addr;
5316   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5317
5318   {
5319     USI opval = * FLD (i_sr);
5320     OPRND (dcr) = opval;
5321     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5322   }
5323
5324 #undef OPRND
5325 #undef FLD
5326 }
5327   NEXT (vpc);
5328
5329 CASE (sem, INSN_WRITE_MVTC) : /* mvtc $sr,$dcr */
5330   {
5331     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5332     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5333 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5334 #define OPRND(f) par_exec->operands.sfmt_mvtc.f
5335     int UNUSED written = abuf->written;
5336     IADDR UNUSED pc = abuf->addr;
5337     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5338
5339   SET_H_CR (FLD (f_r1), OPRND (dcr));
5340
5341 #undef OPRND
5342 #undef FLD
5343   }
5344   NEXT (vpc);
5345
5346   CASE (sem, INSN_PAR_NEG) : /* neg $dr,$sr */
5347 {
5348   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5349   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5350 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5351 #define OPRND(f) par_exec->operands.sfmt_mv.f
5352   int UNUSED written = 0;
5353   IADDR UNUSED pc = abuf->addr;
5354   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5355
5356   {
5357     SI opval = NEGSI (* FLD (i_sr));
5358     OPRND (dr) = opval;
5359     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5360   }
5361
5362 #undef OPRND
5363 #undef FLD
5364 }
5365   NEXT (vpc);
5366
5367 CASE (sem, INSN_WRITE_NEG) : /* neg $dr,$sr */
5368   {
5369     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5370     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5371 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5372 #define OPRND(f) par_exec->operands.sfmt_mv.f
5373     int UNUSED written = abuf->written;
5374     IADDR UNUSED pc = abuf->addr;
5375     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5376
5377   * FLD (i_dr) = OPRND (dr);
5378
5379 #undef OPRND
5380 #undef FLD
5381   }
5382   NEXT (vpc);
5383
5384   CASE (sem, INSN_PAR_NOP) : /* nop */
5385 {
5386   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5387   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5388 #define FLD(f) abuf->fields.fmt_empty.f
5389 #define OPRND(f) par_exec->operands.sfmt_nop.f
5390   int UNUSED written = 0;
5391   IADDR UNUSED pc = abuf->addr;
5392   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5393
5394 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
5395
5396 #undef OPRND
5397 #undef FLD
5398 }
5399   NEXT (vpc);
5400
5401 CASE (sem, INSN_WRITE_NOP) : /* nop */
5402   {
5403     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5404     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5405 #define FLD(f) abuf->fields.fmt_empty.f
5406 #define OPRND(f) par_exec->operands.sfmt_nop.f
5407     int UNUSED written = abuf->written;
5408     IADDR UNUSED pc = abuf->addr;
5409     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5410
5411
5412 #undef OPRND
5413 #undef FLD
5414   }
5415   NEXT (vpc);
5416
5417   CASE (sem, INSN_PAR_NOT) : /* not $dr,$sr */
5418 {
5419   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5420   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5421 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5422 #define OPRND(f) par_exec->operands.sfmt_mv.f
5423   int UNUSED written = 0;
5424   IADDR UNUSED pc = abuf->addr;
5425   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5426
5427   {
5428     SI opval = INVSI (* FLD (i_sr));
5429     OPRND (dr) = opval;
5430     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5431   }
5432
5433 #undef OPRND
5434 #undef FLD
5435 }
5436   NEXT (vpc);
5437
5438 CASE (sem, INSN_WRITE_NOT) : /* not $dr,$sr */
5439   {
5440     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5441     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5442 #define FLD(f) abuf->fields.sfmt_ld_plus.f
5443 #define OPRND(f) par_exec->operands.sfmt_mv.f
5444     int UNUSED written = abuf->written;
5445     IADDR UNUSED pc = abuf->addr;
5446     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5447
5448   * FLD (i_dr) = OPRND (dr);
5449
5450 #undef OPRND
5451 #undef FLD
5452   }
5453   NEXT (vpc);
5454
5455   CASE (sem, INSN_PAR_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5456 {
5457   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5458   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5459 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5460 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5461   int UNUSED written = 0;
5462   IADDR UNUSED pc = abuf->addr;
5463   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5464
5465 {
5466   DI tmp_tmp1;
5467   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5468   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
5469   {
5470     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
5471     OPRND (accd) = opval;
5472     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5473   }
5474 }
5475
5476 #undef OPRND
5477 #undef FLD
5478 }
5479   NEXT (vpc);
5480
5481 CASE (sem, INSN_WRITE_RAC_DSI) : /* rac $accd,$accs,$imm1 */
5482   {
5483     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5484     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5485 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5486 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5487     int UNUSED written = abuf->written;
5488     IADDR UNUSED pc = abuf->addr;
5489     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5490
5491   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5492
5493 #undef OPRND
5494 #undef FLD
5495   }
5496   NEXT (vpc);
5497
5498   CASE (sem, INSN_PAR_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5499 {
5500   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5501   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5502 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5503 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5504   int UNUSED written = 0;
5505   IADDR UNUSED pc = abuf->addr;
5506   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5507
5508 {
5509   DI tmp_tmp1;
5510   tmp_tmp1 = SLLDI (GET_H_ACCUMS (FLD (f_accs)), FLD (f_imm1));
5511   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
5512   {
5513     DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0)));
5514     OPRND (accd) = opval;
5515     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
5516   }
5517 }
5518
5519 #undef OPRND
5520 #undef FLD
5521 }
5522   NEXT (vpc);
5523
5524 CASE (sem, INSN_WRITE_RACH_DSI) : /* rach $accd,$accs,$imm1 */
5525   {
5526     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5527     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5528 #define FLD(f) abuf->fields.sfmt_rac_dsi.f
5529 #define OPRND(f) par_exec->operands.sfmt_rac_dsi.f
5530     int UNUSED written = abuf->written;
5531     IADDR UNUSED pc = abuf->addr;
5532     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5533
5534   SET_H_ACCUMS (FLD (f_accd), OPRND (accd));
5535
5536 #undef OPRND
5537 #undef FLD
5538   }
5539   NEXT (vpc);
5540
5541   CASE (sem, INSN_PAR_RTE) : /* rte */
5542 {
5543   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5544   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5545 #define FLD(f) abuf->fields.fmt_empty.f
5546 #define OPRND(f) par_exec->operands.sfmt_rte.f
5547   int UNUSED written = 0;
5548   IADDR UNUSED pc = abuf->addr;
5549   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5550
5551 {
5552   {
5553     USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
5554     OPRND (pc) = opval;
5555     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
5556   }
5557   {
5558     USI opval = GET_H_CR (((UINT) 14));
5559     OPRND (h_cr_USI_6) = opval;
5560     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
5561   }
5562   {
5563     UQI opval = CPU (h_bpsw);
5564     OPRND (h_psw_UQI) = opval;
5565     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
5566   }
5567   {
5568     UQI opval = CPU (h_bbpsw);
5569     OPRND (h_bpsw_UQI) = opval;
5570     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
5571   }
5572 }
5573
5574 #undef OPRND
5575 #undef FLD
5576 }
5577   NEXT (vpc);
5578
5579 CASE (sem, INSN_WRITE_RTE) : /* rte */
5580   {
5581     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5582     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5583 #define FLD(f) abuf->fields.fmt_empty.f
5584 #define OPRND(f) par_exec->operands.sfmt_rte.f
5585     int UNUSED written = abuf->written;
5586     IADDR UNUSED pc = abuf->addr;
5587     SEM_BRANCH_INIT
5588     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5589
5590   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
5591   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
5592   SET_H_PSW (OPRND (h_psw_UQI));
5593   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
5594
5595   SEM_BRANCH_FINI (vpc);
5596 #undef OPRND
5597 #undef FLD
5598   }
5599   NEXT (vpc);
5600
5601   CASE (sem, INSN_PAR_SLL) : /* sll $dr,$sr */
5602 {
5603   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5604   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5605 #define FLD(f) abuf->fields.sfmt_add.f
5606 #define OPRND(f) par_exec->operands.sfmt_add.f
5607   int UNUSED written = 0;
5608   IADDR UNUSED pc = abuf->addr;
5609   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5610
5611   {
5612     SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5613     OPRND (dr) = opval;
5614     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5615   }
5616
5617 #undef OPRND
5618 #undef FLD
5619 }
5620   NEXT (vpc);
5621
5622 CASE (sem, INSN_WRITE_SLL) : /* sll $dr,$sr */
5623   {
5624     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5625     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5626 #define FLD(f) abuf->fields.sfmt_add.f
5627 #define OPRND(f) par_exec->operands.sfmt_add.f
5628     int UNUSED written = abuf->written;
5629     IADDR UNUSED pc = abuf->addr;
5630     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5631
5632   * FLD (i_dr) = OPRND (dr);
5633
5634 #undef OPRND
5635 #undef FLD
5636   }
5637   NEXT (vpc);
5638
5639   CASE (sem, INSN_PAR_SLLI) : /* slli $dr,$uimm5 */
5640 {
5641   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5642   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5643 #define FLD(f) abuf->fields.sfmt_slli.f
5644 #define OPRND(f) par_exec->operands.sfmt_slli.f
5645   int UNUSED written = 0;
5646   IADDR UNUSED pc = abuf->addr;
5647   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5648
5649   {
5650     SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
5651     OPRND (dr) = opval;
5652     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5653   }
5654
5655 #undef OPRND
5656 #undef FLD
5657 }
5658   NEXT (vpc);
5659
5660 CASE (sem, INSN_WRITE_SLLI) : /* slli $dr,$uimm5 */
5661   {
5662     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5663     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5664 #define FLD(f) abuf->fields.sfmt_slli.f
5665 #define OPRND(f) par_exec->operands.sfmt_slli.f
5666     int UNUSED written = abuf->written;
5667     IADDR UNUSED pc = abuf->addr;
5668     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5669
5670   * FLD (i_dr) = OPRND (dr);
5671
5672 #undef OPRND
5673 #undef FLD
5674   }
5675   NEXT (vpc);
5676
5677   CASE (sem, INSN_PAR_SRA) : /* sra $dr,$sr */
5678 {
5679   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5680   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5681 #define FLD(f) abuf->fields.sfmt_add.f
5682 #define OPRND(f) par_exec->operands.sfmt_add.f
5683   int UNUSED written = 0;
5684   IADDR UNUSED pc = abuf->addr;
5685   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5686
5687   {
5688     SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5689     OPRND (dr) = opval;
5690     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5691   }
5692
5693 #undef OPRND
5694 #undef FLD
5695 }
5696   NEXT (vpc);
5697
5698 CASE (sem, INSN_WRITE_SRA) : /* sra $dr,$sr */
5699   {
5700     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5701     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5702 #define FLD(f) abuf->fields.sfmt_add.f
5703 #define OPRND(f) par_exec->operands.sfmt_add.f
5704     int UNUSED written = abuf->written;
5705     IADDR UNUSED pc = abuf->addr;
5706     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5707
5708   * FLD (i_dr) = OPRND (dr);
5709
5710 #undef OPRND
5711 #undef FLD
5712   }
5713   NEXT (vpc);
5714
5715   CASE (sem, INSN_PAR_SRAI) : /* srai $dr,$uimm5 */
5716 {
5717   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5718   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5719 #define FLD(f) abuf->fields.sfmt_slli.f
5720 #define OPRND(f) par_exec->operands.sfmt_slli.f
5721   int UNUSED written = 0;
5722   IADDR UNUSED pc = abuf->addr;
5723   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5724
5725   {
5726     SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
5727     OPRND (dr) = opval;
5728     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5729   }
5730
5731 #undef OPRND
5732 #undef FLD
5733 }
5734   NEXT (vpc);
5735
5736 CASE (sem, INSN_WRITE_SRAI) : /* srai $dr,$uimm5 */
5737   {
5738     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5739     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5740 #define FLD(f) abuf->fields.sfmt_slli.f
5741 #define OPRND(f) par_exec->operands.sfmt_slli.f
5742     int UNUSED written = abuf->written;
5743     IADDR UNUSED pc = abuf->addr;
5744     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5745
5746   * FLD (i_dr) = OPRND (dr);
5747
5748 #undef OPRND
5749 #undef FLD
5750   }
5751   NEXT (vpc);
5752
5753   CASE (sem, INSN_PAR_SRL) : /* srl $dr,$sr */
5754 {
5755   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5756   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5757 #define FLD(f) abuf->fields.sfmt_add.f
5758 #define OPRND(f) par_exec->operands.sfmt_add.f
5759   int UNUSED written = 0;
5760   IADDR UNUSED pc = abuf->addr;
5761   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5762
5763   {
5764     SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
5765     OPRND (dr) = opval;
5766     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5767   }
5768
5769 #undef OPRND
5770 #undef FLD
5771 }
5772   NEXT (vpc);
5773
5774 CASE (sem, INSN_WRITE_SRL) : /* srl $dr,$sr */
5775   {
5776     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5777     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5778 #define FLD(f) abuf->fields.sfmt_add.f
5779 #define OPRND(f) par_exec->operands.sfmt_add.f
5780     int UNUSED written = abuf->written;
5781     IADDR UNUSED pc = abuf->addr;
5782     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5783
5784   * FLD (i_dr) = OPRND (dr);
5785
5786 #undef OPRND
5787 #undef FLD
5788   }
5789   NEXT (vpc);
5790
5791   CASE (sem, INSN_PAR_SRLI) : /* srli $dr,$uimm5 */
5792 {
5793   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5794   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5795 #define FLD(f) abuf->fields.sfmt_slli.f
5796 #define OPRND(f) par_exec->operands.sfmt_slli.f
5797   int UNUSED written = 0;
5798   IADDR UNUSED pc = abuf->addr;
5799   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5800
5801   {
5802     SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
5803     OPRND (dr) = opval;
5804     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5805   }
5806
5807 #undef OPRND
5808 #undef FLD
5809 }
5810   NEXT (vpc);
5811
5812 CASE (sem, INSN_WRITE_SRLI) : /* srli $dr,$uimm5 */
5813   {
5814     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5815     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5816 #define FLD(f) abuf->fields.sfmt_slli.f
5817 #define OPRND(f) par_exec->operands.sfmt_slli.f
5818     int UNUSED written = abuf->written;
5819     IADDR UNUSED pc = abuf->addr;
5820     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5821
5822   * FLD (i_dr) = OPRND (dr);
5823
5824 #undef OPRND
5825 #undef FLD
5826   }
5827   NEXT (vpc);
5828
5829   CASE (sem, INSN_PAR_ST) : /* st $src1,@$src2 */
5830 {
5831   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5832   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5833 #define FLD(f) abuf->fields.sfmt_st_plus.f
5834 #define OPRND(f) par_exec->operands.sfmt_st.f
5835   int UNUSED written = 0;
5836   IADDR UNUSED pc = abuf->addr;
5837   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5838
5839   {
5840     SI opval = * FLD (i_src1);
5841     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
5842     OPRND (h_memory_SI_src2) = opval;
5843     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5844   }
5845
5846 #undef OPRND
5847 #undef FLD
5848 }
5849   NEXT (vpc);
5850
5851 CASE (sem, INSN_WRITE_ST) : /* st $src1,@$src2 */
5852   {
5853     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5854     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5855 #define FLD(f) abuf->fields.sfmt_st_plus.f
5856 #define OPRND(f) par_exec->operands.sfmt_st.f
5857     int UNUSED written = abuf->written;
5858     IADDR UNUSED pc = abuf->addr;
5859     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5860
5861   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
5862
5863 #undef OPRND
5864 #undef FLD
5865   }
5866   NEXT (vpc);
5867
5868   CASE (sem, INSN_PAR_STB) : /* stb $src1,@$src2 */
5869 {
5870   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5871   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5872 #define FLD(f) abuf->fields.sfmt_st_plus.f
5873 #define OPRND(f) par_exec->operands.sfmt_stb.f
5874   int UNUSED written = 0;
5875   IADDR UNUSED pc = abuf->addr;
5876   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5877
5878   {
5879     QI opval = * FLD (i_src1);
5880     OPRND (h_memory_QI_src2_idx) = * FLD (i_src2);
5881     OPRND (h_memory_QI_src2) = opval;
5882     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5883   }
5884
5885 #undef OPRND
5886 #undef FLD
5887 }
5888   NEXT (vpc);
5889
5890 CASE (sem, INSN_WRITE_STB) : /* stb $src1,@$src2 */
5891   {
5892     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5893     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5894 #define FLD(f) abuf->fields.sfmt_st_plus.f
5895 #define OPRND(f) par_exec->operands.sfmt_stb.f
5896     int UNUSED written = abuf->written;
5897     IADDR UNUSED pc = abuf->addr;
5898     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5899
5900   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_src2_idx), OPRND (h_memory_QI_src2));
5901
5902 #undef OPRND
5903 #undef FLD
5904   }
5905   NEXT (vpc);
5906
5907   CASE (sem, INSN_PAR_STH) : /* sth $src1,@$src2 */
5908 {
5909   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5910   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5911 #define FLD(f) abuf->fields.sfmt_st_plus.f
5912 #define OPRND(f) par_exec->operands.sfmt_sth.f
5913   int UNUSED written = 0;
5914   IADDR UNUSED pc = abuf->addr;
5915   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5916
5917   {
5918     HI opval = * FLD (i_src1);
5919     OPRND (h_memory_HI_src2_idx) = * FLD (i_src2);
5920     OPRND (h_memory_HI_src2) = opval;
5921     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5922   }
5923
5924 #undef OPRND
5925 #undef FLD
5926 }
5927   NEXT (vpc);
5928
5929 CASE (sem, INSN_WRITE_STH) : /* sth $src1,@$src2 */
5930   {
5931     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5932     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5933 #define FLD(f) abuf->fields.sfmt_st_plus.f
5934 #define OPRND(f) par_exec->operands.sfmt_sth.f
5935     int UNUSED written = abuf->written;
5936     IADDR UNUSED pc = abuf->addr;
5937     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5938
5939   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_src2_idx), OPRND (h_memory_HI_src2));
5940
5941 #undef OPRND
5942 #undef FLD
5943   }
5944   NEXT (vpc);
5945
5946   CASE (sem, INSN_PAR_ST_PLUS) : /* st $src1,@+$src2 */
5947 {
5948   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5949   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5950 #define FLD(f) abuf->fields.sfmt_st_plus.f
5951 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5952   int UNUSED written = 0;
5953   IADDR UNUSED pc = abuf->addr;
5954   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
5955
5956 {
5957   SI tmp_new_src2;
5958   tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
5959   {
5960     SI opval = * FLD (i_src1);
5961     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
5962     OPRND (h_memory_SI_new_src2) = opval;
5963     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
5964   }
5965   {
5966     SI opval = tmp_new_src2;
5967     OPRND (src2) = opval;
5968     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
5969   }
5970 }
5971
5972 #undef OPRND
5973 #undef FLD
5974 }
5975   NEXT (vpc);
5976
5977 CASE (sem, INSN_WRITE_ST_PLUS) : /* st $src1,@+$src2 */
5978   {
5979     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5980     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
5981 #define FLD(f) abuf->fields.sfmt_st_plus.f
5982 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
5983     int UNUSED written = abuf->written;
5984     IADDR UNUSED pc = abuf->addr;
5985     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
5986
5987   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
5988   * FLD (i_src2) = OPRND (src2);
5989
5990 #undef OPRND
5991 #undef FLD
5992   }
5993   NEXT (vpc);
5994
5995   CASE (sem, INSN_PAR_STH_PLUS) : /* sth $src1,@$src2+ */
5996 {
5997   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
5998   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
5999 #define FLD(f) abuf->fields.sfmt_st_plus.f
6000 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
6001   int UNUSED written = 0;
6002   IADDR UNUSED pc = abuf->addr;
6003   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6004
6005 {
6006   SI tmp_new_src2;
6007   tmp_new_src2 = * FLD (i_src2);
6008   {
6009     HI opval = * FLD (i_src1);
6010     OPRND (h_memory_HI_new_src2_idx) = tmp_new_src2;
6011     OPRND (h_memory_HI_new_src2) = opval;
6012     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6013   }
6014   {
6015     SI opval = ADDSI (tmp_new_src2, 2);
6016     OPRND (src2) = opval;
6017     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6018   }
6019 }
6020
6021 #undef OPRND
6022 #undef FLD
6023 }
6024   NEXT (vpc);
6025
6026 CASE (sem, INSN_WRITE_STH_PLUS) : /* sth $src1,@$src2+ */
6027   {
6028     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6029     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6030 #define FLD(f) abuf->fields.sfmt_st_plus.f
6031 #define OPRND(f) par_exec->operands.sfmt_sth_plus.f
6032     int UNUSED written = abuf->written;
6033     IADDR UNUSED pc = abuf->addr;
6034     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6035
6036   SETMEMHI (current_cpu, pc, OPRND (h_memory_HI_new_src2_idx), OPRND (h_memory_HI_new_src2));
6037   * FLD (i_src2) = OPRND (src2);
6038
6039 #undef OPRND
6040 #undef FLD
6041   }
6042   NEXT (vpc);
6043
6044   CASE (sem, INSN_PAR_STB_PLUS) : /* stb $src1,@$src2+ */
6045 {
6046   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6047   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6048 #define FLD(f) abuf->fields.sfmt_st_plus.f
6049 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
6050   int UNUSED written = 0;
6051   IADDR UNUSED pc = abuf->addr;
6052   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6053
6054 {
6055   SI tmp_new_src2;
6056   tmp_new_src2 = * FLD (i_src2);
6057   {
6058     QI opval = * FLD (i_src1);
6059     OPRND (h_memory_QI_new_src2_idx) = tmp_new_src2;
6060     OPRND (h_memory_QI_new_src2) = opval;
6061     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6062   }
6063   {
6064     SI opval = ADDSI (tmp_new_src2, 1);
6065     OPRND (src2) = opval;
6066     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6067   }
6068 }
6069
6070 #undef OPRND
6071 #undef FLD
6072 }
6073   NEXT (vpc);
6074
6075 CASE (sem, INSN_WRITE_STB_PLUS) : /* stb $src1,@$src2+ */
6076   {
6077     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6078     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6079 #define FLD(f) abuf->fields.sfmt_st_plus.f
6080 #define OPRND(f) par_exec->operands.sfmt_stb_plus.f
6081     int UNUSED written = abuf->written;
6082     IADDR UNUSED pc = abuf->addr;
6083     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6084
6085   SETMEMQI (current_cpu, pc, OPRND (h_memory_QI_new_src2_idx), OPRND (h_memory_QI_new_src2));
6086   * FLD (i_src2) = OPRND (src2);
6087
6088 #undef OPRND
6089 #undef FLD
6090   }
6091   NEXT (vpc);
6092
6093   CASE (sem, INSN_PAR_ST_MINUS) : /* st $src1,@-$src2 */
6094 {
6095   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6096   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6097 #define FLD(f) abuf->fields.sfmt_st_plus.f
6098 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
6099   int UNUSED written = 0;
6100   IADDR UNUSED pc = abuf->addr;
6101   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6102
6103 {
6104   SI tmp_new_src2;
6105   tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
6106   {
6107     SI opval = * FLD (i_src1);
6108     OPRND (h_memory_SI_new_src2_idx) = tmp_new_src2;
6109     OPRND (h_memory_SI_new_src2) = opval;
6110     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6111   }
6112   {
6113     SI opval = tmp_new_src2;
6114     OPRND (src2) = opval;
6115     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6116   }
6117 }
6118
6119 #undef OPRND
6120 #undef FLD
6121 }
6122   NEXT (vpc);
6123
6124 CASE (sem, INSN_WRITE_ST_MINUS) : /* st $src1,@-$src2 */
6125   {
6126     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6127     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6128 #define FLD(f) abuf->fields.sfmt_st_plus.f
6129 #define OPRND(f) par_exec->operands.sfmt_st_plus.f
6130     int UNUSED written = abuf->written;
6131     IADDR UNUSED pc = abuf->addr;
6132     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6133
6134   SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_new_src2_idx), OPRND (h_memory_SI_new_src2));
6135   * FLD (i_src2) = OPRND (src2);
6136
6137 #undef OPRND
6138 #undef FLD
6139   }
6140   NEXT (vpc);
6141
6142   CASE (sem, INSN_PAR_SUB) : /* sub $dr,$sr */
6143 {
6144   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6145   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6146 #define FLD(f) abuf->fields.sfmt_add.f
6147 #define OPRND(f) par_exec->operands.sfmt_add.f
6148   int UNUSED written = 0;
6149   IADDR UNUSED pc = abuf->addr;
6150   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6151
6152   {
6153     SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
6154     OPRND (dr) = opval;
6155     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6156   }
6157
6158 #undef OPRND
6159 #undef FLD
6160 }
6161   NEXT (vpc);
6162
6163 CASE (sem, INSN_WRITE_SUB) : /* sub $dr,$sr */
6164   {
6165     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6166     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6167 #define FLD(f) abuf->fields.sfmt_add.f
6168 #define OPRND(f) par_exec->operands.sfmt_add.f
6169     int UNUSED written = abuf->written;
6170     IADDR UNUSED pc = abuf->addr;
6171     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6172
6173   * FLD (i_dr) = OPRND (dr);
6174
6175 #undef OPRND
6176 #undef FLD
6177   }
6178   NEXT (vpc);
6179
6180   CASE (sem, INSN_PAR_SUBV) : /* subv $dr,$sr */
6181 {
6182   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6183   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6184 #define FLD(f) abuf->fields.sfmt_add.f
6185 #define OPRND(f) par_exec->operands.sfmt_addv.f
6186   int UNUSED written = 0;
6187   IADDR UNUSED pc = abuf->addr;
6188   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6189
6190 {
6191   SI temp0;BI temp1;
6192   temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
6193   temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
6194   {
6195     SI opval = temp0;
6196     OPRND (dr) = opval;
6197     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6198   }
6199   {
6200     BI opval = temp1;
6201     OPRND (condbit) = opval;
6202     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6203   }
6204 }
6205
6206 #undef OPRND
6207 #undef FLD
6208 }
6209   NEXT (vpc);
6210
6211 CASE (sem, INSN_WRITE_SUBV) : /* subv $dr,$sr */
6212   {
6213     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6214     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6215 #define FLD(f) abuf->fields.sfmt_add.f
6216 #define OPRND(f) par_exec->operands.sfmt_addv.f
6217     int UNUSED written = abuf->written;
6218     IADDR UNUSED pc = abuf->addr;
6219     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6220
6221   CPU (h_cond) = OPRND (condbit);
6222   * FLD (i_dr) = OPRND (dr);
6223
6224 #undef OPRND
6225 #undef FLD
6226   }
6227   NEXT (vpc);
6228
6229   CASE (sem, INSN_PAR_SUBX) : /* subx $dr,$sr */
6230 {
6231   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6232   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6233 #define FLD(f) abuf->fields.sfmt_add.f
6234 #define OPRND(f) par_exec->operands.sfmt_addx.f
6235   int UNUSED written = 0;
6236   IADDR UNUSED pc = abuf->addr;
6237   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6238
6239 {
6240   SI temp0;BI temp1;
6241   temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6242   temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
6243   {
6244     SI opval = temp0;
6245     OPRND (dr) = opval;
6246     TRACE_RESULT (current_cpu, abuf, "gr", 'x', opval);
6247   }
6248   {
6249     BI opval = temp1;
6250     OPRND (condbit) = opval;
6251     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6252   }
6253 }
6254
6255 #undef OPRND
6256 #undef FLD
6257 }
6258   NEXT (vpc);
6259
6260 CASE (sem, INSN_WRITE_SUBX) : /* subx $dr,$sr */
6261   {
6262     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6263     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6264 #define FLD(f) abuf->fields.sfmt_add.f
6265 #define OPRND(f) par_exec->operands.sfmt_addx.f
6266     int UNUSED written = abuf->written;
6267     IADDR UNUSED pc = abuf->addr;
6268     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6269
6270   CPU (h_cond) = OPRND (condbit);
6271   * FLD (i_dr) = OPRND (dr);
6272
6273 #undef OPRND
6274 #undef FLD
6275   }
6276   NEXT (vpc);
6277
6278   CASE (sem, INSN_PAR_TRAP) : /* trap $uimm4 */
6279 {
6280   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6281   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6282 #define FLD(f) abuf->fields.sfmt_trap.f
6283 #define OPRND(f) par_exec->operands.sfmt_trap.f
6284   int UNUSED written = 0;
6285   IADDR UNUSED pc = abuf->addr;
6286   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6287
6288 {
6289   {
6290     USI opval = GET_H_CR (((UINT) 6));
6291     OPRND (h_cr_USI_14) = opval;
6292     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6293   }
6294   {
6295     USI opval = ADDSI (pc, 4);
6296     OPRND (h_cr_USI_6) = opval;
6297     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6298   }
6299   {
6300     UQI opval = CPU (h_bpsw);
6301     OPRND (h_bbpsw_UQI) = opval;
6302     TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
6303   }
6304   {
6305     UQI opval = GET_H_PSW ();
6306     OPRND (h_bpsw_UQI) = opval;
6307     TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
6308   }
6309   {
6310     UQI opval = ANDQI (GET_H_PSW (), 128);
6311     OPRND (h_psw_UQI) = opval;
6312     TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
6313   }
6314   {
6315     SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
6316     OPRND (pc) = opval;
6317     TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
6318   }
6319 }
6320
6321 #undef OPRND
6322 #undef FLD
6323 }
6324   NEXT (vpc);
6325
6326 CASE (sem, INSN_WRITE_TRAP) : /* trap $uimm4 */
6327   {
6328     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6329     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6330 #define FLD(f) abuf->fields.sfmt_trap.f
6331 #define OPRND(f) par_exec->operands.sfmt_trap.f
6332     int UNUSED written = abuf->written;
6333     IADDR UNUSED pc = abuf->addr;
6334     SEM_BRANCH_INIT
6335     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6336
6337   CPU (h_bbpsw) = OPRND (h_bbpsw_UQI);
6338   CPU (h_bpsw) = OPRND (h_bpsw_UQI);
6339   SET_H_CR (((UINT) 14), OPRND (h_cr_USI_14));
6340   SET_H_CR (((UINT) 6), OPRND (h_cr_USI_6));
6341   SET_H_PSW (OPRND (h_psw_UQI));
6342   SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, OPRND (pc), vpc);
6343
6344   SEM_BRANCH_FINI (vpc);
6345 #undef OPRND
6346 #undef FLD
6347   }
6348   NEXT (vpc);
6349
6350   CASE (sem, INSN_PAR_UNLOCK) : /* unlock $src1,@$src2 */
6351 {
6352   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6353   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6354 #define FLD(f) abuf->fields.sfmt_st_plus.f
6355 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6356   int UNUSED written = 0;
6357   IADDR UNUSED pc = abuf->addr;
6358   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6359
6360 {
6361 if (CPU (h_lock)) {
6362   {
6363     SI opval = * FLD (i_src1);
6364     OPRND (h_memory_SI_src2_idx) = * FLD (i_src2);
6365     OPRND (h_memory_SI_src2) = opval;
6366     written |= (1 << 4);
6367     TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
6368   }
6369 }
6370   {
6371     BI opval = 0;
6372     OPRND (h_lock_BI) = opval;
6373     TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
6374   }
6375 }
6376
6377   abuf->written = written;
6378 #undef OPRND
6379 #undef FLD
6380 }
6381   NEXT (vpc);
6382
6383 CASE (sem, INSN_WRITE_UNLOCK) : /* unlock $src1,@$src2 */
6384   {
6385     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6386     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6387 #define FLD(f) abuf->fields.sfmt_st_plus.f
6388 #define OPRND(f) par_exec->operands.sfmt_unlock.f
6389     int UNUSED written = abuf->written;
6390     IADDR UNUSED pc = abuf->addr;
6391     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6392
6393   CPU (h_lock) = OPRND (h_lock_BI);
6394   if (written & (1 << 4))
6395     {
6396       SETMEMSI (current_cpu, pc, OPRND (h_memory_SI_src2_idx), OPRND (h_memory_SI_src2));
6397     }
6398
6399 #undef OPRND
6400 #undef FLD
6401   }
6402   NEXT (vpc);
6403
6404   CASE (sem, INSN_PAR_PCMPBZ) : /* pcmpbz $src2 */
6405 {
6406   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6407   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6408 #define FLD(f) abuf->fields.sfmt_st_plus.f
6409 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6410   int UNUSED written = 0;
6411   IADDR UNUSED pc = abuf->addr;
6412   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6413
6414   {
6415     BI opval = (EQSI (ANDSI (* FLD (i_src2), 255), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 65280), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (* FLD (i_src2), 0xff000000), 0)) ? (1) : (0);
6416     OPRND (condbit) = opval;
6417     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6418   }
6419
6420 #undef OPRND
6421 #undef FLD
6422 }
6423   NEXT (vpc);
6424
6425 CASE (sem, INSN_WRITE_PCMPBZ) : /* pcmpbz $src2 */
6426   {
6427     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6428     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6429 #define FLD(f) abuf->fields.sfmt_st_plus.f
6430 #define OPRND(f) par_exec->operands.sfmt_cmpz.f
6431     int UNUSED written = abuf->written;
6432     IADDR UNUSED pc = abuf->addr;
6433     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6434
6435   CPU (h_cond) = OPRND (condbit);
6436
6437 #undef OPRND
6438 #undef FLD
6439   }
6440   NEXT (vpc);
6441
6442   CASE (sem, INSN_PAR_SADD) : /* sadd */
6443 {
6444   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6445   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6446 #define FLD(f) abuf->fields.fmt_empty.f
6447 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6448   int UNUSED written = 0;
6449   IADDR UNUSED pc = abuf->addr;
6450   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6451
6452   {
6453     DI opval = ADDDI (SRADI (GET_H_ACCUMS (((UINT) 1)), 16), GET_H_ACCUMS (((UINT) 0)));
6454     OPRND (h_accums_DI_0) = opval;
6455     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6456   }
6457
6458 #undef OPRND
6459 #undef FLD
6460 }
6461   NEXT (vpc);
6462
6463 CASE (sem, INSN_WRITE_SADD) : /* sadd */
6464   {
6465     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6466     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6467 #define FLD(f) abuf->fields.fmt_empty.f
6468 #define OPRND(f) par_exec->operands.sfmt_sadd.f
6469     int UNUSED written = abuf->written;
6470     IADDR UNUSED pc = abuf->addr;
6471     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6472
6473   SET_H_ACCUMS (((UINT) 0), OPRND (h_accums_DI_0));
6474
6475 #undef OPRND
6476 #undef FLD
6477   }
6478   NEXT (vpc);
6479
6480   CASE (sem, INSN_PAR_MACWU1) : /* macwu1 $src1,$src2 */
6481 {
6482   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6483   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6484 #define FLD(f) abuf->fields.sfmt_st_plus.f
6485 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6486   int UNUSED written = 0;
6487   IADDR UNUSED pc = abuf->addr;
6488   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6489
6490   {
6491     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535)))), 8), 8);
6492     OPRND (h_accums_DI_1) = opval;
6493     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6494   }
6495
6496 #undef OPRND
6497 #undef FLD
6498 }
6499   NEXT (vpc);
6500
6501 CASE (sem, INSN_WRITE_MACWU1) : /* macwu1 $src1,$src2 */
6502   {
6503     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6504     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6505 #define FLD(f) abuf->fields.sfmt_st_plus.f
6506 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6507     int UNUSED written = abuf->written;
6508     IADDR UNUSED pc = abuf->addr;
6509     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6510
6511   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6512
6513 #undef OPRND
6514 #undef FLD
6515   }
6516   NEXT (vpc);
6517
6518   CASE (sem, INSN_PAR_MSBLO) : /* msblo $src1,$src2 */
6519 {
6520   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6521   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6522 #define FLD(f) abuf->fields.sfmt_st_plus.f
6523 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6524   int UNUSED written = 0;
6525   IADDR UNUSED pc = abuf->addr;
6526   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6527
6528   {
6529     DI opval = SRADI (SLLDI (SUBDI (GET_H_ACCUM (), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (* FLD (i_src1))), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 32), 16)), 8), 8);
6530     OPRND (accum) = opval;
6531     TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
6532   }
6533
6534 #undef OPRND
6535 #undef FLD
6536 }
6537   NEXT (vpc);
6538
6539 CASE (sem, INSN_WRITE_MSBLO) : /* msblo $src1,$src2 */
6540   {
6541     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6542     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6543 #define FLD(f) abuf->fields.sfmt_st_plus.f
6544 #define OPRND(f) par_exec->operands.sfmt_msblo.f
6545     int UNUSED written = abuf->written;
6546     IADDR UNUSED pc = abuf->addr;
6547     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6548
6549   SET_H_ACCUM (OPRND (accum));
6550
6551 #undef OPRND
6552 #undef FLD
6553   }
6554   NEXT (vpc);
6555
6556   CASE (sem, INSN_PAR_MULWU1) : /* mulwu1 $src1,$src2 */
6557 {
6558   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6559   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6560 #define FLD(f) abuf->fields.sfmt_st_plus.f
6561 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6562   int UNUSED written = 0;
6563   IADDR UNUSED pc = abuf->addr;
6564   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6565
6566   {
6567     DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTSIDI (ANDSI (* FLD (i_src2), 65535))), 16), 16);
6568     OPRND (h_accums_DI_1) = opval;
6569     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6570   }
6571
6572 #undef OPRND
6573 #undef FLD
6574 }
6575   NEXT (vpc);
6576
6577 CASE (sem, INSN_WRITE_MULWU1) : /* mulwu1 $src1,$src2 */
6578   {
6579     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6580     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6581 #define FLD(f) abuf->fields.sfmt_st_plus.f
6582 #define OPRND(f) par_exec->operands.sfmt_mulwu1.f
6583     int UNUSED written = abuf->written;
6584     IADDR UNUSED pc = abuf->addr;
6585     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6586
6587   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6588
6589 #undef OPRND
6590 #undef FLD
6591   }
6592   NEXT (vpc);
6593
6594   CASE (sem, INSN_PAR_MACLH1) : /* maclh1 $src1,$src2 */
6595 {
6596   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6597   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6598 #define FLD(f) abuf->fields.sfmt_st_plus.f
6599 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6600   int UNUSED written = 0;
6601   IADDR UNUSED pc = abuf->addr;
6602   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6603
6604   {
6605     DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUMS (((UINT) 1)), SLLDI (EXTSIDI (MULSI (EXTHISI (TRUNCSIHI (* FLD (i_src1))), SRASI (* FLD (i_src2), 16))), 16)), 8), 8);
6606     OPRND (h_accums_DI_1) = opval;
6607     TRACE_RESULT (current_cpu, abuf, "accums", 'D', opval);
6608   }
6609
6610 #undef OPRND
6611 #undef FLD
6612 }
6613   NEXT (vpc);
6614
6615 CASE (sem, INSN_WRITE_MACLH1) : /* maclh1 $src1,$src2 */
6616   {
6617     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6618     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6619 #define FLD(f) abuf->fields.sfmt_st_plus.f
6620 #define OPRND(f) par_exec->operands.sfmt_macwu1.f
6621     int UNUSED written = abuf->written;
6622     IADDR UNUSED pc = abuf->addr;
6623     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6624
6625   SET_H_ACCUMS (((UINT) 1), OPRND (h_accums_DI_1));
6626
6627 #undef OPRND
6628 #undef FLD
6629   }
6630   NEXT (vpc);
6631
6632   CASE (sem, INSN_PAR_SC) : /* sc */
6633 {
6634   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6635   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6636 #define FLD(f) abuf->fields.fmt_empty.f
6637 #define OPRND(f) par_exec->operands.sfmt_sc.f
6638   int UNUSED written = 0;
6639   IADDR UNUSED pc = abuf->addr;
6640   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6641
6642 if (ZEXTBISI (CPU (h_cond)))
6643   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6644
6645 #undef OPRND
6646 #undef FLD
6647 }
6648   NEXT (vpc);
6649
6650 CASE (sem, INSN_WRITE_SC) : /* sc */
6651   {
6652     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6653     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6654 #define FLD(f) abuf->fields.fmt_empty.f
6655 #define OPRND(f) par_exec->operands.sfmt_sc.f
6656     int UNUSED written = abuf->written;
6657     IADDR UNUSED pc = abuf->addr;
6658     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6659
6660
6661 #undef OPRND
6662 #undef FLD
6663   }
6664   NEXT (vpc);
6665
6666   CASE (sem, INSN_PAR_SNC) : /* snc */
6667 {
6668   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6669   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6670 #define FLD(f) abuf->fields.fmt_empty.f
6671 #define OPRND(f) par_exec->operands.sfmt_sc.f
6672   int UNUSED written = 0;
6673   IADDR UNUSED pc = abuf->addr;
6674   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6675
6676 if (ZEXTBISI (NOTBI (CPU (h_cond))))
6677   SEM_SKIP_INSN (current_cpu, sem_arg, vpc);
6678
6679 #undef OPRND
6680 #undef FLD
6681 }
6682   NEXT (vpc);
6683
6684 CASE (sem, INSN_WRITE_SNC) : /* snc */
6685   {
6686     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6687     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6688 #define FLD(f) abuf->fields.fmt_empty.f
6689 #define OPRND(f) par_exec->operands.sfmt_sc.f
6690     int UNUSED written = abuf->written;
6691     IADDR UNUSED pc = abuf->addr;
6692     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6693
6694
6695 #undef OPRND
6696 #undef FLD
6697   }
6698   NEXT (vpc);
6699
6700   CASE (sem, INSN_PAR_CLRPSW) : /* clrpsw $uimm8 */
6701 {
6702   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6703   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6704 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6705 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6706   int UNUSED written = 0;
6707   IADDR UNUSED pc = abuf->addr;
6708   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6709
6710   {
6711     USI opval = ANDSI (GET_H_CR (((UINT) 0)), ORSI (ZEXTQISI (INVQI (FLD (f_uimm8))), 65280));
6712     OPRND (h_cr_USI_0) = opval;
6713     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6714   }
6715
6716 #undef OPRND
6717 #undef FLD
6718 }
6719   NEXT (vpc);
6720
6721 CASE (sem, INSN_WRITE_CLRPSW) : /* clrpsw $uimm8 */
6722   {
6723     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6724     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6725 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6726 #define OPRND(f) par_exec->operands.sfmt_clrpsw.f
6727     int UNUSED written = abuf->written;
6728     IADDR UNUSED pc = abuf->addr;
6729     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6730
6731   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6732
6733 #undef OPRND
6734 #undef FLD
6735   }
6736   NEXT (vpc);
6737
6738   CASE (sem, INSN_PAR_SETPSW) : /* setpsw $uimm8 */
6739 {
6740   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6741   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6742 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6743 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6744   int UNUSED written = 0;
6745   IADDR UNUSED pc = abuf->addr;
6746   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6747
6748   {
6749     USI opval = FLD (f_uimm8);
6750     OPRND (h_cr_USI_0) = opval;
6751     TRACE_RESULT (current_cpu, abuf, "cr", 'x', opval);
6752   }
6753
6754 #undef OPRND
6755 #undef FLD
6756 }
6757   NEXT (vpc);
6758
6759 CASE (sem, INSN_WRITE_SETPSW) : /* setpsw $uimm8 */
6760   {
6761     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6762     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6763 #define FLD(f) abuf->fields.sfmt_clrpsw.f
6764 #define OPRND(f) par_exec->operands.sfmt_setpsw.f
6765     int UNUSED written = abuf->written;
6766     IADDR UNUSED pc = abuf->addr;
6767     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6768
6769   SET_H_CR (((UINT) 0), OPRND (h_cr_USI_0));
6770
6771 #undef OPRND
6772 #undef FLD
6773   }
6774   NEXT (vpc);
6775
6776   CASE (sem, INSN_PAR_BTST) : /* btst $uimm3,$sr */
6777 {
6778   SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6779   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
6780 #define FLD(f) abuf->fields.sfmt_bset.f
6781 #define OPRND(f) par_exec->operands.sfmt_btst.f
6782   int UNUSED written = 0;
6783   IADDR UNUSED pc = abuf->addr;
6784   vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
6785
6786   {
6787     BI opval = ANDQI (SRLQI (* FLD (i_sr), SUBSI (7, FLD (f_uimm3))), 1);
6788     OPRND (condbit) = opval;
6789     TRACE_RESULT (current_cpu, abuf, "cond", 'x', opval);
6790   }
6791
6792 #undef OPRND
6793 #undef FLD
6794 }
6795   NEXT (vpc);
6796
6797 CASE (sem, INSN_WRITE_BTST) : /* btst $uimm3,$sr */
6798   {
6799     SEM_ARG sem_arg = SEM_SEM_ARG (vpc, sc);
6800     const ARGBUF *abuf = SEM_ARGBUF (sem_arg)->fields.write.abuf;
6801 #define FLD(f) abuf->fields.sfmt_bset.f
6802 #define OPRND(f) par_exec->operands.sfmt_btst.f
6803     int UNUSED written = abuf->written;
6804     IADDR UNUSED pc = abuf->addr;
6805     vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
6806
6807   CPU (h_cond) = OPRND (condbit);
6808
6809 #undef OPRND
6810 #undef FLD
6811   }
6812   NEXT (vpc);
6813
6814
6815     }
6816   ENDSWITCH (sem) /* End of semantic switch.  */
6817
6818   /* At this point `vpc' contains the next insn to execute.  */
6819 }
6820
6821 #undef DEFINE_SWITCH
6822 #endif /* DEFINE_SWITCH */