sim/m32r/semx.c

   1 /* Simulator instruction semantics for m32rx.
   2
   3 This file is machine generated with CGEN.
   4
   5 Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
   6
   7 This file is part of the GNU Simulators.
   8
   9 This program is free software; you can redistribute it and/or modify
  10 it under the terms of the GNU General Public License as published by
  11 the Free Software Foundation; either version 2, or (at your option)
  12 any later version.
  13
  14 This program is distributed in the hope that it will be useful,
  15 but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17 GNU General Public License for more details.
  18
  19 You should have received a copy of the GNU General Public License along
  20 with this program; if not, write to the Free Software Foundation, Inc.,
  21 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  22
  23 */
  24
  25 #define WANT_CPU
  26 #define WANT_CPU_M32RX
  27
  28 #include "sim-main.h"
  29 #include "cgen-mem.h"
  30 #include "cgen-ops.h"
  31 #include "cpu-sim.h"
  32
  33 #if ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE)
  34
  35 #undef GET_ATTR
  36 #define GET_ATTR(cpu, num, attr) CGEN_INSN_ATTR (abuf->opcode, CGEN_INSN_##attr)
  37
  38 /* Perform add: add $dr,$sr.  */
  39 CIA
  40 SEM_FN_NAME (m32rx,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
  41 {
  42   insn_t insn = SEM_INSN (sem_arg);
  43 #define OPRND(f) par_exec->operands.fmt_add.f
  44   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  45   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
  46   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
  47   EXTRACT_FMT_ADD_CODE
  48
  49   CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (sr));
  50   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
  51
  52 #if WITH_PROFILE_MODEL_P
  53   if (PROFILE_MODEL_P (current_cpu))
  54     {
  55       m32rx_model_mark_get_h_gr (current_cpu, abuf);
  56       m32rx_model_mark_set_h_gr (current_cpu, abuf);
  57       m32rx_model_profile_insn (current_cpu, abuf);
  58     }
  59 #endif
  60
  61   return new_pc;
  62 #undef OPRND
  63 }
  64
  65 /* Perform add3: add3 $dr,$sr,$hash$slo16.  */
  66 CIA
  67 SEM_FN_NAME (m32rx,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
  68 {
  69   insn_t insn = SEM_INSN (sem_arg);
  70 #define OPRND(f) par_exec->operands.fmt_add3.f
  71   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  72   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
  73   EXTRACT_FMT_ADD3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
  74   EXTRACT_FMT_ADD3_CODE
  75
  76   CPU (h_gr[f_r1]) = ADDSI (OPRND (sr), OPRND (slo16));
  77   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
  78
  79 #if WITH_PROFILE_MODEL_P
  80   if (PROFILE_MODEL_P (current_cpu))
  81     {
  82       m32rx_model_mark_get_h_gr (current_cpu, abuf);
  83       m32rx_model_mark_set_h_gr (current_cpu, abuf);
  84       m32rx_model_profile_insn (current_cpu, abuf);
  85     }
  86 #endif
  87
  88   return new_pc;
  89 #undef OPRND
  90 }
  91
  92 /* Perform and: and $dr,$sr.  */
  93 CIA
  94 SEM_FN_NAME (m32rx,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
  95 {
  96   insn_t insn = SEM_INSN (sem_arg);
  97 #define OPRND(f) par_exec->operands.fmt_add.f
  98   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
  99   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 100   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 101   EXTRACT_FMT_ADD_CODE
 102
 103   CPU (h_gr[f_r1]) = ANDSI (OPRND (dr), OPRND (sr));
 104   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 105
 106 #if WITH_PROFILE_MODEL_P
 107   if (PROFILE_MODEL_P (current_cpu))
 108     {
 109       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 110       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 111       m32rx_model_profile_insn (current_cpu, abuf);
 112     }
 113 #endif
 114
 115   return new_pc;
 116 #undef OPRND
 117 }
 118
 119 /* Perform and3: and3 $dr,$sr,$uimm16.  */
 120 CIA
 121 SEM_FN_NAME (m32rx,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 122 {
 123   insn_t insn = SEM_INSN (sem_arg);
 124 #define OPRND(f) par_exec->operands.fmt_and3.f
 125   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 126   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 127   EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 128   EXTRACT_FMT_AND3_CODE
 129
 130   CPU (h_gr[f_r1]) = ANDSI (OPRND (sr), OPRND (uimm16));
 131   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 132
 133 #if WITH_PROFILE_MODEL_P
 134   if (PROFILE_MODEL_P (current_cpu))
 135     {
 136       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 137       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 138       m32rx_model_profile_insn (current_cpu, abuf);
 139     }
 140 #endif
 141
 142   return new_pc;
 143 #undef OPRND
 144 }
 145
 146 /* Perform or: or $dr,$sr.  */
 147 CIA
 148 SEM_FN_NAME (m32rx,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 149 {
 150   insn_t insn = SEM_INSN (sem_arg);
 151 #define OPRND(f) par_exec->operands.fmt_add.f
 152   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 153   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 154   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 155   EXTRACT_FMT_ADD_CODE
 156
 157   CPU (h_gr[f_r1]) = ORSI (OPRND (dr), OPRND (sr));
 158   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 159
 160 #if WITH_PROFILE_MODEL_P
 161   if (PROFILE_MODEL_P (current_cpu))
 162     {
 163       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 164       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 165       m32rx_model_profile_insn (current_cpu, abuf);
 166     }
 167 #endif
 168
 169   return new_pc;
 170 #undef OPRND
 171 }
 172
 173 /* Perform or3: or3 $dr,$sr,$hash$ulo16.  */
 174 CIA
 175 SEM_FN_NAME (m32rx,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 176 {
 177   insn_t insn = SEM_INSN (sem_arg);
 178 #define OPRND(f) par_exec->operands.fmt_or3.f
 179   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 180   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 181   EXTRACT_FMT_OR3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 182   EXTRACT_FMT_OR3_CODE
 183
 184   CPU (h_gr[f_r1]) = ORSI (OPRND (sr), OPRND (ulo16));
 185   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 186
 187 #if WITH_PROFILE_MODEL_P
 188   if (PROFILE_MODEL_P (current_cpu))
 189     {
 190       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 191       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 192       m32rx_model_profile_insn (current_cpu, abuf);
 193     }
 194 #endif
 195
 196   return new_pc;
 197 #undef OPRND
 198 }
 199
 200 /* Perform xor: xor $dr,$sr.  */
 201 CIA
 202 SEM_FN_NAME (m32rx,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 203 {
 204   insn_t insn = SEM_INSN (sem_arg);
 205 #define OPRND(f) par_exec->operands.fmt_add.f
 206   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 207   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 208   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
 209   EXTRACT_FMT_ADD_CODE
 210
 211   CPU (h_gr[f_r1]) = XORSI (OPRND (dr), OPRND (sr));
 212   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 213
 214 #if WITH_PROFILE_MODEL_P
 215   if (PROFILE_MODEL_P (current_cpu))
 216     {
 217       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 218       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 219       m32rx_model_profile_insn (current_cpu, abuf);
 220     }
 221 #endif
 222
 223   return new_pc;
 224 #undef OPRND
 225 }
 226
 227 /* Perform xor3: xor3 $dr,$sr,$uimm16.  */
 228 CIA
 229 SEM_FN_NAME (m32rx,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 230 {
 231   insn_t insn = SEM_INSN (sem_arg);
 232 #define OPRND(f) par_exec->operands.fmt_and3.f
 233   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 234   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 235   EXTRACT_FMT_AND3_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
 236   EXTRACT_FMT_AND3_CODE
 237
 238   CPU (h_gr[f_r1]) = XORSI (OPRND (sr), OPRND (uimm16));
 239   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 240
 241 #if WITH_PROFILE_MODEL_P
 242   if (PROFILE_MODEL_P (current_cpu))
 243     {
 244       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 245       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 246       m32rx_model_profile_insn (current_cpu, abuf);
 247     }
 248 #endif
 249
 250   return new_pc;
 251 #undef OPRND
 252 }
 253
 254 /* Perform addi: addi $dr,$simm8.  */
 255 CIA
 256 SEM_FN_NAME (m32rx,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 257 {
 258   insn_t insn = SEM_INSN (sem_arg);
 259 #define OPRND(f) par_exec->operands.fmt_addi.f
 260   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 261   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 262   EXTRACT_FMT_ADDI_VARS /* f-op1 f-r1 f-simm8 */
 263   EXTRACT_FMT_ADDI_CODE
 264
 265   CPU (h_gr[f_r1]) = ADDSI (OPRND (dr), OPRND (simm8));
 266   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 267
 268 #if WITH_PROFILE_MODEL_P
 269   if (PROFILE_MODEL_P (current_cpu))
 270     {
 271       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 272       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 273       m32rx_model_profile_insn (current_cpu, abuf);
 274     }
 275 #endif
 276
 277   return new_pc;
 278 #undef OPRND
 279 }
 280
 281 /* Perform addv: addv $dr,$sr.  */
 282 CIA
 283 SEM_FN_NAME (m32rx,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 284 {
 285   insn_t insn = SEM_INSN (sem_arg);
 286 #define OPRND(f) par_exec->operands.fmt_addv.f
 287   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 288   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 289   EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
 290   EXTRACT_FMT_ADDV_CODE
 291
 292 do {
 293   BI temp1;SI temp0;
 294   temp0 = ADDSI (OPRND (dr), OPRND (sr));
 295   temp1 = ADDOFSI (OPRND (dr), OPRND (sr), 0);
 296   CPU (h_gr[f_r1]) = temp0;
 297   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 298   CPU (h_cond) = temp1;
 299   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 300 } while (0);
 301
 302 #if WITH_PROFILE_MODEL_P
 303   if (PROFILE_MODEL_P (current_cpu))
 304     {
 305       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 306       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 307       m32rx_model_profile_insn (current_cpu, abuf);
 308     }
 309 #endif
 310
 311   return new_pc;
 312 #undef OPRND
 313 }
 314
 315 /* Perform addv3: addv3 $dr,$sr,$simm16.  */
 316 CIA
 317 SEM_FN_NAME (m32rx,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 318 {
 319   insn_t insn = SEM_INSN (sem_arg);
 320 #define OPRND(f) par_exec->operands.fmt_addv3.f
 321   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 322   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 323   EXTRACT_FMT_ADDV3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
 324   EXTRACT_FMT_ADDV3_CODE
 325
 326 do {
 327   BI temp1;SI temp0;
 328   temp0 = ADDSI (OPRND (sr), OPRND (simm16));
 329   temp1 = ADDOFSI (OPRND (sr), OPRND (simm16), 0);
 330   CPU (h_gr[f_r1]) = temp0;
 331   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 332   CPU (h_cond) = temp1;
 333   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 334 } while (0);
 335
 336 #if WITH_PROFILE_MODEL_P
 337   if (PROFILE_MODEL_P (current_cpu))
 338     {
 339       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 340       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 341       m32rx_model_profile_insn (current_cpu, abuf);
 342     }
 343 #endif
 344
 345   return new_pc;
 346 #undef OPRND
 347 }
 348
 349 /* Perform addx: addx $dr,$sr.  */
 350 CIA
 351 SEM_FN_NAME (m32rx,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 352 {
 353   insn_t insn = SEM_INSN (sem_arg);
 354 #define OPRND(f) par_exec->operands.fmt_addx.f
 355   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 356   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 357   EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
 358   EXTRACT_FMT_ADDX_CODE
 359
 360 do {
 361   BI temp1;SI temp0;
 362   temp0 = ADDCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
 363   temp1 = ADDCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
 364   CPU (h_gr[f_r1]) = temp0;
 365   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
 366   CPU (h_cond) = temp1;
 367   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 368 } while (0);
 369
 370 #if WITH_PROFILE_MODEL_P
 371   if (PROFILE_MODEL_P (current_cpu))
 372     {
 373       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 374       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 375       m32rx_model_profile_insn (current_cpu, abuf);
 376     }
 377 #endif
 378
 379   return new_pc;
 380 #undef OPRND
 381 }
 382
 383 /* Perform bc8: bc $disp8.  */
 384 CIA
 385 SEM_FN_NAME (m32rx,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 386 {
 387   insn_t insn = SEM_INSN (sem_arg);
 388 #define OPRND(f) par_exec->operands.fmt_bc8.f
 389   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 390   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 391   int taken_p = 0;
 392   EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
 393   EXTRACT_FMT_BC8_CODE
 394
 395 if (OPRND (condbit)) {
 396   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
 397   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 398 }
 399
 400 #if WITH_PROFILE_MODEL_P
 401   if (PROFILE_MODEL_P (current_cpu))
 402     {
 403       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 404     }
 405 #endif
 406
 407   return new_pc;
 408 #undef OPRND
 409 }
 410
 411 /* Perform bc24: bc $disp24.  */
 412 CIA
 413 SEM_FN_NAME (m32rx,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 414 {
 415   insn_t insn = SEM_INSN (sem_arg);
 416 #define OPRND(f) par_exec->operands.fmt_bc24.f
 417   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 418   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 419   int taken_p = 0;
 420   EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
 421   EXTRACT_FMT_BC24_CODE
 422
 423 if (OPRND (condbit)) {
 424   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
 425   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 426 }
 427
 428 #if WITH_PROFILE_MODEL_P
 429   if (PROFILE_MODEL_P (current_cpu))
 430     {
 431       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 432     }
 433 #endif
 434
 435   return new_pc;
 436 #undef OPRND
 437 }
 438
 439 /* Perform beq: beq $src1,$src2,$disp16.  */
 440 CIA
 441 SEM_FN_NAME (m32rx,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 442 {
 443   insn_t insn = SEM_INSN (sem_arg);
 444 #define OPRND(f) par_exec->operands.fmt_beq.f
 445   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 446   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 447   int taken_p = 0;
 448   EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 449   EXTRACT_FMT_BEQ_CODE
 450
 451 if (EQSI (OPRND (src1), OPRND (src2))) {
 452   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 453   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 454 }
 455
 456 #if WITH_PROFILE_MODEL_P
 457   if (PROFILE_MODEL_P (current_cpu))
 458     {
 459       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 460       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 461     }
 462 #endif
 463
 464   return new_pc;
 465 #undef OPRND
 466 }
 467
 468 /* Perform beqz: beqz $src2,$disp16.  */
 469 CIA
 470 SEM_FN_NAME (m32rx,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 471 {
 472   insn_t insn = SEM_INSN (sem_arg);
 473 #define OPRND(f) par_exec->operands.fmt_beqz.f
 474   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 475   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 476   int taken_p = 0;
 477   EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 478   EXTRACT_FMT_BEQZ_CODE
 479
 480 if (EQSI (OPRND (src2), 0)) {
 481   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 482   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 483 }
 484
 485 #if WITH_PROFILE_MODEL_P
 486   if (PROFILE_MODEL_P (current_cpu))
 487     {
 488       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 489       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 490     }
 491 #endif
 492
 493   return new_pc;
 494 #undef OPRND
 495 }
 496
 497 /* Perform bgez: bgez $src2,$disp16.  */
 498 CIA
 499 SEM_FN_NAME (m32rx,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 500 {
 501   insn_t insn = SEM_INSN (sem_arg);
 502 #define OPRND(f) par_exec->operands.fmt_beqz.f
 503   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 504   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 505   int taken_p = 0;
 506   EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 507   EXTRACT_FMT_BEQZ_CODE
 508
 509 if (GESI (OPRND (src2), 0)) {
 510   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 511   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 512 }
 513
 514 #if WITH_PROFILE_MODEL_P
 515   if (PROFILE_MODEL_P (current_cpu))
 516     {
 517       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 518       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 519     }
 520 #endif
 521
 522   return new_pc;
 523 #undef OPRND
 524 }
 525
 526 /* Perform bgtz: bgtz $src2,$disp16.  */
 527 CIA
 528 SEM_FN_NAME (m32rx,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 529 {
 530   insn_t insn = SEM_INSN (sem_arg);
 531 #define OPRND(f) par_exec->operands.fmt_beqz.f
 532   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 533   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 534   int taken_p = 0;
 535   EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 536   EXTRACT_FMT_BEQZ_CODE
 537
 538 if (GTSI (OPRND (src2), 0)) {
 539   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 540   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 541 }
 542
 543 #if WITH_PROFILE_MODEL_P
 544   if (PROFILE_MODEL_P (current_cpu))
 545     {
 546       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 547       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 548     }
 549 #endif
 550
 551   return new_pc;
 552 #undef OPRND
 553 }
 554
 555 /* Perform blez: blez $src2,$disp16.  */
 556 CIA
 557 SEM_FN_NAME (m32rx,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 558 {
 559   insn_t insn = SEM_INSN (sem_arg);
 560 #define OPRND(f) par_exec->operands.fmt_beqz.f
 561   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 562   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 563   int taken_p = 0;
 564   EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 565   EXTRACT_FMT_BEQZ_CODE
 566
 567 if (LESI (OPRND (src2), 0)) {
 568   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 569   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 570 }
 571
 572 #if WITH_PROFILE_MODEL_P
 573   if (PROFILE_MODEL_P (current_cpu))
 574     {
 575       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 576       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 577     }
 578 #endif
 579
 580   return new_pc;
 581 #undef OPRND
 582 }
 583
 584 /* Perform bltz: bltz $src2,$disp16.  */
 585 CIA
 586 SEM_FN_NAME (m32rx,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 587 {
 588   insn_t insn = SEM_INSN (sem_arg);
 589 #define OPRND(f) par_exec->operands.fmt_beqz.f
 590   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 591   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 592   int taken_p = 0;
 593   EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 594   EXTRACT_FMT_BEQZ_CODE
 595
 596 if (LTSI (OPRND (src2), 0)) {
 597   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 598   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 599 }
 600
 601 #if WITH_PROFILE_MODEL_P
 602   if (PROFILE_MODEL_P (current_cpu))
 603     {
 604       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 605       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 606     }
 607 #endif
 608
 609   return new_pc;
 610 #undef OPRND
 611 }
 612
 613 /* Perform bnez: bnez $src2,$disp16.  */
 614 CIA
 615 SEM_FN_NAME (m32rx,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 616 {
 617   insn_t insn = SEM_INSN (sem_arg);
 618 #define OPRND(f) par_exec->operands.fmt_beqz.f
 619   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 620   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 621   int taken_p = 0;
 622   EXTRACT_FMT_BEQZ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 623   EXTRACT_FMT_BEQZ_CODE
 624
 625 if (NESI (OPRND (src2), 0)) {
 626   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 627   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 628 }
 629
 630 #if WITH_PROFILE_MODEL_P
 631   if (PROFILE_MODEL_P (current_cpu))
 632     {
 633       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 634       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 635     }
 636 #endif
 637
 638   return new_pc;
 639 #undef OPRND
 640 }
 641
 642 /* Perform bl8: bl $disp8.  */
 643 CIA
 644 SEM_FN_NAME (m32rx,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 645 {
 646   insn_t insn = SEM_INSN (sem_arg);
 647 #define OPRND(f) par_exec->operands.fmt_bl8.f
 648   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 649   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 650   int taken_p = 0;
 651   EXTRACT_FMT_BL8_VARS /* f-op1 f-r1 f-disp8 */
 652   EXTRACT_FMT_BL8_CODE
 653
 654 do {
 655   CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
 656   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 657   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
 658   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 659 } while (0);
 660
 661 #if WITH_PROFILE_MODEL_P
 662   if (PROFILE_MODEL_P (current_cpu))
 663     {
 664       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 665       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 666     }
 667 #endif
 668
 669   return new_pc;
 670 #undef OPRND
 671 }
 672
 673 /* Perform bl24: bl $disp24.  */
 674 CIA
 675 SEM_FN_NAME (m32rx,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 676 {
 677   insn_t insn = SEM_INSN (sem_arg);
 678 #define OPRND(f) par_exec->operands.fmt_bl24.f
 679   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 680   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 681   int taken_p = 0;
 682   EXTRACT_FMT_BL24_VARS /* f-op1 f-r1 f-disp24 */
 683   EXTRACT_FMT_BL24_CODE
 684
 685 do {
 686   CPU (h_gr[14]) = ADDSI (OPRND (pc), 4);
 687   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 688   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
 689   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 690 } while (0);
 691
 692 #if WITH_PROFILE_MODEL_P
 693   if (PROFILE_MODEL_P (current_cpu))
 694     {
 695       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 696       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 697     }
 698 #endif
 699
 700   return new_pc;
 701 #undef OPRND
 702 }
 703
 704 /* Perform bcl8: bcl $disp8.  */
 705 CIA
 706 SEM_FN_NAME (m32rx,bcl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 707 {
 708   insn_t insn = SEM_INSN (sem_arg);
 709 #define OPRND(f) par_exec->operands.fmt_bcl8.f
 710   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 711   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 712   int taken_p = 0;
 713   EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
 714   EXTRACT_FMT_BCL8_CODE
 715
 716 if (OPRND (condbit)) {
 717 do {
 718   CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
 719   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 720   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
 721   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 722 } while (0);
 723 }
 724
 725 #if WITH_PROFILE_MODEL_P
 726   if (PROFILE_MODEL_P (current_cpu))
 727     {
 728       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 729       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 730     }
 731 #endif
 732
 733   return new_pc;
 734 #undef OPRND
 735 }
 736
 737 /* Perform bcl24: bcl $disp24.  */
 738 CIA
 739 SEM_FN_NAME (m32rx,bcl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 740 {
 741   insn_t insn = SEM_INSN (sem_arg);
 742 #define OPRND(f) par_exec->operands.fmt_bcl24.f
 743   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 744   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 745   int taken_p = 0;
 746   EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
 747   EXTRACT_FMT_BCL24_CODE
 748
 749 if (OPRND (condbit)) {
 750 do {
 751   CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
 752   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 753   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
 754   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 755 } while (0);
 756 }
 757
 758 #if WITH_PROFILE_MODEL_P
 759   if (PROFILE_MODEL_P (current_cpu))
 760     {
 761       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 762       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 763     }
 764 #endif
 765
 766   return new_pc;
 767 #undef OPRND
 768 }
 769
 770 /* Perform bnc8: bnc $disp8.  */
 771 CIA
 772 SEM_FN_NAME (m32rx,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 773 {
 774   insn_t insn = SEM_INSN (sem_arg);
 775 #define OPRND(f) par_exec->operands.fmt_bc8.f
 776   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 777   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 778   int taken_p = 0;
 779   EXTRACT_FMT_BC8_VARS /* f-op1 f-r1 f-disp8 */
 780   EXTRACT_FMT_BC8_CODE
 781
 782 if (NOTBI (OPRND (condbit))) {
 783   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
 784   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 785 }
 786
 787 #if WITH_PROFILE_MODEL_P
 788   if (PROFILE_MODEL_P (current_cpu))
 789     {
 790       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 791     }
 792 #endif
 793
 794   return new_pc;
 795 #undef OPRND
 796 }
 797
 798 /* Perform bnc24: bnc $disp24.  */
 799 CIA
 800 SEM_FN_NAME (m32rx,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 801 {
 802   insn_t insn = SEM_INSN (sem_arg);
 803 #define OPRND(f) par_exec->operands.fmt_bc24.f
 804   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 805   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 806   int taken_p = 0;
 807   EXTRACT_FMT_BC24_VARS /* f-op1 f-r1 f-disp24 */
 808   EXTRACT_FMT_BC24_CODE
 809
 810 if (NOTBI (OPRND (condbit))) {
 811   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
 812   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 813 }
 814
 815 #if WITH_PROFILE_MODEL_P
 816   if (PROFILE_MODEL_P (current_cpu))
 817     {
 818       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 819     }
 820 #endif
 821
 822   return new_pc;
 823 #undef OPRND
 824 }
 825
 826 /* Perform bne: bne $src1,$src2,$disp16.  */
 827 CIA
 828 SEM_FN_NAME (m32rx,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 829 {
 830   insn_t insn = SEM_INSN (sem_arg);
 831 #define OPRND(f) par_exec->operands.fmt_beq.f
 832   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 833   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 834   int taken_p = 0;
 835   EXTRACT_FMT_BEQ_VARS /* f-op1 f-r1 f-op2 f-r2 f-disp16 */
 836   EXTRACT_FMT_BEQ_CODE
 837
 838 if (NESI (OPRND (src1), OPRND (src2))) {
 839   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp16)));
 840   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 841 }
 842
 843 #if WITH_PROFILE_MODEL_P
 844   if (PROFILE_MODEL_P (current_cpu))
 845     {
 846       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 847       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 848     }
 849 #endif
 850
 851   return new_pc;
 852 #undef OPRND
 853 }
 854
 855 /* Perform bra8: bra $disp8.  */
 856 CIA
 857 SEM_FN_NAME (m32rx,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 858 {
 859   insn_t insn = SEM_INSN (sem_arg);
 860 #define OPRND(f) par_exec->operands.fmt_bra8.f
 861   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 862   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 863   int taken_p = 0;
 864   EXTRACT_FMT_BRA8_VARS /* f-op1 f-r1 f-disp8 */
 865   EXTRACT_FMT_BRA8_CODE
 866
 867   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
 868   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 869
 870 #if WITH_PROFILE_MODEL_P
 871   if (PROFILE_MODEL_P (current_cpu))
 872     {
 873       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 874     }
 875 #endif
 876
 877   return new_pc;
 878 #undef OPRND
 879 }
 880
 881 /* Perform bra24: bra $disp24.  */
 882 CIA
 883 SEM_FN_NAME (m32rx,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 884 {
 885   insn_t insn = SEM_INSN (sem_arg);
 886 #define OPRND(f) par_exec->operands.fmt_bra24.f
 887   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 888   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 889   int taken_p = 0;
 890   EXTRACT_FMT_BRA24_VARS /* f-op1 f-r1 f-disp24 */
 891   EXTRACT_FMT_BRA24_CODE
 892
 893   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
 894   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 895
 896 #if WITH_PROFILE_MODEL_P
 897   if (PROFILE_MODEL_P (current_cpu))
 898     {
 899       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 900     }
 901 #endif
 902
 903   return new_pc;
 904 #undef OPRND
 905 }
 906
 907 /* Perform bncl8: bncl $disp8.  */
 908 CIA
 909 SEM_FN_NAME (m32rx,bncl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 910 {
 911   insn_t insn = SEM_INSN (sem_arg);
 912 #define OPRND(f) par_exec->operands.fmt_bcl8.f
 913   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 914   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 915   int taken_p = 0;
 916   EXTRACT_FMT_BCL8_VARS /* f-op1 f-r1 f-disp8 */
 917   EXTRACT_FMT_BCL8_CODE
 918
 919 if (NOTBI (OPRND (condbit))) {
 920 do {
 921   CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
 922   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 923   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp8)));
 924   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 925 } while (0);
 926 }
 927
 928 #if WITH_PROFILE_MODEL_P
 929   if (PROFILE_MODEL_P (current_cpu))
 930     {
 931       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 932       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 933     }
 934 #endif
 935
 936   return new_pc;
 937 #undef OPRND
 938 }
 939
 940 /* Perform bncl24: bncl $disp24.  */
 941 CIA
 942 SEM_FN_NAME (m32rx,bncl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 943 {
 944   insn_t insn = SEM_INSN (sem_arg);
 945 #define OPRND(f) par_exec->operands.fmt_bcl24.f
 946   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 947   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
 948   int taken_p = 0;
 949   EXTRACT_FMT_BCL24_VARS /* f-op1 f-r1 f-disp24 */
 950   EXTRACT_FMT_BCL24_CODE
 951
 952 if (NOTBI (OPRND (condbit))) {
 953 do {
 954   CPU (h_gr[14]) = ADDSI (ANDSI (OPRND (pc), -4), 4);
 955   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
 956   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_CACHE (sem_arg, OPRND (disp24)));
 957   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
 958 } while (0);
 959 }
 960
 961 #if WITH_PROFILE_MODEL_P
 962   if (PROFILE_MODEL_P (current_cpu))
 963     {
 964       m32rx_model_mark_set_h_gr (current_cpu, abuf);
 965       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
 966     }
 967 #endif
 968
 969   return new_pc;
 970 #undef OPRND
 971 }
 972
 973 /* Perform cmp: cmp $src1,$src2.  */
 974 CIA
 975 SEM_FN_NAME (m32rx,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
 976 {
 977   insn_t insn = SEM_INSN (sem_arg);
 978 #define OPRND(f) par_exec->operands.fmt_cmp.f
 979   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
 980   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
 981   EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
 982   EXTRACT_FMT_CMP_CODE
 983
 984   CPU (h_cond) = LTSI (OPRND (src1), OPRND (src2));
 985   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
 986
 987 #if WITH_PROFILE_MODEL_P
 988   if (PROFILE_MODEL_P (current_cpu))
 989     {
 990       m32rx_model_mark_get_h_gr (current_cpu, abuf);
 991       m32rx_model_profile_insn (current_cpu, abuf);
 992     }
 993 #endif
 994
 995   return new_pc;
 996 #undef OPRND
 997 }
 998
 999 /* Perform cmpi: cmpi $src2,$simm16.  */
1000 CIA
1001 SEM_FN_NAME (m32rx,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1002 {
1003   insn_t insn = SEM_INSN (sem_arg);
1004 #define OPRND(f) par_exec->operands.fmt_cmpi.f
1005   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1006   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1007   EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1008   EXTRACT_FMT_CMPI_CODE
1009
1010   CPU (h_cond) = LTSI (OPRND (src2), OPRND (simm16));
1011   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1012
1013 #if WITH_PROFILE_MODEL_P
1014   if (PROFILE_MODEL_P (current_cpu))
1015     {
1016       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1017       m32rx_model_profile_insn (current_cpu, abuf);
1018     }
1019 #endif
1020
1021   return new_pc;
1022 #undef OPRND
1023 }
1024
1025 /* Perform cmpu: cmpu $src1,$src2.  */
1026 CIA
1027 SEM_FN_NAME (m32rx,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1028 {
1029   insn_t insn = SEM_INSN (sem_arg);
1030 #define OPRND(f) par_exec->operands.fmt_cmp.f
1031   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1032   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1033   EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1034   EXTRACT_FMT_CMP_CODE
1035
1036   CPU (h_cond) = LTUSI (OPRND (src1), OPRND (src2));
1037   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1038
1039 #if WITH_PROFILE_MODEL_P
1040   if (PROFILE_MODEL_P (current_cpu))
1041     {
1042       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1043       m32rx_model_profile_insn (current_cpu, abuf);
1044     }
1045 #endif
1046
1047   return new_pc;
1048 #undef OPRND
1049 }
1050
1051 /* Perform cmpui: cmpui $src2,$simm16.  */
1052 CIA
1053 SEM_FN_NAME (m32rx,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1054 {
1055   insn_t insn = SEM_INSN (sem_arg);
1056 #define OPRND(f) par_exec->operands.fmt_cmpi.f
1057   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1058   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1059   EXTRACT_FMT_CMPI_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1060   EXTRACT_FMT_CMPI_CODE
1061
1062   CPU (h_cond) = LTUSI (OPRND (src2), OPRND (simm16));
1063   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1064
1065 #if WITH_PROFILE_MODEL_P
1066   if (PROFILE_MODEL_P (current_cpu))
1067     {
1068       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1069       m32rx_model_profile_insn (current_cpu, abuf);
1070     }
1071 #endif
1072
1073   return new_pc;
1074 #undef OPRND
1075 }
1076
1077 /* Perform cmpeq: cmpeq $src1,$src2.  */
1078 CIA
1079 SEM_FN_NAME (m32rx,cmpeq) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1080 {
1081   insn_t insn = SEM_INSN (sem_arg);
1082 #define OPRND(f) par_exec->operands.fmt_cmp.f
1083   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1084   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1085   EXTRACT_FMT_CMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1086   EXTRACT_FMT_CMP_CODE
1087
1088   CPU (h_cond) = EQSI (OPRND (src1), OPRND (src2));
1089   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1090
1091 #if WITH_PROFILE_MODEL_P
1092   if (PROFILE_MODEL_P (current_cpu))
1093     {
1094       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1095       m32rx_model_profile_insn (current_cpu, abuf);
1096     }
1097 #endif
1098
1099   return new_pc;
1100 #undef OPRND
1101 }
1102
1103 /* Perform cmpz: cmpz $src2.  */
1104 CIA
1105 SEM_FN_NAME (m32rx,cmpz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1106 {
1107   insn_t insn = SEM_INSN (sem_arg);
1108 #define OPRND(f) par_exec->operands.fmt_cmpz.f
1109   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1110   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1111   EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
1112   EXTRACT_FMT_CMPZ_CODE
1113
1114   CPU (h_cond) = EQSI (OPRND (src2), 0);
1115   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
1116
1117 #if WITH_PROFILE_MODEL_P
1118   if (PROFILE_MODEL_P (current_cpu))
1119     {
1120       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1121       m32rx_model_profile_insn (current_cpu, abuf);
1122     }
1123 #endif
1124
1125   return new_pc;
1126 #undef OPRND
1127 }
1128
1129 /* Perform div: div $dr,$sr.  */
1130 CIA
1131 SEM_FN_NAME (m32rx,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1132 {
1133   insn_t insn = SEM_INSN (sem_arg);
1134 #define OPRND(f) par_exec->operands.fmt_div.f
1135   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1136   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1137   EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1138   EXTRACT_FMT_DIV_CODE
1139
1140 if (NESI (OPRND (sr), 0)) {
1141   CPU (h_gr[f_r1]) = DIVSI (OPRND (dr), OPRND (sr));
1142   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1143 }
1144
1145 #if WITH_PROFILE_MODEL_P
1146   if (PROFILE_MODEL_P (current_cpu))
1147     {
1148       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1149       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1150       m32rx_model_profile_insn (current_cpu, abuf);
1151     }
1152 #endif
1153
1154   return new_pc;
1155 #undef OPRND
1156 }
1157
1158 /* Perform divu: divu $dr,$sr.  */
1159 CIA
1160 SEM_FN_NAME (m32rx,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1161 {
1162   insn_t insn = SEM_INSN (sem_arg);
1163 #define OPRND(f) par_exec->operands.fmt_div.f
1164   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1165   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1166   EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1167   EXTRACT_FMT_DIV_CODE
1168
1169 if (NESI (OPRND (sr), 0)) {
1170   CPU (h_gr[f_r1]) = UDIVSI (OPRND (dr), OPRND (sr));
1171   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1172 }
1173
1174 #if WITH_PROFILE_MODEL_P
1175   if (PROFILE_MODEL_P (current_cpu))
1176     {
1177       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1178       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1179       m32rx_model_profile_insn (current_cpu, abuf);
1180     }
1181 #endif
1182
1183   return new_pc;
1184 #undef OPRND
1185 }
1186
1187 /* Perform rem: rem $dr,$sr.  */
1188 CIA
1189 SEM_FN_NAME (m32rx,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1190 {
1191   insn_t insn = SEM_INSN (sem_arg);
1192 #define OPRND(f) par_exec->operands.fmt_div.f
1193   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1194   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1195   EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1196   EXTRACT_FMT_DIV_CODE
1197
1198 if (NESI (OPRND (sr), 0)) {
1199   CPU (h_gr[f_r1]) = MODSI (OPRND (dr), OPRND (sr));
1200   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1201 }
1202
1203 #if WITH_PROFILE_MODEL_P
1204   if (PROFILE_MODEL_P (current_cpu))
1205     {
1206       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1207       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1208       m32rx_model_profile_insn (current_cpu, abuf);
1209     }
1210 #endif
1211
1212   return new_pc;
1213 #undef OPRND
1214 }
1215
1216 /* Perform remu: remu $dr,$sr.  */
1217 CIA
1218 SEM_FN_NAME (m32rx,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1219 {
1220   insn_t insn = SEM_INSN (sem_arg);
1221 #define OPRND(f) par_exec->operands.fmt_div.f
1222   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1223   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1224   EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1225   EXTRACT_FMT_DIV_CODE
1226
1227 if (NESI (OPRND (sr), 0)) {
1228   CPU (h_gr[f_r1]) = UMODSI (OPRND (dr), OPRND (sr));
1229   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1230 }
1231
1232 #if WITH_PROFILE_MODEL_P
1233   if (PROFILE_MODEL_P (current_cpu))
1234     {
1235       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1236       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1237       m32rx_model_profile_insn (current_cpu, abuf);
1238     }
1239 #endif
1240
1241   return new_pc;
1242 #undef OPRND
1243 }
1244
1245 /* Perform divh: divh $dr,$sr.  */
1246 CIA
1247 SEM_FN_NAME (m32rx,divh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1248 {
1249   insn_t insn = SEM_INSN (sem_arg);
1250 #define OPRND(f) par_exec->operands.fmt_div.f
1251   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1252   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1253   EXTRACT_FMT_DIV_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1254   EXTRACT_FMT_DIV_CODE
1255
1256 if (NESI (OPRND (sr), 0)) {
1257   CPU (h_gr[f_r1]) = DIVSI (EXTHISI (TRUNCSIHI (OPRND (dr))), OPRND (sr));
1258   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1259 }
1260
1261 #if WITH_PROFILE_MODEL_P
1262   if (PROFILE_MODEL_P (current_cpu))
1263     {
1264       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1265       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1266       m32rx_model_profile_insn (current_cpu, abuf);
1267     }
1268 #endif
1269
1270   return new_pc;
1271 #undef OPRND
1272 }
1273
1274 /* Perform jc: jc $sr.  */
1275 CIA
1276 SEM_FN_NAME (m32rx,jc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1277 {
1278   insn_t insn = SEM_INSN (sem_arg);
1279 #define OPRND(f) par_exec->operands.fmt_jc.f
1280   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1281   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1282   int taken_p = 0;
1283   EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1284   EXTRACT_FMT_JC_CODE
1285
1286 if (OPRND (condbit)) {
1287   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
1288   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
1289 }
1290
1291 #if WITH_PROFILE_MODEL_P
1292   if (PROFILE_MODEL_P (current_cpu))
1293     {
1294       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1295       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1296     }
1297 #endif
1298
1299   return new_pc;
1300 #undef OPRND
1301 }
1302
1303 /* Perform jnc: jnc $sr.  */
1304 CIA
1305 SEM_FN_NAME (m32rx,jnc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1306 {
1307   insn_t insn = SEM_INSN (sem_arg);
1308 #define OPRND(f) par_exec->operands.fmt_jc.f
1309   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1310   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1311   int taken_p = 0;
1312   EXTRACT_FMT_JC_VARS /* f-op1 f-r1 f-op2 f-r2 */
1313   EXTRACT_FMT_JC_CODE
1314
1315 if (NOTBI (OPRND (condbit))) {
1316   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (sr), -4)));
1317   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
1318 }
1319
1320 #if WITH_PROFILE_MODEL_P
1321   if (PROFILE_MODEL_P (current_cpu))
1322     {
1323       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1324       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1325     }
1326 #endif
1327
1328   return new_pc;
1329 #undef OPRND
1330 }
1331
1332 /* Perform jl: jl $sr.  */
1333 CIA
1334 SEM_FN_NAME (m32rx,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1335 {
1336   insn_t insn = SEM_INSN (sem_arg);
1337 #define OPRND(f) par_exec->operands.fmt_jl.f
1338   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1339   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1340   int taken_p = 0;
1341   EXTRACT_FMT_JL_VARS /* f-op1 f-r1 f-op2 f-r2 */
1342   EXTRACT_FMT_JL_CODE
1343
1344 do {
1345   SI temp1;SI temp0;
1346   temp0 = ADDSI (ANDSI (OPRND (pc), -4), 4);
1347   temp1 = OPRND (sr);
1348   CPU (h_gr[14]) = temp0;
1349   TRACE_RESULT (current_cpu, "h-gr-14", 'x', CPU (h_gr[14]));
1350   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, temp1));
1351   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
1352 } while (0);
1353
1354 #if WITH_PROFILE_MODEL_P
1355   if (PROFILE_MODEL_P (current_cpu))
1356     {
1357       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1358       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1359       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1360     }
1361 #endif
1362
1363   return new_pc;
1364 #undef OPRND
1365 }
1366
1367 /* Perform jmp: jmp $sr.  */
1368 CIA
1369 SEM_FN_NAME (m32rx,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1370 {
1371   insn_t insn = SEM_INSN (sem_arg);
1372 #define OPRND(f) par_exec->operands.fmt_jmp.f
1373   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1374   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1375   int taken_p = 0;
1376   EXTRACT_FMT_JMP_VARS /* f-op1 f-r1 f-op2 f-r2 */
1377   EXTRACT_FMT_JMP_CODE
1378
1379   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, OPRND (sr)));
1380   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
1381
1382 #if WITH_PROFILE_MODEL_P
1383   if (PROFILE_MODEL_P (current_cpu))
1384     {
1385       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1386       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
1387     }
1388 #endif
1389
1390   return new_pc;
1391 #undef OPRND
1392 }
1393
1394 /* Perform ld: ld $dr,@$sr.  */
1395 CIA
1396 SEM_FN_NAME (m32rx,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1397 {
1398   insn_t insn = SEM_INSN (sem_arg);
1399 #define OPRND(f) par_exec->operands.fmt_ld.f
1400   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1401   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1402   EXTRACT_FMT_LD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1403   EXTRACT_FMT_LD_CODE
1404
1405   CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
1406   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1407
1408 #if WITH_PROFILE_MODEL_P
1409   if (PROFILE_MODEL_P (current_cpu))
1410     {
1411       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1412       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1413       m32rx_model_profile_insn (current_cpu, abuf);
1414     }
1415 #endif
1416
1417   return new_pc;
1418 #undef OPRND
1419 }
1420
1421 /* Perform ld-d: ld $dr,@($slo16,$sr).  */
1422 CIA
1423 SEM_FN_NAME (m32rx,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1424 {
1425   insn_t insn = SEM_INSN (sem_arg);
1426 #define OPRND(f) par_exec->operands.fmt_ld_d.f
1427   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1428   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1429   EXTRACT_FMT_LD_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1430   EXTRACT_FMT_LD_D_CODE
1431
1432   CPU (h_gr[f_r1]) = OPRND (h_memory_add_WI_sr_slo16);
1433   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1434
1435 #if WITH_PROFILE_MODEL_P
1436   if (PROFILE_MODEL_P (current_cpu))
1437     {
1438       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1439       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1440       m32rx_model_profile_insn (current_cpu, abuf);
1441     }
1442 #endif
1443
1444   return new_pc;
1445 #undef OPRND
1446 }
1447
1448 /* Perform ldb: ldb $dr,@$sr.  */
1449 CIA
1450 SEM_FN_NAME (m32rx,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1451 {
1452   insn_t insn = SEM_INSN (sem_arg);
1453 #define OPRND(f) par_exec->operands.fmt_ldb.f
1454   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1455   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1456   EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
1457   EXTRACT_FMT_LDB_CODE
1458
1459   CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_sr));
1460   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1461
1462 #if WITH_PROFILE_MODEL_P
1463   if (PROFILE_MODEL_P (current_cpu))
1464     {
1465       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1466       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1467       m32rx_model_profile_insn (current_cpu, abuf);
1468     }
1469 #endif
1470
1471   return new_pc;
1472 #undef OPRND
1473 }
1474
1475 /* Perform ldb-d: ldb $dr,@($slo16,$sr).  */
1476 CIA
1477 SEM_FN_NAME (m32rx,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1478 {
1479   insn_t insn = SEM_INSN (sem_arg);
1480 #define OPRND(f) par_exec->operands.fmt_ldb_d.f
1481   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1482   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1483   EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1484   EXTRACT_FMT_LDB_D_CODE
1485
1486   CPU (h_gr[f_r1]) = EXTQISI (OPRND (h_memory_add_WI_sr_slo16));
1487   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1488
1489 #if WITH_PROFILE_MODEL_P
1490   if (PROFILE_MODEL_P (current_cpu))
1491     {
1492       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1493       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1494       m32rx_model_profile_insn (current_cpu, abuf);
1495     }
1496 #endif
1497
1498   return new_pc;
1499 #undef OPRND
1500 }
1501
1502 /* Perform ldh: ldh $dr,@$sr.  */
1503 CIA
1504 SEM_FN_NAME (m32rx,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1505 {
1506   insn_t insn = SEM_INSN (sem_arg);
1507 #define OPRND(f) par_exec->operands.fmt_ldh.f
1508   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1509   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1510   EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
1511   EXTRACT_FMT_LDH_CODE
1512
1513   CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_sr));
1514   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1515
1516 #if WITH_PROFILE_MODEL_P
1517   if (PROFILE_MODEL_P (current_cpu))
1518     {
1519       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1520       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1521       m32rx_model_profile_insn (current_cpu, abuf);
1522     }
1523 #endif
1524
1525   return new_pc;
1526 #undef OPRND
1527 }
1528
1529 /* Perform ldh-d: ldh $dr,@($slo16,$sr).  */
1530 CIA
1531 SEM_FN_NAME (m32rx,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1532 {
1533   insn_t insn = SEM_INSN (sem_arg);
1534 #define OPRND(f) par_exec->operands.fmt_ldh_d.f
1535   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1536   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1537   EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1538   EXTRACT_FMT_LDH_D_CODE
1539
1540   CPU (h_gr[f_r1]) = EXTHISI (OPRND (h_memory_add_WI_sr_slo16));
1541   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1542
1543 #if WITH_PROFILE_MODEL_P
1544   if (PROFILE_MODEL_P (current_cpu))
1545     {
1546       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1547       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1548       m32rx_model_profile_insn (current_cpu, abuf);
1549     }
1550 #endif
1551
1552   return new_pc;
1553 #undef OPRND
1554 }
1555
1556 /* Perform ldub: ldub $dr,@$sr.  */
1557 CIA
1558 SEM_FN_NAME (m32rx,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1559 {
1560   insn_t insn = SEM_INSN (sem_arg);
1561 #define OPRND(f) par_exec->operands.fmt_ldb.f
1562   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1563   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1564   EXTRACT_FMT_LDB_VARS /* f-op1 f-r1 f-op2 f-r2 */
1565   EXTRACT_FMT_LDB_CODE
1566
1567   CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_sr));
1568   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1569
1570 #if WITH_PROFILE_MODEL_P
1571   if (PROFILE_MODEL_P (current_cpu))
1572     {
1573       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1574       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1575       m32rx_model_profile_insn (current_cpu, abuf);
1576     }
1577 #endif
1578
1579   return new_pc;
1580 #undef OPRND
1581 }
1582
1583 /* Perform ldub-d: ldub $dr,@($slo16,$sr).  */
1584 CIA
1585 SEM_FN_NAME (m32rx,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1586 {
1587   insn_t insn = SEM_INSN (sem_arg);
1588 #define OPRND(f) par_exec->operands.fmt_ldb_d.f
1589   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1590   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1591   EXTRACT_FMT_LDB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1592   EXTRACT_FMT_LDB_D_CODE
1593
1594   CPU (h_gr[f_r1]) = ZEXTQISI (OPRND (h_memory_add_WI_sr_slo16));
1595   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1596
1597 #if WITH_PROFILE_MODEL_P
1598   if (PROFILE_MODEL_P (current_cpu))
1599     {
1600       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1601       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1602       m32rx_model_profile_insn (current_cpu, abuf);
1603     }
1604 #endif
1605
1606   return new_pc;
1607 #undef OPRND
1608 }
1609
1610 /* Perform lduh: lduh $dr,@$sr.  */
1611 CIA
1612 SEM_FN_NAME (m32rx,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1613 {
1614   insn_t insn = SEM_INSN (sem_arg);
1615 #define OPRND(f) par_exec->operands.fmt_ldh.f
1616   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1617   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1618   EXTRACT_FMT_LDH_VARS /* f-op1 f-r1 f-op2 f-r2 */
1619   EXTRACT_FMT_LDH_CODE
1620
1621   CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_sr));
1622   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1623
1624 #if WITH_PROFILE_MODEL_P
1625   if (PROFILE_MODEL_P (current_cpu))
1626     {
1627       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1628       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1629       m32rx_model_profile_insn (current_cpu, abuf);
1630     }
1631 #endif
1632
1633   return new_pc;
1634 #undef OPRND
1635 }
1636
1637 /* Perform lduh-d: lduh $dr,@($slo16,$sr).  */
1638 CIA
1639 SEM_FN_NAME (m32rx,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1640 {
1641   insn_t insn = SEM_INSN (sem_arg);
1642 #define OPRND(f) par_exec->operands.fmt_ldh_d.f
1643   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1644   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1645   EXTRACT_FMT_LDH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1646   EXTRACT_FMT_LDH_D_CODE
1647
1648   CPU (h_gr[f_r1]) = ZEXTHISI (OPRND (h_memory_add_WI_sr_slo16));
1649   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1650
1651 #if WITH_PROFILE_MODEL_P
1652   if (PROFILE_MODEL_P (current_cpu))
1653     {
1654       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1655       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1656       m32rx_model_profile_insn (current_cpu, abuf);
1657     }
1658 #endif
1659
1660   return new_pc;
1661 #undef OPRND
1662 }
1663
1664 /* Perform ld-plus: ld $dr,@$sr+.  */
1665 CIA
1666 SEM_FN_NAME (m32rx,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1667 {
1668   insn_t insn = SEM_INSN (sem_arg);
1669 #define OPRND(f) par_exec->operands.fmt_ld_plus.f
1670   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1671   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1672   EXTRACT_FMT_LD_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
1673   EXTRACT_FMT_LD_PLUS_CODE
1674
1675 do {
1676   SI temp1;SI temp0;
1677   temp0 = OPRND (h_memory_sr);
1678   temp1 = ADDSI (OPRND (sr), 4);
1679   CPU (h_gr[f_r1]) = temp0;
1680   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1681   CPU (h_gr[f_r2]) = temp1;
1682   TRACE_RESULT (current_cpu, "sr", 'x', CPU (h_gr[f_r2]));
1683 } while (0);
1684
1685 #if WITH_PROFILE_MODEL_P
1686   if (PROFILE_MODEL_P (current_cpu))
1687     {
1688       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1689       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1690       m32rx_model_profile_insn (current_cpu, abuf);
1691     }
1692 #endif
1693
1694   return new_pc;
1695 #undef OPRND
1696 }
1697
1698 /* Perform ld24: ld24 $dr,$uimm24.  */
1699 CIA
1700 SEM_FN_NAME (m32rx,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1701 {
1702   insn_t insn = SEM_INSN (sem_arg);
1703 #define OPRND(f) par_exec->operands.fmt_ld24.f
1704   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1705   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1706   EXTRACT_FMT_LD24_VARS /* f-op1 f-r1 f-uimm24 */
1707   EXTRACT_FMT_LD24_CODE
1708
1709   CPU (h_gr[f_r1]) = OPRND (uimm24);
1710   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1711
1712 #if WITH_PROFILE_MODEL_P
1713   if (PROFILE_MODEL_P (current_cpu))
1714     {
1715       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1716       m32rx_model_profile_insn (current_cpu, abuf);
1717     }
1718 #endif
1719
1720   return new_pc;
1721 #undef OPRND
1722 }
1723
1724 /* Perform ldi8: ldi $dr,$simm8.  */
1725 CIA
1726 SEM_FN_NAME (m32rx,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1727 {
1728   insn_t insn = SEM_INSN (sem_arg);
1729 #define OPRND(f) par_exec->operands.fmt_ldi8.f
1730   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1731   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1732   EXTRACT_FMT_LDI8_VARS /* f-op1 f-r1 f-simm8 */
1733   EXTRACT_FMT_LDI8_CODE
1734
1735   CPU (h_gr[f_r1]) = OPRND (simm8);
1736   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1737
1738 #if WITH_PROFILE_MODEL_P
1739   if (PROFILE_MODEL_P (current_cpu))
1740     {
1741       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1742       m32rx_model_profile_insn (current_cpu, abuf);
1743     }
1744 #endif
1745
1746   return new_pc;
1747 #undef OPRND
1748 }
1749
1750 /* Perform ldi16: ldi $dr,$hash$slo16.  */
1751 CIA
1752 SEM_FN_NAME (m32rx,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1753 {
1754   insn_t insn = SEM_INSN (sem_arg);
1755 #define OPRND(f) par_exec->operands.fmt_ldi16.f
1756   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1757   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
1758   EXTRACT_FMT_LDI16_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
1759   EXTRACT_FMT_LDI16_CODE
1760
1761   CPU (h_gr[f_r1]) = OPRND (slo16);
1762   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1763
1764 #if WITH_PROFILE_MODEL_P
1765   if (PROFILE_MODEL_P (current_cpu))
1766     {
1767       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1768       m32rx_model_profile_insn (current_cpu, abuf);
1769     }
1770 #endif
1771
1772   return new_pc;
1773 #undef OPRND
1774 }
1775
1776 /* Perform lock: lock $dr,@$sr.  */
1777 CIA
1778 SEM_FN_NAME (m32rx,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1779 {
1780   insn_t insn = SEM_INSN (sem_arg);
1781 #define OPRND(f) par_exec->operands.fmt_lock.f
1782   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1783   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1784   EXTRACT_FMT_LOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
1785   EXTRACT_FMT_LOCK_CODE
1786
1787 do {
1788   CPU (h_lock) = 1;
1789   TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
1790   CPU (h_gr[f_r1]) = OPRND (h_memory_sr);
1791   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1792 } while (0);
1793
1794 #if WITH_PROFILE_MODEL_P
1795   if (PROFILE_MODEL_P (current_cpu))
1796     {
1797       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1798       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1799       m32rx_model_profile_insn (current_cpu, abuf);
1800     }
1801 #endif
1802
1803   return new_pc;
1804 #undef OPRND
1805 }
1806
1807 /* Perform machi-a: machi $src1,$src2,$acc.  */
1808 CIA
1809 SEM_FN_NAME (m32rx,machi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1810 {
1811   insn_t insn = SEM_INSN (sem_arg);
1812 #define OPRND(f) par_exec->operands.fmt_machi_a.f
1813   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1814   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1815   EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1816   EXTRACT_FMT_MACHI_A_CODE
1817
1818 m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8));
1819   TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1820
1821 #if WITH_PROFILE_MODEL_P
1822   if (PROFILE_MODEL_P (current_cpu))
1823     {
1824       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1825       m32rx_model_profile_insn (current_cpu, abuf);
1826     }
1827 #endif
1828
1829   return new_pc;
1830 #undef OPRND
1831 }
1832
1833 /* Perform maclo-a: maclo $src1,$src2,$acc.  */
1834 CIA
1835 SEM_FN_NAME (m32rx,maclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1836 {
1837   insn_t insn = SEM_INSN (sem_arg);
1838 #define OPRND(f) par_exec->operands.fmt_machi_a.f
1839   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1840   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1841   EXTRACT_FMT_MACHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1842   EXTRACT_FMT_MACHI_A_CODE
1843
1844 m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (ADDDI (OPRND (acc), MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8));
1845   TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1846
1847 #if WITH_PROFILE_MODEL_P
1848   if (PROFILE_MODEL_P (current_cpu))
1849     {
1850       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1851       m32rx_model_profile_insn (current_cpu, abuf);
1852     }
1853 #endif
1854
1855   return new_pc;
1856 #undef OPRND
1857 }
1858
1859 /* Perform macwhi: macwhi $src1,$src2.  */
1860 CIA
1861 SEM_FN_NAME (m32rx,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1862 {
1863   insn_t insn = SEM_INSN (sem_arg);
1864 #define OPRND(f) par_exec->operands.fmt_macwhi.f
1865   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1866   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1867   EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
1868   EXTRACT_FMT_MACWHI_CODE
1869
1870   CPU (h_accum) = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16))))), 8), 8);
1871   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1872
1873 #if WITH_PROFILE_MODEL_P
1874   if (PROFILE_MODEL_P (current_cpu))
1875     {
1876       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1877       m32rx_model_profile_insn (current_cpu, abuf);
1878     }
1879 #endif
1880
1881   return new_pc;
1882 #undef OPRND
1883 }
1884
1885 /* Perform macwlo: macwlo $src1,$src2.  */
1886 CIA
1887 SEM_FN_NAME (m32rx,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1888 {
1889   insn_t insn = SEM_INSN (sem_arg);
1890 #define OPRND(f) par_exec->operands.fmt_macwhi.f
1891   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1892   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1893   EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
1894   EXTRACT_FMT_MACWHI_CODE
1895
1896   CPU (h_accum) = SRADI (SLLDI (ADDDI (OPRND (accum), MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2))))), 8), 8);
1897   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
1898
1899 #if WITH_PROFILE_MODEL_P
1900   if (PROFILE_MODEL_P (current_cpu))
1901     {
1902       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1903       m32rx_model_profile_insn (current_cpu, abuf);
1904     }
1905 #endif
1906
1907   return new_pc;
1908 #undef OPRND
1909 }
1910
1911 /* Perform mul: mul $dr,$sr.  */
1912 CIA
1913 SEM_FN_NAME (m32rx,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1914 {
1915   insn_t insn = SEM_INSN (sem_arg);
1916 #define OPRND(f) par_exec->operands.fmt_add.f
1917   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1918   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1919   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
1920   EXTRACT_FMT_ADD_CODE
1921
1922   CPU (h_gr[f_r1]) = MULSI (OPRND (dr), OPRND (sr));
1923   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
1924
1925 #if WITH_PROFILE_MODEL_P
1926   if (PROFILE_MODEL_P (current_cpu))
1927     {
1928       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1929       m32rx_model_mark_set_h_gr (current_cpu, abuf);
1930       m32rx_model_profile_insn (current_cpu, abuf);
1931     }
1932 #endif
1933
1934   return new_pc;
1935 #undef OPRND
1936 }
1937
1938 /* Perform mulhi-a: mulhi $src1,$src2,$acc.  */
1939 CIA
1940 SEM_FN_NAME (m32rx,mulhi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1941 {
1942   insn_t insn = SEM_INSN (sem_arg);
1943 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
1944   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1945   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1946   EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1947   EXTRACT_FMT_MULHI_A_CODE
1948
1949 m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (OPRND (src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 16), 16));
1950   TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1951
1952 #if WITH_PROFILE_MODEL_P
1953   if (PROFILE_MODEL_P (current_cpu))
1954     {
1955       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1956       m32rx_model_profile_insn (current_cpu, abuf);
1957     }
1958 #endif
1959
1960   return new_pc;
1961 #undef OPRND
1962 }
1963
1964 /* Perform mullo-a: mullo $src1,$src2,$acc.  */
1965 CIA
1966 SEM_FN_NAME (m32rx,mullo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1967 {
1968   insn_t insn = SEM_INSN (sem_arg);
1969 #define OPRND(f) par_exec->operands.fmt_mulhi_a.f
1970   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1971   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1972   EXTRACT_FMT_MULHI_A_VARS /* f-op1 f-r1 f-acc f-op23 f-r2 */
1973   EXTRACT_FMT_MULHI_A_CODE
1974
1975 m32rx_h_accums_set (current_cpu, f_acc, SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 16), 16));
1976   TRACE_RESULT (current_cpu, "acc", 'D', m32rx_h_accums_get (current_cpu, f_acc));
1977
1978 #if WITH_PROFILE_MODEL_P
1979   if (PROFILE_MODEL_P (current_cpu))
1980     {
1981       m32rx_model_mark_get_h_gr (current_cpu, abuf);
1982       m32rx_model_profile_insn (current_cpu, abuf);
1983     }
1984 #endif
1985
1986   return new_pc;
1987 #undef OPRND
1988 }
1989
1990 /* Perform mulwhi: mulwhi $src1,$src2.  */
1991 CIA
1992 SEM_FN_NAME (m32rx,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
1993 {
1994   insn_t insn = SEM_INSN (sem_arg);
1995 #define OPRND(f) par_exec->operands.fmt_mulwhi.f
1996   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1997   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
1998   EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
1999   EXTRACT_FMT_MULWHI_CODE
2000
2001   CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (SRASI (OPRND (src2), 16)))), 8), 8);
2002   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
2003
2004 #if WITH_PROFILE_MODEL_P
2005   if (PROFILE_MODEL_P (current_cpu))
2006     {
2007       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2008       m32rx_model_profile_insn (current_cpu, abuf);
2009     }
2010 #endif
2011
2012   return new_pc;
2013 #undef OPRND
2014 }
2015
2016 /* Perform mulwlo: mulwlo $src1,$src2.  */
2017 CIA
2018 SEM_FN_NAME (m32rx,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2019 {
2020   insn_t insn = SEM_INSN (sem_arg);
2021 #define OPRND(f) par_exec->operands.fmt_mulwhi.f
2022   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2023   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2024   EXTRACT_FMT_MULWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
2025   EXTRACT_FMT_MULWHI_CODE
2026
2027   CPU (h_accum) = SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 8), 8);
2028   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
2029
2030 #if WITH_PROFILE_MODEL_P
2031   if (PROFILE_MODEL_P (current_cpu))
2032     {
2033       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2034       m32rx_model_profile_insn (current_cpu, abuf);
2035     }
2036 #endif
2037
2038   return new_pc;
2039 #undef OPRND
2040 }
2041
2042 /* Perform mv: mv $dr,$sr.  */
2043 CIA
2044 SEM_FN_NAME (m32rx,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2045 {
2046   insn_t insn = SEM_INSN (sem_arg);
2047 #define OPRND(f) par_exec->operands.fmt_mv.f
2048   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2049   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2050   EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2051   EXTRACT_FMT_MV_CODE
2052
2053   CPU (h_gr[f_r1]) = OPRND (sr);
2054   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2055
2056 #if WITH_PROFILE_MODEL_P
2057   if (PROFILE_MODEL_P (current_cpu))
2058     {
2059       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2060       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2061       m32rx_model_profile_insn (current_cpu, abuf);
2062     }
2063 #endif
2064
2065   return new_pc;
2066 #undef OPRND
2067 }
2068
2069 /* Perform mvfachi-a: mvfachi $dr,$accs.  */
2070 CIA
2071 SEM_FN_NAME (m32rx,mvfachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2072 {
2073   insn_t insn = SEM_INSN (sem_arg);
2074 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
2075   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2076   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2077   EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2078   EXTRACT_FMT_MVFACHI_A_CODE
2079
2080   CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 32));
2081   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2082
2083 #if WITH_PROFILE_MODEL_P
2084   if (PROFILE_MODEL_P (current_cpu))
2085     {
2086       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2087       m32rx_model_profile_insn (current_cpu, abuf);
2088     }
2089 #endif
2090
2091   return new_pc;
2092 #undef OPRND
2093 }
2094
2095 /* Perform mvfaclo-a: mvfaclo $dr,$accs.  */
2096 CIA
2097 SEM_FN_NAME (m32rx,mvfaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2098 {
2099   insn_t insn = SEM_INSN (sem_arg);
2100 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
2101   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2102   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2103   EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2104   EXTRACT_FMT_MVFACHI_A_CODE
2105
2106   CPU (h_gr[f_r1]) = TRUNCDISI (OPRND (accs));
2107   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2108
2109 #if WITH_PROFILE_MODEL_P
2110   if (PROFILE_MODEL_P (current_cpu))
2111     {
2112       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2113       m32rx_model_profile_insn (current_cpu, abuf);
2114     }
2115 #endif
2116
2117   return new_pc;
2118 #undef OPRND
2119 }
2120
2121 /* Perform mvfacmi-a: mvfacmi $dr,$accs.  */
2122 CIA
2123 SEM_FN_NAME (m32rx,mvfacmi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2124 {
2125   insn_t insn = SEM_INSN (sem_arg);
2126 #define OPRND(f) par_exec->operands.fmt_mvfachi_a.f
2127   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2128   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2129   EXTRACT_FMT_MVFACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2130   EXTRACT_FMT_MVFACHI_A_CODE
2131
2132   CPU (h_gr[f_r1]) = TRUNCDISI (SRADI (OPRND (accs), 16));
2133   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2134
2135 #if WITH_PROFILE_MODEL_P
2136   if (PROFILE_MODEL_P (current_cpu))
2137     {
2138       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2139       m32rx_model_profile_insn (current_cpu, abuf);
2140     }
2141 #endif
2142
2143   return new_pc;
2144 #undef OPRND
2145 }
2146
2147 /* Perform mvfc: mvfc $dr,$scr.  */
2148 CIA
2149 SEM_FN_NAME (m32rx,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2150 {
2151   insn_t insn = SEM_INSN (sem_arg);
2152 #define OPRND(f) par_exec->operands.fmt_mvfc.f
2153   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2154   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2155   EXTRACT_FMT_MVFC_VARS /* f-op1 f-r1 f-op2 f-r2 */
2156   EXTRACT_FMT_MVFC_CODE
2157
2158   CPU (h_gr[f_r1]) = OPRND (scr);
2159   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2160
2161 #if WITH_PROFILE_MODEL_P
2162   if (PROFILE_MODEL_P (current_cpu))
2163     {
2164       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2165       m32rx_model_profile_insn (current_cpu, abuf);
2166     }
2167 #endif
2168
2169   return new_pc;
2170 #undef OPRND
2171 }
2172
2173 /* Perform mvtachi-a: mvtachi $src1,$accs.  */
2174 CIA
2175 SEM_FN_NAME (m32rx,mvtachi_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2176 {
2177   insn_t insn = SEM_INSN (sem_arg);
2178 #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
2179   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2180   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2181   EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2182   EXTRACT_FMT_MVTACHI_A_CODE
2183
2184 m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (OPRND (src1)), 32)));
2185   TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
2186
2187 #if WITH_PROFILE_MODEL_P
2188   if (PROFILE_MODEL_P (current_cpu))
2189     {
2190       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2191       m32rx_model_profile_insn (current_cpu, abuf);
2192     }
2193 #endif
2194
2195   return new_pc;
2196 #undef OPRND
2197 }
2198
2199 /* Perform mvtaclo-a: mvtaclo $src1,$accs.  */
2200 CIA
2201 SEM_FN_NAME (m32rx,mvtaclo_a) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2202 {
2203   insn_t insn = SEM_INSN (sem_arg);
2204 #define OPRND(f) par_exec->operands.fmt_mvtachi_a.f
2205   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2206   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2207   EXTRACT_FMT_MVTACHI_A_VARS /* f-op1 f-r1 f-op2 f-accs f-op3 */
2208   EXTRACT_FMT_MVTACHI_A_CODE
2209
2210 m32rx_h_accums_set (current_cpu, f_accs, ORDI (ANDDI (OPRND (accs), MAKEDI (0xffffffff, 0)), ZEXTSIDI (OPRND (src1))));
2211   TRACE_RESULT (current_cpu, "accs", 'D', m32rx_h_accums_get (current_cpu, f_accs));
2212
2213 #if WITH_PROFILE_MODEL_P
2214   if (PROFILE_MODEL_P (current_cpu))
2215     {
2216       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2217       m32rx_model_profile_insn (current_cpu, abuf);
2218     }
2219 #endif
2220
2221   return new_pc;
2222 #undef OPRND
2223 }
2224
2225 /* Perform mvtc: mvtc $sr,$dcr.  */
2226 CIA
2227 SEM_FN_NAME (m32rx,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2228 {
2229   insn_t insn = SEM_INSN (sem_arg);
2230 #define OPRND(f) par_exec->operands.fmt_mvtc.f
2231   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2232   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2233   EXTRACT_FMT_MVTC_VARS /* f-op1 f-r1 f-op2 f-r2 */
2234   EXTRACT_FMT_MVTC_CODE
2235
2236 m32rx_h_cr_set (current_cpu, f_r1, OPRND (sr));
2237   TRACE_RESULT (current_cpu, "dcr", 'x', m32rx_h_cr_get (current_cpu, f_r1));
2238
2239 #if WITH_PROFILE_MODEL_P
2240   if (PROFILE_MODEL_P (current_cpu))
2241     {
2242       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2243       m32rx_model_profile_insn (current_cpu, abuf);
2244     }
2245 #endif
2246
2247   return new_pc;
2248 #undef OPRND
2249 }
2250
2251 /* Perform neg: neg $dr,$sr.  */
2252 CIA
2253 SEM_FN_NAME (m32rx,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2254 {
2255   insn_t insn = SEM_INSN (sem_arg);
2256 #define OPRND(f) par_exec->operands.fmt_mv.f
2257   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2258   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2259   EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2260   EXTRACT_FMT_MV_CODE
2261
2262   CPU (h_gr[f_r1]) = NEGSI (OPRND (sr));
2263   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2264
2265 #if WITH_PROFILE_MODEL_P
2266   if (PROFILE_MODEL_P (current_cpu))
2267     {
2268       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2269       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2270       m32rx_model_profile_insn (current_cpu, abuf);
2271     }
2272 #endif
2273
2274   return new_pc;
2275 #undef OPRND
2276 }
2277
2278 /* Perform nop: nop.  */
2279 CIA
2280 SEM_FN_NAME (m32rx,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2281 {
2282   insn_t insn = SEM_INSN (sem_arg);
2283 #define OPRND(f) par_exec->operands.fmt_nop.f
2284   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2285   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2286   EXTRACT_FMT_NOP_VARS /* f-op1 f-r1 f-op2 f-r2 */
2287   EXTRACT_FMT_NOP_CODE
2288
2289 PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
2290
2291 #if WITH_PROFILE_MODEL_P
2292   if (PROFILE_MODEL_P (current_cpu))
2293     {
2294       m32rx_model_profile_insn (current_cpu, abuf);
2295     }
2296 #endif
2297
2298   return new_pc;
2299 #undef OPRND
2300 }
2301
2302 /* Perform not: not $dr,$sr.  */
2303 CIA
2304 SEM_FN_NAME (m32rx,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2305 {
2306   insn_t insn = SEM_INSN (sem_arg);
2307 #define OPRND(f) par_exec->operands.fmt_mv.f
2308   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2309   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2310   EXTRACT_FMT_MV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2311   EXTRACT_FMT_MV_CODE
2312
2313   CPU (h_gr[f_r1]) = INVSI (OPRND (sr));
2314   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2315
2316 #if WITH_PROFILE_MODEL_P
2317   if (PROFILE_MODEL_P (current_cpu))
2318     {
2319       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2320       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2321       m32rx_model_profile_insn (current_cpu, abuf);
2322     }
2323 #endif
2324
2325   return new_pc;
2326 #undef OPRND
2327 }
2328
2329 /* Perform rac-dsi: rac $accd,$accs,$imm1.  */
2330 CIA
2331 SEM_FN_NAME (m32rx,rac_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2332 {
2333   insn_t insn = SEM_INSN (sem_arg);
2334 #define OPRND(f) par_exec->operands.fmt_rac_dsi.f
2335   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2336   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2337   EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
2338   EXTRACT_FMT_RAC_DSI_CODE
2339
2340 do {
2341   DI tmp_tmp1;
2342   tmp_tmp1 = SLLDI (OPRND (accs), OPRND (imm1));
2343   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
2344 m32rx_h_accums_set (current_cpu, f_accd, (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000))));
2345   TRACE_RESULT (current_cpu, "accd", 'D', m32rx_h_accums_get (current_cpu, f_accd));
2346 } while (0);
2347
2348 #if WITH_PROFILE_MODEL_P
2349   if (PROFILE_MODEL_P (current_cpu))
2350     {
2351       m32rx_model_profile_insn (current_cpu, abuf);
2352     }
2353 #endif
2354
2355   return new_pc;
2356 #undef OPRND
2357 }
2358
2359 /* Perform rach-dsi: rach $accd,$accs,$imm1.  */
2360 CIA
2361 SEM_FN_NAME (m32rx,rach_dsi) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2362 {
2363   insn_t insn = SEM_INSN (sem_arg);
2364 #define OPRND(f) par_exec->operands.fmt_rac_dsi.f
2365   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2366   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2367   EXTRACT_FMT_RAC_DSI_VARS /* f-op1 f-accd f-bits67 f-op2 f-accs f-bit14 f-imm1 */
2368   EXTRACT_FMT_RAC_DSI_CODE
2369
2370 do {
2371   DI tmp_tmp1;
2372   tmp_tmp1 = SLLDI (OPRND (accs), OPRND (imm1));
2373   tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 0x80000000));
2374 m32rx_h_accums_set (current_cpu, f_accd, (GTDI (tmp_tmp1, MAKEDI (32767, 0))) ? (MAKEDI (32767, 0)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0))));
2375   TRACE_RESULT (current_cpu, "accd", 'D', m32rx_h_accums_get (current_cpu, f_accd));
2376 } while (0);
2377
2378 #if WITH_PROFILE_MODEL_P
2379   if (PROFILE_MODEL_P (current_cpu))
2380     {
2381       m32rx_model_profile_insn (current_cpu, abuf);
2382     }
2383 #endif
2384
2385   return new_pc;
2386 #undef OPRND
2387 }
2388
2389 /* Perform rte: rte.  */
2390 CIA
2391 SEM_FN_NAME (m32rx,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2392 {
2393   insn_t insn = SEM_INSN (sem_arg);
2394 #define OPRND(f) par_exec->operands.fmt_rte.f
2395   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2396   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2397   int taken_p = 0;
2398   EXTRACT_FMT_RTE_VARS /* f-op1 f-r1 f-op2 f-r2 */
2399   EXTRACT_FMT_RTE_CODE
2400
2401 do {
2402   CPU (h_sm) = OPRND (h_bsm_0);
2403   TRACE_RESULT (current_cpu, "h-sm-0", 'x', CPU (h_sm));
2404   CPU (h_ie) = OPRND (h_bie_0);
2405   TRACE_RESULT (current_cpu, "h-ie-0", 'x', CPU (h_ie));
2406   CPU (h_cond) = OPRND (h_bcond_0);
2407   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
2408   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, ANDSI (OPRND (h_bpc_0), -4)));
2409   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
2410 } while (0);
2411
2412 #if WITH_PROFILE_MODEL_P
2413   if (PROFILE_MODEL_P (current_cpu))
2414     {
2415       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
2416     }
2417 #endif
2418
2419   return new_pc;
2420 #undef OPRND
2421 }
2422
2423 /* Perform seth: seth $dr,$hash$hi16.  */
2424 CIA
2425 SEM_FN_NAME (m32rx,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2426 {
2427   insn_t insn = SEM_INSN (sem_arg);
2428 #define OPRND(f) par_exec->operands.fmt_seth.f
2429   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2430   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2431   EXTRACT_FMT_SETH_VARS /* f-op1 f-r1 f-op2 f-r2 f-hi16 */
2432   EXTRACT_FMT_SETH_CODE
2433
2434   CPU (h_gr[f_r1]) = SLLSI (OPRND (hi16), 16);
2435   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2436
2437 #if WITH_PROFILE_MODEL_P
2438   if (PROFILE_MODEL_P (current_cpu))
2439     {
2440       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2441       m32rx_model_profile_insn (current_cpu, abuf);
2442     }
2443 #endif
2444
2445   return new_pc;
2446 #undef OPRND
2447 }
2448
2449 /* Perform sll: sll $dr,$sr.  */
2450 CIA
2451 SEM_FN_NAME (m32rx,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2452 {
2453   insn_t insn = SEM_INSN (sem_arg);
2454 #define OPRND(f) par_exec->operands.fmt_add.f
2455   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2456   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2457   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2458   EXTRACT_FMT_ADD_CODE
2459
2460   CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
2461   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2462
2463 #if WITH_PROFILE_MODEL_P
2464   if (PROFILE_MODEL_P (current_cpu))
2465     {
2466       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2467       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2468       m32rx_model_profile_insn (current_cpu, abuf);
2469     }
2470 #endif
2471
2472   return new_pc;
2473 #undef OPRND
2474 }
2475
2476 /* Perform sll3: sll3 $dr,$sr,$simm16.  */
2477 CIA
2478 SEM_FN_NAME (m32rx,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2479 {
2480   insn_t insn = SEM_INSN (sem_arg);
2481 #define OPRND(f) par_exec->operands.fmt_sll3.f
2482   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2483   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2484   EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2485   EXTRACT_FMT_SLL3_CODE
2486
2487   CPU (h_gr[f_r1]) = SLLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
2488   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2489
2490 #if WITH_PROFILE_MODEL_P
2491   if (PROFILE_MODEL_P (current_cpu))
2492     {
2493       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2494       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2495       m32rx_model_profile_insn (current_cpu, abuf);
2496     }
2497 #endif
2498
2499   return new_pc;
2500 #undef OPRND
2501 }
2502
2503 /* Perform slli: slli $dr,$uimm5.  */
2504 CIA
2505 SEM_FN_NAME (m32rx,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2506 {
2507   insn_t insn = SEM_INSN (sem_arg);
2508 #define OPRND(f) par_exec->operands.fmt_slli.f
2509   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2510   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2511   EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2512   EXTRACT_FMT_SLLI_CODE
2513
2514   CPU (h_gr[f_r1]) = SLLSI (OPRND (dr), OPRND (uimm5));
2515   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2516
2517 #if WITH_PROFILE_MODEL_P
2518   if (PROFILE_MODEL_P (current_cpu))
2519     {
2520       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2521       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2522       m32rx_model_profile_insn (current_cpu, abuf);
2523     }
2524 #endif
2525
2526   return new_pc;
2527 #undef OPRND
2528 }
2529
2530 /* Perform sra: sra $dr,$sr.  */
2531 CIA
2532 SEM_FN_NAME (m32rx,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2533 {
2534   insn_t insn = SEM_INSN (sem_arg);
2535 #define OPRND(f) par_exec->operands.fmt_add.f
2536   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2537   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2538   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2539   EXTRACT_FMT_ADD_CODE
2540
2541   CPU (h_gr[f_r1]) = SRASI (OPRND (dr), ANDSI (OPRND (sr), 31));
2542   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2543
2544 #if WITH_PROFILE_MODEL_P
2545   if (PROFILE_MODEL_P (current_cpu))
2546     {
2547       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2548       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2549       m32rx_model_profile_insn (current_cpu, abuf);
2550     }
2551 #endif
2552
2553   return new_pc;
2554 #undef OPRND
2555 }
2556
2557 /* Perform sra3: sra3 $dr,$sr,$simm16.  */
2558 CIA
2559 SEM_FN_NAME (m32rx,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2560 {
2561   insn_t insn = SEM_INSN (sem_arg);
2562 #define OPRND(f) par_exec->operands.fmt_sll3.f
2563   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2564   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2565   EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2566   EXTRACT_FMT_SLL3_CODE
2567
2568   CPU (h_gr[f_r1]) = SRASI (OPRND (sr), ANDSI (OPRND (simm16), 31));
2569   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2570
2571 #if WITH_PROFILE_MODEL_P
2572   if (PROFILE_MODEL_P (current_cpu))
2573     {
2574       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2575       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2576       m32rx_model_profile_insn (current_cpu, abuf);
2577     }
2578 #endif
2579
2580   return new_pc;
2581 #undef OPRND
2582 }
2583
2584 /* Perform srai: srai $dr,$uimm5.  */
2585 CIA
2586 SEM_FN_NAME (m32rx,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2587 {
2588   insn_t insn = SEM_INSN (sem_arg);
2589 #define OPRND(f) par_exec->operands.fmt_slli.f
2590   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2591   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2592   EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2593   EXTRACT_FMT_SLLI_CODE
2594
2595   CPU (h_gr[f_r1]) = SRASI (OPRND (dr), OPRND (uimm5));
2596   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2597
2598 #if WITH_PROFILE_MODEL_P
2599   if (PROFILE_MODEL_P (current_cpu))
2600     {
2601       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2602       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2603       m32rx_model_profile_insn (current_cpu, abuf);
2604     }
2605 #endif
2606
2607   return new_pc;
2608 #undef OPRND
2609 }
2610
2611 /* Perform srl: srl $dr,$sr.  */
2612 CIA
2613 SEM_FN_NAME (m32rx,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2614 {
2615   insn_t insn = SEM_INSN (sem_arg);
2616 #define OPRND(f) par_exec->operands.fmt_add.f
2617   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2618   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2619   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2620   EXTRACT_FMT_ADD_CODE
2621
2622   CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), ANDSI (OPRND (sr), 31));
2623   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2624
2625 #if WITH_PROFILE_MODEL_P
2626   if (PROFILE_MODEL_P (current_cpu))
2627     {
2628       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2629       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2630       m32rx_model_profile_insn (current_cpu, abuf);
2631     }
2632 #endif
2633
2634   return new_pc;
2635 #undef OPRND
2636 }
2637
2638 /* Perform srl3: srl3 $dr,$sr,$simm16.  */
2639 CIA
2640 SEM_FN_NAME (m32rx,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2641 {
2642   insn_t insn = SEM_INSN (sem_arg);
2643 #define OPRND(f) par_exec->operands.fmt_sll3.f
2644   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2645   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2646   EXTRACT_FMT_SLL3_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2647   EXTRACT_FMT_SLL3_CODE
2648
2649   CPU (h_gr[f_r1]) = SRLSI (OPRND (sr), ANDSI (OPRND (simm16), 31));
2650   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2651
2652 #if WITH_PROFILE_MODEL_P
2653   if (PROFILE_MODEL_P (current_cpu))
2654     {
2655       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2656       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2657       m32rx_model_profile_insn (current_cpu, abuf);
2658     }
2659 #endif
2660
2661   return new_pc;
2662 #undef OPRND
2663 }
2664
2665 /* Perform srli: srli $dr,$uimm5.  */
2666 CIA
2667 SEM_FN_NAME (m32rx,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2668 {
2669   insn_t insn = SEM_INSN (sem_arg);
2670 #define OPRND(f) par_exec->operands.fmt_slli.f
2671   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2672   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2673   EXTRACT_FMT_SLLI_VARS /* f-op1 f-r1 f-shift-op2 f-uimm5 */
2674   EXTRACT_FMT_SLLI_CODE
2675
2676   CPU (h_gr[f_r1]) = SRLSI (OPRND (dr), OPRND (uimm5));
2677   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2678
2679 #if WITH_PROFILE_MODEL_P
2680   if (PROFILE_MODEL_P (current_cpu))
2681     {
2682       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2683       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2684       m32rx_model_profile_insn (current_cpu, abuf);
2685     }
2686 #endif
2687
2688   return new_pc;
2689 #undef OPRND
2690 }
2691
2692 /* Perform st: st $src1,@$src2.  */
2693 CIA
2694 SEM_FN_NAME (m32rx,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2695 {
2696   insn_t insn = SEM_INSN (sem_arg);
2697 #define OPRND(f) par_exec->operands.fmt_st.f
2698   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2699   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2700   EXTRACT_FMT_ST_VARS /* f-op1 f-r1 f-op2 f-r2 */
2701   EXTRACT_FMT_ST_CODE
2702
2703 SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
2704   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
2705
2706 #if WITH_PROFILE_MODEL_P
2707   if (PROFILE_MODEL_P (current_cpu))
2708     {
2709       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2710       m32rx_model_profile_insn (current_cpu, abuf);
2711     }
2712 #endif
2713
2714   return new_pc;
2715 #undef OPRND
2716 }
2717
2718 /* Perform st-d: st $src1,@($slo16,$src2).  */
2719 CIA
2720 SEM_FN_NAME (m32rx,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2721 {
2722   insn_t insn = SEM_INSN (sem_arg);
2723 #define OPRND(f) par_exec->operands.fmt_st_d.f
2724   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2725   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2726   EXTRACT_FMT_ST_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2727   EXTRACT_FMT_ST_D_CODE
2728
2729 SETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
2730   TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMSI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2731
2732 #if WITH_PROFILE_MODEL_P
2733   if (PROFILE_MODEL_P (current_cpu))
2734     {
2735       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2736       m32rx_model_profile_insn (current_cpu, abuf);
2737     }
2738 #endif
2739
2740   return new_pc;
2741 #undef OPRND
2742 }
2743
2744 /* Perform stb: stb $src1,@$src2.  */
2745 CIA
2746 SEM_FN_NAME (m32rx,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2747 {
2748   insn_t insn = SEM_INSN (sem_arg);
2749 #define OPRND(f) par_exec->operands.fmt_stb.f
2750   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2751   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2752   EXTRACT_FMT_STB_VARS /* f-op1 f-r1 f-op2 f-r2 */
2753   EXTRACT_FMT_STB_CODE
2754
2755 SETMEMQI (current_cpu, OPRND (src2), OPRND (src1));
2756   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMQI (current_cpu, OPRND (src2)));
2757
2758 #if WITH_PROFILE_MODEL_P
2759   if (PROFILE_MODEL_P (current_cpu))
2760     {
2761       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2762       m32rx_model_profile_insn (current_cpu, abuf);
2763     }
2764 #endif
2765
2766   return new_pc;
2767 #undef OPRND
2768 }
2769
2770 /* Perform stb-d: stb $src1,@($slo16,$src2).  */
2771 CIA
2772 SEM_FN_NAME (m32rx,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2773 {
2774   insn_t insn = SEM_INSN (sem_arg);
2775 #define OPRND(f) par_exec->operands.fmt_stb_d.f
2776   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2777   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2778   EXTRACT_FMT_STB_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2779   EXTRACT_FMT_STB_D_CODE
2780
2781 SETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
2782   TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMQI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2783
2784 #if WITH_PROFILE_MODEL_P
2785   if (PROFILE_MODEL_P (current_cpu))
2786     {
2787       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2788       m32rx_model_profile_insn (current_cpu, abuf);
2789     }
2790 #endif
2791
2792   return new_pc;
2793 #undef OPRND
2794 }
2795
2796 /* Perform sth: sth $src1,@$src2.  */
2797 CIA
2798 SEM_FN_NAME (m32rx,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2799 {
2800   insn_t insn = SEM_INSN (sem_arg);
2801 #define OPRND(f) par_exec->operands.fmt_sth.f
2802   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2803   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2804   EXTRACT_FMT_STH_VARS /* f-op1 f-r1 f-op2 f-r2 */
2805   EXTRACT_FMT_STH_CODE
2806
2807 SETMEMHI (current_cpu, OPRND (src2), OPRND (src1));
2808   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMHI (current_cpu, OPRND (src2)));
2809
2810 #if WITH_PROFILE_MODEL_P
2811   if (PROFILE_MODEL_P (current_cpu))
2812     {
2813       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2814       m32rx_model_profile_insn (current_cpu, abuf);
2815     }
2816 #endif
2817
2818   return new_pc;
2819 #undef OPRND
2820 }
2821
2822 /* Perform sth-d: sth $src1,@($slo16,$src2).  */
2823 CIA
2824 SEM_FN_NAME (m32rx,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2825 {
2826   insn_t insn = SEM_INSN (sem_arg);
2827 #define OPRND(f) par_exec->operands.fmt_sth_d.f
2828   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2829   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
2830   EXTRACT_FMT_STH_D_VARS /* f-op1 f-r1 f-op2 f-r2 f-simm16 */
2831   EXTRACT_FMT_STH_D_CODE
2832
2833 SETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16)), OPRND (src1));
2834   TRACE_RESULT (current_cpu, "h-memory-add-WI-src2-slo16", 'x', GETMEMHI (current_cpu, ADDSI (OPRND (src2), OPRND (slo16))));
2835
2836 #if WITH_PROFILE_MODEL_P
2837   if (PROFILE_MODEL_P (current_cpu))
2838     {
2839       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2840       m32rx_model_profile_insn (current_cpu, abuf);
2841     }
2842 #endif
2843
2844   return new_pc;
2845 #undef OPRND
2846 }
2847
2848 /* Perform st-plus: st $src1,@+$src2.  */
2849 CIA
2850 SEM_FN_NAME (m32rx,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2851 {
2852   insn_t insn = SEM_INSN (sem_arg);
2853 #define OPRND(f) par_exec->operands.fmt_st_plus.f
2854   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2855   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2856   EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
2857   EXTRACT_FMT_ST_PLUS_CODE
2858
2859 do {
2860   SI tmp_new_src2;
2861   tmp_new_src2 = ADDSI (OPRND (src2), 4);
2862 SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
2863   TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
2864   CPU (h_gr[f_r2]) = tmp_new_src2;
2865   TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
2866 } while (0);
2867
2868 #if WITH_PROFILE_MODEL_P
2869   if (PROFILE_MODEL_P (current_cpu))
2870     {
2871       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2872       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2873       m32rx_model_profile_insn (current_cpu, abuf);
2874     }
2875 #endif
2876
2877   return new_pc;
2878 #undef OPRND
2879 }
2880
2881 /* Perform st-minus: st $src1,@-$src2.  */
2882 CIA
2883 SEM_FN_NAME (m32rx,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2884 {
2885   insn_t insn = SEM_INSN (sem_arg);
2886 #define OPRND(f) par_exec->operands.fmt_st_plus.f
2887   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2888   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2889   EXTRACT_FMT_ST_PLUS_VARS /* f-op1 f-r1 f-op2 f-r2 */
2890   EXTRACT_FMT_ST_PLUS_CODE
2891
2892 do {
2893   SI tmp_new_src2;
2894   tmp_new_src2 = SUBSI (OPRND (src2), 4);
2895 SETMEMSI (current_cpu, tmp_new_src2, OPRND (src1));
2896   TRACE_RESULT (current_cpu, "h-memory-new-src2", 'x', GETMEMSI (current_cpu, tmp_new_src2));
2897   CPU (h_gr[f_r2]) = tmp_new_src2;
2898   TRACE_RESULT (current_cpu, "src2", 'x', CPU (h_gr[f_r2]));
2899 } while (0);
2900
2901 #if WITH_PROFILE_MODEL_P
2902   if (PROFILE_MODEL_P (current_cpu))
2903     {
2904       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2905       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2906       m32rx_model_profile_insn (current_cpu, abuf);
2907     }
2908 #endif
2909
2910   return new_pc;
2911 #undef OPRND
2912 }
2913
2914 /* Perform sub: sub $dr,$sr.  */
2915 CIA
2916 SEM_FN_NAME (m32rx,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2917 {
2918   insn_t insn = SEM_INSN (sem_arg);
2919 #define OPRND(f) par_exec->operands.fmt_add.f
2920   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2921   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2922   EXTRACT_FMT_ADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
2923   EXTRACT_FMT_ADD_CODE
2924
2925   CPU (h_gr[f_r1]) = SUBSI (OPRND (dr), OPRND (sr));
2926   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2927
2928 #if WITH_PROFILE_MODEL_P
2929   if (PROFILE_MODEL_P (current_cpu))
2930     {
2931       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2932       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2933       m32rx_model_profile_insn (current_cpu, abuf);
2934     }
2935 #endif
2936
2937   return new_pc;
2938 #undef OPRND
2939 }
2940
2941 /* Perform subv: subv $dr,$sr.  */
2942 CIA
2943 SEM_FN_NAME (m32rx,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2944 {
2945   insn_t insn = SEM_INSN (sem_arg);
2946 #define OPRND(f) par_exec->operands.fmt_addv.f
2947   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2948   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2949   EXTRACT_FMT_ADDV_VARS /* f-op1 f-r1 f-op2 f-r2 */
2950   EXTRACT_FMT_ADDV_CODE
2951
2952 do {
2953   BI temp1;SI temp0;
2954   temp0 = SUBSI (OPRND (dr), OPRND (sr));
2955   temp1 = SUBOFSI (OPRND (dr), OPRND (sr), 0);
2956   CPU (h_gr[f_r1]) = temp0;
2957   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2958   CPU (h_cond) = temp1;
2959   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
2960 } while (0);
2961
2962 #if WITH_PROFILE_MODEL_P
2963   if (PROFILE_MODEL_P (current_cpu))
2964     {
2965       m32rx_model_mark_get_h_gr (current_cpu, abuf);
2966       m32rx_model_mark_set_h_gr (current_cpu, abuf);
2967       m32rx_model_profile_insn (current_cpu, abuf);
2968     }
2969 #endif
2970
2971   return new_pc;
2972 #undef OPRND
2973 }
2974
2975 /* Perform subx: subx $dr,$sr.  */
2976 CIA
2977 SEM_FN_NAME (m32rx,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
2978 {
2979   insn_t insn = SEM_INSN (sem_arg);
2980 #define OPRND(f) par_exec->operands.fmt_addx.f
2981   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2982   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
2983   EXTRACT_FMT_ADDX_VARS /* f-op1 f-r1 f-op2 f-r2 */
2984   EXTRACT_FMT_ADDX_CODE
2985
2986 do {
2987   BI temp1;SI temp0;
2988   temp0 = SUBCSI (OPRND (dr), OPRND (sr), OPRND (condbit));
2989   temp1 = SUBCFSI (OPRND (dr), OPRND (sr), OPRND (condbit));
2990   CPU (h_gr[f_r1]) = temp0;
2991   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
2992   CPU (h_cond) = temp1;
2993   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
2994 } while (0);
2995
2996 #if WITH_PROFILE_MODEL_P
2997   if (PROFILE_MODEL_P (current_cpu))
2998     {
2999       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3000       m32rx_model_mark_set_h_gr (current_cpu, abuf);
3001       m32rx_model_profile_insn (current_cpu, abuf);
3002     }
3003 #endif
3004
3005   return new_pc;
3006 #undef OPRND
3007 }
3008
3009 /* Perform trap: trap $uimm4.  */
3010 CIA
3011 SEM_FN_NAME (m32rx,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3012 {
3013   insn_t insn = SEM_INSN (sem_arg);
3014 #define OPRND(f) par_exec->operands.fmt_trap.f
3015   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3016   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3017   int taken_p = 0;
3018   EXTRACT_FMT_TRAP_VARS /* f-op1 f-r1 f-op2 f-uimm4 */
3019   EXTRACT_FMT_TRAP_CODE
3020
3021 do {
3022 m32rx_h_cr_set (current_cpu, 6, ADDSI (OPRND (pc), 4));
3023   TRACE_RESULT (current_cpu, "h-cr-6", 'x', m32rx_h_cr_get (current_cpu, 6));
3024 m32rx_h_cr_set (current_cpu, 0, ANDSI (SLLSI (OPRND (h_cr_0), 8), 65408));
3025   TRACE_RESULT (current_cpu, "h-cr-0", 'x', m32rx_h_cr_get (current_cpu, 0));
3026   BRANCH_NEW_PC (new_pc, SEM_BRANCH_VIA_ADDR (sem_arg, do_trap (current_cpu, OPRND (uimm4))));
3027   TRACE_RESULT (current_cpu, "pc", 'x', CPU (h_pc));
3028 } while (0);
3029
3030 #if WITH_PROFILE_MODEL_P
3031   if (PROFILE_MODEL_P (current_cpu))
3032     {
3033       m32rx_model_profile_cti_insn (current_cpu, abuf, taken_p);
3034     }
3035 #endif
3036
3037   return new_pc;
3038 #undef OPRND
3039 }
3040
3041 /* Perform unlock: unlock $src1,@$src2.  */
3042 CIA
3043 SEM_FN_NAME (m32rx,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3044 {
3045   insn_t insn = SEM_INSN (sem_arg);
3046 #define OPRND(f) par_exec->operands.fmt_unlock.f
3047   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3048   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3049   EXTRACT_FMT_UNLOCK_VARS /* f-op1 f-r1 f-op2 f-r2 */
3050   EXTRACT_FMT_UNLOCK_CODE
3051
3052 do {
3053 if (OPRND (h_lock_0)) {
3054 SETMEMSI (current_cpu, OPRND (src2), OPRND (src1));
3055   TRACE_RESULT (current_cpu, "h-memory-src2", 'x', GETMEMSI (current_cpu, OPRND (src2)));
3056 }
3057   CPU (h_lock) = 0;
3058   TRACE_RESULT (current_cpu, "h-lock-0", 'x', CPU (h_lock));
3059 } while (0);
3060
3061 #if WITH_PROFILE_MODEL_P
3062   if (PROFILE_MODEL_P (current_cpu))
3063     {
3064       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3065       m32rx_model_profile_insn (current_cpu, abuf);
3066     }
3067 #endif
3068
3069   return new_pc;
3070 #undef OPRND
3071 }
3072
3073 /* Perform satb: satb $dr,$sr.  */
3074 CIA
3075 SEM_FN_NAME (m32rx,satb) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3076 {
3077   insn_t insn = SEM_INSN (sem_arg);
3078 #define OPRND(f) par_exec->operands.fmt_satb.f
3079   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3080   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
3081   EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
3082   EXTRACT_FMT_SATB_CODE
3083
3084   CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 127)) ? (127) : (LESI (OPRND (sr), -128)) ? (-128) : (OPRND (sr));
3085   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
3086
3087 #if WITH_PROFILE_MODEL_P
3088   if (PROFILE_MODEL_P (current_cpu))
3089     {
3090       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3091       m32rx_model_mark_set_h_gr (current_cpu, abuf);
3092       m32rx_model_profile_insn (current_cpu, abuf);
3093     }
3094 #endif
3095
3096   return new_pc;
3097 #undef OPRND
3098 }
3099
3100 /* Perform sath: sath $dr,$sr.  */
3101 CIA
3102 SEM_FN_NAME (m32rx,sath) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3103 {
3104   insn_t insn = SEM_INSN (sem_arg);
3105 #define OPRND(f) par_exec->operands.fmt_satb.f
3106   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3107   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
3108   EXTRACT_FMT_SATB_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
3109   EXTRACT_FMT_SATB_CODE
3110
3111   CPU (h_gr[f_r1]) = (GESI (OPRND (sr), 32767)) ? (32767) : (LESI (OPRND (sr), -32768)) ? (-32768) : (OPRND (sr));
3112   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
3113
3114 #if WITH_PROFILE_MODEL_P
3115   if (PROFILE_MODEL_P (current_cpu))
3116     {
3117       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3118       m32rx_model_mark_set_h_gr (current_cpu, abuf);
3119       m32rx_model_profile_insn (current_cpu, abuf);
3120     }
3121 #endif
3122
3123   return new_pc;
3124 #undef OPRND
3125 }
3126
3127 /* Perform sat: sat $dr,$sr.  */
3128 CIA
3129 SEM_FN_NAME (m32rx,sat) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3130 {
3131   insn_t insn = SEM_INSN (sem_arg);
3132 #define OPRND(f) par_exec->operands.fmt_sat.f
3133   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3134   CIA new_pc = SEM_NEXT_PC (sem_arg, 4);
3135   EXTRACT_FMT_SAT_VARS /* f-op1 f-r1 f-op2 f-r2 f-uimm16 */
3136   EXTRACT_FMT_SAT_CODE
3137
3138   CPU (h_gr[f_r1]) = ((OPRND (condbit)) ? (((LTSI (OPRND (sr), 0)) ? (2147483647) : (0x80000000))) : (OPRND (sr)));
3139   TRACE_RESULT (current_cpu, "dr", 'x', CPU (h_gr[f_r1]));
3140
3141 #if WITH_PROFILE_MODEL_P
3142   if (PROFILE_MODEL_P (current_cpu))
3143     {
3144       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3145       m32rx_model_mark_set_h_gr (current_cpu, abuf);
3146       m32rx_model_profile_insn (current_cpu, abuf);
3147     }
3148 #endif
3149
3150   return new_pc;
3151 #undef OPRND
3152 }
3153
3154 /* Perform pcmpbz: pcmpbz $src2.  */
3155 CIA
3156 SEM_FN_NAME (m32rx,pcmpbz) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3157 {
3158   insn_t insn = SEM_INSN (sem_arg);
3159 #define OPRND(f) par_exec->operands.fmt_cmpz.f
3160   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3161   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3162   EXTRACT_FMT_CMPZ_VARS /* f-op1 f-r1 f-op2 f-r2 */
3163   EXTRACT_FMT_CMPZ_CODE
3164
3165   CPU (h_cond) = (EQSI (ANDSI (OPRND (src2), 255), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 65280), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 16711680), 0)) ? (1) : (EQSI (ANDSI (OPRND (src2), 0xff000000), 0)) ? (1) : (0);
3166   TRACE_RESULT (current_cpu, "condbit", 'x', CPU (h_cond));
3167
3168 #if WITH_PROFILE_MODEL_P
3169   if (PROFILE_MODEL_P (current_cpu))
3170     {
3171       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3172       m32rx_model_profile_insn (current_cpu, abuf);
3173     }
3174 #endif
3175
3176   return new_pc;
3177 #undef OPRND
3178 }
3179
3180 /* Perform sadd: sadd.  */
3181 CIA
3182 SEM_FN_NAME (m32rx,sadd) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3183 {
3184   insn_t insn = SEM_INSN (sem_arg);
3185 #define OPRND(f) par_exec->operands.fmt_sadd.f
3186   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3187   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3188   EXTRACT_FMT_SADD_VARS /* f-op1 f-r1 f-op2 f-r2 */
3189   EXTRACT_FMT_SADD_CODE
3190
3191 m32rx_h_accums_set (current_cpu, 0, ADDDI (SRADI (OPRND (h_accums_1), 16), OPRND (h_accums_0)));
3192   TRACE_RESULT (current_cpu, "h-accums-0", 'D', m32rx_h_accums_get (current_cpu, 0));
3193
3194 #if WITH_PROFILE_MODEL_P
3195   if (PROFILE_MODEL_P (current_cpu))
3196     {
3197       m32rx_model_profile_insn (current_cpu, abuf);
3198     }
3199 #endif
3200
3201   return new_pc;
3202 #undef OPRND
3203 }
3204
3205 /* Perform macwu1: macwu1 $src1,$src2.  */
3206 CIA
3207 SEM_FN_NAME (m32rx,macwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3208 {
3209   insn_t insn = SEM_INSN (sem_arg);
3210 #define OPRND(f) par_exec->operands.fmt_macwu1.f
3211   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3212   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3213   EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3214   EXTRACT_FMT_MACWU1_CODE
3215
3216 m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535)))), 8), 8));
3217   TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3218
3219 #if WITH_PROFILE_MODEL_P
3220   if (PROFILE_MODEL_P (current_cpu))
3221     {
3222       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3223       m32rx_model_profile_insn (current_cpu, abuf);
3224     }
3225 #endif
3226
3227   return new_pc;
3228 #undef OPRND
3229 }
3230
3231 /* Perform msblo: msblo $src1,$src2.  */
3232 CIA
3233 SEM_FN_NAME (m32rx,msblo) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3234 {
3235   insn_t insn = SEM_INSN (sem_arg);
3236 #define OPRND(f) par_exec->operands.fmt_macwhi.f
3237   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3238   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3239   EXTRACT_FMT_MACWHI_VARS /* f-op1 f-r1 f-op2 f-r2 */
3240   EXTRACT_FMT_MACWHI_CODE
3241
3242   CPU (h_accum) = SRADI (SLLDI (SUBDI (OPRND (accum), SRADI (SLLDI (MULDI (EXTHIDI (TRUNCSIHI (OPRND (src1))), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8);
3243   TRACE_RESULT (current_cpu, "accum", 'D', CPU (h_accum));
3244
3245 #if WITH_PROFILE_MODEL_P
3246   if (PROFILE_MODEL_P (current_cpu))
3247     {
3248       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3249       m32rx_model_profile_insn (current_cpu, abuf);
3250     }
3251 #endif
3252
3253   return new_pc;
3254 #undef OPRND
3255 }
3256
3257 /* Perform mulwu1: mulwu1 $src1,$src2.  */
3258 CIA
3259 SEM_FN_NAME (m32rx,mulwu1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3260 {
3261   insn_t insn = SEM_INSN (sem_arg);
3262 #define OPRND(f) par_exec->operands.fmt_mulwu1.f
3263   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3264   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3265   EXTRACT_FMT_MULWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3266   EXTRACT_FMT_MULWU1_CODE
3267
3268 m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (MULDI (EXTSIDI (OPRND (src1)), EXTSIDI (ANDSI (OPRND (src2), 65535))), 16), 16));
3269   TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3270
3271 #if WITH_PROFILE_MODEL_P
3272   if (PROFILE_MODEL_P (current_cpu))
3273     {
3274       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3275       m32rx_model_profile_insn (current_cpu, abuf);
3276     }
3277 #endif
3278
3279   return new_pc;
3280 #undef OPRND
3281 }
3282
3283 /* Perform maclh1: maclh1 $src1,$src2.  */
3284 CIA
3285 SEM_FN_NAME (m32rx,maclh1) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3286 {
3287   insn_t insn = SEM_INSN (sem_arg);
3288 #define OPRND(f) par_exec->operands.fmt_macwu1.f
3289   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3290   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3291   EXTRACT_FMT_MACWU1_VARS /* f-op1 f-r1 f-op2 f-r2 */
3292   EXTRACT_FMT_MACWU1_CODE
3293
3294 m32rx_h_accums_set (current_cpu, 1, SRADI (SLLDI (ADDDI (OPRND (h_accums_1), SRADI (SLLDI (MULDI (EXTSIDI (SRASI (OPRND (src1), 16)), EXTHIDI (TRUNCSIHI (OPRND (src2)))), 32), 16)), 8), 8));
3295   TRACE_RESULT (current_cpu, "h-accums-1", 'D', m32rx_h_accums_get (current_cpu, 1));
3296
3297 #if WITH_PROFILE_MODEL_P
3298   if (PROFILE_MODEL_P (current_cpu))
3299     {
3300       m32rx_model_mark_get_h_gr (current_cpu, abuf);
3301       m32rx_model_profile_insn (current_cpu, abuf);
3302     }
3303 #endif
3304
3305   return new_pc;
3306 #undef OPRND
3307 }
3308
3309 /* Perform sc: sc.  */
3310 CIA
3311 SEM_FN_NAME (m32rx,sc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3312 {
3313   insn_t insn = SEM_INSN (sem_arg);
3314 #define OPRND(f) par_exec->operands.fmt_sc.f
3315   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3316   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3317   EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
3318   EXTRACT_FMT_SC_CODE
3319
3320 if (OPRND (condbit)) {
3321 BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
3322 }
3323
3324 #if WITH_PROFILE_MODEL_P
3325   if (PROFILE_MODEL_P (current_cpu))
3326     {
3327       m32rx_model_profile_insn (current_cpu, abuf);
3328     }
3329 #endif
3330
3331   return new_pc;
3332 #undef OPRND
3333 }
3334
3335 /* Perform snc: snc.  */
3336 CIA
3337 SEM_FN_NAME (m32rx,snc) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3338 {
3339   insn_t insn = SEM_INSN (sem_arg);
3340 #define OPRND(f) par_exec->operands.fmt_sc.f
3341   ARGBUF *abuf = SEM_ARGBUF (sem_arg);
3342   CIA new_pc = SEM_NEXT_PC (sem_arg, 2);
3343   EXTRACT_FMT_SC_VARS /* f-op1 f-r1 f-op2 f-r2 */
3344   EXTRACT_FMT_SC_CODE
3345
3346 if (NOTBI (OPRND (condbit))) {
3347 BRANCH_NEW_PC (new_pc, NEW_PC_SKIP);
3348 }
3349
3350 #if WITH_PROFILE_MODEL_P
3351   if (PROFILE_MODEL_P (current_cpu))
3352     {
3353       m32rx_model_profile_insn (current_cpu, abuf);
3354     }
3355 #endif
3356
3357   return new_pc;
3358 #undef OPRND
3359 }
3360
3361 CIA
3362 SEM_FN_NAME (m32rx,illegal) (SIM_CPU *current_cpu, SEM_ARG sem_arg, PAREXEC *par_exec)
3363 {
3364   sim_engine_illegal_insn (current_cpu, NULL_CIA /*FIXME*/);
3365   return 0;
3366 }
3367
3368 #endif /* ! defined (SCACHE_P) || (defined (SCACHE_P) && WITH_SCACHE) */