1 /* Main simulator entry points specific to the M32R.
2 Copyright (C) 1996-2016 Free Software Foundation, Inc.
3 Contributed by Cygnus Support.
5 This file is part of GDB, the GNU debugger.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "sim-options.h"
22 #include "libiberty.h"
36 #include "dv-m32r_uart.h"
38 static void free_state (SIM_DESC
);
39 static void print_m32r_misc_cpu (SIM_CPU
*cpu
, int verbose
);
41 /* Records simulator descriptor so utilities like m32r_dump_regs can be
43 SIM_DESC current_state
;
45 /* Cover function of sim_state_free to free the cpu buffers as well. */
48 free_state (SIM_DESC sd
)
50 if (STATE_MODULES (sd
) != NULL
)
51 sim_module_uninstall (sd
);
52 sim_cpu_free_all (sd
);
56 /* Create an instance of the simulator. */
59 sim_open (kind
, callback
, abfd
, argv
)
61 host_callback
*callback
;
65 SIM_DESC sd
= sim_state_alloc (kind
, callback
);
69 /* The cpu data is kept in a separately allocated chunk of memory. */
70 if (sim_cpu_alloc_all (sd
, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK
)
76 #if 0 /* FIXME: pc is in mach-specific struct */
77 /* FIXME: watchpoints code shouldn't need this */
79 SIM_CPU
*current_cpu
= STATE_CPU (sd
, 0);
80 STATE_WATCHPOINTS (sd
)->pc
= &(PC
);
81 STATE_WATCHPOINTS (sd
)->sizeof_pc
= sizeof (PC
);
85 if (sim_pre_argv_init (sd
, argv
[0]) != SIM_RC_OK
)
91 #if 0 /* FIXME: 'twould be nice if we could do this */
92 /* These options override any module options.
93 Obviously ambiguity should be avoided, however the caller may wish to
94 augment the meaning of an option. */
95 if (extra_options
!= NULL
)
96 sim_add_option_table (sd
, extra_options
);
99 /* getopt will print the error message so we just have to exit if this fails.
100 FIXME: Hmmm... in the case of gdb we need getopt to call
102 if (sim_parse_args (sd
, argv
) != SIM_RC_OK
)
108 /* Allocate a handler for the control registers and other devices
109 if no memory for that range has been allocated by the user.
110 All are allocated in one chunk to keep things from being
111 unnecessarily complicated.
112 TODO: Move these to the sim-model framework. */
113 sim_hw_parse (sd
, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR
, 0x100);
114 sim_hw_parse (sd
, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
116 /* Allocate core managed memory if none specified by user.
117 Use address 4 here in case the user wanted address 0 unmapped. */
118 if (sim_core_read_buffer (sd
, NULL
, read_map
, &c
, 4, 1) == 0)
119 sim_do_commandf (sd
, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE
);
121 /* check for/establish the reference program image */
122 if (sim_analyze_program (sd
,
123 (STATE_PROG_ARGV (sd
) != NULL
124 ? *STATE_PROG_ARGV (sd
)
132 /* Establish any remaining configuration options. */
133 if (sim_config (sd
) != SIM_RC_OK
)
139 if (sim_post_argv_init (sd
) != SIM_RC_OK
)
145 /* Open a copy of the cpu descriptor table. */
147 CGEN_CPU_DESC cd
= m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd
)->printable_name
,
149 for (i
= 0; i
< MAX_NR_PROCESSORS
; ++i
)
151 SIM_CPU
*cpu
= STATE_CPU (sd
, i
);
152 CPU_CPU_DESC (cpu
) = cd
;
153 CPU_DISASSEMBLER (cpu
) = sim_cgen_disassemble_insn
;
155 m32r_cgen_init_dis (cd
);
158 /* Initialize various cgen things not done by common framework.
159 Must be done after m32r_cgen_cpu_open. */
162 for (c
= 0; c
< MAX_NR_PROCESSORS
; ++c
)
164 /* Only needed for profiling, but the structure member is small. */
165 memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd
, i
)), 0,
166 sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd
, i
))));
167 /* Hook in callback for reporting these stats */
168 PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd
, i
)))
169 = print_m32r_misc_cpu
;
172 /* Store in a global so things like sparc32_dump_regs can be invoked
173 from the gdb command line. */
180 sim_create_inferior (sd
, abfd
, argv
, envp
)
186 SIM_CPU
*current_cpu
= STATE_CPU (sd
, 0);
190 addr
= bfd_get_start_address (abfd
);
193 sim_pc_set (current_cpu
, addr
);
196 m32rbf_h_cr_set (current_cpu
,
197 m32r_decode_gdb_ctrl_regnum(SPI_REGNUM
), 0x1f00000);
198 m32rbf_h_cr_set (current_cpu
,
199 m32r_decode_gdb_ctrl_regnum(SPU_REGNUM
), 0x1f00000);
202 /* Standalone mode (i.e. `run`) will take care of the argv for us in
203 sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
204 with `gdb`), we need to handle it because the user can change the
205 argv on the fly via gdb's 'run'. */
206 if (STATE_PROG_ARGV (sd
) != argv
)
208 freeargv (STATE_PROG_ARGV (sd
));
209 STATE_PROG_ARGV (sd
) = dupargv (argv
);
215 /* PROFILE_CPU_CALLBACK */
218 print_m32r_misc_cpu (SIM_CPU
*cpu
, int verbose
)
220 SIM_DESC sd
= CPU_STATE (cpu
);
223 if (CPU_PROFILE_FLAGS (cpu
) [PROFILE_INSN_IDX
])
225 sim_io_printf (sd
, "Miscellaneous Statistics\n\n");
226 sim_io_printf (sd
, " %-*s %s\n\n",
227 PROFILE_LABEL_WIDTH
, "Fill nops:",
228 sim_add_commas (buf
, sizeof (buf
),
229 CPU_M32R_MISC_PROFILE (cpu
)->fillnop_count
));
230 if (STATE_ARCHITECTURE (sd
)->mach
== bfd_mach_m32rx
)
231 sim_io_printf (sd
, " %-*s %s\n\n",
232 PROFILE_LABEL_WIDTH
, "Parallel insns:",
233 sim_add_commas (buf
, sizeof (buf
),
234 CPU_M32R_MISC_PROFILE (cpu
)->parallel_count
));
235 if (STATE_ARCHITECTURE (sd
)->mach
== bfd_mach_m32r2
)
236 sim_io_printf (sd
, " %-*s %s\n\n",
237 PROFILE_LABEL_WIDTH
, "Parallel insns:",
238 sim_add_commas (buf
, sizeof (buf
),
239 CPU_M32R_MISC_PROFILE (cpu
)->parallel_count
));