6c1063892a2bbaa5a065ef69d54de6929904f859
[deliverable/binutils-gdb.git] / sim / m32r / sim-main.h
1
2 /* Main header for the m32r. */
3
4 #ifndef SIM_MAIN_H
5 #define SIM_MAIN_H
6
7 #define USING_SIM_BASE_H /* FIXME: quick hack */
8
9 struct _sim_cpu; /* FIXME: should be in sim-basics.h */
10 typedef struct _sim_cpu SIM_CPU;
11
12 #include "symcat.h"
13 #include "sim-basics.h"
14 #include "cgen-types.h"
15 #include "m32r-desc.h"
16 #include "m32r-opc.h"
17 #include "arch.h"
18
19 /* These must be defined before sim-base.h. */
20 typedef USI sim_cia;
21
22 #define CIA_GET(cpu) CPU_PC_GET (cpu)
23 #define CIA_SET(cpu,val) CPU_PC_SET ((cpu), (val))
24
25 #define SIM_ENGINE_HALT_HOOK(sd, cpu, cia) \
26 do { \
27 if (cpu) /* null if ctrl-c */ \
28 sim_pc_set ((cpu), (cia)); \
29 } while (0)
30 #define SIM_ENGINE_RESTART_HOOK(sd, cpu, cia) \
31 do { \
32 sim_pc_set ((cpu), (cia)); \
33 } while (0)
34
35 #include "sim-base.h"
36 #include "cgen-sim.h"
37 #include "m32r-sim.h"
38 #include "opcode/cgen.h"
39 \f
40 /* The _sim_cpu struct. */
41
42 struct _sim_cpu {
43 /* sim/common cpu base. */
44 sim_cpu_base base;
45
46 /* Static parts of cgen. */
47 CGEN_CPU cgen_cpu;
48
49 M32R_MISC_PROFILE m32r_misc_profile;
50 #define CPU_M32R_MISC_PROFILE(cpu) (& (cpu)->m32r_misc_profile)
51
52 /* CPU specific parts go here.
53 Note that in files that don't need to access these pieces WANT_CPU_FOO
54 won't be defined and thus these parts won't appear. This is ok in the
55 sense that things work. It is a source of bugs though.
56 One has to of course be careful to not take the size of this
57 struct and no structure members accessed in non-cpu specific files can
58 go after here. Oh for a better language. */
59 #if defined (WANT_CPU_M32RBF)
60 M32RBF_CPU_DATA cpu_data;
61 #elif defined (WANT_CPU_M32RXF)
62 M32RXF_CPU_DATA cpu_data;
63 #elif defined (WANT_CPU_M32R2F)
64 M32R2F_CPU_DATA cpu_data;
65 #endif
66 };
67 \f
68 /* The sim_state struct. */
69
70 struct sim_state {
71 sim_cpu *cpu;
72 #define STATE_CPU(sd, n) (/*&*/ (sd)->cpu)
73
74 CGEN_STATE cgen_state;
75
76 sim_state_base base;
77 };
78 \f
79 /* Misc. */
80
81 /* Catch address exceptions. */
82 extern SIM_CORE_SIGNAL_FN m32r_core_signal;
83 #define SIM_CORE_SIGNAL(SD,CPU,CIA,MAP,NR_BYTES,ADDR,TRANSFER,ERROR) \
84 m32r_core_signal ((SD), (CPU), (CIA), (MAP), (NR_BYTES), (ADDR), \
85 (TRANSFER), (ERROR))
86
87 /* Default memory size. */
88 #define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */
89
90 #endif /* SIM_MAIN_H */
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