sim/m68hc11/interrupts.h

   1 /* interrupts.h -- 68HC11 Interrupts Emulation
   2    Copyright 1999, 2000 Free Software Foundation, Inc.
   3    Written by Stephane Carrez (stcarrez@worldnet.fr)
   4
   5 This file is part of GDB, GAS, and the GNU binutils.
   6
   7 GDB, GAS, and the GNU binutils are free software; you can redistribute
   8 them and/or modify them under the terms of the GNU General Public
   9 License as published by the Free Software Foundation; either version
  10 1, or (at your option) any later version.
  11
  12 GDB, GAS, and the GNU binutils are distributed in the hope that they
  13 will be useful, but WITHOUT ANY WARRANTY; without even the implied
  14 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
  15 the GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this file; see the file COPYING.  If not, write to the Free
  19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 #ifndef _M6811_SIM_INTERRUPTS_H
  22 #define _M6811_SIM_INTERRUPTS_H
  23
  24 /* Definition of 68HC11 interrupts.  These enum are used as an index
  25    in the interrupt table.  */
  26 enum M6811_INT
  27 {
  28   M6811_INT_RESERVED1 = 0,
  29   M6811_INT_RESERVED2,
  30   M6811_INT_RESERVED3,
  31   M6811_INT_RESERVED4,
  32   M6811_INT_RESERVED5,
  33   M6811_INT_RESERVED6,
  34   M6811_INT_RESERVED7,
  35   M6811_INT_RESERVED8,
  36
  37   M6811_INT_RESERVED9,
  38   M6811_INT_RESERVED10,
  39   M6811_INT_RESERVED11,
  40
  41   M6811_INT_SCI,
  42   M6811_INT_SPI,
  43   M6811_INT_AINPUT,
  44   M6811_INT_AOVERFLOW,
  45   M6811_INT_TCTN,
  46
  47   M6811_INT_OUTCMP5,
  48   M6811_INT_OUTCMP4,
  49   M6811_INT_OUTCMP3,
  50   M6811_INT_OUTCMP2,
  51   M6811_INT_OUTCMP1,
  52
  53   M6811_INT_INCMP3,
  54   M6811_INT_INCMP2,
  55   M6811_INT_INCMP1,
  56
  57   M6811_INT_RT,
  58   M6811_INT_IRQ,
  59   M6811_INT_XIRQ,
  60   M6811_INT_SWI,
  61   M6811_INT_ILLEGAL,
  62
  63   M6811_INT_COPRESET,
  64   M6811_INT_COPFAIL,
  65
  66   M6811_INT_RESET,
  67   M6811_INT_NUMBER
  68 };
  69
  70
  71 /* Structure to describe how to recognize an interrupt in the
  72    68hc11 IO regs.  */
  73 struct interrupt_def
  74 {
  75   enum M6811_INT   int_number;
  76   unsigned char    int_paddr;
  77   unsigned char    int_mask;
  78   unsigned char    enable_paddr;
  79   unsigned char    enabled_mask;
  80 };
  81
  82 /* Management of 68HC11 interrupts:
  83     - We use a table of 'interrupt_def' to describe the interrupts that must be
  84       raised depending on IO register flags (enable and present flags).
  85     - We keep a mask of pending interrupts.  This mask is refreshed by
  86       calling 'interrupts_update_pending'.  It must be refreshed each time
  87       an IO register is changed.
  88     - 'interrupts_process' must be called after each insn. It has two purposes:
  89       first it maintains a min/max count of CPU cycles between which interrupts
  90       are masked; second it checks for pending interrupts and raise one if
  91       interrupts are enabled.  */
  92 struct interrupts {
  93   struct _sim_cpu   *cpu;
  94
  95   /* Mask of current pending interrupts.  */
  96   unsigned long     pending_mask;
  97
  98   /* Address of vector table.  This is set depending on the
  99      68hc11 init mode.  */
 100   uint16            vectors_addr;
 101
 102   /* Priority order of interrupts.  This is controlled by setting the HPRIO
 103      IO register.  */
 104   enum M6811_INT    interrupt_order[M6811_INT_NUMBER];
 105
 106   /* Simulator statistics to report useful debug information to users.  */
 107
 108   /* - Max/Min number of CPU cycles executed with interrupts masked.  */
 109   signed64          start_mask_cycle;
 110   signed64          min_mask_cycles;
 111   signed64          max_mask_cycles;
 112
 113   /* - Same for XIRQ.  */
 114   signed64          xirq_start_mask_cycle;
 115   signed64          xirq_min_mask_cycles;
 116   signed64          xirq_max_mask_cycles;
 117
 118   /* - Total number of interrupts raised.  */
 119   unsigned long     nb_interrupts_raised;
 120 };
 121
 122 extern int  interrupts_initialize     (struct _sim_cpu* cpu);
 123 extern void interrupts_update_pending (struct interrupts* interrupts);
 124 extern int  interrupts_get_current    (struct interrupts* interrupts);
 125 extern int  interrupts_process        (struct interrupts* interrupts);
 126 extern void interrupts_raise          (struct interrupts* interrupts,
 127                                        enum M6811_INT number);
 128
 129 extern void interrupts_info           (SIM_DESC sd,
 130                                        struct interrupts* interrupts);
 131
 132 #endif