1 2015-04-17 Mike Frysinger <vapier@gentoo.org>
3 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
5 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
6 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
7 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
9 * sim-main.h (CIA_GET, CIA_SET): Delete.
11 2015-04-15 Mike Frysinger <vapier@gentoo.org>
13 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
14 * sim-main.h (STATE_CPU): Delete.
16 2015-04-13 Mike Frysinger <vapier@gentoo.org>
18 * configure: Regenerate.
20 2015-04-13 Mike Frysinger <vapier@gentoo.org>
22 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
23 * interp.c (mips_pc_get, mips_pc_set): New functions.
24 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
25 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
27 * sim-main.h (SIM_CPU): Define.
28 (struct sim_state): Change cpu to an array of pointers.
31 2015-04-13 Mike Frysinger <vapier@gentoo.org>
33 * interp.c (mips_option_handler, open_trace, sim_close,
34 sim_write, sim_read, sim_store_register, sim_fetch_register,
35 sim_create_inferior, pr_addr, pr_uword64): Convert old style
37 (sim_open): Convert old style prototype. Change casts with
38 sim_write to unsigned char *.
39 (fetch_str): Change null to unsigned char, and change cast to
41 (sim_monitor): Change c & ch to unsigned char. Change cast to
44 2015-04-12 Mike Frysinger <vapier@gentoo.org>
46 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
48 2015-04-06 Mike Frysinger <vapier@gentoo.org>
50 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
52 2015-04-01 Mike Frysinger <vapier@gentoo.org>
54 * tconfig.h (SIM_HAVE_PROFILE): Delete.
56 2015-03-31 Mike Frysinger <vapier@gentoo.org>
58 * config.in, configure: Regenerate.
60 2015-03-24 Mike Frysinger <vapier@gentoo.org>
62 * interp.c (sim_pc_get): New function.
64 2015-03-24 Mike Frysinger <vapier@gentoo.org>
66 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
67 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
69 2015-03-24 Mike Frysinger <vapier@gentoo.org>
71 * configure: Regenerate.
73 2015-03-23 Mike Frysinger <vapier@gentoo.org>
75 * configure: Regenerate.
77 2015-03-23 Mike Frysinger <vapier@gentoo.org>
79 * configure: Regenerate.
80 * configure.ac (mips_extra_objs): Delete.
81 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
82 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
84 2015-03-23 Mike Frysinger <vapier@gentoo.org>
86 * configure: Regenerate.
87 * configure.ac: Delete sim_hw checks for dv-sockser.
89 2015-03-16 Mike Frysinger <vapier@gentoo.org>
91 * config.in, configure: Regenerate.
92 * tconfig.in: Rename file ...
93 * tconfig.h: ... here.
95 2015-03-15 Mike Frysinger <vapier@gentoo.org>
97 * tconfig.in: Delete includes.
98 [HAVE_DV_SOCKSER]: Delete.
100 2015-03-14 Mike Frysinger <vapier@gentoo.org>
102 * Makefile.in (SIM_RUN_OBJS): Delete.
104 2015-03-14 Mike Frysinger <vapier@gentoo.org>
106 * configure.ac (AC_CHECK_HEADERS): Delete.
107 * aclocal.m4, configure: Regenerate.
109 2014-08-19 Alan Modra <amodra@gmail.com>
111 * configure: Regenerate.
113 2014-08-15 Roland McGrath <mcgrathr@google.com>
115 * configure: Regenerate.
116 * config.in: Regenerate.
118 2014-03-04 Mike Frysinger <vapier@gentoo.org>
120 * configure: Regenerate.
122 2013-09-23 Alan Modra <amodra@gmail.com>
124 * configure: Regenerate.
126 2013-06-03 Mike Frysinger <vapier@gentoo.org>
128 * aclocal.m4, configure: Regenerate.
130 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
132 * configure: Rebuild.
134 2013-03-26 Mike Frysinger <vapier@gentoo.org>
136 * configure: Regenerate.
138 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
140 * configure.ac: Address use of dv-sockser.o.
141 * tconfig.in: Conditionalize use of dv_sockser_install.
142 * configure: Regenerated.
143 * config.in: Regenerated.
145 2012-10-04 Chao-ying Fu <fu@mips.com>
146 Steve Ellcey <sellcey@mips.com>
148 * mips/mips3264r2.igen (rdhwr): New.
150 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
152 * configure.ac: Always link against dv-sockser.o.
153 * configure: Regenerate.
155 2012-06-15 Joel Brobecker <brobecker@adacore.com>
157 * config.in, configure: Regenerate.
159 2012-05-18 Nick Clifton <nickc@redhat.com>
162 * interp.c: Include config.h before system header files.
164 2012-03-24 Mike Frysinger <vapier@gentoo.org>
166 * aclocal.m4, config.in, configure: Regenerate.
168 2011-12-03 Mike Frysinger <vapier@gentoo.org>
170 * aclocal.m4: New file.
171 * configure: Regenerate.
173 2011-10-19 Mike Frysinger <vapier@gentoo.org>
175 * configure: Regenerate after common/acinclude.m4 update.
177 2011-10-17 Mike Frysinger <vapier@gentoo.org>
179 * configure.ac: Change include to common/acinclude.m4.
181 2011-10-17 Mike Frysinger <vapier@gentoo.org>
183 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
184 call. Replace common.m4 include with SIM_AC_COMMON.
185 * configure: Regenerate.
187 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
189 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
191 (tmp-mach-multi): Exit early when igen fails.
193 2011-07-05 Mike Frysinger <vapier@gentoo.org>
195 * interp.c (sim_do_command): Delete.
197 2011-02-14 Mike Frysinger <vapier@gentoo.org>
199 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
200 (tx3904sio_fifo_reset): Likewise.
201 * interp.c (sim_monitor): Likewise.
203 2010-04-14 Mike Frysinger <vapier@gentoo.org>
205 * interp.c (sim_write): Add const to buffer arg.
207 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
209 * interp.c: Don't include sysdep.h
211 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
213 * configure: Regenerate.
215 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
217 * config.in: Regenerate.
218 * configure: Likewise.
220 * configure: Regenerate.
222 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
224 * configure: Regenerate to track ../common/common.m4 changes.
227 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
228 Daniel Jacobowitz <dan@codesourcery.com>
229 Joseph Myers <joseph@codesourcery.com>
231 * configure: Regenerate.
233 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
235 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
236 that unconditionally allows fmt_ps.
237 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
238 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
239 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
240 filter from 64,f to 32,f.
241 (PREFX): Change filter from 64 to 32.
242 (LDXC1, LUXC1): Provide separate mips32r2 implementations
243 that use do_load_double instead of do_load. Make both LUXC1
244 versions unpredictable if SizeFGR () != 64.
245 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
246 instead of do_store. Remove unused variable. Make both SUXC1
247 versions unpredictable if SizeFGR () != 64.
249 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
251 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
252 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
253 shifts for that case.
255 2007-09-04 Nick Clifton <nickc@redhat.com>
257 * interp.c (options enum): Add OPTION_INFO_MEMORY.
258 (display_mem_info): New static variable.
259 (mips_option_handler): Handle OPTION_INFO_MEMORY.
260 (mips_options): Add info-memory and memory-info.
261 (sim_open): After processing the command line and board
262 specification, check display_mem_info. If it is set then
263 call the real handler for the --memory-info command line
266 2007-08-24 Joel Brobecker <brobecker@adacore.com>
268 * configure.ac: Change license of multi-run.c to GPL version 3.
269 * configure: Regenerate.
271 2007-06-28 Richard Sandiford <richard@codesourcery.com>
273 * configure.ac, configure: Revert last patch.
275 2007-06-26 Richard Sandiford <richard@codesourcery.com>
277 * configure.ac (sim_mipsisa3264_configs): New variable.
278 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
279 every configuration support all four targets, using the triplet to
280 determine the default.
281 * configure: Regenerate.
283 2007-06-25 Richard Sandiford <richard@codesourcery.com>
285 * Makefile.in (m16run.o): New rule.
287 2007-05-15 Thiemo Seufer <ths@mips.com>
289 * mips3264r2.igen (DSHD): Fix compile warning.
291 2007-05-14 Thiemo Seufer <ths@mips.com>
293 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
294 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
295 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
296 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
299 2007-03-01 Thiemo Seufer <ths@mips.com>
301 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
304 2007-02-20 Thiemo Seufer <ths@mips.com>
306 * dsp.igen: Update copyright notice.
307 * dsp2.igen: Fix copyright notice.
309 2007-02-20 Thiemo Seufer <ths@mips.com>
310 Chao-Ying Fu <fu@mips.com>
312 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
313 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
314 Add dsp2 to sim_igen_machine.
315 * configure: Regenerate.
316 * dsp.igen (do_ph_op): Add MUL support when op = 2.
317 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
318 (mulq_rs.ph): Use do_ph_mulq.
319 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
320 * mips.igen: Add dsp2 model and include dsp2.igen.
321 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
322 for *mips32r2, *mips64r2, *dsp.
323 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
324 for *mips32r2, *mips64r2, *dsp2.
325 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
327 2007-02-19 Thiemo Seufer <ths@mips.com>
328 Nigel Stephens <nigel@mips.com>
330 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
331 jumps with hazard barrier.
333 2007-02-19 Thiemo Seufer <ths@mips.com>
334 Nigel Stephens <nigel@mips.com>
336 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
337 after each call to sim_io_write.
339 2007-02-19 Thiemo Seufer <ths@mips.com>
340 Nigel Stephens <nigel@mips.com>
342 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
343 supported by this simulator.
344 (decode_coproc): Recognise additional CP0 Config registers
347 2007-02-19 Thiemo Seufer <ths@mips.com>
348 Nigel Stephens <nigel@mips.com>
349 David Ung <davidu@mips.com>
351 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
352 uninterpreted formats. If fmt is one of the uninterpreted types
353 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
354 fmt_word, and fmt_uninterpreted_64 like fmt_long.
355 (store_fpr): When writing an invalid odd register, set the
356 matching even register to fmt_unknown, not the following register.
357 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
358 the the memory window at offset 0 set by --memory-size command
360 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
362 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
364 (sim_monitor): When returning the memory size to the MIPS
365 application, use the value in STATE_MEM_SIZE, not an arbitrary
367 (cop_lw): Don' mess around with FPR_STATE, just pass
368 fmt_uninterpreted_32 to StoreFPR.
370 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
372 * mips.igen (not_word_value): Single version for mips32, mips64
375 2007-02-19 Thiemo Seufer <ths@mips.com>
376 Nigel Stephens <nigel@mips.com>
378 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
381 2007-02-17 Thiemo Seufer <ths@mips.com>
383 * configure.ac (mips*-sde-elf*): Move in front of generic machine
385 * configure: Regenerate.
387 2007-02-17 Thiemo Seufer <ths@mips.com>
389 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
390 Add mdmx to sim_igen_machine.
391 (mipsisa64*-*-*): Likewise. Remove dsp.
392 (mipsisa32*-*-*): Remove dsp.
393 * configure: Regenerate.
395 2007-02-13 Thiemo Seufer <ths@mips.com>
397 * configure.ac: Add mips*-sde-elf* target.
398 * configure: Regenerate.
400 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
402 * acconfig.h: Remove.
403 * config.in, configure: Regenerate.
405 2006-11-07 Thiemo Seufer <ths@mips.com>
407 * dsp.igen (do_w_op): Fix compiler warning.
409 2006-08-29 Thiemo Seufer <ths@mips.com>
410 David Ung <davidu@mips.com>
412 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
414 * configure: Regenerate.
415 * mips.igen (model): Add smartmips.
416 (MADDU): Increment ACX if carry.
417 (do_mult): Clear ACX.
418 (ROR,RORV): Add smartmips.
419 (include): Include smartmips.igen.
420 * sim-main.h (ACX): Set to REGISTERS[89].
421 * smartmips.igen: New file.
423 2006-08-29 Thiemo Seufer <ths@mips.com>
424 David Ung <davidu@mips.com>
426 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
427 mips3264r2.igen. Add missing dependency rules.
428 * m16e.igen: Support for mips16e save/restore instructions.
430 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
432 * configure: Regenerated.
434 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
436 * configure: Regenerated.
438 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
440 * configure: Regenerated.
442 2006-05-15 Chao-ying Fu <fu@mips.com>
444 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
446 2006-04-18 Nick Clifton <nickc@redhat.com>
448 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
451 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
453 * configure: Regenerate.
455 2005-12-14 Chao-ying Fu <fu@mips.com>
457 * Makefile.in (SIM_OBJS): Add dsp.o.
458 (dsp.o): New dependency.
459 (IGEN_INCLUDE): Add dsp.igen.
460 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
461 mipsisa64*-*-*): Add dsp to sim_igen_machine.
462 * configure: Regenerate.
463 * mips.igen: Add dsp model and include dsp.igen.
464 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
465 because these instructions are extended in DSP ASE.
466 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
467 adding 6 DSP accumulator registers and 1 DSP control register.
468 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
469 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
470 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
471 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
472 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
473 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
474 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
475 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
476 DSPCR_CCOND_SMASK): New define.
477 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
478 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
480 2005-07-08 Ian Lance Taylor <ian@airs.com>
482 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
484 2005-06-16 David Ung <davidu@mips.com>
485 Nigel Stephens <nigel@mips.com>
487 * mips.igen: New mips16e model and include m16e.igen.
488 (check_u64): Add mips16e tag.
489 * m16e.igen: New file for MIPS16e instructions.
490 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
491 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
493 * configure: Regenerate.
495 2005-05-26 David Ung <davidu@mips.com>
497 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
498 tags to all instructions which are applicable to the new ISAs.
499 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
501 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
503 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
505 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
506 * configure: Regenerate.
508 2005-03-23 Mark Kettenis <kettenis@gnu.org>
510 * configure: Regenerate.
512 2005-01-14 Andrew Cagney <cagney@gnu.org>
514 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
515 explicit call to AC_CONFIG_HEADER.
516 * configure: Regenerate.
518 2005-01-12 Andrew Cagney <cagney@gnu.org>
520 * configure.ac: Update to use ../common/common.m4.
521 * configure: Re-generate.
523 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
525 * configure: Regenerated to track ../common/aclocal.m4 changes.
527 2005-01-07 Andrew Cagney <cagney@gnu.org>
529 * configure.ac: Rename configure.in, require autoconf 2.59.
530 * configure: Re-generate.
532 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
534 * configure: Regenerate for ../common/aclocal.m4 update.
536 2004-09-24 Monika Chaddha <monika@acmet.com>
538 Committed by Andrew Cagney.
539 * m16.igen (CMP, CMPI): Fix assembler.
541 2004-08-18 Chris Demetriou <cgd@broadcom.com>
543 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
544 * configure: Regenerate.
546 2004-06-25 Chris Demetriou <cgd@broadcom.com>
548 * configure.in (sim_m16_machine): Include mipsIII.
549 * configure: Regenerate.
551 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
553 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
555 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
557 2004-04-10 Chris Demetriou <cgd@broadcom.com>
559 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
561 2004-04-09 Chris Demetriou <cgd@broadcom.com>
563 * mips.igen (check_fmt): Remove.
564 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
565 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
566 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
567 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
568 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
569 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
570 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
571 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
572 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
573 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
575 2004-04-09 Chris Demetriou <cgd@broadcom.com>
577 * sb1.igen (check_sbx): New function.
578 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
580 2004-03-29 Chris Demetriou <cgd@broadcom.com>
581 Richard Sandiford <rsandifo@redhat.com>
583 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
584 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
585 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
586 separate implementations for mipsIV and mipsV. Use new macros to
587 determine whether the restrictions apply.
589 2004-01-19 Chris Demetriou <cgd@broadcom.com>
591 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
592 (check_mult_hilo): Improve comments.
593 (check_div_hilo): Likewise. Also, fork off a new version
594 to handle mips32/mips64 (since there are no hazards to check
597 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
599 * mips.igen (do_dmultx): Fix check for negative operands.
601 2003-05-16 Ian Lance Taylor <ian@airs.com>
603 * Makefile.in (SHELL): Make sure this is defined.
604 (various): Use $(SHELL) whenever we invoke move-if-change.
606 2003-05-03 Chris Demetriou <cgd@broadcom.com>
608 * cp1.c: Tweak attribution slightly.
611 * mdmx.igen: Likewise.
612 * mips3d.igen: Likewise.
613 * sb1.igen: Likewise.
615 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
617 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
620 2003-02-27 Andrew Cagney <cagney@redhat.com>
622 * interp.c (sim_open): Rename _bfd to bfd.
623 (sim_create_inferior): Ditto.
625 2003-01-14 Chris Demetriou <cgd@broadcom.com>
627 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
629 2003-01-14 Chris Demetriou <cgd@broadcom.com>
631 * mips.igen (EI, DI): Remove.
633 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
635 * Makefile.in (tmp-run-multi): Fix mips16 filter.
637 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
638 Andrew Cagney <ac131313@redhat.com>
639 Gavin Romig-Koch <gavin@redhat.com>
640 Graydon Hoare <graydon@redhat.com>
641 Aldy Hernandez <aldyh@redhat.com>
642 Dave Brolley <brolley@redhat.com>
643 Chris Demetriou <cgd@broadcom.com>
645 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
646 (sim_mach_default): New variable.
647 (mips64vr-*-*, mips64vrel-*-*): New configurations.
648 Add a new simulator generator, MULTI.
649 * configure: Regenerate.
650 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
651 (multi-run.o): New dependency.
652 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
653 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
654 (tmp-multi): Combine them.
655 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
656 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
657 (distclean-extra): New rule.
658 * sim-main.h: Include bfd.h.
659 (MIPS_MACH): New macro.
660 * mips.igen (vr4120, vr5400, vr5500): New models.
661 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
662 * vr.igen: Replace with new version.
664 2003-01-04 Chris Demetriou <cgd@broadcom.com>
666 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
667 * configure: Regenerate.
669 2002-12-31 Chris Demetriou <cgd@broadcom.com>
671 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
672 * mips.igen: Remove all invocations of check_branch_bug and
675 2002-12-16 Chris Demetriou <cgd@broadcom.com>
677 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
679 2002-07-30 Chris Demetriou <cgd@broadcom.com>
681 * mips.igen (do_load_double, do_store_double): New functions.
682 (LDC1, SDC1): Rename to...
683 (LDC1b, SDC1b): respectively.
684 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
686 2002-07-29 Michael Snyder <msnyder@redhat.com>
688 * cp1.c (fp_recip2): Modify initialization expression so that
689 GCC will recognize it as constant.
691 2002-06-18 Chris Demetriou <cgd@broadcom.com>
693 * mdmx.c (SD_): Delete.
694 (Unpredictable): Re-define, for now, to directly invoke
695 unpredictable_action().
696 (mdmx_acc_op): Fix error in .ob immediate handling.
698 2002-06-18 Andrew Cagney <cagney@redhat.com>
700 * interp.c (sim_firmware_command): Initialize `address'.
702 2002-06-16 Andrew Cagney <ac131313@redhat.com>
704 * configure: Regenerated to track ../common/aclocal.m4 changes.
706 2002-06-14 Chris Demetriou <cgd@broadcom.com>
707 Ed Satterthwaite <ehs@broadcom.com>
709 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
710 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
711 * mips.igen: Include mips3d.igen.
712 (mips3d): New model name for MIPS-3D ASE instructions.
713 (CVT.W.fmt): Don't use this instruction for word (source) format
715 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
716 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
717 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
718 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
719 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
720 (RSquareRoot1, RSquareRoot2): New macros.
721 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
722 (fp_rsqrt2): New functions.
723 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
724 * configure: Regenerate.
726 2002-06-13 Chris Demetriou <cgd@broadcom.com>
727 Ed Satterthwaite <ehs@broadcom.com>
729 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
730 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
731 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
732 (convert): Note that this function is not used for paired-single
734 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
735 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
736 (check_fmt_p): Enable paired-single support.
737 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
738 (PUU.PS): New instructions.
739 (CVT.S.fmt): Don't use this instruction for paired-single format
741 * sim-main.h (FP_formats): New value 'fmt_ps.'
742 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
743 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
745 2002-06-12 Chris Demetriou <cgd@broadcom.com>
747 * mips.igen: Fix formatting of function calls in
750 2002-06-12 Chris Demetriou <cgd@broadcom.com>
752 * mips.igen (MOVN, MOVZ): Trace result.
753 (TNEI): Print "tnei" as the opcode name in traces.
754 (CEIL.W): Add disassembly string for traces.
755 (RSQRT.fmt): Make location of disassembly string consistent
756 with other instructions.
758 2002-06-12 Chris Demetriou <cgd@broadcom.com>
760 * mips.igen (X): Delete unused function.
762 2002-06-08 Andrew Cagney <cagney@redhat.com>
764 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
766 2002-06-07 Chris Demetriou <cgd@broadcom.com>
767 Ed Satterthwaite <ehs@broadcom.com>
769 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
770 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
771 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
772 (fp_nmsub): New prototypes.
773 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
774 (NegMultiplySub): New defines.
775 * mips.igen (RSQRT.fmt): Use RSquareRoot().
776 (MADD.D, MADD.S): Replace with...
777 (MADD.fmt): New instruction.
778 (MSUB.D, MSUB.S): Replace with...
779 (MSUB.fmt): New instruction.
780 (NMADD.D, NMADD.S): Replace with...
781 (NMADD.fmt): New instruction.
782 (NMSUB.D, MSUB.S): Replace with...
783 (NMSUB.fmt): New instruction.
785 2002-06-07 Chris Demetriou <cgd@broadcom.com>
786 Ed Satterthwaite <ehs@broadcom.com>
788 * cp1.c: Fix more comment spelling and formatting.
789 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
790 (denorm_mode): New function.
791 (fpu_unary, fpu_binary): Round results after operation, collect
792 status from rounding operations, and update the FCSR.
793 (convert): Collect status from integer conversions and rounding
794 operations, and update the FCSR. Adjust NaN values that result
795 from conversions. Convert to use sim_io_eprintf rather than
796 fprintf, and remove some debugging code.
797 * cp1.h (fenr_FS): New define.
799 2002-06-07 Chris Demetriou <cgd@broadcom.com>
801 * cp1.c (convert): Remove unusable debugging code, and move MIPS
802 rounding mode to sim FP rounding mode flag conversion code into...
803 (rounding_mode): New function.
805 2002-06-07 Chris Demetriou <cgd@broadcom.com>
807 * cp1.c: Clean up formatting of a few comments.
808 (value_fpr): Reformat switch statement.
810 2002-06-06 Chris Demetriou <cgd@broadcom.com>
811 Ed Satterthwaite <ehs@broadcom.com>
814 * sim-main.h: Include cp1.h.
815 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
816 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
817 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
818 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
819 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
820 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
821 * cp1.c: Don't include sim-fpu.h; already included by
822 sim-main.h. Clean up formatting of some comments.
823 (NaN, Equal, Less): Remove.
824 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
825 (fp_cmp): New functions.
826 * mips.igen (do_c_cond_fmt): Remove.
827 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
828 Compare. Add result tracing.
829 (CxC1): Remove, replace with...
830 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
831 (DMxC1): Remove, replace with...
832 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
833 (MxC1): Remove, replace with...
834 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
836 2002-06-04 Chris Demetriou <cgd@broadcom.com>
838 * sim-main.h (FGRIDX): Remove, replace all uses with...
839 (FGR_BASE): New macro.
840 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
841 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
842 (NR_FGR, FGR): Likewise.
843 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
844 * mips.igen: Likewise.
846 2002-06-04 Chris Demetriou <cgd@broadcom.com>
848 * cp1.c: Add an FSF Copyright notice to this file.
850 2002-06-04 Chris Demetriou <cgd@broadcom.com>
851 Ed Satterthwaite <ehs@broadcom.com>
853 * cp1.c (Infinity): Remove.
854 * sim-main.h (Infinity): Likewise.
856 * cp1.c (fp_unary, fp_binary): New functions.
857 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
858 (fp_sqrt): New functions, implemented in terms of the above.
859 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
860 (Recip, SquareRoot): Remove (replaced by functions above).
861 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
862 (fp_recip, fp_sqrt): New prototypes.
863 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
864 (Recip, SquareRoot): Replace prototypes with #defines which
865 invoke the functions above.
867 2002-06-03 Chris Demetriou <cgd@broadcom.com>
869 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
870 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
871 file, remove PARAMS from prototypes.
872 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
873 simulator state arguments.
874 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
875 pass simulator state arguments.
876 * cp1.c (SD): Redefine as CPU_STATE(cpu).
877 (store_fpr, convert): Remove 'sd' argument.
878 (value_fpr): Likewise. Convert to use 'SD' instead.
880 2002-06-03 Chris Demetriou <cgd@broadcom.com>
882 * cp1.c (Min, Max): Remove #if 0'd functions.
883 * sim-main.h (Min, Max): Remove.
885 2002-06-03 Chris Demetriou <cgd@broadcom.com>
887 * cp1.c: fix formatting of switch case and default labels.
888 * interp.c: Likewise.
889 * sim-main.c: Likewise.
891 2002-06-03 Chris Demetriou <cgd@broadcom.com>
893 * cp1.c: Clean up comments which describe FP formats.
894 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
896 2002-06-03 Chris Demetriou <cgd@broadcom.com>
897 Ed Satterthwaite <ehs@broadcom.com>
899 * configure.in (mipsisa64sb1*-*-*): New target for supporting
900 Broadcom SiByte SB-1 processor configurations.
901 * configure: Regenerate.
902 * sb1.igen: New file.
903 * mips.igen: Include sb1.igen.
905 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
906 * mdmx.igen: Add "sb1" model to all appropriate functions and
908 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
909 (ob_func, ob_acc): Reference the above.
910 (qh_acc): Adjust to keep the same size as ob_acc.
911 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
912 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
914 2002-06-03 Chris Demetriou <cgd@broadcom.com>
916 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
918 2002-06-02 Chris Demetriou <cgd@broadcom.com>
919 Ed Satterthwaite <ehs@broadcom.com>
921 * mips.igen (mdmx): New (pseudo-)model.
922 * mdmx.c, mdmx.igen: New files.
923 * Makefile.in (SIM_OBJS): Add mdmx.o.
924 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
926 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
927 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
928 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
929 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
930 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
931 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
932 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
933 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
934 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
935 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
936 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
937 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
938 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
939 (qh_fmtsel): New macros.
940 (_sim_cpu): New member "acc".
941 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
942 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
944 2002-05-01 Chris Demetriou <cgd@broadcom.com>
946 * interp.c: Use 'deprecated' rather than 'depreciated.'
947 * sim-main.h: Likewise.
949 2002-05-01 Chris Demetriou <cgd@broadcom.com>
951 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
952 which wouldn't compile anyway.
953 * sim-main.h (unpredictable_action): New function prototype.
954 (Unpredictable): Define to call igen function unpredictable().
955 (NotWordValue): New macro to call igen function not_word_value().
956 (UndefinedResult): Remove.
957 * interp.c (undefined_result): Remove.
958 (unpredictable_action): New function.
959 * mips.igen (not_word_value, unpredictable): New functions.
960 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
961 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
962 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
963 NotWordValue() to check for unpredictable inputs, then
964 Unpredictable() to handle them.
966 2002-02-24 Chris Demetriou <cgd@broadcom.com>
968 * mips.igen: Fix formatting of calls to Unpredictable().
970 2002-04-20 Andrew Cagney <ac131313@redhat.com>
972 * interp.c (sim_open): Revert previous change.
974 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
976 * interp.c (sim_open): Disable chunk of code that wrote code in
977 vector table entries.
979 2002-03-19 Chris Demetriou <cgd@broadcom.com>
981 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
982 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
985 2002-03-19 Chris Demetriou <cgd@broadcom.com>
987 * cp1.c: Fix many formatting issues.
989 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
991 * cp1.c (fpu_format_name): New function to replace...
992 (DOFMT): This. Delete, and update all callers.
993 (fpu_rounding_mode_name): New function to replace...
994 (RMMODE): This. Delete, and update all callers.
996 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
998 * interp.c: Move FPU support routines from here to...
999 * cp1.c: Here. New file.
1000 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1001 (cp1.o): New target.
1003 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1005 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1006 * mips.igen (mips32, mips64): New models, add to all instructions
1007 and functions as appropriate.
1008 (loadstore_ea, check_u64): New variant for model mips64.
1009 (check_fmt_p): New variant for models mipsV and mips64, remove
1010 mipsV model marking fro other variant.
1013 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1014 for mips32 and mips64.
1015 (DCLO, DCLZ): New instructions for mips64.
1017 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1019 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1020 immediate or code as a hex value with the "%#lx" format.
1021 (ANDI): Likewise, and fix printed instruction name.
1023 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1025 * sim-main.h (UndefinedResult, Unpredictable): New macros
1026 which currently do nothing.
1028 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1030 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1031 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1032 (status_CU3): New definitions.
1034 * sim-main.h (ExceptionCause): Add new values for MIPS32
1035 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1036 for DebugBreakPoint and NMIReset to note their status in
1038 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1039 (SignalExceptionCacheErr): New exception macros.
1041 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1043 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1044 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1046 (SignalExceptionCoProcessorUnusable): Take as argument the
1047 unusable coprocessor number.
1049 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1051 * mips.igen: Fix formatting of all SignalException calls.
1053 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1055 * sim-main.h (SIGNEXTEND): Remove.
1057 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1059 * mips.igen: Remove gencode comment from top of file, fix
1060 spelling in another comment.
1062 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1064 * mips.igen (check_fmt, check_fmt_p): New functions to check
1065 whether specific floating point formats are usable.
1066 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1067 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1068 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1069 Use the new functions.
1070 (do_c_cond_fmt): Remove format checks...
1071 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1073 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1075 * mips.igen: Fix formatting of check_fpu calls.
1077 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1079 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1081 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1083 * mips.igen: Remove whitespace at end of lines.
1085 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1087 * mips.igen (loadstore_ea): New function to do effective
1088 address calculations.
1089 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1090 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1091 CACHE): Use loadstore_ea to do effective address computations.
1093 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1095 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1096 * mips.igen (LL, CxC1, MxC1): Likewise.
1098 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1100 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1101 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1102 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1103 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1104 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1105 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1106 Don't split opcode fields by hand, use the opcode field values
1109 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1111 * mips.igen (do_divu): Fix spacing.
1113 * mips.igen (do_dsllv): Move to be right before DSLLV,
1114 to match the rest of the do_<shift> functions.
1116 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1118 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1119 DSRL32, do_dsrlv): Trace inputs and results.
1121 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1123 * mips.igen (CACHE): Provide instruction-printing string.
1125 * interp.c (signal_exception): Comment tokens after #endif.
1127 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1129 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1130 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1131 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1132 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1133 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1134 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1135 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1136 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1138 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1140 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1141 instruction-printing string.
1142 (LWU): Use '64' as the filter flag.
1144 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1146 * mips.igen (SDXC1): Fix instruction-printing string.
1148 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1150 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1151 filter flags "32,f".
1153 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1155 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1158 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1160 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1161 add a comma) so that it more closely match the MIPS ISA
1162 documentation opcode partitioning.
1163 (PREF): Put useful names on opcode fields, and include
1164 instruction-printing string.
1166 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1168 * mips.igen (check_u64): New function which in the future will
1169 check whether 64-bit instructions are usable and signal an
1170 exception if not. Currently a no-op.
1171 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1172 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1173 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1174 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1176 * mips.igen (check_fpu): New function which in the future will
1177 check whether FPU instructions are usable and signal an exception
1178 if not. Currently a no-op.
1179 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1180 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1181 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1182 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1183 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1184 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1185 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1186 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1188 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1190 * mips.igen (do_load_left, do_load_right): Move to be immediately
1192 (do_store_left, do_store_right): Move to be immediately following
1195 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1197 * mips.igen (mipsV): New model name. Also, add it to
1198 all instructions and functions where it is appropriate.
1200 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1202 * mips.igen: For all functions and instructions, list model
1203 names that support that instruction one per line.
1205 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1207 * mips.igen: Add some additional comments about supported
1208 models, and about which instructions go where.
1209 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1210 order as is used in the rest of the file.
1212 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1214 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1215 indicating that ALU32_END or ALU64_END are there to check
1217 (DADD): Likewise, but also remove previous comment about
1220 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1222 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1223 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1224 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1225 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1226 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1227 fields (i.e., add and move commas) so that they more closely
1228 match the MIPS ISA documentation opcode partitioning.
1230 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1232 * mips.igen (ADDI): Print immediate value.
1233 (BREAK): Print code.
1234 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1235 (SLL): Print "nop" specially, and don't run the code
1236 that does the shift for the "nop" case.
1238 2001-11-17 Fred Fish <fnf@redhat.com>
1240 * sim-main.h (float_operation): Move enum declaration outside
1241 of _sim_cpu struct declaration.
1243 2001-04-12 Jim Blandy <jimb@redhat.com>
1245 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1246 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1248 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1249 PENDING_FILL, and you can get the intended effect gracefully by
1250 calling PENDING_SCHED directly.
1252 2001-02-23 Ben Elliston <bje@redhat.com>
1254 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1255 already defined elsewhere.
1257 2001-02-19 Ben Elliston <bje@redhat.com>
1259 * sim-main.h (sim_monitor): Return an int.
1260 * interp.c (sim_monitor): Add return values.
1261 (signal_exception): Handle error conditions from sim_monitor.
1263 2001-02-08 Ben Elliston <bje@redhat.com>
1265 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1266 (store_memory): Likewise, pass cia to sim_core_write*.
1268 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1270 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1271 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1273 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1275 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1276 * Makefile.in: Don't delete *.igen when cleaning directory.
1278 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1280 * m16.igen (break): Call SignalException not sim_engine_halt.
1282 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1284 From Jason Eckhardt:
1285 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1287 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1289 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1291 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1293 * mips.igen (do_dmultx): Fix typo.
1295 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1297 * configure: Regenerated to track ../common/aclocal.m4 changes.
1299 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1301 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1303 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1305 * sim-main.h (GPR_CLEAR): Define macro.
1307 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1309 * interp.c (decode_coproc): Output long using %lx and not %s.
1311 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1313 * interp.c (sim_open): Sort & extend dummy memory regions for
1314 --board=jmr3904 for eCos.
1316 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1318 * configure: Regenerated.
1320 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1322 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1323 calls, conditional on the simulator being in verbose mode.
1325 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1327 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1328 cache don't get ReservedInstruction traps.
1330 1999-11-29 Mark Salter <msalter@cygnus.com>
1332 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1333 to clear status bits in sdisr register. This is how the hardware works.
1335 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1336 being used by cygmon.
1338 1999-11-11 Andrew Haley <aph@cygnus.com>
1340 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1343 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1345 * mips.igen (MULT): Correct previous mis-applied patch.
1347 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1349 * mips.igen (delayslot32): Handle sequence like
1350 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1351 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1352 (MULT): Actually pass the third register...
1354 1999-09-03 Mark Salter <msalter@cygnus.com>
1356 * interp.c (sim_open): Added more memory aliases for additional
1357 hardware being touched by cygmon on jmr3904 board.
1359 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1361 * configure: Regenerated to track ../common/aclocal.m4 changes.
1363 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1365 * interp.c (sim_store_register): Handle case where client - GDB -
1366 specifies that a 4 byte register is 8 bytes in size.
1367 (sim_fetch_register): Ditto.
1369 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1371 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1372 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1373 (idt_monitor_base): Base address for IDT monitor traps.
1374 (pmon_monitor_base): Ditto for PMON.
1375 (lsipmon_monitor_base): Ditto for LSI PMON.
1376 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1377 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1378 (sim_firmware_command): New function.
1379 (mips_option_handler): Call it for OPTION_FIRMWARE.
1380 (sim_open): Allocate memory for idt_monitor region. If "--board"
1381 option was given, add no monitor by default. Add BREAK hooks only if
1382 monitors are also there.
1384 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1386 * interp.c (sim_monitor): Flush output before reading input.
1388 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1390 * tconfig.in (SIM_HANDLES_LMA): Always define.
1392 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1394 From Mark Salter <msalter@cygnus.com>:
1395 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1396 (sim_open): Add setup for BSP board.
1398 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1400 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1401 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1402 them as unimplemented.
1404 1999-05-08 Felix Lee <flee@cygnus.com>
1406 * configure: Regenerated to track ../common/aclocal.m4 changes.
1408 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1410 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1412 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1414 * configure.in: Any mips64vr5*-*-* target should have
1415 -DTARGET_ENABLE_FR=1.
1416 (default_endian): Any mips64vr*el-*-* target should default to
1418 * configure: Re-generate.
1420 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1422 * mips.igen (ldl): Extend from _16_, not 32.
1424 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1426 * interp.c (sim_store_register): Force registers written to by GDB
1427 into an un-interpreted state.
1429 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1431 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1432 CPU, start periodic background I/O polls.
1433 (tx3904sio_poll): New function: periodic I/O poller.
1435 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1437 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1439 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1441 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1444 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1446 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1447 (load_word): Call SIM_CORE_SIGNAL hook on error.
1448 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1449 starting. For exception dispatching, pass PC instead of NULL_CIA.
1450 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1451 * sim-main.h (COP0_BADVADDR): Define.
1452 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1453 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1454 (_sim_cpu): Add exc_* fields to store register value snapshots.
1455 * mips.igen (*): Replace memory-related SignalException* calls
1456 with references to SIM_CORE_SIGNAL hook.
1458 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1460 * sim-main.c (*): Minor warning cleanups.
1462 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1464 * m16.igen (DADDIU5): Correct type-o.
1466 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1468 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1471 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1473 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1475 (interp.o): Add dependency on itable.h
1476 (oengine.c, gencode): Delete remaining references.
1477 (BUILT_SRC_FROM_GEN): Clean up.
1479 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1482 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1483 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1484 tmp-run-hack) : New.
1485 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1486 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1487 Drop the "64" qualifier to get the HACK generator working.
1488 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1489 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1490 qualifier to get the hack generator working.
1491 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1492 (DSLL): Use do_dsll.
1493 (DSLLV): Use do_dsllv.
1494 (DSRA): Use do_dsra.
1495 (DSRL): Use do_dsrl.
1496 (DSRLV): Use do_dsrlv.
1497 (BC1): Move *vr4100 to get the HACK generator working.
1498 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1499 get the HACK generator working.
1500 (MACC) Rename to get the HACK generator working.
1501 (DMACC,MACCS,DMACCS): Add the 64.
1503 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1505 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1506 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1508 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1510 * mips/interp.c (DEBUG): Cleanups.
1512 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1514 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1515 (tx3904sio_tickle): fflush after a stdout character output.
1517 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1519 * interp.c (sim_close): Uninstall modules.
1521 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1523 * sim-main.h, interp.c (sim_monitor): Change to global
1526 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1528 * configure.in (vr4100): Only include vr4100 instructions in
1530 * configure: Re-generate.
1531 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1533 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1535 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1536 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1539 * configure.in (sim_default_gen, sim_use_gen): Replace with
1541 (--enable-sim-igen): Delete config option. Always using IGEN.
1542 * configure: Re-generate.
1544 * Makefile.in (gencode): Kill, kill, kill.
1547 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1549 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1550 bit mips16 igen simulator.
1551 * configure: Re-generate.
1553 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1554 as part of vr4100 ISA.
1555 * vr.igen: Mark all instructions as 64 bit only.
1557 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1559 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1562 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1564 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1565 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1566 * configure: Re-generate.
1568 * m16.igen (BREAK): Define breakpoint instruction.
1569 (JALX32): Mark instruction as mips16 and not r3900.
1570 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1572 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1574 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1576 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1577 insn as a debug breakpoint.
1579 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1581 (PENDING_SCHED): Clean up trace statement.
1582 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1583 (PENDING_FILL): Delay write by only one cycle.
1584 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1586 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1588 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1590 (pending_tick): Move incrementing of index to FOR statement.
1591 (pending_tick): Only update PENDING_OUT after a write has occured.
1593 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1595 * configure: Re-generate.
1597 * interp.c (sim_engine_run OLD): Delete explicit call to
1598 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1600 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1602 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1603 interrupt level number to match changed SignalExceptionInterrupt
1606 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1608 * interp.c: #include "itable.h" if WITH_IGEN.
1609 (get_insn_name): New function.
1610 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1611 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1613 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1615 * configure: Rebuilt to inhale new common/aclocal.m4.
1617 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1619 * dv-tx3904sio.c: Include sim-assert.h.
1621 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1623 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1624 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1625 Reorganize target-specific sim-hardware checks.
1626 * configure: rebuilt.
1627 * interp.c (sim_open): For tx39 target boards, set
1628 OPERATING_ENVIRONMENT, add tx3904sio devices.
1629 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1630 ROM executables. Install dv-sockser into sim-modules list.
1632 * dv-tx3904irc.c: Compiler warning clean-up.
1633 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1634 frequent hw-trace messages.
1636 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1638 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1640 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1642 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1644 * vr.igen: New file.
1645 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1646 * mips.igen: Define vr4100 model. Include vr.igen.
1647 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1649 * mips.igen (check_mf_hilo): Correct check.
1651 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1653 * sim-main.h (interrupt_event): Add prototype.
1655 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1656 register_ptr, register_value.
1657 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1659 * sim-main.h (tracefh): Make extern.
1661 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1663 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1664 Reduce unnecessarily high timer event frequency.
1665 * dv-tx3904cpu.c: Ditto for interrupt event.
1667 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1669 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1671 (interrupt_event): Made non-static.
1673 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1674 interchange of configuration values for external vs. internal
1677 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1679 * mips.igen (BREAK): Moved code to here for
1680 simulator-reserved break instructions.
1681 * gencode.c (build_instruction): Ditto.
1682 * interp.c (signal_exception): Code moved from here. Non-
1683 reserved instructions now use exception vector, rather
1685 * sim-main.h: Moved magic constants to here.
1687 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1689 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1690 register upon non-zero interrupt event level, clear upon zero
1692 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1693 by passing zero event value.
1694 (*_io_{read,write}_buffer): Endianness fixes.
1695 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1696 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1698 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1699 serial I/O and timer module at base address 0xFFFF0000.
1701 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1703 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1706 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1708 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1710 * configure: Update.
1712 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1714 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1715 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1716 * configure.in: Include tx3904tmr in hw_device list.
1717 * configure: Rebuilt.
1718 * interp.c (sim_open): Instantiate three timer instances.
1719 Fix address typo of tx3904irc instance.
1721 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1723 * interp.c (signal_exception): SystemCall exception now uses
1724 the exception vector.
1726 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1728 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1731 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1733 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1735 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1737 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1739 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1740 sim-main.h. Declare a struct hw_descriptor instead of struct
1741 hw_device_descriptor.
1743 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1745 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1746 right bits and then re-align left hand bytes to correct byte
1747 lanes. Fix incorrect computation in do_store_left when loading
1748 bytes from second word.
1750 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1752 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1753 * interp.c (sim_open): Only create a device tree when HW is
1756 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1757 * interp.c (signal_exception): Ditto.
1759 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1761 * gencode.c: Mark BEGEZALL as LIKELY.
1763 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1765 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1766 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1768 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1770 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1771 modules. Recognize TX39 target with "mips*tx39" pattern.
1772 * configure: Rebuilt.
1773 * sim-main.h (*): Added many macros defining bits in
1774 TX39 control registers.
1775 (SignalInterrupt): Send actual PC instead of NULL.
1776 (SignalNMIReset): New exception type.
1777 * interp.c (board): New variable for future use to identify
1778 a particular board being simulated.
1779 (mips_option_handler,mips_options): Added "--board" option.
1780 (interrupt_event): Send actual PC.
1781 (sim_open): Make memory layout conditional on board setting.
1782 (signal_exception): Initial implementation of hardware interrupt
1783 handling. Accept another break instruction variant for simulator
1785 (decode_coproc): Implement RFE instruction for TX39.
1786 (mips.igen): Decode RFE instruction as such.
1787 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1788 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1789 bbegin to implement memory map.
1790 * dv-tx3904cpu.c: New file.
1791 * dv-tx3904irc.c: New file.
1793 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1795 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1797 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1799 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1800 with calls to check_div_hilo.
1802 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1804 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1805 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1806 Add special r3900 version of do_mult_hilo.
1807 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1808 with calls to check_mult_hilo.
1809 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1810 with calls to check_div_hilo.
1812 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1814 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1815 Document a replacement.
1817 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1819 * interp.c (sim_monitor): Make mon_printf work.
1821 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1823 * sim-main.h (INSN_NAME): New arg `cpu'.
1825 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1827 * configure: Regenerated to track ../common/aclocal.m4 changes.
1829 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1831 * configure: Regenerated to track ../common/aclocal.m4 changes.
1834 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1836 * acconfig.h: New file.
1837 * configure.in: Reverted change of Apr 24; use sinclude again.
1839 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1841 * configure: Regenerated to track ../common/aclocal.m4 changes.
1844 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1846 * configure.in: Don't call sinclude.
1848 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1850 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1852 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1854 * mips.igen (ERET): Implement.
1856 * interp.c (decode_coproc): Return sign-extended EPC.
1858 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1860 * interp.c (signal_exception): Do not ignore Trap.
1861 (signal_exception): On TRAP, restart at exception address.
1862 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1863 (signal_exception): Update.
1864 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1865 so that TRAP instructions are caught.
1867 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1869 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1870 contains HI/LO access history.
1871 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1872 (HIACCESS, LOACCESS): Delete, replace with
1873 (HIHISTORY, LOHISTORY): New macros.
1874 (CHECKHILO): Delete all, moved to mips.igen
1876 * gencode.c (build_instruction): Do not generate checks for
1877 correct HI/LO register usage.
1879 * interp.c (old_engine_run): Delete checks for correct HI/LO
1882 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1883 check_mf_cycles): New functions.
1884 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1885 do_divu, domultx, do_mult, do_multu): Use.
1887 * tx.igen ("madd", "maddu"): Use.
1889 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
1891 * mips.igen (DSRAV): Use function do_dsrav.
1892 (SRAV): Use new function do_srav.
1894 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1895 (B): Sign extend 11 bit immediate.
1896 (EXT-B*): Shift 16 bit immediate left by 1.
1897 (ADDIU*): Don't sign extend immediate value.
1899 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1901 * m16run.c (sim_engine_run): Restore CIA after handling an event.
1903 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1906 * mips.igen (delayslot32, nullify_next_insn): New functions.
1907 (m16.igen): Always include.
1908 (do_*): Add more tracing.
1910 * m16.igen (delayslot16): Add NIA argument, could be called by a
1911 32 bit MIPS16 instruction.
1913 * interp.c (ifetch16): Move function from here.
1914 * sim-main.c (ifetch16): To here.
1916 * sim-main.c (ifetch16, ifetch32): Update to match current
1917 implementations of LH, LW.
1918 (signal_exception): Don't print out incorrect hex value of illegal
1921 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1923 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1926 * m16.igen: Implement MIPS16 instructions.
1928 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1929 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1930 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1931 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1932 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
1933 bodies of corresponding code from 32 bit insn to these. Also used
1934 by MIPS16 versions of functions.
1936 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1937 (IMEM16): Drop NR argument from macro.
1939 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1941 * Makefile.in (SIM_OBJS): Add sim-main.o.
1943 * sim-main.h (address_translation, load_memory, store_memory,
1944 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1946 (pr_addr, pr_uword64): Declare.
1947 (sim-main.c): Include when H_REVEALS_MODULE_P.
1949 * interp.c (address_translation, load_memory, store_memory,
1950 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1952 * sim-main.c: To here. Fix compilation problems.
1954 * configure.in: Enable inlining.
1955 * configure: Re-config.
1957 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
1959 * configure: Regenerated to track ../common/aclocal.m4 changes.
1961 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
1963 * mips.igen: Include tx.igen.
1964 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1965 * tx.igen: New file, contains MADD and MADDU.
1967 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1968 the hardwired constant `7'.
1969 (store_memory): Ditto.
1970 (LOADDRMASK): Move definition to sim-main.h.
1972 mips.igen (MTC0): Enable for r3900.
1975 mips.igen (do_load_byte): Delete.
1976 (do_load, do_store, do_load_left, do_load_write, do_store_left,
1977 do_store_right): New functions.
1978 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1980 configure.in: Let the tx39 use igen again.
1983 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1985 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1986 not an address sized quantity. Return zero for cache sizes.
1988 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
1990 * mips.igen (r3900): r3900 does not support 64 bit integer
1993 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
1995 * configure.in (mipstx39*-*-*): Use gencode simulator rather
1997 * configure : Rebuild.
1999 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2001 * configure: Regenerated to track ../common/aclocal.m4 changes.
2003 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2005 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2007 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2009 * configure: Regenerated to track ../common/aclocal.m4 changes.
2010 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2012 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2014 * configure: Regenerated to track ../common/aclocal.m4 changes.
2016 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2018 * interp.c (Max, Min): Comment out functions. Not yet used.
2020 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2022 * configure: Regenerated to track ../common/aclocal.m4 changes.
2024 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2026 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2027 configurable settings for stand-alone simulator.
2029 * configure.in: Added X11 search, just in case.
2031 * configure: Regenerated.
2033 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2035 * interp.c (sim_write, sim_read, load_memory, store_memory):
2036 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2038 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2040 * sim-main.h (GETFCC): Return an unsigned value.
2042 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2044 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2045 (DADD): Result destination is RD not RT.
2047 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2049 * sim-main.h (HIACCESS, LOACCESS): Always define.
2051 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2053 * interp.c (sim_info): Delete.
2055 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2057 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2058 (mips_option_handler): New argument `cpu'.
2059 (sim_open): Update call to sim_add_option_table.
2061 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2063 * mips.igen (CxC1): Add tracing.
2065 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2067 * sim-main.h (Max, Min): Declare.
2069 * interp.c (Max, Min): New functions.
2071 * mips.igen (BC1): Add tracing.
2073 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2075 * interp.c Added memory map for stack in vr4100
2077 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2079 * interp.c (load_memory): Add missing "break"'s.
2081 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2083 * interp.c (sim_store_register, sim_fetch_register): Pass in
2084 length parameter. Return -1.
2086 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2088 * interp.c: Added hardware init hook, fixed warnings.
2090 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2092 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2094 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2096 * interp.c (ifetch16): New function.
2098 * sim-main.h (IMEM32): Rename IMEM.
2099 (IMEM16_IMMED): Define.
2101 (DELAY_SLOT): Update.
2103 * m16run.c (sim_engine_run): New file.
2105 * m16.igen: All instructions except LB.
2106 (LB): Call do_load_byte.
2107 * mips.igen (do_load_byte): New function.
2108 (LB): Call do_load_byte.
2110 * mips.igen: Move spec for insn bit size and high bit from here.
2111 * Makefile.in (tmp-igen, tmp-m16): To here.
2113 * m16.dc: New file, decode mips16 instructions.
2115 * Makefile.in (SIM_NO_ALL): Define.
2116 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2118 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2120 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2121 point unit to 32 bit registers.
2122 * configure: Re-generate.
2124 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2126 * configure.in (sim_use_gen): Make IGEN the default simulator
2127 generator for generic 32 and 64 bit mips targets.
2128 * configure: Re-generate.
2130 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2132 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2135 * interp.c (sim_fetch_register, sim_store_register): Read/write
2136 FGR from correct location.
2137 (sim_open): Set size of FGR's according to
2138 WITH_TARGET_FLOATING_POINT_BITSIZE.
2140 * sim-main.h (FGR): Store floating point registers in a separate
2143 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2145 * configure: Regenerated to track ../common/aclocal.m4 changes.
2147 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2149 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2151 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2153 * interp.c (pending_tick): New function. Deliver pending writes.
2155 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2156 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2157 it can handle mixed sized quantites and single bits.
2159 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2161 * interp.c (oengine.h): Do not include when building with IGEN.
2162 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2163 (sim_info): Ditto for PROCESSOR_64BIT.
2164 (sim_monitor): Replace ut_reg with unsigned_word.
2165 (*): Ditto for t_reg.
2166 (LOADDRMASK): Define.
2167 (sim_open): Remove defunct check that host FP is IEEE compliant,
2168 using software to emulate floating point.
2169 (value_fpr, ...): Always compile, was conditional on HASFPU.
2171 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2173 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2176 * interp.c (SD, CPU): Define.
2177 (mips_option_handler): Set flags in each CPU.
2178 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2179 (sim_close): Do not clear STATE, deleted anyway.
2180 (sim_write, sim_read): Assume CPU zero's vm should be used for
2182 (sim_create_inferior): Set the PC for all processors.
2183 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2185 (mips16_entry): Pass correct nr of args to store_word, load_word.
2186 (ColdReset): Cold reset all cpu's.
2187 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2188 (sim_monitor, load_memory, store_memory, signal_exception): Use
2189 `CPU' instead of STATE_CPU.
2192 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2195 * sim-main.h (signal_exception): Add sim_cpu arg.
2196 (SignalException*): Pass both SD and CPU to signal_exception.
2197 * interp.c (signal_exception): Update.
2199 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2201 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2202 address_translation): Ditto
2203 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2205 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2207 * configure: Regenerated to track ../common/aclocal.m4 changes.
2209 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2211 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2213 * mips.igen (model): Map processor names onto BFD name.
2215 * sim-main.h (CPU_CIA): Delete.
2216 (SET_CIA, GET_CIA): Define
2218 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2220 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2223 * configure.in (default_endian): Configure a big-endian simulator
2225 * configure: Re-generate.
2227 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2229 * configure: Regenerated to track ../common/aclocal.m4 changes.
2231 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2233 * interp.c (sim_monitor): Handle Densan monitor outbyte
2234 and inbyte functions.
2236 1997-12-29 Felix Lee <flee@cygnus.com>
2238 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2240 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2242 * Makefile.in (tmp-igen): Arrange for $zero to always be
2243 reset to zero after every instruction.
2245 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2247 * configure: Regenerated to track ../common/aclocal.m4 changes.
2250 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2252 * mips.igen (MSUB): Fix to work like MADD.
2253 * gencode.c (MSUB): Similarly.
2255 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2257 * configure: Regenerated to track ../common/aclocal.m4 changes.
2259 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2261 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2263 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2265 * sim-main.h (sim-fpu.h): Include.
2267 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2268 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2269 using host independant sim_fpu module.
2271 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2273 * interp.c (signal_exception): Report internal errors with SIGABRT
2276 * sim-main.h (C0_CONFIG): New register.
2277 (signal.h): No longer include.
2279 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2281 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2283 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2285 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2287 * mips.igen: Tag vr5000 instructions.
2288 (ANDI): Was missing mipsIV model, fix assembler syntax.
2289 (do_c_cond_fmt): New function.
2290 (C.cond.fmt): Handle mips I-III which do not support CC field
2292 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2293 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2295 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2296 vr5000 which saves LO in a GPR separatly.
2298 * configure.in (enable-sim-igen): For vr5000, select vr5000
2299 specific instructions.
2300 * configure: Re-generate.
2302 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2304 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2306 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2307 fmt_uninterpreted_64 bit cases to switch. Convert to
2310 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2312 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2313 as specified in IV3.2 spec.
2314 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2316 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2318 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2319 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2320 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2321 PENDING_FILL versions of instructions. Simplify.
2323 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2325 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2327 (MTHI, MFHI): Disable code checking HI-LO.
2329 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2331 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2333 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2335 * gencode.c (build_mips16_operands): Replace IPC with cia.
2337 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2338 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2340 (UndefinedResult): Replace function with macro/function
2342 (sim_engine_run): Don't save PC in IPC.
2344 * sim-main.h (IPC): Delete.
2347 * interp.c (signal_exception, store_word, load_word,
2348 address_translation, load_memory, store_memory, cache_op,
2349 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2350 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2351 current instruction address - cia - argument.
2352 (sim_read, sim_write): Call address_translation directly.
2353 (sim_engine_run): Rename variable vaddr to cia.
2354 (signal_exception): Pass cia to sim_monitor
2356 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2357 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2358 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2360 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2361 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2364 * interp.c (signal_exception): Pass restart address to
2367 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2368 idecode.o): Add dependency.
2370 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2372 (DELAY_SLOT): Update NIA not PC with branch address.
2373 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2375 * mips.igen: Use CIA not PC in branch calculations.
2376 (illegal): Call SignalException.
2377 (BEQ, ADDIU): Fix assembler.
2379 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2381 * m16.igen (JALX): Was missing.
2383 * configure.in (enable-sim-igen): New configuration option.
2384 * configure: Re-generate.
2386 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2388 * interp.c (load_memory, store_memory): Delete parameter RAW.
2389 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2390 bypassing {load,store}_memory.
2392 * sim-main.h (ByteSwapMem): Delete definition.
2394 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2396 * interp.c (sim_do_command, sim_commands): Delete mips specific
2397 commands. Handled by module sim-options.
2399 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2400 (WITH_MODULO_MEMORY): Define.
2402 * interp.c (sim_info): Delete code printing memory size.
2404 * interp.c (mips_size): Nee sim_size, delete function.
2406 (monitor, monitor_base, monitor_size): Delete global variables.
2407 (sim_open, sim_close): Delete code creating monitor and other
2408 memory regions. Use sim-memopts module, via sim_do_commandf, to
2409 manage memory regions.
2410 (load_memory, store_memory): Use sim-core for memory model.
2412 * interp.c (address_translation): Delete all memory map code
2413 except line forcing 32 bit addresses.
2415 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2417 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2420 * interp.c (logfh, logfile): Delete globals.
2421 (sim_open, sim_close): Delete code opening & closing log file.
2422 (mips_option_handler): Delete -l and -n options.
2423 (OPTION mips_options): Ditto.
2425 * interp.c (OPTION mips_options): Rename option trace to dinero.
2426 (mips_option_handler): Update.
2428 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2430 * interp.c (fetch_str): New function.
2431 (sim_monitor): Rewrite using sim_read & sim_write.
2432 (sim_open): Check magic number.
2433 (sim_open): Write monitor vectors into memory using sim_write.
2434 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2435 (sim_read, sim_write): Simplify - transfer data one byte at a
2437 (load_memory, store_memory): Clarify meaning of parameter RAW.
2439 * sim-main.h (isHOST): Defete definition.
2440 (isTARGET): Mark as depreciated.
2441 (address_translation): Delete parameter HOST.
2443 * interp.c (address_translation): Delete parameter HOST.
2445 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2449 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2450 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2452 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2454 * mips.igen: Add model filter field to records.
2456 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2460 interp.c (sim_engine_run): Do not compile function sim_engine_run
2461 when WITH_IGEN == 1.
2463 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2464 target architecture.
2466 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2467 igen. Replace with configuration variables sim_igen_flags /
2470 * m16.igen: New file. Copy mips16 insns here.
2471 * mips.igen: From here.
2473 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2475 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2477 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2479 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2481 * gencode.c (build_instruction): Follow sim_write's lead in using
2482 BigEndianMem instead of !ByteSwapMem.
2484 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2486 * configure.in (sim_gen): Dependent on target, select type of
2487 generator. Always select old style generator.
2489 configure: Re-generate.
2491 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2493 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2494 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2495 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2496 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2497 SIM_@sim_gen@_*, set by autoconf.
2499 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2501 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2503 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2504 CURRENT_FLOATING_POINT instead.
2506 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2507 (address_translation): Raise exception InstructionFetch when
2508 translation fails and isINSTRUCTION.
2510 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2511 sim_engine_run): Change type of of vaddr and paddr to
2513 (address_translation, prefetch, load_memory, store_memory,
2514 cache_op): Change type of vAddr and pAddr to address_word.
2516 * gencode.c (build_instruction): Change type of vaddr and paddr to
2519 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2521 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2522 macro to obtain result of ALU op.
2524 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2526 * interp.c (sim_info): Call profile_print.
2528 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2530 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2532 * sim-main.h (WITH_PROFILE): Do not define, defined in
2533 common/sim-config.h. Use sim-profile module.
2534 (simPROFILE): Delete defintion.
2536 * interp.c (PROFILE): Delete definition.
2537 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2538 (sim_close): Delete code writing profile histogram.
2539 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2541 (sim_engine_run): Delete code profiling the PC.
2543 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2545 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2547 * interp.c (sim_monitor): Make register pointers of type
2550 * sim-main.h: Make registers of type unsigned_word not
2553 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2555 * interp.c (sync_operation): Rename from SyncOperation, make
2556 global, add SD argument.
2557 (prefetch): Rename from Prefetch, make global, add SD argument.
2558 (decode_coproc): Make global.
2560 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2562 * gencode.c (build_instruction): Generate DecodeCoproc not
2563 decode_coproc calls.
2565 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2566 (SizeFGR): Move to sim-main.h
2567 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2568 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2569 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2571 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2572 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2573 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2574 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2575 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2576 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2578 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2580 (sim-alu.h): Include.
2581 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2582 (sim_cia): Typedef to instruction_address.
2584 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2586 * Makefile.in (interp.o): Rename generated file engine.c to
2591 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2593 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2595 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2597 * gencode.c (build_instruction): For "FPSQRT", output correct
2598 number of arguments to Recip.
2600 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2602 * Makefile.in (interp.o): Depends on sim-main.h
2604 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2606 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2607 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2608 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2609 STATE, DSSTATE): Define
2610 (GPR, FGRIDX, ..): Define.
2612 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2613 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2614 (GPR, FGRIDX, ...): Delete macros.
2616 * interp.c: Update names to match defines from sim-main.h
2618 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2620 * interp.c (sim_monitor): Add SD argument.
2621 (sim_warning): Delete. Replace calls with calls to
2623 (sim_error): Delete. Replace calls with sim_io_error.
2624 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2625 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2626 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2628 (mips_size): Rename from sim_size. Add SD argument.
2630 * interp.c (simulator): Delete global variable.
2631 (callback): Delete global variable.
2632 (mips_option_handler, sim_open, sim_write, sim_read,
2633 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2634 sim_size,sim_monitor): Use sim_io_* not callback->*.
2635 (sim_open): ZALLOC simulator struct.
2636 (PROFILE): Do not define.
2638 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2640 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2641 support.h with corresponding code.
2643 * sim-main.h (word64, uword64), support.h: Move definition to
2645 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2648 * Makefile.in: Update dependencies
2649 * interp.c: Do not include.
2651 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2653 * interp.c (address_translation, load_memory, store_memory,
2654 cache_op): Rename to from AddressTranslation et.al., make global,
2657 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2660 * interp.c (SignalException): Rename to signal_exception, make
2663 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2665 * sim-main.h (SignalException, SignalExceptionInterrupt,
2666 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2667 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2668 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2671 * interp.c, support.h: Use.
2673 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2675 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2676 to value_fpr / store_fpr. Add SD argument.
2677 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2678 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2680 * sim-main.h (ValueFPR, StoreFPR): Define.
2682 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2684 * interp.c (sim_engine_run): Check consistency between configure
2685 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2688 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2689 (mips_fpu): Configure WITH_FLOATING_POINT.
2690 (mips_endian): Configure WITH_TARGET_ENDIAN.
2691 * configure: Update.
2693 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2695 * configure: Regenerated to track ../common/aclocal.m4 changes.
2697 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2699 * configure: Regenerated.
2701 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2703 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2705 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2707 * gencode.c (print_igen_insn_models): Assume certain architectures
2708 include all mips* instructions.
2709 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2712 * Makefile.in (tmp.igen): Add target. Generate igen input from
2715 * gencode.c (FEATURE_IGEN): Define.
2716 (main): Add --igen option. Generate output in igen format.
2717 (process_instructions): Format output according to igen option.
2718 (print_igen_insn_format): New function.
2719 (print_igen_insn_models): New function.
2720 (process_instructions): Only issue warnings and ignore
2721 instructions when no FEATURE_IGEN.
2723 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2725 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2728 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2730 * configure: Regenerated to track ../common/aclocal.m4 changes.
2732 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2734 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2735 SIM_RESERVED_BITS): Delete, moved to common.
2736 (SIM_EXTRA_CFLAGS): Update.
2738 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2740 * configure.in: Configure non-strict memory alignment.
2741 * configure: Regenerated to track ../common/aclocal.m4 changes.
2743 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2745 * configure: Regenerated to track ../common/aclocal.m4 changes.
2747 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2749 * gencode.c (SDBBP,DERET): Added (3900) insns.
2750 (RFE): Turn on for 3900.
2751 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2752 (dsstate): Made global.
2753 (SUBTARGET_R3900): Added.
2754 (CANCELDELAYSLOT): New.
2755 (SignalException): Ignore SystemCall rather than ignore and
2756 terminate. Add DebugBreakPoint handling.
2757 (decode_coproc): New insns RFE, DERET; and new registers Debug
2758 and DEPC protected by SUBTARGET_R3900.
2759 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2761 * Makefile.in,configure.in: Add mips subtarget option.
2762 * configure: Update.
2764 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2766 * gencode.c: Add r3900 (tx39).
2769 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2771 * gencode.c (build_instruction): Don't need to subtract 4 for
2774 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2776 * interp.c: Correct some HASFPU problems.
2778 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2780 * configure: Regenerated to track ../common/aclocal.m4 changes.
2782 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2784 * interp.c (mips_options): Fix samples option short form, should
2787 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2789 * interp.c (sim_info): Enable info code. Was just returning.
2791 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2796 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2800 (build_instruction): Ditto for LL.
2802 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2804 * configure: Regenerated to track ../common/aclocal.m4 changes.
2806 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2808 * configure: Regenerated to track ../common/aclocal.m4 changes.
2811 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2813 * interp.c (sim_open): Add call to sim_analyze_program, update
2816 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2818 * interp.c (sim_kill): Delete.
2819 (sim_create_inferior): Add ABFD argument. Set PC from same.
2820 (sim_load): Move code initializing trap handlers from here.
2821 (sim_open): To here.
2822 (sim_load): Delete, use sim-hload.c.
2824 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2826 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2828 * configure: Regenerated to track ../common/aclocal.m4 changes.
2831 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2833 * interp.c (sim_open): Add ABFD argument.
2834 (sim_load): Move call to sim_config from here.
2835 (sim_open): To here. Check return status.
2837 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2839 * gencode.c (build_instruction): Two arg MADD should
2840 not assign result to $0.
2842 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2844 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2845 * sim/mips/configure.in: Regenerate.
2847 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2849 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2850 signed8, unsigned8 et.al. types.
2852 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2853 hosts when selecting subreg.
2855 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2857 * interp.c (sim_engine_run): Reset the ZERO register to zero
2858 regardless of FEATURE_WARN_ZERO.
2859 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2861 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2863 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2864 (SignalException): For BreakPoints ignore any mode bits and just
2866 (SignalException): Always set the CAUSE register.
2868 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2870 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2871 exception has been taken.
2873 * interp.c: Implement the ERET and mt/f sr instructions.
2875 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
2877 * interp.c (SignalException): Don't bother restarting an
2880 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2882 * interp.c (SignalException): Really take an interrupt.
2883 (interrupt_event): Only deliver interrupts when enabled.
2885 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2887 * interp.c (sim_info): Only print info when verbose.
2888 (sim_info) Use sim_io_printf for output.
2890 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2892 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2895 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2897 * interp.c (sim_do_command): Check for common commands if a
2898 simulator specific command fails.
2900 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
2902 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2903 and simBE when DEBUG is defined.
2905 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * interp.c (interrupt_event): New function. Pass exception event
2908 onto exception handler.
2910 * configure.in: Check for stdlib.h.
2911 * configure: Regenerate.
2913 * gencode.c (build_instruction): Add UNUSED attribute to tempS
2914 variable declaration.
2915 (build_instruction): Initialize memval1.
2916 (build_instruction): Add UNUSED attribute to byte, bigend,
2918 (build_operands): Ditto.
2920 * interp.c: Fix GCC warnings.
2921 (sim_get_quit_code): Delete.
2923 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2924 * Makefile.in: Ditto.
2925 * configure: Re-generate.
2927 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2929 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2931 * interp.c (mips_option_handler): New function parse argumes using
2933 (myname): Replace with STATE_MY_NAME.
2934 (sim_open): Delete check for host endianness - performed by
2936 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2937 (sim_open): Move much of the initialization from here.
2938 (sim_load): To here. After the image has been loaded and
2940 (sim_open): Move ColdReset from here.
2941 (sim_create_inferior): To here.
2942 (sim_open): Make FP check less dependant on host endianness.
2944 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2946 * interp.c (sim_set_callbacks): Delete.
2948 * interp.c (membank, membank_base, membank_size): Replace with
2949 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2950 (sim_open): Remove call to callback->init. gdb/run do this.
2954 * sim-main.h (SIM_HAVE_FLATMEM): Define.
2956 * interp.c (big_endian_p): Delete, replaced by
2957 current_target_byte_order.
2959 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2961 * interp.c (host_read_long, host_read_word, host_swap_word,
2962 host_swap_long): Delete. Using common sim-endian.
2963 (sim_fetch_register, sim_store_register): Use H2T.
2964 (pipeline_ticks): Delete. Handled by sim-events.
2966 (sim_engine_run): Update.
2968 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
2970 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2972 (SignalException): To here. Signal using sim_engine_halt.
2973 (sim_stop_reason): Delete, moved to common.
2975 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
2977 * interp.c (sim_open): Add callback argument.
2978 (sim_set_callbacks): Delete SIM_DESC argument.
2981 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2983 * Makefile.in (SIM_OBJS): Add common modules.
2985 * interp.c (sim_set_callbacks): Also set SD callback.
2986 (set_endianness, xfer_*, swap_*): Delete.
2987 (host_read_word, host_read_long, host_swap_word, host_swap_long):
2988 Change to functions using sim-endian macros.
2989 (control_c, sim_stop): Delete, use common version.
2990 (simulate): Convert into.
2991 (sim_engine_run): This function.
2992 (sim_resume): Delete.
2994 * interp.c (simulation): New variable - the simulator object.
2995 (sim_kind): Delete global - merged into simulation.
2996 (sim_load): Cleanup. Move PC assignment from here.
2997 (sim_create_inferior): To here.
2999 * sim-main.h: New file.
3000 * interp.c (sim-main.h): Include.
3002 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3004 * configure: Regenerated to track ../common/aclocal.m4 changes.
3006 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3008 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3010 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3012 * gencode.c (build_instruction): DIV instructions: check
3013 for division by zero and integer overflow before using
3014 host's division operation.
3016 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3018 * Makefile.in (SIM_OBJS): Add sim-load.o.
3019 * interp.c: #include bfd.h.
3020 (target_byte_order): Delete.
3021 (sim_kind, myname, big_endian_p): New static locals.
3022 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3023 after argument parsing. Recognize -E arg, set endianness accordingly.
3024 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3025 load file into simulator. Set PC from bfd.
3026 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3027 (set_endianness): Use big_endian_p instead of target_byte_order.
3029 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3031 * interp.c (sim_size): Delete prototype - conflicts with
3032 definition in remote-sim.h. Correct definition.
3034 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3036 * configure: Regenerated to track ../common/aclocal.m4 changes.
3039 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3041 * interp.c (sim_open): New arg `kind'.
3043 * configure: Regenerated to track ../common/aclocal.m4 changes.
3045 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3047 * configure: Regenerated to track ../common/aclocal.m4 changes.
3049 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3051 * interp.c (sim_open): Set optind to 0 before calling getopt.
3053 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3055 * configure: Regenerated to track ../common/aclocal.m4 changes.
3057 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3059 * interp.c : Replace uses of pr_addr with pr_uword64
3060 where the bit length is always 64 independent of SIM_ADDR.
3061 (pr_uword64) : added.
3063 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3065 * configure: Re-generate.
3067 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3069 * configure: Regenerate to track ../common/aclocal.m4 changes.
3071 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3073 * interp.c (sim_open): New SIM_DESC result. Argument is now
3075 (other sim_*): New SIM_DESC argument.
3077 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3079 * interp.c: Fix printing of addresses for non-64-bit targets.
3080 (pr_addr): Add function to print address based on size.
3082 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3084 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3086 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3088 * gencode.c (build_mips16_operands): Correct computation of base
3089 address for extended PC relative instruction.
3091 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3093 * interp.c (mips16_entry): Add support for floating point cases.
3094 (SignalException): Pass floating point cases to mips16_entry.
3095 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3097 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3099 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3100 and then set the state to fmt_uninterpreted.
3101 (COP_SW): Temporarily set the state to fmt_word while calling
3104 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3106 * gencode.c (build_instruction): The high order may be set in the
3107 comparison flags at any ISA level, not just ISA 4.
3109 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3111 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3112 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3113 * configure.in: sinclude ../common/aclocal.m4.
3114 * configure: Regenerated.
3116 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3118 * configure: Rebuild after change to aclocal.m4.
3120 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3122 * configure configure.in Makefile.in: Update to new configure
3123 scheme which is more compatible with WinGDB builds.
3124 * configure.in: Improve comment on how to run autoconf.
3125 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3126 * Makefile.in: Use autoconf substitution to install common
3129 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3131 * gencode.c (build_instruction): Use BigEndianCPU instead of
3134 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3136 * interp.c (sim_monitor): Make output to stdout visible in
3137 wingdb's I/O log window.
3139 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3141 * support.h: Undo previous change to SIGTRAP
3144 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3146 * interp.c (store_word, load_word): New static functions.
3147 (mips16_entry): New static function.
3148 (SignalException): Look for mips16 entry and exit instructions.
3149 (simulate): Use the correct index when setting fpr_state after
3150 doing a pending move.
3152 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3154 * interp.c: Fix byte-swapping code throughout to work on
3155 both little- and big-endian hosts.
3157 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3159 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3160 with gdb/config/i386/xm-windows.h.
3162 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3164 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3165 that messes up arithmetic shifts.
3167 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3169 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3170 SIGTRAP and SIGQUIT for _WIN32.
3172 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3174 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3175 force a 64 bit multiplication.
3176 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3177 destination register is 0, since that is the default mips16 nop
3180 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3182 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3183 (build_endian_shift): Don't check proc64.
3184 (build_instruction): Always set memval to uword64. Cast op2 to
3185 uword64 when shifting it left in memory instructions. Always use
3186 the same code for stores--don't special case proc64.
3188 * gencode.c (build_mips16_operands): Fix base PC value for PC
3190 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3192 * interp.c (simJALDELAYSLOT): Define.
3193 (JALDELAYSLOT): Define.
3194 (INDELAYSLOT, INJALDELAYSLOT): Define.
3195 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3197 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3199 * interp.c (sim_open): add flush_cache as a PMON routine
3200 (sim_monitor): handle flush_cache by ignoring it
3202 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3204 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3206 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3207 (BigEndianMem): Rename to ByteSwapMem and change sense.
3208 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3209 BigEndianMem references to !ByteSwapMem.
3210 (set_endianness): New function, with prototype.
3211 (sim_open): Call set_endianness.
3212 (sim_info): Use simBE instead of BigEndianMem.
3213 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3214 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3215 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3216 ifdefs, keeping the prototype declaration.
3217 (swap_word): Rewrite correctly.
3218 (ColdReset): Delete references to CONFIG. Delete endianness related
3219 code; moved to set_endianness.
3221 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3223 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3224 * interp.c (CHECKHILO): Define away.
3225 (simSIGINT): New macro.
3226 (membank_size): Increase from 1MB to 2MB.
3227 (control_c): New function.
3228 (sim_resume): Rename parameter signal to signal_number. Add local
3229 variable prev. Call signal before and after simulate.
3230 (sim_stop_reason): Add simSIGINT support.
3231 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3233 (sim_warning): Delete call to SignalException. Do call printf_filtered
3235 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3236 a call to sim_warning.
3238 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3240 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3241 16 bit instructions.
3243 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3245 Add support for mips16 (16 bit MIPS implementation):
3246 * gencode.c (inst_type): Add mips16 instruction encoding types.
3247 (GETDATASIZEINSN): Define.
3248 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3249 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3251 (MIPS16_DECODE): New table, for mips16 instructions.
3252 (bitmap_val): New static function.
3253 (struct mips16_op): Define.
3254 (mips16_op_table): New table, for mips16 operands.
3255 (build_mips16_operands): New static function.
3256 (process_instructions): If PC is odd, decode a mips16
3257 instruction. Break out instruction handling into new
3258 build_instruction function.
3259 (build_instruction): New static function, broken out of
3260 process_instructions. Check modifiers rather than flags for SHIFT
3261 bit count and m[ft]{hi,lo} direction.
3262 (usage): Pass program name to fprintf.
3263 (main): Remove unused variable this_option_optind. Change
3264 ``*loptarg++'' to ``loptarg++''.
3265 (my_strtoul): Parenthesize && within ||.
3266 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3267 (simulate): If PC is odd, fetch a 16 bit instruction, and
3268 increment PC by 2 rather than 4.
3269 * configure.in: Add case for mips16*-*-*.
3270 * configure: Rebuild.
3272 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3274 * interp.c: Allow -t to enable tracing in standalone simulator.
3275 Fix garbage output in trace file and error messages.
3277 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3279 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3280 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3281 * configure.in: Simplify using macros in ../common/aclocal.m4.
3282 * configure: Regenerated.
3283 * tconfig.in: New file.
3285 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3287 * interp.c: Fix bugs in 64-bit port.
3288 Use ansi function declarations for msvc compiler.
3289 Initialize and test file pointer in trace code.
3290 Prevent duplicate definition of LAST_EMED_REGNUM.
3292 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3294 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3296 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3298 * interp.c (SignalException): Check for explicit terminating
3300 * gencode.c: Pass instruction value through SignalException()
3301 calls for Trap, Breakpoint and Syscall.
3303 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3305 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3306 only used on those hosts that provide it.
3307 * configure.in: Add sqrt() to list of functions to be checked for.
3308 * config.in: Re-generated.
3309 * configure: Re-generated.
3311 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3313 * gencode.c (process_instructions): Call build_endian_shift when
3314 expanding STORE RIGHT, to fix swr.
3315 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3316 clear the high bits.
3317 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3318 Fix float to int conversions to produce signed values.
3320 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3322 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3323 (process_instructions): Correct handling of nor instruction.
3324 Correct shift count for 32 bit shift instructions. Correct sign
3325 extension for arithmetic shifts to not shift the number of bits in
3326 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3327 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3329 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3330 It's OK to have a mult follow a mult. What's not OK is to have a
3331 mult follow an mfhi.
3332 (Convert): Comment out incorrect rounding code.
3334 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3336 * interp.c (sim_monitor): Improved monitor printf
3337 simulation. Tidied up simulator warnings, and added "--log" option
3338 for directing warning message output.
3339 * gencode.c: Use sim_warning() rather than WARNING macro.
3341 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3343 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3344 getopt1.o, rather than on gencode.c. Link objects together.
3345 Don't link against -liberty.
3346 (gencode.o, getopt.o, getopt1.o): New targets.
3347 * gencode.c: Include <ctype.h> and "ansidecl.h".
3348 (AND): Undefine after including "ansidecl.h".
3349 (ULONG_MAX): Define if not defined.
3350 (OP_*): Don't define macros; now defined in opcode/mips.h.
3351 (main): Call my_strtoul rather than strtoul.
3352 (my_strtoul): New static function.
3354 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3356 * gencode.c (process_instructions): Generate word64 and uword64
3357 instead of `long long' and `unsigned long long' data types.
3358 * interp.c: #include sysdep.h to get signals, and define default
3360 * (Convert): Work around for Visual-C++ compiler bug with type
3362 * support.h: Make things compile under Visual-C++ by using
3363 __int64 instead of `long long'. Change many refs to long long
3364 into word64/uword64 typedefs.
3366 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3368 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3369 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3371 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3372 (AC_PROG_INSTALL): Added.
3373 (AC_PROG_CC): Moved to before configure.host call.
3374 * configure: Rebuilt.
3376 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3378 * configure.in: Define @SIMCONF@ depending on mips target.
3379 * configure: Rebuild.
3380 * Makefile.in (run): Add @SIMCONF@ to control simulator
3382 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3383 * interp.c: Remove some debugging, provide more detailed error
3384 messages, update memory accesses to use LOADDRMASK.
3386 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3388 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3389 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3391 * configure: Rebuild.
3392 * config.in: New file, generated by autoheader.
3393 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3394 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3395 HAVE_ANINT and HAVE_AINT, as appropriate.
3396 * Makefile.in (run): Use @LIBS@ rather than -lm.
3397 (interp.o): Depend upon config.h.
3398 (Makefile): Just rebuild Makefile.
3399 (clean): Remove stamp-h.
3400 (mostlyclean): Make the same as clean, not as distclean.
3401 (config.h, stamp-h): New targets.
3403 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3405 * interp.c (ColdReset): Fix boolean test. Make all simulator
3408 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3410 * interp.c (xfer_direct_word, xfer_direct_long,
3411 swap_direct_word, swap_direct_long, xfer_big_word,
3412 xfer_big_long, xfer_little_word, xfer_little_long,
3413 swap_word,swap_long): Added.
3414 * interp.c (ColdReset): Provide function indirection to
3415 host<->simulated_target transfer routines.
3416 * interp.c (sim_store_register, sim_fetch_register): Updated to
3417 make use of indirected transfer routines.
3419 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3421 * gencode.c (process_instructions): Ensure FP ABS instruction
3423 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3424 system call support.
3426 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3428 * interp.c (sim_do_command): Complain if callback structure not
3431 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3433 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3434 support for Sun hosts.
3435 * Makefile.in (gencode): Ensure the host compiler and libraries
3436 used for cross-hosted build.
3438 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3440 * interp.c, gencode.c: Some more (TODO) tidying.
3442 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3444 * gencode.c, interp.c: Replaced explicit long long references with
3445 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3446 * support.h (SET64LO, SET64HI): Macros added.
3448 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3450 * configure: Regenerate with autoconf 2.7.
3452 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3454 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3455 * support.h: Remove superfluous "1" from #if.
3456 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3458 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3460 * interp.c (StoreFPR): Control UndefinedResult() call on
3461 WARN_RESULT manifest.
3463 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3465 * gencode.c: Tidied instruction decoding, and added FP instruction
3468 * interp.c: Added dineroIII, and BSD profiling support. Also
3469 run-time FP handling.
3471 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3473 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3474 gencode.c, interp.c, support.h: created.