sim/mips/ChangeLog

   1 Wed May 13 14:27:53 1998  Gavin Koch  <gavin@cygnus.com>
   2
   3         * r5900.igen: Replace the calls and the definition of the
   4         function check_op_hilo_hi1lo1 with the pair
   5         check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
   6
   7 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
   8
   9         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
  10         with calls to check_div_hilo.
  11
  12 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
  13
  14         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
  15         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
  16         Add special r3900 version of do_mult_hilo.
  17         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
  18         with calls to check_mult_hilo.
  19         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
  20         with calls to check_div_hilo.
  21
  22 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  23
  24         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
  25         Document a replacement.
  26
  27 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
  28
  29         * interp.c (sim_monitor): Make mon_printf work.
  30
  31 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
  32
  33         * sim-main.h (INSN_NAME): New arg `cpu'.
  34
  35 start-sanitize-sky
  36 Thu Apr 30 18:51:26 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  37
  38         * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
  39         r59fp_mula.
  40
  41 end-sanitize-sky
  42 start-sanitize-r5900
  43 Wed Apr 29 22:54:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  44
  45         * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
  46         * r5900.igen (r59fp_overflow): Use.
  47
  48         * r5900.igen (r59fp_op3): Rename to
  49         (r59fp_mula): This, delete opm argument.
  50         (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
  51         (r59fp_mula): Overflowing product propogates through to result.
  52         (r59fp_mula): ACC to the MAX propogates to result.
  53         (r59fp_mula): Underflow during multiply only sets SU.
  54
  55 end-sanitize-r5900
  56 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
  57
  58         * configure: Regenerated to track ../common/aclocal.m4 changes.
  59
  60 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
  61
  62         * configure: Regenerated to track ../common/aclocal.m4 changes.
  63         * config.in: Ditto.
  64
  65 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
  66
  67         * acconfig.h: New file.
  68         * configure.in: Reverted change of Apr 24; use sinclude again.
  69
  70 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
  71
  72         * configure: Regenerated to track ../common/aclocal.m4 changes.
  73         * config.in: Ditto.
  74
  75 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
  76
  77         * configure.in: Don't call sinclude.
  78
  79 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
  80
  81         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
  82
  83 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  84
  85         * mips.igen (ERET): Implement.
  86
  87         * interp.c (decode_coproc): Return sign-extended EPC.
  88
  89         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
  90
  91         * interp.c (signal_exception): Do not ignore Trap.
  92         (signal_exception): On TRAP, restart at exception address.
  93         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
  94         (signal_exception): Update.
  95         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
  96         so that TRAP instructions are caught.
  97
  98 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  99
 100         * sim-main.h (struct hilo_access, struct hilo_history): Define,
 101         contains HI/LO access history.
 102         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
 103         (HIACCESS, LOACCESS): Delete, replace with
 104         (HIHISTORY, LOHISTORY): New macros.
 105         (start-sanitize-r5900):
 106         (struct sim_5900_cpu): Make hi1access, lo1access of type
 107         hilo_access.
 108         (HI1ACCESS, LO1ACCESS): Delete, replace with
 109         (HI1HISTORY, LO1HISTORY): New macros.
 110         (end-sanitize-r5900):
 111         (CHECKHILO): Delete all, moved to mips.igen
 112
 113         * gencode.c (build_instruction): Do not generate checks for
 114         correct HI/LO register usage.
 115
 116         * interp.c (old_engine_run): Delete checks for correct HI/LO
 117         register usage.
 118
 119         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
 120         check_mf_cycles): New functions.
 121         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
 122         do_divu, domultx, do_mult, do_multu): Use.
 123
 124         * tx.igen ("madd", "maddu"): Use.
 125         (start-sanitize-r5900):
 126
 127         r5900.igen: Update all HI/LO checks.
 128         ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
 129         "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
 130         ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
 131         "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
 132         "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
 133         Check HI/LO op.
 134         (end-sanitize-r5900):
 135
 136 start-sanitize-sky
 137 Mon Apr 20 18:39:47 1998  Frank Ch. Eigler  <fche@cygnus.com>
 138
 139         * interp.c (decode_coproc): Correct CMFC2/QMTC2
 140         GPR access.
 141
 142         * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
 143         instead of a single 128-bit access.
 144
 145 end-sanitize-sky
 146 start-sanitize-sky
 147 Fri Apr 17 14:50:39 1998  Frank Ch. Eigler  <fche@cygnus.com>
 148
 149         * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
 150         * interp.c (cop_[ls]q): Fixes corresponding to above.
 151
 152 end-sanitize-sky
 153 start-sanitize-sky
 154 Thu Apr 16 15:24:14 1998  Frank Ch. Eigler  <fche@cygnus.com>
 155
 156         * interp.c (decode_coproc): Adapt COP2 micro interlock to
 157         clarified specs.  Reset "M" bit; exit also on "E" bit.
 158
 159 end-sanitize-sky
 160 start-sanitize-r5900
 161 Thu Apr 16 10:40:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 162
 163         * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
 164         * mips.igen (CFC1, CTC1): R5900 des not use generic version.
 165
 166         * r5900.igen (r59fp_unpack): New function.
 167         (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
 168         RSQRT.S, SQRT.S): Use.
 169         (r59fp_zero): New function.
 170         (r59fp_overflow): Generate r5900 specific overflow value.
 171         (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
 172         to zero.
 173         (CVT.S.W, CVT.W.S): Exchange implementations.
 174
 175         * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
 176
 177 end-sanitize-r5900
 178 start-sanitize-tx19
 179 Thu Apr 16 09:14:44 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 180
 181         * configure.in (tx19, sim_use_gen): Switch to igen.
 182         * configure: Re-build.
 183
 184 end-sanitize-tx19
 185 start-sanitize-sky
 186 Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 187
 188         * interp.c (decode_coproc): Make COP2 branch code compile after
 189         igen signature changes.
 190
 191 end-sanitize-sky
 192 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 193
 194         * mips.igen (DSRAV): Use function do_dsrav.
 195         (SRAV): Use new function do_srav.
 196
 197         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
 198         (B): Sign extend 11 bit immediate.
 199         (EXT-B*): Shift 16 bit immediate left by 1.
 200         (ADDIU*): Don't sign extend immediate value.
 201
 202 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 203
 204         * m16run.c (sim_engine_run): Restore CIA after handling an event.
 205
 206 start-sanitize-tx19
 207         * mips.igen (mtc0): Valid tx19 instruction.
 208
 209 end-sanitize-tx19
 210         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
 211         functions.
 212
 213         * mips.igen (delayslot32, nullify_next_insn): New functions.
 214         (m16.igen): Always include.
 215         (do_*): Add more tracing.
 216
 217         * m16.igen (delayslot16): Add NIA argument, could be called by a
 218         32 bit MIPS16 instruction.
 219
 220         * interp.c (ifetch16): Move function from here.
 221         * sim-main.c (ifetch16): To here.
 222
 223         * sim-main.c (ifetch16, ifetch32): Update to match current
 224         implementations of LH, LW.
 225         (signal_exception): Don't print out incorrect hex value of illegal
 226         instruction.
 227
 228 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 229
 230         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
 231         instruction.
 232
 233         * m16.igen: Implement MIPS16 instructions.
 234
 235         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
 236         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
 237         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
 238         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
 239         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
 240         bodies of corresponding code from 32 bit insn to these.  Also used
 241         by MIPS16 versions of functions.
 242
 243         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
 244         (IMEM16): Drop NR argument from macro.
 245
 246 start-sanitize-sky
 247 Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
 248
 249         * interp.c (decode_coproc): Add proper 1000000 bit-string at top
 250         of VU lower instruction.
 251
 252 end-sanitize-sky
 253 start-sanitize-sky
 254 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 255
 256         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
 257         instead of QUADWORD.
 258
 259         * sim-main.h: Removed attempt at allowing 128-bit access.
 260
 261 end-sanitize-sky
 262 start-sanitize-sky
 263 Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 264
 265         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
 266
 267         * interp.c (decode_coproc): Refer to VU CIA as a "special"
 268         register, not as a "misc" register.  Aha.  Add activity
 269         assertions after VCALLMS* instructions.
 270
 271 end-sanitize-sky
 272 start-sanitize-sky
 273 Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
 274
 275         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
 276         to upper code of generated VU instruction.
 277
 278 end-sanitize-sky
 279 start-sanitize-sky
 280 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
 281
 282         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
 283
 284         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 285         for TARGET_SKY.
 286
 287         * r5900.igen (SQC2): Thinko.
 288
 289 end-sanitize-sky
 290 start-sanitize-sky
 291 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 292
 293         * interp.c (*): Adapt code to merged VU device & state structs.
 294         (decode_coproc): Execute COP2 each macroinstruction without
 295         pipelining, by stepping VU to completion state.  Adapted to
 296         read_vu_*_reg style of register access.
 297
 298         * mips.igen ([SL]QC2): Removed these COP2 instructions.
 299
 300         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
 301
 302         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
 303
 304 end-sanitize-sky
 305 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 306
 307         * Makefile.in (SIM_OBJS): Add sim-main.o.
 308
 309         * sim-main.h (address_translation, load_memory, store_memory,
 310         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 311         as INLINE_SIM_MAIN.
 312         (pr_addr, pr_uword64): Declare.
 313         (sim-main.c): Include when H_REVEALS_MODULE_P.
 314
 315         * interp.c (address_translation, load_memory, store_memory,
 316         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 317         from here.
 318         * sim-main.c: To here. Fix compilation problems.
 319
 320         * configure.in: Enable inlining.
 321         * configure: Re-config.
 322
 323 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 324
 325         * configure: Regenerated to track ../common/aclocal.m4 changes.
 326
 327 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 328
 329         * mips.igen: Include tx.igen.
 330         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 331         * tx.igen: New file, contains MADD and MADDU.
 332
 333         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 334         the hardwired constant `7'.
 335         (store_memory): Ditto.
 336         (LOADDRMASK): Move definition to sim-main.h.
 337
 338         mips.igen (MTC0): Enable for r3900.
 339         (ADDU): Add trace.
 340
 341         mips.igen (do_load_byte): Delete.
 342         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 343         do_store_right): New functions.
 344         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 345
 346         configure.in: Let the tx39 use igen again.
 347         configure: Update.
 348
 349 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 350
 351         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 352         not an address sized quantity.  Return zero for cache sizes.
 353
 354 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 355
 356         * mips.igen (r3900): r3900 does not support 64 bit integer
 357         operations.
 358
 359 start-sanitize-sky
 360 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 361
 362         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 363
 364 end-sanitize-sky
 365 start-sanitize-sky
 366 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 367
 368         * interp.c (decode_coproc): Continuing COP2 work.
 369         (cop_[ls]q): Make sky-target-only.
 370
 371         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 372 end-sanitize-sky
 373 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 374
 375         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 376         than igen one.
 377         * configure : Rebuild.
 378
 379 start-sanitize-sky
 380 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 381
 382         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 383         around COP2 implementation skeleton.
 384
 385 end-sanitize-sky
 386 start-sanitize-sky
 387 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 388
 389         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 390
 391         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 392         static to access VU registers.
 393         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 394         decoding.  Work in progress.
 395
 396         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 397         overlapping/redundant bit pattern.
 398         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 399         progress.
 400
 401         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 402         status register.
 403
 404         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 405         access to coprocessor registers.
 406
 407         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 408 end-sanitize-sky
 409 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 410
 411         * configure: Regenerated to track ../common/aclocal.m4 changes.
 412
 413 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 414
 415         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 416
 417 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 418
 419         * configure: Regenerated to track ../common/aclocal.m4 changes.
 420         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 421
 422 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 423
 424         * configure: Regenerated to track ../common/aclocal.m4 changes.
 425
 426 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 427
 428         * interp.c (Max, Min): Comment out functions. Not yet used.
 429
 430 start-sanitize-vr4320
 431 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 432
 433         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 434
 435 end-sanitize-vr4320
 436 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 437
 438         * configure: Regenerated to track ../common/aclocal.m4 changes.
 439
 440 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 441
 442         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 443         configurable settings for stand-alone simulator.
 444
 445 start-sanitize-sky
 446         * configure.in: Added --with-sim-gpu2 option to specify path of
 447         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 448         links/compiles stand-alone simulator with this library.
 449
 450         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 451 end-sanitize-sky
 452         * configure.in: Added X11 search, just in case.
 453
 454         * configure: Regenerated.
 455
 456 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 457
 458         * interp.c (sim_write, sim_read, load_memory, store_memory):
 459         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 460
 461 start-sanitize-vr4320
 462 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 463
 464         * vr4320.igen (clz,dclz) : Added.
 465         (dmac): Replaced 99, with LO.
 466
 467 end-sanitize-vr4320
 468 start-sanitize-vr5400
 469 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 470
 471         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 472
 473 end-sanitize-vr5400
 474 start-sanitize-vr4320
 475 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 476
 477         * vr4320.igen: New file.
 478         * Makefile.in (vr4320.igen) : Added.
 479         * configure.in (mips64vr4320-*-*): Added.
 480         * configure : Rebuilt.
 481         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 482         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 483
 484 end-sanitize-vr4320
 485 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 486
 487         * sim-main.h (GETFCC): Return an unsigned value.
 488
 489 start-sanitize-r5900
 490         * r5900.igen: Use an unsigned array index variable `i'.
 491         (QFSRV): Ditto for variable bytes.
 492
 493 end-sanitize-r5900
 494 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 495
 496         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 497         (DADD): Result destination is RD not RT.
 498
 499 start-sanitize-r5900
 500         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 501         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 502         divide.
 503
 504 end-sanitize-r5900
 505 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 506
 507         * sim-main.h (HIACCESS, LOACCESS): Always define.
 508
 509         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 510
 511         * interp.c (sim_info): Delete.
 512
 513 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 514
 515         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 516         (mips_option_handler): New argument `cpu'.
 517         (sim_open): Update call to sim_add_option_table.
 518
 519 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 520
 521         * mips.igen (CxC1): Add tracing.
 522
 523 start-sanitize-r5900
 524 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 525
 526         * r5900.igen (StoreFP): Delete.
 527         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 528         New functions.
 529         (rsqrt.s, sqrt.s): Implement.
 530         (r59cond): New function.
 531         (C.COND.S): Call r59cond in assembler line.
 532         (cvt.w.s, cvt.s.w): Implement.
 533
 534         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 535         instruction set.
 536
 537         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 538
 539 end-sanitize-r5900
 540 start-sanitize-r5900
 541 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 542
 543         * r5900.igen: Add tracing to all p* instructions.
 544
 545 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 546
 547         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 548         to get gdb talking to re-aranged sim_cpu register structure.
 549
 550 end-sanitize-r5900
 551 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 552
 553         * sim-main.h (Max, Min): Declare.
 554
 555         * interp.c (Max, Min): New functions.
 556
 557         * mips.igen (BC1): Add tracing.
 558
 559 start-sanitize-vr5400
 560 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 561
 562         * mdmx.igen: Tag all functions as requiring either with mdmx or
 563         vr5400 processor.
 564
 565 end-sanitize-vr5400
 566 start-sanitize-r5900
 567 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 568
 569         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 570         to 32.
 571         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 572
 573         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 574
 575         * r5900.igen: Rewrite.
 576
 577         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 578         struct.
 579         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 580         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 581
 582 end-sanitize-r5900
 583 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 584
 585         * interp.c Added memory map for stack in vr4100
 586
 587 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 588
 589         * interp.c (load_memory): Add missing "break"'s.
 590
 591 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 592
 593         * interp.c (sim_store_register, sim_fetch_register): Pass in
 594         length parameter.  Return -1.
 595
 596 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 597
 598         * interp.c: Added hardware init hook, fixed warnings.
 599
 600 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 601
 602         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 603
 604 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 605
 606         * interp.c (ifetch16): New function.
 607
 608         * sim-main.h (IMEM32): Rename IMEM.
 609         (IMEM16_IMMED): Define.
 610         (IMEM16): Define.
 611         (DELAY_SLOT): Update.
 612
 613         * m16run.c (sim_engine_run): New file.
 614
 615         * m16.igen: All instructions except LB.
 616         (LB): Call do_load_byte.
 617         * mips.igen (do_load_byte): New function.
 618         (LB): Call do_load_byte.
 619
 620         * mips.igen: Move spec for insn bit size and high bit from here.
 621         * Makefile.in (tmp-igen, tmp-m16): To here.
 622
 623         * m16.dc: New file, decode mips16 instructions.
 624
 625         * Makefile.in (SIM_NO_ALL): Define.
 626         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 627
 628 start-sanitize-tx19
 629         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 630         set.
 631
 632 end-sanitize-tx19
 633 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 634
 635         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 636         point unit to 32 bit registers.
 637         * configure: Re-generate.
 638
 639 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 640
 641         * configure.in (sim_use_gen): Make IGEN the default simulator
 642         generator for generic 32 and 64 bit mips targets.
 643         * configure: Re-generate.
 644
 645 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 646
 647         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 648         bitsize.
 649
 650         * interp.c (sim_fetch_register, sim_store_register): Read/write
 651         FGR from correct location.
 652         (sim_open): Set size of FGR's according to
 653         WITH_TARGET_FLOATING_POINT_BITSIZE.
 654
 655         * sim-main.h (FGR): Store floating point registers in a separate
 656         array.
 657
 658 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 659
 660         * configure: Regenerated to track ../common/aclocal.m4 changes.
 661
 662 start-sanitize-vr5400
 663         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 664
 665 end-sanitize-vr5400
 666 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 667
 668         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 669
 670         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 671
 672         * interp.c (pending_tick): New function.  Deliver pending writes.
 673
 674         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 675         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 676         it can handle mixed sized quantites and single bits.
 677
 678 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 679
 680         * interp.c (oengine.h): Do not include when building with IGEN.
 681         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 682         (sim_info): Ditto for PROCESSOR_64BIT.
 683         (sim_monitor): Replace ut_reg with unsigned_word.
 684         (*): Ditto for t_reg.
 685         (LOADDRMASK): Define.
 686         (sim_open): Remove defunct check that host FP is IEEE compliant,
 687         using software to emulate floating point.
 688         (value_fpr, ...): Always compile, was conditional on HASFPU.
 689
 690 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 691
 692         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 693         size.
 694
 695         * interp.c (SD, CPU): Define.
 696         (mips_option_handler): Set flags in each CPU.
 697         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 698         (sim_close): Do not clear STATE, deleted anyway.
 699         (sim_write, sim_read): Assume CPU zero's vm should be used for
 700         data transfers.
 701         (sim_create_inferior): Set the PC for all processors.
 702         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 703         argument.
 704         (mips16_entry): Pass correct nr of args to store_word, load_word.
 705         (ColdReset): Cold reset all cpu's.
 706         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 707         (sim_monitor, load_memory, store_memory, signal_exception): Use
 708         `CPU' instead of STATE_CPU.
 709
 710
 711         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 712         SD or CPU_.
 713
 714         * sim-main.h (signal_exception): Add sim_cpu arg.
 715         (SignalException*): Pass both SD and CPU to signal_exception.
 716         * interp.c (signal_exception): Update.
 717
 718         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 719         Ditto
 720         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 721         address_translation): Ditto
 722         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 723
 724 start-sanitize-vr5400
 725         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 726         `sd'.
 727         (ByteAlign): Use StoreFPR, pass args in correct order.
 728
 729 end-sanitize-vr5400
 730 start-sanitize-r5900
 731 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 732
 733         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 734
 735 end-sanitize-r5900
 736 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 737
 738         * configure: Regenerated to track ../common/aclocal.m4 changes.
 739
 740 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 741
 742 start-sanitize-r5900
 743         * configure.in (sim_igen_filter): For r5900, use igen.
 744         * configure: Re-generate.
 745
 746 end-sanitize-r5900
 747         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 748
 749         * mips.igen (model): Map processor names onto BFD name.
 750
 751         * sim-main.h (CPU_CIA): Delete.
 752         (SET_CIA, GET_CIA): Define
 753
 754 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 755
 756         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 757         regiser.
 758
 759         * configure.in (default_endian): Configure a big-endian simulator
 760         by default.
 761         * configure: Re-generate.
 762
 763 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 764
 765         * configure: Regenerated to track ../common/aclocal.m4 changes.
 766
 767 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 768
 769         * interp.c (sim_monitor): Handle Densan monitor outbyte
 770         and inbyte functions.
 771
 772 1997-12-29  Felix Lee  <flee@cygnus.com>
 773
 774         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 775
 776 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 777
 778         * Makefile.in (tmp-igen): Arrange for $zero to always be
 779         reset to zero after every instruction.
 780
 781 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 782
 783         * configure: Regenerated to track ../common/aclocal.m4 changes.
 784         * config.in: Ditto.
 785
 786 start-sanitize-vr5400
 787 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 788
 789         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 790         bit values.
 791
 792 end-sanitize-vr5400
 793 start-sanitize-vr5400
 794 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 795
 796         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 797         vr5400 with the vr5000 as the default.
 798
 799 end-sanitize-vr5400
 800 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 801
 802         * mips.igen (MSUB): Fix to work like MADD.
 803         * gencode.c (MSUB): Similarly.
 804
 805 start-sanitize-vr5400
 806 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 807
 808         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 809         vr5400.
 810
 811 end-sanitize-vr5400
 812 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 813
 814         * configure: Regenerated to track ../common/aclocal.m4 changes.
 815
 816 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 817
 818         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 819
 820 start-sanitize-vr5400
 821         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 822         (value_cc, store_cc): Implement.
 823
 824         * sim-main.h: Add 8*3*8 bit accumulator.
 825
 826         * vr5400.igen: Move mdmx instructins from here
 827         * mdmx.igen: To here - new file. Add/fix missing instructions.
 828         * mips.igen: Include mdmx.igen.
 829         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 830
 831 end-sanitize-vr5400
 832 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 833
 834         * sim-main.h (sim-fpu.h): Include.
 835
 836         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 837         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 838         using host independant sim_fpu module.
 839
 840 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 841
 842         * interp.c (signal_exception): Report internal errors with SIGABRT
 843         not SIGQUIT.
 844
 845         * sim-main.h (C0_CONFIG): New register.
 846         (signal.h): No longer include.
 847
 848         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 849
 850 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 851
 852         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 853
 854 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 855
 856         * mips.igen: Tag vr5000 instructions.
 857         (ANDI): Was missing mipsIV model, fix assembler syntax.
 858         (do_c_cond_fmt): New function.
 859         (C.cond.fmt): Handle mips I-III which do not support CC field
 860         separatly.
 861         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 862         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 863         in IV3.2 spec.
 864         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 865         vr5000 which saves LO in a GPR separatly.
 866
 867         * configure.in (enable-sim-igen): For vr5000, select vr5000
 868         specific instructions.
 869         * configure: Re-generate.
 870
 871 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 872
 873         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 874
 875         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 876         fmt_uninterpreted_64 bit cases to switch.  Convert to
 877         fmt_formatted,
 878
 879         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 880
 881         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 882         as specified in IV3.2 spec.
 883         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 884
 885 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 886
 887         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 888         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 889         (start-sanitize-r5900):
 890         (LWXC1, SWXC1): Delete from r5900 instruction set.
 891         (end-sanitize-r5900):
 892         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 893         PENDING_FILL versions of instructions.  Simplify.
 894         (X): New function.
 895         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 896         instructions.
 897         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 898         a signed value.
 899         (MTHI, MFHI): Disable code checking HI-LO.
 900
 901         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 902         global.
 903         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 904
 905 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 906
 907         * gencode.c (build_mips16_operands): Replace IPC with cia.
 908
 909         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 910         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 911         IPC to `cia'.
 912         (UndefinedResult): Replace function with macro/function
 913         combination.
 914         (sim_engine_run): Don't save PC in IPC.
 915
 916         * sim-main.h (IPC): Delete.
 917
 918         start-sanitize-vr5400
 919         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 920         (do_select): Rename function select.
 921         end-sanitize-vr5400
 922
 923         * interp.c (signal_exception, store_word, load_word,
 924         address_translation, load_memory, store_memory, cache_op,
 925         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 926         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 927         current instruction address - cia - argument.
 928         (sim_read, sim_write): Call address_translation directly.
 929         (sim_engine_run): Rename variable vaddr to cia.
 930         (signal_exception): Pass cia to sim_monitor
 931
 932         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 933         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 934         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 935
 936         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 937         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 938         SIM_ASSERT.
 939
 940         * interp.c (signal_exception): Pass restart address to
 941         sim_engine_restart.
 942
 943         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 944         idecode.o): Add dependency.
 945
 946         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 947         Delete definitions
 948         (DELAY_SLOT): Update NIA not PC with branch address.
 949         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 950
 951         * mips.igen: Use CIA not PC in branch calculations.
 952         (illegal): Call SignalException.
 953         (BEQ, ADDIU): Fix assembler.
 954
 955 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 956
 957         * m16.igen (JALX): Was missing.
 958
 959         * configure.in (enable-sim-igen): New configuration option.
 960         * configure: Re-generate.
 961
 962         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 963
 964         * interp.c (load_memory, store_memory): Delete parameter RAW.
 965         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 966         bypassing {load,store}_memory.
 967
 968         * sim-main.h (ByteSwapMem): Delete definition.
 969
 970         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 971
 972         * interp.c (sim_do_command, sim_commands): Delete mips specific
 973         commands.  Handled by module sim-options.
 974
 975         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 976         (WITH_MODULO_MEMORY): Define.
 977
 978         * interp.c (sim_info): Delete code printing memory size.
 979
 980         * interp.c (mips_size): Nee sim_size, delete function.
 981         (power2): Delete.
 982         (monitor, monitor_base, monitor_size): Delete global variables.
 983         (sim_open, sim_close): Delete code creating monitor and other
 984         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 985         manage memory regions.
 986         (load_memory, store_memory): Use sim-core for memory model.
 987
 988         * interp.c (address_translation): Delete all memory map code
 989         except line forcing 32 bit addresses.
 990
 991 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 992
 993         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 994         trace options.
 995
 996         * interp.c (logfh, logfile): Delete globals.
 997         (sim_open, sim_close): Delete code opening & closing log file.
 998         (mips_option_handler): Delete -l and -n options.
 999         (OPTION mips_options): Ditto.
1000
1001         * interp.c (OPTION mips_options): Rename option trace to dinero.
1002         (mips_option_handler): Update.
1003
1004 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1005
1006         * interp.c (fetch_str): New function.
1007         (sim_monitor): Rewrite using sim_read & sim_write.
1008         (sim_open): Check magic number.
1009         (sim_open): Write monitor vectors into memory using sim_write.
1010         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1011         (sim_read, sim_write): Simplify - transfer data one byte at a
1012         time.
1013         (load_memory, store_memory): Clarify meaning of parameter RAW.
1014
1015         * sim-main.h (isHOST): Defete definition.
1016         (isTARGET): Mark as depreciated.
1017         (address_translation): Delete parameter HOST.
1018
1019         * interp.c (address_translation): Delete parameter HOST.
1020
1021 start-sanitize-tx49
1022 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
1023
1024         * gencode.c: Add tx49 configury and insns.
1025         * configure.in: Add tx49 configury.
1026         * configure: Update.
1027
1028 end-sanitize-tx49
1029 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1030
1031         * mips.igen:
1032
1033         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1034         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1035
1036 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1037
1038         * mips.igen: Add model filter field to records.
1039
1040 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1041
1042         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1043
1044         interp.c (sim_engine_run): Do not compile function sim_engine_run
1045         when WITH_IGEN == 1.
1046
1047         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1048         target architecture.
1049
1050         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1051         igen. Replace with configuration variables sim_igen_flags /
1052         sim_m16_flags.
1053
1054         start-sanitize-r5900
1055         * r5900.igen: New file. Copy r5900 insns here.
1056         end-sanitize-r5900
1057         start-sanitize-vr5400
1058         * vr5400.igen: New file.
1059         end-sanitize-vr5400
1060         * m16.igen: New file.  Copy mips16 insns here.
1061         * mips.igen: From here.
1062
1063 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1064
1065         start-sanitize-vr5400
1066         * mips.igen: Tag all mipsIV instructions with vr5400 model.
1067
1068         * configure.in: Add mips64vr5400 target.
1069         * configure: Re-generate.
1070
1071         end-sanitize-vr5400
1072         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1073         to top.
1074         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1075
1076 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1077
1078         * gencode.c (build_instruction): Follow sim_write's lead in using
1079         BigEndianMem instead of !ByteSwapMem.
1080
1081 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1082
1083         * configure.in (sim_gen): Dependent on target, select type of
1084         generator.  Always select old style generator.
1085
1086         configure: Re-generate.
1087
1088         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1089         targets.
1090         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1091         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1092         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1093         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1094         SIM_@sim_gen@_*, set by autoconf.
1095
1096 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1097
1098         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1099
1100         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1101         CURRENT_FLOATING_POINT instead.
1102
1103         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1104         (address_translation): Raise exception InstructionFetch when
1105         translation fails and isINSTRUCTION.
1106
1107         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1108         sim_engine_run): Change type of of vaddr and paddr to
1109         address_word.
1110         (address_translation, prefetch, load_memory, store_memory,
1111         cache_op): Change type of vAddr and pAddr to address_word.
1112
1113         * gencode.c (build_instruction): Change type of vaddr and paddr to
1114         address_word.
1115
1116 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1117
1118         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1119         macro to obtain result of ALU op.
1120
1121 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1122
1123         * interp.c (sim_info): Call profile_print.
1124
1125 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1126
1127         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1128
1129         * sim-main.h (WITH_PROFILE): Do not define, defined in
1130         common/sim-config.h.  Use sim-profile module.
1131         (simPROFILE): Delete defintion.
1132
1133         * interp.c (PROFILE): Delete definition.
1134         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1135         (sim_close): Delete code writing profile histogram.
1136         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1137         Delete.
1138         (sim_engine_run): Delete code profiling the PC.
1139
1140 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1141
1142         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1143
1144         * interp.c (sim_monitor): Make register pointers of type
1145         unsigned_word*.
1146
1147         * sim-main.h: Make registers of type unsigned_word not
1148         signed_word.
1149
1150 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1151
1152 start-sanitize-r5900
1153         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1154         ...): Move to sim-main.h
1155
1156 end-sanitize-r5900
1157         * interp.c (sync_operation): Rename from SyncOperation, make
1158         global, add SD argument.
1159         (prefetch): Rename from Prefetch, make global, add SD argument.
1160         (decode_coproc): Make global.
1161
1162         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1163
1164         * gencode.c (build_instruction): Generate DecodeCoproc not
1165         decode_coproc calls.
1166
1167         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1168         (SizeFGR): Move to sim-main.h
1169         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1170         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1171         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1172         sim-main.h.
1173         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1174         FP_RM_TOMINF, GETRM): Move to sim-main.h.
1175         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1176         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1177         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1178         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1179
1180         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1181         exception.
1182         (sim-alu.h): Include.
1183         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1184         (sim_cia): Typedef to instruction_address.
1185
1186 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1187
1188         * Makefile.in (interp.o): Rename generated file engine.c to
1189         oengine.c.
1190
1191         * interp.c: Update.
1192
1193 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1194
1195         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1196
1197 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1198
1199         * gencode.c (build_instruction): For "FPSQRT", output correct
1200         number of arguments to Recip.
1201
1202 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1203
1204         * Makefile.in (interp.o): Depends on sim-main.h
1205
1206         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1207
1208         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1209         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1210         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1211         STATE, DSSTATE): Define
1212         (GPR, FGRIDX, ..): Define.
1213
1214         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1215         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1216         (GPR, FGRIDX, ...): Delete macros.
1217
1218         * interp.c: Update names to match defines from sim-main.h
1219
1220 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1221
1222         * interp.c (sim_monitor): Add SD argument.
1223         (sim_warning): Delete.  Replace calls with calls to
1224         sim_io_eprintf.
1225         (sim_error): Delete. Replace calls with sim_io_error.
1226         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1227         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1228         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1229         argument.
1230         (mips_size): Rename from sim_size. Add SD argument.
1231
1232         * interp.c (simulator): Delete global variable.
1233         (callback): Delete global variable.
1234         (mips_option_handler, sim_open, sim_write, sim_read,
1235         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1236         sim_size,sim_monitor): Use sim_io_* not callback->*.
1237         (sim_open): ZALLOC simulator struct.
1238         (PROFILE): Do not define.
1239
1240 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1241
1242         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1243         support.h with corresponding code.
1244
1245         * sim-main.h (word64, uword64), support.h: Move definition to
1246         sim-main.h.
1247         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1248
1249         * support.h: Delete
1250         * Makefile.in: Update dependencies
1251         * interp.c: Do not include.
1252
1253 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1254
1255         * interp.c (address_translation, load_memory, store_memory,
1256         cache_op): Rename to from AddressTranslation et.al., make global,
1257         add SD argument
1258
1259         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1260         CacheOp): Define.
1261
1262         * interp.c (SignalException): Rename to signal_exception, make
1263         global.
1264
1265         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1266
1267         * sim-main.h (SignalException, SignalExceptionInterrupt,
1268         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1269         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1270         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1271         Define.
1272
1273         * interp.c, support.h: Use.
1274
1275 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1276
1277         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1278         to value_fpr / store_fpr. Add SD argument.
1279         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1280         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1281
1282         * sim-main.h (ValueFPR, StoreFPR): Define.
1283
1284 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1285
1286         * interp.c (sim_engine_run): Check consistency between configure
1287         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1288         and HASFPU.
1289
1290         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1291         (mips_fpu): Configure WITH_FLOATING_POINT.
1292         (mips_endian): Configure WITH_TARGET_ENDIAN.
1293         * configure: Update.
1294
1295 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1296
1297         * configure: Regenerated to track ../common/aclocal.m4 changes.
1298
1299 start-sanitize-r5900
1300 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1301
1302         * interp.c (MAX_REG): Allow up-to 128 registers.
1303         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1304         (REGISTER_SA): Ditto.
1305         (sim_open): Initialize register_widths for r5900 specific
1306         registers.
1307         (sim_fetch_register, sim_store_register): Check for request of
1308         r5900 specific SA register.  Check for request for hi 64 bits of
1309         r5900 specific registers.
1310
1311 end-sanitize-r5900
1312 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1313
1314         * configure: Regenerated.
1315
1316 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1317
1318         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1319
1320 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1321
1322         * gencode.c (print_igen_insn_models): Assume certain architectures
1323         include all mips* instructions.
1324         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1325         instruction.
1326
1327         * Makefile.in (tmp.igen): Add target. Generate igen input from
1328         gencode file.
1329
1330         * gencode.c (FEATURE_IGEN): Define.
1331         (main): Add --igen option.  Generate output in igen format.
1332         (process_instructions): Format output according to igen option.
1333         (print_igen_insn_format): New function.
1334         (print_igen_insn_models): New function.
1335         (process_instructions): Only issue warnings and ignore
1336         instructions when no FEATURE_IGEN.
1337
1338 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1339
1340         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1341         MIPS targets.
1342
1343 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1344
1345         * configure: Regenerated to track ../common/aclocal.m4 changes.
1346
1347 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1348
1349         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1350         SIM_RESERVED_BITS): Delete, moved to common.
1351         (SIM_EXTRA_CFLAGS): Update.
1352
1353 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1354
1355         * configure.in: Configure non-strict memory alignment.
1356         * configure: Regenerated to track ../common/aclocal.m4 changes.
1357
1358 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1359
1360         * configure: Regenerated to track ../common/aclocal.m4 changes.
1361
1362 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1363
1364         * gencode.c (SDBBP,DERET): Added (3900) insns.
1365         (RFE): Turn on for 3900.
1366         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1367         (dsstate): Made global.
1368         (SUBTARGET_R3900): Added.
1369         (CANCELDELAYSLOT): New.
1370         (SignalException): Ignore SystemCall rather than ignore and
1371         terminate.  Add DebugBreakPoint handling.
1372         (decode_coproc): New insns RFE, DERET; and new registers Debug
1373         and DEPC protected by SUBTARGET_R3900.
1374         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1375         bits explicitly.
1376         * Makefile.in,configure.in: Add mips subtarget option.
1377         * configure: Update.
1378
1379 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1380
1381         * gencode.c: Add r3900 (tx39).
1382
1383 start-sanitize-tx19
1384         * gencode.c: Fix some configuration problems by improving
1385         the relationship between tx19 and tx39.
1386 end-sanitize-tx19
1387
1388 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1389
1390         * gencode.c (build_instruction): Don't need to subtract 4 for
1391         JALR, just 2.
1392
1393 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1394
1395         * interp.c: Correct some HASFPU problems.
1396
1397 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1398
1399         * configure: Regenerated to track ../common/aclocal.m4 changes.
1400
1401 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1402
1403         * interp.c (mips_options): Fix samples option short form, should
1404         be `x'.
1405
1406 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1407
1408         * interp.c (sim_info): Enable info code.  Was just returning.
1409
1410 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1411
1412         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1413         MFC0.
1414
1415 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1416
1417         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1418         constants.
1419         (build_instruction): Ditto for LL.
1420
1421 start-sanitize-tx19
1422 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1423
1424         * mips/configure.in, mips/gencode: Add tx19/r1900.
1425
1426 end-sanitize-tx19
1427 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1428
1429         * configure: Regenerated to track ../common/aclocal.m4 changes.
1430
1431 start-sanitize-r5900
1432 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1433
1434         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1435         for overflow due to ABS of MININT, set result to MAXINT.
1436         (build_instruction): For "psrlvw", signextend bit 31.
1437
1438 end-sanitize-r5900
1439 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1440
1441         * configure: Regenerated to track ../common/aclocal.m4 changes.
1442         * config.in: Ditto.
1443
1444 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1445
1446         * interp.c (sim_open): Add call to sim_analyze_program, update
1447         call to sim_config.
1448
1449 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1450
1451         * interp.c (sim_kill): Delete.
1452         (sim_create_inferior): Add ABFD argument. Set PC from same.
1453         (sim_load): Move code initializing trap handlers from here.
1454         (sim_open): To here.
1455         (sim_load): Delete, use sim-hload.c.
1456
1457         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1458
1459 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1460
1461         * configure: Regenerated to track ../common/aclocal.m4 changes.
1462         * config.in: Ditto.
1463
1464 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1465
1466         * interp.c (sim_open): Add ABFD argument.
1467         (sim_load): Move call to sim_config from here.
1468         (sim_open): To here.  Check return status.
1469
1470 start-sanitize-r5900
1471         * gencode.c (build_instruction): Do not define x8000000000000000,
1472         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1473
1474 end-sanitize-r5900
1475 start-sanitize-r5900
1476 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1477
1478         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1479         "pdivuw" check for overflow due to signed divide by -1.
1480
1481 end-sanitize-r5900
1482 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1483
1484         * gencode.c (build_instruction): Two arg MADD should
1485         not assign result to $0.
1486
1487 start-sanitize-r5900
1488 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1489
1490         * gencode.c (build_instruction): For "ppac5" use unsigned
1491         arrithmetic so that the sign bit doesn't smear when right shifted.
1492         (build_instruction): For "pdiv" perform sign extension when
1493         storing results in HI and LO.
1494         (build_instructions): For "pdiv" and "pdivbw" check for
1495         divide-by-zero.
1496         (build_instruction): For "pmfhl.slw" update hi part of dest
1497         register as well as low part.
1498         (build_instruction): For "pmfhl" portably handle long long values.
1499         (build_instruction): For "pmfhl.sh" correctly negative values.
1500         Store half words 2 and three in the correct place.
1501         (build_instruction): For "psllvw", sign extend value after shift.
1502
1503 end-sanitize-r5900
1504 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1505
1506         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1507         * sim/mips/configure.in: Regenerate.
1508
1509 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1510
1511         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1512         signed8, unsigned8 et.al. types.
1513
1514 start-sanitize-r5900
1515         * gencode.c (build_instruction): For PMULTU* do not sign extend
1516         registers.  Make generated code easier to debug.
1517
1518 end-sanitize-r5900
1519         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1520         hosts when selecting subreg.
1521
1522 start-sanitize-r5900
1523 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1524
1525         * gencode.c (type_for_data_len): For 32bit operations concerned
1526         with overflow, perform op using 64bits.
1527         (build_instruction): For PADD, always compute operation using type
1528         returned by type_for_data_len.
1529         (build_instruction): For PSUBU, when overflow, saturate to zero as
1530         actually underflow.
1531
1532 end-sanitize-r5900
1533 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1534
1535 start-sanitize-r5900
1536         * gencode.c (build_instruction): Handle "pext5" according to
1537         version 1.95 of the r5900 ISA.
1538
1539         * gencode.c (build_instruction): Handle "ppac5" according to
1540         version 1.95 of the r5900 ISA.
1541
1542 end-sanitize-r5900
1543         * interp.c (sim_engine_run): Reset the ZERO register to zero
1544         regardless of FEATURE_WARN_ZERO.
1545         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1546
1547 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1548
1549         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1550         (SignalException): For BreakPoints ignore any mode bits and just
1551         save the PC.
1552         (SignalException): Always set the CAUSE register.
1553
1554 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1555
1556         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1557         exception has been taken.
1558
1559         * interp.c: Implement the ERET and mt/f sr instructions.
1560
1561 start-sanitize-r5900
1562 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1563
1564         * gencode.c (build_instruction): For paddu, extract unsigned
1565         sub-fields.
1566
1567         * gencode.c (build_instruction): Saturate padds instead of padd
1568         instructions.
1569
1570 end-sanitize-r5900
1571 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1572
1573         * interp.c (SignalException): Don't bother restarting an
1574         interrupt.
1575
1576 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1577
1578         * interp.c (SignalException): Really take an interrupt.
1579         (interrupt_event): Only deliver interrupts when enabled.
1580
1581 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1582
1583         * interp.c (sim_info): Only print info when verbose.
1584         (sim_info) Use sim_io_printf for output.
1585
1586 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1587
1588         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1589         mips architectures.
1590
1591 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1592
1593         * interp.c (sim_do_command): Check for common commands if a
1594         simulator specific command fails.
1595
1596 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1597
1598         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1599         and simBE when DEBUG is defined.
1600
1601 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1602
1603         * interp.c (interrupt_event): New function.  Pass exception event
1604         onto exception handler.
1605
1606         * configure.in: Check for stdlib.h.
1607         * configure: Regenerate.
1608
1609         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1610         variable declaration.
1611         (build_instruction): Initialize memval1.
1612         (build_instruction): Add UNUSED attribute to byte, bigend,
1613         reverse.
1614         (build_operands): Ditto.
1615
1616         * interp.c: Fix GCC warnings.
1617         (sim_get_quit_code): Delete.
1618
1619         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1620         * Makefile.in: Ditto.
1621         * configure: Re-generate.
1622
1623         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1624
1625 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1626
1627         * interp.c (mips_option_handler): New function parse argumes using
1628         sim-options.
1629         (myname): Replace with STATE_MY_NAME.
1630         (sim_open): Delete check for host endianness - performed by
1631         sim_config.
1632         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1633         (sim_open): Move much of the initialization from here.
1634         (sim_load): To here.  After the image has been loaded and
1635         endianness set.
1636         (sim_open): Move ColdReset from here.
1637         (sim_create_inferior): To here.
1638         (sim_open): Make FP check less dependant on host endianness.
1639
1640         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1641         run.
1642         * interp.c (sim_set_callbacks): Delete.
1643
1644         * interp.c (membank, membank_base, membank_size): Replace with
1645         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1646         (sim_open): Remove call to callback->init. gdb/run do this.
1647
1648         * interp.c: Update
1649
1650         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1651
1652         * interp.c (big_endian_p): Delete, replaced by
1653         current_target_byte_order.
1654
1655 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1656
1657         * interp.c (host_read_long, host_read_word, host_swap_word,
1658         host_swap_long): Delete. Using common sim-endian.
1659         (sim_fetch_register, sim_store_register): Use H2T.
1660         (pipeline_ticks): Delete.  Handled by sim-events.
1661         (sim_info): Update.
1662         (sim_engine_run): Update.
1663
1664 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1665
1666         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1667         reason from here.
1668         (SignalException): To here. Signal using sim_engine_halt.
1669         (sim_stop_reason): Delete, moved to common.
1670
1671 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1672
1673         * interp.c (sim_open): Add callback argument.
1674         (sim_set_callbacks): Delete SIM_DESC argument.
1675         (sim_size): Ditto.
1676
1677 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1678
1679         * Makefile.in (SIM_OBJS): Add common modules.
1680
1681         * interp.c (sim_set_callbacks): Also set SD callback.
1682         (set_endianness, xfer_*, swap_*): Delete.
1683         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1684         Change to functions using sim-endian macros.
1685         (control_c, sim_stop): Delete, use common version.
1686         (simulate): Convert into.
1687         (sim_engine_run): This function.
1688         (sim_resume): Delete.
1689
1690         * interp.c (simulation): New variable - the simulator object.
1691         (sim_kind): Delete global - merged into simulation.
1692         (sim_load): Cleanup.  Move PC assignment from here.
1693         (sim_create_inferior): To here.
1694
1695         * sim-main.h: New file.
1696         * interp.c (sim-main.h): Include.
1697
1698 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1699
1700         * configure: Regenerated to track ../common/aclocal.m4 changes.
1701
1702 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1703
1704         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1705
1706 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1707
1708         * gencode.c (build_instruction): DIV instructions: check
1709         for division by zero and integer overflow before using
1710         host's division operation.
1711
1712 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1713
1714         * Makefile.in (SIM_OBJS): Add sim-load.o.
1715         * interp.c: #include bfd.h.
1716         (target_byte_order): Delete.
1717         (sim_kind, myname, big_endian_p): New static locals.
1718         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1719         after argument parsing.  Recognize -E arg, set endianness accordingly.
1720         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1721         load file into simulator.  Set PC from bfd.
1722         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1723         (set_endianness): Use big_endian_p instead of target_byte_order.
1724
1725 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1726
1727         * interp.c (sim_size): Delete prototype - conflicts with
1728         definition in remote-sim.h.  Correct definition.
1729
1730 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1731
1732         * configure: Regenerated to track ../common/aclocal.m4 changes.
1733         * config.in: Ditto.
1734
1735 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1736
1737         * interp.c (sim_open): New arg `kind'.
1738
1739         * configure: Regenerated to track ../common/aclocal.m4 changes.
1740
1741 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1742
1743         * configure: Regenerated to track ../common/aclocal.m4 changes.
1744
1745 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1746
1747         * interp.c (sim_open): Set optind to 0 before calling getopt.
1748
1749 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1750
1751         * configure: Regenerated to track ../common/aclocal.m4 changes.
1752
1753 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1754
1755         * interp.c : Replace uses of pr_addr with pr_uword64
1756         where the bit length is always 64 independent of SIM_ADDR.
1757         (pr_uword64) : added.
1758
1759 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1760
1761         * configure: Re-generate.
1762
1763 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1764
1765         * configure: Regenerate to track ../common/aclocal.m4 changes.
1766
1767 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1768
1769         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1770         in argv form.
1771         (other sim_*): New SIM_DESC argument.
1772
1773 start-sanitize-r5900
1774 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1775
1776         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1777         Change values to avoid overloading DOUBLEWORD which is tested
1778         for all insns.
1779         * gencode.c: reinstate "offending code".
1780
1781 end-sanitize-r5900
1782 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1783
1784         * interp.c: Fix printing of addresses for non-64-bit targets.
1785         (pr_addr): Add function to print address based on size.
1786 start-sanitize-r5900
1787         * gencode.c: #ifdef out offending code until a permanent fix
1788         can be added.  Code is causing build errors for non-5900 mips targets.
1789 end-sanitize-r5900
1790
1791 start-sanitize-r5900
1792 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1793
1794         * gencode.c (process_instructions): Correct test for ISA dependent
1795         architecture bits in isa field of MIPS_DECODE.
1796
1797 end-sanitize-r5900
1798 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1799
1800         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1801
1802 start-sanitize-r5900
1803 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1804
1805         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1806         PMADDUW.
1807
1808 end-sanitize-r5900
1809 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1810
1811         * gencode.c (build_mips16_operands): Correct computation of base
1812         address for extended PC relative instruction.
1813
1814 start-sanitize-r5900
1815 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1816
1817         * Makefile.in, configure, configure.in, gencode.c,
1818         interp.c, support.h: add r5900.
1819
1820 end-sanitize-r5900
1821 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1822
1823         * interp.c (mips16_entry): Add support for floating point cases.
1824         (SignalException): Pass floating point cases to mips16_entry.
1825         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1826         registers.
1827         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1828         or fmt_word.
1829         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1830         and then set the state to fmt_uninterpreted.
1831         (COP_SW): Temporarily set the state to fmt_word while calling
1832         ValueFPR.
1833
1834 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1835
1836         * gencode.c (build_instruction): The high order may be set in the
1837         comparison flags at any ISA level, not just ISA 4.
1838
1839 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1840
1841         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1842         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1843         * configure.in: sinclude ../common/aclocal.m4.
1844         * configure: Regenerated.
1845
1846 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1847
1848         * configure: Rebuild after change to aclocal.m4.
1849
1850 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1851
1852         * configure configure.in Makefile.in:  Update to new configure
1853         scheme which is more compatible with WinGDB builds.
1854         * configure.in:  Improve comment on how to run autoconf.
1855         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1856         * Makefile.in:  Use autoconf substitution to install common
1857         makefile fragment.
1858
1859 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1860
1861         * gencode.c (build_instruction): Use BigEndianCPU instead of
1862         ByteSwapMem.
1863
1864 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1865
1866         * interp.c (sim_monitor): Make output to stdout visible in
1867         wingdb's I/O log window.
1868
1869 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1870
1871         * support.h: Undo previous change to SIGTRAP
1872         and SIGQUIT values.
1873
1874 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1875
1876         * interp.c (store_word, load_word): New static functions.
1877         (mips16_entry): New static function.
1878         (SignalException): Look for mips16 entry and exit instructions.
1879         (simulate): Use the correct index when setting fpr_state after
1880         doing a pending move.
1881
1882 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1883
1884         * interp.c: Fix byte-swapping code throughout to work on
1885         both little- and big-endian hosts.
1886
1887 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1888
1889         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1890         with gdb/config/i386/xm-windows.h.
1891
1892 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1893
1894         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1895         that messes up arithmetic shifts.
1896
1897 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1898
1899         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1900         SIGTRAP and SIGQUIT for _WIN32.
1901
1902 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1903
1904         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1905         force a 64 bit multiplication.
1906         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1907         destination register is 0, since that is the default mips16 nop
1908         instruction.
1909
1910 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1911
1912         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1913         (build_endian_shift): Don't check proc64.
1914         (build_instruction): Always set memval to uword64.  Cast op2 to
1915         uword64 when shifting it left in memory instructions.  Always use
1916         the same code for stores--don't special case proc64.
1917
1918         * gencode.c (build_mips16_operands): Fix base PC value for PC
1919         relative operands.
1920         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1921         jal instruction.
1922         * interp.c (simJALDELAYSLOT): Define.
1923         (JALDELAYSLOT): Define.
1924         (INDELAYSLOT, INJALDELAYSLOT): Define.
1925         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1926
1927 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1928
1929         * interp.c (sim_open): add flush_cache as a PMON routine
1930         (sim_monitor): handle flush_cache by ignoring it
1931
1932 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1933
1934         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1935         BigEndianMem.
1936         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1937         (BigEndianMem): Rename to ByteSwapMem and change sense.
1938         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1939         BigEndianMem references to !ByteSwapMem.
1940         (set_endianness): New function, with prototype.
1941         (sim_open): Call set_endianness.
1942         (sim_info): Use simBE instead of BigEndianMem.
1943         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1944         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1945         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1946         ifdefs, keeping the prototype declaration.
1947         (swap_word): Rewrite correctly.
1948         (ColdReset): Delete references to CONFIG.  Delete endianness related
1949         code; moved to set_endianness.
1950
1951 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1952
1953         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1954         * interp.c (CHECKHILO): Define away.
1955         (simSIGINT): New macro.
1956         (membank_size): Increase from 1MB to 2MB.
1957         (control_c): New function.
1958         (sim_resume): Rename parameter signal to signal_number.  Add local
1959         variable prev.  Call signal before and after simulate.
1960         (sim_stop_reason): Add simSIGINT support.
1961         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1962         functions always.
1963         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1964         if logfh is NULL.
1965         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1966         a call to sim_warning.
1967
1968 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1969
1970         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1971         16 bit instructions.
1972
1973 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1974
1975         Add support for mips16 (16 bit MIPS implementation):
1976         * gencode.c (inst_type): Add mips16 instruction encoding types.
1977         (GETDATASIZEINSN): Define.
1978         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1979         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1980         mtlo.
1981         (MIPS16_DECODE): New table, for mips16 instructions.
1982         (bitmap_val): New static function.
1983         (struct mips16_op): Define.
1984         (mips16_op_table): New table, for mips16 operands.
1985         (build_mips16_operands): New static function.
1986         (process_instructions): If PC is odd, decode a mips16
1987         instruction.  Break out instruction handling into new
1988         build_instruction function.
1989         (build_instruction): New static function, broken out of
1990         process_instructions.  Check modifiers rather than flags for SHIFT
1991         bit count and m[ft]{hi,lo} direction.
1992         (usage): Pass program name to fprintf.
1993         (main): Remove unused variable this_option_optind.  Change
1994         ``*loptarg++'' to ``loptarg++''.
1995         (my_strtoul): Parenthesize && within ||.
1996         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1997         (simulate): If PC is odd, fetch a 16 bit instruction, and
1998         increment PC by 2 rather than 4.
1999         * configure.in: Add case for mips16*-*-*.
2000         * configure: Rebuild.
2001
2002 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2003
2004         * interp.c: Allow -t to enable tracing in standalone simulator.
2005         Fix garbage output in trace file and error messages.
2006
2007 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2008
2009         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2010         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2011         * configure.in: Simplify using macros in ../common/aclocal.m4.
2012         * configure: Regenerated.
2013         * tconfig.in: New file.
2014
2015 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2016
2017         * interp.c: Fix bugs in 64-bit port.
2018         Use ansi function declarations for msvc compiler.
2019         Initialize and test file pointer in trace code.
2020         Prevent duplicate definition of LAST_EMED_REGNUM.
2021
2022 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2023
2024         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2025
2026 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2027
2028         * interp.c (SignalException): Check for explicit terminating
2029         breakpoint value.
2030         * gencode.c: Pass instruction value through SignalException()
2031         calls for Trap, Breakpoint and Syscall.
2032
2033 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2034
2035         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2036         only used on those hosts that provide it.
2037         * configure.in: Add sqrt() to list of functions to be checked for.
2038         * config.in: Re-generated.
2039         * configure: Re-generated.
2040
2041 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2042
2043         * gencode.c (process_instructions): Call build_endian_shift when
2044         expanding STORE RIGHT, to fix swr.
2045         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2046         clear the high bits.
2047         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2048         Fix float to int conversions to produce signed values.
2049
2050 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2051
2052         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2053         (process_instructions): Correct handling of nor instruction.
2054         Correct shift count for 32 bit shift instructions. Correct sign
2055         extension for arithmetic shifts to not shift the number of bits in
2056         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2057         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2058         Fix madd.
2059         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2060         It's OK to have a mult follow a mult.  What's not OK is to have a
2061         mult follow an mfhi.
2062         (Convert): Comment out incorrect rounding code.
2063
2064 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2065
2066         * interp.c (sim_monitor): Improved monitor printf
2067         simulation. Tidied up simulator warnings, and added "--log" option
2068         for directing warning message output.
2069         * gencode.c: Use sim_warning() rather than WARNING macro.
2070
2071 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2072
2073         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2074         getopt1.o, rather than on gencode.c.  Link objects together.
2075         Don't link against -liberty.
2076         (gencode.o, getopt.o, getopt1.o): New targets.
2077         * gencode.c: Include <ctype.h> and "ansidecl.h".
2078         (AND): Undefine after including "ansidecl.h".
2079         (ULONG_MAX): Define if not defined.
2080         (OP_*): Don't define macros; now defined in opcode/mips.h.
2081         (main): Call my_strtoul rather than strtoul.
2082         (my_strtoul): New static function.
2083
2084 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2085
2086         * gencode.c (process_instructions):  Generate word64 and uword64
2087         instead of `long long' and `unsigned long long' data types.
2088         * interp.c:  #include sysdep.h to get signals, and define default
2089         for SIGBUS.
2090         * (Convert):  Work around for Visual-C++ compiler bug with type
2091         conversion.
2092         * support.h:  Make things compile under Visual-C++ by using
2093         __int64 instead of `long long'.  Change many refs to long long
2094         into word64/uword64 typedefs.
2095
2096 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2097
2098         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2099         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2100         (docdir): Removed.
2101         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2102         (AC_PROG_INSTALL): Added.
2103         (AC_PROG_CC): Moved to before configure.host call.
2104         * configure: Rebuilt.
2105
2106 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2107
2108         * configure.in: Define @SIMCONF@ depending on mips target.
2109         * configure: Rebuild.
2110         * Makefile.in (run): Add @SIMCONF@ to control simulator
2111         construction.
2112         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2113         * interp.c: Remove some debugging, provide more detailed error
2114         messages, update memory accesses to use LOADDRMASK.
2115
2116 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2117
2118         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2119         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2120         stamp-h.
2121         * configure: Rebuild.
2122         * config.in: New file, generated by autoheader.
2123         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2124         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2125         HAVE_ANINT and HAVE_AINT, as appropriate.
2126         * Makefile.in (run): Use @LIBS@ rather than -lm.
2127         (interp.o): Depend upon config.h.
2128         (Makefile): Just rebuild Makefile.
2129         (clean): Remove stamp-h.
2130         (mostlyclean): Make the same as clean, not as distclean.
2131         (config.h, stamp-h): New targets.
2132
2133 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2134
2135         * interp.c (ColdReset): Fix boolean test. Make all simulator
2136         globals static.
2137
2138 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2139
2140         * interp.c (xfer_direct_word, xfer_direct_long,
2141         swap_direct_word, swap_direct_long, xfer_big_word,
2142         xfer_big_long, xfer_little_word, xfer_little_long,
2143         swap_word,swap_long): Added.
2144         * interp.c (ColdReset): Provide function indirection to
2145         host<->simulated_target transfer routines.
2146         * interp.c (sim_store_register, sim_fetch_register): Updated to
2147         make use of indirected transfer routines.
2148
2149 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2150
2151         * gencode.c (process_instructions): Ensure FP ABS instruction
2152         recognised.
2153         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2154         system call support.
2155
2156 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2157
2158         * interp.c (sim_do_command): Complain if callback structure not
2159         initialised.
2160
2161 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2162
2163         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2164         support for Sun hosts.
2165         * Makefile.in (gencode): Ensure the host compiler and libraries
2166         used for cross-hosted build.
2167
2168 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2169
2170         * interp.c, gencode.c: Some more (TODO) tidying.
2171
2172 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2173
2174         * gencode.c, interp.c: Replaced explicit long long references with
2175         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2176         * support.h (SET64LO, SET64HI): Macros added.
2177
2178 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2179
2180         * configure: Regenerate with autoconf 2.7.
2181
2182 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2183
2184         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2185         * support.h: Remove superfluous "1" from #if.
2186         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2187
2188 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2189
2190         * interp.c (StoreFPR): Control UndefinedResult() call on
2191         WARN_RESULT manifest.
2192
2193 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2194
2195         * gencode.c: Tidied instruction decoding, and added FP instruction
2196         support.
2197
2198         * interp.c: Added dineroIII, and BSD profiling support. Also
2199         run-time FP handling.
2200
2201 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2202
2203         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2204         gencode.c, interp.c, support.h: created.