sim/mips/ChangeLog

   1 start-sanitize-r5900
   2 Thu May 21 17:15:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   3
   4         * interp.c (sim_fetch_register): Convert internal r5900 regs to
   5         target byte order
   6
   7 end-sanitize-r5900
   8 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
   9
  10         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
  11         modules.  Recognize TX39 target with "mips*tx39" pattern.
  12         * configure: Rebuilt.
  13         * sim-main.h (*): Added many macros defining bits in
  14         TX39 control registers.
  15         (SignalInterrupt): Send actual PC instead of NULL.
  16         (SignalNMIReset): New exception type.
  17         * interp.c (board): New variable for future use to identify
  18         a particular board being simulated.
  19         (mips_option_handler,mips_options): Added "--board" option.
  20         (interrupt_event): Send actual PC.
  21         (sim_open): Make memory layout conditional on board setting.
  22         (signal_exception): Initial implementation of hardware interrupt
  23         handling.  Accept another break instruction variant for simulator
  24         exit.
  25         (decode_coproc): Implement RFE instruction for TX39.
  26         (mips.igen): Decode RFE instruction as such.
  27 start-sanitize-tx3904
  28         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
  29         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
  30         bbegin to implement memory map.
  31         * dv-tx3904cpu.c: New file.
  32         * dv-tx3904irc.c: New file.
  33 end-sanitize-tx3904
  34
  35 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
  36
  37         * mips.igen (check_mt_hilo): Create a separate r3900 version.
  38
  39 Wed May 13 14:27:53 1998  Gavin Koch  <gavin@cygnus.com>
  40
  41         * r5900.igen: Replace the calls and the definition of the
  42         function check_op_hilo_hi1lo1 with the pair
  43         check_mult_hilo_hi1lo1 and check_mult_hilo_hi1lo1.
  44
  45 start-sanitize-r5900
  46 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
  47
  48         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
  49         with calls to check_div_hilo.
  50
  51 end-sanitize-r5900
  52 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
  53
  54         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
  55         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
  56         Add special r3900 version of do_mult_hilo.
  57         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
  58         with calls to check_mult_hilo.
  59         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
  60         with calls to check_div_hilo.
  61
  62 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  63
  64         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
  65         Document a replacement.
  66
  67 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
  68
  69         * interp.c (sim_monitor): Make mon_printf work.
  70
  71 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
  72
  73         * sim-main.h (INSN_NAME): New arg `cpu'.
  74
  75 start-sanitize-sky
  76 Thu Apr 30 18:51:26 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  77
  78         * sky-libvpe.c (FMAdd, FMSub): Replace r59fp_op3 call with
  79         r59fp_mula.
  80
  81 end-sanitize-sky
  82 start-sanitize-r5900
  83 Wed Apr 29 22:54:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  84
  85         * sim-main.h (R5900_FP_MAX, R5900_FP_MIN): Define.
  86         * r5900.igen (r59fp_overflow): Use.
  87
  88         * r5900.igen (r59fp_op3): Rename to
  89         (r59fp_mula): This, delete opm argument.
  90         (MADD.S, MADDA.S, MSUB.S, MSUBS.S): Update.
  91         (r59fp_mula): Overflowing product propogates through to result.
  92         (r59fp_mula): ACC to the MAX propogates to result.
  93         (r59fp_mula): Underflow during multiply only sets SU.
  94
  95 end-sanitize-r5900
  96 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
  97
  98         * configure: Regenerated to track ../common/aclocal.m4 changes.
  99
 100 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 101
 102         * configure: Regenerated to track ../common/aclocal.m4 changes.
 103         * config.in: Ditto.
 104
 105 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
 106
 107         * acconfig.h: New file.
 108         * configure.in: Reverted change of Apr 24; use sinclude again.
 109
 110 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 111
 112         * configure: Regenerated to track ../common/aclocal.m4 changes.
 113         * config.in: Ditto.
 114
 115 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
 116
 117         * configure.in: Don't call sinclude.
 118
 119 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
 120
 121         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
 122
 123 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 124
 125         * mips.igen (ERET): Implement.
 126
 127         * interp.c (decode_coproc): Return sign-extended EPC.
 128
 129         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
 130
 131         * interp.c (signal_exception): Do not ignore Trap.
 132         (signal_exception): On TRAP, restart at exception address.
 133         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
 134         (signal_exception): Update.
 135         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
 136         so that TRAP instructions are caught.
 137
 138 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 139
 140         * sim-main.h (struct hilo_access, struct hilo_history): Define,
 141         contains HI/LO access history.
 142         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
 143         (HIACCESS, LOACCESS): Delete, replace with
 144         (HIHISTORY, LOHISTORY): New macros.
 145         (start-sanitize-r5900):
 146         (struct sim_5900_cpu): Make hi1access, lo1access of type
 147         hilo_access.
 148         (HI1ACCESS, LO1ACCESS): Delete, replace with
 149         (HI1HISTORY, LO1HISTORY): New macros.
 150         (end-sanitize-r5900):
 151         (CHECKHILO): Delete all, moved to mips.igen
 152
 153         * gencode.c (build_instruction): Do not generate checks for
 154         correct HI/LO register usage.
 155
 156         * interp.c (old_engine_run): Delete checks for correct HI/LO
 157         register usage.
 158
 159         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
 160         check_mf_cycles): New functions.
 161         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
 162         do_divu, domultx, do_mult, do_multu): Use.
 163
 164         * tx.igen ("madd", "maddu"): Use.
 165         (start-sanitize-r5900):
 166
 167         r5900.igen: Update all HI/LO checks.
 168         ("mfhi1", "mflo1", "mthi1", "mthi1", "pmfhi", "pmflo", "pmfhl",
 169         "pmthi", "pmtlo", "mpthl"): Check MF/MT HI/LO.
 170         ("mult1", "div1", "divu1", "multu1", "madd1", "maddu1", "pdivbw",
 171         "pdivuw", "pdivw", "phmaddh", "phmsubh", "pmaddh", "madduw",
 172         "pmaddw", "pmsubh", "pmsubw", "pmulth", "pmultuw", "pmultw"):
 173         Check HI/LO op.
 174         (end-sanitize-r5900):
 175
 176 start-sanitize-sky
 177 Mon Apr 20 18:39:47 1998  Frank Ch. Eigler  <fche@cygnus.com>
 178
 179         * interp.c (decode_coproc): Correct CMFC2/QMTC2
 180         GPR access.
 181
 182         * r5900.igen (LQ,SQ): Use a pair of 64-bit accesses
 183         instead of a single 128-bit access.
 184
 185 end-sanitize-sky
 186 start-sanitize-sky
 187 Fri Apr 17 14:50:39 1998  Frank Ch. Eigler  <fche@cygnus.com>
 188
 189         * r5900.igen (COP_[LS]Q): Transfer COP2 quadwords.
 190         * interp.c (cop_[ls]q): Fixes corresponding to above.
 191
 192 end-sanitize-sky
 193 start-sanitize-sky
 194 Thu Apr 16 15:24:14 1998  Frank Ch. Eigler  <fche@cygnus.com>
 195
 196         * interp.c (decode_coproc): Adapt COP2 micro interlock to
 197         clarified specs.  Reset "M" bit; exit also on "E" bit.
 198
 199 end-sanitize-sky
 200 start-sanitize-r5900
 201 Thu Apr 16 10:40:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 202
 203         * r5900.igen (CFC1, CTC1): Implement R5900 specific version.
 204         * mips.igen (CFC1, CTC1): R5900 des not use generic version.
 205
 206         * r5900.igen (r59fp_unpack): New function.
 207         (r59fp_op1, r59fp_op2, r59fp_op3, C.cond.S, CVT.S.W, DIV.S,
 208         RSQRT.S, SQRT.S): Use.
 209         (r59fp_zero): New function.
 210         (r59fp_overflow): Generate r5900 specific overflow value.
 211         (r59fp_store): Re-write, overflow to MAX_R5900_FP value, underflow
 212         to zero.
 213         (CVT.S.W, CVT.W.S): Exchange implementations.
 214
 215         * sim-main.h (R5900_EXPMAX, R5900_EXPMIN, R5900_EXPBIAS): Defile.
 216
 217 end-sanitize-r5900
 218 start-sanitize-tx19
 219 Thu Apr 16 09:14:44 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 220
 221         * configure.in (tx19, sim_use_gen): Switch to igen.
 222         * configure: Re-build.
 223
 224 end-sanitize-tx19
 225 start-sanitize-sky
 226 Wed Apr 15 12:41:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 227
 228         * interp.c (decode_coproc): Make COP2 branch code compile after
 229         igen signature changes.
 230
 231 end-sanitize-sky
 232 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 233
 234         * mips.igen (DSRAV): Use function do_dsrav.
 235         (SRAV): Use new function do_srav.
 236
 237         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
 238         (B): Sign extend 11 bit immediate.
 239         (EXT-B*): Shift 16 bit immediate left by 1.
 240         (ADDIU*): Don't sign extend immediate value.
 241
 242 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * m16run.c (sim_engine_run): Restore CIA after handling an event.
 245
 246 start-sanitize-tx19
 247         * mips.igen (mtc0): Valid tx19 instruction.
 248
 249 end-sanitize-tx19
 250         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
 251         functions.
 252
 253         * mips.igen (delayslot32, nullify_next_insn): New functions.
 254         (m16.igen): Always include.
 255         (do_*): Add more tracing.
 256
 257         * m16.igen (delayslot16): Add NIA argument, could be called by a
 258         32 bit MIPS16 instruction.
 259
 260         * interp.c (ifetch16): Move function from here.
 261         * sim-main.c (ifetch16): To here.
 262
 263         * sim-main.c (ifetch16, ifetch32): Update to match current
 264         implementations of LH, LW.
 265         (signal_exception): Don't print out incorrect hex value of illegal
 266         instruction.
 267
 268 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 269
 270         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
 271         instruction.
 272
 273         * m16.igen: Implement MIPS16 instructions.
 274
 275         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
 276         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
 277         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
 278         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
 279         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
 280         bodies of corresponding code from 32 bit insn to these.  Also used
 281         by MIPS16 versions of functions.
 282
 283         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
 284         (IMEM16): Drop NR argument from macro.
 285
 286 start-sanitize-sky
 287 Mon Apr 13 16:28:52 1998  Frank Ch. Eigler  <fche@cygnus.com>
 288
 289         * interp.c (decode_coproc): Add proper 1000000 bit-string at top
 290         of VU lower instruction.
 291
 292 end-sanitize-sky
 293 start-sanitize-sky
 294 Thu Apr  9 16:38:23 1998  Frank Ch. Eigler  <fche@cygnus.com>
 295
 296         * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses
 297         instead of QUADWORD.
 298
 299         * sim-main.h: Removed attempt at allowing 128-bit access.
 300
 301 end-sanitize-sky
 302 start-sanitize-sky
 303 Wed Apr  8 18:12:13 1998  Frank Ch. Eigler  <fche@cygnus.com>
 304
 305         * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o.
 306
 307         * interp.c (decode_coproc): Refer to VU CIA as a "special"
 308         register, not as a "misc" register.  Aha.  Add activity
 309         assertions after VCALLMS* instructions.
 310
 311 end-sanitize-sky
 312 start-sanitize-sky
 313 Tue Apr  7 18:32:49 1998  Frank Ch. Eigler  <fche@cygnus.com>
 314
 315         * interp.c (decode_coproc): Do not apply superfluous E (end) flag
 316         to upper code of generated VU instruction.
 317
 318 end-sanitize-sky
 319 start-sanitize-sky
 320 Mon Apr  6 19:55:56 1998  Frank Ch. Eigler  <fche@cygnus.com>
 321
 322         * interp.c (cop_[ls]q): Replaced stub with proper COP2 code.
 323
 324         * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses
 325         for TARGET_SKY.
 326
 327         * r5900.igen (SQC2): Thinko.
 328
 329 end-sanitize-sky
 330 start-sanitize-sky
 331 Sun Apr  5 12:05:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 332
 333         * interp.c (*): Adapt code to merged VU device & state structs.
 334         (decode_coproc): Execute COP2 each macroinstruction without
 335         pipelining, by stepping VU to completion state.  Adapted to
 336         read_vu_*_reg style of register access.
 337
 338         * mips.igen ([SL]QC2): Removed these COP2 instructions.
 339
 340         * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here.
 341
 342         * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards.
 343
 344 end-sanitize-sky
 345 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 346
 347         * Makefile.in (SIM_OBJS): Add sim-main.o.
 348
 349         * sim-main.h (address_translation, load_memory, store_memory,
 350         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 351         as INLINE_SIM_MAIN.
 352         (pr_addr, pr_uword64): Declare.
 353         (sim-main.c): Include when H_REVEALS_MODULE_P.
 354
 355         * interp.c (address_translation, load_memory, store_memory,
 356         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 357         from here.
 358         * sim-main.c: To here. Fix compilation problems.
 359
 360         * configure.in: Enable inlining.
 361         * configure: Re-config.
 362
 363 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 364
 365         * configure: Regenerated to track ../common/aclocal.m4 changes.
 366
 367 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 368
 369         * mips.igen: Include tx.igen.
 370         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 371         * tx.igen: New file, contains MADD and MADDU.
 372
 373         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 374         the hardwired constant `7'.
 375         (store_memory): Ditto.
 376         (LOADDRMASK): Move definition to sim-main.h.
 377
 378         mips.igen (MTC0): Enable for r3900.
 379         (ADDU): Add trace.
 380
 381         mips.igen (do_load_byte): Delete.
 382         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 383         do_store_right): New functions.
 384         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 385
 386         configure.in: Let the tx39 use igen again.
 387         configure: Update.
 388
 389 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 390
 391         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 392         not an address sized quantity.  Return zero for cache sizes.
 393
 394 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 395
 396         * mips.igen (r3900): r3900 does not support 64 bit integer
 397         operations.
 398
 399 start-sanitize-sky
 400 Wed Apr 1 08:20:31 1998  Frank Ch. Eigler  <fche@cygnus.com>
 401
 402         * mips.igen (SQC2/LQC2): Make bodies sky-target-only also.
 403
 404 end-sanitize-sky
 405 start-sanitize-sky
 406 Mon Mar 30 18:41:43 1998  Frank Ch. Eigler  <fche@cygnus.com>
 407
 408         * interp.c (decode_coproc): Continuing COP2 work.
 409         (cop_[ls]q): Make sky-target-only.
 410
 411         * sim-main.h (COP_[LS]Q): Make sky-target-only.
 412 end-sanitize-sky
 413 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 414
 415         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 416         than igen one.
 417         * configure : Rebuild.
 418
 419 start-sanitize-sky
 420 Sun Mar 29 17:50:11       Frank Ch. Eigler  <fche@cygnus.com>
 421
 422         * interp.c (decode_coproc): Added a missing TARGET_SKY check
 423         around COP2 implementation skeleton.
 424
 425 end-sanitize-sky
 426 start-sanitize-sky
 427 Fri Mar 27 16:19:29 1998  Frank Ch. Eigler  <fche@cygnus.com>
 428
 429         * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o.
 430
 431         * interp.c (sim_{load,store}_register): Use new vu[01]_device
 432         static to access VU registers.
 433         (decode_coproc): Added skeleton of sky COP2 (VU) instruction
 434         decoding.  Work in progress.
 435
 436         * mips.igen (LDCzz, SDCzz): Removed *5900 case for this
 437         overlapping/redundant bit pattern.
 438         (LQC2, SQC2): Added *5900 COP2 instruction skeleta.  Work in
 439         progress.
 440
 441         * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for
 442         status register.
 443
 444         * interp.c (cop_lq, cop_sq): New functions for future 128-bit
 445         access to coprocessor registers.
 446
 447         * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above.
 448 end-sanitize-sky
 449 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 450
 451         * configure: Regenerated to track ../common/aclocal.m4 changes.
 452
 453 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 454
 455         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 456
 457 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 458
 459         * configure: Regenerated to track ../common/aclocal.m4 changes.
 460         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 461
 462 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 463
 464         * configure: Regenerated to track ../common/aclocal.m4 changes.
 465
 466 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 467
 468         * interp.c (Max, Min): Comment out functions. Not yet used.
 469
 470 start-sanitize-vr4320
 471 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 472
 473         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
 474
 475 end-sanitize-vr4320
 476 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 477
 478         * configure: Regenerated to track ../common/aclocal.m4 changes.
 479
 480 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 481
 482         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 483         configurable settings for stand-alone simulator.
 484
 485 start-sanitize-sky
 486         * configure.in: Added --with-sim-gpu2 option to specify path of
 487         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
 488         links/compiles stand-alone simulator with this library.
 489
 490         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
 491 end-sanitize-sky
 492         * configure.in: Added X11 search, just in case.
 493
 494         * configure: Regenerated.
 495
 496 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 497
 498         * interp.c (sim_write, sim_read, load_memory, store_memory):
 499         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 500
 501 start-sanitize-vr4320
 502 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
 503
 504         * vr4320.igen (clz,dclz) : Added.
 505         (dmac): Replaced 99, with LO.
 506
 507 end-sanitize-vr4320
 508 start-sanitize-vr5400
 509 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 510
 511         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
 512
 513 end-sanitize-vr5400
 514 start-sanitize-vr4320
 515 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
 516
 517         * vr4320.igen: New file.
 518         * Makefile.in (vr4320.igen) : Added.
 519         * configure.in (mips64vr4320-*-*): Added.
 520         * configure : Rebuilt.
 521         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
 522         Add the vr4320 model entry and mark the vr4320 insn as necessary.
 523
 524 end-sanitize-vr4320
 525 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 526
 527         * sim-main.h (GETFCC): Return an unsigned value.
 528
 529 start-sanitize-r5900
 530         * r5900.igen: Use an unsigned array index variable `i'.
 531         (QFSRV): Ditto for variable bytes.
 532
 533 end-sanitize-r5900
 534 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 535
 536         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 537         (DADD): Result destination is RD not RT.
 538
 539 start-sanitize-r5900
 540         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
 541         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
 542         divide.
 543
 544 end-sanitize-r5900
 545 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 546
 547         * sim-main.h (HIACCESS, LOACCESS): Always define.
 548
 549         * mdmx.igen (Maxi, Mini): Rename Max, Min.
 550
 551         * interp.c (sim_info): Delete.
 552
 553 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
 554
 555         * interp.c (DECLARE_OPTION_HANDLER): Use it.
 556         (mips_option_handler): New argument `cpu'.
 557         (sim_open): Update call to sim_add_option_table.
 558
 559 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 560
 561         * mips.igen (CxC1): Add tracing.
 562
 563 start-sanitize-r5900
 564 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 565
 566         * r5900.igen (StoreFP): Delete.
 567         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 568         New functions.
 569         (rsqrt.s, sqrt.s): Implement.
 570         (r59cond): New function.
 571         (C.COND.S): Call r59cond in assembler line.
 572         (cvt.w.s, cvt.s.w): Implement.
 573
 574         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 575         instruction set.
 576
 577         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 578
 579 end-sanitize-r5900
 580 start-sanitize-r5900
 581 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 582
 583         * r5900.igen: Add tracing to all p* instructions.
 584
 585 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 586
 587         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 588         to get gdb talking to re-aranged sim_cpu register structure.
 589
 590 end-sanitize-r5900
 591 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 592
 593         * sim-main.h (Max, Min): Declare.
 594
 595         * interp.c (Max, Min): New functions.
 596
 597         * mips.igen (BC1): Add tracing.
 598
 599 start-sanitize-vr5400
 600 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 601
 602         * mdmx.igen: Tag all functions as requiring either with mdmx or
 603         vr5400 processor.
 604
 605 end-sanitize-vr5400
 606 start-sanitize-r5900
 607 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 608
 609         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 610         to 32.
 611         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 612
 613         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 614
 615         * r5900.igen: Rewrite.
 616
 617         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 618         struct.
 619         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 620         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 621
 622 end-sanitize-r5900
 623 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 624
 625         * interp.c Added memory map for stack in vr4100
 626
 627 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 628
 629         * interp.c (load_memory): Add missing "break"'s.
 630
 631 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 632
 633         * interp.c (sim_store_register, sim_fetch_register): Pass in
 634         length parameter.  Return -1.
 635
 636 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 637
 638         * interp.c: Added hardware init hook, fixed warnings.
 639
 640 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 641
 642         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 643
 644 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 645
 646         * interp.c (ifetch16): New function.
 647
 648         * sim-main.h (IMEM32): Rename IMEM.
 649         (IMEM16_IMMED): Define.
 650         (IMEM16): Define.
 651         (DELAY_SLOT): Update.
 652
 653         * m16run.c (sim_engine_run): New file.
 654
 655         * m16.igen: All instructions except LB.
 656         (LB): Call do_load_byte.
 657         * mips.igen (do_load_byte): New function.
 658         (LB): Call do_load_byte.
 659
 660         * mips.igen: Move spec for insn bit size and high bit from here.
 661         * Makefile.in (tmp-igen, tmp-m16): To here.
 662
 663         * m16.dc: New file, decode mips16 instructions.
 664
 665         * Makefile.in (SIM_NO_ALL): Define.
 666         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 667
 668 start-sanitize-tx19
 669         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 670         set.
 671
 672 end-sanitize-tx19
 673 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 674
 675         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 676         point unit to 32 bit registers.
 677         * configure: Re-generate.
 678
 679 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 680
 681         * configure.in (sim_use_gen): Make IGEN the default simulator
 682         generator for generic 32 and 64 bit mips targets.
 683         * configure: Re-generate.
 684
 685 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 686
 687         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 688         bitsize.
 689
 690         * interp.c (sim_fetch_register, sim_store_register): Read/write
 691         FGR from correct location.
 692         (sim_open): Set size of FGR's according to
 693         WITH_TARGET_FLOATING_POINT_BITSIZE.
 694
 695         * sim-main.h (FGR): Store floating point registers in a separate
 696         array.
 697
 698 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 699
 700         * configure: Regenerated to track ../common/aclocal.m4 changes.
 701
 702 start-sanitize-vr5400
 703         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 704
 705 end-sanitize-vr5400
 706 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 707
 708         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 709
 710         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 711
 712         * interp.c (pending_tick): New function.  Deliver pending writes.
 713
 714         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 715         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 716         it can handle mixed sized quantites and single bits.
 717
 718 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 719
 720         * interp.c (oengine.h): Do not include when building with IGEN.
 721         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 722         (sim_info): Ditto for PROCESSOR_64BIT.
 723         (sim_monitor): Replace ut_reg with unsigned_word.
 724         (*): Ditto for t_reg.
 725         (LOADDRMASK): Define.
 726         (sim_open): Remove defunct check that host FP is IEEE compliant,
 727         using software to emulate floating point.
 728         (value_fpr, ...): Always compile, was conditional on HASFPU.
 729
 730 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 731
 732         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 733         size.
 734
 735         * interp.c (SD, CPU): Define.
 736         (mips_option_handler): Set flags in each CPU.
 737         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 738         (sim_close): Do not clear STATE, deleted anyway.
 739         (sim_write, sim_read): Assume CPU zero's vm should be used for
 740         data transfers.
 741         (sim_create_inferior): Set the PC for all processors.
 742         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 743         argument.
 744         (mips16_entry): Pass correct nr of args to store_word, load_word.
 745         (ColdReset): Cold reset all cpu's.
 746         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 747         (sim_monitor, load_memory, store_memory, signal_exception): Use
 748         `CPU' instead of STATE_CPU.
 749
 750
 751         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 752         SD or CPU_.
 753
 754         * sim-main.h (signal_exception): Add sim_cpu arg.
 755         (SignalException*): Pass both SD and CPU to signal_exception.
 756         * interp.c (signal_exception): Update.
 757
 758         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 759         Ditto
 760         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 761         address_translation): Ditto
 762         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 763
 764 start-sanitize-vr5400
 765         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 766         `sd'.
 767         (ByteAlign): Use StoreFPR, pass args in correct order.
 768
 769 end-sanitize-vr5400
 770 start-sanitize-r5900
 771 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 772
 773         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 774
 775 end-sanitize-r5900
 776 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 777
 778         * configure: Regenerated to track ../common/aclocal.m4 changes.
 779
 780 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 781
 782 start-sanitize-r5900
 783         * configure.in (sim_igen_filter): For r5900, use igen.
 784         * configure: Re-generate.
 785
 786 end-sanitize-r5900
 787         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 788
 789         * mips.igen (model): Map processor names onto BFD name.
 790
 791         * sim-main.h (CPU_CIA): Delete.
 792         (SET_CIA, GET_CIA): Define
 793
 794 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 795
 796         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 797         regiser.
 798
 799         * configure.in (default_endian): Configure a big-endian simulator
 800         by default.
 801         * configure: Re-generate.
 802
 803 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 804
 805         * configure: Regenerated to track ../common/aclocal.m4 changes.
 806
 807 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 808
 809         * interp.c (sim_monitor): Handle Densan monitor outbyte
 810         and inbyte functions.
 811
 812 1997-12-29  Felix Lee  <flee@cygnus.com>
 813
 814         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 815
 816 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 817
 818         * Makefile.in (tmp-igen): Arrange for $zero to always be
 819         reset to zero after every instruction.
 820
 821 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 822
 823         * configure: Regenerated to track ../common/aclocal.m4 changes.
 824         * config.in: Ditto.
 825
 826 start-sanitize-vr5400
 827 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 828
 829         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 830         bit values.
 831
 832 end-sanitize-vr5400
 833 start-sanitize-vr5400
 834 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 835
 836         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 837         vr5400 with the vr5000 as the default.
 838
 839 end-sanitize-vr5400
 840 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 841
 842         * mips.igen (MSUB): Fix to work like MADD.
 843         * gencode.c (MSUB): Similarly.
 844
 845 start-sanitize-vr5400
 846 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 847
 848         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 849         vr5400.
 850
 851 end-sanitize-vr5400
 852 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 853
 854         * configure: Regenerated to track ../common/aclocal.m4 changes.
 855
 856 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 857
 858         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 859
 860 start-sanitize-vr5400
 861         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 862         (value_cc, store_cc): Implement.
 863
 864         * sim-main.h: Add 8*3*8 bit accumulator.
 865
 866         * vr5400.igen: Move mdmx instructins from here
 867         * mdmx.igen: To here - new file. Add/fix missing instructions.
 868         * mips.igen: Include mdmx.igen.
 869         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 870
 871 end-sanitize-vr5400
 872 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 873
 874         * sim-main.h (sim-fpu.h): Include.
 875
 876         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 877         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 878         using host independant sim_fpu module.
 879
 880 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 881
 882         * interp.c (signal_exception): Report internal errors with SIGABRT
 883         not SIGQUIT.
 884
 885         * sim-main.h (C0_CONFIG): New register.
 886         (signal.h): No longer include.
 887
 888         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 889
 890 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 891
 892         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 893
 894 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 895
 896         * mips.igen: Tag vr5000 instructions.
 897         (ANDI): Was missing mipsIV model, fix assembler syntax.
 898         (do_c_cond_fmt): New function.
 899         (C.cond.fmt): Handle mips I-III which do not support CC field
 900         separatly.
 901         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 902         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 903         in IV3.2 spec.
 904         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 905         vr5000 which saves LO in a GPR separatly.
 906
 907         * configure.in (enable-sim-igen): For vr5000, select vr5000
 908         specific instructions.
 909         * configure: Re-generate.
 910
 911 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 912
 913         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 914
 915         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 916         fmt_uninterpreted_64 bit cases to switch.  Convert to
 917         fmt_formatted,
 918
 919         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 920
 921         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 922         as specified in IV3.2 spec.
 923         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 924
 925 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 926
 927         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 928         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 929         (start-sanitize-r5900):
 930         (LWXC1, SWXC1): Delete from r5900 instruction set.
 931         (end-sanitize-r5900):
 932         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 933         PENDING_FILL versions of instructions.  Simplify.
 934         (X): New function.
 935         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 936         instructions.
 937         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 938         a signed value.
 939         (MTHI, MFHI): Disable code checking HI-LO.
 940
 941         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 942         global.
 943         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 944
 945 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 946
 947         * gencode.c (build_mips16_operands): Replace IPC with cia.
 948
 949         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 950         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 951         IPC to `cia'.
 952         (UndefinedResult): Replace function with macro/function
 953         combination.
 954         (sim_engine_run): Don't save PC in IPC.
 955
 956         * sim-main.h (IPC): Delete.
 957
 958         start-sanitize-vr5400
 959         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 960         (do_select): Rename function select.
 961         end-sanitize-vr5400
 962
 963         * interp.c (signal_exception, store_word, load_word,
 964         address_translation, load_memory, store_memory, cache_op,
 965         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 966         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 967         current instruction address - cia - argument.
 968         (sim_read, sim_write): Call address_translation directly.
 969         (sim_engine_run): Rename variable vaddr to cia.
 970         (signal_exception): Pass cia to sim_monitor
 971
 972         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 973         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 974         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 975
 976         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 977         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 978         SIM_ASSERT.
 979
 980         * interp.c (signal_exception): Pass restart address to
 981         sim_engine_restart.
 982
 983         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 984         idecode.o): Add dependency.
 985
 986         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 987         Delete definitions
 988         (DELAY_SLOT): Update NIA not PC with branch address.
 989         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 990
 991         * mips.igen: Use CIA not PC in branch calculations.
 992         (illegal): Call SignalException.
 993         (BEQ, ADDIU): Fix assembler.
 994
 995 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 996
 997         * m16.igen (JALX): Was missing.
 998
 999         * configure.in (enable-sim-igen): New configuration option.
1000         * configure: Re-generate.
1001
1002         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1003
1004         * interp.c (load_memory, store_memory): Delete parameter RAW.
1005         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1006         bypassing {load,store}_memory.
1007
1008         * sim-main.h (ByteSwapMem): Delete definition.
1009
1010         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1011
1012         * interp.c (sim_do_command, sim_commands): Delete mips specific
1013         commands.  Handled by module sim-options.
1014
1015         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1016         (WITH_MODULO_MEMORY): Define.
1017
1018         * interp.c (sim_info): Delete code printing memory size.
1019
1020         * interp.c (mips_size): Nee sim_size, delete function.
1021         (power2): Delete.
1022         (monitor, monitor_base, monitor_size): Delete global variables.
1023         (sim_open, sim_close): Delete code creating monitor and other
1024         memory regions.  Use sim-memopts module, via sim_do_commandf, to
1025         manage memory regions.
1026         (load_memory, store_memory): Use sim-core for memory model.
1027
1028         * interp.c (address_translation): Delete all memory map code
1029         except line forcing 32 bit addresses.
1030
1031 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1032
1033         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
1034         trace options.
1035
1036         * interp.c (logfh, logfile): Delete globals.
1037         (sim_open, sim_close): Delete code opening & closing log file.
1038         (mips_option_handler): Delete -l and -n options.
1039         (OPTION mips_options): Ditto.
1040
1041         * interp.c (OPTION mips_options): Rename option trace to dinero.
1042         (mips_option_handler): Update.
1043
1044 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1045
1046         * interp.c (fetch_str): New function.
1047         (sim_monitor): Rewrite using sim_read & sim_write.
1048         (sim_open): Check magic number.
1049         (sim_open): Write monitor vectors into memory using sim_write.
1050         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1051         (sim_read, sim_write): Simplify - transfer data one byte at a
1052         time.
1053         (load_memory, store_memory): Clarify meaning of parameter RAW.
1054
1055         * sim-main.h (isHOST): Defete definition.
1056         (isTARGET): Mark as depreciated.
1057         (address_translation): Delete parameter HOST.
1058
1059         * interp.c (address_translation): Delete parameter HOST.
1060
1061 start-sanitize-tx49
1062 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
1063
1064         * gencode.c: Add tx49 configury and insns.
1065         * configure.in: Add tx49 configury.
1066         * configure: Update.
1067
1068 end-sanitize-tx49
1069 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1070
1071         * mips.igen:
1072
1073         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1074         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1075
1076 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1077
1078         * mips.igen: Add model filter field to records.
1079
1080 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1081
1082         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1083
1084         interp.c (sim_engine_run): Do not compile function sim_engine_run
1085         when WITH_IGEN == 1.
1086
1087         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1088         target architecture.
1089
1090         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1091         igen. Replace with configuration variables sim_igen_flags /
1092         sim_m16_flags.
1093
1094         start-sanitize-r5900
1095         * r5900.igen: New file. Copy r5900 insns here.
1096         end-sanitize-r5900
1097         start-sanitize-vr5400
1098         * vr5400.igen: New file.
1099         end-sanitize-vr5400
1100         * m16.igen: New file.  Copy mips16 insns here.
1101         * mips.igen: From here.
1102
1103 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1104
1105         start-sanitize-vr5400
1106         * mips.igen: Tag all mipsIV instructions with vr5400 model.
1107
1108         * configure.in: Add mips64vr5400 target.
1109         * configure: Re-generate.
1110
1111         end-sanitize-vr5400
1112         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1113         to top.
1114         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1115
1116 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1117
1118         * gencode.c (build_instruction): Follow sim_write's lead in using
1119         BigEndianMem instead of !ByteSwapMem.
1120
1121 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1122
1123         * configure.in (sim_gen): Dependent on target, select type of
1124         generator.  Always select old style generator.
1125
1126         configure: Re-generate.
1127
1128         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1129         targets.
1130         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1131         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1132         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1133         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1134         SIM_@sim_gen@_*, set by autoconf.
1135
1136 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1137
1138         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1139
1140         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1141         CURRENT_FLOATING_POINT instead.
1142
1143         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1144         (address_translation): Raise exception InstructionFetch when
1145         translation fails and isINSTRUCTION.
1146
1147         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1148         sim_engine_run): Change type of of vaddr and paddr to
1149         address_word.
1150         (address_translation, prefetch, load_memory, store_memory,
1151         cache_op): Change type of vAddr and pAddr to address_word.
1152
1153         * gencode.c (build_instruction): Change type of vaddr and paddr to
1154         address_word.
1155
1156 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1157
1158         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1159         macro to obtain result of ALU op.
1160
1161 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1162
1163         * interp.c (sim_info): Call profile_print.
1164
1165 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1166
1167         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1168
1169         * sim-main.h (WITH_PROFILE): Do not define, defined in
1170         common/sim-config.h.  Use sim-profile module.
1171         (simPROFILE): Delete defintion.
1172
1173         * interp.c (PROFILE): Delete definition.
1174         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1175         (sim_close): Delete code writing profile histogram.
1176         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1177         Delete.
1178         (sim_engine_run): Delete code profiling the PC.
1179
1180 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1181
1182         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1183
1184         * interp.c (sim_monitor): Make register pointers of type
1185         unsigned_word*.
1186
1187         * sim-main.h: Make registers of type unsigned_word not
1188         signed_word.
1189
1190 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1191
1192 start-sanitize-r5900
1193         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
1194         ...): Move to sim-main.h
1195
1196 end-sanitize-r5900
1197         * interp.c (sync_operation): Rename from SyncOperation, make
1198         global, add SD argument.
1199         (prefetch): Rename from Prefetch, make global, add SD argument.
1200         (decode_coproc): Make global.
1201
1202         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1203
1204         * gencode.c (build_instruction): Generate DecodeCoproc not
1205         decode_coproc calls.
1206
1207         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1208         (SizeFGR): Move to sim-main.h
1209         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1210         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1211         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1212         sim-main.h.
1213         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1214         FP_RM_TOMINF, GETRM): Move to sim-main.h.
1215         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1216         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1217         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1218         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1219
1220         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1221         exception.
1222         (sim-alu.h): Include.
1223         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1224         (sim_cia): Typedef to instruction_address.
1225
1226 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1227
1228         * Makefile.in (interp.o): Rename generated file engine.c to
1229         oengine.c.
1230
1231         * interp.c: Update.
1232
1233 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1234
1235         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1236
1237 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1238
1239         * gencode.c (build_instruction): For "FPSQRT", output correct
1240         number of arguments to Recip.
1241
1242 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1243
1244         * Makefile.in (interp.o): Depends on sim-main.h
1245
1246         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1247
1248         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1249         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1250         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1251         STATE, DSSTATE): Define
1252         (GPR, FGRIDX, ..): Define.
1253
1254         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1255         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1256         (GPR, FGRIDX, ...): Delete macros.
1257
1258         * interp.c: Update names to match defines from sim-main.h
1259
1260 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1261
1262         * interp.c (sim_monitor): Add SD argument.
1263         (sim_warning): Delete.  Replace calls with calls to
1264         sim_io_eprintf.
1265         (sim_error): Delete. Replace calls with sim_io_error.
1266         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1267         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1268         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1269         argument.
1270         (mips_size): Rename from sim_size. Add SD argument.
1271
1272         * interp.c (simulator): Delete global variable.
1273         (callback): Delete global variable.
1274         (mips_option_handler, sim_open, sim_write, sim_read,
1275         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1276         sim_size,sim_monitor): Use sim_io_* not callback->*.
1277         (sim_open): ZALLOC simulator struct.
1278         (PROFILE): Do not define.
1279
1280 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1281
1282         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1283         support.h with corresponding code.
1284
1285         * sim-main.h (word64, uword64), support.h: Move definition to
1286         sim-main.h.
1287         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1288
1289         * support.h: Delete
1290         * Makefile.in: Update dependencies
1291         * interp.c: Do not include.
1292
1293 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1294
1295         * interp.c (address_translation, load_memory, store_memory,
1296         cache_op): Rename to from AddressTranslation et.al., make global,
1297         add SD argument
1298
1299         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1300         CacheOp): Define.
1301
1302         * interp.c (SignalException): Rename to signal_exception, make
1303         global.
1304
1305         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1306
1307         * sim-main.h (SignalException, SignalExceptionInterrupt,
1308         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1309         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1310         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1311         Define.
1312
1313         * interp.c, support.h: Use.
1314
1315 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1316
1317         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1318         to value_fpr / store_fpr. Add SD argument.
1319         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1320         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1321
1322         * sim-main.h (ValueFPR, StoreFPR): Define.
1323
1324 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1325
1326         * interp.c (sim_engine_run): Check consistency between configure
1327         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1328         and HASFPU.
1329
1330         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1331         (mips_fpu): Configure WITH_FLOATING_POINT.
1332         (mips_endian): Configure WITH_TARGET_ENDIAN.
1333         * configure: Update.
1334
1335 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1336
1337         * configure: Regenerated to track ../common/aclocal.m4 changes.
1338
1339 start-sanitize-r5900
1340 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1341
1342         * interp.c (MAX_REG): Allow up-to 128 registers.
1343         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
1344         (REGISTER_SA): Ditto.
1345         (sim_open): Initialize register_widths for r5900 specific
1346         registers.
1347         (sim_fetch_register, sim_store_register): Check for request of
1348         r5900 specific SA register.  Check for request for hi 64 bits of
1349         r5900 specific registers.
1350
1351 end-sanitize-r5900
1352 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1353
1354         * configure: Regenerated.
1355
1356 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1357
1358         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1359
1360 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1361
1362         * gencode.c (print_igen_insn_models): Assume certain architectures
1363         include all mips* instructions.
1364         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1365         instruction.
1366
1367         * Makefile.in (tmp.igen): Add target. Generate igen input from
1368         gencode file.
1369
1370         * gencode.c (FEATURE_IGEN): Define.
1371         (main): Add --igen option.  Generate output in igen format.
1372         (process_instructions): Format output according to igen option.
1373         (print_igen_insn_format): New function.
1374         (print_igen_insn_models): New function.
1375         (process_instructions): Only issue warnings and ignore
1376         instructions when no FEATURE_IGEN.
1377
1378 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1379
1380         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1381         MIPS targets.
1382
1383 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1384
1385         * configure: Regenerated to track ../common/aclocal.m4 changes.
1386
1387 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1388
1389         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1390         SIM_RESERVED_BITS): Delete, moved to common.
1391         (SIM_EXTRA_CFLAGS): Update.
1392
1393 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1394
1395         * configure.in: Configure non-strict memory alignment.
1396         * configure: Regenerated to track ../common/aclocal.m4 changes.
1397
1398 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1399
1400         * configure: Regenerated to track ../common/aclocal.m4 changes.
1401
1402 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1403
1404         * gencode.c (SDBBP,DERET): Added (3900) insns.
1405         (RFE): Turn on for 3900.
1406         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1407         (dsstate): Made global.
1408         (SUBTARGET_R3900): Added.
1409         (CANCELDELAYSLOT): New.
1410         (SignalException): Ignore SystemCall rather than ignore and
1411         terminate.  Add DebugBreakPoint handling.
1412         (decode_coproc): New insns RFE, DERET; and new registers Debug
1413         and DEPC protected by SUBTARGET_R3900.
1414         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1415         bits explicitly.
1416         * Makefile.in,configure.in: Add mips subtarget option.
1417         * configure: Update.
1418
1419 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1420
1421         * gencode.c: Add r3900 (tx39).
1422
1423 start-sanitize-tx19
1424         * gencode.c: Fix some configuration problems by improving
1425         the relationship between tx19 and tx39.
1426 end-sanitize-tx19
1427
1428 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1429
1430         * gencode.c (build_instruction): Don't need to subtract 4 for
1431         JALR, just 2.
1432
1433 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1434
1435         * interp.c: Correct some HASFPU problems.
1436
1437 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1438
1439         * configure: Regenerated to track ../common/aclocal.m4 changes.
1440
1441 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1442
1443         * interp.c (mips_options): Fix samples option short form, should
1444         be `x'.
1445
1446 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1447
1448         * interp.c (sim_info): Enable info code.  Was just returning.
1449
1450 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1451
1452         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1453         MFC0.
1454
1455 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1456
1457         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1458         constants.
1459         (build_instruction): Ditto for LL.
1460
1461 start-sanitize-tx19
1462 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
1463
1464         * mips/configure.in, mips/gencode: Add tx19/r1900.
1465
1466 end-sanitize-tx19
1467 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1468
1469         * configure: Regenerated to track ../common/aclocal.m4 changes.
1470
1471 start-sanitize-r5900
1472 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1473
1474         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1475         for overflow due to ABS of MININT, set result to MAXINT.
1476         (build_instruction): For "psrlvw", signextend bit 31.
1477
1478 end-sanitize-r5900
1479 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1480
1481         * configure: Regenerated to track ../common/aclocal.m4 changes.
1482         * config.in: Ditto.
1483
1484 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1485
1486         * interp.c (sim_open): Add call to sim_analyze_program, update
1487         call to sim_config.
1488
1489 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1490
1491         * interp.c (sim_kill): Delete.
1492         (sim_create_inferior): Add ABFD argument. Set PC from same.
1493         (sim_load): Move code initializing trap handlers from here.
1494         (sim_open): To here.
1495         (sim_load): Delete, use sim-hload.c.
1496
1497         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1498
1499 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1500
1501         * configure: Regenerated to track ../common/aclocal.m4 changes.
1502         * config.in: Ditto.
1503
1504 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1505
1506         * interp.c (sim_open): Add ABFD argument.
1507         (sim_load): Move call to sim_config from here.
1508         (sim_open): To here.  Check return status.
1509
1510 start-sanitize-r5900
1511         * gencode.c (build_instruction): Do not define x8000000000000000,
1512         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1513
1514 end-sanitize-r5900
1515 start-sanitize-r5900
1516 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1517
1518         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1519         "pdivuw" check for overflow due to signed divide by -1.
1520
1521 end-sanitize-r5900
1522 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1523
1524         * gencode.c (build_instruction): Two arg MADD should
1525         not assign result to $0.
1526
1527 start-sanitize-r5900
1528 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1529
1530         * gencode.c (build_instruction): For "ppac5" use unsigned
1531         arrithmetic so that the sign bit doesn't smear when right shifted.
1532         (build_instruction): For "pdiv" perform sign extension when
1533         storing results in HI and LO.
1534         (build_instructions): For "pdiv" and "pdivbw" check for
1535         divide-by-zero.
1536         (build_instruction): For "pmfhl.slw" update hi part of dest
1537         register as well as low part.
1538         (build_instruction): For "pmfhl" portably handle long long values.
1539         (build_instruction): For "pmfhl.sh" correctly negative values.
1540         Store half words 2 and three in the correct place.
1541         (build_instruction): For "psllvw", sign extend value after shift.
1542
1543 end-sanitize-r5900
1544 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1545
1546         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1547         * sim/mips/configure.in: Regenerate.
1548
1549 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1550
1551         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1552         signed8, unsigned8 et.al. types.
1553
1554 start-sanitize-r5900
1555         * gencode.c (build_instruction): For PMULTU* do not sign extend
1556         registers.  Make generated code easier to debug.
1557
1558 end-sanitize-r5900
1559         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1560         hosts when selecting subreg.
1561
1562 start-sanitize-r5900
1563 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1564
1565         * gencode.c (type_for_data_len): For 32bit operations concerned
1566         with overflow, perform op using 64bits.
1567         (build_instruction): For PADD, always compute operation using type
1568         returned by type_for_data_len.
1569         (build_instruction): For PSUBU, when overflow, saturate to zero as
1570         actually underflow.
1571
1572 end-sanitize-r5900
1573 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1574
1575 start-sanitize-r5900
1576         * gencode.c (build_instruction): Handle "pext5" according to
1577         version 1.95 of the r5900 ISA.
1578
1579         * gencode.c (build_instruction): Handle "ppac5" according to
1580         version 1.95 of the r5900 ISA.
1581
1582 end-sanitize-r5900
1583         * interp.c (sim_engine_run): Reset the ZERO register to zero
1584         regardless of FEATURE_WARN_ZERO.
1585         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1586
1587 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1588
1589         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1590         (SignalException): For BreakPoints ignore any mode bits and just
1591         save the PC.
1592         (SignalException): Always set the CAUSE register.
1593
1594 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1595
1596         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1597         exception has been taken.
1598
1599         * interp.c: Implement the ERET and mt/f sr instructions.
1600
1601 start-sanitize-r5900
1602 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1603
1604         * gencode.c (build_instruction): For paddu, extract unsigned
1605         sub-fields.
1606
1607         * gencode.c (build_instruction): Saturate padds instead of padd
1608         instructions.
1609
1610 end-sanitize-r5900
1611 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1612
1613         * interp.c (SignalException): Don't bother restarting an
1614         interrupt.
1615
1616 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1617
1618         * interp.c (SignalException): Really take an interrupt.
1619         (interrupt_event): Only deliver interrupts when enabled.
1620
1621 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1622
1623         * interp.c (sim_info): Only print info when verbose.
1624         (sim_info) Use sim_io_printf for output.
1625
1626 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1627
1628         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1629         mips architectures.
1630
1631 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1632
1633         * interp.c (sim_do_command): Check for common commands if a
1634         simulator specific command fails.
1635
1636 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1637
1638         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1639         and simBE when DEBUG is defined.
1640
1641 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1642
1643         * interp.c (interrupt_event): New function.  Pass exception event
1644         onto exception handler.
1645
1646         * configure.in: Check for stdlib.h.
1647         * configure: Regenerate.
1648
1649         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1650         variable declaration.
1651         (build_instruction): Initialize memval1.
1652         (build_instruction): Add UNUSED attribute to byte, bigend,
1653         reverse.
1654         (build_operands): Ditto.
1655
1656         * interp.c: Fix GCC warnings.
1657         (sim_get_quit_code): Delete.
1658
1659         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1660         * Makefile.in: Ditto.
1661         * configure: Re-generate.
1662
1663         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1664
1665 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1666
1667         * interp.c (mips_option_handler): New function parse argumes using
1668         sim-options.
1669         (myname): Replace with STATE_MY_NAME.
1670         (sim_open): Delete check for host endianness - performed by
1671         sim_config.
1672         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1673         (sim_open): Move much of the initialization from here.
1674         (sim_load): To here.  After the image has been loaded and
1675         endianness set.
1676         (sim_open): Move ColdReset from here.
1677         (sim_create_inferior): To here.
1678         (sim_open): Make FP check less dependant on host endianness.
1679
1680         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1681         run.
1682         * interp.c (sim_set_callbacks): Delete.
1683
1684         * interp.c (membank, membank_base, membank_size): Replace with
1685         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1686         (sim_open): Remove call to callback->init. gdb/run do this.
1687
1688         * interp.c: Update
1689
1690         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1691
1692         * interp.c (big_endian_p): Delete, replaced by
1693         current_target_byte_order.
1694
1695 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1696
1697         * interp.c (host_read_long, host_read_word, host_swap_word,
1698         host_swap_long): Delete. Using common sim-endian.
1699         (sim_fetch_register, sim_store_register): Use H2T.
1700         (pipeline_ticks): Delete.  Handled by sim-events.
1701         (sim_info): Update.
1702         (sim_engine_run): Update.
1703
1704 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1705
1706         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1707         reason from here.
1708         (SignalException): To here. Signal using sim_engine_halt.
1709         (sim_stop_reason): Delete, moved to common.
1710
1711 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1712
1713         * interp.c (sim_open): Add callback argument.
1714         (sim_set_callbacks): Delete SIM_DESC argument.
1715         (sim_size): Ditto.
1716
1717 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1718
1719         * Makefile.in (SIM_OBJS): Add common modules.
1720
1721         * interp.c (sim_set_callbacks): Also set SD callback.
1722         (set_endianness, xfer_*, swap_*): Delete.
1723         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1724         Change to functions using sim-endian macros.
1725         (control_c, sim_stop): Delete, use common version.
1726         (simulate): Convert into.
1727         (sim_engine_run): This function.
1728         (sim_resume): Delete.
1729
1730         * interp.c (simulation): New variable - the simulator object.
1731         (sim_kind): Delete global - merged into simulation.
1732         (sim_load): Cleanup.  Move PC assignment from here.
1733         (sim_create_inferior): To here.
1734
1735         * sim-main.h: New file.
1736         * interp.c (sim-main.h): Include.
1737
1738 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1739
1740         * configure: Regenerated to track ../common/aclocal.m4 changes.
1741
1742 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1743
1744         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1745
1746 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1747
1748         * gencode.c (build_instruction): DIV instructions: check
1749         for division by zero and integer overflow before using
1750         host's division operation.
1751
1752 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1753
1754         * Makefile.in (SIM_OBJS): Add sim-load.o.
1755         * interp.c: #include bfd.h.
1756         (target_byte_order): Delete.
1757         (sim_kind, myname, big_endian_p): New static locals.
1758         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1759         after argument parsing.  Recognize -E arg, set endianness accordingly.
1760         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1761         load file into simulator.  Set PC from bfd.
1762         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1763         (set_endianness): Use big_endian_p instead of target_byte_order.
1764
1765 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1766
1767         * interp.c (sim_size): Delete prototype - conflicts with
1768         definition in remote-sim.h.  Correct definition.
1769
1770 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1771
1772         * configure: Regenerated to track ../common/aclocal.m4 changes.
1773         * config.in: Ditto.
1774
1775 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1776
1777         * interp.c (sim_open): New arg `kind'.
1778
1779         * configure: Regenerated to track ../common/aclocal.m4 changes.
1780
1781 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1782
1783         * configure: Regenerated to track ../common/aclocal.m4 changes.
1784
1785 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1786
1787         * interp.c (sim_open): Set optind to 0 before calling getopt.
1788
1789 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1790
1791         * configure: Regenerated to track ../common/aclocal.m4 changes.
1792
1793 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1794
1795         * interp.c : Replace uses of pr_addr with pr_uword64
1796         where the bit length is always 64 independent of SIM_ADDR.
1797         (pr_uword64) : added.
1798
1799 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1800
1801         * configure: Re-generate.
1802
1803 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1804
1805         * configure: Regenerate to track ../common/aclocal.m4 changes.
1806
1807 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1808
1809         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1810         in argv form.
1811         (other sim_*): New SIM_DESC argument.
1812
1813 start-sanitize-r5900
1814 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1815
1816         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1817         Change values to avoid overloading DOUBLEWORD which is tested
1818         for all insns.
1819         * gencode.c: reinstate "offending code".
1820
1821 end-sanitize-r5900
1822 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1823
1824         * interp.c: Fix printing of addresses for non-64-bit targets.
1825         (pr_addr): Add function to print address based on size.
1826 start-sanitize-r5900
1827         * gencode.c: #ifdef out offending code until a permanent fix
1828         can be added.  Code is causing build errors for non-5900 mips targets.
1829 end-sanitize-r5900
1830
1831 start-sanitize-r5900
1832 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1833
1834         * gencode.c (process_instructions): Correct test for ISA dependent
1835         architecture bits in isa field of MIPS_DECODE.
1836
1837 end-sanitize-r5900
1838 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1839
1840         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1841
1842 start-sanitize-r5900
1843 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1844
1845         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1846         PMADDUW.
1847
1848 end-sanitize-r5900
1849 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1850
1851         * gencode.c (build_mips16_operands): Correct computation of base
1852         address for extended PC relative instruction.
1853
1854 start-sanitize-r5900
1855 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1856
1857         * Makefile.in, configure, configure.in, gencode.c,
1858         interp.c, support.h: add r5900.
1859
1860 end-sanitize-r5900
1861 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1862
1863         * interp.c (mips16_entry): Add support for floating point cases.
1864         (SignalException): Pass floating point cases to mips16_entry.
1865         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1866         registers.
1867         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1868         or fmt_word.
1869         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1870         and then set the state to fmt_uninterpreted.
1871         (COP_SW): Temporarily set the state to fmt_word while calling
1872         ValueFPR.
1873
1874 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1875
1876         * gencode.c (build_instruction): The high order may be set in the
1877         comparison flags at any ISA level, not just ISA 4.
1878
1879 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1880
1881         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1882         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1883         * configure.in: sinclude ../common/aclocal.m4.
1884         * configure: Regenerated.
1885
1886 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1887
1888         * configure: Rebuild after change to aclocal.m4.
1889
1890 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1891
1892         * configure configure.in Makefile.in:  Update to new configure
1893         scheme which is more compatible with WinGDB builds.
1894         * configure.in:  Improve comment on how to run autoconf.
1895         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1896         * Makefile.in:  Use autoconf substitution to install common
1897         makefile fragment.
1898
1899 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1900
1901         * gencode.c (build_instruction): Use BigEndianCPU instead of
1902         ByteSwapMem.
1903
1904 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1905
1906         * interp.c (sim_monitor): Make output to stdout visible in
1907         wingdb's I/O log window.
1908
1909 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1910
1911         * support.h: Undo previous change to SIGTRAP
1912         and SIGQUIT values.
1913
1914 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1915
1916         * interp.c (store_word, load_word): New static functions.
1917         (mips16_entry): New static function.
1918         (SignalException): Look for mips16 entry and exit instructions.
1919         (simulate): Use the correct index when setting fpr_state after
1920         doing a pending move.
1921
1922 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1923
1924         * interp.c: Fix byte-swapping code throughout to work on
1925         both little- and big-endian hosts.
1926
1927 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1928
1929         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1930         with gdb/config/i386/xm-windows.h.
1931
1932 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1933
1934         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1935         that messes up arithmetic shifts.
1936
1937 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1938
1939         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1940         SIGTRAP and SIGQUIT for _WIN32.
1941
1942 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1943
1944         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1945         force a 64 bit multiplication.
1946         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1947         destination register is 0, since that is the default mips16 nop
1948         instruction.
1949
1950 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1951
1952         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1953         (build_endian_shift): Don't check proc64.
1954         (build_instruction): Always set memval to uword64.  Cast op2 to
1955         uword64 when shifting it left in memory instructions.  Always use
1956         the same code for stores--don't special case proc64.
1957
1958         * gencode.c (build_mips16_operands): Fix base PC value for PC
1959         relative operands.
1960         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1961         jal instruction.
1962         * interp.c (simJALDELAYSLOT): Define.
1963         (JALDELAYSLOT): Define.
1964         (INDELAYSLOT, INJALDELAYSLOT): Define.
1965         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1966
1967 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1968
1969         * interp.c (sim_open): add flush_cache as a PMON routine
1970         (sim_monitor): handle flush_cache by ignoring it
1971
1972 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1973
1974         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1975         BigEndianMem.
1976         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1977         (BigEndianMem): Rename to ByteSwapMem and change sense.
1978         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1979         BigEndianMem references to !ByteSwapMem.
1980         (set_endianness): New function, with prototype.
1981         (sim_open): Call set_endianness.
1982         (sim_info): Use simBE instead of BigEndianMem.
1983         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1984         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1985         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1986         ifdefs, keeping the prototype declaration.
1987         (swap_word): Rewrite correctly.
1988         (ColdReset): Delete references to CONFIG.  Delete endianness related
1989         code; moved to set_endianness.
1990
1991 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1992
1993         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1994         * interp.c (CHECKHILO): Define away.
1995         (simSIGINT): New macro.
1996         (membank_size): Increase from 1MB to 2MB.
1997         (control_c): New function.
1998         (sim_resume): Rename parameter signal to signal_number.  Add local
1999         variable prev.  Call signal before and after simulate.
2000         (sim_stop_reason): Add simSIGINT support.
2001         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2002         functions always.
2003         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2004         if logfh is NULL.
2005         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2006         a call to sim_warning.
2007
2008 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2009
2010         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2011         16 bit instructions.
2012
2013 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2014
2015         Add support for mips16 (16 bit MIPS implementation):
2016         * gencode.c (inst_type): Add mips16 instruction encoding types.
2017         (GETDATASIZEINSN): Define.
2018         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2019         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2020         mtlo.
2021         (MIPS16_DECODE): New table, for mips16 instructions.
2022         (bitmap_val): New static function.
2023         (struct mips16_op): Define.
2024         (mips16_op_table): New table, for mips16 operands.
2025         (build_mips16_operands): New static function.
2026         (process_instructions): If PC is odd, decode a mips16
2027         instruction.  Break out instruction handling into new
2028         build_instruction function.
2029         (build_instruction): New static function, broken out of
2030         process_instructions.  Check modifiers rather than flags for SHIFT
2031         bit count and m[ft]{hi,lo} direction.
2032         (usage): Pass program name to fprintf.
2033         (main): Remove unused variable this_option_optind.  Change
2034         ``*loptarg++'' to ``loptarg++''.
2035         (my_strtoul): Parenthesize && within ||.
2036         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2037         (simulate): If PC is odd, fetch a 16 bit instruction, and
2038         increment PC by 2 rather than 4.
2039         * configure.in: Add case for mips16*-*-*.
2040         * configure: Rebuild.
2041
2042 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2043
2044         * interp.c: Allow -t to enable tracing in standalone simulator.
2045         Fix garbage output in trace file and error messages.
2046
2047 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2048
2049         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2050         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2051         * configure.in: Simplify using macros in ../common/aclocal.m4.
2052         * configure: Regenerated.
2053         * tconfig.in: New file.
2054
2055 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2056
2057         * interp.c: Fix bugs in 64-bit port.
2058         Use ansi function declarations for msvc compiler.
2059         Initialize and test file pointer in trace code.
2060         Prevent duplicate definition of LAST_EMED_REGNUM.
2061
2062 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2063
2064         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2065
2066 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2067
2068         * interp.c (SignalException): Check for explicit terminating
2069         breakpoint value.
2070         * gencode.c: Pass instruction value through SignalException()
2071         calls for Trap, Breakpoint and Syscall.
2072
2073 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2074
2075         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2076         only used on those hosts that provide it.
2077         * configure.in: Add sqrt() to list of functions to be checked for.
2078         * config.in: Re-generated.
2079         * configure: Re-generated.
2080
2081 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2082
2083         * gencode.c (process_instructions): Call build_endian_shift when
2084         expanding STORE RIGHT, to fix swr.
2085         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2086         clear the high bits.
2087         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2088         Fix float to int conversions to produce signed values.
2089
2090 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2091
2092         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2093         (process_instructions): Correct handling of nor instruction.
2094         Correct shift count for 32 bit shift instructions. Correct sign
2095         extension for arithmetic shifts to not shift the number of bits in
2096         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2097         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2098         Fix madd.
2099         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2100         It's OK to have a mult follow a mult.  What's not OK is to have a
2101         mult follow an mfhi.
2102         (Convert): Comment out incorrect rounding code.
2103
2104 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2105
2106         * interp.c (sim_monitor): Improved monitor printf
2107         simulation. Tidied up simulator warnings, and added "--log" option
2108         for directing warning message output.
2109         * gencode.c: Use sim_warning() rather than WARNING macro.
2110
2111 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2112
2113         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2114         getopt1.o, rather than on gencode.c.  Link objects together.
2115         Don't link against -liberty.
2116         (gencode.o, getopt.o, getopt1.o): New targets.
2117         * gencode.c: Include <ctype.h> and "ansidecl.h".
2118         (AND): Undefine after including "ansidecl.h".
2119         (ULONG_MAX): Define if not defined.
2120         (OP_*): Don't define macros; now defined in opcode/mips.h.
2121         (main): Call my_strtoul rather than strtoul.
2122         (my_strtoul): New static function.
2123
2124 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2125
2126         * gencode.c (process_instructions):  Generate word64 and uword64
2127         instead of `long long' and `unsigned long long' data types.
2128         * interp.c:  #include sysdep.h to get signals, and define default
2129         for SIGBUS.
2130         * (Convert):  Work around for Visual-C++ compiler bug with type
2131         conversion.
2132         * support.h:  Make things compile under Visual-C++ by using
2133         __int64 instead of `long long'.  Change many refs to long long
2134         into word64/uword64 typedefs.
2135
2136 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2137
2138         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2139         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2140         (docdir): Removed.
2141         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2142         (AC_PROG_INSTALL): Added.
2143         (AC_PROG_CC): Moved to before configure.host call.
2144         * configure: Rebuilt.
2145
2146 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2147
2148         * configure.in: Define @SIMCONF@ depending on mips target.
2149         * configure: Rebuild.
2150         * Makefile.in (run): Add @SIMCONF@ to control simulator
2151         construction.
2152         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2153         * interp.c: Remove some debugging, provide more detailed error
2154         messages, update memory accesses to use LOADDRMASK.
2155
2156 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2157
2158         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2159         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2160         stamp-h.
2161         * configure: Rebuild.
2162         * config.in: New file, generated by autoheader.
2163         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2164         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2165         HAVE_ANINT and HAVE_AINT, as appropriate.
2166         * Makefile.in (run): Use @LIBS@ rather than -lm.
2167         (interp.o): Depend upon config.h.
2168         (Makefile): Just rebuild Makefile.
2169         (clean): Remove stamp-h.
2170         (mostlyclean): Make the same as clean, not as distclean.
2171         (config.h, stamp-h): New targets.
2172
2173 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2174
2175         * interp.c (ColdReset): Fix boolean test. Make all simulator
2176         globals static.
2177
2178 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2179
2180         * interp.c (xfer_direct_word, xfer_direct_long,
2181         swap_direct_word, swap_direct_long, xfer_big_word,
2182         xfer_big_long, xfer_little_word, xfer_little_long,
2183         swap_word,swap_long): Added.
2184         * interp.c (ColdReset): Provide function indirection to
2185         host<->simulated_target transfer routines.
2186         * interp.c (sim_store_register, sim_fetch_register): Updated to
2187         make use of indirected transfer routines.
2188
2189 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2190
2191         * gencode.c (process_instructions): Ensure FP ABS instruction
2192         recognised.
2193         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2194         system call support.
2195
2196 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2197
2198         * interp.c (sim_do_command): Complain if callback structure not
2199         initialised.
2200
2201 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2202
2203         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2204         support for Sun hosts.
2205         * Makefile.in (gencode): Ensure the host compiler and libraries
2206         used for cross-hosted build.
2207
2208 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2209
2210         * interp.c, gencode.c: Some more (TODO) tidying.
2211
2212 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2213
2214         * gencode.c, interp.c: Replaced explicit long long references with
2215         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2216         * support.h (SET64LO, SET64HI): Macros added.
2217
2218 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2219
2220         * configure: Regenerate with autoconf 2.7.
2221
2222 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2223
2224         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2225         * support.h: Remove superfluous "1" from #if.
2226         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2227
2228 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2229
2230         * interp.c (StoreFPR): Control UndefinedResult() call on
2231         WARN_RESULT manifest.
2232
2233 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2234
2235         * gencode.c: Tidied instruction decoding, and added FP instruction
2236         support.
2237
2238         * interp.c: Added dineroIII, and BSD profiling support. Also
2239         run-time FP handling.
2240
2241 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2242
2243         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2244         gencode.c, interp.c, support.h: created.