1 2015-11-15 Mike Frysinger <vapier@gentoo.org>
3 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
5 2015-11-14 Mike Frysinger <vapier@gentoo.org>
7 * interp.c (sim_close): Rename to ...
8 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
10 * sim-main.h (mips_sim_close): Declare.
11 (SIM_CLOSE_HOOK): Define.
13 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
14 Ali Lown <ali.lown@imgtec.com>
16 * Makefile.in (tmp-micromips): New rule.
17 (tmp-mach-multi): Add support for micromips.
18 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
19 that works for both mips64 and micromips64.
20 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
22 Add build support for micromips.
23 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
24 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
25 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
26 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
27 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
28 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
29 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
30 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
31 Refactored instruction code to use these functions.
32 * dsp2.igen: Refactored instruction code to use the new functions.
33 * interp.c (decode_coproc): Refactored to work with any instruction
35 (isa_mode): New variable
36 (RSVD_INSTRUCTION): Changed to 0x00000039.
37 * m16.igen (BREAK16): Refactored instruction to use do_break16.
38 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
39 * micromips.dc: New file.
40 * micromips.igen: New file.
41 * micromips16.dc: New file.
42 * micromipsdsp.igen: New file.
43 * micromipsrun.c: New file.
44 * mips.igen (do_swc1): Changed to work with any instruction encoding.
45 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
46 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
47 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
48 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
49 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
50 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
51 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
52 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
53 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
54 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
55 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
56 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
57 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
58 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
59 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
60 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
61 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
62 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
64 Refactored instruction code to use these functions.
65 (RSVD): Changed to use new reserved instruction.
66 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
67 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
68 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
69 do_store_double): Added micromips32 and micromips64 models.
70 Added include for micromips.igen and micromipsdsp.igen
71 Add micromips32 and micromips64 models.
72 (DecodeCoproc): Updated to use new macro definition.
73 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
74 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
75 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
76 Refactored instruction code to use these functions.
77 * sim-main.h (CP0_operation): New enum.
78 (DecodeCoproc): Updated macro.
79 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
80 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
81 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
82 ISA_MODE_MICROMIPS): New defines.
83 (sim_state): Add isa_mode field.
85 2015-06-23 Mike Frysinger <vapier@gentoo.org>
87 * configure: Regenerate.
89 2015-06-12 Mike Frysinger <vapier@gentoo.org>
91 * configure.ac: Change configure.in to configure.ac.
92 * configure: Regenerate.
94 2015-06-12 Mike Frysinger <vapier@gentoo.org>
96 * configure: Regenerate.
98 2015-06-12 Mike Frysinger <vapier@gentoo.org>
100 * interp.c [TRACE]: Delete.
101 (TRACE): Change to WITH_TRACE_ANY_P.
102 [!WITH_TRACE_ANY_P] (open_trace): Define.
103 (mips_option_handler, open_trace, sim_close, dotrace):
104 Change defined(TRACE) to WITH_TRACE_ANY_P.
105 (sim_open): Delete TRACE ifdef check.
106 * sim-main.c (load_memory): Delete TRACE ifdef check.
107 (store_memory): Likewise.
108 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
109 [!WITH_TRACE_ANY_P] (dotrace): Define.
111 2015-04-18 Mike Frysinger <vapier@gentoo.org>
113 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
116 2015-04-18 Mike Frysinger <vapier@gentoo.org>
118 * sim-main.h (SIM_CPU): Delete.
120 2015-04-18 Mike Frysinger <vapier@gentoo.org>
122 * sim-main.h (sim_cia): Delete.
124 2015-04-17 Mike Frysinger <vapier@gentoo.org>
126 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
128 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
129 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
130 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
131 CIA_SET to CPU_PC_SET.
132 * sim-main.h (CIA_GET, CIA_SET): Delete.
134 2015-04-15 Mike Frysinger <vapier@gentoo.org>
136 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
137 * sim-main.h (STATE_CPU): Delete.
139 2015-04-13 Mike Frysinger <vapier@gentoo.org>
141 * configure: Regenerate.
143 2015-04-13 Mike Frysinger <vapier@gentoo.org>
145 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
146 * interp.c (mips_pc_get, mips_pc_set): New functions.
147 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
148 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
149 (sim_pc_get): Delete.
150 * sim-main.h (SIM_CPU): Define.
151 (struct sim_state): Change cpu to an array of pointers.
154 2015-04-13 Mike Frysinger <vapier@gentoo.org>
156 * interp.c (mips_option_handler, open_trace, sim_close,
157 sim_write, sim_read, sim_store_register, sim_fetch_register,
158 sim_create_inferior, pr_addr, pr_uword64): Convert old style
160 (sim_open): Convert old style prototype. Change casts with
161 sim_write to unsigned char *.
162 (fetch_str): Change null to unsigned char, and change cast to
164 (sim_monitor): Change c & ch to unsigned char. Change cast to
167 2015-04-12 Mike Frysinger <vapier@gentoo.org>
169 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
171 2015-04-06 Mike Frysinger <vapier@gentoo.org>
173 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
175 2015-04-01 Mike Frysinger <vapier@gentoo.org>
177 * tconfig.h (SIM_HAVE_PROFILE): Delete.
179 2015-03-31 Mike Frysinger <vapier@gentoo.org>
181 * config.in, configure: Regenerate.
183 2015-03-24 Mike Frysinger <vapier@gentoo.org>
185 * interp.c (sim_pc_get): New function.
187 2015-03-24 Mike Frysinger <vapier@gentoo.org>
189 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
190 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
192 2015-03-24 Mike Frysinger <vapier@gentoo.org>
194 * configure: Regenerate.
196 2015-03-23 Mike Frysinger <vapier@gentoo.org>
198 * configure: Regenerate.
200 2015-03-23 Mike Frysinger <vapier@gentoo.org>
202 * configure: Regenerate.
203 * configure.ac (mips_extra_objs): Delete.
204 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
205 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
207 2015-03-23 Mike Frysinger <vapier@gentoo.org>
209 * configure: Regenerate.
210 * configure.ac: Delete sim_hw checks for dv-sockser.
212 2015-03-16 Mike Frysinger <vapier@gentoo.org>
214 * config.in, configure: Regenerate.
215 * tconfig.in: Rename file ...
216 * tconfig.h: ... here.
218 2015-03-15 Mike Frysinger <vapier@gentoo.org>
220 * tconfig.in: Delete includes.
221 [HAVE_DV_SOCKSER]: Delete.
223 2015-03-14 Mike Frysinger <vapier@gentoo.org>
225 * Makefile.in (SIM_RUN_OBJS): Delete.
227 2015-03-14 Mike Frysinger <vapier@gentoo.org>
229 * configure.ac (AC_CHECK_HEADERS): Delete.
230 * aclocal.m4, configure: Regenerate.
232 2014-08-19 Alan Modra <amodra@gmail.com>
234 * configure: Regenerate.
236 2014-08-15 Roland McGrath <mcgrathr@google.com>
238 * configure: Regenerate.
239 * config.in: Regenerate.
241 2014-03-04 Mike Frysinger <vapier@gentoo.org>
243 * configure: Regenerate.
245 2013-09-23 Alan Modra <amodra@gmail.com>
247 * configure: Regenerate.
249 2013-06-03 Mike Frysinger <vapier@gentoo.org>
251 * aclocal.m4, configure: Regenerate.
253 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
255 * configure: Rebuild.
257 2013-03-26 Mike Frysinger <vapier@gentoo.org>
259 * configure: Regenerate.
261 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
263 * configure.ac: Address use of dv-sockser.o.
264 * tconfig.in: Conditionalize use of dv_sockser_install.
265 * configure: Regenerated.
266 * config.in: Regenerated.
268 2012-10-04 Chao-ying Fu <fu@mips.com>
269 Steve Ellcey <sellcey@mips.com>
271 * mips/mips3264r2.igen (rdhwr): New.
273 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
275 * configure.ac: Always link against dv-sockser.o.
276 * configure: Regenerate.
278 2012-06-15 Joel Brobecker <brobecker@adacore.com>
280 * config.in, configure: Regenerate.
282 2012-05-18 Nick Clifton <nickc@redhat.com>
285 * interp.c: Include config.h before system header files.
287 2012-03-24 Mike Frysinger <vapier@gentoo.org>
289 * aclocal.m4, config.in, configure: Regenerate.
291 2011-12-03 Mike Frysinger <vapier@gentoo.org>
293 * aclocal.m4: New file.
294 * configure: Regenerate.
296 2011-10-19 Mike Frysinger <vapier@gentoo.org>
298 * configure: Regenerate after common/acinclude.m4 update.
300 2011-10-17 Mike Frysinger <vapier@gentoo.org>
302 * configure.ac: Change include to common/acinclude.m4.
304 2011-10-17 Mike Frysinger <vapier@gentoo.org>
306 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
307 call. Replace common.m4 include with SIM_AC_COMMON.
308 * configure: Regenerate.
310 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
312 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
314 (tmp-mach-multi): Exit early when igen fails.
316 2011-07-05 Mike Frysinger <vapier@gentoo.org>
318 * interp.c (sim_do_command): Delete.
320 2011-02-14 Mike Frysinger <vapier@gentoo.org>
322 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
323 (tx3904sio_fifo_reset): Likewise.
324 * interp.c (sim_monitor): Likewise.
326 2010-04-14 Mike Frysinger <vapier@gentoo.org>
328 * interp.c (sim_write): Add const to buffer arg.
330 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
332 * interp.c: Don't include sysdep.h
334 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
336 * configure: Regenerate.
338 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
340 * config.in: Regenerate.
341 * configure: Likewise.
343 * configure: Regenerate.
345 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
347 * configure: Regenerate to track ../common/common.m4 changes.
350 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
351 Daniel Jacobowitz <dan@codesourcery.com>
352 Joseph Myers <joseph@codesourcery.com>
354 * configure: Regenerate.
356 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
358 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
359 that unconditionally allows fmt_ps.
360 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
361 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
362 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
363 filter from 64,f to 32,f.
364 (PREFX): Change filter from 64 to 32.
365 (LDXC1, LUXC1): Provide separate mips32r2 implementations
366 that use do_load_double instead of do_load. Make both LUXC1
367 versions unpredictable if SizeFGR () != 64.
368 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
369 instead of do_store. Remove unused variable. Make both SUXC1
370 versions unpredictable if SizeFGR () != 64.
372 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
374 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
375 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
376 shifts for that case.
378 2007-09-04 Nick Clifton <nickc@redhat.com>
380 * interp.c (options enum): Add OPTION_INFO_MEMORY.
381 (display_mem_info): New static variable.
382 (mips_option_handler): Handle OPTION_INFO_MEMORY.
383 (mips_options): Add info-memory and memory-info.
384 (sim_open): After processing the command line and board
385 specification, check display_mem_info. If it is set then
386 call the real handler for the --memory-info command line
389 2007-08-24 Joel Brobecker <brobecker@adacore.com>
391 * configure.ac: Change license of multi-run.c to GPL version 3.
392 * configure: Regenerate.
394 2007-06-28 Richard Sandiford <richard@codesourcery.com>
396 * configure.ac, configure: Revert last patch.
398 2007-06-26 Richard Sandiford <richard@codesourcery.com>
400 * configure.ac (sim_mipsisa3264_configs): New variable.
401 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
402 every configuration support all four targets, using the triplet to
403 determine the default.
404 * configure: Regenerate.
406 2007-06-25 Richard Sandiford <richard@codesourcery.com>
408 * Makefile.in (m16run.o): New rule.
410 2007-05-15 Thiemo Seufer <ths@mips.com>
412 * mips3264r2.igen (DSHD): Fix compile warning.
414 2007-05-14 Thiemo Seufer <ths@mips.com>
416 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
417 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
418 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
419 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
422 2007-03-01 Thiemo Seufer <ths@mips.com>
424 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
427 2007-02-20 Thiemo Seufer <ths@mips.com>
429 * dsp.igen: Update copyright notice.
430 * dsp2.igen: Fix copyright notice.
432 2007-02-20 Thiemo Seufer <ths@mips.com>
433 Chao-Ying Fu <fu@mips.com>
435 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
436 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
437 Add dsp2 to sim_igen_machine.
438 * configure: Regenerate.
439 * dsp.igen (do_ph_op): Add MUL support when op = 2.
440 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
441 (mulq_rs.ph): Use do_ph_mulq.
442 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
443 * mips.igen: Add dsp2 model and include dsp2.igen.
444 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
445 for *mips32r2, *mips64r2, *dsp.
446 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
447 for *mips32r2, *mips64r2, *dsp2.
448 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
450 2007-02-19 Thiemo Seufer <ths@mips.com>
451 Nigel Stephens <nigel@mips.com>
453 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
454 jumps with hazard barrier.
456 2007-02-19 Thiemo Seufer <ths@mips.com>
457 Nigel Stephens <nigel@mips.com>
459 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
460 after each call to sim_io_write.
462 2007-02-19 Thiemo Seufer <ths@mips.com>
463 Nigel Stephens <nigel@mips.com>
465 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
466 supported by this simulator.
467 (decode_coproc): Recognise additional CP0 Config registers
470 2007-02-19 Thiemo Seufer <ths@mips.com>
471 Nigel Stephens <nigel@mips.com>
472 David Ung <davidu@mips.com>
474 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
475 uninterpreted formats. If fmt is one of the uninterpreted types
476 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
477 fmt_word, and fmt_uninterpreted_64 like fmt_long.
478 (store_fpr): When writing an invalid odd register, set the
479 matching even register to fmt_unknown, not the following register.
480 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
481 the the memory window at offset 0 set by --memory-size command
483 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
485 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
487 (sim_monitor): When returning the memory size to the MIPS
488 application, use the value in STATE_MEM_SIZE, not an arbitrary
490 (cop_lw): Don' mess around with FPR_STATE, just pass
491 fmt_uninterpreted_32 to StoreFPR.
493 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
495 * mips.igen (not_word_value): Single version for mips32, mips64
498 2007-02-19 Thiemo Seufer <ths@mips.com>
499 Nigel Stephens <nigel@mips.com>
501 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
504 2007-02-17 Thiemo Seufer <ths@mips.com>
506 * configure.ac (mips*-sde-elf*): Move in front of generic machine
508 * configure: Regenerate.
510 2007-02-17 Thiemo Seufer <ths@mips.com>
512 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
513 Add mdmx to sim_igen_machine.
514 (mipsisa64*-*-*): Likewise. Remove dsp.
515 (mipsisa32*-*-*): Remove dsp.
516 * configure: Regenerate.
518 2007-02-13 Thiemo Seufer <ths@mips.com>
520 * configure.ac: Add mips*-sde-elf* target.
521 * configure: Regenerate.
523 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
525 * acconfig.h: Remove.
526 * config.in, configure: Regenerate.
528 2006-11-07 Thiemo Seufer <ths@mips.com>
530 * dsp.igen (do_w_op): Fix compiler warning.
532 2006-08-29 Thiemo Seufer <ths@mips.com>
533 David Ung <davidu@mips.com>
535 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
537 * configure: Regenerate.
538 * mips.igen (model): Add smartmips.
539 (MADDU): Increment ACX if carry.
540 (do_mult): Clear ACX.
541 (ROR,RORV): Add smartmips.
542 (include): Include smartmips.igen.
543 * sim-main.h (ACX): Set to REGISTERS[89].
544 * smartmips.igen: New file.
546 2006-08-29 Thiemo Seufer <ths@mips.com>
547 David Ung <davidu@mips.com>
549 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
550 mips3264r2.igen. Add missing dependency rules.
551 * m16e.igen: Support for mips16e save/restore instructions.
553 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
555 * configure: Regenerated.
557 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
559 * configure: Regenerated.
561 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
563 * configure: Regenerated.
565 2006-05-15 Chao-ying Fu <fu@mips.com>
567 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
569 2006-04-18 Nick Clifton <nickc@redhat.com>
571 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
574 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
576 * configure: Regenerate.
578 2005-12-14 Chao-ying Fu <fu@mips.com>
580 * Makefile.in (SIM_OBJS): Add dsp.o.
581 (dsp.o): New dependency.
582 (IGEN_INCLUDE): Add dsp.igen.
583 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
584 mipsisa64*-*-*): Add dsp to sim_igen_machine.
585 * configure: Regenerate.
586 * mips.igen: Add dsp model and include dsp.igen.
587 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
588 because these instructions are extended in DSP ASE.
589 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
590 adding 6 DSP accumulator registers and 1 DSP control register.
591 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
592 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
593 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
594 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
595 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
596 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
597 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
598 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
599 DSPCR_CCOND_SMASK): New define.
600 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
601 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
603 2005-07-08 Ian Lance Taylor <ian@airs.com>
605 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
607 2005-06-16 David Ung <davidu@mips.com>
608 Nigel Stephens <nigel@mips.com>
610 * mips.igen: New mips16e model and include m16e.igen.
611 (check_u64): Add mips16e tag.
612 * m16e.igen: New file for MIPS16e instructions.
613 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
614 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
616 * configure: Regenerate.
618 2005-05-26 David Ung <davidu@mips.com>
620 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
621 tags to all instructions which are applicable to the new ISAs.
622 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
624 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
626 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
628 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
629 * configure: Regenerate.
631 2005-03-23 Mark Kettenis <kettenis@gnu.org>
633 * configure: Regenerate.
635 2005-01-14 Andrew Cagney <cagney@gnu.org>
637 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
638 explicit call to AC_CONFIG_HEADER.
639 * configure: Regenerate.
641 2005-01-12 Andrew Cagney <cagney@gnu.org>
643 * configure.ac: Update to use ../common/common.m4.
644 * configure: Re-generate.
646 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
648 * configure: Regenerated to track ../common/aclocal.m4 changes.
650 2005-01-07 Andrew Cagney <cagney@gnu.org>
652 * configure.ac: Rename configure.in, require autoconf 2.59.
653 * configure: Re-generate.
655 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
657 * configure: Regenerate for ../common/aclocal.m4 update.
659 2004-09-24 Monika Chaddha <monika@acmet.com>
661 Committed by Andrew Cagney.
662 * m16.igen (CMP, CMPI): Fix assembler.
664 2004-08-18 Chris Demetriou <cgd@broadcom.com>
666 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
667 * configure: Regenerate.
669 2004-06-25 Chris Demetriou <cgd@broadcom.com>
671 * configure.in (sim_m16_machine): Include mipsIII.
672 * configure: Regenerate.
674 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
676 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
678 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
680 2004-04-10 Chris Demetriou <cgd@broadcom.com>
682 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
684 2004-04-09 Chris Demetriou <cgd@broadcom.com>
686 * mips.igen (check_fmt): Remove.
687 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
688 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
689 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
690 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
691 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
692 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
693 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
694 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
695 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
696 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
698 2004-04-09 Chris Demetriou <cgd@broadcom.com>
700 * sb1.igen (check_sbx): New function.
701 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
703 2004-03-29 Chris Demetriou <cgd@broadcom.com>
704 Richard Sandiford <rsandifo@redhat.com>
706 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
707 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
708 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
709 separate implementations for mipsIV and mipsV. Use new macros to
710 determine whether the restrictions apply.
712 2004-01-19 Chris Demetriou <cgd@broadcom.com>
714 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
715 (check_mult_hilo): Improve comments.
716 (check_div_hilo): Likewise. Also, fork off a new version
717 to handle mips32/mips64 (since there are no hazards to check
720 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
722 * mips.igen (do_dmultx): Fix check for negative operands.
724 2003-05-16 Ian Lance Taylor <ian@airs.com>
726 * Makefile.in (SHELL): Make sure this is defined.
727 (various): Use $(SHELL) whenever we invoke move-if-change.
729 2003-05-03 Chris Demetriou <cgd@broadcom.com>
731 * cp1.c: Tweak attribution slightly.
734 * mdmx.igen: Likewise.
735 * mips3d.igen: Likewise.
736 * sb1.igen: Likewise.
738 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
740 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
743 2003-02-27 Andrew Cagney <cagney@redhat.com>
745 * interp.c (sim_open): Rename _bfd to bfd.
746 (sim_create_inferior): Ditto.
748 2003-01-14 Chris Demetriou <cgd@broadcom.com>
750 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
752 2003-01-14 Chris Demetriou <cgd@broadcom.com>
754 * mips.igen (EI, DI): Remove.
756 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
758 * Makefile.in (tmp-run-multi): Fix mips16 filter.
760 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
761 Andrew Cagney <ac131313@redhat.com>
762 Gavin Romig-Koch <gavin@redhat.com>
763 Graydon Hoare <graydon@redhat.com>
764 Aldy Hernandez <aldyh@redhat.com>
765 Dave Brolley <brolley@redhat.com>
766 Chris Demetriou <cgd@broadcom.com>
768 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
769 (sim_mach_default): New variable.
770 (mips64vr-*-*, mips64vrel-*-*): New configurations.
771 Add a new simulator generator, MULTI.
772 * configure: Regenerate.
773 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
774 (multi-run.o): New dependency.
775 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
776 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
777 (tmp-multi): Combine them.
778 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
779 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
780 (distclean-extra): New rule.
781 * sim-main.h: Include bfd.h.
782 (MIPS_MACH): New macro.
783 * mips.igen (vr4120, vr5400, vr5500): New models.
784 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
785 * vr.igen: Replace with new version.
787 2003-01-04 Chris Demetriou <cgd@broadcom.com>
789 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
790 * configure: Regenerate.
792 2002-12-31 Chris Demetriou <cgd@broadcom.com>
794 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
795 * mips.igen: Remove all invocations of check_branch_bug and
798 2002-12-16 Chris Demetriou <cgd@broadcom.com>
800 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
802 2002-07-30 Chris Demetriou <cgd@broadcom.com>
804 * mips.igen (do_load_double, do_store_double): New functions.
805 (LDC1, SDC1): Rename to...
806 (LDC1b, SDC1b): respectively.
807 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
809 2002-07-29 Michael Snyder <msnyder@redhat.com>
811 * cp1.c (fp_recip2): Modify initialization expression so that
812 GCC will recognize it as constant.
814 2002-06-18 Chris Demetriou <cgd@broadcom.com>
816 * mdmx.c (SD_): Delete.
817 (Unpredictable): Re-define, for now, to directly invoke
818 unpredictable_action().
819 (mdmx_acc_op): Fix error in .ob immediate handling.
821 2002-06-18 Andrew Cagney <cagney@redhat.com>
823 * interp.c (sim_firmware_command): Initialize `address'.
825 2002-06-16 Andrew Cagney <ac131313@redhat.com>
827 * configure: Regenerated to track ../common/aclocal.m4 changes.
829 2002-06-14 Chris Demetriou <cgd@broadcom.com>
830 Ed Satterthwaite <ehs@broadcom.com>
832 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
833 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
834 * mips.igen: Include mips3d.igen.
835 (mips3d): New model name for MIPS-3D ASE instructions.
836 (CVT.W.fmt): Don't use this instruction for word (source) format
838 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
839 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
840 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
841 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
842 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
843 (RSquareRoot1, RSquareRoot2): New macros.
844 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
845 (fp_rsqrt2): New functions.
846 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
847 * configure: Regenerate.
849 2002-06-13 Chris Demetriou <cgd@broadcom.com>
850 Ed Satterthwaite <ehs@broadcom.com>
852 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
853 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
854 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
855 (convert): Note that this function is not used for paired-single
857 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
858 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
859 (check_fmt_p): Enable paired-single support.
860 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
861 (PUU.PS): New instructions.
862 (CVT.S.fmt): Don't use this instruction for paired-single format
864 * sim-main.h (FP_formats): New value 'fmt_ps.'
865 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
866 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
868 2002-06-12 Chris Demetriou <cgd@broadcom.com>
870 * mips.igen: Fix formatting of function calls in
873 2002-06-12 Chris Demetriou <cgd@broadcom.com>
875 * mips.igen (MOVN, MOVZ): Trace result.
876 (TNEI): Print "tnei" as the opcode name in traces.
877 (CEIL.W): Add disassembly string for traces.
878 (RSQRT.fmt): Make location of disassembly string consistent
879 with other instructions.
881 2002-06-12 Chris Demetriou <cgd@broadcom.com>
883 * mips.igen (X): Delete unused function.
885 2002-06-08 Andrew Cagney <cagney@redhat.com>
887 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
889 2002-06-07 Chris Demetriou <cgd@broadcom.com>
890 Ed Satterthwaite <ehs@broadcom.com>
892 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
893 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
894 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
895 (fp_nmsub): New prototypes.
896 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
897 (NegMultiplySub): New defines.
898 * mips.igen (RSQRT.fmt): Use RSquareRoot().
899 (MADD.D, MADD.S): Replace with...
900 (MADD.fmt): New instruction.
901 (MSUB.D, MSUB.S): Replace with...
902 (MSUB.fmt): New instruction.
903 (NMADD.D, NMADD.S): Replace with...
904 (NMADD.fmt): New instruction.
905 (NMSUB.D, MSUB.S): Replace with...
906 (NMSUB.fmt): New instruction.
908 2002-06-07 Chris Demetriou <cgd@broadcom.com>
909 Ed Satterthwaite <ehs@broadcom.com>
911 * cp1.c: Fix more comment spelling and formatting.
912 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
913 (denorm_mode): New function.
914 (fpu_unary, fpu_binary): Round results after operation, collect
915 status from rounding operations, and update the FCSR.
916 (convert): Collect status from integer conversions and rounding
917 operations, and update the FCSR. Adjust NaN values that result
918 from conversions. Convert to use sim_io_eprintf rather than
919 fprintf, and remove some debugging code.
920 * cp1.h (fenr_FS): New define.
922 2002-06-07 Chris Demetriou <cgd@broadcom.com>
924 * cp1.c (convert): Remove unusable debugging code, and move MIPS
925 rounding mode to sim FP rounding mode flag conversion code into...
926 (rounding_mode): New function.
928 2002-06-07 Chris Demetriou <cgd@broadcom.com>
930 * cp1.c: Clean up formatting of a few comments.
931 (value_fpr): Reformat switch statement.
933 2002-06-06 Chris Demetriou <cgd@broadcom.com>
934 Ed Satterthwaite <ehs@broadcom.com>
937 * sim-main.h: Include cp1.h.
938 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
939 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
940 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
941 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
942 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
943 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
944 * cp1.c: Don't include sim-fpu.h; already included by
945 sim-main.h. Clean up formatting of some comments.
946 (NaN, Equal, Less): Remove.
947 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
948 (fp_cmp): New functions.
949 * mips.igen (do_c_cond_fmt): Remove.
950 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
951 Compare. Add result tracing.
952 (CxC1): Remove, replace with...
953 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
954 (DMxC1): Remove, replace with...
955 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
956 (MxC1): Remove, replace with...
957 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
959 2002-06-04 Chris Demetriou <cgd@broadcom.com>
961 * sim-main.h (FGRIDX): Remove, replace all uses with...
962 (FGR_BASE): New macro.
963 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
964 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
965 (NR_FGR, FGR): Likewise.
966 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
967 * mips.igen: Likewise.
969 2002-06-04 Chris Demetriou <cgd@broadcom.com>
971 * cp1.c: Add an FSF Copyright notice to this file.
973 2002-06-04 Chris Demetriou <cgd@broadcom.com>
974 Ed Satterthwaite <ehs@broadcom.com>
976 * cp1.c (Infinity): Remove.
977 * sim-main.h (Infinity): Likewise.
979 * cp1.c (fp_unary, fp_binary): New functions.
980 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
981 (fp_sqrt): New functions, implemented in terms of the above.
982 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
983 (Recip, SquareRoot): Remove (replaced by functions above).
984 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
985 (fp_recip, fp_sqrt): New prototypes.
986 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
987 (Recip, SquareRoot): Replace prototypes with #defines which
988 invoke the functions above.
990 2002-06-03 Chris Demetriou <cgd@broadcom.com>
992 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
993 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
994 file, remove PARAMS from prototypes.
995 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
996 simulator state arguments.
997 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
998 pass simulator state arguments.
999 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1000 (store_fpr, convert): Remove 'sd' argument.
1001 (value_fpr): Likewise. Convert to use 'SD' instead.
1003 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1005 * cp1.c (Min, Max): Remove #if 0'd functions.
1006 * sim-main.h (Min, Max): Remove.
1008 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1010 * cp1.c: fix formatting of switch case and default labels.
1011 * interp.c: Likewise.
1012 * sim-main.c: Likewise.
1014 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1016 * cp1.c: Clean up comments which describe FP formats.
1017 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1019 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1020 Ed Satterthwaite <ehs@broadcom.com>
1022 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1023 Broadcom SiByte SB-1 processor configurations.
1024 * configure: Regenerate.
1025 * sb1.igen: New file.
1026 * mips.igen: Include sb1.igen.
1028 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1029 * mdmx.igen: Add "sb1" model to all appropriate functions and
1031 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1032 (ob_func, ob_acc): Reference the above.
1033 (qh_acc): Adjust to keep the same size as ob_acc.
1034 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1035 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1037 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1039 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1041 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1042 Ed Satterthwaite <ehs@broadcom.com>
1044 * mips.igen (mdmx): New (pseudo-)model.
1045 * mdmx.c, mdmx.igen: New files.
1046 * Makefile.in (SIM_OBJS): Add mdmx.o.
1047 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1049 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1050 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1051 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1052 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1053 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1054 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1055 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1056 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1057 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1058 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1059 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1060 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1061 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1062 (qh_fmtsel): New macros.
1063 (_sim_cpu): New member "acc".
1064 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1065 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1067 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1069 * interp.c: Use 'deprecated' rather than 'depreciated.'
1070 * sim-main.h: Likewise.
1072 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1074 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1075 which wouldn't compile anyway.
1076 * sim-main.h (unpredictable_action): New function prototype.
1077 (Unpredictable): Define to call igen function unpredictable().
1078 (NotWordValue): New macro to call igen function not_word_value().
1079 (UndefinedResult): Remove.
1080 * interp.c (undefined_result): Remove.
1081 (unpredictable_action): New function.
1082 * mips.igen (not_word_value, unpredictable): New functions.
1083 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1084 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1085 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1086 NotWordValue() to check for unpredictable inputs, then
1087 Unpredictable() to handle them.
1089 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1091 * mips.igen: Fix formatting of calls to Unpredictable().
1093 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1095 * interp.c (sim_open): Revert previous change.
1097 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1099 * interp.c (sim_open): Disable chunk of code that wrote code in
1100 vector table entries.
1102 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1104 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1105 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1108 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1110 * cp1.c: Fix many formatting issues.
1112 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1114 * cp1.c (fpu_format_name): New function to replace...
1115 (DOFMT): This. Delete, and update all callers.
1116 (fpu_rounding_mode_name): New function to replace...
1117 (RMMODE): This. Delete, and update all callers.
1119 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1121 * interp.c: Move FPU support routines from here to...
1122 * cp1.c: Here. New file.
1123 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1124 (cp1.o): New target.
1126 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1128 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1129 * mips.igen (mips32, mips64): New models, add to all instructions
1130 and functions as appropriate.
1131 (loadstore_ea, check_u64): New variant for model mips64.
1132 (check_fmt_p): New variant for models mipsV and mips64, remove
1133 mipsV model marking fro other variant.
1136 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1137 for mips32 and mips64.
1138 (DCLO, DCLZ): New instructions for mips64.
1140 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1142 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1143 immediate or code as a hex value with the "%#lx" format.
1144 (ANDI): Likewise, and fix printed instruction name.
1146 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1148 * sim-main.h (UndefinedResult, Unpredictable): New macros
1149 which currently do nothing.
1151 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1153 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1154 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1155 (status_CU3): New definitions.
1157 * sim-main.h (ExceptionCause): Add new values for MIPS32
1158 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1159 for DebugBreakPoint and NMIReset to note their status in
1161 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1162 (SignalExceptionCacheErr): New exception macros.
1164 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1166 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1167 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1169 (SignalExceptionCoProcessorUnusable): Take as argument the
1170 unusable coprocessor number.
1172 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1174 * mips.igen: Fix formatting of all SignalException calls.
1176 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1178 * sim-main.h (SIGNEXTEND): Remove.
1180 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1182 * mips.igen: Remove gencode comment from top of file, fix
1183 spelling in another comment.
1185 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1187 * mips.igen (check_fmt, check_fmt_p): New functions to check
1188 whether specific floating point formats are usable.
1189 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1190 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1191 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1192 Use the new functions.
1193 (do_c_cond_fmt): Remove format checks...
1194 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1196 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1198 * mips.igen: Fix formatting of check_fpu calls.
1200 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1202 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1204 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1206 * mips.igen: Remove whitespace at end of lines.
1208 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1210 * mips.igen (loadstore_ea): New function to do effective
1211 address calculations.
1212 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1213 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1214 CACHE): Use loadstore_ea to do effective address computations.
1216 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1218 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1219 * mips.igen (LL, CxC1, MxC1): Likewise.
1221 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1223 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1224 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1225 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1226 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1227 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1228 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1229 Don't split opcode fields by hand, use the opcode field values
1232 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1234 * mips.igen (do_divu): Fix spacing.
1236 * mips.igen (do_dsllv): Move to be right before DSLLV,
1237 to match the rest of the do_<shift> functions.
1239 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1241 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1242 DSRL32, do_dsrlv): Trace inputs and results.
1244 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1246 * mips.igen (CACHE): Provide instruction-printing string.
1248 * interp.c (signal_exception): Comment tokens after #endif.
1250 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1252 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1253 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1254 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1255 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1256 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1257 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1258 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1259 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1261 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1263 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1264 instruction-printing string.
1265 (LWU): Use '64' as the filter flag.
1267 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1269 * mips.igen (SDXC1): Fix instruction-printing string.
1271 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1273 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1274 filter flags "32,f".
1276 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1278 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1281 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1283 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1284 add a comma) so that it more closely match the MIPS ISA
1285 documentation opcode partitioning.
1286 (PREF): Put useful names on opcode fields, and include
1287 instruction-printing string.
1289 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1291 * mips.igen (check_u64): New function which in the future will
1292 check whether 64-bit instructions are usable and signal an
1293 exception if not. Currently a no-op.
1294 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1295 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1296 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1297 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1299 * mips.igen (check_fpu): New function which in the future will
1300 check whether FPU instructions are usable and signal an exception
1301 if not. Currently a no-op.
1302 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1303 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1304 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1305 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1306 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1307 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1308 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1309 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1311 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1313 * mips.igen (do_load_left, do_load_right): Move to be immediately
1315 (do_store_left, do_store_right): Move to be immediately following
1318 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1320 * mips.igen (mipsV): New model name. Also, add it to
1321 all instructions and functions where it is appropriate.
1323 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1325 * mips.igen: For all functions and instructions, list model
1326 names that support that instruction one per line.
1328 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1330 * mips.igen: Add some additional comments about supported
1331 models, and about which instructions go where.
1332 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1333 order as is used in the rest of the file.
1335 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1337 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1338 indicating that ALU32_END or ALU64_END are there to check
1340 (DADD): Likewise, but also remove previous comment about
1343 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1345 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1346 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1347 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1348 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1349 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1350 fields (i.e., add and move commas) so that they more closely
1351 match the MIPS ISA documentation opcode partitioning.
1353 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1355 * mips.igen (ADDI): Print immediate value.
1356 (BREAK): Print code.
1357 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1358 (SLL): Print "nop" specially, and don't run the code
1359 that does the shift for the "nop" case.
1361 2001-11-17 Fred Fish <fnf@redhat.com>
1363 * sim-main.h (float_operation): Move enum declaration outside
1364 of _sim_cpu struct declaration.
1366 2001-04-12 Jim Blandy <jimb@redhat.com>
1368 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1369 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1371 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1372 PENDING_FILL, and you can get the intended effect gracefully by
1373 calling PENDING_SCHED directly.
1375 2001-02-23 Ben Elliston <bje@redhat.com>
1377 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1378 already defined elsewhere.
1380 2001-02-19 Ben Elliston <bje@redhat.com>
1382 * sim-main.h (sim_monitor): Return an int.
1383 * interp.c (sim_monitor): Add return values.
1384 (signal_exception): Handle error conditions from sim_monitor.
1386 2001-02-08 Ben Elliston <bje@redhat.com>
1388 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1389 (store_memory): Likewise, pass cia to sim_core_write*.
1391 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1393 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1394 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1396 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1398 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1399 * Makefile.in: Don't delete *.igen when cleaning directory.
1401 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1403 * m16.igen (break): Call SignalException not sim_engine_halt.
1405 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1407 From Jason Eckhardt:
1408 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1410 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1412 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1414 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1416 * mips.igen (do_dmultx): Fix typo.
1418 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1420 * configure: Regenerated to track ../common/aclocal.m4 changes.
1422 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1424 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1426 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1428 * sim-main.h (GPR_CLEAR): Define macro.
1430 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1432 * interp.c (decode_coproc): Output long using %lx and not %s.
1434 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1436 * interp.c (sim_open): Sort & extend dummy memory regions for
1437 --board=jmr3904 for eCos.
1439 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1441 * configure: Regenerated.
1443 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1445 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1446 calls, conditional on the simulator being in verbose mode.
1448 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1450 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1451 cache don't get ReservedInstruction traps.
1453 1999-11-29 Mark Salter <msalter@cygnus.com>
1455 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1456 to clear status bits in sdisr register. This is how the hardware works.
1458 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1459 being used by cygmon.
1461 1999-11-11 Andrew Haley <aph@cygnus.com>
1463 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1466 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1468 * mips.igen (MULT): Correct previous mis-applied patch.
1470 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1472 * mips.igen (delayslot32): Handle sequence like
1473 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1474 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1475 (MULT): Actually pass the third register...
1477 1999-09-03 Mark Salter <msalter@cygnus.com>
1479 * interp.c (sim_open): Added more memory aliases for additional
1480 hardware being touched by cygmon on jmr3904 board.
1482 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1484 * configure: Regenerated to track ../common/aclocal.m4 changes.
1486 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1488 * interp.c (sim_store_register): Handle case where client - GDB -
1489 specifies that a 4 byte register is 8 bytes in size.
1490 (sim_fetch_register): Ditto.
1492 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1494 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1495 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1496 (idt_monitor_base): Base address for IDT monitor traps.
1497 (pmon_monitor_base): Ditto for PMON.
1498 (lsipmon_monitor_base): Ditto for LSI PMON.
1499 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1500 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1501 (sim_firmware_command): New function.
1502 (mips_option_handler): Call it for OPTION_FIRMWARE.
1503 (sim_open): Allocate memory for idt_monitor region. If "--board"
1504 option was given, add no monitor by default. Add BREAK hooks only if
1505 monitors are also there.
1507 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1509 * interp.c (sim_monitor): Flush output before reading input.
1511 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1513 * tconfig.in (SIM_HANDLES_LMA): Always define.
1515 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1517 From Mark Salter <msalter@cygnus.com>:
1518 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1519 (sim_open): Add setup for BSP board.
1521 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1523 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1524 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1525 them as unimplemented.
1527 1999-05-08 Felix Lee <flee@cygnus.com>
1529 * configure: Regenerated to track ../common/aclocal.m4 changes.
1531 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1533 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1535 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1537 * configure.in: Any mips64vr5*-*-* target should have
1538 -DTARGET_ENABLE_FR=1.
1539 (default_endian): Any mips64vr*el-*-* target should default to
1541 * configure: Re-generate.
1543 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1545 * mips.igen (ldl): Extend from _16_, not 32.
1547 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1549 * interp.c (sim_store_register): Force registers written to by GDB
1550 into an un-interpreted state.
1552 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1554 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1555 CPU, start periodic background I/O polls.
1556 (tx3904sio_poll): New function: periodic I/O poller.
1558 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1560 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1562 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1564 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1567 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1569 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1570 (load_word): Call SIM_CORE_SIGNAL hook on error.
1571 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1572 starting. For exception dispatching, pass PC instead of NULL_CIA.
1573 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1574 * sim-main.h (COP0_BADVADDR): Define.
1575 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1576 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1577 (_sim_cpu): Add exc_* fields to store register value snapshots.
1578 * mips.igen (*): Replace memory-related SignalException* calls
1579 with references to SIM_CORE_SIGNAL hook.
1581 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1583 * sim-main.c (*): Minor warning cleanups.
1585 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1587 * m16.igen (DADDIU5): Correct type-o.
1589 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1591 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1594 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1596 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1598 (interp.o): Add dependency on itable.h
1599 (oengine.c, gencode): Delete remaining references.
1600 (BUILT_SRC_FROM_GEN): Clean up.
1602 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1605 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1606 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1607 tmp-run-hack) : New.
1608 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1609 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1610 Drop the "64" qualifier to get the HACK generator working.
1611 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1612 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1613 qualifier to get the hack generator working.
1614 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1615 (DSLL): Use do_dsll.
1616 (DSLLV): Use do_dsllv.
1617 (DSRA): Use do_dsra.
1618 (DSRL): Use do_dsrl.
1619 (DSRLV): Use do_dsrlv.
1620 (BC1): Move *vr4100 to get the HACK generator working.
1621 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1622 get the HACK generator working.
1623 (MACC) Rename to get the HACK generator working.
1624 (DMACC,MACCS,DMACCS): Add the 64.
1626 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1628 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1629 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1631 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1633 * mips/interp.c (DEBUG): Cleanups.
1635 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1637 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1638 (tx3904sio_tickle): fflush after a stdout character output.
1640 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1642 * interp.c (sim_close): Uninstall modules.
1644 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1646 * sim-main.h, interp.c (sim_monitor): Change to global
1649 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1651 * configure.in (vr4100): Only include vr4100 instructions in
1653 * configure: Re-generate.
1654 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1656 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1658 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1659 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1662 * configure.in (sim_default_gen, sim_use_gen): Replace with
1664 (--enable-sim-igen): Delete config option. Always using IGEN.
1665 * configure: Re-generate.
1667 * Makefile.in (gencode): Kill, kill, kill.
1670 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1672 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1673 bit mips16 igen simulator.
1674 * configure: Re-generate.
1676 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1677 as part of vr4100 ISA.
1678 * vr.igen: Mark all instructions as 64 bit only.
1680 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1682 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1685 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1687 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1688 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1689 * configure: Re-generate.
1691 * m16.igen (BREAK): Define breakpoint instruction.
1692 (JALX32): Mark instruction as mips16 and not r3900.
1693 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1695 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1697 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1699 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1700 insn as a debug breakpoint.
1702 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1704 (PENDING_SCHED): Clean up trace statement.
1705 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1706 (PENDING_FILL): Delay write by only one cycle.
1707 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1709 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1711 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1713 (pending_tick): Move incrementing of index to FOR statement.
1714 (pending_tick): Only update PENDING_OUT after a write has occured.
1716 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1718 * configure: Re-generate.
1720 * interp.c (sim_engine_run OLD): Delete explicit call to
1721 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1723 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1725 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1726 interrupt level number to match changed SignalExceptionInterrupt
1729 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1731 * interp.c: #include "itable.h" if WITH_IGEN.
1732 (get_insn_name): New function.
1733 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1734 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1736 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1738 * configure: Rebuilt to inhale new common/aclocal.m4.
1740 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1742 * dv-tx3904sio.c: Include sim-assert.h.
1744 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1746 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1747 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1748 Reorganize target-specific sim-hardware checks.
1749 * configure: rebuilt.
1750 * interp.c (sim_open): For tx39 target boards, set
1751 OPERATING_ENVIRONMENT, add tx3904sio devices.
1752 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1753 ROM executables. Install dv-sockser into sim-modules list.
1755 * dv-tx3904irc.c: Compiler warning clean-up.
1756 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1757 frequent hw-trace messages.
1759 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1761 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1763 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1765 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1767 * vr.igen: New file.
1768 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1769 * mips.igen: Define vr4100 model. Include vr.igen.
1770 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1772 * mips.igen (check_mf_hilo): Correct check.
1774 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1776 * sim-main.h (interrupt_event): Add prototype.
1778 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1779 register_ptr, register_value.
1780 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1782 * sim-main.h (tracefh): Make extern.
1784 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1786 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1787 Reduce unnecessarily high timer event frequency.
1788 * dv-tx3904cpu.c: Ditto for interrupt event.
1790 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1792 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1794 (interrupt_event): Made non-static.
1796 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1797 interchange of configuration values for external vs. internal
1800 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1802 * mips.igen (BREAK): Moved code to here for
1803 simulator-reserved break instructions.
1804 * gencode.c (build_instruction): Ditto.
1805 * interp.c (signal_exception): Code moved from here. Non-
1806 reserved instructions now use exception vector, rather
1808 * sim-main.h: Moved magic constants to here.
1810 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1812 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1813 register upon non-zero interrupt event level, clear upon zero
1815 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1816 by passing zero event value.
1817 (*_io_{read,write}_buffer): Endianness fixes.
1818 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1819 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1821 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1822 serial I/O and timer module at base address 0xFFFF0000.
1824 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1826 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1829 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1831 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1833 * configure: Update.
1835 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1837 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1838 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1839 * configure.in: Include tx3904tmr in hw_device list.
1840 * configure: Rebuilt.
1841 * interp.c (sim_open): Instantiate three timer instances.
1842 Fix address typo of tx3904irc instance.
1844 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1846 * interp.c (signal_exception): SystemCall exception now uses
1847 the exception vector.
1849 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1851 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1854 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
1856 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1858 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
1860 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1862 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1863 sim-main.h. Declare a struct hw_descriptor instead of struct
1864 hw_device_descriptor.
1866 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1868 * mips.igen (do_store_left, do_load_left): Compute nr of left and
1869 right bits and then re-align left hand bytes to correct byte
1870 lanes. Fix incorrect computation in do_store_left when loading
1871 bytes from second word.
1873 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1875 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1876 * interp.c (sim_open): Only create a device tree when HW is
1879 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1880 * interp.c (signal_exception): Ditto.
1882 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
1884 * gencode.c: Mark BEGEZALL as LIKELY.
1886 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
1888 * sim-main.h (ALU32_END): Sign extend 32 bit results.
1889 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1891 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
1893 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1894 modules. Recognize TX39 target with "mips*tx39" pattern.
1895 * configure: Rebuilt.
1896 * sim-main.h (*): Added many macros defining bits in
1897 TX39 control registers.
1898 (SignalInterrupt): Send actual PC instead of NULL.
1899 (SignalNMIReset): New exception type.
1900 * interp.c (board): New variable for future use to identify
1901 a particular board being simulated.
1902 (mips_option_handler,mips_options): Added "--board" option.
1903 (interrupt_event): Send actual PC.
1904 (sim_open): Make memory layout conditional on board setting.
1905 (signal_exception): Initial implementation of hardware interrupt
1906 handling. Accept another break instruction variant for simulator
1908 (decode_coproc): Implement RFE instruction for TX39.
1909 (mips.igen): Decode RFE instruction as such.
1910 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1911 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1912 bbegin to implement memory map.
1913 * dv-tx3904cpu.c: New file.
1914 * dv-tx3904irc.c: New file.
1916 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
1918 * mips.igen (check_mt_hilo): Create a separate r3900 version.
1920 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
1922 * tx.igen (madd,maddu): Replace calls to check_op_hilo
1923 with calls to check_div_hilo.
1925 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
1927 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1928 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1929 Add special r3900 version of do_mult_hilo.
1930 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1931 with calls to check_mult_hilo.
1932 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1933 with calls to check_div_hilo.
1935 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
1937 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1938 Document a replacement.
1940 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
1942 * interp.c (sim_monitor): Make mon_printf work.
1944 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
1946 * sim-main.h (INSN_NAME): New arg `cpu'.
1948 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
1950 * configure: Regenerated to track ../common/aclocal.m4 changes.
1952 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
1954 * configure: Regenerated to track ../common/aclocal.m4 changes.
1957 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
1959 * acconfig.h: New file.
1960 * configure.in: Reverted change of Apr 24; use sinclude again.
1962 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
1964 * configure: Regenerated to track ../common/aclocal.m4 changes.
1967 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
1969 * configure.in: Don't call sinclude.
1971 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
1973 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1975 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1977 * mips.igen (ERET): Implement.
1979 * interp.c (decode_coproc): Return sign-extended EPC.
1981 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1983 * interp.c (signal_exception): Do not ignore Trap.
1984 (signal_exception): On TRAP, restart at exception address.
1985 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1986 (signal_exception): Update.
1987 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1988 so that TRAP instructions are caught.
1990 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
1992 * sim-main.h (struct hilo_access, struct hilo_history): Define,
1993 contains HI/LO access history.
1994 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1995 (HIACCESS, LOACCESS): Delete, replace with
1996 (HIHISTORY, LOHISTORY): New macros.
1997 (CHECKHILO): Delete all, moved to mips.igen
1999 * gencode.c (build_instruction): Do not generate checks for
2000 correct HI/LO register usage.
2002 * interp.c (old_engine_run): Delete checks for correct HI/LO
2005 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2006 check_mf_cycles): New functions.
2007 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2008 do_divu, domultx, do_mult, do_multu): Use.
2010 * tx.igen ("madd", "maddu"): Use.
2012 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2014 * mips.igen (DSRAV): Use function do_dsrav.
2015 (SRAV): Use new function do_srav.
2017 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2018 (B): Sign extend 11 bit immediate.
2019 (EXT-B*): Shift 16 bit immediate left by 1.
2020 (ADDIU*): Don't sign extend immediate value.
2022 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2024 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2026 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2029 * mips.igen (delayslot32, nullify_next_insn): New functions.
2030 (m16.igen): Always include.
2031 (do_*): Add more tracing.
2033 * m16.igen (delayslot16): Add NIA argument, could be called by a
2034 32 bit MIPS16 instruction.
2036 * interp.c (ifetch16): Move function from here.
2037 * sim-main.c (ifetch16): To here.
2039 * sim-main.c (ifetch16, ifetch32): Update to match current
2040 implementations of LH, LW.
2041 (signal_exception): Don't print out incorrect hex value of illegal
2044 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2046 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2049 * m16.igen: Implement MIPS16 instructions.
2051 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2052 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2053 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2054 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2055 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2056 bodies of corresponding code from 32 bit insn to these. Also used
2057 by MIPS16 versions of functions.
2059 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2060 (IMEM16): Drop NR argument from macro.
2062 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2064 * Makefile.in (SIM_OBJS): Add sim-main.o.
2066 * sim-main.h (address_translation, load_memory, store_memory,
2067 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2069 (pr_addr, pr_uword64): Declare.
2070 (sim-main.c): Include when H_REVEALS_MODULE_P.
2072 * interp.c (address_translation, load_memory, store_memory,
2073 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2075 * sim-main.c: To here. Fix compilation problems.
2077 * configure.in: Enable inlining.
2078 * configure: Re-config.
2080 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2082 * configure: Regenerated to track ../common/aclocal.m4 changes.
2084 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2086 * mips.igen: Include tx.igen.
2087 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2088 * tx.igen: New file, contains MADD and MADDU.
2090 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2091 the hardwired constant `7'.
2092 (store_memory): Ditto.
2093 (LOADDRMASK): Move definition to sim-main.h.
2095 mips.igen (MTC0): Enable for r3900.
2098 mips.igen (do_load_byte): Delete.
2099 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2100 do_store_right): New functions.
2101 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2103 configure.in: Let the tx39 use igen again.
2106 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2108 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2109 not an address sized quantity. Return zero for cache sizes.
2111 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2113 * mips.igen (r3900): r3900 does not support 64 bit integer
2116 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2118 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2120 * configure : Rebuild.
2122 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2124 * configure: Regenerated to track ../common/aclocal.m4 changes.
2126 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2128 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2130 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2132 * configure: Regenerated to track ../common/aclocal.m4 changes.
2133 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2135 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2137 * configure: Regenerated to track ../common/aclocal.m4 changes.
2139 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2141 * interp.c (Max, Min): Comment out functions. Not yet used.
2143 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2145 * configure: Regenerated to track ../common/aclocal.m4 changes.
2147 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2149 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2150 configurable settings for stand-alone simulator.
2152 * configure.in: Added X11 search, just in case.
2154 * configure: Regenerated.
2156 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * interp.c (sim_write, sim_read, load_memory, store_memory):
2159 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2161 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2163 * sim-main.h (GETFCC): Return an unsigned value.
2165 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2167 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2168 (DADD): Result destination is RD not RT.
2170 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2172 * sim-main.h (HIACCESS, LOACCESS): Always define.
2174 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2176 * interp.c (sim_info): Delete.
2178 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2180 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2181 (mips_option_handler): New argument `cpu'.
2182 (sim_open): Update call to sim_add_option_table.
2184 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2186 * mips.igen (CxC1): Add tracing.
2188 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2190 * sim-main.h (Max, Min): Declare.
2192 * interp.c (Max, Min): New functions.
2194 * mips.igen (BC1): Add tracing.
2196 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2198 * interp.c Added memory map for stack in vr4100
2200 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2202 * interp.c (load_memory): Add missing "break"'s.
2204 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2206 * interp.c (sim_store_register, sim_fetch_register): Pass in
2207 length parameter. Return -1.
2209 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2211 * interp.c: Added hardware init hook, fixed warnings.
2213 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2215 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2217 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2219 * interp.c (ifetch16): New function.
2221 * sim-main.h (IMEM32): Rename IMEM.
2222 (IMEM16_IMMED): Define.
2224 (DELAY_SLOT): Update.
2226 * m16run.c (sim_engine_run): New file.
2228 * m16.igen: All instructions except LB.
2229 (LB): Call do_load_byte.
2230 * mips.igen (do_load_byte): New function.
2231 (LB): Call do_load_byte.
2233 * mips.igen: Move spec for insn bit size and high bit from here.
2234 * Makefile.in (tmp-igen, tmp-m16): To here.
2236 * m16.dc: New file, decode mips16 instructions.
2238 * Makefile.in (SIM_NO_ALL): Define.
2239 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2241 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2243 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2244 point unit to 32 bit registers.
2245 * configure: Re-generate.
2247 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2249 * configure.in (sim_use_gen): Make IGEN the default simulator
2250 generator for generic 32 and 64 bit mips targets.
2251 * configure: Re-generate.
2253 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2255 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2258 * interp.c (sim_fetch_register, sim_store_register): Read/write
2259 FGR from correct location.
2260 (sim_open): Set size of FGR's according to
2261 WITH_TARGET_FLOATING_POINT_BITSIZE.
2263 * sim-main.h (FGR): Store floating point registers in a separate
2266 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2268 * configure: Regenerated to track ../common/aclocal.m4 changes.
2270 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2272 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2274 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2276 * interp.c (pending_tick): New function. Deliver pending writes.
2278 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2279 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2280 it can handle mixed sized quantites and single bits.
2282 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2284 * interp.c (oengine.h): Do not include when building with IGEN.
2285 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2286 (sim_info): Ditto for PROCESSOR_64BIT.
2287 (sim_monitor): Replace ut_reg with unsigned_word.
2288 (*): Ditto for t_reg.
2289 (LOADDRMASK): Define.
2290 (sim_open): Remove defunct check that host FP is IEEE compliant,
2291 using software to emulate floating point.
2292 (value_fpr, ...): Always compile, was conditional on HASFPU.
2294 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2296 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2299 * interp.c (SD, CPU): Define.
2300 (mips_option_handler): Set flags in each CPU.
2301 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2302 (sim_close): Do not clear STATE, deleted anyway.
2303 (sim_write, sim_read): Assume CPU zero's vm should be used for
2305 (sim_create_inferior): Set the PC for all processors.
2306 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2308 (mips16_entry): Pass correct nr of args to store_word, load_word.
2309 (ColdReset): Cold reset all cpu's.
2310 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2311 (sim_monitor, load_memory, store_memory, signal_exception): Use
2312 `CPU' instead of STATE_CPU.
2315 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2318 * sim-main.h (signal_exception): Add sim_cpu arg.
2319 (SignalException*): Pass both SD and CPU to signal_exception.
2320 * interp.c (signal_exception): Update.
2322 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2324 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2325 address_translation): Ditto
2326 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2328 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2330 * configure: Regenerated to track ../common/aclocal.m4 changes.
2332 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2334 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2336 * mips.igen (model): Map processor names onto BFD name.
2338 * sim-main.h (CPU_CIA): Delete.
2339 (SET_CIA, GET_CIA): Define
2341 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2343 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2346 * configure.in (default_endian): Configure a big-endian simulator
2348 * configure: Re-generate.
2350 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2352 * configure: Regenerated to track ../common/aclocal.m4 changes.
2354 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2356 * interp.c (sim_monitor): Handle Densan monitor outbyte
2357 and inbyte functions.
2359 1997-12-29 Felix Lee <flee@cygnus.com>
2361 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2363 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2365 * Makefile.in (tmp-igen): Arrange for $zero to always be
2366 reset to zero after every instruction.
2368 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2370 * configure: Regenerated to track ../common/aclocal.m4 changes.
2373 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2375 * mips.igen (MSUB): Fix to work like MADD.
2376 * gencode.c (MSUB): Similarly.
2378 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2380 * configure: Regenerated to track ../common/aclocal.m4 changes.
2382 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2384 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2386 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2388 * sim-main.h (sim-fpu.h): Include.
2390 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2391 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2392 using host independant sim_fpu module.
2394 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2396 * interp.c (signal_exception): Report internal errors with SIGABRT
2399 * sim-main.h (C0_CONFIG): New register.
2400 (signal.h): No longer include.
2402 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2404 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2406 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2408 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2410 * mips.igen: Tag vr5000 instructions.
2411 (ANDI): Was missing mipsIV model, fix assembler syntax.
2412 (do_c_cond_fmt): New function.
2413 (C.cond.fmt): Handle mips I-III which do not support CC field
2415 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2416 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2418 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2419 vr5000 which saves LO in a GPR separatly.
2421 * configure.in (enable-sim-igen): For vr5000, select vr5000
2422 specific instructions.
2423 * configure: Re-generate.
2425 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2427 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2429 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2430 fmt_uninterpreted_64 bit cases to switch. Convert to
2433 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2435 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2436 as specified in IV3.2 spec.
2437 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2439 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2441 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2442 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2443 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2444 PENDING_FILL versions of instructions. Simplify.
2446 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2448 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2450 (MTHI, MFHI): Disable code checking HI-LO.
2452 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2454 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2456 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2458 * gencode.c (build_mips16_operands): Replace IPC with cia.
2460 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2461 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2463 (UndefinedResult): Replace function with macro/function
2465 (sim_engine_run): Don't save PC in IPC.
2467 * sim-main.h (IPC): Delete.
2470 * interp.c (signal_exception, store_word, load_word,
2471 address_translation, load_memory, store_memory, cache_op,
2472 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2473 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2474 current instruction address - cia - argument.
2475 (sim_read, sim_write): Call address_translation directly.
2476 (sim_engine_run): Rename variable vaddr to cia.
2477 (signal_exception): Pass cia to sim_monitor
2479 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2480 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2481 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2483 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2484 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2487 * interp.c (signal_exception): Pass restart address to
2490 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2491 idecode.o): Add dependency.
2493 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2495 (DELAY_SLOT): Update NIA not PC with branch address.
2496 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2498 * mips.igen: Use CIA not PC in branch calculations.
2499 (illegal): Call SignalException.
2500 (BEQ, ADDIU): Fix assembler.
2502 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2504 * m16.igen (JALX): Was missing.
2506 * configure.in (enable-sim-igen): New configuration option.
2507 * configure: Re-generate.
2509 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2511 * interp.c (load_memory, store_memory): Delete parameter RAW.
2512 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2513 bypassing {load,store}_memory.
2515 * sim-main.h (ByteSwapMem): Delete definition.
2517 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2519 * interp.c (sim_do_command, sim_commands): Delete mips specific
2520 commands. Handled by module sim-options.
2522 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2523 (WITH_MODULO_MEMORY): Define.
2525 * interp.c (sim_info): Delete code printing memory size.
2527 * interp.c (mips_size): Nee sim_size, delete function.
2529 (monitor, monitor_base, monitor_size): Delete global variables.
2530 (sim_open, sim_close): Delete code creating monitor and other
2531 memory regions. Use sim-memopts module, via sim_do_commandf, to
2532 manage memory regions.
2533 (load_memory, store_memory): Use sim-core for memory model.
2535 * interp.c (address_translation): Delete all memory map code
2536 except line forcing 32 bit addresses.
2538 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2540 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2543 * interp.c (logfh, logfile): Delete globals.
2544 (sim_open, sim_close): Delete code opening & closing log file.
2545 (mips_option_handler): Delete -l and -n options.
2546 (OPTION mips_options): Ditto.
2548 * interp.c (OPTION mips_options): Rename option trace to dinero.
2549 (mips_option_handler): Update.
2551 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2553 * interp.c (fetch_str): New function.
2554 (sim_monitor): Rewrite using sim_read & sim_write.
2555 (sim_open): Check magic number.
2556 (sim_open): Write monitor vectors into memory using sim_write.
2557 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2558 (sim_read, sim_write): Simplify - transfer data one byte at a
2560 (load_memory, store_memory): Clarify meaning of parameter RAW.
2562 * sim-main.h (isHOST): Defete definition.
2563 (isTARGET): Mark as depreciated.
2564 (address_translation): Delete parameter HOST.
2566 * interp.c (address_translation): Delete parameter HOST.
2568 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2572 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2573 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2575 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2577 * mips.igen: Add model filter field to records.
2579 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2581 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2583 interp.c (sim_engine_run): Do not compile function sim_engine_run
2584 when WITH_IGEN == 1.
2586 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2587 target architecture.
2589 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2590 igen. Replace with configuration variables sim_igen_flags /
2593 * m16.igen: New file. Copy mips16 insns here.
2594 * mips.igen: From here.
2596 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2598 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2600 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2602 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2604 * gencode.c (build_instruction): Follow sim_write's lead in using
2605 BigEndianMem instead of !ByteSwapMem.
2607 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2609 * configure.in (sim_gen): Dependent on target, select type of
2610 generator. Always select old style generator.
2612 configure: Re-generate.
2614 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2616 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2617 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2618 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2619 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2620 SIM_@sim_gen@_*, set by autoconf.
2622 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2624 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2626 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2627 CURRENT_FLOATING_POINT instead.
2629 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2630 (address_translation): Raise exception InstructionFetch when
2631 translation fails and isINSTRUCTION.
2633 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2634 sim_engine_run): Change type of of vaddr and paddr to
2636 (address_translation, prefetch, load_memory, store_memory,
2637 cache_op): Change type of vAddr and pAddr to address_word.
2639 * gencode.c (build_instruction): Change type of vaddr and paddr to
2642 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2644 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2645 macro to obtain result of ALU op.
2647 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2649 * interp.c (sim_info): Call profile_print.
2651 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2653 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2655 * sim-main.h (WITH_PROFILE): Do not define, defined in
2656 common/sim-config.h. Use sim-profile module.
2657 (simPROFILE): Delete defintion.
2659 * interp.c (PROFILE): Delete definition.
2660 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2661 (sim_close): Delete code writing profile histogram.
2662 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2664 (sim_engine_run): Delete code profiling the PC.
2666 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2668 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2670 * interp.c (sim_monitor): Make register pointers of type
2673 * sim-main.h: Make registers of type unsigned_word not
2676 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2678 * interp.c (sync_operation): Rename from SyncOperation, make
2679 global, add SD argument.
2680 (prefetch): Rename from Prefetch, make global, add SD argument.
2681 (decode_coproc): Make global.
2683 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2685 * gencode.c (build_instruction): Generate DecodeCoproc not
2686 decode_coproc calls.
2688 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2689 (SizeFGR): Move to sim-main.h
2690 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2691 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2692 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2694 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2695 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2696 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2697 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2698 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2699 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2701 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2703 (sim-alu.h): Include.
2704 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2705 (sim_cia): Typedef to instruction_address.
2707 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2709 * Makefile.in (interp.o): Rename generated file engine.c to
2714 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2716 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2718 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2720 * gencode.c (build_instruction): For "FPSQRT", output correct
2721 number of arguments to Recip.
2723 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2725 * Makefile.in (interp.o): Depends on sim-main.h
2727 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2729 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2730 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2731 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2732 STATE, DSSTATE): Define
2733 (GPR, FGRIDX, ..): Define.
2735 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2736 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2737 (GPR, FGRIDX, ...): Delete macros.
2739 * interp.c: Update names to match defines from sim-main.h
2741 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2743 * interp.c (sim_monitor): Add SD argument.
2744 (sim_warning): Delete. Replace calls with calls to
2746 (sim_error): Delete. Replace calls with sim_io_error.
2747 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2748 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2749 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2751 (mips_size): Rename from sim_size. Add SD argument.
2753 * interp.c (simulator): Delete global variable.
2754 (callback): Delete global variable.
2755 (mips_option_handler, sim_open, sim_write, sim_read,
2756 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2757 sim_size,sim_monitor): Use sim_io_* not callback->*.
2758 (sim_open): ZALLOC simulator struct.
2759 (PROFILE): Do not define.
2761 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2763 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2764 support.h with corresponding code.
2766 * sim-main.h (word64, uword64), support.h: Move definition to
2768 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2771 * Makefile.in: Update dependencies
2772 * interp.c: Do not include.
2774 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2776 * interp.c (address_translation, load_memory, store_memory,
2777 cache_op): Rename to from AddressTranslation et.al., make global,
2780 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2783 * interp.c (SignalException): Rename to signal_exception, make
2786 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2788 * sim-main.h (SignalException, SignalExceptionInterrupt,
2789 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2790 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2791 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2794 * interp.c, support.h: Use.
2796 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2798 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2799 to value_fpr / store_fpr. Add SD argument.
2800 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2801 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2803 * sim-main.h (ValueFPR, StoreFPR): Define.
2805 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2807 * interp.c (sim_engine_run): Check consistency between configure
2808 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2811 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2812 (mips_fpu): Configure WITH_FLOATING_POINT.
2813 (mips_endian): Configure WITH_TARGET_ENDIAN.
2814 * configure: Update.
2816 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2818 * configure: Regenerated to track ../common/aclocal.m4 changes.
2820 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2822 * configure: Regenerated.
2824 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2826 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2828 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2830 * gencode.c (print_igen_insn_models): Assume certain architectures
2831 include all mips* instructions.
2832 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2835 * Makefile.in (tmp.igen): Add target. Generate igen input from
2838 * gencode.c (FEATURE_IGEN): Define.
2839 (main): Add --igen option. Generate output in igen format.
2840 (process_instructions): Format output according to igen option.
2841 (print_igen_insn_format): New function.
2842 (print_igen_insn_models): New function.
2843 (process_instructions): Only issue warnings and ignore
2844 instructions when no FEATURE_IGEN.
2846 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2848 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2851 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2853 * configure: Regenerated to track ../common/aclocal.m4 changes.
2855 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
2857 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2858 SIM_RESERVED_BITS): Delete, moved to common.
2859 (SIM_EXTRA_CFLAGS): Update.
2861 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2863 * configure.in: Configure non-strict memory alignment.
2864 * configure: Regenerated to track ../common/aclocal.m4 changes.
2866 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
2868 * configure: Regenerated to track ../common/aclocal.m4 changes.
2870 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
2872 * gencode.c (SDBBP,DERET): Added (3900) insns.
2873 (RFE): Turn on for 3900.
2874 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2875 (dsstate): Made global.
2876 (SUBTARGET_R3900): Added.
2877 (CANCELDELAYSLOT): New.
2878 (SignalException): Ignore SystemCall rather than ignore and
2879 terminate. Add DebugBreakPoint handling.
2880 (decode_coproc): New insns RFE, DERET; and new registers Debug
2881 and DEPC protected by SUBTARGET_R3900.
2882 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2884 * Makefile.in,configure.in: Add mips subtarget option.
2885 * configure: Update.
2887 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
2889 * gencode.c: Add r3900 (tx39).
2892 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
2894 * gencode.c (build_instruction): Don't need to subtract 4 for
2897 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
2899 * interp.c: Correct some HASFPU problems.
2901 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
2903 * configure: Regenerated to track ../common/aclocal.m4 changes.
2905 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * interp.c (mips_options): Fix samples option short form, should
2910 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
2912 * interp.c (sim_info): Enable info code. Was just returning.
2914 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2916 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2919 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
2921 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2923 (build_instruction): Ditto for LL.
2925 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
2927 * configure: Regenerated to track ../common/aclocal.m4 changes.
2929 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2931 * configure: Regenerated to track ../common/aclocal.m4 changes.
2934 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
2936 * interp.c (sim_open): Add call to sim_analyze_program, update
2939 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
2941 * interp.c (sim_kill): Delete.
2942 (sim_create_inferior): Add ABFD argument. Set PC from same.
2943 (sim_load): Move code initializing trap handlers from here.
2944 (sim_open): To here.
2945 (sim_load): Delete, use sim-hload.c.
2947 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2949 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2951 * configure: Regenerated to track ../common/aclocal.m4 changes.
2954 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2956 * interp.c (sim_open): Add ABFD argument.
2957 (sim_load): Move call to sim_config from here.
2958 (sim_open): To here. Check return status.
2960 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
2962 * gencode.c (build_instruction): Two arg MADD should
2963 not assign result to $0.
2965 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
2967 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2968 * sim/mips/configure.in: Regenerate.
2970 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
2972 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2973 signed8, unsigned8 et.al. types.
2975 * interp.c (SUB_REG_FETCH): Handle both little and big endian
2976 hosts when selecting subreg.
2978 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
2980 * interp.c (sim_engine_run): Reset the ZERO register to zero
2981 regardless of FEATURE_WARN_ZERO.
2982 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2984 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2986 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2987 (SignalException): For BreakPoints ignore any mode bits and just
2989 (SignalException): Always set the CAUSE register.
2991 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
2993 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2994 exception has been taken.
2996 * interp.c: Implement the ERET and mt/f sr instructions.
2998 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3000 * interp.c (SignalException): Don't bother restarting an
3003 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3005 * interp.c (SignalException): Really take an interrupt.
3006 (interrupt_event): Only deliver interrupts when enabled.
3008 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3010 * interp.c (sim_info): Only print info when verbose.
3011 (sim_info) Use sim_io_printf for output.
3013 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3015 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3018 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3020 * interp.c (sim_do_command): Check for common commands if a
3021 simulator specific command fails.
3023 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3025 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3026 and simBE when DEBUG is defined.
3028 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3030 * interp.c (interrupt_event): New function. Pass exception event
3031 onto exception handler.
3033 * configure.in: Check for stdlib.h.
3034 * configure: Regenerate.
3036 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3037 variable declaration.
3038 (build_instruction): Initialize memval1.
3039 (build_instruction): Add UNUSED attribute to byte, bigend,
3041 (build_operands): Ditto.
3043 * interp.c: Fix GCC warnings.
3044 (sim_get_quit_code): Delete.
3046 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3047 * Makefile.in: Ditto.
3048 * configure: Re-generate.
3050 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3052 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3054 * interp.c (mips_option_handler): New function parse argumes using
3056 (myname): Replace with STATE_MY_NAME.
3057 (sim_open): Delete check for host endianness - performed by
3059 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3060 (sim_open): Move much of the initialization from here.
3061 (sim_load): To here. After the image has been loaded and
3063 (sim_open): Move ColdReset from here.
3064 (sim_create_inferior): To here.
3065 (sim_open): Make FP check less dependant on host endianness.
3067 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3069 * interp.c (sim_set_callbacks): Delete.
3071 * interp.c (membank, membank_base, membank_size): Replace with
3072 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3073 (sim_open): Remove call to callback->init. gdb/run do this.
3077 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3079 * interp.c (big_endian_p): Delete, replaced by
3080 current_target_byte_order.
3082 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3084 * interp.c (host_read_long, host_read_word, host_swap_word,
3085 host_swap_long): Delete. Using common sim-endian.
3086 (sim_fetch_register, sim_store_register): Use H2T.
3087 (pipeline_ticks): Delete. Handled by sim-events.
3089 (sim_engine_run): Update.
3091 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3093 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3095 (SignalException): To here. Signal using sim_engine_halt.
3096 (sim_stop_reason): Delete, moved to common.
3098 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3100 * interp.c (sim_open): Add callback argument.
3101 (sim_set_callbacks): Delete SIM_DESC argument.
3104 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3106 * Makefile.in (SIM_OBJS): Add common modules.
3108 * interp.c (sim_set_callbacks): Also set SD callback.
3109 (set_endianness, xfer_*, swap_*): Delete.
3110 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3111 Change to functions using sim-endian macros.
3112 (control_c, sim_stop): Delete, use common version.
3113 (simulate): Convert into.
3114 (sim_engine_run): This function.
3115 (sim_resume): Delete.
3117 * interp.c (simulation): New variable - the simulator object.
3118 (sim_kind): Delete global - merged into simulation.
3119 (sim_load): Cleanup. Move PC assignment from here.
3120 (sim_create_inferior): To here.
3122 * sim-main.h: New file.
3123 * interp.c (sim-main.h): Include.
3125 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3127 * configure: Regenerated to track ../common/aclocal.m4 changes.
3129 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3131 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3133 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3135 * gencode.c (build_instruction): DIV instructions: check
3136 for division by zero and integer overflow before using
3137 host's division operation.
3139 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3141 * Makefile.in (SIM_OBJS): Add sim-load.o.
3142 * interp.c: #include bfd.h.
3143 (target_byte_order): Delete.
3144 (sim_kind, myname, big_endian_p): New static locals.
3145 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3146 after argument parsing. Recognize -E arg, set endianness accordingly.
3147 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3148 load file into simulator. Set PC from bfd.
3149 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3150 (set_endianness): Use big_endian_p instead of target_byte_order.
3152 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3154 * interp.c (sim_size): Delete prototype - conflicts with
3155 definition in remote-sim.h. Correct definition.
3157 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3159 * configure: Regenerated to track ../common/aclocal.m4 changes.
3162 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3164 * interp.c (sim_open): New arg `kind'.
3166 * configure: Regenerated to track ../common/aclocal.m4 changes.
3168 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3170 * configure: Regenerated to track ../common/aclocal.m4 changes.
3172 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3174 * interp.c (sim_open): Set optind to 0 before calling getopt.
3176 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3178 * configure: Regenerated to track ../common/aclocal.m4 changes.
3180 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3182 * interp.c : Replace uses of pr_addr with pr_uword64
3183 where the bit length is always 64 independent of SIM_ADDR.
3184 (pr_uword64) : added.
3186 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3188 * configure: Re-generate.
3190 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3192 * configure: Regenerate to track ../common/aclocal.m4 changes.
3194 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3196 * interp.c (sim_open): New SIM_DESC result. Argument is now
3198 (other sim_*): New SIM_DESC argument.
3200 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3202 * interp.c: Fix printing of addresses for non-64-bit targets.
3203 (pr_addr): Add function to print address based on size.
3205 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3207 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3209 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3211 * gencode.c (build_mips16_operands): Correct computation of base
3212 address for extended PC relative instruction.
3214 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3216 * interp.c (mips16_entry): Add support for floating point cases.
3217 (SignalException): Pass floating point cases to mips16_entry.
3218 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3220 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3222 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3223 and then set the state to fmt_uninterpreted.
3224 (COP_SW): Temporarily set the state to fmt_word while calling
3227 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3229 * gencode.c (build_instruction): The high order may be set in the
3230 comparison flags at any ISA level, not just ISA 4.
3232 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3234 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3235 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3236 * configure.in: sinclude ../common/aclocal.m4.
3237 * configure: Regenerated.
3239 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3241 * configure: Rebuild after change to aclocal.m4.
3243 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3245 * configure configure.in Makefile.in: Update to new configure
3246 scheme which is more compatible with WinGDB builds.
3247 * configure.in: Improve comment on how to run autoconf.
3248 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3249 * Makefile.in: Use autoconf substitution to install common
3252 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3254 * gencode.c (build_instruction): Use BigEndianCPU instead of
3257 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3259 * interp.c (sim_monitor): Make output to stdout visible in
3260 wingdb's I/O log window.
3262 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3264 * support.h: Undo previous change to SIGTRAP
3267 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3269 * interp.c (store_word, load_word): New static functions.
3270 (mips16_entry): New static function.
3271 (SignalException): Look for mips16 entry and exit instructions.
3272 (simulate): Use the correct index when setting fpr_state after
3273 doing a pending move.
3275 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3277 * interp.c: Fix byte-swapping code throughout to work on
3278 both little- and big-endian hosts.
3280 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3282 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3283 with gdb/config/i386/xm-windows.h.
3285 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3287 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3288 that messes up arithmetic shifts.
3290 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3292 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3293 SIGTRAP and SIGQUIT for _WIN32.
3295 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3297 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3298 force a 64 bit multiplication.
3299 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3300 destination register is 0, since that is the default mips16 nop
3303 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3305 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3306 (build_endian_shift): Don't check proc64.
3307 (build_instruction): Always set memval to uword64. Cast op2 to
3308 uword64 when shifting it left in memory instructions. Always use
3309 the same code for stores--don't special case proc64.
3311 * gencode.c (build_mips16_operands): Fix base PC value for PC
3313 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3315 * interp.c (simJALDELAYSLOT): Define.
3316 (JALDELAYSLOT): Define.
3317 (INDELAYSLOT, INJALDELAYSLOT): Define.
3318 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3320 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3322 * interp.c (sim_open): add flush_cache as a PMON routine
3323 (sim_monitor): handle flush_cache by ignoring it
3325 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3327 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3329 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3330 (BigEndianMem): Rename to ByteSwapMem and change sense.
3331 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3332 BigEndianMem references to !ByteSwapMem.
3333 (set_endianness): New function, with prototype.
3334 (sim_open): Call set_endianness.
3335 (sim_info): Use simBE instead of BigEndianMem.
3336 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3337 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3338 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3339 ifdefs, keeping the prototype declaration.
3340 (swap_word): Rewrite correctly.
3341 (ColdReset): Delete references to CONFIG. Delete endianness related
3342 code; moved to set_endianness.
3344 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3346 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3347 * interp.c (CHECKHILO): Define away.
3348 (simSIGINT): New macro.
3349 (membank_size): Increase from 1MB to 2MB.
3350 (control_c): New function.
3351 (sim_resume): Rename parameter signal to signal_number. Add local
3352 variable prev. Call signal before and after simulate.
3353 (sim_stop_reason): Add simSIGINT support.
3354 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3356 (sim_warning): Delete call to SignalException. Do call printf_filtered
3358 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3359 a call to sim_warning.
3361 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3363 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3364 16 bit instructions.
3366 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3368 Add support for mips16 (16 bit MIPS implementation):
3369 * gencode.c (inst_type): Add mips16 instruction encoding types.
3370 (GETDATASIZEINSN): Define.
3371 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3372 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3374 (MIPS16_DECODE): New table, for mips16 instructions.
3375 (bitmap_val): New static function.
3376 (struct mips16_op): Define.
3377 (mips16_op_table): New table, for mips16 operands.
3378 (build_mips16_operands): New static function.
3379 (process_instructions): If PC is odd, decode a mips16
3380 instruction. Break out instruction handling into new
3381 build_instruction function.
3382 (build_instruction): New static function, broken out of
3383 process_instructions. Check modifiers rather than flags for SHIFT
3384 bit count and m[ft]{hi,lo} direction.
3385 (usage): Pass program name to fprintf.
3386 (main): Remove unused variable this_option_optind. Change
3387 ``*loptarg++'' to ``loptarg++''.
3388 (my_strtoul): Parenthesize && within ||.
3389 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3390 (simulate): If PC is odd, fetch a 16 bit instruction, and
3391 increment PC by 2 rather than 4.
3392 * configure.in: Add case for mips16*-*-*.
3393 * configure: Rebuild.
3395 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3397 * interp.c: Allow -t to enable tracing in standalone simulator.
3398 Fix garbage output in trace file and error messages.
3400 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3402 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3403 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3404 * configure.in: Simplify using macros in ../common/aclocal.m4.
3405 * configure: Regenerated.
3406 * tconfig.in: New file.
3408 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3410 * interp.c: Fix bugs in 64-bit port.
3411 Use ansi function declarations for msvc compiler.
3412 Initialize and test file pointer in trace code.
3413 Prevent duplicate definition of LAST_EMED_REGNUM.
3415 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3417 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3419 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3421 * interp.c (SignalException): Check for explicit terminating
3423 * gencode.c: Pass instruction value through SignalException()
3424 calls for Trap, Breakpoint and Syscall.
3426 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3428 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3429 only used on those hosts that provide it.
3430 * configure.in: Add sqrt() to list of functions to be checked for.
3431 * config.in: Re-generated.
3432 * configure: Re-generated.
3434 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3436 * gencode.c (process_instructions): Call build_endian_shift when
3437 expanding STORE RIGHT, to fix swr.
3438 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3439 clear the high bits.
3440 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3441 Fix float to int conversions to produce signed values.
3443 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3445 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3446 (process_instructions): Correct handling of nor instruction.
3447 Correct shift count for 32 bit shift instructions. Correct sign
3448 extension for arithmetic shifts to not shift the number of bits in
3449 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3450 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3452 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3453 It's OK to have a mult follow a mult. What's not OK is to have a
3454 mult follow an mfhi.
3455 (Convert): Comment out incorrect rounding code.
3457 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3459 * interp.c (sim_monitor): Improved monitor printf
3460 simulation. Tidied up simulator warnings, and added "--log" option
3461 for directing warning message output.
3462 * gencode.c: Use sim_warning() rather than WARNING macro.
3464 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3466 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3467 getopt1.o, rather than on gencode.c. Link objects together.
3468 Don't link against -liberty.
3469 (gencode.o, getopt.o, getopt1.o): New targets.
3470 * gencode.c: Include <ctype.h> and "ansidecl.h".
3471 (AND): Undefine after including "ansidecl.h".
3472 (ULONG_MAX): Define if not defined.
3473 (OP_*): Don't define macros; now defined in opcode/mips.h.
3474 (main): Call my_strtoul rather than strtoul.
3475 (my_strtoul): New static function.
3477 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3479 * gencode.c (process_instructions): Generate word64 and uword64
3480 instead of `long long' and `unsigned long long' data types.
3481 * interp.c: #include sysdep.h to get signals, and define default
3483 * (Convert): Work around for Visual-C++ compiler bug with type
3485 * support.h: Make things compile under Visual-C++ by using
3486 __int64 instead of `long long'. Change many refs to long long
3487 into word64/uword64 typedefs.
3489 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3491 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3492 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3494 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3495 (AC_PROG_INSTALL): Added.
3496 (AC_PROG_CC): Moved to before configure.host call.
3497 * configure: Rebuilt.
3499 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3501 * configure.in: Define @SIMCONF@ depending on mips target.
3502 * configure: Rebuild.
3503 * Makefile.in (run): Add @SIMCONF@ to control simulator
3505 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3506 * interp.c: Remove some debugging, provide more detailed error
3507 messages, update memory accesses to use LOADDRMASK.
3509 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3511 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3512 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3514 * configure: Rebuild.
3515 * config.in: New file, generated by autoheader.
3516 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3517 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3518 HAVE_ANINT and HAVE_AINT, as appropriate.
3519 * Makefile.in (run): Use @LIBS@ rather than -lm.
3520 (interp.o): Depend upon config.h.
3521 (Makefile): Just rebuild Makefile.
3522 (clean): Remove stamp-h.
3523 (mostlyclean): Make the same as clean, not as distclean.
3524 (config.h, stamp-h): New targets.
3526 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3528 * interp.c (ColdReset): Fix boolean test. Make all simulator
3531 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3533 * interp.c (xfer_direct_word, xfer_direct_long,
3534 swap_direct_word, swap_direct_long, xfer_big_word,
3535 xfer_big_long, xfer_little_word, xfer_little_long,
3536 swap_word,swap_long): Added.
3537 * interp.c (ColdReset): Provide function indirection to
3538 host<->simulated_target transfer routines.
3539 * interp.c (sim_store_register, sim_fetch_register): Updated to
3540 make use of indirected transfer routines.
3542 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3544 * gencode.c (process_instructions): Ensure FP ABS instruction
3546 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3547 system call support.
3549 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3551 * interp.c (sim_do_command): Complain if callback structure not
3554 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3556 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3557 support for Sun hosts.
3558 * Makefile.in (gencode): Ensure the host compiler and libraries
3559 used for cross-hosted build.
3561 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3563 * interp.c, gencode.c: Some more (TODO) tidying.
3565 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3567 * gencode.c, interp.c: Replaced explicit long long references with
3568 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3569 * support.h (SET64LO, SET64HI): Macros added.
3571 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3573 * configure: Regenerate with autoconf 2.7.
3575 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3577 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3578 * support.h: Remove superfluous "1" from #if.
3579 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3581 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3583 * interp.c (StoreFPR): Control UndefinedResult() call on
3584 WARN_RESULT manifest.
3586 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3588 * gencode.c: Tidied instruction decoding, and added FP instruction
3591 * interp.c: Added dineroIII, and BSD profiling support. Also
3592 run-time FP handling.
3594 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3596 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3597 gencode.c, interp.c, support.h: created.
projects / deliverable / binutils-gdb.git / blob