sim/mips/ChangeLog

   1 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   2
   3         * interp.c (Max, Min): Comment out functions. Not yet used.
   4
   5 start-sanitize-vr4320
   6 Wed Mar 25 10:04:13 1998  Andrew Cagney  <cagney@b1.cygnus.com>
   7
   8         * vr4320.igen (DCLZ): Pacify GCC, 64 bit arg, int format.
   9
  10 end-sanitize-vr4320
  11 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  12
  13         * configure: Regenerated to track ../common/aclocal.m4 changes.
  14
  15 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
  16
  17         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
  18         configurable settings for stand-alone simulator.
  19
  20 start-sanitize-sky
  21         * configure.in: Added --with-sim-gpu2 option to specify path of
  22         sky GPU2 library.  Triggers -DSKY_GPU2 for sky-gpuif.c, and
  23         links/compiles stand-alone simulator with this library.
  24
  25         * interp.c (MEM_SIZE): Increased default sky memory size to 16MB.
  26 end-sanitize-sky
  27
  28         * configure.in: Added X11 search, just in case.
  29
  30         * configure: Regenerated.
  31
  32 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  33
  34         * interp.c (sim_write, sim_read, load_memory, store_memory):
  35         Replace sim_core_*_map with read_map, write_map, exec_map resp.
  36
  37 start-sanitize-vr4320
  38 Tue Mar 10 10:32:22 1998  Gavin Koch  <gavin@cygnus.com>
  39
  40         * vr4320.igen (clz,dclz) : Added.
  41         (dmac): Replaced 99, with LO.
  42
  43 end-sanitize-vr4320
  44 start-sanitize-vr5400
  45 Fri Mar  6 08:30:58 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  46
  47         * mdmx.igen (SHFL.REPA.fmt, SHFL.REPB.fmt): Fix bit fields.
  48
  49 end-sanitize-vr5400
  50 start-sanitize-vr4320
  51 Tue Mar  3 11:56:29 1998  Gavin Koch  <gavin@cygnus.com>
  52
  53         * vr4320.igen: New file.
  54         * Makefile.in (vr4320.igen) : Added.
  55         * configure.in (mips64vr4320-*-*): Added.
  56         * configure : Rebuilt.
  57         * mips.igen : Correct the bfd-names in the mips-ISA model entries.
  58         Add the vr4320 model entry and mark the vr4320 insn as necessary.
  59
  60 end-sanitize-vr4320
  61 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  62
  63         * sim-main.h (GETFCC): Return an unsigned value.
  64
  65 start-sanitize-r5900
  66         * r5900.igen: Use an unsigned array index variable `i'.
  67         (QFSRV): Ditto for variable bytes.
  68
  69 end-sanitize-r5900
  70 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  71
  72         * mips.igen (DIV): Fix check for -1 / MIN_INT.
  73         (DADD): Result destination is RD not RT.
  74
  75 start-sanitize-r5900
  76         * r5900.igen (DIV1): Fix check for -1 / MIN_INT.
  77         (DIVU1): Don't check for MIN_INT / -1 as performing unsigned
  78         divide.
  79
  80 end-sanitize-r5900
  81 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  82
  83         * sim-main.h (HIACCESS, LOACCESS): Always define.
  84
  85         * mdmx.igen (Maxi, Mini): Rename Max, Min.
  86
  87         * interp.c (sim_info): Delete.
  88
  89 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
  90
  91         * interp.c (DECLARE_OPTION_HANDLER): Use it.
  92         (mips_option_handler): New argument `cpu'.
  93         (sim_open): Update call to sim_add_option_table.
  94
  95 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
  96
  97         * mips.igen (CxC1): Add tracing.
  98
  99 start-sanitize-r5900
 100 Wed Feb 25 13:59:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 101
 102         * r5900.igen (StoreFP): Delete.
 103         (r59fp_store, r59fp_overflow, r59fp_op1, r59fp_op2, r59fp_op3):
 104         New functions.
 105         (rsqrt.s, sqrt.s): Implement.
 106         (r59cond): New function.
 107         (C.COND.S): Call r59cond in assembler line.
 108         (cvt.w.s, cvt.s.w): Implement.
 109
 110         * mips.igen (rsqrt.fmt, sqrt.fmt, cvt.*.*): Remove from r5900
 111         instruction set.
 112
 113         * sim-main.h: Define an enum of r5900 FCSR bit fields.
 114
 115 end-sanitize-r5900
 116 start-sanitize-r5900
 117 Tue Feb 24 14:44:18 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 118
 119         * r5900.igen: Add tracing to all p* instructions.
 120
 121 Tue Feb 24 02:47:33 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 122
 123         * interp.c (sim_store_register, sim_fetch_register): Pull swifty
 124         to get gdb talking to re-aranged sim_cpu register structure.
 125
 126 end-sanitize-r5900
 127 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 128
 129         * sim-main.h (Max, Min): Declare.
 130
 131         * interp.c (Max, Min): New functions.
 132
 133         * mips.igen (BC1): Add tracing.
 134
 135 start-sanitize-vr5400
 136 Fri Feb 20 16:27:17 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 137
 138         * mdmx.igen: Tag all functions as requiring either with mdmx or
 139         vr5400 processor.
 140
 141 end-sanitize-vr5400
 142 start-sanitize-r5900
 143 Fri Feb 20 15:55:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 144
 145         * configure.in (SIM_AC_OPTION_FLOAT): For r5900, set FP bit size
 146         to 32.
 147         (SIM_AC_OPTION_BITSIZE): For r5900, set nr address bits to 32.
 148
 149         * mips.igen (C.cond.fmt, ..): Not part of r5900 insn set.
 150
 151         * r5900.igen: Rewrite.
 152
 153         * sim-main.h: Move r5900 registers to a separate _sim_r5900_cpu
 154         struct.
 155         (GPR_SB, GPR_SH, GPR_SW, GPR_SD, GPR_UB, GPR_UH, GPR_UW, GPR_UD):
 156         Define in terms of GPR/GPR1 instead of REGISTERS/REGISTERS.1
 157
 158 end-sanitize-r5900
 159 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
 160
 161         * interp.c Added memory map for stack in vr4100
 162
 163 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
 164
 165         * interp.c (load_memory): Add missing "break"'s.
 166
 167 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 168
 169         * interp.c (sim_store_register, sim_fetch_register): Pass in
 170         length parameter.  Return -1.
 171
 172 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
 173
 174         * interp.c: Added hardware init hook, fixed warnings.
 175
 176 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 177
 178         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
 179
 180 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 181
 182         * interp.c (ifetch16): New function.
 183
 184         * sim-main.h (IMEM32): Rename IMEM.
 185         (IMEM16_IMMED): Define.
 186         (IMEM16): Define.
 187         (DELAY_SLOT): Update.
 188
 189         * m16run.c (sim_engine_run): New file.
 190
 191         * m16.igen: All instructions except LB.
 192         (LB): Call do_load_byte.
 193         * mips.igen (do_load_byte): New function.
 194         (LB): Call do_load_byte.
 195
 196         * mips.igen: Move spec for insn bit size and high bit from here.
 197         * Makefile.in (tmp-igen, tmp-m16): To here.
 198
 199         * m16.dc: New file, decode mips16 instructions.
 200
 201         * Makefile.in (SIM_NO_ALL): Define.
 202         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
 203
 204 start-sanitize-tx19
 205         * m16.igen: Mark all mips16 insns as being part of the tx19 insn
 206         set.
 207
 208 end-sanitize-tx19
 209 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 210
 211         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
 212         point unit to 32 bit registers.
 213         * configure: Re-generate.
 214
 215 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 216
 217         * configure.in (sim_use_gen): Make IGEN the default simulator
 218         generator for generic 32 and 64 bit mips targets.
 219         * configure: Re-generate.
 220
 221 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 222
 223         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
 224         bitsize.
 225
 226         * interp.c (sim_fetch_register, sim_store_register): Read/write
 227         FGR from correct location.
 228         (sim_open): Set size of FGR's according to
 229         WITH_TARGET_FLOATING_POINT_BITSIZE.
 230
 231         * sim-main.h (FGR): Store floating point registers in a separate
 232         array.
 233
 234 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 235
 236         * configure: Regenerated to track ../common/aclocal.m4 changes.
 237
 238 start-sanitize-vr5400
 239         * mdmx.igen: Mark all instructions as 64bit/fp specific.
 240
 241 end-sanitize-vr5400
 242 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 243
 244         * interp.c (ColdReset): Call PENDING_INVALIDATE.
 245
 246         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
 247
 248         * interp.c (pending_tick): New function.  Deliver pending writes.
 249
 250         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
 251         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
 252         it can handle mixed sized quantites and single bits.
 253
 254 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 255
 256         * interp.c (oengine.h): Do not include when building with IGEN.
 257         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
 258         (sim_info): Ditto for PROCESSOR_64BIT.
 259         (sim_monitor): Replace ut_reg with unsigned_word.
 260         (*): Ditto for t_reg.
 261         (LOADDRMASK): Define.
 262         (sim_open): Remove defunct check that host FP is IEEE compliant,
 263         using software to emulate floating point.
 264         (value_fpr, ...): Always compile, was conditional on HASFPU.
 265
 266 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 267
 268         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
 269         size.
 270
 271         * interp.c (SD, CPU): Define.
 272         (mips_option_handler): Set flags in each CPU.
 273         (interrupt_event): Assume CPU 0 is the one being iterrupted.
 274         (sim_close): Do not clear STATE, deleted anyway.
 275         (sim_write, sim_read): Assume CPU zero's vm should be used for
 276         data transfers.
 277         (sim_create_inferior): Set the PC for all processors.
 278         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
 279         argument.
 280         (mips16_entry): Pass correct nr of args to store_word, load_word.
 281         (ColdReset): Cold reset all cpu's.
 282         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
 283         (sim_monitor, load_memory, store_memory, signal_exception): Use
 284         `CPU' instead of STATE_CPU.
 285
 286
 287         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
 288         SD or CPU_.
 289
 290         * sim-main.h (signal_exception): Add sim_cpu arg.
 291         (SignalException*): Pass both SD and CPU to signal_exception.
 292         * interp.c (signal_exception): Update.
 293
 294         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
 295         Ditto
 296         (sync_operation, prefetch, cache_op, store_memory, load_memory,
 297         address_translation): Ditto
 298         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
 299
 300 start-sanitize-vr5400
 301         * mdmx.igen (get_scale): Pass CPU_ to semantic_illegal instead of
 302         `sd'.
 303         (ByteAlign): Use StoreFPR, pass args in correct order.
 304
 305 end-sanitize-vr5400
 306 start-sanitize-r5900
 307 Sun Feb  1 10:59:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 308
 309         * configure.in (sim_igen_filter): For r5900, configure as SMP.
 310
 311 end-sanitize-r5900
 312 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 313
 314         * configure: Regenerated to track ../common/aclocal.m4 changes.
 315
 316 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 317
 318 start-sanitize-r5900
 319         * configure.in (sim_igen_filter): For r5900, use igen.
 320         * configure: Re-generate.
 321
 322 end-sanitize-r5900
 323         * interp.c (sim_engine_run): Add `nr_cpus' argument.
 324
 325         * mips.igen (model): Map processor names onto BFD name.
 326
 327         * sim-main.h (CPU_CIA): Delete.
 328         (SET_CIA, GET_CIA): Define
 329
 330 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 331
 332         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
 333         regiser.
 334
 335         * configure.in (default_endian): Configure a big-endian simulator
 336         by default.
 337         * configure: Re-generate.
 338
 339 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
 340
 341         * configure: Regenerated to track ../common/aclocal.m4 changes.
 342
 343 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
 344
 345         * interp.c (sim_monitor): Handle Densan monitor outbyte
 346         and inbyte functions.
 347
 348 1997-12-29  Felix Lee  <flee@cygnus.com>
 349
 350         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
 351
 352 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
 353
 354         * Makefile.in (tmp-igen): Arrange for $zero to always be
 355         reset to zero after every instruction.
 356
 357 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 358
 359         * configure: Regenerated to track ../common/aclocal.m4 changes.
 360         * config.in: Ditto.
 361
 362 start-sanitize-vr5400
 363 Sat Dec 13 15:18:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 364
 365         * vr5400.igen (Low32Bits, High32Bits): Sign extend extracted 32
 366         bit values.
 367
 368 end-sanitize-vr5400
 369 start-sanitize-vr5400
 370 Fri Dec 12 12:26:07 1997  Jeffrey A Law  (law@cygnus.com)
 371
 372         * configure.in (sim_igen_filter): Multi-sim vr5000 - vr5000 or
 373         vr5400 with the vr5000 as the default.
 374
 375 end-sanitize-vr5400
 376 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
 377
 378         * mips.igen (MSUB): Fix to work like MADD.
 379         * gencode.c (MSUB): Similarly.
 380
 381 start-sanitize-vr5400
 382 Tue Dec  9 12:02:12 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 383
 384         * configure.in (sim_igen_filter): Multi-sim vr5400 - vr5000 or
 385         vr5400.
 386
 387 end-sanitize-vr5400
 388 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
 389
 390         * configure: Regenerated to track ../common/aclocal.m4 changes.
 391
 392 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 393
 394         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
 395
 396 start-sanitize-vr5400
 397         * mdmx.igen (value_vr): Correct sim_io_eprintf format argument.
 398         (value_cc, store_cc): Implement.
 399
 400         * sim-main.h: Add 8*3*8 bit accumulator.
 401
 402         * vr5400.igen: Move mdmx instructins from here
 403         * mdmx.igen: To here - new file. Add/fix missing instructions.
 404         * mips.igen: Include mdmx.igen.
 405         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 406
 407 end-sanitize-vr5400
 408 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 409
 410         * sim-main.h (sim-fpu.h): Include.
 411
 412         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
 413         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
 414         using host independant sim_fpu module.
 415
 416 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 417
 418         * interp.c (signal_exception): Report internal errors with SIGABRT
 419         not SIGQUIT.
 420
 421         * sim-main.h (C0_CONFIG): New register.
 422         (signal.h): No longer include.
 423
 424         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
 425
 426 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
 427
 428         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
 429
 430 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 431
 432         * mips.igen: Tag vr5000 instructions.
 433         (ANDI): Was missing mipsIV model, fix assembler syntax.
 434         (do_c_cond_fmt): New function.
 435         (C.cond.fmt): Handle mips I-III which do not support CC field
 436         separatly.
 437         (bc1): Handle mips IV which do not have a delaed FCC separatly.
 438         (SDR): Mask paddr when BigEndianMem, not the converse as specified
 439         in IV3.2 spec.
 440         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
 441         vr5000 which saves LO in a GPR separatly.
 442
 443         * configure.in (enable-sim-igen): For vr5000, select vr5000
 444         specific instructions.
 445         * configure: Re-generate.
 446
 447 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 448
 449         * Makefile.in (SIM_OBJS): Add sim-fpu module.
 450
 451         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
 452         fmt_uninterpreted_64 bit cases to switch.  Convert to
 453         fmt_formatted,
 454
 455         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
 456
 457         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
 458         as specified in IV3.2 spec.
 459         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
 460
 461 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 462
 463         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
 464         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
 465         (start-sanitize-r5900):
 466         (LWXC1, SWXC1): Delete from r5900 instruction set.
 467         (end-sanitize-r5900):
 468         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
 469         PENDING_FILL versions of instructions.  Simplify.
 470         (X): New function.
 471         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
 472         instructions.
 473         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
 474         a signed value.
 475         (MTHI, MFHI): Disable code checking HI-LO.
 476
 477         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
 478         global.
 479         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
 480
 481 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 482
 483         * gencode.c (build_mips16_operands): Replace IPC with cia.
 484
 485         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
 486         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
 487         IPC to `cia'.
 488         (UndefinedResult): Replace function with macro/function
 489         combination.
 490         (sim_engine_run): Don't save PC in IPC.
 491
 492         * sim-main.h (IPC): Delete.
 493
 494         start-sanitize-vr5400
 495         * vr5400.igen (vr): Add missing cia argument to value_fpr.
 496         (do_select): Rename function select.
 497         end-sanitize-vr5400
 498
 499         * interp.c (signal_exception, store_word, load_word,
 500         address_translation, load_memory, store_memory, cache_op,
 501         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
 502         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
 503         current instruction address - cia - argument.
 504         (sim_read, sim_write): Call address_translation directly.
 505         (sim_engine_run): Rename variable vaddr to cia.
 506         (signal_exception): Pass cia to sim_monitor
 507
 508         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
 509         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
 510         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
 511
 512         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
 513         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
 514         SIM_ASSERT.
 515
 516         * interp.c (signal_exception): Pass restart address to
 517         sim_engine_restart.
 518
 519         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
 520         idecode.o): Add dependency.
 521
 522         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
 523         Delete definitions
 524         (DELAY_SLOT): Update NIA not PC with branch address.
 525         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
 526
 527         * mips.igen: Use CIA not PC in branch calculations.
 528         (illegal): Call SignalException.
 529         (BEQ, ADDIU): Fix assembler.
 530
 531 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 532
 533         * m16.igen (JALX): Was missing.
 534
 535         * configure.in (enable-sim-igen): New configuration option.
 536         * configure: Re-generate.
 537
 538         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
 539
 540         * interp.c (load_memory, store_memory): Delete parameter RAW.
 541         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
 542         bypassing {load,store}_memory.
 543
 544         * sim-main.h (ByteSwapMem): Delete definition.
 545
 546         * Makefile.in (SIM_OBJS): Add sim-memopt module.
 547
 548         * interp.c (sim_do_command, sim_commands): Delete mips specific
 549         commands.  Handled by module sim-options.
 550
 551         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
 552         (WITH_MODULO_MEMORY): Define.
 553
 554         * interp.c (sim_info): Delete code printing memory size.
 555
 556         * interp.c (mips_size): Nee sim_size, delete function.
 557         (power2): Delete.
 558         (monitor, monitor_base, monitor_size): Delete global variables.
 559         (sim_open, sim_close): Delete code creating monitor and other
 560         memory regions.  Use sim-memopts module, via sim_do_commandf, to
 561         manage memory regions.
 562         (load_memory, store_memory): Use sim-core for memory model.
 563
 564         * interp.c (address_translation): Delete all memory map code
 565         except line forcing 32 bit addresses.
 566
 567 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 568
 569         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
 570         trace options.
 571
 572         * interp.c (logfh, logfile): Delete globals.
 573         (sim_open, sim_close): Delete code opening & closing log file.
 574         (mips_option_handler): Delete -l and -n options.
 575         (OPTION mips_options): Ditto.
 576
 577         * interp.c (OPTION mips_options): Rename option trace to dinero.
 578         (mips_option_handler): Update.
 579
 580 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 581
 582         * interp.c (fetch_str): New function.
 583         (sim_monitor): Rewrite using sim_read & sim_write.
 584         (sim_open): Check magic number.
 585         (sim_open): Write monitor vectors into memory using sim_write.
 586         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
 587         (sim_read, sim_write): Simplify - transfer data one byte at a
 588         time.
 589         (load_memory, store_memory): Clarify meaning of parameter RAW.
 590
 591         * sim-main.h (isHOST): Defete definition.
 592         (isTARGET): Mark as depreciated.
 593         (address_translation): Delete parameter HOST.
 594
 595         * interp.c (address_translation): Delete parameter HOST.
 596
 597 start-sanitize-tx49
 598 Wed Oct 29 14:21:32 1997  Gavin Koch  <gavin@cygnus.com>
 599
 600         * gencode.c: Add tx49 configury and insns.
 601         * configure.in: Add tx49 configury.
 602         * configure: Update.
 603
 604 end-sanitize-tx49
 605 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 606
 607         * mips.igen:
 608
 609         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
 610         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
 611
 612 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 613
 614         * mips.igen: Add model filter field to records.
 615
 616 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 617
 618         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
 619
 620         interp.c (sim_engine_run): Do not compile function sim_engine_run
 621         when WITH_IGEN == 1.
 622
 623         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
 624         target architecture.
 625
 626         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
 627         igen. Replace with configuration variables sim_igen_flags /
 628         sim_m16_flags.
 629
 630         start-sanitize-r5900
 631         * r5900.igen: New file. Copy r5900 insns here.
 632         end-sanitize-r5900
 633         start-sanitize-vr5400
 634         * vr5400.igen: New file.
 635         end-sanitize-vr5400
 636         * m16.igen: New file.  Copy mips16 insns here.
 637         * mips.igen: From here.
 638
 639 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 640
 641         start-sanitize-vr5400
 642         * mips.igen: Tag all mipsIV instructions with vr5400 model.
 643
 644         * configure.in: Add mips64vr5400 target.
 645         * configure: Re-generate.
 646
 647         end-sanitize-vr5400
 648         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
 649         to top.
 650         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
 651
 652 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
 653
 654         * gencode.c (build_instruction): Follow sim_write's lead in using
 655         BigEndianMem instead of !ByteSwapMem.
 656
 657 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 658
 659         * configure.in (sim_gen): Dependent on target, select type of
 660         generator.  Always select old style generator.
 661
 662         configure: Re-generate.
 663
 664         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
 665         targets.
 666         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
 667         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
 668         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
 669         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
 670         SIM_@sim_gen@_*, set by autoconf.
 671
 672 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 673
 674         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
 675
 676         * interp.c (ColdReset): Remove #ifdef HASFPU, check
 677         CURRENT_FLOATING_POINT instead.
 678
 679         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
 680         (address_translation): Raise exception InstructionFetch when
 681         translation fails and isINSTRUCTION.
 682
 683         * interp.c (sim_open, sim_write, sim_monitor, store_word,
 684         sim_engine_run): Change type of of vaddr and paddr to
 685         address_word.
 686         (address_translation, prefetch, load_memory, store_memory,
 687         cache_op): Change type of vAddr and pAddr to address_word.
 688
 689         * gencode.c (build_instruction): Change type of vaddr and paddr to
 690         address_word.
 691
 692 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 693
 694         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
 695         macro to obtain result of ALU op.
 696
 697 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 698
 699         * interp.c (sim_info): Call profile_print.
 700
 701 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 702
 703         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
 704
 705         * sim-main.h (WITH_PROFILE): Do not define, defined in
 706         common/sim-config.h.  Use sim-profile module.
 707         (simPROFILE): Delete defintion.
 708
 709         * interp.c (PROFILE): Delete definition.
 710         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
 711         (sim_close): Delete code writing profile histogram.
 712         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
 713         Delete.
 714         (sim_engine_run): Delete code profiling the PC.
 715
 716 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 717
 718         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
 719
 720         * interp.c (sim_monitor): Make register pointers of type
 721         unsigned_word*.
 722
 723         * sim-main.h: Make registers of type unsigned_word not
 724         signed_word.
 725
 726 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 727
 728 start-sanitize-r5900
 729         * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
 730         ...): Move to sim-main.h
 731
 732 end-sanitize-r5900
 733         * interp.c (sync_operation): Rename from SyncOperation, make
 734         global, add SD argument.
 735         (prefetch): Rename from Prefetch, make global, add SD argument.
 736         (decode_coproc): Make global.
 737
 738         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
 739
 740         * gencode.c (build_instruction): Generate DecodeCoproc not
 741         decode_coproc calls.
 742
 743         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
 744         (SizeFGR): Move to sim-main.h
 745         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
 746         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
 747         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
 748         sim-main.h.
 749         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
 750         FP_RM_TOMINF, GETRM): Move to sim-main.h.
 751         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 752         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
 753         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
 754         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
 755
 756         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
 757         exception.
 758         (sim-alu.h): Include.
 759         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
 760         (sim_cia): Typedef to instruction_address.
 761
 762 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 763
 764         * Makefile.in (interp.o): Rename generated file engine.c to
 765         oengine.c.
 766
 767         * interp.c: Update.
 768
 769 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 770
 771         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
 772
 773 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 774
 775         * gencode.c (build_instruction): For "FPSQRT", output correct
 776         number of arguments to Recip.
 777
 778 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 779
 780         * Makefile.in (interp.o): Depends on sim-main.h
 781
 782         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
 783
 784         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
 785         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
 786         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
 787         STATE, DSSTATE): Define
 788         (GPR, FGRIDX, ..): Define.
 789
 790         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
 791         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
 792         (GPR, FGRIDX, ...): Delete macros.
 793
 794         * interp.c: Update names to match defines from sim-main.h
 795
 796 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 797
 798         * interp.c (sim_monitor): Add SD argument.
 799         (sim_warning): Delete.  Replace calls with calls to
 800         sim_io_eprintf.
 801         (sim_error): Delete. Replace calls with sim_io_error.
 802         (open_trace, writeout32, writeout16, getnum): Add SD argument.
 803         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
 804         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
 805         argument.
 806         (mips_size): Rename from sim_size. Add SD argument.
 807
 808         * interp.c (simulator): Delete global variable.
 809         (callback): Delete global variable.
 810         (mips_option_handler, sim_open, sim_write, sim_read,
 811         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
 812         sim_size,sim_monitor): Use sim_io_* not callback->*.
 813         (sim_open): ZALLOC simulator struct.
 814         (PROFILE): Do not define.
 815
 816 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 817
 818         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
 819         support.h with corresponding code.
 820
 821         * sim-main.h (word64, uword64), support.h: Move definition to
 822         sim-main.h.
 823         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
 824
 825         * support.h: Delete
 826         * Makefile.in: Update dependencies
 827         * interp.c: Do not include.
 828
 829 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 830
 831         * interp.c (address_translation, load_memory, store_memory,
 832         cache_op): Rename to from AddressTranslation et.al., make global,
 833         add SD argument
 834
 835         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
 836         CacheOp): Define.
 837
 838         * interp.c (SignalException): Rename to signal_exception, make
 839         global.
 840
 841         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
 842
 843         * sim-main.h (SignalException, SignalExceptionInterrupt,
 844         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
 845         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
 846         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
 847         Define.
 848
 849         * interp.c, support.h: Use.
 850
 851 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 852
 853         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
 854         to value_fpr / store_fpr. Add SD argument.
 855         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
 856         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
 857
 858         * sim-main.h (ValueFPR, StoreFPR): Define.
 859
 860 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 861
 862         * interp.c (sim_engine_run): Check consistency between configure
 863         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
 864         and HASFPU.
 865
 866         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
 867         (mips_fpu): Configure WITH_FLOATING_POINT.
 868         (mips_endian): Configure WITH_TARGET_ENDIAN.
 869         * configure: Update.
 870
 871 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 872
 873         * configure: Regenerated to track ../common/aclocal.m4 changes.
 874
 875 start-sanitize-r5900
 876 Mon Aug 25 19:11:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 877
 878         * interp.c (MAX_REG): Allow up-to 128 registers.
 879         (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
 880         (REGISTER_SA): Ditto.
 881         (sim_open): Initialize register_widths for r5900 specific
 882         registers.
 883         (sim_fetch_register, sim_store_register): Check for request of
 884         r5900 specific SA register.  Check for request for hi 64 bits of
 885         r5900 specific registers.
 886
 887 end-sanitize-r5900
 888 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
 889
 890         * configure: Regenerated.
 891
 892 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
 893
 894         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
 895
 896 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 897
 898         * gencode.c (print_igen_insn_models): Assume certain architectures
 899         include all mips* instructions.
 900         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
 901         instruction.
 902
 903         * Makefile.in (tmp.igen): Add target. Generate igen input from
 904         gencode file.
 905
 906         * gencode.c (FEATURE_IGEN): Define.
 907         (main): Add --igen option.  Generate output in igen format.
 908         (process_instructions): Format output according to igen option.
 909         (print_igen_insn_format): New function.
 910         (print_igen_insn_models): New function.
 911         (process_instructions): Only issue warnings and ignore
 912         instructions when no FEATURE_IGEN.
 913
 914 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 915
 916         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
 917         MIPS targets.
 918
 919 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 920
 921         * configure: Regenerated to track ../common/aclocal.m4 changes.
 922
 923 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 924
 925         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
 926         SIM_RESERVED_BITS): Delete, moved to common.
 927         (SIM_EXTRA_CFLAGS): Update.
 928
 929 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 930
 931         * configure.in: Configure non-strict memory alignment.
 932         * configure: Regenerated to track ../common/aclocal.m4 changes.
 933
 934 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 935
 936         * configure: Regenerated to track ../common/aclocal.m4 changes.
 937
 938 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
 939
 940         * gencode.c (SDBBP,DERET): Added (3900) insns.
 941         (RFE): Turn on for 3900.
 942         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
 943         (dsstate): Made global.
 944         (SUBTARGET_R3900): Added.
 945         (CANCELDELAYSLOT): New.
 946         (SignalException): Ignore SystemCall rather than ignore and
 947         terminate.  Add DebugBreakPoint handling.
 948         (decode_coproc): New insns RFE, DERET; and new registers Debug
 949         and DEPC protected by SUBTARGET_R3900.
 950         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
 951         bits explicitly.
 952         * Makefile.in,configure.in: Add mips subtarget option.
 953         * configure: Update.
 954
 955 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
 956
 957         * gencode.c: Add r3900 (tx39).
 958
 959 start-sanitize-tx19
 960         * gencode.c: Fix some configuration problems by improving
 961         the relationship between tx19 and tx39.
 962 end-sanitize-tx19
 963
 964 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
 965
 966         * gencode.c (build_instruction): Don't need to subtract 4 for
 967         JALR, just 2.
 968
 969 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
 970
 971         * interp.c: Correct some HASFPU problems.
 972
 973 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 974
 975         * configure: Regenerated to track ../common/aclocal.m4 changes.
 976
 977 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 978
 979         * interp.c (mips_options): Fix samples option short form, should
 980         be `x'.
 981
 982 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 983
 984         * interp.c (sim_info): Enable info code.  Was just returning.
 985
 986 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 987
 988         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
 989         MFC0.
 990
 991 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
 992
 993         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
 994         constants.
 995         (build_instruction): Ditto for LL.
 996
 997 start-sanitize-tx19
 998 Sun Sep  7 16:05:46 1997  Gavin Koch  <gavin@cygnus.com>
 999
1000         * mips/configure.in, mips/gencode: Add tx19/r1900.
1001
1002 end-sanitize-tx19
1003 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1004
1005         * configure: Regenerated to track ../common/aclocal.m4 changes.
1006
1007 start-sanitize-r5900
1008 Mon Sep  1 18:43:30 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1009
1010         * gencode.c (build_instruction): For "pabsw" and "pabsh", check
1011         for overflow due to ABS of MININT, set result to MAXINT.
1012         (build_instruction): For "psrlvw", signextend bit 31.
1013
1014 end-sanitize-r5900
1015 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1016
1017         * configure: Regenerated to track ../common/aclocal.m4 changes.
1018         * config.in: Ditto.
1019
1020 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1021
1022         * interp.c (sim_open): Add call to sim_analyze_program, update
1023         call to sim_config.
1024
1025 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1026
1027         * interp.c (sim_kill): Delete.
1028         (sim_create_inferior): Add ABFD argument. Set PC from same.
1029         (sim_load): Move code initializing trap handlers from here.
1030         (sim_open): To here.
1031         (sim_load): Delete, use sim-hload.c.
1032
1033         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1034
1035 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1036
1037         * configure: Regenerated to track ../common/aclocal.m4 changes.
1038         * config.in: Ditto.
1039
1040 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1041
1042         * interp.c (sim_open): Add ABFD argument.
1043         (sim_load): Move call to sim_config from here.
1044         (sim_open): To here.  Check return status.
1045
1046 start-sanitize-r5900
1047         * gencode.c (build_instruction): Do not define x8000000000000000,
1048         x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
1049
1050 end-sanitize-r5900
1051 start-sanitize-r5900
1052 Mon Jul 28 19:49:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1053
1054         * gencode.c (build_instruction): For "pdivw", "pdivbw" and
1055         "pdivuw" check for overflow due to signed divide by -1.
1056
1057 end-sanitize-r5900
1058 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1059
1060         * gencode.c (build_instruction): Two arg MADD should
1061         not assign result to $0.
1062
1063 start-sanitize-r5900
1064 Thu Jul 10 11:58:48 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1065
1066         * gencode.c (build_instruction): For "ppac5" use unsigned
1067         arrithmetic so that the sign bit doesn't smear when right shifted.
1068         (build_instruction): For "pdiv" perform sign extension when
1069         storing results in HI and LO.
1070         (build_instructions): For "pdiv" and "pdivbw" check for
1071         divide-by-zero.
1072         (build_instruction): For "pmfhl.slw" update hi part of dest
1073         register as well as low part.
1074         (build_instruction): For "pmfhl" portably handle long long values.
1075         (build_instruction): For "pmfhl.sh" correctly negative values.
1076         Store half words 2 and three in the correct place.
1077         (build_instruction): For "psllvw", sign extend value after shift.
1078
1079 end-sanitize-r5900
1080 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1081
1082         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1083         * sim/mips/configure.in: Regenerate.
1084
1085 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1086
1087         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1088         signed8, unsigned8 et.al. types.
1089
1090 start-sanitize-r5900
1091         * gencode.c (build_instruction): For PMULTU* do not sign extend
1092         registers.  Make generated code easier to debug.
1093
1094 end-sanitize-r5900
1095         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1096         hosts when selecting subreg.
1097
1098 start-sanitize-r5900
1099 Tue Jul  8 18:07:20 1997  Andrew Cagney  <cagney@andros.cygnus.com>
1100
1101         * gencode.c (type_for_data_len): For 32bit operations concerned
1102         with overflow, perform op using 64bits.
1103         (build_instruction): For PADD, always compute operation using type
1104         returned by type_for_data_len.
1105         (build_instruction): For PSUBU, when overflow, saturate to zero as
1106         actually underflow.
1107
1108 end-sanitize-r5900
1109 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1110
1111 start-sanitize-r5900
1112         * gencode.c (build_instruction): Handle "pext5" according to
1113         version 1.95 of the r5900 ISA.
1114
1115         * gencode.c (build_instruction): Handle "ppac5" according to
1116         version 1.95 of the r5900 ISA.
1117
1118 end-sanitize-r5900
1119         * interp.c (sim_engine_run): Reset the ZERO register to zero
1120         regardless of FEATURE_WARN_ZERO.
1121         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1122
1123 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1124
1125         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1126         (SignalException): For BreakPoints ignore any mode bits and just
1127         save the PC.
1128         (SignalException): Always set the CAUSE register.
1129
1130 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1131
1132         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1133         exception has been taken.
1134
1135         * interp.c: Implement the ERET and mt/f sr instructions.
1136
1137 start-sanitize-r5900
1138 Mon Jun  2 23:28:19 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1139
1140         * gencode.c (build_instruction): For paddu, extract unsigned
1141         sub-fields.
1142
1143         * gencode.c (build_instruction): Saturate padds instead of padd
1144         instructions.
1145
1146 end-sanitize-r5900
1147 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1148
1149         * interp.c (SignalException): Don't bother restarting an
1150         interrupt.
1151
1152 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1153
1154         * interp.c (SignalException): Really take an interrupt.
1155         (interrupt_event): Only deliver interrupts when enabled.
1156
1157 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1158
1159         * interp.c (sim_info): Only print info when verbose.
1160         (sim_info) Use sim_io_printf for output.
1161
1162 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1163
1164         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1165         mips architectures.
1166
1167 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1168
1169         * interp.c (sim_do_command): Check for common commands if a
1170         simulator specific command fails.
1171
1172 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1173
1174         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1175         and simBE when DEBUG is defined.
1176
1177 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1178
1179         * interp.c (interrupt_event): New function.  Pass exception event
1180         onto exception handler.
1181
1182         * configure.in: Check for stdlib.h.
1183         * configure: Regenerate.
1184
1185         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1186         variable declaration.
1187         (build_instruction): Initialize memval1.
1188         (build_instruction): Add UNUSED attribute to byte, bigend,
1189         reverse.
1190         (build_operands): Ditto.
1191
1192         * interp.c: Fix GCC warnings.
1193         (sim_get_quit_code): Delete.
1194
1195         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1196         * Makefile.in: Ditto.
1197         * configure: Re-generate.
1198
1199         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1200
1201 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1202
1203         * interp.c (mips_option_handler): New function parse argumes using
1204         sim-options.
1205         (myname): Replace with STATE_MY_NAME.
1206         (sim_open): Delete check for host endianness - performed by
1207         sim_config.
1208         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1209         (sim_open): Move much of the initialization from here.
1210         (sim_load): To here.  After the image has been loaded and
1211         endianness set.
1212         (sim_open): Move ColdReset from here.
1213         (sim_create_inferior): To here.
1214         (sim_open): Make FP check less dependant on host endianness.
1215
1216         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1217         run.
1218         * interp.c (sim_set_callbacks): Delete.
1219
1220         * interp.c (membank, membank_base, membank_size): Replace with
1221         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1222         (sim_open): Remove call to callback->init. gdb/run do this.
1223
1224         * interp.c: Update
1225
1226         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1227
1228         * interp.c (big_endian_p): Delete, replaced by
1229         current_target_byte_order.
1230
1231 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1232
1233         * interp.c (host_read_long, host_read_word, host_swap_word,
1234         host_swap_long): Delete. Using common sim-endian.
1235         (sim_fetch_register, sim_store_register): Use H2T.
1236         (pipeline_ticks): Delete.  Handled by sim-events.
1237         (sim_info): Update.
1238         (sim_engine_run): Update.
1239
1240 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1241
1242         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1243         reason from here.
1244         (SignalException): To here. Signal using sim_engine_halt.
1245         (sim_stop_reason): Delete, moved to common.
1246
1247 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1248
1249         * interp.c (sim_open): Add callback argument.
1250         (sim_set_callbacks): Delete SIM_DESC argument.
1251         (sim_size): Ditto.
1252
1253 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1254
1255         * Makefile.in (SIM_OBJS): Add common modules.
1256
1257         * interp.c (sim_set_callbacks): Also set SD callback.
1258         (set_endianness, xfer_*, swap_*): Delete.
1259         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1260         Change to functions using sim-endian macros.
1261         (control_c, sim_stop): Delete, use common version.
1262         (simulate): Convert into.
1263         (sim_engine_run): This function.
1264         (sim_resume): Delete.
1265
1266         * interp.c (simulation): New variable - the simulator object.
1267         (sim_kind): Delete global - merged into simulation.
1268         (sim_load): Cleanup.  Move PC assignment from here.
1269         (sim_create_inferior): To here.
1270
1271         * sim-main.h: New file.
1272         * interp.c (sim-main.h): Include.
1273
1274 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1275
1276         * configure: Regenerated to track ../common/aclocal.m4 changes.
1277
1278 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1279
1280         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1281
1282 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1283
1284         * gencode.c (build_instruction): DIV instructions: check
1285         for division by zero and integer overflow before using
1286         host's division operation.
1287
1288 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1289
1290         * Makefile.in (SIM_OBJS): Add sim-load.o.
1291         * interp.c: #include bfd.h.
1292         (target_byte_order): Delete.
1293         (sim_kind, myname, big_endian_p): New static locals.
1294         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1295         after argument parsing.  Recognize -E arg, set endianness accordingly.
1296         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1297         load file into simulator.  Set PC from bfd.
1298         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1299         (set_endianness): Use big_endian_p instead of target_byte_order.
1300
1301 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1302
1303         * interp.c (sim_size): Delete prototype - conflicts with
1304         definition in remote-sim.h.  Correct definition.
1305
1306 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1307
1308         * configure: Regenerated to track ../common/aclocal.m4 changes.
1309         * config.in: Ditto.
1310
1311 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1312
1313         * interp.c (sim_open): New arg `kind'.
1314
1315         * configure: Regenerated to track ../common/aclocal.m4 changes.
1316
1317 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1318
1319         * configure: Regenerated to track ../common/aclocal.m4 changes.
1320
1321 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
1322
1323         * interp.c (sim_open): Set optind to 0 before calling getopt.
1324
1325 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1326
1327         * configure: Regenerated to track ../common/aclocal.m4 changes.
1328
1329 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1330
1331         * interp.c : Replace uses of pr_addr with pr_uword64
1332         where the bit length is always 64 independent of SIM_ADDR.
1333         (pr_uword64) : added.
1334
1335 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1336
1337         * configure: Re-generate.
1338
1339 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
1340
1341         * configure: Regenerate to track ../common/aclocal.m4 changes.
1342
1343 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
1344
1345         * interp.c (sim_open): New SIM_DESC result.  Argument is now
1346         in argv form.
1347         (other sim_*): New SIM_DESC argument.
1348
1349 start-sanitize-r5900
1350 Wed Feb 26 18:32:21 1997  Gavin Koch  <gavin@cygnus.com>
1351
1352         * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
1353         Change values to avoid overloading DOUBLEWORD which is tested
1354         for all insns.
1355         * gencode.c: reinstate "offending code".
1356
1357 end-sanitize-r5900
1358 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
1359
1360         * interp.c: Fix printing of addresses for non-64-bit targets.
1361         (pr_addr): Add function to print address based on size.
1362 start-sanitize-r5900
1363         * gencode.c: #ifdef out offending code until a permanent fix
1364         can be added.  Code is causing build errors for non-5900 mips targets.
1365 end-sanitize-r5900
1366
1367 start-sanitize-r5900
1368 Thu Feb 20 10:40:24 1997  Gavin Koch  <gavin@cetus.cygnus.com>
1369
1370         * gencode.c (process_instructions): Correct test for ISA dependent
1371         architecture bits in isa field of MIPS_DECODE.
1372
1373 end-sanitize-r5900
1374 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
1375
1376         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1377
1378 start-sanitize-r5900
1379 Tue Feb 18 17:03:47 1997  Gavin Koch  <gavin@cygnus.com>
1380
1381         * gencode.c (MIPS_DECODE): Correct instruction feature flags for
1382         PMADDUW.
1383
1384 end-sanitize-r5900
1385 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
1386
1387         * gencode.c (build_mips16_operands): Correct computation of base
1388         address for extended PC relative instruction.
1389
1390 start-sanitize-r5900
1391 Fri Feb  7 11:12:44 1997  Gavin Koch  <gavin@cygnus.com>
1392
1393         * Makefile.in, configure, configure.in, gencode.c,
1394         interp.c, support.h: add r5900.
1395
1396 end-sanitize-r5900
1397 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
1398
1399         * interp.c (mips16_entry): Add support for floating point cases.
1400         (SignalException): Pass floating point cases to mips16_entry.
1401         (ValueFPR): Don't restrict fmt_single and fmt_word to even
1402         registers.
1403         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
1404         or fmt_word.
1405         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
1406         and then set the state to fmt_uninterpreted.
1407         (COP_SW): Temporarily set the state to fmt_word while calling
1408         ValueFPR.
1409
1410 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
1411
1412         * gencode.c (build_instruction): The high order may be set in the
1413         comparison flags at any ISA level, not just ISA 4.
1414
1415 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
1416
1417         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
1418         COMMON_{PRE,POST}_CONFIG_FRAG instead.
1419         * configure.in: sinclude ../common/aclocal.m4.
1420         * configure: Regenerated.
1421
1422 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
1423
1424         * configure: Rebuild after change to aclocal.m4.
1425
1426 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
1427
1428         * configure configure.in Makefile.in:  Update to new configure
1429         scheme which is more compatible with WinGDB builds.
1430         * configure.in:  Improve comment on how to run autoconf.
1431         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
1432         * Makefile.in:  Use autoconf substitution to install common
1433         makefile fragment.
1434
1435 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
1436
1437         * gencode.c (build_instruction): Use BigEndianCPU instead of
1438         ByteSwapMem.
1439
1440 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
1441
1442         * interp.c (sim_monitor): Make output to stdout visible in
1443         wingdb's I/O log window.
1444
1445 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
1446
1447         * support.h: Undo previous change to SIGTRAP
1448         and SIGQUIT values.
1449
1450 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
1451
1452         * interp.c (store_word, load_word): New static functions.
1453         (mips16_entry): New static function.
1454         (SignalException): Look for mips16 entry and exit instructions.
1455         (simulate): Use the correct index when setting fpr_state after
1456         doing a pending move.
1457
1458 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
1459
1460         * interp.c: Fix byte-swapping code throughout to work on
1461         both little- and big-endian hosts.
1462
1463 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
1464
1465         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
1466         with gdb/config/i386/xm-windows.h.
1467
1468 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
1469
1470         * gencode.c (build_instruction): Work around MSVC++ code gen bug
1471         that messes up arithmetic shifts.
1472
1473 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
1474
1475         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
1476         SIGTRAP and SIGQUIT for _WIN32.
1477
1478 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
1479
1480         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
1481         force a 64 bit multiplication.
1482         (build_instruction) [OR]: In mips16 mode, don't do anything if the
1483         destination register is 0, since that is the default mips16 nop
1484         instruction.
1485
1486 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
1487
1488         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
1489         (build_endian_shift): Don't check proc64.
1490         (build_instruction): Always set memval to uword64.  Cast op2 to
1491         uword64 when shifting it left in memory instructions.  Always use
1492         the same code for stores--don't special case proc64.
1493
1494         * gencode.c (build_mips16_operands): Fix base PC value for PC
1495         relative operands.
1496         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
1497         jal instruction.
1498         * interp.c (simJALDELAYSLOT): Define.
1499         (JALDELAYSLOT): Define.
1500         (INDELAYSLOT, INJALDELAYSLOT): Define.
1501         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
1502
1503 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
1504
1505         * interp.c (sim_open): add flush_cache as a PMON routine
1506         (sim_monitor): handle flush_cache by ignoring it
1507
1508 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
1509
1510         * gencode.c (build_instruction): Use !ByteSwapMem instead of
1511         BigEndianMem.
1512         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
1513         (BigEndianMem): Rename to ByteSwapMem and change sense.
1514         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
1515         BigEndianMem references to !ByteSwapMem.
1516         (set_endianness): New function, with prototype.
1517         (sim_open): Call set_endianness.
1518         (sim_info): Use simBE instead of BigEndianMem.
1519         (xfer_direct_word, xfer_direct_long, swap_direct_word,
1520         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
1521         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
1522         ifdefs, keeping the prototype declaration.
1523         (swap_word): Rewrite correctly.
1524         (ColdReset): Delete references to CONFIG.  Delete endianness related
1525         code; moved to set_endianness.
1526
1527 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
1528
1529         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
1530         * interp.c (CHECKHILO): Define away.
1531         (simSIGINT): New macro.
1532         (membank_size): Increase from 1MB to 2MB.
1533         (control_c): New function.
1534         (sim_resume): Rename parameter signal to signal_number.  Add local
1535         variable prev.  Call signal before and after simulate.
1536         (sim_stop_reason): Add simSIGINT support.
1537         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
1538         functions always.
1539         (sim_warning): Delete call to SignalException.  Do call printf_filtered
1540         if logfh is NULL.
1541         (AddressTranslation): Add #ifdef DEBUG around debugging message and
1542         a call to sim_warning.
1543
1544 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
1545
1546         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
1547         16 bit instructions.
1548
1549 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1550
1551         Add support for mips16 (16 bit MIPS implementation):
1552         * gencode.c (inst_type): Add mips16 instruction encoding types.
1553         (GETDATASIZEINSN): Define.
1554         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
1555         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
1556         mtlo.
1557         (MIPS16_DECODE): New table, for mips16 instructions.
1558         (bitmap_val): New static function.
1559         (struct mips16_op): Define.
1560         (mips16_op_table): New table, for mips16 operands.
1561         (build_mips16_operands): New static function.
1562         (process_instructions): If PC is odd, decode a mips16
1563         instruction.  Break out instruction handling into new
1564         build_instruction function.
1565         (build_instruction): New static function, broken out of
1566         process_instructions.  Check modifiers rather than flags for SHIFT
1567         bit count and m[ft]{hi,lo} direction.
1568         (usage): Pass program name to fprintf.
1569         (main): Remove unused variable this_option_optind.  Change
1570         ``*loptarg++'' to ``loptarg++''.
1571         (my_strtoul): Parenthesize && within ||.
1572         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
1573         (simulate): If PC is odd, fetch a 16 bit instruction, and
1574         increment PC by 2 rather than 4.
1575         * configure.in: Add case for mips16*-*-*.
1576         * configure: Rebuild.
1577
1578 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
1579
1580         * interp.c: Allow -t to enable tracing in standalone simulator.
1581         Fix garbage output in trace file and error messages.
1582
1583 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
1584
1585         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
1586         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
1587         * configure.in: Simplify using macros in ../common/aclocal.m4.
1588         * configure: Regenerated.
1589         * tconfig.in: New file.
1590
1591 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
1592
1593         * interp.c: Fix bugs in 64-bit port.
1594         Use ansi function declarations for msvc compiler.
1595         Initialize and test file pointer in trace code.
1596         Prevent duplicate definition of LAST_EMED_REGNUM.
1597
1598 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
1599
1600         * interp.c (xfer_big_long): Prevent unwanted sign extension.
1601
1602 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
1603
1604         * interp.c (SignalException): Check for explicit terminating
1605         breakpoint value.
1606         * gencode.c: Pass instruction value through SignalException()
1607         calls for Trap, Breakpoint and Syscall.
1608
1609 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1610
1611         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
1612         only used on those hosts that provide it.
1613         * configure.in: Add sqrt() to list of functions to be checked for.
1614         * config.in: Re-generated.
1615         * configure: Re-generated.
1616
1617 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1618
1619         * gencode.c (process_instructions): Call build_endian_shift when
1620         expanding STORE RIGHT, to fix swr.
1621         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1622         clear the high bits.
1623         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1624         Fix float to int conversions to produce signed values.
1625
1626 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
1627
1628         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1629         (process_instructions): Correct handling of nor instruction.
1630         Correct shift count for 32 bit shift instructions. Correct sign
1631         extension for arithmetic shifts to not shift the number of bits in
1632         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
1633         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
1634         Fix madd.
1635         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1636         It's OK to have a mult follow a mult.  What's not OK is to have a
1637         mult follow an mfhi.
1638         (Convert): Comment out incorrect rounding code.
1639
1640 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
1641
1642         * interp.c (sim_monitor): Improved monitor printf
1643         simulation. Tidied up simulator warnings, and added "--log" option
1644         for directing warning message output.
1645         * gencode.c: Use sim_warning() rather than WARNING macro.
1646
1647 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
1648
1649         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1650         getopt1.o, rather than on gencode.c.  Link objects together.
1651         Don't link against -liberty.
1652         (gencode.o, getopt.o, getopt1.o): New targets.
1653         * gencode.c: Include <ctype.h> and "ansidecl.h".
1654         (AND): Undefine after including "ansidecl.h".
1655         (ULONG_MAX): Define if not defined.
1656         (OP_*): Don't define macros; now defined in opcode/mips.h.
1657         (main): Call my_strtoul rather than strtoul.
1658         (my_strtoul): New static function.
1659
1660 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
1661
1662         * gencode.c (process_instructions):  Generate word64 and uword64
1663         instead of `long long' and `unsigned long long' data types.
1664         * interp.c:  #include sysdep.h to get signals, and define default
1665         for SIGBUS.
1666         * (Convert):  Work around for Visual-C++ compiler bug with type
1667         conversion.
1668         * support.h:  Make things compile under Visual-C++ by using
1669         __int64 instead of `long long'.  Change many refs to long long
1670         into word64/uword64 typedefs.
1671
1672 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
1673
1674         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1675         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1676         (docdir): Removed.
1677         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1678         (AC_PROG_INSTALL): Added.
1679         (AC_PROG_CC): Moved to before configure.host call.
1680         * configure: Rebuilt.
1681
1682 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
1683
1684         * configure.in: Define @SIMCONF@ depending on mips target.
1685         * configure: Rebuild.
1686         * Makefile.in (run): Add @SIMCONF@ to control simulator
1687         construction.
1688         * gencode.c: Change LOADDRMASK to 64bit memory model only.
1689         * interp.c: Remove some debugging, provide more detailed error
1690         messages, update memory accesses to use LOADDRMASK.
1691
1692 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
1693
1694         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1695         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
1696         stamp-h.
1697         * configure: Rebuild.
1698         * config.in: New file, generated by autoheader.
1699         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
1700         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
1701         HAVE_ANINT and HAVE_AINT, as appropriate.
1702         * Makefile.in (run): Use @LIBS@ rather than -lm.
1703         (interp.o): Depend upon config.h.
1704         (Makefile): Just rebuild Makefile.
1705         (clean): Remove stamp-h.
1706         (mostlyclean): Make the same as clean, not as distclean.
1707         (config.h, stamp-h): New targets.
1708
1709 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
1710
1711         * interp.c (ColdReset): Fix boolean test. Make all simulator
1712         globals static.
1713
1714 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
1715
1716         * interp.c (xfer_direct_word, xfer_direct_long,
1717         swap_direct_word, swap_direct_long, xfer_big_word,
1718         xfer_big_long, xfer_little_word, xfer_little_long,
1719         swap_word,swap_long): Added.
1720         * interp.c (ColdReset): Provide function indirection to
1721         host<->simulated_target transfer routines.
1722         * interp.c (sim_store_register, sim_fetch_register): Updated to
1723         make use of indirected transfer routines.
1724
1725 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
1726
1727         * gencode.c (process_instructions): Ensure FP ABS instruction
1728         recognised.
1729         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1730         system call support.
1731
1732 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
1733
1734         * interp.c (sim_do_command): Complain if callback structure not
1735         initialised.
1736
1737 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
1738
1739         * interp.c (Convert): Provide round-to-nearest and round-to-zero
1740         support for Sun hosts.
1741         * Makefile.in (gencode): Ensure the host compiler and libraries
1742         used for cross-hosted build.
1743
1744 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
1745
1746         * interp.c, gencode.c: Some more (TODO) tidying.
1747
1748 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
1749
1750         * gencode.c, interp.c: Replaced explicit long long references with
1751         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1752         * support.h (SET64LO, SET64HI): Macros added.
1753
1754 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
1755
1756         * configure: Regenerate with autoconf 2.7.
1757
1758 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
1759
1760         * interp.c (LoadMemory): Enclose text following #endif in /* */.
1761         * support.h: Remove superfluous "1" from #if.
1762         * support.h (CHECKSIM): Remove stray 'a' at end of line.
1763
1764 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
1765
1766         * interp.c (StoreFPR): Control UndefinedResult() call on
1767         WARN_RESULT manifest.
1768
1769 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
1770
1771         * gencode.c: Tidied instruction decoding, and added FP instruction
1772         support.
1773
1774         * interp.c: Added dineroIII, and BSD profiling support. Also
1775         run-time FP handling.
1776
1777 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
1778
1779         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1780         gencode.c, interp.c, support.h: created.