sim/mips/ChangeLog

   1 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * config.in, configure: Regenerate.
   4
   5 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
   6
   7         * interp.c (sim_pc_get): New function.
   8
   9 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  10
  11         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
  12         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
  13
  14 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
  15
  16         * configure: Regenerate.
  17
  18 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  19
  20         * configure: Regenerate.
  21
  22 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  23
  24         * configure: Regenerate.
  25         * configure.ac (mips_extra_objs): Delete.
  26         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
  27         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
  28
  29 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
  30
  31         * configure: Regenerate.
  32         * configure.ac: Delete sim_hw checks for dv-sockser.
  33
  34 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
  35
  36         * config.in, configure: Regenerate.
  37         * tconfig.in: Rename file ...
  38         * tconfig.h: ... here.
  39
  40 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
  41
  42         * tconfig.in: Delete includes.
  43         [HAVE_DV_SOCKSER]: Delete.
  44
  45 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  46
  47         * Makefile.in (SIM_RUN_OBJS): Delete.
  48
  49 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
  50
  51         * configure.ac (AC_CHECK_HEADERS): Delete.
  52         * aclocal.m4, configure: Regenerate.
  53
  54 2014-08-19  Alan Modra  <amodra@gmail.com>
  55
  56         * configure: Regenerate.
  57
  58 2014-08-15  Roland McGrath  <mcgrathr@google.com>
  59
  60         * configure: Regenerate.
  61         * config.in: Regenerate.
  62
  63 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
  64
  65         * configure: Regenerate.
  66
  67 2013-09-23  Alan Modra  <amodra@gmail.com>
  68
  69         * configure: Regenerate.
  70
  71 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
  72
  73         * aclocal.m4, configure: Regenerate.
  74
  75 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
  76
  77         * configure: Rebuild.
  78
  79 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
  80
  81         * configure: Regenerate.
  82
  83 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
  84
  85         * configure.ac: Address use of dv-sockser.o.
  86         * tconfig.in: Conditionalize use of dv_sockser_install.
  87         * configure: Regenerated.
  88         * config.in: Regenerated.
  89
  90 2012-10-04  Chao-ying Fu  <fu@mips.com>
  91             Steve Ellcey  <sellcey@mips.com>
  92
  93         * mips/mips3264r2.igen (rdhwr): New.
  94
  95 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
  96
  97         * configure.ac: Always link against dv-sockser.o.
  98         * configure: Regenerate.
  99
 100 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 101
 102         * config.in, configure: Regenerate.
 103
 104 2012-05-18  Nick Clifton  <nickc@redhat.com>
 105
 106         PR 14072
 107         * interp.c: Include config.h before system header files.
 108
 109 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 110
 111         * aclocal.m4, config.in, configure: Regenerate.
 112
 113 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 114
 115         * aclocal.m4: New file.
 116         * configure: Regenerate.
 117
 118 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 119
 120         * configure: Regenerate after common/acinclude.m4 update.
 121
 122 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 123
 124         * configure.ac: Change include to common/acinclude.m4.
 125
 126 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 127
 128         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 129         call.  Replace common.m4 include with SIM_AC_COMMON.
 130         * configure: Regenerate.
 131
 132 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 133
 134         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 135         $(SIM_EXTRA_DEPS).
 136         (tmp-mach-multi): Exit early when igen fails.
 137
 138 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 139
 140         * interp.c (sim_do_command): Delete.
 141
 142 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 143
 144         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 145         (tx3904sio_fifo_reset): Likewise.
 146         * interp.c (sim_monitor): Likewise.
 147
 148 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 149
 150         * interp.c (sim_write): Add const to buffer arg.
 151
 152 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 153
 154         * interp.c: Don't include sysdep.h
 155
 156 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 157
 158         * configure: Regenerate.
 159
 160 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 161
 162         * config.in: Regenerate.
 163         * configure: Likewise.
 164
 165         * configure: Regenerate.
 166
 167 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 168
 169         * configure: Regenerate to track ../common/common.m4 changes.
 170         * config.in: Ditto.
 171
 172 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 173             Daniel Jacobowitz  <dan@codesourcery.com>
 174             Joseph Myers  <joseph@codesourcery.com>
 175
 176         * configure: Regenerate.
 177
 178 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 179
 180         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 181         that unconditionally allows fmt_ps.
 182         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 183         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 184         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 185         filter from 64,f to 32,f.
 186         (PREFX): Change filter from 64 to 32.
 187         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 188         that use do_load_double instead of do_load.  Make both LUXC1
 189         versions unpredictable if SizeFGR () != 64.
 190         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 191         instead of do_store.  Remove unused variable.  Make both SUXC1
 192         versions unpredictable if SizeFGR () != 64.
 193
 194 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 195
 196         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 197         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 198         shifts for that case.
 199
 200 2007-09-04  Nick Clifton  <nickc@redhat.com>
 201
 202         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 203         (display_mem_info): New static variable.
 204         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 205         (mips_options): Add info-memory and memory-info.
 206         (sim_open): After processing the command line and board
 207         specification, check display_mem_info.  If it is set then
 208         call the real handler for the --memory-info command line
 209         switch.
 210
 211 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 212
 213         * configure.ac: Change license of multi-run.c to GPL version 3.
 214         * configure: Regenerate.
 215
 216 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 217
 218         * configure.ac, configure: Revert last patch.
 219
 220 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 221
 222         * configure.ac (sim_mipsisa3264_configs): New variable.
 223         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 224         every configuration support all four targets, using the triplet to
 225         determine the default.
 226         * configure: Regenerate.
 227
 228 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 229
 230         * Makefile.in (m16run.o): New rule.
 231
 232 2007-05-15  Thiemo Seufer  <ths@mips.com>
 233
 234         * mips3264r2.igen (DSHD): Fix compile warning.
 235
 236 2007-05-14  Thiemo Seufer  <ths@mips.com>
 237
 238         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 239         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 240         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 241         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 242         for mips32r2.
 243
 244 2007-03-01  Thiemo Seufer  <ths@mips.com>
 245
 246         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 247         and mips64.
 248
 249 2007-02-20  Thiemo Seufer  <ths@mips.com>
 250
 251         * dsp.igen: Update copyright notice.
 252         * dsp2.igen: Fix copyright notice.
 253
 254 2007-02-20  Thiemo Seufer  <ths@mips.com>
 255             Chao-Ying Fu  <fu@mips.com>
 256
 257         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 258         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 259         Add dsp2 to sim_igen_machine.
 260         * configure: Regenerate.
 261         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 262         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 263         (mulq_rs.ph): Use do_ph_mulq.
 264         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 265         * mips.igen: Add dsp2 model and include dsp2.igen.
 266         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 267         for *mips32r2, *mips64r2, *dsp.
 268         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 269         for *mips32r2, *mips64r2, *dsp2.
 270         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 271
 272 2007-02-19  Thiemo Seufer  <ths@mips.com>
 273             Nigel Stephens  <nigel@mips.com>
 274
 275         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 276         jumps with hazard barrier.
 277
 278 2007-02-19  Thiemo Seufer  <ths@mips.com>
 279             Nigel Stephens  <nigel@mips.com>
 280
 281         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 282         after each call to sim_io_write.
 283
 284 2007-02-19  Thiemo Seufer  <ths@mips.com>
 285             Nigel Stephens  <nigel@mips.com>
 286
 287         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 288         supported by this simulator.
 289         (decode_coproc): Recognise additional CP0 Config registers
 290         correctly.
 291
 292 2007-02-19  Thiemo Seufer  <ths@mips.com>
 293             Nigel Stephens  <nigel@mips.com>
 294             David Ung  <davidu@mips.com>
 295
 296         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 297         uninterpreted formats. If fmt is one of the uninterpreted types
 298         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 299         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 300         (store_fpr): When writing an invalid odd register, set the
 301         matching even register to fmt_unknown, not the following register.
 302         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 303         the the memory window at offset 0 set by --memory-size command
 304         line option.
 305         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 306         point register.
 307         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 308         register.
 309         (sim_monitor): When returning the memory size to the MIPS
 310         application, use the value in STATE_MEM_SIZE, not an arbitrary
 311         hardcoded value.
 312         (cop_lw): Don' mess around with FPR_STATE, just pass
 313         fmt_uninterpreted_32 to StoreFPR.
 314         (cop_sw): Similarly.
 315         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 316         (cop_sd): Similarly.
 317         * mips.igen (not_word_value): Single version for mips32, mips64
 318         and mips16.
 319
 320 2007-02-19  Thiemo Seufer <ths@mips.com>
 321             Nigel Stephens  <nigel@mips.com>
 322
 323         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 324         MBytes.
 325
 326 2007-02-17  Thiemo Seufer  <ths@mips.com>
 327
 328         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 329         configuration.
 330         * configure: Regenerate.
 331
 332 2007-02-17  Thiemo Seufer  <ths@mips.com>
 333
 334         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 335         Add mdmx to sim_igen_machine.
 336         (mipsisa64*-*-*): Likewise. Remove dsp.
 337         (mipsisa32*-*-*): Remove dsp.
 338         * configure: Regenerate.
 339
 340 2007-02-13  Thiemo Seufer  <ths@mips.com>
 341
 342         * configure.ac: Add mips*-sde-elf* target.
 343         * configure: Regenerate.
 344
 345 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 346
 347         * acconfig.h: Remove.
 348         * config.in, configure: Regenerate.
 349
 350 2006-11-07  Thiemo Seufer  <ths@mips.com>
 351
 352         * dsp.igen (do_w_op): Fix compiler warning.
 353
 354 2006-08-29  Thiemo Seufer  <ths@mips.com>
 355             David Ung  <davidu@mips.com>
 356
 357         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 358         sim_igen_machine.
 359         * configure: Regenerate.
 360         * mips.igen (model): Add smartmips.
 361         (MADDU): Increment ACX if carry.
 362         (do_mult): Clear ACX.
 363         (ROR,RORV): Add smartmips.
 364         (include): Include smartmips.igen.
 365         * sim-main.h (ACX): Set to REGISTERS[89].
 366         * smartmips.igen: New file.
 367
 368 2006-08-29  Thiemo Seufer  <ths@mips.com>
 369             David Ung  <davidu@mips.com>
 370
 371         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 372         mips3264r2.igen. Add missing dependency rules.
 373         * m16e.igen: Support for mips16e save/restore instructions.
 374
 375 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 376
 377         * configure: Regenerated.
 378
 379 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 380
 381         * configure: Regenerated.
 382
 383 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 384
 385         * configure: Regenerated.
 386
 387 2006-05-15 Chao-ying Fu  <fu@mips.com>
 388
 389         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 390
 391 2006-04-18  Nick Clifton  <nickc@redhat.com>
 392
 393         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 394         statement.
 395
 396 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 397
 398         * configure: Regenerate.
 399
 400 2005-12-14  Chao-ying Fu  <fu@mips.com>
 401
 402         * Makefile.in (SIM_OBJS): Add dsp.o.
 403         (dsp.o): New dependency.
 404         (IGEN_INCLUDE): Add dsp.igen.
 405         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 406         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 407         * configure: Regenerate.
 408         * mips.igen: Add dsp model and include dsp.igen.
 409         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 410         because these instructions are extended in DSP ASE.
 411         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 412         adding 6 DSP accumulator registers and 1 DSP control register.
 413         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 414         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 415         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 416         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 417         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 418         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 419         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 420         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 421         DSPCR_CCOND_SMASK): New define.
 422         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 423         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 424
 425 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 426
 427         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 428
 429 2005-06-16  David Ung  <davidu@mips.com>
 430             Nigel Stephens  <nigel@mips.com>
 431
 432         * mips.igen: New mips16e model and include m16e.igen.
 433         (check_u64): Add mips16e tag.
 434         * m16e.igen: New file for MIPS16e instructions.
 435         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 436         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 437         models.
 438         * configure: Regenerate.
 439
 440 2005-05-26  David Ung  <davidu@mips.com>
 441
 442         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 443         tags to all instructions which are applicable to the new ISAs.
 444         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 445         vr.igen.
 446         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 447         instructions.
 448         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 449         to mips.igen.
 450         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 451         * configure: Regenerate.
 452
 453 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 454
 455         * configure: Regenerate.
 456
 457 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 458
 459         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 460         explicit call to AC_CONFIG_HEADER.
 461         * configure: Regenerate.
 462
 463 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 464
 465         * configure.ac: Update to use ../common/common.m4.
 466         * configure: Re-generate.
 467
 468 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 469
 470         * configure: Regenerated to track ../common/aclocal.m4 changes.
 471
 472 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 473
 474         * configure.ac: Rename configure.in, require autoconf 2.59.
 475         * configure: Re-generate.
 476
 477 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 478
 479         * configure: Regenerate for ../common/aclocal.m4 update.
 480
 481 2004-09-24  Monika Chaddha  <monika@acmet.com>
 482
 483         Committed by Andrew Cagney.
 484         * m16.igen (CMP, CMPI): Fix assembler.
 485
 486 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 487
 488         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 489         * configure: Regenerate.
 490
 491 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 492
 493         * configure.in (sim_m16_machine): Include mipsIII.
 494         * configure: Regenerate.
 495
 496 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 497
 498         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 499         from COP0_BADVADDR.
 500         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 501
 502 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 503
 504         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 505
 506 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 507
 508         * mips.igen (check_fmt): Remove.
 509         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 510         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 511         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 512         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 513         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 514         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 515         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 516         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 517         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 518         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 519
 520 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 521
 522         * sb1.igen (check_sbx): New function.
 523         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 524
 525 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 526             Richard Sandiford  <rsandifo@redhat.com>
 527
 528         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 529         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 530         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 531         separate implementations for mipsIV and mipsV.  Use new macros to
 532         determine whether the restrictions apply.
 533
 534 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 535
 536         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 537         (check_mult_hilo): Improve comments.
 538         (check_div_hilo): Likewise.  Also, fork off a new version
 539         to handle mips32/mips64 (since there are no hazards to check
 540         in MIPS32/MIPS64).
 541
 542 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 543
 544         * mips.igen (do_dmultx): Fix check for negative operands.
 545
 546 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 547
 548         * Makefile.in (SHELL): Make sure this is defined.
 549         (various): Use $(SHELL) whenever we invoke move-if-change.
 550
 551 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 552
 553         * cp1.c: Tweak attribution slightly.
 554         * cp1.h: Likewise.
 555         * mdmx.c: Likewise.
 556         * mdmx.igen: Likewise.
 557         * mips3d.igen: Likewise.
 558         * sb1.igen: Likewise.
 559
 560 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 561
 562         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 563         unsigned operands.
 564
 565 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 566
 567         * interp.c (sim_open): Rename _bfd to bfd.
 568         (sim_create_inferior): Ditto.
 569
 570 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 571
 572         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 573
 574 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 575
 576         * mips.igen (EI, DI): Remove.
 577
 578 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 579
 580         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 581
 582 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 583             Andrew Cagney  <ac131313@redhat.com>
 584             Gavin Romig-Koch  <gavin@redhat.com>
 585             Graydon Hoare  <graydon@redhat.com>
 586             Aldy Hernandez  <aldyh@redhat.com>
 587             Dave Brolley  <brolley@redhat.com>
 588             Chris Demetriou  <cgd@broadcom.com>
 589
 590         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 591         (sim_mach_default): New variable.
 592         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 593         Add a new simulator generator, MULTI.
 594         * configure: Regenerate.
 595         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 596         (multi-run.o): New dependency.
 597         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 598         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 599         (tmp-multi): Combine them.
 600         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 601         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 602         (distclean-extra): New rule.
 603         * sim-main.h: Include bfd.h.
 604         (MIPS_MACH): New macro.
 605         * mips.igen (vr4120, vr5400, vr5500): New models.
 606         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 607         * vr.igen: Replace with new version.
 608
 609 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 610
 611         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 612         * configure: Regenerate.
 613
 614 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 615
 616         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 617         * mips.igen: Remove all invocations of check_branch_bug and
 618         mark_branch_bug.
 619
 620 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 621
 622         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 623
 624 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 625
 626         * mips.igen (do_load_double, do_store_double): New functions.
 627         (LDC1, SDC1): Rename to...
 628         (LDC1b, SDC1b): respectively.
 629         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 630
 631 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 632
 633         * cp1.c (fp_recip2): Modify initialization expression so that
 634         GCC will recognize it as constant.
 635
 636 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 637
 638         * mdmx.c (SD_): Delete.
 639         (Unpredictable): Re-define, for now, to directly invoke
 640         unpredictable_action().
 641         (mdmx_acc_op): Fix error in .ob immediate handling.
 642
 643 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 644
 645         * interp.c (sim_firmware_command): Initialize `address'.
 646
 647 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 648
 649         * configure: Regenerated to track ../common/aclocal.m4 changes.
 650
 651 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 652             Ed Satterthwaite  <ehs@broadcom.com>
 653
 654         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 655         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 656         * mips.igen: Include mips3d.igen.
 657         (mips3d): New model name for MIPS-3D ASE instructions.
 658         (CVT.W.fmt): Don't use this instruction for word (source) format
 659         instructions.
 660         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 661         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 662         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 663         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 664         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 665         (RSquareRoot1, RSquareRoot2): New macros.
 666         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 667         (fp_rsqrt2): New functions.
 668         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 669         * configure: Regenerate.
 670
 671 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 672             Ed Satterthwaite  <ehs@broadcom.com>
 673
 674         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 675         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 676         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 677         (convert): Note that this function is not used for paired-single
 678         format conversions.
 679         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 680         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 681         (check_fmt_p): Enable paired-single support.
 682         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 683         (PUU.PS): New instructions.
 684         (CVT.S.fmt): Don't use this instruction for paired-single format
 685         destinations.
 686         * sim-main.h (FP_formats): New value 'fmt_ps.'
 687         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 688         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 689
 690 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 691
 692         * mips.igen: Fix formatting of function calls in
 693         many FP operations.
 694
 695 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 696
 697         * mips.igen (MOVN, MOVZ): Trace result.
 698         (TNEI): Print "tnei" as the opcode name in traces.
 699         (CEIL.W): Add disassembly string for traces.
 700         (RSQRT.fmt): Make location of disassembly string consistent
 701         with other instructions.
 702
 703 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 704
 705         * mips.igen (X): Delete unused function.
 706
 707 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 708
 709         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 710
 711 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 712             Ed Satterthwaite  <ehs@broadcom.com>
 713
 714         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 715         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 716         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 717         (fp_nmsub): New prototypes.
 718         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 719         (NegMultiplySub): New defines.
 720         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 721         (MADD.D, MADD.S): Replace with...
 722         (MADD.fmt): New instruction.
 723         (MSUB.D, MSUB.S): Replace with...
 724         (MSUB.fmt): New instruction.
 725         (NMADD.D, NMADD.S): Replace with...
 726         (NMADD.fmt): New instruction.
 727         (NMSUB.D, MSUB.S): Replace with...
 728         (NMSUB.fmt): New instruction.
 729
 730 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 731             Ed Satterthwaite  <ehs@broadcom.com>
 732
 733         * cp1.c: Fix more comment spelling and formatting.
 734         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 735         (denorm_mode): New function.
 736         (fpu_unary, fpu_binary): Round results after operation, collect
 737         status from rounding operations, and update the FCSR.
 738         (convert): Collect status from integer conversions and rounding
 739         operations, and update the FCSR.  Adjust NaN values that result
 740         from conversions.  Convert to use sim_io_eprintf rather than
 741         fprintf, and remove some debugging code.
 742         * cp1.h (fenr_FS): New define.
 743
 744 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 745
 746         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 747         rounding mode to sim FP rounding mode flag conversion code into...
 748         (rounding_mode): New function.
 749
 750 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 751
 752         * cp1.c: Clean up formatting of a few comments.
 753         (value_fpr): Reformat switch statement.
 754
 755 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 756             Ed Satterthwaite  <ehs@broadcom.com>
 757
 758         * cp1.h: New file.
 759         * sim-main.h: Include cp1.h.
 760         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 761         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 762         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 763         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 764         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 765         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 766         * cp1.c: Don't include sim-fpu.h; already included by
 767         sim-main.h.  Clean up formatting of some comments.
 768         (NaN, Equal, Less): Remove.
 769         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 770         (fp_cmp): New functions.
 771         * mips.igen (do_c_cond_fmt): Remove.
 772         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 773         Compare.  Add result tracing.
 774         (CxC1): Remove, replace with...
 775         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 776         (DMxC1): Remove, replace with...
 777         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 778         (MxC1): Remove, replace with...
 779         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 780
 781 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 782
 783         * sim-main.h (FGRIDX): Remove, replace all uses with...
 784         (FGR_BASE): New macro.
 785         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 786         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 787         (NR_FGR, FGR): Likewise.
 788         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 789         * mips.igen: Likewise.
 790
 791 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 792
 793         * cp1.c: Add an FSF Copyright notice to this file.
 794
 795 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 796             Ed Satterthwaite  <ehs@broadcom.com>
 797
 798         * cp1.c (Infinity): Remove.
 799         * sim-main.h (Infinity): Likewise.
 800
 801         * cp1.c (fp_unary, fp_binary): New functions.
 802         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 803         (fp_sqrt): New functions, implemented in terms of the above.
 804         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 805         (Recip, SquareRoot): Remove (replaced by functions above).
 806         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 807         (fp_recip, fp_sqrt): New prototypes.
 808         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 809         (Recip, SquareRoot): Replace prototypes with #defines which
 810         invoke the functions above.
 811
 812 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 813
 814         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 815         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 816         file, remove PARAMS from prototypes.
 817         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 818         simulator state arguments.
 819         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 820         pass simulator state arguments.
 821         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 822         (store_fpr, convert): Remove 'sd' argument.
 823         (value_fpr): Likewise.  Convert to use 'SD' instead.
 824
 825 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 826
 827         * cp1.c (Min, Max): Remove #if 0'd functions.
 828         * sim-main.h (Min, Max): Remove.
 829
 830 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 831
 832         * cp1.c: fix formatting of switch case and default labels.
 833         * interp.c: Likewise.
 834         * sim-main.c: Likewise.
 835
 836 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 837
 838         * cp1.c: Clean up comments which describe FP formats.
 839          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 840
 841 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 842             Ed Satterthwaite  <ehs@broadcom.com>
 843
 844         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 845         Broadcom SiByte SB-1 processor configurations.
 846         * configure: Regenerate.
 847         * sb1.igen: New file.
 848         * mips.igen: Include sb1.igen.
 849         (sb1): New model.
 850         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 851         * mdmx.igen: Add "sb1" model to all appropriate functions and
 852         instructions.
 853         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 854         (ob_func, ob_acc): Reference the above.
 855         (qh_acc): Adjust to keep the same size as ob_acc.
 856         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 857         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 858
 859 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 860
 861         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 862
 863 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 864             Ed Satterthwaite  <ehs@broadcom.com>
 865
 866         * mips.igen (mdmx): New (pseudo-)model.
 867         * mdmx.c, mdmx.igen: New files.
 868         * Makefile.in (SIM_OBJS): Add mdmx.o.
 869         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 870         New typedefs.
 871         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 872         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 873         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 874         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 875         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 876         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 877         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 878         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 879         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 880         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 881         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 882         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 883         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 884         (qh_fmtsel): New macros.
 885         (_sim_cpu): New member "acc".
 886         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 887         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 888
 889 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 890
 891         * interp.c: Use 'deprecated' rather than 'depreciated.'
 892         * sim-main.h: Likewise.
 893
 894 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 895
 896         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 897         which wouldn't compile anyway.
 898         * sim-main.h (unpredictable_action): New function prototype.
 899         (Unpredictable): Define to call igen function unpredictable().
 900         (NotWordValue): New macro to call igen function not_word_value().
 901         (UndefinedResult): Remove.
 902         * interp.c (undefined_result): Remove.
 903         (unpredictable_action): New function.
 904         * mips.igen (not_word_value, unpredictable): New functions.
 905         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 906         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 907         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 908         NotWordValue() to check for unpredictable inputs, then
 909         Unpredictable() to handle them.
 910
 911 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 912
 913         * mips.igen: Fix formatting of calls to Unpredictable().
 914
 915 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 916
 917         * interp.c (sim_open): Revert previous change.
 918
 919 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 920
 921         * interp.c (sim_open): Disable chunk of code that wrote code in
 922         vector table entries.
 923
 924 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 925
 926         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 927         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 928         unused definitions.
 929
 930 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 931
 932         * cp1.c: Fix many formatting issues.
 933
 934 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 935
 936         * cp1.c (fpu_format_name): New function to replace...
 937         (DOFMT): This.  Delete, and update all callers.
 938         (fpu_rounding_mode_name): New function to replace...
 939         (RMMODE): This.  Delete, and update all callers.
 940
 941 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 942
 943         * interp.c: Move FPU support routines from here to...
 944         * cp1.c: Here.  New file.
 945         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 946         (cp1.o): New target.
 947
 948 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 949
 950         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 951         * mips.igen (mips32, mips64): New models, add to all instructions
 952         and functions as appropriate.
 953         (loadstore_ea, check_u64): New variant for model mips64.
 954         (check_fmt_p): New variant for models mipsV and mips64, remove
 955         mipsV model marking fro other variant.
 956         (SLL) Rename to...
 957         (SLLa) this.
 958         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 959         for mips32 and mips64.
 960         (DCLO, DCLZ): New instructions for mips64.
 961
 962 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 963
 964         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 965         immediate or code as a hex value with the "%#lx" format.
 966         (ANDI): Likewise, and fix printed instruction name.
 967
 968 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 969
 970         * sim-main.h (UndefinedResult, Unpredictable): New macros
 971         which currently do nothing.
 972
 973 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 974
 975         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 976         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 977         (status_CU3): New definitions.
 978
 979         * sim-main.h (ExceptionCause): Add new values for MIPS32
 980         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 981         for DebugBreakPoint and NMIReset to note their status in
 982         MIPS32 and MIPS64.
 983         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 984         (SignalExceptionCacheErr): New exception macros.
 985
 986 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 987
 988         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 989         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 990         is always enabled.
 991         (SignalExceptionCoProcessorUnusable): Take as argument the
 992         unusable coprocessor number.
 993
 994 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 995
 996         * mips.igen: Fix formatting of all SignalException calls.
 997
 998 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 999
1000         * sim-main.h (SIGNEXTEND): Remove.
1001
1002 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1003
1004         * mips.igen: Remove gencode comment from top of file, fix
1005         spelling in another comment.
1006
1007 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1008
1009         * mips.igen (check_fmt, check_fmt_p): New functions to check
1010         whether specific floating point formats are usable.
1011         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1012         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1013         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1014         Use the new functions.
1015         (do_c_cond_fmt): Remove format checks...
1016         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1017
1018 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1019
1020         * mips.igen: Fix formatting of check_fpu calls.
1021
1022 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1023
1024         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1025
1026 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1027
1028         * mips.igen: Remove whitespace at end of lines.
1029
1030 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1031
1032         * mips.igen (loadstore_ea): New function to do effective
1033         address calculations.
1034         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1035         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1036         CACHE): Use loadstore_ea to do effective address computations.
1037
1038 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1039
1040         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1041         * mips.igen (LL, CxC1, MxC1): Likewise.
1042
1043 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1044
1045         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1046         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1047         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1048         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1049         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1050         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1051         Don't split opcode fields by hand, use the opcode field values
1052         provided by igen.
1053
1054 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1055
1056         * mips.igen (do_divu): Fix spacing.
1057
1058         * mips.igen (do_dsllv): Move to be right before DSLLV,
1059         to match the rest of the do_<shift> functions.
1060
1061 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1062
1063         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1064         DSRL32, do_dsrlv): Trace inputs and results.
1065
1066 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1067
1068         * mips.igen (CACHE): Provide instruction-printing string.
1069
1070         * interp.c (signal_exception): Comment tokens after #endif.
1071
1072 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1073
1074         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1075         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1076         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1077         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1078         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1079         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1080         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1081         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1082
1083 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1084
1085         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1086         instruction-printing string.
1087         (LWU): Use '64' as the filter flag.
1088
1089 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1090
1091         * mips.igen (SDXC1): Fix instruction-printing string.
1092
1093 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1094
1095         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1096         filter flags "32,f".
1097
1098 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1099
1100         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1101         as the filter flag.
1102
1103 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1104
1105         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1106         add a comma) so that it more closely match the MIPS ISA
1107         documentation opcode partitioning.
1108         (PREF): Put useful names on opcode fields, and include
1109         instruction-printing string.
1110
1111 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1112
1113         * mips.igen (check_u64): New function which in the future will
1114         check whether 64-bit instructions are usable and signal an
1115         exception if not.  Currently a no-op.
1116         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1117         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1118         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1119         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1120
1121         * mips.igen (check_fpu): New function which in the future will
1122         check whether FPU instructions are usable and signal an exception
1123         if not.  Currently a no-op.
1124         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1125         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1126         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1127         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1128         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1129         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1130         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1131         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1132
1133 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1134
1135         * mips.igen (do_load_left, do_load_right): Move to be immediately
1136         following do_load.
1137         (do_store_left, do_store_right): Move to be immediately following
1138         do_store.
1139
1140 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1141
1142         * mips.igen (mipsV): New model name.  Also, add it to
1143         all instructions and functions where it is appropriate.
1144
1145 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1146
1147         * mips.igen: For all functions and instructions, list model
1148         names that support that instruction one per line.
1149
1150 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1151
1152         * mips.igen: Add some additional comments about supported
1153         models, and about which instructions go where.
1154         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1155         order as is used in the rest of the file.
1156
1157 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1158
1159         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1160         indicating that ALU32_END or ALU64_END are there to check
1161         for overflow.
1162         (DADD): Likewise, but also remove previous comment about
1163         overflow checking.
1164
1165 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1166
1167         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1168         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1169         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1170         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1171         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1172         fields (i.e., add and move commas) so that they more closely
1173         match the MIPS ISA documentation opcode partitioning.
1174
1175 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1176
1177         * mips.igen (ADDI): Print immediate value.
1178         (BREAK): Print code.
1179         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1180         (SLL): Print "nop" specially, and don't run the code
1181         that does the shift for the "nop" case.
1182
1183 2001-11-17  Fred Fish  <fnf@redhat.com>
1184
1185         * sim-main.h (float_operation): Move enum declaration outside
1186         of _sim_cpu struct declaration.
1187
1188 2001-04-12  Jim Blandy  <jimb@redhat.com>
1189
1190         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1191         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1192         set of the FCSR.
1193         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1194         PENDING_FILL, and you can get the intended effect gracefully by
1195         calling PENDING_SCHED directly.
1196
1197 2001-02-23  Ben Elliston  <bje@redhat.com>
1198
1199         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1200         already defined elsewhere.
1201
1202 2001-02-19  Ben Elliston  <bje@redhat.com>
1203
1204         * sim-main.h (sim_monitor): Return an int.
1205         * interp.c (sim_monitor): Add return values.
1206         (signal_exception): Handle error conditions from sim_monitor.
1207
1208 2001-02-08  Ben Elliston  <bje@redhat.com>
1209
1210         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1211         (store_memory): Likewise, pass cia to sim_core_write*.
1212
1213 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1214
1215         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1216         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1217
1218 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1219
1220         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1221         * Makefile.in: Don't delete *.igen when cleaning directory.
1222
1223 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1224
1225         * m16.igen (break): Call SignalException not sim_engine_halt.
1226
1227 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1228
1229         From Jason Eckhardt:
1230         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1231
1232 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1233
1234         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1235
1236 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1237
1238         * mips.igen (do_dmultx): Fix typo.
1239
1240 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1241
1242         * configure: Regenerated to track ../common/aclocal.m4 changes.
1243
1244 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1245
1246         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1247
1248 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1249
1250         * sim-main.h (GPR_CLEAR): Define macro.
1251
1252 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1253
1254         * interp.c (decode_coproc): Output long using %lx and not %s.
1255
1256 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1257
1258         * interp.c (sim_open): Sort & extend dummy memory regions for
1259         --board=jmr3904 for eCos.
1260
1261 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1262
1263         * configure: Regenerated.
1264
1265 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1266
1267         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1268         calls, conditional on the simulator being in verbose mode.
1269
1270 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1271
1272         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1273         cache don't get ReservedInstruction traps.
1274
1275 1999-11-29  Mark Salter  <msalter@cygnus.com>
1276
1277         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1278         to clear status bits in sdisr register. This is how the hardware works.
1279
1280         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1281         being used by cygmon.
1282
1283 1999-11-11  Andrew Haley  <aph@cygnus.com>
1284
1285         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1286         instructions.
1287
1288 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1289
1290         * mips.igen (MULT): Correct previous mis-applied patch.
1291
1292 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1293
1294         * mips.igen (delayslot32): Handle sequence like
1295         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1296         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1297         (MULT): Actually pass the third register...
1298
1299 1999-09-03  Mark Salter  <msalter@cygnus.com>
1300
1301         * interp.c (sim_open): Added more memory aliases for additional
1302         hardware being touched by cygmon on jmr3904 board.
1303
1304 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1305
1306         * configure: Regenerated to track ../common/aclocal.m4 changes.
1307
1308 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1309
1310         * interp.c (sim_store_register): Handle case where client - GDB -
1311         specifies that a 4 byte register is 8 bytes in size.
1312         (sim_fetch_register): Ditto.
1313
1314 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1315
1316         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1317         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1318         (idt_monitor_base): Base address for IDT monitor traps.
1319         (pmon_monitor_base): Ditto for PMON.
1320         (lsipmon_monitor_base): Ditto for LSI PMON.
1321         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1322         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1323         (sim_firmware_command): New function.
1324         (mips_option_handler): Call it for OPTION_FIRMWARE.
1325         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1326         option was given, add no monitor by default.  Add BREAK hooks only if
1327         monitors are also there.
1328
1329 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1330
1331         * interp.c (sim_monitor): Flush output before reading input.
1332
1333 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1334
1335         * tconfig.in (SIM_HANDLES_LMA): Always define.
1336
1337 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1338
1339         From Mark Salter <msalter@cygnus.com>:
1340         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1341         (sim_open): Add setup for BSP board.
1342
1343 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1344
1345         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1346         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1347         them as unimplemented.
1348
1349 1999-05-08  Felix Lee  <flee@cygnus.com>
1350
1351         * configure: Regenerated to track ../common/aclocal.m4 changes.
1352
1353 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1354
1355         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1356
1357 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1358
1359         * configure.in: Any mips64vr5*-*-* target should have
1360         -DTARGET_ENABLE_FR=1.
1361         (default_endian): Any mips64vr*el-*-* target should default to
1362         LITTLE_ENDIAN.
1363         * configure: Re-generate.
1364
1365 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1366
1367         * mips.igen (ldl): Extend from _16_, not 32.
1368
1369 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1370
1371         * interp.c (sim_store_register): Force registers written to by GDB
1372         into an un-interpreted state.
1373
1374 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1375
1376         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1377         CPU, start periodic background I/O polls.
1378         (tx3904sio_poll): New function: periodic I/O poller.
1379
1380 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1381
1382         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1383
1384 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1385
1386         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1387         case statement.
1388
1389 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1390
1391         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1392         (load_word): Call SIM_CORE_SIGNAL hook on error.
1393         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1394         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1395         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1396         * sim-main.h (COP0_BADVADDR): Define.
1397         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1398         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1399         (_sim_cpu): Add exc_* fields to store register value snapshots.
1400         * mips.igen (*): Replace memory-related SignalException* calls
1401         with references to SIM_CORE_SIGNAL hook.
1402
1403         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1404         fix.
1405         * sim-main.c (*): Minor warning cleanups.
1406
1407 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1408
1409         * m16.igen (DADDIU5): Correct type-o.
1410
1411 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1412
1413         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1414         variables.
1415
1416 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1417
1418         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1419         to include path.
1420         (interp.o): Add dependency on itable.h
1421         (oengine.c, gencode): Delete remaining references.
1422         (BUILT_SRC_FROM_GEN): Clean up.
1423
1424 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1425
1426         * vr4run.c: New.
1427         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1428         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1429         tmp-run-hack) : New.
1430         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1431         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1432         Drop the "64" qualifier to get the HACK generator working.
1433         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1434         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1435         qualifier to get the hack generator working.
1436         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1437         (DSLL): Use do_dsll.
1438         (DSLLV): Use do_dsllv.
1439         (DSRA): Use do_dsra.
1440         (DSRL): Use do_dsrl.
1441         (DSRLV): Use do_dsrlv.
1442         (BC1): Move *vr4100 to get the HACK generator working.
1443         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1444         get the HACK generator working.
1445         (MACC) Rename to get the HACK generator working.
1446         (DMACC,MACCS,DMACCS): Add the 64.
1447
1448 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1449
1450         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1451         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1452
1453 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1454
1455     * mips/interp.c (DEBUG): Cleanups.
1456
1457 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1458
1459         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1460         (tx3904sio_tickle): fflush after a stdout character output.
1461
1462 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1463
1464         * interp.c (sim_close): Uninstall modules.
1465
1466 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1467
1468         * sim-main.h, interp.c (sim_monitor): Change to global
1469         function.
1470
1471 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1472
1473         * configure.in (vr4100): Only include vr4100 instructions in
1474         simulator.
1475         * configure: Re-generate.
1476         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1477
1478 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1479
1480         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1481         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1482         true alternative.
1483
1484         * configure.in (sim_default_gen, sim_use_gen): Replace with
1485         sim_gen.
1486         (--enable-sim-igen): Delete config option. Always using IGEN.
1487         * configure: Re-generate.
1488
1489         * Makefile.in (gencode): Kill, kill, kill.
1490         * gencode.c: Ditto.
1491
1492 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1493
1494         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1495         bit mips16 igen simulator.
1496         * configure: Re-generate.
1497
1498         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1499         as part of vr4100 ISA.
1500         * vr.igen: Mark all instructions as 64 bit only.
1501
1502 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1503
1504         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1505         Pacify GCC.
1506
1507 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1508
1509         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1510         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1511         * configure: Re-generate.
1512
1513         * m16.igen (BREAK): Define breakpoint instruction.
1514         (JALX32): Mark instruction as mips16 and not r3900.
1515         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1516
1517         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1518
1519 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1520
1521         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1522         insn as a debug breakpoint.
1523
1524         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1525         pending.slot_size.
1526         (PENDING_SCHED): Clean up trace statement.
1527         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1528         (PENDING_FILL): Delay write by only one cycle.
1529         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1530
1531         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1532         of pending writes.
1533         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1534         32 & 64.
1535         (pending_tick): Move incrementing of index to FOR statement.
1536         (pending_tick): Only update PENDING_OUT after a write has occured.
1537
1538         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1539         build simulator.
1540         * configure: Re-generate.
1541
1542         * interp.c (sim_engine_run OLD): Delete explicit call to
1543         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1544
1545 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1546
1547         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1548         interrupt level number to match changed SignalExceptionInterrupt
1549         macro.
1550
1551 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1552
1553         * interp.c: #include "itable.h" if WITH_IGEN.
1554         (get_insn_name): New function.
1555         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1556         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1557
1558 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1559
1560         * configure: Rebuilt to inhale new common/aclocal.m4.
1561
1562 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1563
1564         * dv-tx3904sio.c: Include sim-assert.h.
1565
1566 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1567
1568         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1569         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1570         Reorganize target-specific sim-hardware checks.
1571         * configure: rebuilt.
1572         * interp.c (sim_open): For tx39 target boards, set
1573         OPERATING_ENVIRONMENT, add tx3904sio devices.
1574         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1575         ROM executables.  Install dv-sockser into sim-modules list.
1576
1577         * dv-tx3904irc.c: Compiler warning clean-up.
1578         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1579         frequent hw-trace messages.
1580
1581 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1582
1583         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1584
1585 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1586
1587         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1588
1589         * vr.igen: New file.
1590         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1591         * mips.igen: Define vr4100 model. Include vr.igen.
1592 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1593
1594         * mips.igen (check_mf_hilo): Correct check.
1595
1596 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1597
1598         * sim-main.h (interrupt_event): Add prototype.
1599
1600         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1601         register_ptr, register_value.
1602         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1603
1604         * sim-main.h (tracefh): Make extern.
1605
1606 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1607
1608         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1609         Reduce unnecessarily high timer event frequency.
1610         * dv-tx3904cpu.c: Ditto for interrupt event.
1611
1612 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1613
1614         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1615         to allay warnings.
1616         (interrupt_event): Made non-static.
1617
1618         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1619         interchange of configuration values for external vs. internal
1620         clock dividers.
1621
1622 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1623
1624         * mips.igen (BREAK): Moved code to here for
1625         simulator-reserved break instructions.
1626         * gencode.c (build_instruction): Ditto.
1627         * interp.c (signal_exception): Code moved from here.  Non-
1628         reserved instructions now use exception vector, rather
1629         than halting sim.
1630         * sim-main.h: Moved magic constants to here.
1631
1632 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1633
1634         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1635         register upon non-zero interrupt event level, clear upon zero
1636         event value.
1637         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1638         by passing zero event value.
1639         (*_io_{read,write}_buffer): Endianness fixes.
1640         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1641         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1642
1643         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1644         serial I/O and timer module at base address 0xFFFF0000.
1645
1646 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1647
1648         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1649         and BigEndianCPU.
1650
1651 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1652
1653         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1654         parts.
1655         * configure: Update.
1656
1657 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1658
1659         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1660         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1661         * configure.in: Include tx3904tmr in hw_device list.
1662         * configure: Rebuilt.
1663         * interp.c (sim_open): Instantiate three timer instances.
1664         Fix address typo of tx3904irc instance.
1665
1666 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1667
1668         * interp.c (signal_exception): SystemCall exception now uses
1669         the exception vector.
1670
1671 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1672
1673         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1674         to allay warnings.
1675
1676 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1677
1678         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1679
1680 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1681
1682         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1683
1684         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1685         sim-main.h. Declare a struct hw_descriptor instead of struct
1686         hw_device_descriptor.
1687
1688 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1689
1690         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1691         right bits and then re-align left hand bytes to correct byte
1692         lanes.  Fix incorrect computation in do_store_left when loading
1693         bytes from second word.
1694
1695 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1696
1697         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1698         * interp.c (sim_open): Only create a device tree when HW is
1699         enabled.
1700
1701         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1702         * interp.c (signal_exception): Ditto.
1703
1704 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1705
1706         * gencode.c: Mark BEGEZALL as LIKELY.
1707
1708 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1709
1710         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1711         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1712
1713 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1714
1715         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1716         modules.  Recognize TX39 target with "mips*tx39" pattern.
1717         * configure: Rebuilt.
1718         * sim-main.h (*): Added many macros defining bits in
1719         TX39 control registers.
1720         (SignalInterrupt): Send actual PC instead of NULL.
1721         (SignalNMIReset): New exception type.
1722         * interp.c (board): New variable for future use to identify
1723         a particular board being simulated.
1724         (mips_option_handler,mips_options): Added "--board" option.
1725         (interrupt_event): Send actual PC.
1726         (sim_open): Make memory layout conditional on board setting.
1727         (signal_exception): Initial implementation of hardware interrupt
1728         handling.  Accept another break instruction variant for simulator
1729         exit.
1730         (decode_coproc): Implement RFE instruction for TX39.
1731         (mips.igen): Decode RFE instruction as such.
1732         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1733         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1734         bbegin to implement memory map.
1735         * dv-tx3904cpu.c: New file.
1736         * dv-tx3904irc.c: New file.
1737
1738 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1739
1740         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1741
1742 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1743
1744         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1745         with calls to check_div_hilo.
1746
1747 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1748
1749         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1750         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1751         Add special r3900 version of do_mult_hilo.
1752         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1753         with calls to check_mult_hilo.
1754         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1755         with calls to check_div_hilo.
1756
1757 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1758
1759         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1760         Document a replacement.
1761
1762 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1763
1764         * interp.c (sim_monitor): Make mon_printf work.
1765
1766 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1767
1768         * sim-main.h (INSN_NAME): New arg `cpu'.
1769
1770 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1771
1772         * configure: Regenerated to track ../common/aclocal.m4 changes.
1773
1774 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1775
1776         * configure: Regenerated to track ../common/aclocal.m4 changes.
1777         * config.in: Ditto.
1778
1779 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1780
1781         * acconfig.h: New file.
1782         * configure.in: Reverted change of Apr 24; use sinclude again.
1783
1784 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1785
1786         * configure: Regenerated to track ../common/aclocal.m4 changes.
1787         * config.in: Ditto.
1788
1789 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1790
1791         * configure.in: Don't call sinclude.
1792
1793 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1794
1795         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1796
1797 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1798
1799         * mips.igen (ERET): Implement.
1800
1801         * interp.c (decode_coproc): Return sign-extended EPC.
1802
1803         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1804
1805         * interp.c (signal_exception): Do not ignore Trap.
1806         (signal_exception): On TRAP, restart at exception address.
1807         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1808         (signal_exception): Update.
1809         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1810         so that TRAP instructions are caught.
1811
1812 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1813
1814         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1815         contains HI/LO access history.
1816         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1817         (HIACCESS, LOACCESS): Delete, replace with
1818         (HIHISTORY, LOHISTORY): New macros.
1819         (CHECKHILO): Delete all, moved to mips.igen
1820
1821         * gencode.c (build_instruction): Do not generate checks for
1822         correct HI/LO register usage.
1823
1824         * interp.c (old_engine_run): Delete checks for correct HI/LO
1825         register usage.
1826
1827         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1828         check_mf_cycles): New functions.
1829         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1830         do_divu, domultx, do_mult, do_multu): Use.
1831
1832         * tx.igen ("madd", "maddu"): Use.
1833
1834 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1835
1836         * mips.igen (DSRAV): Use function do_dsrav.
1837         (SRAV): Use new function do_srav.
1838
1839         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1840         (B): Sign extend 11 bit immediate.
1841         (EXT-B*): Shift 16 bit immediate left by 1.
1842         (ADDIU*): Don't sign extend immediate value.
1843
1844 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1845
1846         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1847
1848         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1849         functions.
1850
1851         * mips.igen (delayslot32, nullify_next_insn): New functions.
1852         (m16.igen): Always include.
1853         (do_*): Add more tracing.
1854
1855         * m16.igen (delayslot16): Add NIA argument, could be called by a
1856         32 bit MIPS16 instruction.
1857
1858         * interp.c (ifetch16): Move function from here.
1859         * sim-main.c (ifetch16): To here.
1860
1861         * sim-main.c (ifetch16, ifetch32): Update to match current
1862         implementations of LH, LW.
1863         (signal_exception): Don't print out incorrect hex value of illegal
1864         instruction.
1865
1866 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1867
1868         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1869         instruction.
1870
1871         * m16.igen: Implement MIPS16 instructions.
1872
1873         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1874         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1875         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1876         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1877         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1878         bodies of corresponding code from 32 bit insn to these.  Also used
1879         by MIPS16 versions of functions.
1880
1881         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1882         (IMEM16): Drop NR argument from macro.
1883
1884 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1885
1886         * Makefile.in (SIM_OBJS): Add sim-main.o.
1887
1888         * sim-main.h (address_translation, load_memory, store_memory,
1889         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1890         as INLINE_SIM_MAIN.
1891         (pr_addr, pr_uword64): Declare.
1892         (sim-main.c): Include when H_REVEALS_MODULE_P.
1893
1894         * interp.c (address_translation, load_memory, store_memory,
1895         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1896         from here.
1897         * sim-main.c: To here. Fix compilation problems.
1898
1899         * configure.in: Enable inlining.
1900         * configure: Re-config.
1901
1902 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1903
1904         * configure: Regenerated to track ../common/aclocal.m4 changes.
1905
1906 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1907
1908         * mips.igen: Include tx.igen.
1909         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1910         * tx.igen: New file, contains MADD and MADDU.
1911
1912         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1913         the hardwired constant `7'.
1914         (store_memory): Ditto.
1915         (LOADDRMASK): Move definition to sim-main.h.
1916
1917         mips.igen (MTC0): Enable for r3900.
1918         (ADDU): Add trace.
1919
1920         mips.igen (do_load_byte): Delete.
1921         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1922         do_store_right): New functions.
1923         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1924
1925         configure.in: Let the tx39 use igen again.
1926         configure: Update.
1927
1928 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1929
1930         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1931         not an address sized quantity.  Return zero for cache sizes.
1932
1933 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1934
1935         * mips.igen (r3900): r3900 does not support 64 bit integer
1936         operations.
1937
1938 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1939
1940         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1941         than igen one.
1942         * configure : Rebuild.
1943
1944 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1945
1946         * configure: Regenerated to track ../common/aclocal.m4 changes.
1947
1948 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1949
1950         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1951
1952 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1953
1954         * configure: Regenerated to track ../common/aclocal.m4 changes.
1955         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1956
1957 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1958
1959         * configure: Regenerated to track ../common/aclocal.m4 changes.
1960
1961 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1962
1963         * interp.c (Max, Min): Comment out functions. Not yet used.
1964
1965 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1966
1967         * configure: Regenerated to track ../common/aclocal.m4 changes.
1968
1969 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1970
1971         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1972         configurable settings for stand-alone simulator.
1973
1974         * configure.in: Added X11 search, just in case.
1975
1976         * configure: Regenerated.
1977
1978 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1979
1980         * interp.c (sim_write, sim_read, load_memory, store_memory):
1981         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1982
1983 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1984
1985         * sim-main.h (GETFCC): Return an unsigned value.
1986
1987 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1988
1989         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1990         (DADD): Result destination is RD not RT.
1991
1992 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1993
1994         * sim-main.h (HIACCESS, LOACCESS): Always define.
1995
1996         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1997
1998         * interp.c (sim_info): Delete.
1999
2000 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2001
2002         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2003         (mips_option_handler): New argument `cpu'.
2004         (sim_open): Update call to sim_add_option_table.
2005
2006 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2007
2008         * mips.igen (CxC1): Add tracing.
2009
2010 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2011
2012         * sim-main.h (Max, Min): Declare.
2013
2014         * interp.c (Max, Min): New functions.
2015
2016         * mips.igen (BC1): Add tracing.
2017
2018 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2019
2020         * interp.c Added memory map for stack in vr4100
2021
2022 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2023
2024         * interp.c (load_memory): Add missing "break"'s.
2025
2026 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2027
2028         * interp.c (sim_store_register, sim_fetch_register): Pass in
2029         length parameter.  Return -1.
2030
2031 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2032
2033         * interp.c: Added hardware init hook, fixed warnings.
2034
2035 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2036
2037         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2038
2039 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2040
2041         * interp.c (ifetch16): New function.
2042
2043         * sim-main.h (IMEM32): Rename IMEM.
2044         (IMEM16_IMMED): Define.
2045         (IMEM16): Define.
2046         (DELAY_SLOT): Update.
2047
2048         * m16run.c (sim_engine_run): New file.
2049
2050         * m16.igen: All instructions except LB.
2051         (LB): Call do_load_byte.
2052         * mips.igen (do_load_byte): New function.
2053         (LB): Call do_load_byte.
2054
2055         * mips.igen: Move spec for insn bit size and high bit from here.
2056         * Makefile.in (tmp-igen, tmp-m16): To here.
2057
2058         * m16.dc: New file, decode mips16 instructions.
2059
2060         * Makefile.in (SIM_NO_ALL): Define.
2061         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2062
2063 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2064
2065         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2066         point unit to 32 bit registers.
2067         * configure: Re-generate.
2068
2069 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2070
2071         * configure.in (sim_use_gen): Make IGEN the default simulator
2072         generator for generic 32 and 64 bit mips targets.
2073         * configure: Re-generate.
2074
2075 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2076
2077         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2078         bitsize.
2079
2080         * interp.c (sim_fetch_register, sim_store_register): Read/write
2081         FGR from correct location.
2082         (sim_open): Set size of FGR's according to
2083         WITH_TARGET_FLOATING_POINT_BITSIZE.
2084
2085         * sim-main.h (FGR): Store floating point registers in a separate
2086         array.
2087
2088 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2089
2090         * configure: Regenerated to track ../common/aclocal.m4 changes.
2091
2092 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2093
2094         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2095
2096         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2097
2098         * interp.c (pending_tick): New function.  Deliver pending writes.
2099
2100         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2101         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2102         it can handle mixed sized quantites and single bits.
2103
2104 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2105
2106         * interp.c (oengine.h): Do not include when building with IGEN.
2107         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2108         (sim_info): Ditto for PROCESSOR_64BIT.
2109         (sim_monitor): Replace ut_reg with unsigned_word.
2110         (*): Ditto for t_reg.
2111         (LOADDRMASK): Define.
2112         (sim_open): Remove defunct check that host FP is IEEE compliant,
2113         using software to emulate floating point.
2114         (value_fpr, ...): Always compile, was conditional on HASFPU.
2115
2116 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2117
2118         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2119         size.
2120
2121         * interp.c (SD, CPU): Define.
2122         (mips_option_handler): Set flags in each CPU.
2123         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2124         (sim_close): Do not clear STATE, deleted anyway.
2125         (sim_write, sim_read): Assume CPU zero's vm should be used for
2126         data transfers.
2127         (sim_create_inferior): Set the PC for all processors.
2128         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2129         argument.
2130         (mips16_entry): Pass correct nr of args to store_word, load_word.
2131         (ColdReset): Cold reset all cpu's.
2132         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2133         (sim_monitor, load_memory, store_memory, signal_exception): Use
2134         `CPU' instead of STATE_CPU.
2135
2136
2137         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2138         SD or CPU_.
2139
2140         * sim-main.h (signal_exception): Add sim_cpu arg.
2141         (SignalException*): Pass both SD and CPU to signal_exception.
2142         * interp.c (signal_exception): Update.
2143
2144         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2145         Ditto
2146         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2147         address_translation): Ditto
2148         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2149
2150 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2151
2152         * configure: Regenerated to track ../common/aclocal.m4 changes.
2153
2154 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2155
2156         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2157
2158         * mips.igen (model): Map processor names onto BFD name.
2159
2160         * sim-main.h (CPU_CIA): Delete.
2161         (SET_CIA, GET_CIA): Define
2162
2163 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2164
2165         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2166         regiser.
2167
2168         * configure.in (default_endian): Configure a big-endian simulator
2169         by default.
2170         * configure: Re-generate.
2171
2172 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2173
2174         * configure: Regenerated to track ../common/aclocal.m4 changes.
2175
2176 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2177
2178         * interp.c (sim_monitor): Handle Densan monitor outbyte
2179         and inbyte functions.
2180
2181 1997-12-29  Felix Lee  <flee@cygnus.com>
2182
2183         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2184
2185 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2186
2187         * Makefile.in (tmp-igen): Arrange for $zero to always be
2188         reset to zero after every instruction.
2189
2190 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2191
2192         * configure: Regenerated to track ../common/aclocal.m4 changes.
2193         * config.in: Ditto.
2194
2195 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2196
2197         * mips.igen (MSUB): Fix to work like MADD.
2198         * gencode.c (MSUB): Similarly.
2199
2200 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2201
2202         * configure: Regenerated to track ../common/aclocal.m4 changes.
2203
2204 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2205
2206         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2207
2208 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2209
2210         * sim-main.h (sim-fpu.h): Include.
2211
2212         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2213         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2214         using host independant sim_fpu module.
2215
2216 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2217
2218         * interp.c (signal_exception): Report internal errors with SIGABRT
2219         not SIGQUIT.
2220
2221         * sim-main.h (C0_CONFIG): New register.
2222         (signal.h): No longer include.
2223
2224         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2225
2226 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2227
2228         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2229
2230 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2231
2232         * mips.igen: Tag vr5000 instructions.
2233         (ANDI): Was missing mipsIV model, fix assembler syntax.
2234         (do_c_cond_fmt): New function.
2235         (C.cond.fmt): Handle mips I-III which do not support CC field
2236         separatly.
2237         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2238         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2239         in IV3.2 spec.
2240         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2241         vr5000 which saves LO in a GPR separatly.
2242
2243         * configure.in (enable-sim-igen): For vr5000, select vr5000
2244         specific instructions.
2245         * configure: Re-generate.
2246
2247 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2248
2249         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2250
2251         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2252         fmt_uninterpreted_64 bit cases to switch.  Convert to
2253         fmt_formatted,
2254
2255         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2256
2257         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2258         as specified in IV3.2 spec.
2259         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2260
2261 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2262
2263         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2264         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2265         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2266         PENDING_FILL versions of instructions.  Simplify.
2267         (X): New function.
2268         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2269         instructions.
2270         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2271         a signed value.
2272         (MTHI, MFHI): Disable code checking HI-LO.
2273
2274         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2275         global.
2276         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2277
2278 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2279
2280         * gencode.c (build_mips16_operands): Replace IPC with cia.
2281
2282         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2283         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2284         IPC to `cia'.
2285         (UndefinedResult): Replace function with macro/function
2286         combination.
2287         (sim_engine_run): Don't save PC in IPC.
2288
2289         * sim-main.h (IPC): Delete.
2290
2291
2292         * interp.c (signal_exception, store_word, load_word,
2293         address_translation, load_memory, store_memory, cache_op,
2294         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2295         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2296         current instruction address - cia - argument.
2297         (sim_read, sim_write): Call address_translation directly.
2298         (sim_engine_run): Rename variable vaddr to cia.
2299         (signal_exception): Pass cia to sim_monitor
2300
2301         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2302         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2303         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2304
2305         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2306         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2307         SIM_ASSERT.
2308
2309         * interp.c (signal_exception): Pass restart address to
2310         sim_engine_restart.
2311
2312         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2313         idecode.o): Add dependency.
2314
2315         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2316         Delete definitions
2317         (DELAY_SLOT): Update NIA not PC with branch address.
2318         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2319
2320         * mips.igen: Use CIA not PC in branch calculations.
2321         (illegal): Call SignalException.
2322         (BEQ, ADDIU): Fix assembler.
2323
2324 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2325
2326         * m16.igen (JALX): Was missing.
2327
2328         * configure.in (enable-sim-igen): New configuration option.
2329         * configure: Re-generate.
2330
2331         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2332
2333         * interp.c (load_memory, store_memory): Delete parameter RAW.
2334         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2335         bypassing {load,store}_memory.
2336
2337         * sim-main.h (ByteSwapMem): Delete definition.
2338
2339         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2340
2341         * interp.c (sim_do_command, sim_commands): Delete mips specific
2342         commands.  Handled by module sim-options.
2343
2344         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2345         (WITH_MODULO_MEMORY): Define.
2346
2347         * interp.c (sim_info): Delete code printing memory size.
2348
2349         * interp.c (mips_size): Nee sim_size, delete function.
2350         (power2): Delete.
2351         (monitor, monitor_base, monitor_size): Delete global variables.
2352         (sim_open, sim_close): Delete code creating monitor and other
2353         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2354         manage memory regions.
2355         (load_memory, store_memory): Use sim-core for memory model.
2356
2357         * interp.c (address_translation): Delete all memory map code
2358         except line forcing 32 bit addresses.
2359
2360 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2361
2362         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2363         trace options.
2364
2365         * interp.c (logfh, logfile): Delete globals.
2366         (sim_open, sim_close): Delete code opening & closing log file.
2367         (mips_option_handler): Delete -l and -n options.
2368         (OPTION mips_options): Ditto.
2369
2370         * interp.c (OPTION mips_options): Rename option trace to dinero.
2371         (mips_option_handler): Update.
2372
2373 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2374
2375         * interp.c (fetch_str): New function.
2376         (sim_monitor): Rewrite using sim_read & sim_write.
2377         (sim_open): Check magic number.
2378         (sim_open): Write monitor vectors into memory using sim_write.
2379         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2380         (sim_read, sim_write): Simplify - transfer data one byte at a
2381         time.
2382         (load_memory, store_memory): Clarify meaning of parameter RAW.
2383
2384         * sim-main.h (isHOST): Defete definition.
2385         (isTARGET): Mark as depreciated.
2386         (address_translation): Delete parameter HOST.
2387
2388         * interp.c (address_translation): Delete parameter HOST.
2389
2390 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2391
2392         * mips.igen:
2393
2394         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2395         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2396
2397 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2398
2399         * mips.igen: Add model filter field to records.
2400
2401 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2402
2403         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2404
2405         interp.c (sim_engine_run): Do not compile function sim_engine_run
2406         when WITH_IGEN == 1.
2407
2408         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2409         target architecture.
2410
2411         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2412         igen. Replace with configuration variables sim_igen_flags /
2413         sim_m16_flags.
2414
2415         * m16.igen: New file.  Copy mips16 insns here.
2416         * mips.igen: From here.
2417
2418 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2419
2420         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2421         to top.
2422         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2423
2424 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2425
2426         * gencode.c (build_instruction): Follow sim_write's lead in using
2427         BigEndianMem instead of !ByteSwapMem.
2428
2429 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2430
2431         * configure.in (sim_gen): Dependent on target, select type of
2432         generator.  Always select old style generator.
2433
2434         configure: Re-generate.
2435
2436         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2437         targets.
2438         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2439         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2440         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2441         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2442         SIM_@sim_gen@_*, set by autoconf.
2443
2444 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2445
2446         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2447
2448         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2449         CURRENT_FLOATING_POINT instead.
2450
2451         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2452         (address_translation): Raise exception InstructionFetch when
2453         translation fails and isINSTRUCTION.
2454
2455         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2456         sim_engine_run): Change type of of vaddr and paddr to
2457         address_word.
2458         (address_translation, prefetch, load_memory, store_memory,
2459         cache_op): Change type of vAddr and pAddr to address_word.
2460
2461         * gencode.c (build_instruction): Change type of vaddr and paddr to
2462         address_word.
2463
2464 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2465
2466         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2467         macro to obtain result of ALU op.
2468
2469 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2470
2471         * interp.c (sim_info): Call profile_print.
2472
2473 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2474
2475         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2476
2477         * sim-main.h (WITH_PROFILE): Do not define, defined in
2478         common/sim-config.h.  Use sim-profile module.
2479         (simPROFILE): Delete defintion.
2480
2481         * interp.c (PROFILE): Delete definition.
2482         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2483         (sim_close): Delete code writing profile histogram.
2484         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2485         Delete.
2486         (sim_engine_run): Delete code profiling the PC.
2487
2488 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2489
2490         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2491
2492         * interp.c (sim_monitor): Make register pointers of type
2493         unsigned_word*.
2494
2495         * sim-main.h: Make registers of type unsigned_word not
2496         signed_word.
2497
2498 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2499
2500         * interp.c (sync_operation): Rename from SyncOperation, make
2501         global, add SD argument.
2502         (prefetch): Rename from Prefetch, make global, add SD argument.
2503         (decode_coproc): Make global.
2504
2505         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2506
2507         * gencode.c (build_instruction): Generate DecodeCoproc not
2508         decode_coproc calls.
2509
2510         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2511         (SizeFGR): Move to sim-main.h
2512         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2513         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2514         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2515         sim-main.h.
2516         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2517         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2518         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2519         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2520         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2521         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2522
2523         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2524         exception.
2525         (sim-alu.h): Include.
2526         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2527         (sim_cia): Typedef to instruction_address.
2528
2529 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2530
2531         * Makefile.in (interp.o): Rename generated file engine.c to
2532         oengine.c.
2533
2534         * interp.c: Update.
2535
2536 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2537
2538         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2539
2540 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2541
2542         * gencode.c (build_instruction): For "FPSQRT", output correct
2543         number of arguments to Recip.
2544
2545 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2546
2547         * Makefile.in (interp.o): Depends on sim-main.h
2548
2549         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2550
2551         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2552         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2553         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2554         STATE, DSSTATE): Define
2555         (GPR, FGRIDX, ..): Define.
2556
2557         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2558         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2559         (GPR, FGRIDX, ...): Delete macros.
2560
2561         * interp.c: Update names to match defines from sim-main.h
2562
2563 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2564
2565         * interp.c (sim_monitor): Add SD argument.
2566         (sim_warning): Delete.  Replace calls with calls to
2567         sim_io_eprintf.
2568         (sim_error): Delete. Replace calls with sim_io_error.
2569         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2570         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2571         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2572         argument.
2573         (mips_size): Rename from sim_size. Add SD argument.
2574
2575         * interp.c (simulator): Delete global variable.
2576         (callback): Delete global variable.
2577         (mips_option_handler, sim_open, sim_write, sim_read,
2578         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2579         sim_size,sim_monitor): Use sim_io_* not callback->*.
2580         (sim_open): ZALLOC simulator struct.
2581         (PROFILE): Do not define.
2582
2583 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2584
2585         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2586         support.h with corresponding code.
2587
2588         * sim-main.h (word64, uword64), support.h: Move definition to
2589         sim-main.h.
2590         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2591
2592         * support.h: Delete
2593         * Makefile.in: Update dependencies
2594         * interp.c: Do not include.
2595
2596 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2597
2598         * interp.c (address_translation, load_memory, store_memory,
2599         cache_op): Rename to from AddressTranslation et.al., make global,
2600         add SD argument
2601
2602         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2603         CacheOp): Define.
2604
2605         * interp.c (SignalException): Rename to signal_exception, make
2606         global.
2607
2608         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2609
2610         * sim-main.h (SignalException, SignalExceptionInterrupt,
2611         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2612         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2613         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2614         Define.
2615
2616         * interp.c, support.h: Use.
2617
2618 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2619
2620         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2621         to value_fpr / store_fpr. Add SD argument.
2622         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2623         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2624
2625         * sim-main.h (ValueFPR, StoreFPR): Define.
2626
2627 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2628
2629         * interp.c (sim_engine_run): Check consistency between configure
2630         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2631         and HASFPU.
2632
2633         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2634         (mips_fpu): Configure WITH_FLOATING_POINT.
2635         (mips_endian): Configure WITH_TARGET_ENDIAN.
2636         * configure: Update.
2637
2638 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2639
2640         * configure: Regenerated to track ../common/aclocal.m4 changes.
2641
2642 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2643
2644         * configure: Regenerated.
2645
2646 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2647
2648         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2649
2650 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2651
2652         * gencode.c (print_igen_insn_models): Assume certain architectures
2653         include all mips* instructions.
2654         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2655         instruction.
2656
2657         * Makefile.in (tmp.igen): Add target. Generate igen input from
2658         gencode file.
2659
2660         * gencode.c (FEATURE_IGEN): Define.
2661         (main): Add --igen option.  Generate output in igen format.
2662         (process_instructions): Format output according to igen option.
2663         (print_igen_insn_format): New function.
2664         (print_igen_insn_models): New function.
2665         (process_instructions): Only issue warnings and ignore
2666         instructions when no FEATURE_IGEN.
2667
2668 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2669
2670         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2671         MIPS targets.
2672
2673 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2674
2675         * configure: Regenerated to track ../common/aclocal.m4 changes.
2676
2677 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2678
2679         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2680         SIM_RESERVED_BITS): Delete, moved to common.
2681         (SIM_EXTRA_CFLAGS): Update.
2682
2683 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2684
2685         * configure.in: Configure non-strict memory alignment.
2686         * configure: Regenerated to track ../common/aclocal.m4 changes.
2687
2688 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2689
2690         * configure: Regenerated to track ../common/aclocal.m4 changes.
2691
2692 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2693
2694         * gencode.c (SDBBP,DERET): Added (3900) insns.
2695         (RFE): Turn on for 3900.
2696         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2697         (dsstate): Made global.
2698         (SUBTARGET_R3900): Added.
2699         (CANCELDELAYSLOT): New.
2700         (SignalException): Ignore SystemCall rather than ignore and
2701         terminate.  Add DebugBreakPoint handling.
2702         (decode_coproc): New insns RFE, DERET; and new registers Debug
2703         and DEPC protected by SUBTARGET_R3900.
2704         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2705         bits explicitly.
2706         * Makefile.in,configure.in: Add mips subtarget option.
2707         * configure: Update.
2708
2709 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2710
2711         * gencode.c: Add r3900 (tx39).
2712
2713
2714 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2715
2716         * gencode.c (build_instruction): Don't need to subtract 4 for
2717         JALR, just 2.
2718
2719 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2720
2721         * interp.c: Correct some HASFPU problems.
2722
2723 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2724
2725         * configure: Regenerated to track ../common/aclocal.m4 changes.
2726
2727 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2728
2729         * interp.c (mips_options): Fix samples option short form, should
2730         be `x'.
2731
2732 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2733
2734         * interp.c (sim_info): Enable info code.  Was just returning.
2735
2736 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2737
2738         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2739         MFC0.
2740
2741 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2742
2743         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2744         constants.
2745         (build_instruction): Ditto for LL.
2746
2747 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2748
2749         * configure: Regenerated to track ../common/aclocal.m4 changes.
2750
2751 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2752
2753         * configure: Regenerated to track ../common/aclocal.m4 changes.
2754         * config.in: Ditto.
2755
2756 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2757
2758         * interp.c (sim_open): Add call to sim_analyze_program, update
2759         call to sim_config.
2760
2761 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2762
2763         * interp.c (sim_kill): Delete.
2764         (sim_create_inferior): Add ABFD argument. Set PC from same.
2765         (sim_load): Move code initializing trap handlers from here.
2766         (sim_open): To here.
2767         (sim_load): Delete, use sim-hload.c.
2768
2769         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2770
2771 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2772
2773         * configure: Regenerated to track ../common/aclocal.m4 changes.
2774         * config.in: Ditto.
2775
2776 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2777
2778         * interp.c (sim_open): Add ABFD argument.
2779         (sim_load): Move call to sim_config from here.
2780         (sim_open): To here.  Check return status.
2781
2782 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2783
2784         * gencode.c (build_instruction): Two arg MADD should
2785         not assign result to $0.
2786
2787 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2788
2789         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2790         * sim/mips/configure.in: Regenerate.
2791
2792 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2793
2794         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2795         signed8, unsigned8 et.al. types.
2796
2797         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2798         hosts when selecting subreg.
2799
2800 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2801
2802         * interp.c (sim_engine_run): Reset the ZERO register to zero
2803         regardless of FEATURE_WARN_ZERO.
2804         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2805
2806 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2807
2808         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2809         (SignalException): For BreakPoints ignore any mode bits and just
2810         save the PC.
2811         (SignalException): Always set the CAUSE register.
2812
2813 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2814
2815         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2816         exception has been taken.
2817
2818         * interp.c: Implement the ERET and mt/f sr instructions.
2819
2820 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2821
2822         * interp.c (SignalException): Don't bother restarting an
2823         interrupt.
2824
2825 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2826
2827         * interp.c (SignalException): Really take an interrupt.
2828         (interrupt_event): Only deliver interrupts when enabled.
2829
2830 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2831
2832         * interp.c (sim_info): Only print info when verbose.
2833         (sim_info) Use sim_io_printf for output.
2834
2835 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2836
2837         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2838         mips architectures.
2839
2840 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2841
2842         * interp.c (sim_do_command): Check for common commands if a
2843         simulator specific command fails.
2844
2845 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2846
2847         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2848         and simBE when DEBUG is defined.
2849
2850 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2851
2852         * interp.c (interrupt_event): New function.  Pass exception event
2853         onto exception handler.
2854
2855         * configure.in: Check for stdlib.h.
2856         * configure: Regenerate.
2857
2858         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2859         variable declaration.
2860         (build_instruction): Initialize memval1.
2861         (build_instruction): Add UNUSED attribute to byte, bigend,
2862         reverse.
2863         (build_operands): Ditto.
2864
2865         * interp.c: Fix GCC warnings.
2866         (sim_get_quit_code): Delete.
2867
2868         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2869         * Makefile.in: Ditto.
2870         * configure: Re-generate.
2871
2872         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2873
2874 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2875
2876         * interp.c (mips_option_handler): New function parse argumes using
2877         sim-options.
2878         (myname): Replace with STATE_MY_NAME.
2879         (sim_open): Delete check for host endianness - performed by
2880         sim_config.
2881         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2882         (sim_open): Move much of the initialization from here.
2883         (sim_load): To here.  After the image has been loaded and
2884         endianness set.
2885         (sim_open): Move ColdReset from here.
2886         (sim_create_inferior): To here.
2887         (sim_open): Make FP check less dependant on host endianness.
2888
2889         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2890         run.
2891         * interp.c (sim_set_callbacks): Delete.
2892
2893         * interp.c (membank, membank_base, membank_size): Replace with
2894         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2895         (sim_open): Remove call to callback->init. gdb/run do this.
2896
2897         * interp.c: Update
2898
2899         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2900
2901         * interp.c (big_endian_p): Delete, replaced by
2902         current_target_byte_order.
2903
2904 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2905
2906         * interp.c (host_read_long, host_read_word, host_swap_word,
2907         host_swap_long): Delete. Using common sim-endian.
2908         (sim_fetch_register, sim_store_register): Use H2T.
2909         (pipeline_ticks): Delete.  Handled by sim-events.
2910         (sim_info): Update.
2911         (sim_engine_run): Update.
2912
2913 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2914
2915         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2916         reason from here.
2917         (SignalException): To here. Signal using sim_engine_halt.
2918         (sim_stop_reason): Delete, moved to common.
2919
2920 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2921
2922         * interp.c (sim_open): Add callback argument.
2923         (sim_set_callbacks): Delete SIM_DESC argument.
2924         (sim_size): Ditto.
2925
2926 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2927
2928         * Makefile.in (SIM_OBJS): Add common modules.
2929
2930         * interp.c (sim_set_callbacks): Also set SD callback.
2931         (set_endianness, xfer_*, swap_*): Delete.
2932         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2933         Change to functions using sim-endian macros.
2934         (control_c, sim_stop): Delete, use common version.
2935         (simulate): Convert into.
2936         (sim_engine_run): This function.
2937         (sim_resume): Delete.
2938
2939         * interp.c (simulation): New variable - the simulator object.
2940         (sim_kind): Delete global - merged into simulation.
2941         (sim_load): Cleanup.  Move PC assignment from here.
2942         (sim_create_inferior): To here.
2943
2944         * sim-main.h: New file.
2945         * interp.c (sim-main.h): Include.
2946
2947 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2948
2949         * configure: Regenerated to track ../common/aclocal.m4 changes.
2950
2951 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2952
2953         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2954
2955 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2956
2957         * gencode.c (build_instruction): DIV instructions: check
2958         for division by zero and integer overflow before using
2959         host's division operation.
2960
2961 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2962
2963         * Makefile.in (SIM_OBJS): Add sim-load.o.
2964         * interp.c: #include bfd.h.
2965         (target_byte_order): Delete.
2966         (sim_kind, myname, big_endian_p): New static locals.
2967         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2968         after argument parsing.  Recognize -E arg, set endianness accordingly.
2969         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2970         load file into simulator.  Set PC from bfd.
2971         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2972         (set_endianness): Use big_endian_p instead of target_byte_order.
2973
2974 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2975
2976         * interp.c (sim_size): Delete prototype - conflicts with
2977         definition in remote-sim.h.  Correct definition.
2978
2979 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2980
2981         * configure: Regenerated to track ../common/aclocal.m4 changes.
2982         * config.in: Ditto.
2983
2984 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2985
2986         * interp.c (sim_open): New arg `kind'.
2987
2988         * configure: Regenerated to track ../common/aclocal.m4 changes.
2989
2990 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2991
2992         * configure: Regenerated to track ../common/aclocal.m4 changes.
2993
2994 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2995
2996         * interp.c (sim_open): Set optind to 0 before calling getopt.
2997
2998 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2999
3000         * configure: Regenerated to track ../common/aclocal.m4 changes.
3001
3002 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3003
3004         * interp.c : Replace uses of pr_addr with pr_uword64
3005         where the bit length is always 64 independent of SIM_ADDR.
3006         (pr_uword64) : added.
3007
3008 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3009
3010         * configure: Re-generate.
3011
3012 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3013
3014         * configure: Regenerate to track ../common/aclocal.m4 changes.
3015
3016 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3017
3018         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3019         in argv form.
3020         (other sim_*): New SIM_DESC argument.
3021
3022 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3023
3024         * interp.c: Fix printing of addresses for non-64-bit targets.
3025         (pr_addr): Add function to print address based on size.
3026
3027 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3028
3029         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3030
3031 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3032
3033         * gencode.c (build_mips16_operands): Correct computation of base
3034         address for extended PC relative instruction.
3035
3036 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3037
3038         * interp.c (mips16_entry): Add support for floating point cases.
3039         (SignalException): Pass floating point cases to mips16_entry.
3040         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3041         registers.
3042         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3043         or fmt_word.
3044         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3045         and then set the state to fmt_uninterpreted.
3046         (COP_SW): Temporarily set the state to fmt_word while calling
3047         ValueFPR.
3048
3049 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3050
3051         * gencode.c (build_instruction): The high order may be set in the
3052         comparison flags at any ISA level, not just ISA 4.
3053
3054 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3055
3056         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3057         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3058         * configure.in: sinclude ../common/aclocal.m4.
3059         * configure: Regenerated.
3060
3061 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3062
3063         * configure: Rebuild after change to aclocal.m4.
3064
3065 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3066
3067         * configure configure.in Makefile.in:  Update to new configure
3068         scheme which is more compatible with WinGDB builds.
3069         * configure.in:  Improve comment on how to run autoconf.
3070         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3071         * Makefile.in:  Use autoconf substitution to install common
3072         makefile fragment.
3073
3074 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3075
3076         * gencode.c (build_instruction): Use BigEndianCPU instead of
3077         ByteSwapMem.
3078
3079 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3080
3081         * interp.c (sim_monitor): Make output to stdout visible in
3082         wingdb's I/O log window.
3083
3084 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3085
3086         * support.h: Undo previous change to SIGTRAP
3087         and SIGQUIT values.
3088
3089 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3090
3091         * interp.c (store_word, load_word): New static functions.
3092         (mips16_entry): New static function.
3093         (SignalException): Look for mips16 entry and exit instructions.
3094         (simulate): Use the correct index when setting fpr_state after
3095         doing a pending move.
3096
3097 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3098
3099         * interp.c: Fix byte-swapping code throughout to work on
3100         both little- and big-endian hosts.
3101
3102 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3103
3104         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3105         with gdb/config/i386/xm-windows.h.
3106
3107 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3108
3109         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3110         that messes up arithmetic shifts.
3111
3112 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3113
3114         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3115         SIGTRAP and SIGQUIT for _WIN32.
3116
3117 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3118
3119         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3120         force a 64 bit multiplication.
3121         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3122         destination register is 0, since that is the default mips16 nop
3123         instruction.
3124
3125 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3126
3127         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3128         (build_endian_shift): Don't check proc64.
3129         (build_instruction): Always set memval to uword64.  Cast op2 to
3130         uword64 when shifting it left in memory instructions.  Always use
3131         the same code for stores--don't special case proc64.
3132
3133         * gencode.c (build_mips16_operands): Fix base PC value for PC
3134         relative operands.
3135         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3136         jal instruction.
3137         * interp.c (simJALDELAYSLOT): Define.
3138         (JALDELAYSLOT): Define.
3139         (INDELAYSLOT, INJALDELAYSLOT): Define.
3140         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3141
3142 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3143
3144         * interp.c (sim_open): add flush_cache as a PMON routine
3145         (sim_monitor): handle flush_cache by ignoring it
3146
3147 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3148
3149         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3150         BigEndianMem.
3151         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3152         (BigEndianMem): Rename to ByteSwapMem and change sense.
3153         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3154         BigEndianMem references to !ByteSwapMem.
3155         (set_endianness): New function, with prototype.
3156         (sim_open): Call set_endianness.
3157         (sim_info): Use simBE instead of BigEndianMem.
3158         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3159         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3160         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3161         ifdefs, keeping the prototype declaration.
3162         (swap_word): Rewrite correctly.
3163         (ColdReset): Delete references to CONFIG.  Delete endianness related
3164         code; moved to set_endianness.
3165
3166 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3167
3168         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3169         * interp.c (CHECKHILO): Define away.
3170         (simSIGINT): New macro.
3171         (membank_size): Increase from 1MB to 2MB.
3172         (control_c): New function.
3173         (sim_resume): Rename parameter signal to signal_number.  Add local
3174         variable prev.  Call signal before and after simulate.
3175         (sim_stop_reason): Add simSIGINT support.
3176         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3177         functions always.
3178         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3179         if logfh is NULL.
3180         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3181         a call to sim_warning.
3182
3183 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3184
3185         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3186         16 bit instructions.
3187
3188 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3189
3190         Add support for mips16 (16 bit MIPS implementation):
3191         * gencode.c (inst_type): Add mips16 instruction encoding types.
3192         (GETDATASIZEINSN): Define.
3193         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3194         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3195         mtlo.
3196         (MIPS16_DECODE): New table, for mips16 instructions.
3197         (bitmap_val): New static function.
3198         (struct mips16_op): Define.
3199         (mips16_op_table): New table, for mips16 operands.
3200         (build_mips16_operands): New static function.
3201         (process_instructions): If PC is odd, decode a mips16
3202         instruction.  Break out instruction handling into new
3203         build_instruction function.
3204         (build_instruction): New static function, broken out of
3205         process_instructions.  Check modifiers rather than flags for SHIFT
3206         bit count and m[ft]{hi,lo} direction.
3207         (usage): Pass program name to fprintf.
3208         (main): Remove unused variable this_option_optind.  Change
3209         ``*loptarg++'' to ``loptarg++''.
3210         (my_strtoul): Parenthesize && within ||.
3211         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3212         (simulate): If PC is odd, fetch a 16 bit instruction, and
3213         increment PC by 2 rather than 4.
3214         * configure.in: Add case for mips16*-*-*.
3215         * configure: Rebuild.
3216
3217 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3218
3219         * interp.c: Allow -t to enable tracing in standalone simulator.
3220         Fix garbage output in trace file and error messages.
3221
3222 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3223
3224         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3225         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3226         * configure.in: Simplify using macros in ../common/aclocal.m4.
3227         * configure: Regenerated.
3228         * tconfig.in: New file.
3229
3230 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3231
3232         * interp.c: Fix bugs in 64-bit port.
3233         Use ansi function declarations for msvc compiler.
3234         Initialize and test file pointer in trace code.
3235         Prevent duplicate definition of LAST_EMED_REGNUM.
3236
3237 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3238
3239         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3240
3241 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3242
3243         * interp.c (SignalException): Check for explicit terminating
3244         breakpoint value.
3245         * gencode.c: Pass instruction value through SignalException()
3246         calls for Trap, Breakpoint and Syscall.
3247
3248 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3249
3250         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3251         only used on those hosts that provide it.
3252         * configure.in: Add sqrt() to list of functions to be checked for.
3253         * config.in: Re-generated.
3254         * configure: Re-generated.
3255
3256 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3257
3258         * gencode.c (process_instructions): Call build_endian_shift when
3259         expanding STORE RIGHT, to fix swr.
3260         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3261         clear the high bits.
3262         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3263         Fix float to int conversions to produce signed values.
3264
3265 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3266
3267         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3268         (process_instructions): Correct handling of nor instruction.
3269         Correct shift count for 32 bit shift instructions. Correct sign
3270         extension for arithmetic shifts to not shift the number of bits in
3271         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3272         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3273         Fix madd.
3274         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3275         It's OK to have a mult follow a mult.  What's not OK is to have a
3276         mult follow an mfhi.
3277         (Convert): Comment out incorrect rounding code.
3278
3279 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3280
3281         * interp.c (sim_monitor): Improved monitor printf
3282         simulation. Tidied up simulator warnings, and added "--log" option
3283         for directing warning message output.
3284         * gencode.c: Use sim_warning() rather than WARNING macro.
3285
3286 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3287
3288         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3289         getopt1.o, rather than on gencode.c.  Link objects together.
3290         Don't link against -liberty.
3291         (gencode.o, getopt.o, getopt1.o): New targets.
3292         * gencode.c: Include <ctype.h> and "ansidecl.h".
3293         (AND): Undefine after including "ansidecl.h".
3294         (ULONG_MAX): Define if not defined.
3295         (OP_*): Don't define macros; now defined in opcode/mips.h.
3296         (main): Call my_strtoul rather than strtoul.
3297         (my_strtoul): New static function.
3298
3299 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3300
3301         * gencode.c (process_instructions):  Generate word64 and uword64
3302         instead of `long long' and `unsigned long long' data types.
3303         * interp.c:  #include sysdep.h to get signals, and define default
3304         for SIGBUS.
3305         * (Convert):  Work around for Visual-C++ compiler bug with type
3306         conversion.
3307         * support.h:  Make things compile under Visual-C++ by using
3308         __int64 instead of `long long'.  Change many refs to long long
3309         into word64/uword64 typedefs.
3310
3311 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3312
3313         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3314         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3315         (docdir): Removed.
3316         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3317         (AC_PROG_INSTALL): Added.
3318         (AC_PROG_CC): Moved to before configure.host call.
3319         * configure: Rebuilt.
3320
3321 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3322
3323         * configure.in: Define @SIMCONF@ depending on mips target.
3324         * configure: Rebuild.
3325         * Makefile.in (run): Add @SIMCONF@ to control simulator
3326         construction.
3327         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3328         * interp.c: Remove some debugging, provide more detailed error
3329         messages, update memory accesses to use LOADDRMASK.
3330
3331 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3332
3333         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3334         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3335         stamp-h.
3336         * configure: Rebuild.
3337         * config.in: New file, generated by autoheader.
3338         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3339         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3340         HAVE_ANINT and HAVE_AINT, as appropriate.
3341         * Makefile.in (run): Use @LIBS@ rather than -lm.
3342         (interp.o): Depend upon config.h.
3343         (Makefile): Just rebuild Makefile.
3344         (clean): Remove stamp-h.
3345         (mostlyclean): Make the same as clean, not as distclean.
3346         (config.h, stamp-h): New targets.
3347
3348 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3349
3350         * interp.c (ColdReset): Fix boolean test. Make all simulator
3351         globals static.
3352
3353 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3354
3355         * interp.c (xfer_direct_word, xfer_direct_long,
3356         swap_direct_word, swap_direct_long, xfer_big_word,
3357         xfer_big_long, xfer_little_word, xfer_little_long,
3358         swap_word,swap_long): Added.
3359         * interp.c (ColdReset): Provide function indirection to
3360         host<->simulated_target transfer routines.
3361         * interp.c (sim_store_register, sim_fetch_register): Updated to
3362         make use of indirected transfer routines.
3363
3364 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3365
3366         * gencode.c (process_instructions): Ensure FP ABS instruction
3367         recognised.
3368         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3369         system call support.
3370
3371 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3372
3373         * interp.c (sim_do_command): Complain if callback structure not
3374         initialised.
3375
3376 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3377
3378         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3379         support for Sun hosts.
3380         * Makefile.in (gencode): Ensure the host compiler and libraries
3381         used for cross-hosted build.
3382
3383 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3384
3385         * interp.c, gencode.c: Some more (TODO) tidying.
3386
3387 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3388
3389         * gencode.c, interp.c: Replaced explicit long long references with
3390         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3391         * support.h (SET64LO, SET64HI): Macros added.
3392
3393 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3394
3395         * configure: Regenerate with autoconf 2.7.
3396
3397 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3398
3399         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3400         * support.h: Remove superfluous "1" from #if.
3401         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3402
3403 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3404
3405         * interp.c (StoreFPR): Control UndefinedResult() call on
3406         WARN_RESULT manifest.
3407
3408 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3409
3410         * gencode.c: Tidied instruction decoding, and added FP instruction
3411         support.
3412
3413         * interp.c: Added dineroIII, and BSD profiling support. Also
3414         run-time FP handling.
3415
3416 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3417
3418         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3419         gencode.c, interp.c, support.h: created.