1 2016-01-10 Mike Frysinger <vapier@gentoo.org>
3 * config.in, configure: Regenerate.
5 2016-01-10 Mike Frysinger <vapier@gentoo.org>
7 * configure: Regenerate.
9 2016-01-10 Mike Frysinger <vapier@gentoo.org>
11 * configure: Regenerate.
13 2016-01-10 Mike Frysinger <vapier@gentoo.org>
15 * configure: Regenerate.
17 2016-01-10 Mike Frysinger <vapier@gentoo.org>
19 * configure: Regenerate.
21 2016-01-10 Mike Frysinger <vapier@gentoo.org>
23 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
24 * configure: Regenerate.
26 2016-01-10 Mike Frysinger <vapier@gentoo.org>
28 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
29 * configure: Regenerate.
31 2016-01-10 Mike Frysinger <vapier@gentoo.org>
33 * configure: Regenerate.
35 2016-01-10 Mike Frysinger <vapier@gentoo.org>
37 * configure: Regenerate.
39 2016-01-09 Mike Frysinger <vapier@gentoo.org>
41 * config.in, configure: Regenerate.
43 2016-01-06 Mike Frysinger <vapier@gentoo.org>
45 * interp.c (sim_open): Mark argv const.
46 (sim_create_inferior): Mark argv and env const.
48 2016-01-04 Mike Frysinger <vapier@gentoo.org>
50 * configure: Regenerate.
52 2016-01-03 Mike Frysinger <vapier@gentoo.org>
54 * interp.c (sim_open): Update sim_parse_args comment.
56 2016-01-03 Mike Frysinger <vapier@gentoo.org>
58 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
59 * configure: Regenerate.
61 2016-01-02 Mike Frysinger <vapier@gentoo.org>
63 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
64 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
65 * configure: Regenerate.
66 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
68 2016-01-02 Mike Frysinger <vapier@gentoo.org>
70 * dv-tx3904cpu.c (CPU, SD): Delete.
72 2015-12-30 Mike Frysinger <vapier@gentoo.org>
74 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
75 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
76 (sim_store_register): Rename to ...
77 (mips_reg_store): ... this. Delete local cpu var.
78 Update sim_io_eprintf calls.
79 (sim_fetch_register): Rename to ...
80 (mips_reg_fetch): ... this. Delete local cpu var.
81 Update sim_io_eprintf calls.
83 2015-12-27 Mike Frysinger <vapier@gentoo.org>
85 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
87 2015-12-26 Mike Frysinger <vapier@gentoo.org>
89 * config.in, configure: Regenerate.
91 2015-12-26 Mike Frysinger <vapier@gentoo.org>
93 * interp.c (sim_write, sim_read): Delete.
94 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
95 (load_word): Likewise.
96 * micromips.igen (cache): Likewise.
97 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
98 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
99 do_store_left, do_store_right, do_load_double, do_store_double):
101 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
102 (do_prefx): Likewise.
103 * sim-main.c (address_translation, prefetch): Delete.
104 (ifetch32, ifetch16): Delete call to AddressTranslation and set
106 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
107 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
108 (LoadMemory, StoreMemory): Delete CCA arg.
110 2015-12-24 Mike Frysinger <vapier@gentoo.org>
112 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
113 * configure: Regenerated.
115 2015-12-24 Mike Frysinger <vapier@gentoo.org>
117 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
120 2015-12-24 Mike Frysinger <vapier@gentoo.org>
122 * tconfig.h (SIM_HANDLES_LMA): Delete.
124 2015-12-24 Mike Frysinger <vapier@gentoo.org>
126 * sim-main.h (WITH_WATCHPOINTS): Delete.
128 2015-12-24 Mike Frysinger <vapier@gentoo.org>
130 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
132 2015-12-24 Mike Frysinger <vapier@gentoo.org>
134 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
136 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
138 * micromips.igen (process_isa_mode): Fix left shift of negative
141 2015-11-17 Mike Frysinger <vapier@gentoo.org>
143 * sim-main.h (WITH_MODULO_MEMORY): Delete.
145 2015-11-15 Mike Frysinger <vapier@gentoo.org>
147 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
149 2015-11-14 Mike Frysinger <vapier@gentoo.org>
151 * interp.c (sim_close): Rename to ...
152 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
154 * sim-main.h (mips_sim_close): Declare.
155 (SIM_CLOSE_HOOK): Define.
157 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
158 Ali Lown <ali.lown@imgtec.com>
160 * Makefile.in (tmp-micromips): New rule.
161 (tmp-mach-multi): Add support for micromips.
162 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
163 that works for both mips64 and micromips64.
164 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
166 Add build support for micromips.
167 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
168 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
169 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
170 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
171 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
172 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
173 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
174 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
175 Refactored instruction code to use these functions.
176 * dsp2.igen: Refactored instruction code to use the new functions.
177 * interp.c (decode_coproc): Refactored to work with any instruction
179 (isa_mode): New variable
180 (RSVD_INSTRUCTION): Changed to 0x00000039.
181 * m16.igen (BREAK16): Refactored instruction to use do_break16.
182 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
183 * micromips.dc: New file.
184 * micromips.igen: New file.
185 * micromips16.dc: New file.
186 * micromipsdsp.igen: New file.
187 * micromipsrun.c: New file.
188 * mips.igen (do_swc1): Changed to work with any instruction encoding.
189 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
190 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
191 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
192 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
193 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
194 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
195 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
196 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
197 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
198 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
199 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
200 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
201 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
202 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
203 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
204 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
205 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
206 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
208 Refactored instruction code to use these functions.
209 (RSVD): Changed to use new reserved instruction.
210 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
211 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
212 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
213 do_store_double): Added micromips32 and micromips64 models.
214 Added include for micromips.igen and micromipsdsp.igen
215 Add micromips32 and micromips64 models.
216 (DecodeCoproc): Updated to use new macro definition.
217 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
218 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
219 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
220 Refactored instruction code to use these functions.
221 * sim-main.h (CP0_operation): New enum.
222 (DecodeCoproc): Updated macro.
223 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
224 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
225 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
226 ISA_MODE_MICROMIPS): New defines.
227 (sim_state): Add isa_mode field.
229 2015-06-23 Mike Frysinger <vapier@gentoo.org>
231 * configure: Regenerate.
233 2015-06-12 Mike Frysinger <vapier@gentoo.org>
235 * configure.ac: Change configure.in to configure.ac.
236 * configure: Regenerate.
238 2015-06-12 Mike Frysinger <vapier@gentoo.org>
240 * configure: Regenerate.
242 2015-06-12 Mike Frysinger <vapier@gentoo.org>
244 * interp.c [TRACE]: Delete.
245 (TRACE): Change to WITH_TRACE_ANY_P.
246 [!WITH_TRACE_ANY_P] (open_trace): Define.
247 (mips_option_handler, open_trace, sim_close, dotrace):
248 Change defined(TRACE) to WITH_TRACE_ANY_P.
249 (sim_open): Delete TRACE ifdef check.
250 * sim-main.c (load_memory): Delete TRACE ifdef check.
251 (store_memory): Likewise.
252 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
253 [!WITH_TRACE_ANY_P] (dotrace): Define.
255 2015-04-18 Mike Frysinger <vapier@gentoo.org>
257 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
260 2015-04-18 Mike Frysinger <vapier@gentoo.org>
262 * sim-main.h (SIM_CPU): Delete.
264 2015-04-18 Mike Frysinger <vapier@gentoo.org>
266 * sim-main.h (sim_cia): Delete.
268 2015-04-17 Mike Frysinger <vapier@gentoo.org>
270 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
272 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
273 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
274 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
275 CIA_SET to CPU_PC_SET.
276 * sim-main.h (CIA_GET, CIA_SET): Delete.
278 2015-04-15 Mike Frysinger <vapier@gentoo.org>
280 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
281 * sim-main.h (STATE_CPU): Delete.
283 2015-04-13 Mike Frysinger <vapier@gentoo.org>
285 * configure: Regenerate.
287 2015-04-13 Mike Frysinger <vapier@gentoo.org>
289 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
290 * interp.c (mips_pc_get, mips_pc_set): New functions.
291 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
292 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
293 (sim_pc_get): Delete.
294 * sim-main.h (SIM_CPU): Define.
295 (struct sim_state): Change cpu to an array of pointers.
298 2015-04-13 Mike Frysinger <vapier@gentoo.org>
300 * interp.c (mips_option_handler, open_trace, sim_close,
301 sim_write, sim_read, sim_store_register, sim_fetch_register,
302 sim_create_inferior, pr_addr, pr_uword64): Convert old style
304 (sim_open): Convert old style prototype. Change casts with
305 sim_write to unsigned char *.
306 (fetch_str): Change null to unsigned char, and change cast to
308 (sim_monitor): Change c & ch to unsigned char. Change cast to
311 2015-04-12 Mike Frysinger <vapier@gentoo.org>
313 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
315 2015-04-06 Mike Frysinger <vapier@gentoo.org>
317 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
319 2015-04-01 Mike Frysinger <vapier@gentoo.org>
321 * tconfig.h (SIM_HAVE_PROFILE): Delete.
323 2015-03-31 Mike Frysinger <vapier@gentoo.org>
325 * config.in, configure: Regenerate.
327 2015-03-24 Mike Frysinger <vapier@gentoo.org>
329 * interp.c (sim_pc_get): New function.
331 2015-03-24 Mike Frysinger <vapier@gentoo.org>
333 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
334 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
336 2015-03-24 Mike Frysinger <vapier@gentoo.org>
338 * configure: Regenerate.
340 2015-03-23 Mike Frysinger <vapier@gentoo.org>
342 * configure: Regenerate.
344 2015-03-23 Mike Frysinger <vapier@gentoo.org>
346 * configure: Regenerate.
347 * configure.ac (mips_extra_objs): Delete.
348 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
349 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
351 2015-03-23 Mike Frysinger <vapier@gentoo.org>
353 * configure: Regenerate.
354 * configure.ac: Delete sim_hw checks for dv-sockser.
356 2015-03-16 Mike Frysinger <vapier@gentoo.org>
358 * config.in, configure: Regenerate.
359 * tconfig.in: Rename file ...
360 * tconfig.h: ... here.
362 2015-03-15 Mike Frysinger <vapier@gentoo.org>
364 * tconfig.in: Delete includes.
365 [HAVE_DV_SOCKSER]: Delete.
367 2015-03-14 Mike Frysinger <vapier@gentoo.org>
369 * Makefile.in (SIM_RUN_OBJS): Delete.
371 2015-03-14 Mike Frysinger <vapier@gentoo.org>
373 * configure.ac (AC_CHECK_HEADERS): Delete.
374 * aclocal.m4, configure: Regenerate.
376 2014-08-19 Alan Modra <amodra@gmail.com>
378 * configure: Regenerate.
380 2014-08-15 Roland McGrath <mcgrathr@google.com>
382 * configure: Regenerate.
383 * config.in: Regenerate.
385 2014-03-04 Mike Frysinger <vapier@gentoo.org>
387 * configure: Regenerate.
389 2013-09-23 Alan Modra <amodra@gmail.com>
391 * configure: Regenerate.
393 2013-06-03 Mike Frysinger <vapier@gentoo.org>
395 * aclocal.m4, configure: Regenerate.
397 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
399 * configure: Rebuild.
401 2013-03-26 Mike Frysinger <vapier@gentoo.org>
403 * configure: Regenerate.
405 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
407 * configure.ac: Address use of dv-sockser.o.
408 * tconfig.in: Conditionalize use of dv_sockser_install.
409 * configure: Regenerated.
410 * config.in: Regenerated.
412 2012-10-04 Chao-ying Fu <fu@mips.com>
413 Steve Ellcey <sellcey@mips.com>
415 * mips/mips3264r2.igen (rdhwr): New.
417 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
419 * configure.ac: Always link against dv-sockser.o.
420 * configure: Regenerate.
422 2012-06-15 Joel Brobecker <brobecker@adacore.com>
424 * config.in, configure: Regenerate.
426 2012-05-18 Nick Clifton <nickc@redhat.com>
429 * interp.c: Include config.h before system header files.
431 2012-03-24 Mike Frysinger <vapier@gentoo.org>
433 * aclocal.m4, config.in, configure: Regenerate.
435 2011-12-03 Mike Frysinger <vapier@gentoo.org>
437 * aclocal.m4: New file.
438 * configure: Regenerate.
440 2011-10-19 Mike Frysinger <vapier@gentoo.org>
442 * configure: Regenerate after common/acinclude.m4 update.
444 2011-10-17 Mike Frysinger <vapier@gentoo.org>
446 * configure.ac: Change include to common/acinclude.m4.
448 2011-10-17 Mike Frysinger <vapier@gentoo.org>
450 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
451 call. Replace common.m4 include with SIM_AC_COMMON.
452 * configure: Regenerate.
454 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
456 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
458 (tmp-mach-multi): Exit early when igen fails.
460 2011-07-05 Mike Frysinger <vapier@gentoo.org>
462 * interp.c (sim_do_command): Delete.
464 2011-02-14 Mike Frysinger <vapier@gentoo.org>
466 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
467 (tx3904sio_fifo_reset): Likewise.
468 * interp.c (sim_monitor): Likewise.
470 2010-04-14 Mike Frysinger <vapier@gentoo.org>
472 * interp.c (sim_write): Add const to buffer arg.
474 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
476 * interp.c: Don't include sysdep.h
478 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
480 * configure: Regenerate.
482 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
484 * config.in: Regenerate.
485 * configure: Likewise.
487 * configure: Regenerate.
489 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
491 * configure: Regenerate to track ../common/common.m4 changes.
494 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
495 Daniel Jacobowitz <dan@codesourcery.com>
496 Joseph Myers <joseph@codesourcery.com>
498 * configure: Regenerate.
500 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
502 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
503 that unconditionally allows fmt_ps.
504 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
505 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
506 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
507 filter from 64,f to 32,f.
508 (PREFX): Change filter from 64 to 32.
509 (LDXC1, LUXC1): Provide separate mips32r2 implementations
510 that use do_load_double instead of do_load. Make both LUXC1
511 versions unpredictable if SizeFGR () != 64.
512 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
513 instead of do_store. Remove unused variable. Make both SUXC1
514 versions unpredictable if SizeFGR () != 64.
516 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
518 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
519 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
520 shifts for that case.
522 2007-09-04 Nick Clifton <nickc@redhat.com>
524 * interp.c (options enum): Add OPTION_INFO_MEMORY.
525 (display_mem_info): New static variable.
526 (mips_option_handler): Handle OPTION_INFO_MEMORY.
527 (mips_options): Add info-memory and memory-info.
528 (sim_open): After processing the command line and board
529 specification, check display_mem_info. If it is set then
530 call the real handler for the --memory-info command line
533 2007-08-24 Joel Brobecker <brobecker@adacore.com>
535 * configure.ac: Change license of multi-run.c to GPL version 3.
536 * configure: Regenerate.
538 2007-06-28 Richard Sandiford <richard@codesourcery.com>
540 * configure.ac, configure: Revert last patch.
542 2007-06-26 Richard Sandiford <richard@codesourcery.com>
544 * configure.ac (sim_mipsisa3264_configs): New variable.
545 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
546 every configuration support all four targets, using the triplet to
547 determine the default.
548 * configure: Regenerate.
550 2007-06-25 Richard Sandiford <richard@codesourcery.com>
552 * Makefile.in (m16run.o): New rule.
554 2007-05-15 Thiemo Seufer <ths@mips.com>
556 * mips3264r2.igen (DSHD): Fix compile warning.
558 2007-05-14 Thiemo Seufer <ths@mips.com>
560 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
561 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
562 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
563 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
566 2007-03-01 Thiemo Seufer <ths@mips.com>
568 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
571 2007-02-20 Thiemo Seufer <ths@mips.com>
573 * dsp.igen: Update copyright notice.
574 * dsp2.igen: Fix copyright notice.
576 2007-02-20 Thiemo Seufer <ths@mips.com>
577 Chao-Ying Fu <fu@mips.com>
579 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
580 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
581 Add dsp2 to sim_igen_machine.
582 * configure: Regenerate.
583 * dsp.igen (do_ph_op): Add MUL support when op = 2.
584 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
585 (mulq_rs.ph): Use do_ph_mulq.
586 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
587 * mips.igen: Add dsp2 model and include dsp2.igen.
588 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
589 for *mips32r2, *mips64r2, *dsp.
590 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
591 for *mips32r2, *mips64r2, *dsp2.
592 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
594 2007-02-19 Thiemo Seufer <ths@mips.com>
595 Nigel Stephens <nigel@mips.com>
597 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
598 jumps with hazard barrier.
600 2007-02-19 Thiemo Seufer <ths@mips.com>
601 Nigel Stephens <nigel@mips.com>
603 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
604 after each call to sim_io_write.
606 2007-02-19 Thiemo Seufer <ths@mips.com>
607 Nigel Stephens <nigel@mips.com>
609 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
610 supported by this simulator.
611 (decode_coproc): Recognise additional CP0 Config registers
614 2007-02-19 Thiemo Seufer <ths@mips.com>
615 Nigel Stephens <nigel@mips.com>
616 David Ung <davidu@mips.com>
618 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
619 uninterpreted formats. If fmt is one of the uninterpreted types
620 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
621 fmt_word, and fmt_uninterpreted_64 like fmt_long.
622 (store_fpr): When writing an invalid odd register, set the
623 matching even register to fmt_unknown, not the following register.
624 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
625 the the memory window at offset 0 set by --memory-size command
627 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
629 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
631 (sim_monitor): When returning the memory size to the MIPS
632 application, use the value in STATE_MEM_SIZE, not an arbitrary
634 (cop_lw): Don' mess around with FPR_STATE, just pass
635 fmt_uninterpreted_32 to StoreFPR.
637 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
639 * mips.igen (not_word_value): Single version for mips32, mips64
642 2007-02-19 Thiemo Seufer <ths@mips.com>
643 Nigel Stephens <nigel@mips.com>
645 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
648 2007-02-17 Thiemo Seufer <ths@mips.com>
650 * configure.ac (mips*-sde-elf*): Move in front of generic machine
652 * configure: Regenerate.
654 2007-02-17 Thiemo Seufer <ths@mips.com>
656 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
657 Add mdmx to sim_igen_machine.
658 (mipsisa64*-*-*): Likewise. Remove dsp.
659 (mipsisa32*-*-*): Remove dsp.
660 * configure: Regenerate.
662 2007-02-13 Thiemo Seufer <ths@mips.com>
664 * configure.ac: Add mips*-sde-elf* target.
665 * configure: Regenerate.
667 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
669 * acconfig.h: Remove.
670 * config.in, configure: Regenerate.
672 2006-11-07 Thiemo Seufer <ths@mips.com>
674 * dsp.igen (do_w_op): Fix compiler warning.
676 2006-08-29 Thiemo Seufer <ths@mips.com>
677 David Ung <davidu@mips.com>
679 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
681 * configure: Regenerate.
682 * mips.igen (model): Add smartmips.
683 (MADDU): Increment ACX if carry.
684 (do_mult): Clear ACX.
685 (ROR,RORV): Add smartmips.
686 (include): Include smartmips.igen.
687 * sim-main.h (ACX): Set to REGISTERS[89].
688 * smartmips.igen: New file.
690 2006-08-29 Thiemo Seufer <ths@mips.com>
691 David Ung <davidu@mips.com>
693 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
694 mips3264r2.igen. Add missing dependency rules.
695 * m16e.igen: Support for mips16e save/restore instructions.
697 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
699 * configure: Regenerated.
701 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
703 * configure: Regenerated.
705 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
707 * configure: Regenerated.
709 2006-05-15 Chao-ying Fu <fu@mips.com>
711 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
713 2006-04-18 Nick Clifton <nickc@redhat.com>
715 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
718 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
720 * configure: Regenerate.
722 2005-12-14 Chao-ying Fu <fu@mips.com>
724 * Makefile.in (SIM_OBJS): Add dsp.o.
725 (dsp.o): New dependency.
726 (IGEN_INCLUDE): Add dsp.igen.
727 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
728 mipsisa64*-*-*): Add dsp to sim_igen_machine.
729 * configure: Regenerate.
730 * mips.igen: Add dsp model and include dsp.igen.
731 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
732 because these instructions are extended in DSP ASE.
733 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
734 adding 6 DSP accumulator registers and 1 DSP control register.
735 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
736 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
737 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
738 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
739 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
740 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
741 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
742 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
743 DSPCR_CCOND_SMASK): New define.
744 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
745 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
747 2005-07-08 Ian Lance Taylor <ian@airs.com>
749 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
751 2005-06-16 David Ung <davidu@mips.com>
752 Nigel Stephens <nigel@mips.com>
754 * mips.igen: New mips16e model and include m16e.igen.
755 (check_u64): Add mips16e tag.
756 * m16e.igen: New file for MIPS16e instructions.
757 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
758 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
760 * configure: Regenerate.
762 2005-05-26 David Ung <davidu@mips.com>
764 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
765 tags to all instructions which are applicable to the new ISAs.
766 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
768 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
770 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
772 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
773 * configure: Regenerate.
775 2005-03-23 Mark Kettenis <kettenis@gnu.org>
777 * configure: Regenerate.
779 2005-01-14 Andrew Cagney <cagney@gnu.org>
781 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
782 explicit call to AC_CONFIG_HEADER.
783 * configure: Regenerate.
785 2005-01-12 Andrew Cagney <cagney@gnu.org>
787 * configure.ac: Update to use ../common/common.m4.
788 * configure: Re-generate.
790 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
792 * configure: Regenerated to track ../common/aclocal.m4 changes.
794 2005-01-07 Andrew Cagney <cagney@gnu.org>
796 * configure.ac: Rename configure.in, require autoconf 2.59.
797 * configure: Re-generate.
799 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
801 * configure: Regenerate for ../common/aclocal.m4 update.
803 2004-09-24 Monika Chaddha <monika@acmet.com>
805 Committed by Andrew Cagney.
806 * m16.igen (CMP, CMPI): Fix assembler.
808 2004-08-18 Chris Demetriou <cgd@broadcom.com>
810 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
811 * configure: Regenerate.
813 2004-06-25 Chris Demetriou <cgd@broadcom.com>
815 * configure.in (sim_m16_machine): Include mipsIII.
816 * configure: Regenerate.
818 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
820 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
822 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
824 2004-04-10 Chris Demetriou <cgd@broadcom.com>
826 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
828 2004-04-09 Chris Demetriou <cgd@broadcom.com>
830 * mips.igen (check_fmt): Remove.
831 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
832 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
833 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
834 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
835 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
836 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
837 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
838 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
839 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
840 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
842 2004-04-09 Chris Demetriou <cgd@broadcom.com>
844 * sb1.igen (check_sbx): New function.
845 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
847 2004-03-29 Chris Demetriou <cgd@broadcom.com>
848 Richard Sandiford <rsandifo@redhat.com>
850 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
851 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
852 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
853 separate implementations for mipsIV and mipsV. Use new macros to
854 determine whether the restrictions apply.
856 2004-01-19 Chris Demetriou <cgd@broadcom.com>
858 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
859 (check_mult_hilo): Improve comments.
860 (check_div_hilo): Likewise. Also, fork off a new version
861 to handle mips32/mips64 (since there are no hazards to check
864 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
866 * mips.igen (do_dmultx): Fix check for negative operands.
868 2003-05-16 Ian Lance Taylor <ian@airs.com>
870 * Makefile.in (SHELL): Make sure this is defined.
871 (various): Use $(SHELL) whenever we invoke move-if-change.
873 2003-05-03 Chris Demetriou <cgd@broadcom.com>
875 * cp1.c: Tweak attribution slightly.
878 * mdmx.igen: Likewise.
879 * mips3d.igen: Likewise.
880 * sb1.igen: Likewise.
882 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
884 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
887 2003-02-27 Andrew Cagney <cagney@redhat.com>
889 * interp.c (sim_open): Rename _bfd to bfd.
890 (sim_create_inferior): Ditto.
892 2003-01-14 Chris Demetriou <cgd@broadcom.com>
894 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
896 2003-01-14 Chris Demetriou <cgd@broadcom.com>
898 * mips.igen (EI, DI): Remove.
900 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
902 * Makefile.in (tmp-run-multi): Fix mips16 filter.
904 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
905 Andrew Cagney <ac131313@redhat.com>
906 Gavin Romig-Koch <gavin@redhat.com>
907 Graydon Hoare <graydon@redhat.com>
908 Aldy Hernandez <aldyh@redhat.com>
909 Dave Brolley <brolley@redhat.com>
910 Chris Demetriou <cgd@broadcom.com>
912 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
913 (sim_mach_default): New variable.
914 (mips64vr-*-*, mips64vrel-*-*): New configurations.
915 Add a new simulator generator, MULTI.
916 * configure: Regenerate.
917 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
918 (multi-run.o): New dependency.
919 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
920 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
921 (tmp-multi): Combine them.
922 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
923 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
924 (distclean-extra): New rule.
925 * sim-main.h: Include bfd.h.
926 (MIPS_MACH): New macro.
927 * mips.igen (vr4120, vr5400, vr5500): New models.
928 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
929 * vr.igen: Replace with new version.
931 2003-01-04 Chris Demetriou <cgd@broadcom.com>
933 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
934 * configure: Regenerate.
936 2002-12-31 Chris Demetriou <cgd@broadcom.com>
938 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
939 * mips.igen: Remove all invocations of check_branch_bug and
942 2002-12-16 Chris Demetriou <cgd@broadcom.com>
944 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
946 2002-07-30 Chris Demetriou <cgd@broadcom.com>
948 * mips.igen (do_load_double, do_store_double): New functions.
949 (LDC1, SDC1): Rename to...
950 (LDC1b, SDC1b): respectively.
951 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
953 2002-07-29 Michael Snyder <msnyder@redhat.com>
955 * cp1.c (fp_recip2): Modify initialization expression so that
956 GCC will recognize it as constant.
958 2002-06-18 Chris Demetriou <cgd@broadcom.com>
960 * mdmx.c (SD_): Delete.
961 (Unpredictable): Re-define, for now, to directly invoke
962 unpredictable_action().
963 (mdmx_acc_op): Fix error in .ob immediate handling.
965 2002-06-18 Andrew Cagney <cagney@redhat.com>
967 * interp.c (sim_firmware_command): Initialize `address'.
969 2002-06-16 Andrew Cagney <ac131313@redhat.com>
971 * configure: Regenerated to track ../common/aclocal.m4 changes.
973 2002-06-14 Chris Demetriou <cgd@broadcom.com>
974 Ed Satterthwaite <ehs@broadcom.com>
976 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
977 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
978 * mips.igen: Include mips3d.igen.
979 (mips3d): New model name for MIPS-3D ASE instructions.
980 (CVT.W.fmt): Don't use this instruction for word (source) format
982 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
983 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
984 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
985 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
986 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
987 (RSquareRoot1, RSquareRoot2): New macros.
988 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
989 (fp_rsqrt2): New functions.
990 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
991 * configure: Regenerate.
993 2002-06-13 Chris Demetriou <cgd@broadcom.com>
994 Ed Satterthwaite <ehs@broadcom.com>
996 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
997 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
998 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
999 (convert): Note that this function is not used for paired-single
1001 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1002 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1003 (check_fmt_p): Enable paired-single support.
1004 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1005 (PUU.PS): New instructions.
1006 (CVT.S.fmt): Don't use this instruction for paired-single format
1008 * sim-main.h (FP_formats): New value 'fmt_ps.'
1009 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1010 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1012 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1014 * mips.igen: Fix formatting of function calls in
1017 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1019 * mips.igen (MOVN, MOVZ): Trace result.
1020 (TNEI): Print "tnei" as the opcode name in traces.
1021 (CEIL.W): Add disassembly string for traces.
1022 (RSQRT.fmt): Make location of disassembly string consistent
1023 with other instructions.
1025 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1027 * mips.igen (X): Delete unused function.
1029 2002-06-08 Andrew Cagney <cagney@redhat.com>
1031 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1033 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1034 Ed Satterthwaite <ehs@broadcom.com>
1036 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1037 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1038 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1039 (fp_nmsub): New prototypes.
1040 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1041 (NegMultiplySub): New defines.
1042 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1043 (MADD.D, MADD.S): Replace with...
1044 (MADD.fmt): New instruction.
1045 (MSUB.D, MSUB.S): Replace with...
1046 (MSUB.fmt): New instruction.
1047 (NMADD.D, NMADD.S): Replace with...
1048 (NMADD.fmt): New instruction.
1049 (NMSUB.D, MSUB.S): Replace with...
1050 (NMSUB.fmt): New instruction.
1052 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1053 Ed Satterthwaite <ehs@broadcom.com>
1055 * cp1.c: Fix more comment spelling and formatting.
1056 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1057 (denorm_mode): New function.
1058 (fpu_unary, fpu_binary): Round results after operation, collect
1059 status from rounding operations, and update the FCSR.
1060 (convert): Collect status from integer conversions and rounding
1061 operations, and update the FCSR. Adjust NaN values that result
1062 from conversions. Convert to use sim_io_eprintf rather than
1063 fprintf, and remove some debugging code.
1064 * cp1.h (fenr_FS): New define.
1066 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1068 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1069 rounding mode to sim FP rounding mode flag conversion code into...
1070 (rounding_mode): New function.
1072 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1074 * cp1.c: Clean up formatting of a few comments.
1075 (value_fpr): Reformat switch statement.
1077 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1078 Ed Satterthwaite <ehs@broadcom.com>
1081 * sim-main.h: Include cp1.h.
1082 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1083 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1084 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1085 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1086 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1087 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1088 * cp1.c: Don't include sim-fpu.h; already included by
1089 sim-main.h. Clean up formatting of some comments.
1090 (NaN, Equal, Less): Remove.
1091 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1092 (fp_cmp): New functions.
1093 * mips.igen (do_c_cond_fmt): Remove.
1094 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1095 Compare. Add result tracing.
1096 (CxC1): Remove, replace with...
1097 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1098 (DMxC1): Remove, replace with...
1099 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1100 (MxC1): Remove, replace with...
1101 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1103 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1105 * sim-main.h (FGRIDX): Remove, replace all uses with...
1106 (FGR_BASE): New macro.
1107 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1108 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1109 (NR_FGR, FGR): Likewise.
1110 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1111 * mips.igen: Likewise.
1113 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1115 * cp1.c: Add an FSF Copyright notice to this file.
1117 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1118 Ed Satterthwaite <ehs@broadcom.com>
1120 * cp1.c (Infinity): Remove.
1121 * sim-main.h (Infinity): Likewise.
1123 * cp1.c (fp_unary, fp_binary): New functions.
1124 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1125 (fp_sqrt): New functions, implemented in terms of the above.
1126 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1127 (Recip, SquareRoot): Remove (replaced by functions above).
1128 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1129 (fp_recip, fp_sqrt): New prototypes.
1130 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1131 (Recip, SquareRoot): Replace prototypes with #defines which
1132 invoke the functions above.
1134 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1136 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1137 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1138 file, remove PARAMS from prototypes.
1139 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1140 simulator state arguments.
1141 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1142 pass simulator state arguments.
1143 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1144 (store_fpr, convert): Remove 'sd' argument.
1145 (value_fpr): Likewise. Convert to use 'SD' instead.
1147 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1149 * cp1.c (Min, Max): Remove #if 0'd functions.
1150 * sim-main.h (Min, Max): Remove.
1152 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1154 * cp1.c: fix formatting of switch case and default labels.
1155 * interp.c: Likewise.
1156 * sim-main.c: Likewise.
1158 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1160 * cp1.c: Clean up comments which describe FP formats.
1161 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1163 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1164 Ed Satterthwaite <ehs@broadcom.com>
1166 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1167 Broadcom SiByte SB-1 processor configurations.
1168 * configure: Regenerate.
1169 * sb1.igen: New file.
1170 * mips.igen: Include sb1.igen.
1172 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1173 * mdmx.igen: Add "sb1" model to all appropriate functions and
1175 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1176 (ob_func, ob_acc): Reference the above.
1177 (qh_acc): Adjust to keep the same size as ob_acc.
1178 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1179 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1181 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1183 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1185 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1186 Ed Satterthwaite <ehs@broadcom.com>
1188 * mips.igen (mdmx): New (pseudo-)model.
1189 * mdmx.c, mdmx.igen: New files.
1190 * Makefile.in (SIM_OBJS): Add mdmx.o.
1191 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1193 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1194 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1195 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1196 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1197 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1198 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1199 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1200 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1201 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1202 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1203 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1204 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1205 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1206 (qh_fmtsel): New macros.
1207 (_sim_cpu): New member "acc".
1208 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1209 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1211 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1213 * interp.c: Use 'deprecated' rather than 'depreciated.'
1214 * sim-main.h: Likewise.
1216 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1218 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1219 which wouldn't compile anyway.
1220 * sim-main.h (unpredictable_action): New function prototype.
1221 (Unpredictable): Define to call igen function unpredictable().
1222 (NotWordValue): New macro to call igen function not_word_value().
1223 (UndefinedResult): Remove.
1224 * interp.c (undefined_result): Remove.
1225 (unpredictable_action): New function.
1226 * mips.igen (not_word_value, unpredictable): New functions.
1227 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1228 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1229 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1230 NotWordValue() to check for unpredictable inputs, then
1231 Unpredictable() to handle them.
1233 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1235 * mips.igen: Fix formatting of calls to Unpredictable().
1237 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1239 * interp.c (sim_open): Revert previous change.
1241 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1243 * interp.c (sim_open): Disable chunk of code that wrote code in
1244 vector table entries.
1246 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1248 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1249 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1252 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1254 * cp1.c: Fix many formatting issues.
1256 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1258 * cp1.c (fpu_format_name): New function to replace...
1259 (DOFMT): This. Delete, and update all callers.
1260 (fpu_rounding_mode_name): New function to replace...
1261 (RMMODE): This. Delete, and update all callers.
1263 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1265 * interp.c: Move FPU support routines from here to...
1266 * cp1.c: Here. New file.
1267 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1268 (cp1.o): New target.
1270 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1272 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1273 * mips.igen (mips32, mips64): New models, add to all instructions
1274 and functions as appropriate.
1275 (loadstore_ea, check_u64): New variant for model mips64.
1276 (check_fmt_p): New variant for models mipsV and mips64, remove
1277 mipsV model marking fro other variant.
1280 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1281 for mips32 and mips64.
1282 (DCLO, DCLZ): New instructions for mips64.
1284 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1286 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1287 immediate or code as a hex value with the "%#lx" format.
1288 (ANDI): Likewise, and fix printed instruction name.
1290 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1292 * sim-main.h (UndefinedResult, Unpredictable): New macros
1293 which currently do nothing.
1295 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1297 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1298 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1299 (status_CU3): New definitions.
1301 * sim-main.h (ExceptionCause): Add new values for MIPS32
1302 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1303 for DebugBreakPoint and NMIReset to note their status in
1305 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1306 (SignalExceptionCacheErr): New exception macros.
1308 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1310 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1311 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1313 (SignalExceptionCoProcessorUnusable): Take as argument the
1314 unusable coprocessor number.
1316 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1318 * mips.igen: Fix formatting of all SignalException calls.
1320 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1322 * sim-main.h (SIGNEXTEND): Remove.
1324 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1326 * mips.igen: Remove gencode comment from top of file, fix
1327 spelling in another comment.
1329 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1331 * mips.igen (check_fmt, check_fmt_p): New functions to check
1332 whether specific floating point formats are usable.
1333 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1334 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1335 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1336 Use the new functions.
1337 (do_c_cond_fmt): Remove format checks...
1338 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1340 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1342 * mips.igen: Fix formatting of check_fpu calls.
1344 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1346 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1348 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1350 * mips.igen: Remove whitespace at end of lines.
1352 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1354 * mips.igen (loadstore_ea): New function to do effective
1355 address calculations.
1356 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1357 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1358 CACHE): Use loadstore_ea to do effective address computations.
1360 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1362 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1363 * mips.igen (LL, CxC1, MxC1): Likewise.
1365 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1367 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1368 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1369 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1370 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1371 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1372 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1373 Don't split opcode fields by hand, use the opcode field values
1376 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1378 * mips.igen (do_divu): Fix spacing.
1380 * mips.igen (do_dsllv): Move to be right before DSLLV,
1381 to match the rest of the do_<shift> functions.
1383 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1385 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1386 DSRL32, do_dsrlv): Trace inputs and results.
1388 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1390 * mips.igen (CACHE): Provide instruction-printing string.
1392 * interp.c (signal_exception): Comment tokens after #endif.
1394 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1396 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1397 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1398 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1399 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1400 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1401 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1402 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1403 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1405 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1407 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1408 instruction-printing string.
1409 (LWU): Use '64' as the filter flag.
1411 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1413 * mips.igen (SDXC1): Fix instruction-printing string.
1415 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1417 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1418 filter flags "32,f".
1420 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1422 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1425 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1427 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1428 add a comma) so that it more closely match the MIPS ISA
1429 documentation opcode partitioning.
1430 (PREF): Put useful names on opcode fields, and include
1431 instruction-printing string.
1433 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1435 * mips.igen (check_u64): New function which in the future will
1436 check whether 64-bit instructions are usable and signal an
1437 exception if not. Currently a no-op.
1438 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1439 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1440 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1441 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1443 * mips.igen (check_fpu): New function which in the future will
1444 check whether FPU instructions are usable and signal an exception
1445 if not. Currently a no-op.
1446 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1447 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1448 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1449 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1450 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1451 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1452 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1453 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1455 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1457 * mips.igen (do_load_left, do_load_right): Move to be immediately
1459 (do_store_left, do_store_right): Move to be immediately following
1462 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1464 * mips.igen (mipsV): New model name. Also, add it to
1465 all instructions and functions where it is appropriate.
1467 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1469 * mips.igen: For all functions and instructions, list model
1470 names that support that instruction one per line.
1472 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1474 * mips.igen: Add some additional comments about supported
1475 models, and about which instructions go where.
1476 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1477 order as is used in the rest of the file.
1479 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1481 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1482 indicating that ALU32_END or ALU64_END are there to check
1484 (DADD): Likewise, but also remove previous comment about
1487 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1489 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1490 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1491 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1492 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1493 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1494 fields (i.e., add and move commas) so that they more closely
1495 match the MIPS ISA documentation opcode partitioning.
1497 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1499 * mips.igen (ADDI): Print immediate value.
1500 (BREAK): Print code.
1501 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1502 (SLL): Print "nop" specially, and don't run the code
1503 that does the shift for the "nop" case.
1505 2001-11-17 Fred Fish <fnf@redhat.com>
1507 * sim-main.h (float_operation): Move enum declaration outside
1508 of _sim_cpu struct declaration.
1510 2001-04-12 Jim Blandy <jimb@redhat.com>
1512 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1513 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1515 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1516 PENDING_FILL, and you can get the intended effect gracefully by
1517 calling PENDING_SCHED directly.
1519 2001-02-23 Ben Elliston <bje@redhat.com>
1521 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1522 already defined elsewhere.
1524 2001-02-19 Ben Elliston <bje@redhat.com>
1526 * sim-main.h (sim_monitor): Return an int.
1527 * interp.c (sim_monitor): Add return values.
1528 (signal_exception): Handle error conditions from sim_monitor.
1530 2001-02-08 Ben Elliston <bje@redhat.com>
1532 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1533 (store_memory): Likewise, pass cia to sim_core_write*.
1535 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1537 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1538 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1540 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1542 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1543 * Makefile.in: Don't delete *.igen when cleaning directory.
1545 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1547 * m16.igen (break): Call SignalException not sim_engine_halt.
1549 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1551 From Jason Eckhardt:
1552 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1554 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1556 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1558 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1560 * mips.igen (do_dmultx): Fix typo.
1562 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1564 * configure: Regenerated to track ../common/aclocal.m4 changes.
1566 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1568 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1570 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1572 * sim-main.h (GPR_CLEAR): Define macro.
1574 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1576 * interp.c (decode_coproc): Output long using %lx and not %s.
1578 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1580 * interp.c (sim_open): Sort & extend dummy memory regions for
1581 --board=jmr3904 for eCos.
1583 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1585 * configure: Regenerated.
1587 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1589 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1590 calls, conditional on the simulator being in verbose mode.
1592 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1594 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1595 cache don't get ReservedInstruction traps.
1597 1999-11-29 Mark Salter <msalter@cygnus.com>
1599 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1600 to clear status bits in sdisr register. This is how the hardware works.
1602 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1603 being used by cygmon.
1605 1999-11-11 Andrew Haley <aph@cygnus.com>
1607 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1610 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1612 * mips.igen (MULT): Correct previous mis-applied patch.
1614 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1616 * mips.igen (delayslot32): Handle sequence like
1617 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1618 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1619 (MULT): Actually pass the third register...
1621 1999-09-03 Mark Salter <msalter@cygnus.com>
1623 * interp.c (sim_open): Added more memory aliases for additional
1624 hardware being touched by cygmon on jmr3904 board.
1626 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1628 * configure: Regenerated to track ../common/aclocal.m4 changes.
1630 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1632 * interp.c (sim_store_register): Handle case where client - GDB -
1633 specifies that a 4 byte register is 8 bytes in size.
1634 (sim_fetch_register): Ditto.
1636 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1638 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1639 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1640 (idt_monitor_base): Base address for IDT monitor traps.
1641 (pmon_monitor_base): Ditto for PMON.
1642 (lsipmon_monitor_base): Ditto for LSI PMON.
1643 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1644 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1645 (sim_firmware_command): New function.
1646 (mips_option_handler): Call it for OPTION_FIRMWARE.
1647 (sim_open): Allocate memory for idt_monitor region. If "--board"
1648 option was given, add no monitor by default. Add BREAK hooks only if
1649 monitors are also there.
1651 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1653 * interp.c (sim_monitor): Flush output before reading input.
1655 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1657 * tconfig.in (SIM_HANDLES_LMA): Always define.
1659 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1661 From Mark Salter <msalter@cygnus.com>:
1662 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1663 (sim_open): Add setup for BSP board.
1665 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1667 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1668 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1669 them as unimplemented.
1671 1999-05-08 Felix Lee <flee@cygnus.com>
1673 * configure: Regenerated to track ../common/aclocal.m4 changes.
1675 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1677 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1679 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1681 * configure.in: Any mips64vr5*-*-* target should have
1682 -DTARGET_ENABLE_FR=1.
1683 (default_endian): Any mips64vr*el-*-* target should default to
1685 * configure: Re-generate.
1687 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1689 * mips.igen (ldl): Extend from _16_, not 32.
1691 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1693 * interp.c (sim_store_register): Force registers written to by GDB
1694 into an un-interpreted state.
1696 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1698 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1699 CPU, start periodic background I/O polls.
1700 (tx3904sio_poll): New function: periodic I/O poller.
1702 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1704 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1706 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1708 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1711 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1713 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1714 (load_word): Call SIM_CORE_SIGNAL hook on error.
1715 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1716 starting. For exception dispatching, pass PC instead of NULL_CIA.
1717 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1718 * sim-main.h (COP0_BADVADDR): Define.
1719 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1720 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1721 (_sim_cpu): Add exc_* fields to store register value snapshots.
1722 * mips.igen (*): Replace memory-related SignalException* calls
1723 with references to SIM_CORE_SIGNAL hook.
1725 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1727 * sim-main.c (*): Minor warning cleanups.
1729 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1731 * m16.igen (DADDIU5): Correct type-o.
1733 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1735 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1738 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1740 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1742 (interp.o): Add dependency on itable.h
1743 (oengine.c, gencode): Delete remaining references.
1744 (BUILT_SRC_FROM_GEN): Clean up.
1746 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1749 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1750 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1751 tmp-run-hack) : New.
1752 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1753 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1754 Drop the "64" qualifier to get the HACK generator working.
1755 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1756 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1757 qualifier to get the hack generator working.
1758 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1759 (DSLL): Use do_dsll.
1760 (DSLLV): Use do_dsllv.
1761 (DSRA): Use do_dsra.
1762 (DSRL): Use do_dsrl.
1763 (DSRLV): Use do_dsrlv.
1764 (BC1): Move *vr4100 to get the HACK generator working.
1765 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1766 get the HACK generator working.
1767 (MACC) Rename to get the HACK generator working.
1768 (DMACC,MACCS,DMACCS): Add the 64.
1770 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1772 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1773 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1775 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1777 * mips/interp.c (DEBUG): Cleanups.
1779 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1781 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1782 (tx3904sio_tickle): fflush after a stdout character output.
1784 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1786 * interp.c (sim_close): Uninstall modules.
1788 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1790 * sim-main.h, interp.c (sim_monitor): Change to global
1793 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1795 * configure.in (vr4100): Only include vr4100 instructions in
1797 * configure: Re-generate.
1798 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1800 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1802 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1803 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1806 * configure.in (sim_default_gen, sim_use_gen): Replace with
1808 (--enable-sim-igen): Delete config option. Always using IGEN.
1809 * configure: Re-generate.
1811 * Makefile.in (gencode): Kill, kill, kill.
1814 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1816 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1817 bit mips16 igen simulator.
1818 * configure: Re-generate.
1820 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1821 as part of vr4100 ISA.
1822 * vr.igen: Mark all instructions as 64 bit only.
1824 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1826 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1829 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1831 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1832 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1833 * configure: Re-generate.
1835 * m16.igen (BREAK): Define breakpoint instruction.
1836 (JALX32): Mark instruction as mips16 and not r3900.
1837 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1839 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1841 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1843 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1844 insn as a debug breakpoint.
1846 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1848 (PENDING_SCHED): Clean up trace statement.
1849 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1850 (PENDING_FILL): Delay write by only one cycle.
1851 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1853 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1855 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1857 (pending_tick): Move incrementing of index to FOR statement.
1858 (pending_tick): Only update PENDING_OUT after a write has occured.
1860 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1862 * configure: Re-generate.
1864 * interp.c (sim_engine_run OLD): Delete explicit call to
1865 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1867 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1869 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1870 interrupt level number to match changed SignalExceptionInterrupt
1873 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1875 * interp.c: #include "itable.h" if WITH_IGEN.
1876 (get_insn_name): New function.
1877 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1878 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1880 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1882 * configure: Rebuilt to inhale new common/aclocal.m4.
1884 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1886 * dv-tx3904sio.c: Include sim-assert.h.
1888 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1890 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1891 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1892 Reorganize target-specific sim-hardware checks.
1893 * configure: rebuilt.
1894 * interp.c (sim_open): For tx39 target boards, set
1895 OPERATING_ENVIRONMENT, add tx3904sio devices.
1896 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1897 ROM executables. Install dv-sockser into sim-modules list.
1899 * dv-tx3904irc.c: Compiler warning clean-up.
1900 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1901 frequent hw-trace messages.
1903 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1905 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1907 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1909 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1911 * vr.igen: New file.
1912 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1913 * mips.igen: Define vr4100 model. Include vr.igen.
1914 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1916 * mips.igen (check_mf_hilo): Correct check.
1918 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1920 * sim-main.h (interrupt_event): Add prototype.
1922 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1923 register_ptr, register_value.
1924 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1926 * sim-main.h (tracefh): Make extern.
1928 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1930 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1931 Reduce unnecessarily high timer event frequency.
1932 * dv-tx3904cpu.c: Ditto for interrupt event.
1934 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1936 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1938 (interrupt_event): Made non-static.
1940 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1941 interchange of configuration values for external vs. internal
1944 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1946 * mips.igen (BREAK): Moved code to here for
1947 simulator-reserved break instructions.
1948 * gencode.c (build_instruction): Ditto.
1949 * interp.c (signal_exception): Code moved from here. Non-
1950 reserved instructions now use exception vector, rather
1952 * sim-main.h: Moved magic constants to here.
1954 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1956 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1957 register upon non-zero interrupt event level, clear upon zero
1959 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1960 by passing zero event value.
1961 (*_io_{read,write}_buffer): Endianness fixes.
1962 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1963 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1965 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1966 serial I/O and timer module at base address 0xFFFF0000.
1968 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
1970 * mips.igen (SWC1) : Correct the handling of ReverseEndian
1973 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
1975 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1977 * configure: Update.
1979 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
1981 * dv-tx3904tmr.c: New file - implements tx3904 timer.
1982 * dv-tx3904{irc,cpu}.c: Mild reformatting.
1983 * configure.in: Include tx3904tmr in hw_device list.
1984 * configure: Rebuilt.
1985 * interp.c (sim_open): Instantiate three timer instances.
1986 Fix address typo of tx3904irc instance.
1988 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
1990 * interp.c (signal_exception): SystemCall exception now uses
1991 the exception vector.
1993 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
1995 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1998 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2000 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2002 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2004 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2006 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2007 sim-main.h. Declare a struct hw_descriptor instead of struct
2008 hw_device_descriptor.
2010 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2012 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2013 right bits and then re-align left hand bytes to correct byte
2014 lanes. Fix incorrect computation in do_store_left when loading
2015 bytes from second word.
2017 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2019 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2020 * interp.c (sim_open): Only create a device tree when HW is
2023 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2024 * interp.c (signal_exception): Ditto.
2026 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2028 * gencode.c: Mark BEGEZALL as LIKELY.
2030 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2032 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2033 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2035 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2037 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2038 modules. Recognize TX39 target with "mips*tx39" pattern.
2039 * configure: Rebuilt.
2040 * sim-main.h (*): Added many macros defining bits in
2041 TX39 control registers.
2042 (SignalInterrupt): Send actual PC instead of NULL.
2043 (SignalNMIReset): New exception type.
2044 * interp.c (board): New variable for future use to identify
2045 a particular board being simulated.
2046 (mips_option_handler,mips_options): Added "--board" option.
2047 (interrupt_event): Send actual PC.
2048 (sim_open): Make memory layout conditional on board setting.
2049 (signal_exception): Initial implementation of hardware interrupt
2050 handling. Accept another break instruction variant for simulator
2052 (decode_coproc): Implement RFE instruction for TX39.
2053 (mips.igen): Decode RFE instruction as such.
2054 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2055 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2056 bbegin to implement memory map.
2057 * dv-tx3904cpu.c: New file.
2058 * dv-tx3904irc.c: New file.
2060 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2062 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2064 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2066 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2067 with calls to check_div_hilo.
2069 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2071 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2072 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2073 Add special r3900 version of do_mult_hilo.
2074 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2075 with calls to check_mult_hilo.
2076 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2077 with calls to check_div_hilo.
2079 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2081 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2082 Document a replacement.
2084 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2086 * interp.c (sim_monitor): Make mon_printf work.
2088 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2090 * sim-main.h (INSN_NAME): New arg `cpu'.
2092 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2094 * configure: Regenerated to track ../common/aclocal.m4 changes.
2096 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2098 * configure: Regenerated to track ../common/aclocal.m4 changes.
2101 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2103 * acconfig.h: New file.
2104 * configure.in: Reverted change of Apr 24; use sinclude again.
2106 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2108 * configure: Regenerated to track ../common/aclocal.m4 changes.
2111 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2113 * configure.in: Don't call sinclude.
2115 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2117 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2119 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2121 * mips.igen (ERET): Implement.
2123 * interp.c (decode_coproc): Return sign-extended EPC.
2125 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2127 * interp.c (signal_exception): Do not ignore Trap.
2128 (signal_exception): On TRAP, restart at exception address.
2129 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2130 (signal_exception): Update.
2131 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2132 so that TRAP instructions are caught.
2134 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2136 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2137 contains HI/LO access history.
2138 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2139 (HIACCESS, LOACCESS): Delete, replace with
2140 (HIHISTORY, LOHISTORY): New macros.
2141 (CHECKHILO): Delete all, moved to mips.igen
2143 * gencode.c (build_instruction): Do not generate checks for
2144 correct HI/LO register usage.
2146 * interp.c (old_engine_run): Delete checks for correct HI/LO
2149 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2150 check_mf_cycles): New functions.
2151 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2152 do_divu, domultx, do_mult, do_multu): Use.
2154 * tx.igen ("madd", "maddu"): Use.
2156 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2158 * mips.igen (DSRAV): Use function do_dsrav.
2159 (SRAV): Use new function do_srav.
2161 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2162 (B): Sign extend 11 bit immediate.
2163 (EXT-B*): Shift 16 bit immediate left by 1.
2164 (ADDIU*): Don't sign extend immediate value.
2166 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2168 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2170 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2173 * mips.igen (delayslot32, nullify_next_insn): New functions.
2174 (m16.igen): Always include.
2175 (do_*): Add more tracing.
2177 * m16.igen (delayslot16): Add NIA argument, could be called by a
2178 32 bit MIPS16 instruction.
2180 * interp.c (ifetch16): Move function from here.
2181 * sim-main.c (ifetch16): To here.
2183 * sim-main.c (ifetch16, ifetch32): Update to match current
2184 implementations of LH, LW.
2185 (signal_exception): Don't print out incorrect hex value of illegal
2188 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2190 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2193 * m16.igen: Implement MIPS16 instructions.
2195 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2196 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2197 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2198 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2199 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2200 bodies of corresponding code from 32 bit insn to these. Also used
2201 by MIPS16 versions of functions.
2203 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2204 (IMEM16): Drop NR argument from macro.
2206 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2208 * Makefile.in (SIM_OBJS): Add sim-main.o.
2210 * sim-main.h (address_translation, load_memory, store_memory,
2211 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2213 (pr_addr, pr_uword64): Declare.
2214 (sim-main.c): Include when H_REVEALS_MODULE_P.
2216 * interp.c (address_translation, load_memory, store_memory,
2217 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2219 * sim-main.c: To here. Fix compilation problems.
2221 * configure.in: Enable inlining.
2222 * configure: Re-config.
2224 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2226 * configure: Regenerated to track ../common/aclocal.m4 changes.
2228 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2230 * mips.igen: Include tx.igen.
2231 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2232 * tx.igen: New file, contains MADD and MADDU.
2234 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2235 the hardwired constant `7'.
2236 (store_memory): Ditto.
2237 (LOADDRMASK): Move definition to sim-main.h.
2239 mips.igen (MTC0): Enable for r3900.
2242 mips.igen (do_load_byte): Delete.
2243 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2244 do_store_right): New functions.
2245 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2247 configure.in: Let the tx39 use igen again.
2250 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2252 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2253 not an address sized quantity. Return zero for cache sizes.
2255 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2257 * mips.igen (r3900): r3900 does not support 64 bit integer
2260 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2262 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2264 * configure : Rebuild.
2266 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2268 * configure: Regenerated to track ../common/aclocal.m4 changes.
2270 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2272 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2274 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2276 * configure: Regenerated to track ../common/aclocal.m4 changes.
2277 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2279 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2281 * configure: Regenerated to track ../common/aclocal.m4 changes.
2283 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2285 * interp.c (Max, Min): Comment out functions. Not yet used.
2287 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2289 * configure: Regenerated to track ../common/aclocal.m4 changes.
2291 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2293 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2294 configurable settings for stand-alone simulator.
2296 * configure.in: Added X11 search, just in case.
2298 * configure: Regenerated.
2300 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2302 * interp.c (sim_write, sim_read, load_memory, store_memory):
2303 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2305 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2307 * sim-main.h (GETFCC): Return an unsigned value.
2309 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2311 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2312 (DADD): Result destination is RD not RT.
2314 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2316 * sim-main.h (HIACCESS, LOACCESS): Always define.
2318 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2320 * interp.c (sim_info): Delete.
2322 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2324 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2325 (mips_option_handler): New argument `cpu'.
2326 (sim_open): Update call to sim_add_option_table.
2328 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2330 * mips.igen (CxC1): Add tracing.
2332 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2334 * sim-main.h (Max, Min): Declare.
2336 * interp.c (Max, Min): New functions.
2338 * mips.igen (BC1): Add tracing.
2340 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2342 * interp.c Added memory map for stack in vr4100
2344 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2346 * interp.c (load_memory): Add missing "break"'s.
2348 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2350 * interp.c (sim_store_register, sim_fetch_register): Pass in
2351 length parameter. Return -1.
2353 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2355 * interp.c: Added hardware init hook, fixed warnings.
2357 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2359 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2361 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2363 * interp.c (ifetch16): New function.
2365 * sim-main.h (IMEM32): Rename IMEM.
2366 (IMEM16_IMMED): Define.
2368 (DELAY_SLOT): Update.
2370 * m16run.c (sim_engine_run): New file.
2372 * m16.igen: All instructions except LB.
2373 (LB): Call do_load_byte.
2374 * mips.igen (do_load_byte): New function.
2375 (LB): Call do_load_byte.
2377 * mips.igen: Move spec for insn bit size and high bit from here.
2378 * Makefile.in (tmp-igen, tmp-m16): To here.
2380 * m16.dc: New file, decode mips16 instructions.
2382 * Makefile.in (SIM_NO_ALL): Define.
2383 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2385 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2387 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2388 point unit to 32 bit registers.
2389 * configure: Re-generate.
2391 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2393 * configure.in (sim_use_gen): Make IGEN the default simulator
2394 generator for generic 32 and 64 bit mips targets.
2395 * configure: Re-generate.
2397 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2399 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2402 * interp.c (sim_fetch_register, sim_store_register): Read/write
2403 FGR from correct location.
2404 (sim_open): Set size of FGR's according to
2405 WITH_TARGET_FLOATING_POINT_BITSIZE.
2407 * sim-main.h (FGR): Store floating point registers in a separate
2410 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2412 * configure: Regenerated to track ../common/aclocal.m4 changes.
2414 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2416 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2418 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2420 * interp.c (pending_tick): New function. Deliver pending writes.
2422 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2423 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2424 it can handle mixed sized quantites and single bits.
2426 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2428 * interp.c (oengine.h): Do not include when building with IGEN.
2429 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2430 (sim_info): Ditto for PROCESSOR_64BIT.
2431 (sim_monitor): Replace ut_reg with unsigned_word.
2432 (*): Ditto for t_reg.
2433 (LOADDRMASK): Define.
2434 (sim_open): Remove defunct check that host FP is IEEE compliant,
2435 using software to emulate floating point.
2436 (value_fpr, ...): Always compile, was conditional on HASFPU.
2438 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2440 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2443 * interp.c (SD, CPU): Define.
2444 (mips_option_handler): Set flags in each CPU.
2445 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2446 (sim_close): Do not clear STATE, deleted anyway.
2447 (sim_write, sim_read): Assume CPU zero's vm should be used for
2449 (sim_create_inferior): Set the PC for all processors.
2450 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2452 (mips16_entry): Pass correct nr of args to store_word, load_word.
2453 (ColdReset): Cold reset all cpu's.
2454 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2455 (sim_monitor, load_memory, store_memory, signal_exception): Use
2456 `CPU' instead of STATE_CPU.
2459 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2462 * sim-main.h (signal_exception): Add sim_cpu arg.
2463 (SignalException*): Pass both SD and CPU to signal_exception.
2464 * interp.c (signal_exception): Update.
2466 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2468 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2469 address_translation): Ditto
2470 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2472 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2474 * configure: Regenerated to track ../common/aclocal.m4 changes.
2476 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2478 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2480 * mips.igen (model): Map processor names onto BFD name.
2482 * sim-main.h (CPU_CIA): Delete.
2483 (SET_CIA, GET_CIA): Define
2485 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2487 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2490 * configure.in (default_endian): Configure a big-endian simulator
2492 * configure: Re-generate.
2494 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2496 * configure: Regenerated to track ../common/aclocal.m4 changes.
2498 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2500 * interp.c (sim_monitor): Handle Densan monitor outbyte
2501 and inbyte functions.
2503 1997-12-29 Felix Lee <flee@cygnus.com>
2505 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2507 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2509 * Makefile.in (tmp-igen): Arrange for $zero to always be
2510 reset to zero after every instruction.
2512 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2514 * configure: Regenerated to track ../common/aclocal.m4 changes.
2517 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2519 * mips.igen (MSUB): Fix to work like MADD.
2520 * gencode.c (MSUB): Similarly.
2522 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2524 * configure: Regenerated to track ../common/aclocal.m4 changes.
2526 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2528 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2530 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2532 * sim-main.h (sim-fpu.h): Include.
2534 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2535 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2536 using host independant sim_fpu module.
2538 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2540 * interp.c (signal_exception): Report internal errors with SIGABRT
2543 * sim-main.h (C0_CONFIG): New register.
2544 (signal.h): No longer include.
2546 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2548 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2550 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2552 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2554 * mips.igen: Tag vr5000 instructions.
2555 (ANDI): Was missing mipsIV model, fix assembler syntax.
2556 (do_c_cond_fmt): New function.
2557 (C.cond.fmt): Handle mips I-III which do not support CC field
2559 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2560 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2562 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2563 vr5000 which saves LO in a GPR separatly.
2565 * configure.in (enable-sim-igen): For vr5000, select vr5000
2566 specific instructions.
2567 * configure: Re-generate.
2569 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2571 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2573 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2574 fmt_uninterpreted_64 bit cases to switch. Convert to
2577 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2579 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2580 as specified in IV3.2 spec.
2581 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2583 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2585 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2586 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2587 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2588 PENDING_FILL versions of instructions. Simplify.
2590 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2592 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2594 (MTHI, MFHI): Disable code checking HI-LO.
2596 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2598 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2600 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2602 * gencode.c (build_mips16_operands): Replace IPC with cia.
2604 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2605 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2607 (UndefinedResult): Replace function with macro/function
2609 (sim_engine_run): Don't save PC in IPC.
2611 * sim-main.h (IPC): Delete.
2614 * interp.c (signal_exception, store_word, load_word,
2615 address_translation, load_memory, store_memory, cache_op,
2616 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2617 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2618 current instruction address - cia - argument.
2619 (sim_read, sim_write): Call address_translation directly.
2620 (sim_engine_run): Rename variable vaddr to cia.
2621 (signal_exception): Pass cia to sim_monitor
2623 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2624 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2625 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2627 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2628 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2631 * interp.c (signal_exception): Pass restart address to
2634 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2635 idecode.o): Add dependency.
2637 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2639 (DELAY_SLOT): Update NIA not PC with branch address.
2640 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2642 * mips.igen: Use CIA not PC in branch calculations.
2643 (illegal): Call SignalException.
2644 (BEQ, ADDIU): Fix assembler.
2646 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2648 * m16.igen (JALX): Was missing.
2650 * configure.in (enable-sim-igen): New configuration option.
2651 * configure: Re-generate.
2653 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2655 * interp.c (load_memory, store_memory): Delete parameter RAW.
2656 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2657 bypassing {load,store}_memory.
2659 * sim-main.h (ByteSwapMem): Delete definition.
2661 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2663 * interp.c (sim_do_command, sim_commands): Delete mips specific
2664 commands. Handled by module sim-options.
2666 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2667 (WITH_MODULO_MEMORY): Define.
2669 * interp.c (sim_info): Delete code printing memory size.
2671 * interp.c (mips_size): Nee sim_size, delete function.
2673 (monitor, monitor_base, monitor_size): Delete global variables.
2674 (sim_open, sim_close): Delete code creating monitor and other
2675 memory regions. Use sim-memopts module, via sim_do_commandf, to
2676 manage memory regions.
2677 (load_memory, store_memory): Use sim-core for memory model.
2679 * interp.c (address_translation): Delete all memory map code
2680 except line forcing 32 bit addresses.
2682 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2684 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2687 * interp.c (logfh, logfile): Delete globals.
2688 (sim_open, sim_close): Delete code opening & closing log file.
2689 (mips_option_handler): Delete -l and -n options.
2690 (OPTION mips_options): Ditto.
2692 * interp.c (OPTION mips_options): Rename option trace to dinero.
2693 (mips_option_handler): Update.
2695 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2697 * interp.c (fetch_str): New function.
2698 (sim_monitor): Rewrite using sim_read & sim_write.
2699 (sim_open): Check magic number.
2700 (sim_open): Write monitor vectors into memory using sim_write.
2701 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2702 (sim_read, sim_write): Simplify - transfer data one byte at a
2704 (load_memory, store_memory): Clarify meaning of parameter RAW.
2706 * sim-main.h (isHOST): Defete definition.
2707 (isTARGET): Mark as depreciated.
2708 (address_translation): Delete parameter HOST.
2710 * interp.c (address_translation): Delete parameter HOST.
2712 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2716 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2717 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2719 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2721 * mips.igen: Add model filter field to records.
2723 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2725 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2727 interp.c (sim_engine_run): Do not compile function sim_engine_run
2728 when WITH_IGEN == 1.
2730 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2731 target architecture.
2733 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2734 igen. Replace with configuration variables sim_igen_flags /
2737 * m16.igen: New file. Copy mips16 insns here.
2738 * mips.igen: From here.
2740 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2742 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2744 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2746 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2748 * gencode.c (build_instruction): Follow sim_write's lead in using
2749 BigEndianMem instead of !ByteSwapMem.
2751 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2753 * configure.in (sim_gen): Dependent on target, select type of
2754 generator. Always select old style generator.
2756 configure: Re-generate.
2758 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2760 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2761 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2762 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2763 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2764 SIM_@sim_gen@_*, set by autoconf.
2766 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2768 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2770 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2771 CURRENT_FLOATING_POINT instead.
2773 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2774 (address_translation): Raise exception InstructionFetch when
2775 translation fails and isINSTRUCTION.
2777 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2778 sim_engine_run): Change type of of vaddr and paddr to
2780 (address_translation, prefetch, load_memory, store_memory,
2781 cache_op): Change type of vAddr and pAddr to address_word.
2783 * gencode.c (build_instruction): Change type of vaddr and paddr to
2786 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2788 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2789 macro to obtain result of ALU op.
2791 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * interp.c (sim_info): Call profile_print.
2795 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2797 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2799 * sim-main.h (WITH_PROFILE): Do not define, defined in
2800 common/sim-config.h. Use sim-profile module.
2801 (simPROFILE): Delete defintion.
2803 * interp.c (PROFILE): Delete definition.
2804 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2805 (sim_close): Delete code writing profile histogram.
2806 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2808 (sim_engine_run): Delete code profiling the PC.
2810 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2812 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2814 * interp.c (sim_monitor): Make register pointers of type
2817 * sim-main.h: Make registers of type unsigned_word not
2820 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2822 * interp.c (sync_operation): Rename from SyncOperation, make
2823 global, add SD argument.
2824 (prefetch): Rename from Prefetch, make global, add SD argument.
2825 (decode_coproc): Make global.
2827 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2829 * gencode.c (build_instruction): Generate DecodeCoproc not
2830 decode_coproc calls.
2832 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2833 (SizeFGR): Move to sim-main.h
2834 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2835 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2836 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2838 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2839 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2840 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2841 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2842 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2843 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2845 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2847 (sim-alu.h): Include.
2848 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2849 (sim_cia): Typedef to instruction_address.
2851 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2853 * Makefile.in (interp.o): Rename generated file engine.c to
2858 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2860 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2862 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2864 * gencode.c (build_instruction): For "FPSQRT", output correct
2865 number of arguments to Recip.
2867 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2869 * Makefile.in (interp.o): Depends on sim-main.h
2871 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2873 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2874 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2875 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2876 STATE, DSSTATE): Define
2877 (GPR, FGRIDX, ..): Define.
2879 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2880 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2881 (GPR, FGRIDX, ...): Delete macros.
2883 * interp.c: Update names to match defines from sim-main.h
2885 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2887 * interp.c (sim_monitor): Add SD argument.
2888 (sim_warning): Delete. Replace calls with calls to
2890 (sim_error): Delete. Replace calls with sim_io_error.
2891 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2892 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2893 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2895 (mips_size): Rename from sim_size. Add SD argument.
2897 * interp.c (simulator): Delete global variable.
2898 (callback): Delete global variable.
2899 (mips_option_handler, sim_open, sim_write, sim_read,
2900 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2901 sim_size,sim_monitor): Use sim_io_* not callback->*.
2902 (sim_open): ZALLOC simulator struct.
2903 (PROFILE): Do not define.
2905 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2908 support.h with corresponding code.
2910 * sim-main.h (word64, uword64), support.h: Move definition to
2912 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2915 * Makefile.in: Update dependencies
2916 * interp.c: Do not include.
2918 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2920 * interp.c (address_translation, load_memory, store_memory,
2921 cache_op): Rename to from AddressTranslation et.al., make global,
2924 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2927 * interp.c (SignalException): Rename to signal_exception, make
2930 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2932 * sim-main.h (SignalException, SignalExceptionInterrupt,
2933 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2934 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2935 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2938 * interp.c, support.h: Use.
2940 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2942 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2943 to value_fpr / store_fpr. Add SD argument.
2944 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2945 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2947 * sim-main.h (ValueFPR, StoreFPR): Define.
2949 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2951 * interp.c (sim_engine_run): Check consistency between configure
2952 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2955 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2956 (mips_fpu): Configure WITH_FLOATING_POINT.
2957 (mips_endian): Configure WITH_TARGET_ENDIAN.
2958 * configure: Update.
2960 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
2962 * configure: Regenerated to track ../common/aclocal.m4 changes.
2964 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
2966 * configure: Regenerated.
2968 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
2970 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2972 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2974 * gencode.c (print_igen_insn_models): Assume certain architectures
2975 include all mips* instructions.
2976 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2979 * Makefile.in (tmp.igen): Add target. Generate igen input from
2982 * gencode.c (FEATURE_IGEN): Define.
2983 (main): Add --igen option. Generate output in igen format.
2984 (process_instructions): Format output according to igen option.
2985 (print_igen_insn_format): New function.
2986 (print_igen_insn_models): New function.
2987 (process_instructions): Only issue warnings and ignore
2988 instructions when no FEATURE_IGEN.
2990 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
2992 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2995 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
2997 * configure: Regenerated to track ../common/aclocal.m4 changes.
2999 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3001 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3002 SIM_RESERVED_BITS): Delete, moved to common.
3003 (SIM_EXTRA_CFLAGS): Update.
3005 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3007 * configure.in: Configure non-strict memory alignment.
3008 * configure: Regenerated to track ../common/aclocal.m4 changes.
3010 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3012 * configure: Regenerated to track ../common/aclocal.m4 changes.
3014 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3016 * gencode.c (SDBBP,DERET): Added (3900) insns.
3017 (RFE): Turn on for 3900.
3018 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3019 (dsstate): Made global.
3020 (SUBTARGET_R3900): Added.
3021 (CANCELDELAYSLOT): New.
3022 (SignalException): Ignore SystemCall rather than ignore and
3023 terminate. Add DebugBreakPoint handling.
3024 (decode_coproc): New insns RFE, DERET; and new registers Debug
3025 and DEPC protected by SUBTARGET_R3900.
3026 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3028 * Makefile.in,configure.in: Add mips subtarget option.
3029 * configure: Update.
3031 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3033 * gencode.c: Add r3900 (tx39).
3036 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3038 * gencode.c (build_instruction): Don't need to subtract 4 for
3041 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3043 * interp.c: Correct some HASFPU problems.
3045 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3047 * configure: Regenerated to track ../common/aclocal.m4 changes.
3049 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3051 * interp.c (mips_options): Fix samples option short form, should
3054 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3056 * interp.c (sim_info): Enable info code. Was just returning.
3058 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3060 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3063 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3065 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3067 (build_instruction): Ditto for LL.
3069 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3071 * configure: Regenerated to track ../common/aclocal.m4 changes.
3073 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3075 * configure: Regenerated to track ../common/aclocal.m4 changes.
3078 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3080 * interp.c (sim_open): Add call to sim_analyze_program, update
3083 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3085 * interp.c (sim_kill): Delete.
3086 (sim_create_inferior): Add ABFD argument. Set PC from same.
3087 (sim_load): Move code initializing trap handlers from here.
3088 (sim_open): To here.
3089 (sim_load): Delete, use sim-hload.c.
3091 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3093 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3095 * configure: Regenerated to track ../common/aclocal.m4 changes.
3098 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3100 * interp.c (sim_open): Add ABFD argument.
3101 (sim_load): Move call to sim_config from here.
3102 (sim_open): To here. Check return status.
3104 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3106 * gencode.c (build_instruction): Two arg MADD should
3107 not assign result to $0.
3109 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3111 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3112 * sim/mips/configure.in: Regenerate.
3114 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3116 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3117 signed8, unsigned8 et.al. types.
3119 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3120 hosts when selecting subreg.
3122 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3124 * interp.c (sim_engine_run): Reset the ZERO register to zero
3125 regardless of FEATURE_WARN_ZERO.
3126 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3128 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3130 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3131 (SignalException): For BreakPoints ignore any mode bits and just
3133 (SignalException): Always set the CAUSE register.
3135 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3137 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3138 exception has been taken.
3140 * interp.c: Implement the ERET and mt/f sr instructions.
3142 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3144 * interp.c (SignalException): Don't bother restarting an
3147 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3149 * interp.c (SignalException): Really take an interrupt.
3150 (interrupt_event): Only deliver interrupts when enabled.
3152 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3154 * interp.c (sim_info): Only print info when verbose.
3155 (sim_info) Use sim_io_printf for output.
3157 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3159 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3162 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3164 * interp.c (sim_do_command): Check for common commands if a
3165 simulator specific command fails.
3167 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3169 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3170 and simBE when DEBUG is defined.
3172 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3174 * interp.c (interrupt_event): New function. Pass exception event
3175 onto exception handler.
3177 * configure.in: Check for stdlib.h.
3178 * configure: Regenerate.
3180 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3181 variable declaration.
3182 (build_instruction): Initialize memval1.
3183 (build_instruction): Add UNUSED attribute to byte, bigend,
3185 (build_operands): Ditto.
3187 * interp.c: Fix GCC warnings.
3188 (sim_get_quit_code): Delete.
3190 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3191 * Makefile.in: Ditto.
3192 * configure: Re-generate.
3194 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3196 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3198 * interp.c (mips_option_handler): New function parse argumes using
3200 (myname): Replace with STATE_MY_NAME.
3201 (sim_open): Delete check for host endianness - performed by
3203 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3204 (sim_open): Move much of the initialization from here.
3205 (sim_load): To here. After the image has been loaded and
3207 (sim_open): Move ColdReset from here.
3208 (sim_create_inferior): To here.
3209 (sim_open): Make FP check less dependant on host endianness.
3211 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3213 * interp.c (sim_set_callbacks): Delete.
3215 * interp.c (membank, membank_base, membank_size): Replace with
3216 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3217 (sim_open): Remove call to callback->init. gdb/run do this.
3221 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3223 * interp.c (big_endian_p): Delete, replaced by
3224 current_target_byte_order.
3226 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3228 * interp.c (host_read_long, host_read_word, host_swap_word,
3229 host_swap_long): Delete. Using common sim-endian.
3230 (sim_fetch_register, sim_store_register): Use H2T.
3231 (pipeline_ticks): Delete. Handled by sim-events.
3233 (sim_engine_run): Update.
3235 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3237 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3239 (SignalException): To here. Signal using sim_engine_halt.
3240 (sim_stop_reason): Delete, moved to common.
3242 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3244 * interp.c (sim_open): Add callback argument.
3245 (sim_set_callbacks): Delete SIM_DESC argument.
3248 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3250 * Makefile.in (SIM_OBJS): Add common modules.
3252 * interp.c (sim_set_callbacks): Also set SD callback.
3253 (set_endianness, xfer_*, swap_*): Delete.
3254 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3255 Change to functions using sim-endian macros.
3256 (control_c, sim_stop): Delete, use common version.
3257 (simulate): Convert into.
3258 (sim_engine_run): This function.
3259 (sim_resume): Delete.
3261 * interp.c (simulation): New variable - the simulator object.
3262 (sim_kind): Delete global - merged into simulation.
3263 (sim_load): Cleanup. Move PC assignment from here.
3264 (sim_create_inferior): To here.
3266 * sim-main.h: New file.
3267 * interp.c (sim-main.h): Include.
3269 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3271 * configure: Regenerated to track ../common/aclocal.m4 changes.
3273 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3275 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3277 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3279 * gencode.c (build_instruction): DIV instructions: check
3280 for division by zero and integer overflow before using
3281 host's division operation.
3283 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3285 * Makefile.in (SIM_OBJS): Add sim-load.o.
3286 * interp.c: #include bfd.h.
3287 (target_byte_order): Delete.
3288 (sim_kind, myname, big_endian_p): New static locals.
3289 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3290 after argument parsing. Recognize -E arg, set endianness accordingly.
3291 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3292 load file into simulator. Set PC from bfd.
3293 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3294 (set_endianness): Use big_endian_p instead of target_byte_order.
3296 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3298 * interp.c (sim_size): Delete prototype - conflicts with
3299 definition in remote-sim.h. Correct definition.
3301 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3303 * configure: Regenerated to track ../common/aclocal.m4 changes.
3306 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3308 * interp.c (sim_open): New arg `kind'.
3310 * configure: Regenerated to track ../common/aclocal.m4 changes.
3312 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3314 * configure: Regenerated to track ../common/aclocal.m4 changes.
3316 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3318 * interp.c (sim_open): Set optind to 0 before calling getopt.
3320 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3322 * configure: Regenerated to track ../common/aclocal.m4 changes.
3324 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3326 * interp.c : Replace uses of pr_addr with pr_uword64
3327 where the bit length is always 64 independent of SIM_ADDR.
3328 (pr_uword64) : added.
3330 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3332 * configure: Re-generate.
3334 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3336 * configure: Regenerate to track ../common/aclocal.m4 changes.
3338 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3340 * interp.c (sim_open): New SIM_DESC result. Argument is now
3342 (other sim_*): New SIM_DESC argument.
3344 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3346 * interp.c: Fix printing of addresses for non-64-bit targets.
3347 (pr_addr): Add function to print address based on size.
3349 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3351 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3353 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3355 * gencode.c (build_mips16_operands): Correct computation of base
3356 address for extended PC relative instruction.
3358 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3360 * interp.c (mips16_entry): Add support for floating point cases.
3361 (SignalException): Pass floating point cases to mips16_entry.
3362 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3364 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3366 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3367 and then set the state to fmt_uninterpreted.
3368 (COP_SW): Temporarily set the state to fmt_word while calling
3371 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3373 * gencode.c (build_instruction): The high order may be set in the
3374 comparison flags at any ISA level, not just ISA 4.
3376 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3378 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3379 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3380 * configure.in: sinclude ../common/aclocal.m4.
3381 * configure: Regenerated.
3383 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3385 * configure: Rebuild after change to aclocal.m4.
3387 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3389 * configure configure.in Makefile.in: Update to new configure
3390 scheme which is more compatible with WinGDB builds.
3391 * configure.in: Improve comment on how to run autoconf.
3392 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3393 * Makefile.in: Use autoconf substitution to install common
3396 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3398 * gencode.c (build_instruction): Use BigEndianCPU instead of
3401 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3403 * interp.c (sim_monitor): Make output to stdout visible in
3404 wingdb's I/O log window.
3406 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3408 * support.h: Undo previous change to SIGTRAP
3411 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3413 * interp.c (store_word, load_word): New static functions.
3414 (mips16_entry): New static function.
3415 (SignalException): Look for mips16 entry and exit instructions.
3416 (simulate): Use the correct index when setting fpr_state after
3417 doing a pending move.
3419 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3421 * interp.c: Fix byte-swapping code throughout to work on
3422 both little- and big-endian hosts.
3424 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3426 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3427 with gdb/config/i386/xm-windows.h.
3429 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3431 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3432 that messes up arithmetic shifts.
3434 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3436 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3437 SIGTRAP and SIGQUIT for _WIN32.
3439 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3441 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3442 force a 64 bit multiplication.
3443 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3444 destination register is 0, since that is the default mips16 nop
3447 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3449 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3450 (build_endian_shift): Don't check proc64.
3451 (build_instruction): Always set memval to uword64. Cast op2 to
3452 uword64 when shifting it left in memory instructions. Always use
3453 the same code for stores--don't special case proc64.
3455 * gencode.c (build_mips16_operands): Fix base PC value for PC
3457 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3459 * interp.c (simJALDELAYSLOT): Define.
3460 (JALDELAYSLOT): Define.
3461 (INDELAYSLOT, INJALDELAYSLOT): Define.
3462 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3464 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3466 * interp.c (sim_open): add flush_cache as a PMON routine
3467 (sim_monitor): handle flush_cache by ignoring it
3469 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3471 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3473 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3474 (BigEndianMem): Rename to ByteSwapMem and change sense.
3475 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3476 BigEndianMem references to !ByteSwapMem.
3477 (set_endianness): New function, with prototype.
3478 (sim_open): Call set_endianness.
3479 (sim_info): Use simBE instead of BigEndianMem.
3480 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3481 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3482 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3483 ifdefs, keeping the prototype declaration.
3484 (swap_word): Rewrite correctly.
3485 (ColdReset): Delete references to CONFIG. Delete endianness related
3486 code; moved to set_endianness.
3488 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3490 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3491 * interp.c (CHECKHILO): Define away.
3492 (simSIGINT): New macro.
3493 (membank_size): Increase from 1MB to 2MB.
3494 (control_c): New function.
3495 (sim_resume): Rename parameter signal to signal_number. Add local
3496 variable prev. Call signal before and after simulate.
3497 (sim_stop_reason): Add simSIGINT support.
3498 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3500 (sim_warning): Delete call to SignalException. Do call printf_filtered
3502 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3503 a call to sim_warning.
3505 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3507 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3508 16 bit instructions.
3510 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3512 Add support for mips16 (16 bit MIPS implementation):
3513 * gencode.c (inst_type): Add mips16 instruction encoding types.
3514 (GETDATASIZEINSN): Define.
3515 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3516 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3518 (MIPS16_DECODE): New table, for mips16 instructions.
3519 (bitmap_val): New static function.
3520 (struct mips16_op): Define.
3521 (mips16_op_table): New table, for mips16 operands.
3522 (build_mips16_operands): New static function.
3523 (process_instructions): If PC is odd, decode a mips16
3524 instruction. Break out instruction handling into new
3525 build_instruction function.
3526 (build_instruction): New static function, broken out of
3527 process_instructions. Check modifiers rather than flags for SHIFT
3528 bit count and m[ft]{hi,lo} direction.
3529 (usage): Pass program name to fprintf.
3530 (main): Remove unused variable this_option_optind. Change
3531 ``*loptarg++'' to ``loptarg++''.
3532 (my_strtoul): Parenthesize && within ||.
3533 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3534 (simulate): If PC is odd, fetch a 16 bit instruction, and
3535 increment PC by 2 rather than 4.
3536 * configure.in: Add case for mips16*-*-*.
3537 * configure: Rebuild.
3539 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3541 * interp.c: Allow -t to enable tracing in standalone simulator.
3542 Fix garbage output in trace file and error messages.
3544 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3546 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3547 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3548 * configure.in: Simplify using macros in ../common/aclocal.m4.
3549 * configure: Regenerated.
3550 * tconfig.in: New file.
3552 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3554 * interp.c: Fix bugs in 64-bit port.
3555 Use ansi function declarations for msvc compiler.
3556 Initialize and test file pointer in trace code.
3557 Prevent duplicate definition of LAST_EMED_REGNUM.
3559 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3561 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3563 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3565 * interp.c (SignalException): Check for explicit terminating
3567 * gencode.c: Pass instruction value through SignalException()
3568 calls for Trap, Breakpoint and Syscall.
3570 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3572 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3573 only used on those hosts that provide it.
3574 * configure.in: Add sqrt() to list of functions to be checked for.
3575 * config.in: Re-generated.
3576 * configure: Re-generated.
3578 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3580 * gencode.c (process_instructions): Call build_endian_shift when
3581 expanding STORE RIGHT, to fix swr.
3582 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3583 clear the high bits.
3584 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3585 Fix float to int conversions to produce signed values.
3587 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3589 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3590 (process_instructions): Correct handling of nor instruction.
3591 Correct shift count for 32 bit shift instructions. Correct sign
3592 extension for arithmetic shifts to not shift the number of bits in
3593 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3594 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3596 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3597 It's OK to have a mult follow a mult. What's not OK is to have a
3598 mult follow an mfhi.
3599 (Convert): Comment out incorrect rounding code.
3601 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3603 * interp.c (sim_monitor): Improved monitor printf
3604 simulation. Tidied up simulator warnings, and added "--log" option
3605 for directing warning message output.
3606 * gencode.c: Use sim_warning() rather than WARNING macro.
3608 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3610 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3611 getopt1.o, rather than on gencode.c. Link objects together.
3612 Don't link against -liberty.
3613 (gencode.o, getopt.o, getopt1.o): New targets.
3614 * gencode.c: Include <ctype.h> and "ansidecl.h".
3615 (AND): Undefine after including "ansidecl.h".
3616 (ULONG_MAX): Define if not defined.
3617 (OP_*): Don't define macros; now defined in opcode/mips.h.
3618 (main): Call my_strtoul rather than strtoul.
3619 (my_strtoul): New static function.
3621 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3623 * gencode.c (process_instructions): Generate word64 and uword64
3624 instead of `long long' and `unsigned long long' data types.
3625 * interp.c: #include sysdep.h to get signals, and define default
3627 * (Convert): Work around for Visual-C++ compiler bug with type
3629 * support.h: Make things compile under Visual-C++ by using
3630 __int64 instead of `long long'. Change many refs to long long
3631 into word64/uword64 typedefs.
3633 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3635 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3636 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3638 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3639 (AC_PROG_INSTALL): Added.
3640 (AC_PROG_CC): Moved to before configure.host call.
3641 * configure: Rebuilt.
3643 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3645 * configure.in: Define @SIMCONF@ depending on mips target.
3646 * configure: Rebuild.
3647 * Makefile.in (run): Add @SIMCONF@ to control simulator
3649 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3650 * interp.c: Remove some debugging, provide more detailed error
3651 messages, update memory accesses to use LOADDRMASK.
3653 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3655 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3656 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3658 * configure: Rebuild.
3659 * config.in: New file, generated by autoheader.
3660 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3661 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3662 HAVE_ANINT and HAVE_AINT, as appropriate.
3663 * Makefile.in (run): Use @LIBS@ rather than -lm.
3664 (interp.o): Depend upon config.h.
3665 (Makefile): Just rebuild Makefile.
3666 (clean): Remove stamp-h.
3667 (mostlyclean): Make the same as clean, not as distclean.
3668 (config.h, stamp-h): New targets.
3670 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3672 * interp.c (ColdReset): Fix boolean test. Make all simulator
3675 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3677 * interp.c (xfer_direct_word, xfer_direct_long,
3678 swap_direct_word, swap_direct_long, xfer_big_word,
3679 xfer_big_long, xfer_little_word, xfer_little_long,
3680 swap_word,swap_long): Added.
3681 * interp.c (ColdReset): Provide function indirection to
3682 host<->simulated_target transfer routines.
3683 * interp.c (sim_store_register, sim_fetch_register): Updated to
3684 make use of indirected transfer routines.
3686 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3688 * gencode.c (process_instructions): Ensure FP ABS instruction
3690 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3691 system call support.
3693 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3695 * interp.c (sim_do_command): Complain if callback structure not
3698 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3700 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3701 support for Sun hosts.
3702 * Makefile.in (gencode): Ensure the host compiler and libraries
3703 used for cross-hosted build.
3705 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3707 * interp.c, gencode.c: Some more (TODO) tidying.
3709 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3711 * gencode.c, interp.c: Replaced explicit long long references with
3712 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3713 * support.h (SET64LO, SET64HI): Macros added.
3715 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3717 * configure: Regenerate with autoconf 2.7.
3719 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3721 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3722 * support.h: Remove superfluous "1" from #if.
3723 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3725 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3727 * interp.c (StoreFPR): Control UndefinedResult() call on
3728 WARN_RESULT manifest.
3730 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3732 * gencode.c: Tidied instruction decoding, and added FP instruction
3735 * interp.c: Added dineroIII, and BSD profiling support. Also
3736 run-time FP handling.
3738 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3740 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3741 gencode.c, interp.c, support.h: created.