1 2016-11-11 Mike Frysinger <vapier@gentoo.org>
4 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
7 2016-11-11 Mike Frysinger <vapier@gentoo.org>
10 * mips.igen (check_u64): Enable for `r3900'.
12 2016-02-05 Mike Frysinger <vapier@gentoo.org>
14 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
16 * configure: Regenerate.
18 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
19 Maciej W. Rozycki <macro@imgtec.com>
22 * micromips.igen (delayslot_micromips): Enable for `micromips32',
23 `micromips64' and `micromipsdsp' only.
24 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
25 (do_micromips_jalr, do_micromips_jal): Likewise.
26 (compute_movep_src_reg): Likewise.
27 (compute_andi16_imm): Likewise.
28 (convert_fmt_micromips): Likewise.
29 (convert_fmt_micromips_cvt_d): Likewise.
30 (convert_fmt_micromips_cvt_s): Likewise.
31 (FMT_MICROMIPS): Likewise.
32 (FMT_MICROMIPS_CVT_D): Likewise.
33 (FMT_MICROMIPS_CVT_S): Likewise.
35 2016-01-12 Mike Frysinger <vapier@gentoo.org>
37 * interp.c: Include elf-bfd.h.
38 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
41 2016-01-10 Mike Frysinger <vapier@gentoo.org>
43 * config.in, configure: Regenerate.
45 2016-01-10 Mike Frysinger <vapier@gentoo.org>
47 * configure: Regenerate.
49 2016-01-10 Mike Frysinger <vapier@gentoo.org>
51 * configure: Regenerate.
53 2016-01-10 Mike Frysinger <vapier@gentoo.org>
55 * configure: Regenerate.
57 2016-01-10 Mike Frysinger <vapier@gentoo.org>
59 * configure: Regenerate.
61 2016-01-10 Mike Frysinger <vapier@gentoo.org>
63 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
64 * configure: Regenerate.
66 2016-01-10 Mike Frysinger <vapier@gentoo.org>
68 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
69 * configure: Regenerate.
71 2016-01-10 Mike Frysinger <vapier@gentoo.org>
73 * configure: Regenerate.
75 2016-01-10 Mike Frysinger <vapier@gentoo.org>
77 * configure: Regenerate.
79 2016-01-09 Mike Frysinger <vapier@gentoo.org>
81 * config.in, configure: Regenerate.
83 2016-01-06 Mike Frysinger <vapier@gentoo.org>
85 * interp.c (sim_open): Mark argv const.
86 (sim_create_inferior): Mark argv and env const.
88 2016-01-04 Mike Frysinger <vapier@gentoo.org>
90 * configure: Regenerate.
92 2016-01-03 Mike Frysinger <vapier@gentoo.org>
94 * interp.c (sim_open): Update sim_parse_args comment.
96 2016-01-03 Mike Frysinger <vapier@gentoo.org>
98 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
99 * configure: Regenerate.
101 2016-01-02 Mike Frysinger <vapier@gentoo.org>
103 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
104 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
105 * configure: Regenerate.
106 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
108 2016-01-02 Mike Frysinger <vapier@gentoo.org>
110 * dv-tx3904cpu.c (CPU, SD): Delete.
112 2015-12-30 Mike Frysinger <vapier@gentoo.org>
114 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
115 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
116 (sim_store_register): Rename to ...
117 (mips_reg_store): ... this. Delete local cpu var.
118 Update sim_io_eprintf calls.
119 (sim_fetch_register): Rename to ...
120 (mips_reg_fetch): ... this. Delete local cpu var.
121 Update sim_io_eprintf calls.
123 2015-12-27 Mike Frysinger <vapier@gentoo.org>
125 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
127 2015-12-26 Mike Frysinger <vapier@gentoo.org>
129 * config.in, configure: Regenerate.
131 2015-12-26 Mike Frysinger <vapier@gentoo.org>
133 * interp.c (sim_write, sim_read): Delete.
134 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
135 (load_word): Likewise.
136 * micromips.igen (cache): Likewise.
137 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
138 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
139 do_store_left, do_store_right, do_load_double, do_store_double):
141 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
142 (do_prefx): Likewise.
143 * sim-main.c (address_translation, prefetch): Delete.
144 (ifetch32, ifetch16): Delete call to AddressTranslation and set
146 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
147 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
148 (LoadMemory, StoreMemory): Delete CCA arg.
150 2015-12-24 Mike Frysinger <vapier@gentoo.org>
152 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
153 * configure: Regenerated.
155 2015-12-24 Mike Frysinger <vapier@gentoo.org>
157 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
160 2015-12-24 Mike Frysinger <vapier@gentoo.org>
162 * tconfig.h (SIM_HANDLES_LMA): Delete.
164 2015-12-24 Mike Frysinger <vapier@gentoo.org>
166 * sim-main.h (WITH_WATCHPOINTS): Delete.
168 2015-12-24 Mike Frysinger <vapier@gentoo.org>
170 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
172 2015-12-24 Mike Frysinger <vapier@gentoo.org>
174 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
176 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
178 * micromips.igen (process_isa_mode): Fix left shift of negative
181 2015-11-17 Mike Frysinger <vapier@gentoo.org>
183 * sim-main.h (WITH_MODULO_MEMORY): Delete.
185 2015-11-15 Mike Frysinger <vapier@gentoo.org>
187 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
189 2015-11-14 Mike Frysinger <vapier@gentoo.org>
191 * interp.c (sim_close): Rename to ...
192 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
194 * sim-main.h (mips_sim_close): Declare.
195 (SIM_CLOSE_HOOK): Define.
197 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
198 Ali Lown <ali.lown@imgtec.com>
200 * Makefile.in (tmp-micromips): New rule.
201 (tmp-mach-multi): Add support for micromips.
202 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
203 that works for both mips64 and micromips64.
204 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
206 Add build support for micromips.
207 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
208 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
209 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
210 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
211 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
212 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
213 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
214 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
215 Refactored instruction code to use these functions.
216 * dsp2.igen: Refactored instruction code to use the new functions.
217 * interp.c (decode_coproc): Refactored to work with any instruction
219 (isa_mode): New variable
220 (RSVD_INSTRUCTION): Changed to 0x00000039.
221 * m16.igen (BREAK16): Refactored instruction to use do_break16.
222 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
223 * micromips.dc: New file.
224 * micromips.igen: New file.
225 * micromips16.dc: New file.
226 * micromipsdsp.igen: New file.
227 * micromipsrun.c: New file.
228 * mips.igen (do_swc1): Changed to work with any instruction encoding.
229 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
230 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
231 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
232 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
233 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
234 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
235 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
236 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
237 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
238 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
239 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
240 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
241 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
242 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
243 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
244 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
245 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
246 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
248 Refactored instruction code to use these functions.
249 (RSVD): Changed to use new reserved instruction.
250 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
251 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
252 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
253 do_store_double): Added micromips32 and micromips64 models.
254 Added include for micromips.igen and micromipsdsp.igen
255 Add micromips32 and micromips64 models.
256 (DecodeCoproc): Updated to use new macro definition.
257 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
258 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
259 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
260 Refactored instruction code to use these functions.
261 * sim-main.h (CP0_operation): New enum.
262 (DecodeCoproc): Updated macro.
263 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
264 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
265 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
266 ISA_MODE_MICROMIPS): New defines.
267 (sim_state): Add isa_mode field.
269 2015-06-23 Mike Frysinger <vapier@gentoo.org>
271 * configure: Regenerate.
273 2015-06-12 Mike Frysinger <vapier@gentoo.org>
275 * configure.ac: Change configure.in to configure.ac.
276 * configure: Regenerate.
278 2015-06-12 Mike Frysinger <vapier@gentoo.org>
280 * configure: Regenerate.
282 2015-06-12 Mike Frysinger <vapier@gentoo.org>
284 * interp.c [TRACE]: Delete.
285 (TRACE): Change to WITH_TRACE_ANY_P.
286 [!WITH_TRACE_ANY_P] (open_trace): Define.
287 (mips_option_handler, open_trace, sim_close, dotrace):
288 Change defined(TRACE) to WITH_TRACE_ANY_P.
289 (sim_open): Delete TRACE ifdef check.
290 * sim-main.c (load_memory): Delete TRACE ifdef check.
291 (store_memory): Likewise.
292 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
293 [!WITH_TRACE_ANY_P] (dotrace): Define.
295 2015-04-18 Mike Frysinger <vapier@gentoo.org>
297 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
300 2015-04-18 Mike Frysinger <vapier@gentoo.org>
302 * sim-main.h (SIM_CPU): Delete.
304 2015-04-18 Mike Frysinger <vapier@gentoo.org>
306 * sim-main.h (sim_cia): Delete.
308 2015-04-17 Mike Frysinger <vapier@gentoo.org>
310 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
312 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
313 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
314 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
315 CIA_SET to CPU_PC_SET.
316 * sim-main.h (CIA_GET, CIA_SET): Delete.
318 2015-04-15 Mike Frysinger <vapier@gentoo.org>
320 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
321 * sim-main.h (STATE_CPU): Delete.
323 2015-04-13 Mike Frysinger <vapier@gentoo.org>
325 * configure: Regenerate.
327 2015-04-13 Mike Frysinger <vapier@gentoo.org>
329 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
330 * interp.c (mips_pc_get, mips_pc_set): New functions.
331 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
332 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
333 (sim_pc_get): Delete.
334 * sim-main.h (SIM_CPU): Define.
335 (struct sim_state): Change cpu to an array of pointers.
338 2015-04-13 Mike Frysinger <vapier@gentoo.org>
340 * interp.c (mips_option_handler, open_trace, sim_close,
341 sim_write, sim_read, sim_store_register, sim_fetch_register,
342 sim_create_inferior, pr_addr, pr_uword64): Convert old style
344 (sim_open): Convert old style prototype. Change casts with
345 sim_write to unsigned char *.
346 (fetch_str): Change null to unsigned char, and change cast to
348 (sim_monitor): Change c & ch to unsigned char. Change cast to
351 2015-04-12 Mike Frysinger <vapier@gentoo.org>
353 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
355 2015-04-06 Mike Frysinger <vapier@gentoo.org>
357 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
359 2015-04-01 Mike Frysinger <vapier@gentoo.org>
361 * tconfig.h (SIM_HAVE_PROFILE): Delete.
363 2015-03-31 Mike Frysinger <vapier@gentoo.org>
365 * config.in, configure: Regenerate.
367 2015-03-24 Mike Frysinger <vapier@gentoo.org>
369 * interp.c (sim_pc_get): New function.
371 2015-03-24 Mike Frysinger <vapier@gentoo.org>
373 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
374 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
376 2015-03-24 Mike Frysinger <vapier@gentoo.org>
378 * configure: Regenerate.
380 2015-03-23 Mike Frysinger <vapier@gentoo.org>
382 * configure: Regenerate.
384 2015-03-23 Mike Frysinger <vapier@gentoo.org>
386 * configure: Regenerate.
387 * configure.ac (mips_extra_objs): Delete.
388 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
389 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
391 2015-03-23 Mike Frysinger <vapier@gentoo.org>
393 * configure: Regenerate.
394 * configure.ac: Delete sim_hw checks for dv-sockser.
396 2015-03-16 Mike Frysinger <vapier@gentoo.org>
398 * config.in, configure: Regenerate.
399 * tconfig.in: Rename file ...
400 * tconfig.h: ... here.
402 2015-03-15 Mike Frysinger <vapier@gentoo.org>
404 * tconfig.in: Delete includes.
405 [HAVE_DV_SOCKSER]: Delete.
407 2015-03-14 Mike Frysinger <vapier@gentoo.org>
409 * Makefile.in (SIM_RUN_OBJS): Delete.
411 2015-03-14 Mike Frysinger <vapier@gentoo.org>
413 * configure.ac (AC_CHECK_HEADERS): Delete.
414 * aclocal.m4, configure: Regenerate.
416 2014-08-19 Alan Modra <amodra@gmail.com>
418 * configure: Regenerate.
420 2014-08-15 Roland McGrath <mcgrathr@google.com>
422 * configure: Regenerate.
423 * config.in: Regenerate.
425 2014-03-04 Mike Frysinger <vapier@gentoo.org>
427 * configure: Regenerate.
429 2013-09-23 Alan Modra <amodra@gmail.com>
431 * configure: Regenerate.
433 2013-06-03 Mike Frysinger <vapier@gentoo.org>
435 * aclocal.m4, configure: Regenerate.
437 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
439 * configure: Rebuild.
441 2013-03-26 Mike Frysinger <vapier@gentoo.org>
443 * configure: Regenerate.
445 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
447 * configure.ac: Address use of dv-sockser.o.
448 * tconfig.in: Conditionalize use of dv_sockser_install.
449 * configure: Regenerated.
450 * config.in: Regenerated.
452 2012-10-04 Chao-ying Fu <fu@mips.com>
453 Steve Ellcey <sellcey@mips.com>
455 * mips/mips3264r2.igen (rdhwr): New.
457 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
459 * configure.ac: Always link against dv-sockser.o.
460 * configure: Regenerate.
462 2012-06-15 Joel Brobecker <brobecker@adacore.com>
464 * config.in, configure: Regenerate.
466 2012-05-18 Nick Clifton <nickc@redhat.com>
469 * interp.c: Include config.h before system header files.
471 2012-03-24 Mike Frysinger <vapier@gentoo.org>
473 * aclocal.m4, config.in, configure: Regenerate.
475 2011-12-03 Mike Frysinger <vapier@gentoo.org>
477 * aclocal.m4: New file.
478 * configure: Regenerate.
480 2011-10-19 Mike Frysinger <vapier@gentoo.org>
482 * configure: Regenerate after common/acinclude.m4 update.
484 2011-10-17 Mike Frysinger <vapier@gentoo.org>
486 * configure.ac: Change include to common/acinclude.m4.
488 2011-10-17 Mike Frysinger <vapier@gentoo.org>
490 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
491 call. Replace common.m4 include with SIM_AC_COMMON.
492 * configure: Regenerate.
494 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
496 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
498 (tmp-mach-multi): Exit early when igen fails.
500 2011-07-05 Mike Frysinger <vapier@gentoo.org>
502 * interp.c (sim_do_command): Delete.
504 2011-02-14 Mike Frysinger <vapier@gentoo.org>
506 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
507 (tx3904sio_fifo_reset): Likewise.
508 * interp.c (sim_monitor): Likewise.
510 2010-04-14 Mike Frysinger <vapier@gentoo.org>
512 * interp.c (sim_write): Add const to buffer arg.
514 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
516 * interp.c: Don't include sysdep.h
518 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
520 * configure: Regenerate.
522 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
524 * config.in: Regenerate.
525 * configure: Likewise.
527 * configure: Regenerate.
529 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
531 * configure: Regenerate to track ../common/common.m4 changes.
534 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
535 Daniel Jacobowitz <dan@codesourcery.com>
536 Joseph Myers <joseph@codesourcery.com>
538 * configure: Regenerate.
540 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
542 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
543 that unconditionally allows fmt_ps.
544 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
545 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
546 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
547 filter from 64,f to 32,f.
548 (PREFX): Change filter from 64 to 32.
549 (LDXC1, LUXC1): Provide separate mips32r2 implementations
550 that use do_load_double instead of do_load. Make both LUXC1
551 versions unpredictable if SizeFGR () != 64.
552 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
553 instead of do_store. Remove unused variable. Make both SUXC1
554 versions unpredictable if SizeFGR () != 64.
556 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
558 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
559 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
560 shifts for that case.
562 2007-09-04 Nick Clifton <nickc@redhat.com>
564 * interp.c (options enum): Add OPTION_INFO_MEMORY.
565 (display_mem_info): New static variable.
566 (mips_option_handler): Handle OPTION_INFO_MEMORY.
567 (mips_options): Add info-memory and memory-info.
568 (sim_open): After processing the command line and board
569 specification, check display_mem_info. If it is set then
570 call the real handler for the --memory-info command line
573 2007-08-24 Joel Brobecker <brobecker@adacore.com>
575 * configure.ac: Change license of multi-run.c to GPL version 3.
576 * configure: Regenerate.
578 2007-06-28 Richard Sandiford <richard@codesourcery.com>
580 * configure.ac, configure: Revert last patch.
582 2007-06-26 Richard Sandiford <richard@codesourcery.com>
584 * configure.ac (sim_mipsisa3264_configs): New variable.
585 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
586 every configuration support all four targets, using the triplet to
587 determine the default.
588 * configure: Regenerate.
590 2007-06-25 Richard Sandiford <richard@codesourcery.com>
592 * Makefile.in (m16run.o): New rule.
594 2007-05-15 Thiemo Seufer <ths@mips.com>
596 * mips3264r2.igen (DSHD): Fix compile warning.
598 2007-05-14 Thiemo Seufer <ths@mips.com>
600 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
601 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
602 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
603 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
606 2007-03-01 Thiemo Seufer <ths@mips.com>
608 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
611 2007-02-20 Thiemo Seufer <ths@mips.com>
613 * dsp.igen: Update copyright notice.
614 * dsp2.igen: Fix copyright notice.
616 2007-02-20 Thiemo Seufer <ths@mips.com>
617 Chao-Ying Fu <fu@mips.com>
619 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
620 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
621 Add dsp2 to sim_igen_machine.
622 * configure: Regenerate.
623 * dsp.igen (do_ph_op): Add MUL support when op = 2.
624 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
625 (mulq_rs.ph): Use do_ph_mulq.
626 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
627 * mips.igen: Add dsp2 model and include dsp2.igen.
628 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
629 for *mips32r2, *mips64r2, *dsp.
630 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
631 for *mips32r2, *mips64r2, *dsp2.
632 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
634 2007-02-19 Thiemo Seufer <ths@mips.com>
635 Nigel Stephens <nigel@mips.com>
637 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
638 jumps with hazard barrier.
640 2007-02-19 Thiemo Seufer <ths@mips.com>
641 Nigel Stephens <nigel@mips.com>
643 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
644 after each call to sim_io_write.
646 2007-02-19 Thiemo Seufer <ths@mips.com>
647 Nigel Stephens <nigel@mips.com>
649 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
650 supported by this simulator.
651 (decode_coproc): Recognise additional CP0 Config registers
654 2007-02-19 Thiemo Seufer <ths@mips.com>
655 Nigel Stephens <nigel@mips.com>
656 David Ung <davidu@mips.com>
658 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
659 uninterpreted formats. If fmt is one of the uninterpreted types
660 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
661 fmt_word, and fmt_uninterpreted_64 like fmt_long.
662 (store_fpr): When writing an invalid odd register, set the
663 matching even register to fmt_unknown, not the following register.
664 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
665 the the memory window at offset 0 set by --memory-size command
667 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
669 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
671 (sim_monitor): When returning the memory size to the MIPS
672 application, use the value in STATE_MEM_SIZE, not an arbitrary
674 (cop_lw): Don' mess around with FPR_STATE, just pass
675 fmt_uninterpreted_32 to StoreFPR.
677 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
679 * mips.igen (not_word_value): Single version for mips32, mips64
682 2007-02-19 Thiemo Seufer <ths@mips.com>
683 Nigel Stephens <nigel@mips.com>
685 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
688 2007-02-17 Thiemo Seufer <ths@mips.com>
690 * configure.ac (mips*-sde-elf*): Move in front of generic machine
692 * configure: Regenerate.
694 2007-02-17 Thiemo Seufer <ths@mips.com>
696 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
697 Add mdmx to sim_igen_machine.
698 (mipsisa64*-*-*): Likewise. Remove dsp.
699 (mipsisa32*-*-*): Remove dsp.
700 * configure: Regenerate.
702 2007-02-13 Thiemo Seufer <ths@mips.com>
704 * configure.ac: Add mips*-sde-elf* target.
705 * configure: Regenerate.
707 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
709 * acconfig.h: Remove.
710 * config.in, configure: Regenerate.
712 2006-11-07 Thiemo Seufer <ths@mips.com>
714 * dsp.igen (do_w_op): Fix compiler warning.
716 2006-08-29 Thiemo Seufer <ths@mips.com>
717 David Ung <davidu@mips.com>
719 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
721 * configure: Regenerate.
722 * mips.igen (model): Add smartmips.
723 (MADDU): Increment ACX if carry.
724 (do_mult): Clear ACX.
725 (ROR,RORV): Add smartmips.
726 (include): Include smartmips.igen.
727 * sim-main.h (ACX): Set to REGISTERS[89].
728 * smartmips.igen: New file.
730 2006-08-29 Thiemo Seufer <ths@mips.com>
731 David Ung <davidu@mips.com>
733 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
734 mips3264r2.igen. Add missing dependency rules.
735 * m16e.igen: Support for mips16e save/restore instructions.
737 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
739 * configure: Regenerated.
741 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
743 * configure: Regenerated.
745 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
747 * configure: Regenerated.
749 2006-05-15 Chao-ying Fu <fu@mips.com>
751 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
753 2006-04-18 Nick Clifton <nickc@redhat.com>
755 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
758 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
760 * configure: Regenerate.
762 2005-12-14 Chao-ying Fu <fu@mips.com>
764 * Makefile.in (SIM_OBJS): Add dsp.o.
765 (dsp.o): New dependency.
766 (IGEN_INCLUDE): Add dsp.igen.
767 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
768 mipsisa64*-*-*): Add dsp to sim_igen_machine.
769 * configure: Regenerate.
770 * mips.igen: Add dsp model and include dsp.igen.
771 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
772 because these instructions are extended in DSP ASE.
773 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
774 adding 6 DSP accumulator registers and 1 DSP control register.
775 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
776 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
777 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
778 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
779 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
780 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
781 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
782 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
783 DSPCR_CCOND_SMASK): New define.
784 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
785 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
787 2005-07-08 Ian Lance Taylor <ian@airs.com>
789 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
791 2005-06-16 David Ung <davidu@mips.com>
792 Nigel Stephens <nigel@mips.com>
794 * mips.igen: New mips16e model and include m16e.igen.
795 (check_u64): Add mips16e tag.
796 * m16e.igen: New file for MIPS16e instructions.
797 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
798 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
800 * configure: Regenerate.
802 2005-05-26 David Ung <davidu@mips.com>
804 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
805 tags to all instructions which are applicable to the new ISAs.
806 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
808 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
810 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
812 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
813 * configure: Regenerate.
815 2005-03-23 Mark Kettenis <kettenis@gnu.org>
817 * configure: Regenerate.
819 2005-01-14 Andrew Cagney <cagney@gnu.org>
821 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
822 explicit call to AC_CONFIG_HEADER.
823 * configure: Regenerate.
825 2005-01-12 Andrew Cagney <cagney@gnu.org>
827 * configure.ac: Update to use ../common/common.m4.
828 * configure: Re-generate.
830 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
832 * configure: Regenerated to track ../common/aclocal.m4 changes.
834 2005-01-07 Andrew Cagney <cagney@gnu.org>
836 * configure.ac: Rename configure.in, require autoconf 2.59.
837 * configure: Re-generate.
839 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
841 * configure: Regenerate for ../common/aclocal.m4 update.
843 2004-09-24 Monika Chaddha <monika@acmet.com>
845 Committed by Andrew Cagney.
846 * m16.igen (CMP, CMPI): Fix assembler.
848 2004-08-18 Chris Demetriou <cgd@broadcom.com>
850 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
851 * configure: Regenerate.
853 2004-06-25 Chris Demetriou <cgd@broadcom.com>
855 * configure.in (sim_m16_machine): Include mipsIII.
856 * configure: Regenerate.
858 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
860 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
862 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
864 2004-04-10 Chris Demetriou <cgd@broadcom.com>
866 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
868 2004-04-09 Chris Demetriou <cgd@broadcom.com>
870 * mips.igen (check_fmt): Remove.
871 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
872 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
873 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
874 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
875 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
876 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
877 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
878 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
879 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
880 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
882 2004-04-09 Chris Demetriou <cgd@broadcom.com>
884 * sb1.igen (check_sbx): New function.
885 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
887 2004-03-29 Chris Demetriou <cgd@broadcom.com>
888 Richard Sandiford <rsandifo@redhat.com>
890 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
891 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
892 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
893 separate implementations for mipsIV and mipsV. Use new macros to
894 determine whether the restrictions apply.
896 2004-01-19 Chris Demetriou <cgd@broadcom.com>
898 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
899 (check_mult_hilo): Improve comments.
900 (check_div_hilo): Likewise. Also, fork off a new version
901 to handle mips32/mips64 (since there are no hazards to check
904 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
906 * mips.igen (do_dmultx): Fix check for negative operands.
908 2003-05-16 Ian Lance Taylor <ian@airs.com>
910 * Makefile.in (SHELL): Make sure this is defined.
911 (various): Use $(SHELL) whenever we invoke move-if-change.
913 2003-05-03 Chris Demetriou <cgd@broadcom.com>
915 * cp1.c: Tweak attribution slightly.
918 * mdmx.igen: Likewise.
919 * mips3d.igen: Likewise.
920 * sb1.igen: Likewise.
922 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
924 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
927 2003-02-27 Andrew Cagney <cagney@redhat.com>
929 * interp.c (sim_open): Rename _bfd to bfd.
930 (sim_create_inferior): Ditto.
932 2003-01-14 Chris Demetriou <cgd@broadcom.com>
934 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
936 2003-01-14 Chris Demetriou <cgd@broadcom.com>
938 * mips.igen (EI, DI): Remove.
940 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
942 * Makefile.in (tmp-run-multi): Fix mips16 filter.
944 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
945 Andrew Cagney <ac131313@redhat.com>
946 Gavin Romig-Koch <gavin@redhat.com>
947 Graydon Hoare <graydon@redhat.com>
948 Aldy Hernandez <aldyh@redhat.com>
949 Dave Brolley <brolley@redhat.com>
950 Chris Demetriou <cgd@broadcom.com>
952 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
953 (sim_mach_default): New variable.
954 (mips64vr-*-*, mips64vrel-*-*): New configurations.
955 Add a new simulator generator, MULTI.
956 * configure: Regenerate.
957 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
958 (multi-run.o): New dependency.
959 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
960 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
961 (tmp-multi): Combine them.
962 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
963 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
964 (distclean-extra): New rule.
965 * sim-main.h: Include bfd.h.
966 (MIPS_MACH): New macro.
967 * mips.igen (vr4120, vr5400, vr5500): New models.
968 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
969 * vr.igen: Replace with new version.
971 2003-01-04 Chris Demetriou <cgd@broadcom.com>
973 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
974 * configure: Regenerate.
976 2002-12-31 Chris Demetriou <cgd@broadcom.com>
978 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
979 * mips.igen: Remove all invocations of check_branch_bug and
982 2002-12-16 Chris Demetriou <cgd@broadcom.com>
984 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
986 2002-07-30 Chris Demetriou <cgd@broadcom.com>
988 * mips.igen (do_load_double, do_store_double): New functions.
989 (LDC1, SDC1): Rename to...
990 (LDC1b, SDC1b): respectively.
991 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
993 2002-07-29 Michael Snyder <msnyder@redhat.com>
995 * cp1.c (fp_recip2): Modify initialization expression so that
996 GCC will recognize it as constant.
998 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1000 * mdmx.c (SD_): Delete.
1001 (Unpredictable): Re-define, for now, to directly invoke
1002 unpredictable_action().
1003 (mdmx_acc_op): Fix error in .ob immediate handling.
1005 2002-06-18 Andrew Cagney <cagney@redhat.com>
1007 * interp.c (sim_firmware_command): Initialize `address'.
1009 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1011 * configure: Regenerated to track ../common/aclocal.m4 changes.
1013 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1014 Ed Satterthwaite <ehs@broadcom.com>
1016 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1017 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1018 * mips.igen: Include mips3d.igen.
1019 (mips3d): New model name for MIPS-3D ASE instructions.
1020 (CVT.W.fmt): Don't use this instruction for word (source) format
1022 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1023 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1024 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1025 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1026 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1027 (RSquareRoot1, RSquareRoot2): New macros.
1028 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1029 (fp_rsqrt2): New functions.
1030 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1031 * configure: Regenerate.
1033 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1034 Ed Satterthwaite <ehs@broadcom.com>
1036 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1037 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1038 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1039 (convert): Note that this function is not used for paired-single
1041 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1042 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1043 (check_fmt_p): Enable paired-single support.
1044 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1045 (PUU.PS): New instructions.
1046 (CVT.S.fmt): Don't use this instruction for paired-single format
1048 * sim-main.h (FP_formats): New value 'fmt_ps.'
1049 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1050 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1052 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1054 * mips.igen: Fix formatting of function calls in
1057 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1059 * mips.igen (MOVN, MOVZ): Trace result.
1060 (TNEI): Print "tnei" as the opcode name in traces.
1061 (CEIL.W): Add disassembly string for traces.
1062 (RSQRT.fmt): Make location of disassembly string consistent
1063 with other instructions.
1065 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1067 * mips.igen (X): Delete unused function.
1069 2002-06-08 Andrew Cagney <cagney@redhat.com>
1071 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1073 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1074 Ed Satterthwaite <ehs@broadcom.com>
1076 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1077 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1078 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1079 (fp_nmsub): New prototypes.
1080 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1081 (NegMultiplySub): New defines.
1082 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1083 (MADD.D, MADD.S): Replace with...
1084 (MADD.fmt): New instruction.
1085 (MSUB.D, MSUB.S): Replace with...
1086 (MSUB.fmt): New instruction.
1087 (NMADD.D, NMADD.S): Replace with...
1088 (NMADD.fmt): New instruction.
1089 (NMSUB.D, MSUB.S): Replace with...
1090 (NMSUB.fmt): New instruction.
1092 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1093 Ed Satterthwaite <ehs@broadcom.com>
1095 * cp1.c: Fix more comment spelling and formatting.
1096 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1097 (denorm_mode): New function.
1098 (fpu_unary, fpu_binary): Round results after operation, collect
1099 status from rounding operations, and update the FCSR.
1100 (convert): Collect status from integer conversions and rounding
1101 operations, and update the FCSR. Adjust NaN values that result
1102 from conversions. Convert to use sim_io_eprintf rather than
1103 fprintf, and remove some debugging code.
1104 * cp1.h (fenr_FS): New define.
1106 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1108 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1109 rounding mode to sim FP rounding mode flag conversion code into...
1110 (rounding_mode): New function.
1112 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1114 * cp1.c: Clean up formatting of a few comments.
1115 (value_fpr): Reformat switch statement.
1117 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1118 Ed Satterthwaite <ehs@broadcom.com>
1121 * sim-main.h: Include cp1.h.
1122 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1123 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1124 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1125 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1126 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1127 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1128 * cp1.c: Don't include sim-fpu.h; already included by
1129 sim-main.h. Clean up formatting of some comments.
1130 (NaN, Equal, Less): Remove.
1131 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1132 (fp_cmp): New functions.
1133 * mips.igen (do_c_cond_fmt): Remove.
1134 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1135 Compare. Add result tracing.
1136 (CxC1): Remove, replace with...
1137 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1138 (DMxC1): Remove, replace with...
1139 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1140 (MxC1): Remove, replace with...
1141 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1143 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1145 * sim-main.h (FGRIDX): Remove, replace all uses with...
1146 (FGR_BASE): New macro.
1147 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1148 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1149 (NR_FGR, FGR): Likewise.
1150 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1151 * mips.igen: Likewise.
1153 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1155 * cp1.c: Add an FSF Copyright notice to this file.
1157 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1158 Ed Satterthwaite <ehs@broadcom.com>
1160 * cp1.c (Infinity): Remove.
1161 * sim-main.h (Infinity): Likewise.
1163 * cp1.c (fp_unary, fp_binary): New functions.
1164 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1165 (fp_sqrt): New functions, implemented in terms of the above.
1166 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1167 (Recip, SquareRoot): Remove (replaced by functions above).
1168 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1169 (fp_recip, fp_sqrt): New prototypes.
1170 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1171 (Recip, SquareRoot): Replace prototypes with #defines which
1172 invoke the functions above.
1174 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1176 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1177 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1178 file, remove PARAMS from prototypes.
1179 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1180 simulator state arguments.
1181 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1182 pass simulator state arguments.
1183 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1184 (store_fpr, convert): Remove 'sd' argument.
1185 (value_fpr): Likewise. Convert to use 'SD' instead.
1187 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1189 * cp1.c (Min, Max): Remove #if 0'd functions.
1190 * sim-main.h (Min, Max): Remove.
1192 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1194 * cp1.c: fix formatting of switch case and default labels.
1195 * interp.c: Likewise.
1196 * sim-main.c: Likewise.
1198 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1200 * cp1.c: Clean up comments which describe FP formats.
1201 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1203 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1204 Ed Satterthwaite <ehs@broadcom.com>
1206 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1207 Broadcom SiByte SB-1 processor configurations.
1208 * configure: Regenerate.
1209 * sb1.igen: New file.
1210 * mips.igen: Include sb1.igen.
1212 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1213 * mdmx.igen: Add "sb1" model to all appropriate functions and
1215 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1216 (ob_func, ob_acc): Reference the above.
1217 (qh_acc): Adjust to keep the same size as ob_acc.
1218 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1219 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1221 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1223 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1225 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1226 Ed Satterthwaite <ehs@broadcom.com>
1228 * mips.igen (mdmx): New (pseudo-)model.
1229 * mdmx.c, mdmx.igen: New files.
1230 * Makefile.in (SIM_OBJS): Add mdmx.o.
1231 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1233 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1234 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1235 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1236 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1237 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1238 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1239 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1240 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1241 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1242 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1243 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1244 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1245 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1246 (qh_fmtsel): New macros.
1247 (_sim_cpu): New member "acc".
1248 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1249 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1251 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1253 * interp.c: Use 'deprecated' rather than 'depreciated.'
1254 * sim-main.h: Likewise.
1256 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1258 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1259 which wouldn't compile anyway.
1260 * sim-main.h (unpredictable_action): New function prototype.
1261 (Unpredictable): Define to call igen function unpredictable().
1262 (NotWordValue): New macro to call igen function not_word_value().
1263 (UndefinedResult): Remove.
1264 * interp.c (undefined_result): Remove.
1265 (unpredictable_action): New function.
1266 * mips.igen (not_word_value, unpredictable): New functions.
1267 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1268 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1269 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1270 NotWordValue() to check for unpredictable inputs, then
1271 Unpredictable() to handle them.
1273 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1275 * mips.igen: Fix formatting of calls to Unpredictable().
1277 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1279 * interp.c (sim_open): Revert previous change.
1281 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1283 * interp.c (sim_open): Disable chunk of code that wrote code in
1284 vector table entries.
1286 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1288 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1289 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1292 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1294 * cp1.c: Fix many formatting issues.
1296 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1298 * cp1.c (fpu_format_name): New function to replace...
1299 (DOFMT): This. Delete, and update all callers.
1300 (fpu_rounding_mode_name): New function to replace...
1301 (RMMODE): This. Delete, and update all callers.
1303 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1305 * interp.c: Move FPU support routines from here to...
1306 * cp1.c: Here. New file.
1307 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1308 (cp1.o): New target.
1310 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1312 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1313 * mips.igen (mips32, mips64): New models, add to all instructions
1314 and functions as appropriate.
1315 (loadstore_ea, check_u64): New variant for model mips64.
1316 (check_fmt_p): New variant for models mipsV and mips64, remove
1317 mipsV model marking fro other variant.
1320 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1321 for mips32 and mips64.
1322 (DCLO, DCLZ): New instructions for mips64.
1324 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1326 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1327 immediate or code as a hex value with the "%#lx" format.
1328 (ANDI): Likewise, and fix printed instruction name.
1330 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1332 * sim-main.h (UndefinedResult, Unpredictable): New macros
1333 which currently do nothing.
1335 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1337 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1338 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1339 (status_CU3): New definitions.
1341 * sim-main.h (ExceptionCause): Add new values for MIPS32
1342 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1343 for DebugBreakPoint and NMIReset to note their status in
1345 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1346 (SignalExceptionCacheErr): New exception macros.
1348 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1350 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1351 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1353 (SignalExceptionCoProcessorUnusable): Take as argument the
1354 unusable coprocessor number.
1356 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1358 * mips.igen: Fix formatting of all SignalException calls.
1360 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1362 * sim-main.h (SIGNEXTEND): Remove.
1364 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1366 * mips.igen: Remove gencode comment from top of file, fix
1367 spelling in another comment.
1369 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1371 * mips.igen (check_fmt, check_fmt_p): New functions to check
1372 whether specific floating point formats are usable.
1373 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1374 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1375 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1376 Use the new functions.
1377 (do_c_cond_fmt): Remove format checks...
1378 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1380 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1382 * mips.igen: Fix formatting of check_fpu calls.
1384 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1386 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1388 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1390 * mips.igen: Remove whitespace at end of lines.
1392 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1394 * mips.igen (loadstore_ea): New function to do effective
1395 address calculations.
1396 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1397 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1398 CACHE): Use loadstore_ea to do effective address computations.
1400 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1402 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1403 * mips.igen (LL, CxC1, MxC1): Likewise.
1405 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1407 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1408 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1409 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1410 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1411 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1412 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1413 Don't split opcode fields by hand, use the opcode field values
1416 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1418 * mips.igen (do_divu): Fix spacing.
1420 * mips.igen (do_dsllv): Move to be right before DSLLV,
1421 to match the rest of the do_<shift> functions.
1423 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1425 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1426 DSRL32, do_dsrlv): Trace inputs and results.
1428 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1430 * mips.igen (CACHE): Provide instruction-printing string.
1432 * interp.c (signal_exception): Comment tokens after #endif.
1434 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1436 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1437 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1438 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1439 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1440 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1441 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1442 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1443 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1445 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1447 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1448 instruction-printing string.
1449 (LWU): Use '64' as the filter flag.
1451 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1453 * mips.igen (SDXC1): Fix instruction-printing string.
1455 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1457 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1458 filter flags "32,f".
1460 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1462 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1465 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1467 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1468 add a comma) so that it more closely match the MIPS ISA
1469 documentation opcode partitioning.
1470 (PREF): Put useful names on opcode fields, and include
1471 instruction-printing string.
1473 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1475 * mips.igen (check_u64): New function which in the future will
1476 check whether 64-bit instructions are usable and signal an
1477 exception if not. Currently a no-op.
1478 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1479 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1480 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1481 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1483 * mips.igen (check_fpu): New function which in the future will
1484 check whether FPU instructions are usable and signal an exception
1485 if not. Currently a no-op.
1486 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1487 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1488 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1489 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1490 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1491 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1492 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1493 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1495 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1497 * mips.igen (do_load_left, do_load_right): Move to be immediately
1499 (do_store_left, do_store_right): Move to be immediately following
1502 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1504 * mips.igen (mipsV): New model name. Also, add it to
1505 all instructions and functions where it is appropriate.
1507 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1509 * mips.igen: For all functions and instructions, list model
1510 names that support that instruction one per line.
1512 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1514 * mips.igen: Add some additional comments about supported
1515 models, and about which instructions go where.
1516 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1517 order as is used in the rest of the file.
1519 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1521 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1522 indicating that ALU32_END or ALU64_END are there to check
1524 (DADD): Likewise, but also remove previous comment about
1527 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1529 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1530 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1531 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1532 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1533 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1534 fields (i.e., add and move commas) so that they more closely
1535 match the MIPS ISA documentation opcode partitioning.
1537 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1539 * mips.igen (ADDI): Print immediate value.
1540 (BREAK): Print code.
1541 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1542 (SLL): Print "nop" specially, and don't run the code
1543 that does the shift for the "nop" case.
1545 2001-11-17 Fred Fish <fnf@redhat.com>
1547 * sim-main.h (float_operation): Move enum declaration outside
1548 of _sim_cpu struct declaration.
1550 2001-04-12 Jim Blandy <jimb@redhat.com>
1552 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1553 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1555 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1556 PENDING_FILL, and you can get the intended effect gracefully by
1557 calling PENDING_SCHED directly.
1559 2001-02-23 Ben Elliston <bje@redhat.com>
1561 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1562 already defined elsewhere.
1564 2001-02-19 Ben Elliston <bje@redhat.com>
1566 * sim-main.h (sim_monitor): Return an int.
1567 * interp.c (sim_monitor): Add return values.
1568 (signal_exception): Handle error conditions from sim_monitor.
1570 2001-02-08 Ben Elliston <bje@redhat.com>
1572 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1573 (store_memory): Likewise, pass cia to sim_core_write*.
1575 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1577 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1578 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1580 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1582 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1583 * Makefile.in: Don't delete *.igen when cleaning directory.
1585 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1587 * m16.igen (break): Call SignalException not sim_engine_halt.
1589 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1591 From Jason Eckhardt:
1592 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1594 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1596 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1598 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1600 * mips.igen (do_dmultx): Fix typo.
1602 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1604 * configure: Regenerated to track ../common/aclocal.m4 changes.
1606 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1608 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1610 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1612 * sim-main.h (GPR_CLEAR): Define macro.
1614 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1616 * interp.c (decode_coproc): Output long using %lx and not %s.
1618 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1620 * interp.c (sim_open): Sort & extend dummy memory regions for
1621 --board=jmr3904 for eCos.
1623 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1625 * configure: Regenerated.
1627 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1629 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1630 calls, conditional on the simulator being in verbose mode.
1632 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1634 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1635 cache don't get ReservedInstruction traps.
1637 1999-11-29 Mark Salter <msalter@cygnus.com>
1639 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1640 to clear status bits in sdisr register. This is how the hardware works.
1642 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1643 being used by cygmon.
1645 1999-11-11 Andrew Haley <aph@cygnus.com>
1647 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1650 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1652 * mips.igen (MULT): Correct previous mis-applied patch.
1654 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1656 * mips.igen (delayslot32): Handle sequence like
1657 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1658 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1659 (MULT): Actually pass the third register...
1661 1999-09-03 Mark Salter <msalter@cygnus.com>
1663 * interp.c (sim_open): Added more memory aliases for additional
1664 hardware being touched by cygmon on jmr3904 board.
1666 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1668 * configure: Regenerated to track ../common/aclocal.m4 changes.
1670 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1672 * interp.c (sim_store_register): Handle case where client - GDB -
1673 specifies that a 4 byte register is 8 bytes in size.
1674 (sim_fetch_register): Ditto.
1676 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
1678 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1679 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1680 (idt_monitor_base): Base address for IDT monitor traps.
1681 (pmon_monitor_base): Ditto for PMON.
1682 (lsipmon_monitor_base): Ditto for LSI PMON.
1683 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1684 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1685 (sim_firmware_command): New function.
1686 (mips_option_handler): Call it for OPTION_FIRMWARE.
1687 (sim_open): Allocate memory for idt_monitor region. If "--board"
1688 option was given, add no monitor by default. Add BREAK hooks only if
1689 monitors are also there.
1691 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
1693 * interp.c (sim_monitor): Flush output before reading input.
1695 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
1697 * tconfig.in (SIM_HANDLES_LMA): Always define.
1699 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
1701 From Mark Salter <msalter@cygnus.com>:
1702 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
1703 (sim_open): Add setup for BSP board.
1705 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
1707 * mips.igen (MULT, MULTU): Add syntax for two operand version.
1708 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
1709 them as unimplemented.
1711 1999-05-08 Felix Lee <flee@cygnus.com>
1713 * configure: Regenerated to track ../common/aclocal.m4 changes.
1715 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
1717 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1719 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
1721 * configure.in: Any mips64vr5*-*-* target should have
1722 -DTARGET_ENABLE_FR=1.
1723 (default_endian): Any mips64vr*el-*-* target should default to
1725 * configure: Re-generate.
1727 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
1729 * mips.igen (ldl): Extend from _16_, not 32.
1731 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
1733 * interp.c (sim_store_register): Force registers written to by GDB
1734 into an un-interpreted state.
1736 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
1738 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1739 CPU, start periodic background I/O polls.
1740 (tx3904sio_poll): New function: periodic I/O poller.
1742 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
1744 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1746 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
1748 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1751 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
1753 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1754 (load_word): Call SIM_CORE_SIGNAL hook on error.
1755 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1756 starting. For exception dispatching, pass PC instead of NULL_CIA.
1757 (decode_coproc): Use COP0_BADVADDR to store faulting address.
1758 * sim-main.h (COP0_BADVADDR): Define.
1759 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1760 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1761 (_sim_cpu): Add exc_* fields to store register value snapshots.
1762 * mips.igen (*): Replace memory-related SignalException* calls
1763 with references to SIM_CORE_SIGNAL hook.
1765 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1767 * sim-main.c (*): Minor warning cleanups.
1769 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
1771 * m16.igen (DADDIU5): Correct type-o.
1773 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
1775 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1778 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
1780 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1782 (interp.o): Add dependency on itable.h
1783 (oengine.c, gencode): Delete remaining references.
1784 (BUILT_SRC_FROM_GEN): Clean up.
1786 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
1789 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1790 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1791 tmp-run-hack) : New.
1792 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1793 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1794 Drop the "64" qualifier to get the HACK generator working.
1795 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
1796 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1797 qualifier to get the hack generator working.
1798 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1799 (DSLL): Use do_dsll.
1800 (DSLLV): Use do_dsllv.
1801 (DSRA): Use do_dsra.
1802 (DSRL): Use do_dsrl.
1803 (DSRLV): Use do_dsrlv.
1804 (BC1): Move *vr4100 to get the HACK generator working.
1805 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1806 get the HACK generator working.
1807 (MACC) Rename to get the HACK generator working.
1808 (DMACC,MACCS,DMACCS): Add the 64.
1810 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
1812 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1813 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1815 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
1817 * mips/interp.c (DEBUG): Cleanups.
1819 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
1821 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1822 (tx3904sio_tickle): fflush after a stdout character output.
1824 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
1826 * interp.c (sim_close): Uninstall modules.
1828 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
1830 * sim-main.h, interp.c (sim_monitor): Change to global
1833 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1835 * configure.in (vr4100): Only include vr4100 instructions in
1837 * configure: Re-generate.
1838 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1840 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1842 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1843 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1846 * configure.in (sim_default_gen, sim_use_gen): Replace with
1848 (--enable-sim-igen): Delete config option. Always using IGEN.
1849 * configure: Re-generate.
1851 * Makefile.in (gencode): Kill, kill, kill.
1854 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
1856 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1857 bit mips16 igen simulator.
1858 * configure: Re-generate.
1860 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1861 as part of vr4100 ISA.
1862 * vr.igen: Mark all instructions as 64 bit only.
1864 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1866 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1869 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
1871 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1872 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
1873 * configure: Re-generate.
1875 * m16.igen (BREAK): Define breakpoint instruction.
1876 (JALX32): Mark instruction as mips16 and not r3900.
1877 * mips.igen (C.cond.fmt): Fix typo in instruction format.
1879 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1881 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
1883 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1884 insn as a debug breakpoint.
1886 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1888 (PENDING_SCHED): Clean up trace statement.
1889 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1890 (PENDING_FILL): Delay write by only one cycle.
1891 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1893 * sim-main.c (pending_tick): Clean up trace statements. Add trace
1895 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1897 (pending_tick): Move incrementing of index to FOR statement.
1898 (pending_tick): Only update PENDING_OUT after a write has occured.
1900 * configure.in: Add explicit mips-lsi-* target. Use gencode to
1902 * configure: Re-generate.
1904 * interp.c (sim_engine_run OLD): Delete explicit call to
1905 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1907 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
1909 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1910 interrupt level number to match changed SignalExceptionInterrupt
1913 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
1915 * interp.c: #include "itable.h" if WITH_IGEN.
1916 (get_insn_name): New function.
1917 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1918 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1920 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
1922 * configure: Rebuilt to inhale new common/aclocal.m4.
1924 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
1926 * dv-tx3904sio.c: Include sim-assert.h.
1928 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
1930 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1931 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1932 Reorganize target-specific sim-hardware checks.
1933 * configure: rebuilt.
1934 * interp.c (sim_open): For tx39 target boards, set
1935 OPERATING_ENVIRONMENT, add tx3904sio devices.
1936 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1937 ROM executables. Install dv-sockser into sim-modules list.
1939 * dv-tx3904irc.c: Compiler warning clean-up.
1940 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
1941 frequent hw-trace messages.
1943 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
1945 * vr.igen (MulAcc): Identify as a vr4100 specific function.
1947 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1949 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1951 * vr.igen: New file.
1952 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1953 * mips.igen: Define vr4100 model. Include vr.igen.
1954 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
1956 * mips.igen (check_mf_hilo): Correct check.
1958 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
1960 * sim-main.h (interrupt_event): Add prototype.
1962 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1963 register_ptr, register_value.
1964 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1966 * sim-main.h (tracefh): Make extern.
1968 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
1970 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1971 Reduce unnecessarily high timer event frequency.
1972 * dv-tx3904cpu.c: Ditto for interrupt event.
1974 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
1976 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1978 (interrupt_event): Made non-static.
1980 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1981 interchange of configuration values for external vs. internal
1984 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
1986 * mips.igen (BREAK): Moved code to here for
1987 simulator-reserved break instructions.
1988 * gencode.c (build_instruction): Ditto.
1989 * interp.c (signal_exception): Code moved from here. Non-
1990 reserved instructions now use exception vector, rather
1992 * sim-main.h: Moved magic constants to here.
1994 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
1996 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1997 register upon non-zero interrupt event level, clear upon zero
1999 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2000 by passing zero event value.
2001 (*_io_{read,write}_buffer): Endianness fixes.
2002 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2003 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2005 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2006 serial I/O and timer module at base address 0xFFFF0000.
2008 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2010 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2013 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2015 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2017 * configure: Update.
2019 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2021 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2022 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2023 * configure.in: Include tx3904tmr in hw_device list.
2024 * configure: Rebuilt.
2025 * interp.c (sim_open): Instantiate three timer instances.
2026 Fix address typo of tx3904irc instance.
2028 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2030 * interp.c (signal_exception): SystemCall exception now uses
2031 the exception vector.
2033 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2035 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2038 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2040 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2042 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2044 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2046 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2047 sim-main.h. Declare a struct hw_descriptor instead of struct
2048 hw_device_descriptor.
2050 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2052 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2053 right bits and then re-align left hand bytes to correct byte
2054 lanes. Fix incorrect computation in do_store_left when loading
2055 bytes from second word.
2057 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2059 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2060 * interp.c (sim_open): Only create a device tree when HW is
2063 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2064 * interp.c (signal_exception): Ditto.
2066 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2068 * gencode.c: Mark BEGEZALL as LIKELY.
2070 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2072 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2073 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2075 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2077 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2078 modules. Recognize TX39 target with "mips*tx39" pattern.
2079 * configure: Rebuilt.
2080 * sim-main.h (*): Added many macros defining bits in
2081 TX39 control registers.
2082 (SignalInterrupt): Send actual PC instead of NULL.
2083 (SignalNMIReset): New exception type.
2084 * interp.c (board): New variable for future use to identify
2085 a particular board being simulated.
2086 (mips_option_handler,mips_options): Added "--board" option.
2087 (interrupt_event): Send actual PC.
2088 (sim_open): Make memory layout conditional on board setting.
2089 (signal_exception): Initial implementation of hardware interrupt
2090 handling. Accept another break instruction variant for simulator
2092 (decode_coproc): Implement RFE instruction for TX39.
2093 (mips.igen): Decode RFE instruction as such.
2094 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2095 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2096 bbegin to implement memory map.
2097 * dv-tx3904cpu.c: New file.
2098 * dv-tx3904irc.c: New file.
2100 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2102 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2104 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2106 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2107 with calls to check_div_hilo.
2109 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2111 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2112 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2113 Add special r3900 version of do_mult_hilo.
2114 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2115 with calls to check_mult_hilo.
2116 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2117 with calls to check_div_hilo.
2119 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2121 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2122 Document a replacement.
2124 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2126 * interp.c (sim_monitor): Make mon_printf work.
2128 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2130 * sim-main.h (INSN_NAME): New arg `cpu'.
2132 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2134 * configure: Regenerated to track ../common/aclocal.m4 changes.
2136 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2138 * configure: Regenerated to track ../common/aclocal.m4 changes.
2141 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2143 * acconfig.h: New file.
2144 * configure.in: Reverted change of Apr 24; use sinclude again.
2146 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2148 * configure: Regenerated to track ../common/aclocal.m4 changes.
2151 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2153 * configure.in: Don't call sinclude.
2155 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2157 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2159 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2161 * mips.igen (ERET): Implement.
2163 * interp.c (decode_coproc): Return sign-extended EPC.
2165 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2167 * interp.c (signal_exception): Do not ignore Trap.
2168 (signal_exception): On TRAP, restart at exception address.
2169 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2170 (signal_exception): Update.
2171 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2172 so that TRAP instructions are caught.
2174 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2176 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2177 contains HI/LO access history.
2178 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2179 (HIACCESS, LOACCESS): Delete, replace with
2180 (HIHISTORY, LOHISTORY): New macros.
2181 (CHECKHILO): Delete all, moved to mips.igen
2183 * gencode.c (build_instruction): Do not generate checks for
2184 correct HI/LO register usage.
2186 * interp.c (old_engine_run): Delete checks for correct HI/LO
2189 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2190 check_mf_cycles): New functions.
2191 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2192 do_divu, domultx, do_mult, do_multu): Use.
2194 * tx.igen ("madd", "maddu"): Use.
2196 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2198 * mips.igen (DSRAV): Use function do_dsrav.
2199 (SRAV): Use new function do_srav.
2201 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2202 (B): Sign extend 11 bit immediate.
2203 (EXT-B*): Shift 16 bit immediate left by 1.
2204 (ADDIU*): Don't sign extend immediate value.
2206 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2208 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2210 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2213 * mips.igen (delayslot32, nullify_next_insn): New functions.
2214 (m16.igen): Always include.
2215 (do_*): Add more tracing.
2217 * m16.igen (delayslot16): Add NIA argument, could be called by a
2218 32 bit MIPS16 instruction.
2220 * interp.c (ifetch16): Move function from here.
2221 * sim-main.c (ifetch16): To here.
2223 * sim-main.c (ifetch16, ifetch32): Update to match current
2224 implementations of LH, LW.
2225 (signal_exception): Don't print out incorrect hex value of illegal
2228 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2230 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2233 * m16.igen: Implement MIPS16 instructions.
2235 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2236 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2237 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2238 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2239 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2240 bodies of corresponding code from 32 bit insn to these. Also used
2241 by MIPS16 versions of functions.
2243 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2244 (IMEM16): Drop NR argument from macro.
2246 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2248 * Makefile.in (SIM_OBJS): Add sim-main.o.
2250 * sim-main.h (address_translation, load_memory, store_memory,
2251 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2253 (pr_addr, pr_uword64): Declare.
2254 (sim-main.c): Include when H_REVEALS_MODULE_P.
2256 * interp.c (address_translation, load_memory, store_memory,
2257 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2259 * sim-main.c: To here. Fix compilation problems.
2261 * configure.in: Enable inlining.
2262 * configure: Re-config.
2264 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2266 * configure: Regenerated to track ../common/aclocal.m4 changes.
2268 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2270 * mips.igen: Include tx.igen.
2271 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2272 * tx.igen: New file, contains MADD and MADDU.
2274 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2275 the hardwired constant `7'.
2276 (store_memory): Ditto.
2277 (LOADDRMASK): Move definition to sim-main.h.
2279 mips.igen (MTC0): Enable for r3900.
2282 mips.igen (do_load_byte): Delete.
2283 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2284 do_store_right): New functions.
2285 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2287 configure.in: Let the tx39 use igen again.
2290 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2292 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2293 not an address sized quantity. Return zero for cache sizes.
2295 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2297 * mips.igen (r3900): r3900 does not support 64 bit integer
2300 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2302 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2304 * configure : Rebuild.
2306 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2308 * configure: Regenerated to track ../common/aclocal.m4 changes.
2310 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2312 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2314 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2316 * configure: Regenerated to track ../common/aclocal.m4 changes.
2317 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2319 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2321 * configure: Regenerated to track ../common/aclocal.m4 changes.
2323 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2325 * interp.c (Max, Min): Comment out functions. Not yet used.
2327 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2329 * configure: Regenerated to track ../common/aclocal.m4 changes.
2331 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2333 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2334 configurable settings for stand-alone simulator.
2336 * configure.in: Added X11 search, just in case.
2338 * configure: Regenerated.
2340 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2342 * interp.c (sim_write, sim_read, load_memory, store_memory):
2343 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2345 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2347 * sim-main.h (GETFCC): Return an unsigned value.
2349 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2351 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2352 (DADD): Result destination is RD not RT.
2354 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2356 * sim-main.h (HIACCESS, LOACCESS): Always define.
2358 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2360 * interp.c (sim_info): Delete.
2362 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2364 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2365 (mips_option_handler): New argument `cpu'.
2366 (sim_open): Update call to sim_add_option_table.
2368 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2370 * mips.igen (CxC1): Add tracing.
2372 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2374 * sim-main.h (Max, Min): Declare.
2376 * interp.c (Max, Min): New functions.
2378 * mips.igen (BC1): Add tracing.
2380 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2382 * interp.c Added memory map for stack in vr4100
2384 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2386 * interp.c (load_memory): Add missing "break"'s.
2388 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2390 * interp.c (sim_store_register, sim_fetch_register): Pass in
2391 length parameter. Return -1.
2393 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2395 * interp.c: Added hardware init hook, fixed warnings.
2397 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2399 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2401 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2403 * interp.c (ifetch16): New function.
2405 * sim-main.h (IMEM32): Rename IMEM.
2406 (IMEM16_IMMED): Define.
2408 (DELAY_SLOT): Update.
2410 * m16run.c (sim_engine_run): New file.
2412 * m16.igen: All instructions except LB.
2413 (LB): Call do_load_byte.
2414 * mips.igen (do_load_byte): New function.
2415 (LB): Call do_load_byte.
2417 * mips.igen: Move spec for insn bit size and high bit from here.
2418 * Makefile.in (tmp-igen, tmp-m16): To here.
2420 * m16.dc: New file, decode mips16 instructions.
2422 * Makefile.in (SIM_NO_ALL): Define.
2423 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2425 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2427 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2428 point unit to 32 bit registers.
2429 * configure: Re-generate.
2431 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2433 * configure.in (sim_use_gen): Make IGEN the default simulator
2434 generator for generic 32 and 64 bit mips targets.
2435 * configure: Re-generate.
2437 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2439 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2442 * interp.c (sim_fetch_register, sim_store_register): Read/write
2443 FGR from correct location.
2444 (sim_open): Set size of FGR's according to
2445 WITH_TARGET_FLOATING_POINT_BITSIZE.
2447 * sim-main.h (FGR): Store floating point registers in a separate
2450 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2452 * configure: Regenerated to track ../common/aclocal.m4 changes.
2454 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2456 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2458 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2460 * interp.c (pending_tick): New function. Deliver pending writes.
2462 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2463 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2464 it can handle mixed sized quantites and single bits.
2466 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2468 * interp.c (oengine.h): Do not include when building with IGEN.
2469 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2470 (sim_info): Ditto for PROCESSOR_64BIT.
2471 (sim_monitor): Replace ut_reg with unsigned_word.
2472 (*): Ditto for t_reg.
2473 (LOADDRMASK): Define.
2474 (sim_open): Remove defunct check that host FP is IEEE compliant,
2475 using software to emulate floating point.
2476 (value_fpr, ...): Always compile, was conditional on HASFPU.
2478 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2480 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2483 * interp.c (SD, CPU): Define.
2484 (mips_option_handler): Set flags in each CPU.
2485 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2486 (sim_close): Do not clear STATE, deleted anyway.
2487 (sim_write, sim_read): Assume CPU zero's vm should be used for
2489 (sim_create_inferior): Set the PC for all processors.
2490 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2492 (mips16_entry): Pass correct nr of args to store_word, load_word.
2493 (ColdReset): Cold reset all cpu's.
2494 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2495 (sim_monitor, load_memory, store_memory, signal_exception): Use
2496 `CPU' instead of STATE_CPU.
2499 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2502 * sim-main.h (signal_exception): Add sim_cpu arg.
2503 (SignalException*): Pass both SD and CPU to signal_exception.
2504 * interp.c (signal_exception): Update.
2506 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2508 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2509 address_translation): Ditto
2510 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2512 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2514 * configure: Regenerated to track ../common/aclocal.m4 changes.
2516 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2518 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2520 * mips.igen (model): Map processor names onto BFD name.
2522 * sim-main.h (CPU_CIA): Delete.
2523 (SET_CIA, GET_CIA): Define
2525 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2527 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2530 * configure.in (default_endian): Configure a big-endian simulator
2532 * configure: Re-generate.
2534 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2536 * configure: Regenerated to track ../common/aclocal.m4 changes.
2538 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2540 * interp.c (sim_monitor): Handle Densan monitor outbyte
2541 and inbyte functions.
2543 1997-12-29 Felix Lee <flee@cygnus.com>
2545 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2547 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2549 * Makefile.in (tmp-igen): Arrange for $zero to always be
2550 reset to zero after every instruction.
2552 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2554 * configure: Regenerated to track ../common/aclocal.m4 changes.
2557 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2559 * mips.igen (MSUB): Fix to work like MADD.
2560 * gencode.c (MSUB): Similarly.
2562 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2564 * configure: Regenerated to track ../common/aclocal.m4 changes.
2566 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2568 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2570 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2572 * sim-main.h (sim-fpu.h): Include.
2574 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2575 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2576 using host independant sim_fpu module.
2578 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2580 * interp.c (signal_exception): Report internal errors with SIGABRT
2583 * sim-main.h (C0_CONFIG): New register.
2584 (signal.h): No longer include.
2586 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2588 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2590 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2592 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2594 * mips.igen: Tag vr5000 instructions.
2595 (ANDI): Was missing mipsIV model, fix assembler syntax.
2596 (do_c_cond_fmt): New function.
2597 (C.cond.fmt): Handle mips I-III which do not support CC field
2599 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2600 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2602 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2603 vr5000 which saves LO in a GPR separatly.
2605 * configure.in (enable-sim-igen): For vr5000, select vr5000
2606 specific instructions.
2607 * configure: Re-generate.
2609 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2611 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2613 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2614 fmt_uninterpreted_64 bit cases to switch. Convert to
2617 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2619 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2620 as specified in IV3.2 spec.
2621 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2623 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2625 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2626 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2627 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2628 PENDING_FILL versions of instructions. Simplify.
2630 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2632 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2634 (MTHI, MFHI): Disable code checking HI-LO.
2636 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2638 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2640 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2642 * gencode.c (build_mips16_operands): Replace IPC with cia.
2644 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2645 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2647 (UndefinedResult): Replace function with macro/function
2649 (sim_engine_run): Don't save PC in IPC.
2651 * sim-main.h (IPC): Delete.
2654 * interp.c (signal_exception, store_word, load_word,
2655 address_translation, load_memory, store_memory, cache_op,
2656 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2657 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2658 current instruction address - cia - argument.
2659 (sim_read, sim_write): Call address_translation directly.
2660 (sim_engine_run): Rename variable vaddr to cia.
2661 (signal_exception): Pass cia to sim_monitor
2663 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2664 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2665 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2667 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2668 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2671 * interp.c (signal_exception): Pass restart address to
2674 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2675 idecode.o): Add dependency.
2677 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2679 (DELAY_SLOT): Update NIA not PC with branch address.
2680 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2682 * mips.igen: Use CIA not PC in branch calculations.
2683 (illegal): Call SignalException.
2684 (BEQ, ADDIU): Fix assembler.
2686 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2688 * m16.igen (JALX): Was missing.
2690 * configure.in (enable-sim-igen): New configuration option.
2691 * configure: Re-generate.
2693 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2695 * interp.c (load_memory, store_memory): Delete parameter RAW.
2696 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2697 bypassing {load,store}_memory.
2699 * sim-main.h (ByteSwapMem): Delete definition.
2701 * Makefile.in (SIM_OBJS): Add sim-memopt module.
2703 * interp.c (sim_do_command, sim_commands): Delete mips specific
2704 commands. Handled by module sim-options.
2706 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2707 (WITH_MODULO_MEMORY): Define.
2709 * interp.c (sim_info): Delete code printing memory size.
2711 * interp.c (mips_size): Nee sim_size, delete function.
2713 (monitor, monitor_base, monitor_size): Delete global variables.
2714 (sim_open, sim_close): Delete code creating monitor and other
2715 memory regions. Use sim-memopts module, via sim_do_commandf, to
2716 manage memory regions.
2717 (load_memory, store_memory): Use sim-core for memory model.
2719 * interp.c (address_translation): Delete all memory map code
2720 except line forcing 32 bit addresses.
2722 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2724 * sim-main.h (WITH_TRACE): Delete definition. Enables common
2727 * interp.c (logfh, logfile): Delete globals.
2728 (sim_open, sim_close): Delete code opening & closing log file.
2729 (mips_option_handler): Delete -l and -n options.
2730 (OPTION mips_options): Ditto.
2732 * interp.c (OPTION mips_options): Rename option trace to dinero.
2733 (mips_option_handler): Update.
2735 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2737 * interp.c (fetch_str): New function.
2738 (sim_monitor): Rewrite using sim_read & sim_write.
2739 (sim_open): Check magic number.
2740 (sim_open): Write monitor vectors into memory using sim_write.
2741 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2742 (sim_read, sim_write): Simplify - transfer data one byte at a
2744 (load_memory, store_memory): Clarify meaning of parameter RAW.
2746 * sim-main.h (isHOST): Defete definition.
2747 (isTARGET): Mark as depreciated.
2748 (address_translation): Delete parameter HOST.
2750 * interp.c (address_translation): Delete parameter HOST.
2752 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
2756 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2757 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2759 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
2761 * mips.igen: Add model filter field to records.
2763 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2765 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
2767 interp.c (sim_engine_run): Do not compile function sim_engine_run
2768 when WITH_IGEN == 1.
2770 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2771 target architecture.
2773 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2774 igen. Replace with configuration variables sim_igen_flags /
2777 * m16.igen: New file. Copy mips16 insns here.
2778 * mips.igen: From here.
2780 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2782 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2784 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2786 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
2788 * gencode.c (build_instruction): Follow sim_write's lead in using
2789 BigEndianMem instead of !ByteSwapMem.
2791 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
2793 * configure.in (sim_gen): Dependent on target, select type of
2794 generator. Always select old style generator.
2796 configure: Re-generate.
2798 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2800 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2801 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2802 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2803 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2804 SIM_@sim_gen@_*, set by autoconf.
2806 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
2808 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2810 * interp.c (ColdReset): Remove #ifdef HASFPU, check
2811 CURRENT_FLOATING_POINT instead.
2813 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2814 (address_translation): Raise exception InstructionFetch when
2815 translation fails and isINSTRUCTION.
2817 * interp.c (sim_open, sim_write, sim_monitor, store_word,
2818 sim_engine_run): Change type of of vaddr and paddr to
2820 (address_translation, prefetch, load_memory, store_memory,
2821 cache_op): Change type of vAddr and pAddr to address_word.
2823 * gencode.c (build_instruction): Change type of vaddr and paddr to
2826 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
2828 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2829 macro to obtain result of ALU op.
2831 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
2833 * interp.c (sim_info): Call profile_print.
2835 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2837 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2839 * sim-main.h (WITH_PROFILE): Do not define, defined in
2840 common/sim-config.h. Use sim-profile module.
2841 (simPROFILE): Delete defintion.
2843 * interp.c (PROFILE): Delete definition.
2844 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2845 (sim_close): Delete code writing profile histogram.
2846 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2848 (sim_engine_run): Delete code profiling the PC.
2850 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2852 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2854 * interp.c (sim_monitor): Make register pointers of type
2857 * sim-main.h: Make registers of type unsigned_word not
2860 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2862 * interp.c (sync_operation): Rename from SyncOperation, make
2863 global, add SD argument.
2864 (prefetch): Rename from Prefetch, make global, add SD argument.
2865 (decode_coproc): Make global.
2867 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2869 * gencode.c (build_instruction): Generate DecodeCoproc not
2870 decode_coproc calls.
2872 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2873 (SizeFGR): Move to sim-main.h
2874 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2875 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2876 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2878 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2879 FP_RM_TOMINF, GETRM): Move to sim-main.h.
2880 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2881 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2882 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2883 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2885 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2887 (sim-alu.h): Include.
2888 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2889 (sim_cia): Typedef to instruction_address.
2891 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
2893 * Makefile.in (interp.o): Rename generated file engine.c to
2898 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
2900 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2902 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
2904 * gencode.c (build_instruction): For "FPSQRT", output correct
2905 number of arguments to Recip.
2907 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
2909 * Makefile.in (interp.o): Depends on sim-main.h
2911 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2913 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2914 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2915 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2916 STATE, DSSTATE): Define
2917 (GPR, FGRIDX, ..): Define.
2919 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2920 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2921 (GPR, FGRIDX, ...): Delete macros.
2923 * interp.c: Update names to match defines from sim-main.h
2925 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
2927 * interp.c (sim_monitor): Add SD argument.
2928 (sim_warning): Delete. Replace calls with calls to
2930 (sim_error): Delete. Replace calls with sim_io_error.
2931 (open_trace, writeout32, writeout16, getnum): Add SD argument.
2932 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2933 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2935 (mips_size): Rename from sim_size. Add SD argument.
2937 * interp.c (simulator): Delete global variable.
2938 (callback): Delete global variable.
2939 (mips_option_handler, sim_open, sim_write, sim_read,
2940 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2941 sim_size,sim_monitor): Use sim_io_* not callback->*.
2942 (sim_open): ZALLOC simulator struct.
2943 (PROFILE): Do not define.
2945 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2947 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2948 support.h with corresponding code.
2950 * sim-main.h (word64, uword64), support.h: Move definition to
2952 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2955 * Makefile.in: Update dependencies
2956 * interp.c: Do not include.
2958 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2960 * interp.c (address_translation, load_memory, store_memory,
2961 cache_op): Rename to from AddressTranslation et.al., make global,
2964 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2967 * interp.c (SignalException): Rename to signal_exception, make
2970 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2972 * sim-main.h (SignalException, SignalExceptionInterrupt,
2973 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2974 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2975 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2978 * interp.c, support.h: Use.
2980 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2982 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2983 to value_fpr / store_fpr. Add SD argument.
2984 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2985 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2987 * sim-main.h (ValueFPR, StoreFPR): Define.
2989 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
2991 * interp.c (sim_engine_run): Check consistency between configure
2992 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2995 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2996 (mips_fpu): Configure WITH_FLOATING_POINT.
2997 (mips_endian): Configure WITH_TARGET_ENDIAN.
2998 * configure: Update.
3000 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3002 * configure: Regenerated to track ../common/aclocal.m4 changes.
3004 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3006 * configure: Regenerated.
3008 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3010 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3012 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3014 * gencode.c (print_igen_insn_models): Assume certain architectures
3015 include all mips* instructions.
3016 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3019 * Makefile.in (tmp.igen): Add target. Generate igen input from
3022 * gencode.c (FEATURE_IGEN): Define.
3023 (main): Add --igen option. Generate output in igen format.
3024 (process_instructions): Format output according to igen option.
3025 (print_igen_insn_format): New function.
3026 (print_igen_insn_models): New function.
3027 (process_instructions): Only issue warnings and ignore
3028 instructions when no FEATURE_IGEN.
3030 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3032 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3035 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3037 * configure: Regenerated to track ../common/aclocal.m4 changes.
3039 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3041 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3042 SIM_RESERVED_BITS): Delete, moved to common.
3043 (SIM_EXTRA_CFLAGS): Update.
3045 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3047 * configure.in: Configure non-strict memory alignment.
3048 * configure: Regenerated to track ../common/aclocal.m4 changes.
3050 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3052 * configure: Regenerated to track ../common/aclocal.m4 changes.
3054 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3056 * gencode.c (SDBBP,DERET): Added (3900) insns.
3057 (RFE): Turn on for 3900.
3058 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3059 (dsstate): Made global.
3060 (SUBTARGET_R3900): Added.
3061 (CANCELDELAYSLOT): New.
3062 (SignalException): Ignore SystemCall rather than ignore and
3063 terminate. Add DebugBreakPoint handling.
3064 (decode_coproc): New insns RFE, DERET; and new registers Debug
3065 and DEPC protected by SUBTARGET_R3900.
3066 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3068 * Makefile.in,configure.in: Add mips subtarget option.
3069 * configure: Update.
3071 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3073 * gencode.c: Add r3900 (tx39).
3076 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3078 * gencode.c (build_instruction): Don't need to subtract 4 for
3081 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3083 * interp.c: Correct some HASFPU problems.
3085 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3087 * configure: Regenerated to track ../common/aclocal.m4 changes.
3089 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3091 * interp.c (mips_options): Fix samples option short form, should
3094 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3096 * interp.c (sim_info): Enable info code. Was just returning.
3098 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3100 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3103 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3105 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3107 (build_instruction): Ditto for LL.
3109 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3111 * configure: Regenerated to track ../common/aclocal.m4 changes.
3113 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3115 * configure: Regenerated to track ../common/aclocal.m4 changes.
3118 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3120 * interp.c (sim_open): Add call to sim_analyze_program, update
3123 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3125 * interp.c (sim_kill): Delete.
3126 (sim_create_inferior): Add ABFD argument. Set PC from same.
3127 (sim_load): Move code initializing trap handlers from here.
3128 (sim_open): To here.
3129 (sim_load): Delete, use sim-hload.c.
3131 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3133 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3135 * configure: Regenerated to track ../common/aclocal.m4 changes.
3138 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3140 * interp.c (sim_open): Add ABFD argument.
3141 (sim_load): Move call to sim_config from here.
3142 (sim_open): To here. Check return status.
3144 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3146 * gencode.c (build_instruction): Two arg MADD should
3147 not assign result to $0.
3149 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3151 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3152 * sim/mips/configure.in: Regenerate.
3154 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3156 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3157 signed8, unsigned8 et.al. types.
3159 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3160 hosts when selecting subreg.
3162 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3164 * interp.c (sim_engine_run): Reset the ZERO register to zero
3165 regardless of FEATURE_WARN_ZERO.
3166 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3168 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3170 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3171 (SignalException): For BreakPoints ignore any mode bits and just
3173 (SignalException): Always set the CAUSE register.
3175 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3177 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3178 exception has been taken.
3180 * interp.c: Implement the ERET and mt/f sr instructions.
3182 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3184 * interp.c (SignalException): Don't bother restarting an
3187 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3189 * interp.c (SignalException): Really take an interrupt.
3190 (interrupt_event): Only deliver interrupts when enabled.
3192 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3194 * interp.c (sim_info): Only print info when verbose.
3195 (sim_info) Use sim_io_printf for output.
3197 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3199 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3202 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3204 * interp.c (sim_do_command): Check for common commands if a
3205 simulator specific command fails.
3207 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3209 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3210 and simBE when DEBUG is defined.
3212 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3214 * interp.c (interrupt_event): New function. Pass exception event
3215 onto exception handler.
3217 * configure.in: Check for stdlib.h.
3218 * configure: Regenerate.
3220 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3221 variable declaration.
3222 (build_instruction): Initialize memval1.
3223 (build_instruction): Add UNUSED attribute to byte, bigend,
3225 (build_operands): Ditto.
3227 * interp.c: Fix GCC warnings.
3228 (sim_get_quit_code): Delete.
3230 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3231 * Makefile.in: Ditto.
3232 * configure: Re-generate.
3234 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3236 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3238 * interp.c (mips_option_handler): New function parse argumes using
3240 (myname): Replace with STATE_MY_NAME.
3241 (sim_open): Delete check for host endianness - performed by
3243 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3244 (sim_open): Move much of the initialization from here.
3245 (sim_load): To here. After the image has been loaded and
3247 (sim_open): Move ColdReset from here.
3248 (sim_create_inferior): To here.
3249 (sim_open): Make FP check less dependant on host endianness.
3251 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3253 * interp.c (sim_set_callbacks): Delete.
3255 * interp.c (membank, membank_base, membank_size): Replace with
3256 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3257 (sim_open): Remove call to callback->init. gdb/run do this.
3261 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3263 * interp.c (big_endian_p): Delete, replaced by
3264 current_target_byte_order.
3266 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3268 * interp.c (host_read_long, host_read_word, host_swap_word,
3269 host_swap_long): Delete. Using common sim-endian.
3270 (sim_fetch_register, sim_store_register): Use H2T.
3271 (pipeline_ticks): Delete. Handled by sim-events.
3273 (sim_engine_run): Update.
3275 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3277 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3279 (SignalException): To here. Signal using sim_engine_halt.
3280 (sim_stop_reason): Delete, moved to common.
3282 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3284 * interp.c (sim_open): Add callback argument.
3285 (sim_set_callbacks): Delete SIM_DESC argument.
3288 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3290 * Makefile.in (SIM_OBJS): Add common modules.
3292 * interp.c (sim_set_callbacks): Also set SD callback.
3293 (set_endianness, xfer_*, swap_*): Delete.
3294 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3295 Change to functions using sim-endian macros.
3296 (control_c, sim_stop): Delete, use common version.
3297 (simulate): Convert into.
3298 (sim_engine_run): This function.
3299 (sim_resume): Delete.
3301 * interp.c (simulation): New variable - the simulator object.
3302 (sim_kind): Delete global - merged into simulation.
3303 (sim_load): Cleanup. Move PC assignment from here.
3304 (sim_create_inferior): To here.
3306 * sim-main.h: New file.
3307 * interp.c (sim-main.h): Include.
3309 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3311 * configure: Regenerated to track ../common/aclocal.m4 changes.
3313 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3315 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3317 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3319 * gencode.c (build_instruction): DIV instructions: check
3320 for division by zero and integer overflow before using
3321 host's division operation.
3323 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3325 * Makefile.in (SIM_OBJS): Add sim-load.o.
3326 * interp.c: #include bfd.h.
3327 (target_byte_order): Delete.
3328 (sim_kind, myname, big_endian_p): New static locals.
3329 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3330 after argument parsing. Recognize -E arg, set endianness accordingly.
3331 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3332 load file into simulator. Set PC from bfd.
3333 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3334 (set_endianness): Use big_endian_p instead of target_byte_order.
3336 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3338 * interp.c (sim_size): Delete prototype - conflicts with
3339 definition in remote-sim.h. Correct definition.
3341 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3343 * configure: Regenerated to track ../common/aclocal.m4 changes.
3346 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3348 * interp.c (sim_open): New arg `kind'.
3350 * configure: Regenerated to track ../common/aclocal.m4 changes.
3352 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3354 * configure: Regenerated to track ../common/aclocal.m4 changes.
3356 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3358 * interp.c (sim_open): Set optind to 0 before calling getopt.
3360 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3362 * configure: Regenerated to track ../common/aclocal.m4 changes.
3364 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3366 * interp.c : Replace uses of pr_addr with pr_uword64
3367 where the bit length is always 64 independent of SIM_ADDR.
3368 (pr_uword64) : added.
3370 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3372 * configure: Re-generate.
3374 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3376 * configure: Regenerate to track ../common/aclocal.m4 changes.
3378 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3380 * interp.c (sim_open): New SIM_DESC result. Argument is now
3382 (other sim_*): New SIM_DESC argument.
3384 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3386 * interp.c: Fix printing of addresses for non-64-bit targets.
3387 (pr_addr): Add function to print address based on size.
3389 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3391 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3393 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3395 * gencode.c (build_mips16_operands): Correct computation of base
3396 address for extended PC relative instruction.
3398 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3400 * interp.c (mips16_entry): Add support for floating point cases.
3401 (SignalException): Pass floating point cases to mips16_entry.
3402 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3404 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3406 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3407 and then set the state to fmt_uninterpreted.
3408 (COP_SW): Temporarily set the state to fmt_word while calling
3411 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3413 * gencode.c (build_instruction): The high order may be set in the
3414 comparison flags at any ISA level, not just ISA 4.
3416 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3418 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3419 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3420 * configure.in: sinclude ../common/aclocal.m4.
3421 * configure: Regenerated.
3423 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3425 * configure: Rebuild after change to aclocal.m4.
3427 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3429 * configure configure.in Makefile.in: Update to new configure
3430 scheme which is more compatible with WinGDB builds.
3431 * configure.in: Improve comment on how to run autoconf.
3432 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3433 * Makefile.in: Use autoconf substitution to install common
3436 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3438 * gencode.c (build_instruction): Use BigEndianCPU instead of
3441 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3443 * interp.c (sim_monitor): Make output to stdout visible in
3444 wingdb's I/O log window.
3446 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3448 * support.h: Undo previous change to SIGTRAP
3451 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3453 * interp.c (store_word, load_word): New static functions.
3454 (mips16_entry): New static function.
3455 (SignalException): Look for mips16 entry and exit instructions.
3456 (simulate): Use the correct index when setting fpr_state after
3457 doing a pending move.
3459 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3461 * interp.c: Fix byte-swapping code throughout to work on
3462 both little- and big-endian hosts.
3464 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3466 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3467 with gdb/config/i386/xm-windows.h.
3469 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3471 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3472 that messes up arithmetic shifts.
3474 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3476 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3477 SIGTRAP and SIGQUIT for _WIN32.
3479 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3481 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3482 force a 64 bit multiplication.
3483 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3484 destination register is 0, since that is the default mips16 nop
3487 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3489 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3490 (build_endian_shift): Don't check proc64.
3491 (build_instruction): Always set memval to uword64. Cast op2 to
3492 uword64 when shifting it left in memory instructions. Always use
3493 the same code for stores--don't special case proc64.
3495 * gencode.c (build_mips16_operands): Fix base PC value for PC
3497 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3499 * interp.c (simJALDELAYSLOT): Define.
3500 (JALDELAYSLOT): Define.
3501 (INDELAYSLOT, INJALDELAYSLOT): Define.
3502 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3504 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3506 * interp.c (sim_open): add flush_cache as a PMON routine
3507 (sim_monitor): handle flush_cache by ignoring it
3509 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3511 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3513 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3514 (BigEndianMem): Rename to ByteSwapMem and change sense.
3515 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3516 BigEndianMem references to !ByteSwapMem.
3517 (set_endianness): New function, with prototype.
3518 (sim_open): Call set_endianness.
3519 (sim_info): Use simBE instead of BigEndianMem.
3520 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3521 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3522 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3523 ifdefs, keeping the prototype declaration.
3524 (swap_word): Rewrite correctly.
3525 (ColdReset): Delete references to CONFIG. Delete endianness related
3526 code; moved to set_endianness.
3528 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3530 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3531 * interp.c (CHECKHILO): Define away.
3532 (simSIGINT): New macro.
3533 (membank_size): Increase from 1MB to 2MB.
3534 (control_c): New function.
3535 (sim_resume): Rename parameter signal to signal_number. Add local
3536 variable prev. Call signal before and after simulate.
3537 (sim_stop_reason): Add simSIGINT support.
3538 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3540 (sim_warning): Delete call to SignalException. Do call printf_filtered
3542 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3543 a call to sim_warning.
3545 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3547 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3548 16 bit instructions.
3550 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3552 Add support for mips16 (16 bit MIPS implementation):
3553 * gencode.c (inst_type): Add mips16 instruction encoding types.
3554 (GETDATASIZEINSN): Define.
3555 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3556 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3558 (MIPS16_DECODE): New table, for mips16 instructions.
3559 (bitmap_val): New static function.
3560 (struct mips16_op): Define.
3561 (mips16_op_table): New table, for mips16 operands.
3562 (build_mips16_operands): New static function.
3563 (process_instructions): If PC is odd, decode a mips16
3564 instruction. Break out instruction handling into new
3565 build_instruction function.
3566 (build_instruction): New static function, broken out of
3567 process_instructions. Check modifiers rather than flags for SHIFT
3568 bit count and m[ft]{hi,lo} direction.
3569 (usage): Pass program name to fprintf.
3570 (main): Remove unused variable this_option_optind. Change
3571 ``*loptarg++'' to ``loptarg++''.
3572 (my_strtoul): Parenthesize && within ||.
3573 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3574 (simulate): If PC is odd, fetch a 16 bit instruction, and
3575 increment PC by 2 rather than 4.
3576 * configure.in: Add case for mips16*-*-*.
3577 * configure: Rebuild.
3579 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3581 * interp.c: Allow -t to enable tracing in standalone simulator.
3582 Fix garbage output in trace file and error messages.
3584 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3586 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3587 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3588 * configure.in: Simplify using macros in ../common/aclocal.m4.
3589 * configure: Regenerated.
3590 * tconfig.in: New file.
3592 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3594 * interp.c: Fix bugs in 64-bit port.
3595 Use ansi function declarations for msvc compiler.
3596 Initialize and test file pointer in trace code.
3597 Prevent duplicate definition of LAST_EMED_REGNUM.
3599 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3601 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3603 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3605 * interp.c (SignalException): Check for explicit terminating
3607 * gencode.c: Pass instruction value through SignalException()
3608 calls for Trap, Breakpoint and Syscall.
3610 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3612 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3613 only used on those hosts that provide it.
3614 * configure.in: Add sqrt() to list of functions to be checked for.
3615 * config.in: Re-generated.
3616 * configure: Re-generated.
3618 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3620 * gencode.c (process_instructions): Call build_endian_shift when
3621 expanding STORE RIGHT, to fix swr.
3622 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3623 clear the high bits.
3624 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3625 Fix float to int conversions to produce signed values.
3627 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3629 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3630 (process_instructions): Correct handling of nor instruction.
3631 Correct shift count for 32 bit shift instructions. Correct sign
3632 extension for arithmetic shifts to not shift the number of bits in
3633 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3634 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3636 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3637 It's OK to have a mult follow a mult. What's not OK is to have a
3638 mult follow an mfhi.
3639 (Convert): Comment out incorrect rounding code.
3641 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3643 * interp.c (sim_monitor): Improved monitor printf
3644 simulation. Tidied up simulator warnings, and added "--log" option
3645 for directing warning message output.
3646 * gencode.c: Use sim_warning() rather than WARNING macro.
3648 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3650 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3651 getopt1.o, rather than on gencode.c. Link objects together.
3652 Don't link against -liberty.
3653 (gencode.o, getopt.o, getopt1.o): New targets.
3654 * gencode.c: Include <ctype.h> and "ansidecl.h".
3655 (AND): Undefine after including "ansidecl.h".
3656 (ULONG_MAX): Define if not defined.
3657 (OP_*): Don't define macros; now defined in opcode/mips.h.
3658 (main): Call my_strtoul rather than strtoul.
3659 (my_strtoul): New static function.
3661 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3663 * gencode.c (process_instructions): Generate word64 and uword64
3664 instead of `long long' and `unsigned long long' data types.
3665 * interp.c: #include sysdep.h to get signals, and define default
3667 * (Convert): Work around for Visual-C++ compiler bug with type
3669 * support.h: Make things compile under Visual-C++ by using
3670 __int64 instead of `long long'. Change many refs to long long
3671 into word64/uword64 typedefs.
3673 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
3675 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3676 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3678 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3679 (AC_PROG_INSTALL): Added.
3680 (AC_PROG_CC): Moved to before configure.host call.
3681 * configure: Rebuilt.
3683 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
3685 * configure.in: Define @SIMCONF@ depending on mips target.
3686 * configure: Rebuild.
3687 * Makefile.in (run): Add @SIMCONF@ to control simulator
3689 * gencode.c: Change LOADDRMASK to 64bit memory model only.
3690 * interp.c: Remove some debugging, provide more detailed error
3691 messages, update memory accesses to use LOADDRMASK.
3693 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
3695 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3696 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
3698 * configure: Rebuild.
3699 * config.in: New file, generated by autoheader.
3700 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
3701 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
3702 HAVE_ANINT and HAVE_AINT, as appropriate.
3703 * Makefile.in (run): Use @LIBS@ rather than -lm.
3704 (interp.o): Depend upon config.h.
3705 (Makefile): Just rebuild Makefile.
3706 (clean): Remove stamp-h.
3707 (mostlyclean): Make the same as clean, not as distclean.
3708 (config.h, stamp-h): New targets.
3710 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3712 * interp.c (ColdReset): Fix boolean test. Make all simulator
3715 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
3717 * interp.c (xfer_direct_word, xfer_direct_long,
3718 swap_direct_word, swap_direct_long, xfer_big_word,
3719 xfer_big_long, xfer_little_word, xfer_little_long,
3720 swap_word,swap_long): Added.
3721 * interp.c (ColdReset): Provide function indirection to
3722 host<->simulated_target transfer routines.
3723 * interp.c (sim_store_register, sim_fetch_register): Updated to
3724 make use of indirected transfer routines.
3726 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
3728 * gencode.c (process_instructions): Ensure FP ABS instruction
3730 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3731 system call support.
3733 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
3735 * interp.c (sim_do_command): Complain if callback structure not
3738 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
3740 * interp.c (Convert): Provide round-to-nearest and round-to-zero
3741 support for Sun hosts.
3742 * Makefile.in (gencode): Ensure the host compiler and libraries
3743 used for cross-hosted build.
3745 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
3747 * interp.c, gencode.c: Some more (TODO) tidying.
3749 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
3751 * gencode.c, interp.c: Replaced explicit long long references with
3752 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3753 * support.h (SET64LO, SET64HI): Macros added.
3755 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
3757 * configure: Regenerate with autoconf 2.7.
3759 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
3761 * interp.c (LoadMemory): Enclose text following #endif in /* */.
3762 * support.h: Remove superfluous "1" from #if.
3763 * support.h (CHECKSIM): Remove stray 'a' at end of line.
3765 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
3767 * interp.c (StoreFPR): Control UndefinedResult() call on
3768 WARN_RESULT manifest.
3770 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
3772 * gencode.c: Tidied instruction decoding, and added FP instruction
3775 * interp.c: Added dineroIII, and BSD profiling support. Also
3776 run-time FP handling.
3778 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
3780 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3781 gencode.c, interp.c, support.h: created.