Separate r5900 specifoc and mips16 instructions.
[deliverable/binutils-gdb.git] / sim / mips / ChangeLog
1 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
2
3 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
4
5 interp.c (sim_engine_run): Do not compile function sim_engine_run
6 when WITH_IGEN == 1.
7
8 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
9 target architecture.
10
11 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
12 igen. Replace with configuration variables sim_igen_flags /
13 sim_m16_flags.
14
15 end-sanitize-v5900
16 * r5900.igen: New file. Copy v5900 insns here.
17 start-sanitize-r5900
18 end-sanitize-v5400
19 * vr5400.igen: New file.
20 start-sanitize-vr5400
21 * m16.igen: New file. Copy mips16 insns here.
22 * mips.igen: From here.
23
24 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
25
26 start-sanitize-vr5400
27 * mips.igen: Tag all mipsIV instructions with vr5400 model.
28
29 * configure.in: Add mips64vr5400 target.
30 * configure: Re-generate.
31
32 end-sanitize-vr5400
33 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
34 to top.
35 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
36
37 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
38
39 * gencode.c (build_instruction): Follow sim_write's lead in using
40 BigEndianMem instead of !ByteSwapMem.
41
42 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
43
44 * configure.in (sim_gen): Dependent on target, select type of
45 generator. Always select old style generator.
46
47 configure: Re-generate.
48
49 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
50 targets.
51 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
52 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
53 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
54 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
55 SIM_@sim_gen@_*, set by autoconf.
56
57 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
58
59 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
60
61 * interp.c (ColdReset): Remove #ifdef HASFPU, check
62 CURRENT_FLOATING_POINT instead.
63
64 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
65 (address_translation): Raise exception InstructionFetch when
66 translation fails and isINSTRUCTION.
67
68 * interp.c (sim_open, sim_write, sim_monitor, store_word,
69 sim_engine_run): Change type of of vaddr and paddr to
70 address_word.
71 (address_translation, prefetch, load_memory, store_memory,
72 cache_op): Change type of vAddr and pAddr to address_word.
73
74 * gencode.c (build_instruction): Change type of vaddr and paddr to
75 address_word.
76
77 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
78
79 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
80 macro to obtain result of ALU op.
81
82 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
83
84 * interp.c (sim_info): Call profile_print.
85
86 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
87
88 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
89
90 * sim-main.h (WITH_PROFILE): Do not define, defined in
91 common/sim-config.h. Use sim-profile module.
92 (simPROFILE): Delete defintion.
93
94 * interp.c (PROFILE): Delete definition.
95 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
96 (sim_close): Delete code writing profile histogram.
97 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
98 Delete.
99 (sim_engine_run): Delete code profiling the PC.
100
101 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
102
103 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
104
105 * interp.c (sim_monitor): Make register pointers of type
106 unsigned_word*.
107
108 * sim-main.h: Make registers of type unsigned_word not
109 signed_word.
110
111 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
112
113 start-sanitize-r5900
114 * sim-main.h (BYTES_IN_MMI_REGS, ..., SUB_REG_FETCH, ..., GPR_SB,
115 ...): Move to sim-main.h
116
117 end-sanitize-r5900
118 * interp.c (sync_operation): Rename from SyncOperation, make
119 global, add SD argument.
120 (prefetch): Rename from Prefetch, make global, add SD argument.
121 (decode_coproc): Make global.
122
123 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
124
125 * gencode.c (build_instruction): Generate DecodeCoproc not
126 decode_coproc calls.
127
128 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
129 (SizeFGR): Move to sim-main.h
130 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
131 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
132 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
133 sim-main.h.
134 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
135 FP_RM_TOMINF, GETRM): Move to sim-main.h.
136 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
137 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
138 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
139 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
140
141 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
142 exception.
143 (sim-alu.h): Include.
144 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
145 (sim_cia): Typedef to instruction_address.
146
147 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
148
149 * Makefile.in (interp.o): Rename generated file engine.c to
150 oengine.c.
151
152 * interp.c: Update.
153
154 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
155
156 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
157
158 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
159
160 * gencode.c (build_instruction): For "FPSQRT", output correct
161 number of arguments to Recip.
162
163 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
164
165 * Makefile.in (interp.o): Depends on sim-main.h
166
167 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
168
169 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
170 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
171 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
172 STATE, DSSTATE): Define
173 (GPR, FGRIDX, ..): Define.
174
175 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
176 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
177 (GPR, FGRIDX, ...): Delete macros.
178
179 * interp.c: Update names to match defines from sim-main.h
180
181 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
182
183 * interp.c (sim_monitor): Add SD argument.
184 (sim_warning): Delete. Replace calls with calls to
185 sim_io_eprintf.
186 (sim_error): Delete. Replace calls with sim_io_error.
187 (open_trace, writeout32, writeout16, getnum): Add SD argument.
188 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
189 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
190 argument.
191 (mips_size): Rename from sim_size. Add SD argument.
192
193 * interp.c (simulator): Delete global variable.
194 (callback): Delete global variable.
195 (mips_option_handler, sim_open, sim_write, sim_read,
196 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
197 sim_size,sim_monitor): Use sim_io_* not callback->*.
198 (sim_open): ZALLOC simulator struct.
199 (PROFILE): Do not define.
200
201 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
202
203 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
204 support.h with corresponding code.
205
206 * sim-main.h (word64, uword64), support.h: Move definition to
207 sim-main.h.
208 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
209
210 * support.h: Delete
211 * Makefile.in: Update dependencies
212 * interp.c: Do not include.
213
214 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
215
216 * interp.c (address_translation, load_memory, store_memory,
217 cache_op): Rename to from AddressTranslation et.al., make global,
218 add SD argument
219
220 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
221 CacheOp): Define.
222
223 * interp.c (SignalException): Rename to signal_exception, make
224 global.
225
226 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
227
228 * sim-main.h (SignalException, SignalExceptionInterrupt,
229 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
230 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
231 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
232 Define.
233
234 * interp.c, support.h: Use.
235
236 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
237
238 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
239 to value_fpr / store_fpr. Add SD argument.
240 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
241 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
242
243 * sim-main.h (ValueFPR, StoreFPR): Define.
244
245 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
246
247 * interp.c (sim_engine_run): Check consistency between configure
248 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
249 and HASFPU.
250
251 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
252 (mips_fpu): Configure WITH_FLOATING_POINT.
253 (mips_endian): Configure WITH_TARGET_ENDIAN.
254 * configure: Update.
255
256 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
257
258 * configure: Regenerated to track ../common/aclocal.m4 changes.
259
260 start-sanitize-r5900
261 Mon Aug 25 19:11:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
262
263 * interp.c (MAX_REG): Allow up-to 128 registers.
264 (LO1, HI1): Define value that matches REGISTER_NAMES in gdb.
265 (REGISTER_SA): Ditto.
266 (sim_open): Initialize register_widths for r5900 specific
267 registers.
268 (sim_fetch_register, sim_store_register): Check for request of
269 r5900 specific SA register. Check for request for hi 64 bits of
270 r5900 specific registers.
271
272 end-sanitize-r5900
273 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
274
275 * configure: Regenerated.
276
277 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
278
279 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
280
281 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
282
283 * gencode.c (print_igen_insn_models): Assume certain architectures
284 include all mips* instructions.
285 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
286 instruction.
287
288 * Makefile.in (tmp.igen): Add target. Generate igen input from
289 gencode file.
290
291 * gencode.c (FEATURE_IGEN): Define.
292 (main): Add --igen option. Generate output in igen format.
293 (process_instructions): Format output according to igen option.
294 (print_igen_insn_format): New function.
295 (print_igen_insn_models): New function.
296 (process_instructions): Only issue warnings and ignore
297 instructions when no FEATURE_IGEN.
298
299 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
300
301 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
302 MIPS targets.
303
304 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
305
306 * configure: Regenerated to track ../common/aclocal.m4 changes.
307
308 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
309
310 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
311 SIM_RESERVED_BITS): Delete, moved to common.
312 (SIM_EXTRA_CFLAGS): Update.
313
314 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
315
316 * configure.in: Configure non-strict memory alignment.
317 * configure: Regenerated to track ../common/aclocal.m4 changes.
318
319 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
320
321 * configure: Regenerated to track ../common/aclocal.m4 changes.
322
323 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
324
325 * gencode.c (SDBBP,DERET): Added (3900) insns.
326 (RFE): Turn on for 3900.
327 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
328 (dsstate): Made global.
329 (SUBTARGET_R3900): Added.
330 (CANCELDELAYSLOT): New.
331 (SignalException): Ignore SystemCall rather than ignore and
332 terminate. Add DebugBreakPoint handling.
333 (decode_coproc): New insns RFE, DERET; and new registers Debug
334 and DEPC protected by SUBTARGET_R3900.
335 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
336 bits explicitly.
337 * Makefile.in,configure.in: Add mips subtarget option.
338 * configure: Update.
339
340 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
341
342 * gencode.c: Add r3900 (tx39).
343
344 start-sanitize-tx19
345 * gencode.c: Fix some configuration problems by improving
346 the relationship between tx19 and tx39.
347 end-sanitize-tx19
348
349 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
350
351 * gencode.c (build_instruction): Don't need to subtract 4 for
352 JALR, just 2.
353
354 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
355
356 * interp.c: Correct some HASFPU problems.
357
358 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
359
360 * configure: Regenerated to track ../common/aclocal.m4 changes.
361
362 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
363
364 * interp.c (mips_options): Fix samples option short form, should
365 be `x'.
366
367 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
368
369 * interp.c (sim_info): Enable info code. Was just returning.
370
371 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
372
373 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
374 MFC0.
375
376 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
377
378 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
379 constants.
380 (build_instruction): Ditto for LL.
381
382 start-sanitize-tx19
383 Sun Sep 7 16:05:46 1997 Gavin Koch <gavin@cygnus.com>
384
385 * mips/configure.in, mips/gencode: Add tx19/r1900.
386
387 end-sanitize-tx19
388 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
389
390 * configure: Regenerated to track ../common/aclocal.m4 changes.
391
392 start-sanitize-r5900
393 Mon Sep 1 18:43:30 1997 Andrew Cagney <cagney@b1.cygnus.com>
394
395 * gencode.c (build_instruction): For "pabsw" and "pabsh", check
396 for overflow due to ABS of MININT, set result to MAXINT.
397 (build_instruction): For "psrlvw", signextend bit 31.
398
399 end-sanitize-r5900
400 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
401
402 * configure: Regenerated to track ../common/aclocal.m4 changes.
403 * config.in: Ditto.
404
405 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
406
407 * interp.c (sim_open): Add call to sim_analyze_program, update
408 call to sim_config.
409
410 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
411
412 * interp.c (sim_kill): Delete.
413 (sim_create_inferior): Add ABFD argument. Set PC from same.
414 (sim_load): Move code initializing trap handlers from here.
415 (sim_open): To here.
416 (sim_load): Delete, use sim-hload.c.
417
418 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
419
420 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
421
422 * configure: Regenerated to track ../common/aclocal.m4 changes.
423 * config.in: Ditto.
424
425 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
426
427 * interp.c (sim_open): Add ABFD argument.
428 (sim_load): Move call to sim_config from here.
429 (sim_open): To here. Check return status.
430
431 start-sanitize-r5900
432 * gencode.c (build_instruction): Do not define x8000000000000000,
433 x7FFFFFFFFFFFFFFF, or xFFFFFFFF80000000.
434
435 end-sanitize-r5900
436 start-sanitize-r5900
437 Mon Jul 28 19:49:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
438
439 * gencode.c (build_instruction): For "pdivw", "pdivbw" and
440 "pdivuw" check for overflow due to signed divide by -1.
441
442 end-sanitize-r5900
443 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
444
445 * gencode.c (build_instruction): Two arg MADD should
446 not assign result to $0.
447
448 start-sanitize-r5900
449 Thu Jul 10 11:58:48 1997 Andrew Cagney <cagney@critters.cygnus.com>
450
451 * gencode.c (build_instruction): For "ppac5" use unsigned
452 arrithmetic so that the sign bit doesn't smear when right shifted.
453 (build_instruction): For "pdiv" perform sign extension when
454 storing results in HI and LO.
455 (build_instructions): For "pdiv" and "pdivbw" check for
456 divide-by-zero.
457 (build_instruction): For "pmfhl.slw" update hi part of dest
458 register as well as low part.
459 (build_instruction): For "pmfhl" portably handle long long values.
460 (build_instruction): For "pmfhl.sh" correctly negative values.
461 Store half words 2 and three in the correct place.
462 (build_instruction): For "psllvw", sign extend value after shift.
463
464 end-sanitize-r5900
465 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
466
467 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
468 * sim/mips/configure.in: Regenerate.
469
470 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
471
472 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
473 signed8, unsigned8 et.al. types.
474
475 start-sanitize-r5900
476 * gencode.c (build_instruction): For PMULTU* do not sign extend
477 registers. Make generated code easier to debug.
478
479 end-sanitize-r5900
480 * interp.c (SUB_REG_FETCH): Handle both little and big endian
481 hosts when selecting subreg.
482
483 start-sanitize-r5900
484 Tue Jul 8 18:07:20 1997 Andrew Cagney <cagney@andros.cygnus.com>
485
486 * gencode.c (type_for_data_len): For 32bit operations concerned
487 with overflow, perform op using 64bits.
488 (build_instruction): For PADD, always compute operation using type
489 returned by type_for_data_len.
490 (build_instruction): For PSUBU, when overflow, saturate to zero as
491 actually underflow.
492
493 end-sanitize-r5900
494 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
495
496 start-sanitize-r5900
497 * gencode.c (build_instruction): Handle "pext5" according to
498 version 1.95 of the r5900 ISA.
499
500 * gencode.c (build_instruction): Handle "ppac5" according to
501 version 1.95 of the r5900 ISA.
502
503 end-sanitize-r5900
504 * interp.c (sim_engine_run): Reset the ZERO register to zero
505 regardless of FEATURE_WARN_ZERO.
506 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
507
508 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
509
510 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
511 (SignalException): For BreakPoints ignore any mode bits and just
512 save the PC.
513 (SignalException): Always set the CAUSE register.
514
515 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
516
517 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
518 exception has been taken.
519
520 * interp.c: Implement the ERET and mt/f sr instructions.
521
522 start-sanitize-r5900
523 Mon Jun 2 23:28:19 1997 Andrew Cagney <cagney@b1.cygnus.com>
524
525 * gencode.c (build_instruction): For paddu, extract unsigned
526 sub-fields.
527
528 * gencode.c (build_instruction): Saturate padds instead of padd
529 instructions.
530
531 end-sanitize-r5900
532 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
533
534 * interp.c (SignalException): Don't bother restarting an
535 interrupt.
536
537 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
538
539 * interp.c (SignalException): Really take an interrupt.
540 (interrupt_event): Only deliver interrupts when enabled.
541
542 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
543
544 * interp.c (sim_info): Only print info when verbose.
545 (sim_info) Use sim_io_printf for output.
546
547 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
548
549 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
550 mips architectures.
551
552 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
553
554 * interp.c (sim_do_command): Check for common commands if a
555 simulator specific command fails.
556
557 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
558
559 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
560 and simBE when DEBUG is defined.
561
562 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
563
564 * interp.c (interrupt_event): New function. Pass exception event
565 onto exception handler.
566
567 * configure.in: Check for stdlib.h.
568 * configure: Regenerate.
569
570 * gencode.c (build_instruction): Add UNUSED attribute to tempS
571 variable declaration.
572 (build_instruction): Initialize memval1.
573 (build_instruction): Add UNUSED attribute to byte, bigend,
574 reverse.
575 (build_operands): Ditto.
576
577 * interp.c: Fix GCC warnings.
578 (sim_get_quit_code): Delete.
579
580 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
581 * Makefile.in: Ditto.
582 * configure: Re-generate.
583
584 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
585
586 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
587
588 * interp.c (mips_option_handler): New function parse argumes using
589 sim-options.
590 (myname): Replace with STATE_MY_NAME.
591 (sim_open): Delete check for host endianness - performed by
592 sim_config.
593 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
594 (sim_open): Move much of the initialization from here.
595 (sim_load): To here. After the image has been loaded and
596 endianness set.
597 (sim_open): Move ColdReset from here.
598 (sim_create_inferior): To here.
599 (sim_open): Make FP check less dependant on host endianness.
600
601 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
602 run.
603 * interp.c (sim_set_callbacks): Delete.
604
605 * interp.c (membank, membank_base, membank_size): Replace with
606 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
607 (sim_open): Remove call to callback->init. gdb/run do this.
608
609 * interp.c: Update
610
611 * sim-main.h (SIM_HAVE_FLATMEM): Define.
612
613 * interp.c (big_endian_p): Delete, replaced by
614 current_target_byte_order.
615
616 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
617
618 * interp.c (host_read_long, host_read_word, host_swap_word,
619 host_swap_long): Delete. Using common sim-endian.
620 (sim_fetch_register, sim_store_register): Use H2T.
621 (pipeline_ticks): Delete. Handled by sim-events.
622 (sim_info): Update.
623 (sim_engine_run): Update.
624
625 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
626
627 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
628 reason from here.
629 (SignalException): To here. Signal using sim_engine_halt.
630 (sim_stop_reason): Delete, moved to common.
631
632 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
633
634 * interp.c (sim_open): Add callback argument.
635 (sim_set_callbacks): Delete SIM_DESC argument.
636 (sim_size): Ditto.
637
638 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
639
640 * Makefile.in (SIM_OBJS): Add common modules.
641
642 * interp.c (sim_set_callbacks): Also set SD callback.
643 (set_endianness, xfer_*, swap_*): Delete.
644 (host_read_word, host_read_long, host_swap_word, host_swap_long):
645 Change to functions using sim-endian macros.
646 (control_c, sim_stop): Delete, use common version.
647 (simulate): Convert into.
648 (sim_engine_run): This function.
649 (sim_resume): Delete.
650
651 * interp.c (simulation): New variable - the simulator object.
652 (sim_kind): Delete global - merged into simulation.
653 (sim_load): Cleanup. Move PC assignment from here.
654 (sim_create_inferior): To here.
655
656 * sim-main.h: New file.
657 * interp.c (sim-main.h): Include.
658
659 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
660
661 * configure: Regenerated to track ../common/aclocal.m4 changes.
662
663 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
664
665 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
666
667 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
668
669 * gencode.c (build_instruction): DIV instructions: check
670 for division by zero and integer overflow before using
671 host's division operation.
672
673 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
674
675 * Makefile.in (SIM_OBJS): Add sim-load.o.
676 * interp.c: #include bfd.h.
677 (target_byte_order): Delete.
678 (sim_kind, myname, big_endian_p): New static locals.
679 (sim_open): Set sim_kind, myname. Move call to set_endianness to
680 after argument parsing. Recognize -E arg, set endianness accordingly.
681 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
682 load file into simulator. Set PC from bfd.
683 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
684 (set_endianness): Use big_endian_p instead of target_byte_order.
685
686 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
687
688 * interp.c (sim_size): Delete prototype - conflicts with
689 definition in remote-sim.h. Correct definition.
690
691 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
692
693 * configure: Regenerated to track ../common/aclocal.m4 changes.
694 * config.in: Ditto.
695
696 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
697
698 * interp.c (sim_open): New arg `kind'.
699
700 * configure: Regenerated to track ../common/aclocal.m4 changes.
701
702 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
703
704 * configure: Regenerated to track ../common/aclocal.m4 changes.
705
706 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
707
708 * interp.c (sim_open): Set optind to 0 before calling getopt.
709
710 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
711
712 * configure: Regenerated to track ../common/aclocal.m4 changes.
713
714 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
715
716 * interp.c : Replace uses of pr_addr with pr_uword64
717 where the bit length is always 64 independent of SIM_ADDR.
718 (pr_uword64) : added.
719
720 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
721
722 * configure: Re-generate.
723
724 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
725
726 * configure: Regenerate to track ../common/aclocal.m4 changes.
727
728 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
729
730 * interp.c (sim_open): New SIM_DESC result. Argument is now
731 in argv form.
732 (other sim_*): New SIM_DESC argument.
733
734 start-sanitize-r5900
735 Wed Feb 26 18:32:21 1997 Gavin Koch <gavin@cygnus.com>
736
737 * gencode.c (POP_AND,POP_OR,POP_NOR,POP_XOR):
738 Change values to avoid overloading DOUBLEWORD which is tested
739 for all insns.
740 * gencode.c: reinstate "offending code".
741
742 end-sanitize-r5900
743 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
744
745 * interp.c: Fix printing of addresses for non-64-bit targets.
746 (pr_addr): Add function to print address based on size.
747 start-sanitize-r5900
748 * gencode.c: #ifdef out offending code until a permanent fix
749 can be added. Code is causing build errors for non-5900 mips targets.
750 end-sanitize-r5900
751
752 start-sanitize-r5900
753 Thu Feb 20 10:40:24 1997 Gavin Koch <gavin@cetus.cygnus.com>
754
755 * gencode.c (process_instructions): Correct test for ISA dependent
756 architecture bits in isa field of MIPS_DECODE.
757
758 end-sanitize-r5900
759 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
760
761 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
762
763 start-sanitize-r5900
764 Tue Feb 18 17:03:47 1997 Gavin Koch <gavin@cygnus.com>
765
766 * gencode.c (MIPS_DECODE): Correct instruction feature flags for
767 PMADDUW.
768
769 end-sanitize-r5900
770 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
771
772 * gencode.c (build_mips16_operands): Correct computation of base
773 address for extended PC relative instruction.
774
775 start-sanitize-r5900
776 Fri Feb 7 11:12:44 1997 Gavin Koch <gavin@cygnus.com>
777
778 * Makefile.in, configure, configure.in, gencode.c,
779 interp.c, support.h: add r5900.
780
781 end-sanitize-r5900
782 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
783
784 * interp.c (mips16_entry): Add support for floating point cases.
785 (SignalException): Pass floating point cases to mips16_entry.
786 (ValueFPR): Don't restrict fmt_single and fmt_word to even
787 registers.
788 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
789 or fmt_word.
790 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
791 and then set the state to fmt_uninterpreted.
792 (COP_SW): Temporarily set the state to fmt_word while calling
793 ValueFPR.
794
795 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
796
797 * gencode.c (build_instruction): The high order may be set in the
798 comparison flags at any ISA level, not just ISA 4.
799
800 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
801
802 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
803 COMMON_{PRE,POST}_CONFIG_FRAG instead.
804 * configure.in: sinclude ../common/aclocal.m4.
805 * configure: Regenerated.
806
807 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
808
809 * configure: Rebuild after change to aclocal.m4.
810
811 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
812
813 * configure configure.in Makefile.in: Update to new configure
814 scheme which is more compatible with WinGDB builds.
815 * configure.in: Improve comment on how to run autoconf.
816 * configure: Re-run autoconf to get new ../common/aclocal.m4.
817 * Makefile.in: Use autoconf substitution to install common
818 makefile fragment.
819
820 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
821
822 * gencode.c (build_instruction): Use BigEndianCPU instead of
823 ByteSwapMem.
824
825 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
826
827 * interp.c (sim_monitor): Make output to stdout visible in
828 wingdb's I/O log window.
829
830 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
831
832 * support.h: Undo previous change to SIGTRAP
833 and SIGQUIT values.
834
835 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
836
837 * interp.c (store_word, load_word): New static functions.
838 (mips16_entry): New static function.
839 (SignalException): Look for mips16 entry and exit instructions.
840 (simulate): Use the correct index when setting fpr_state after
841 doing a pending move.
842
843 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
844
845 * interp.c: Fix byte-swapping code throughout to work on
846 both little- and big-endian hosts.
847
848 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
849
850 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
851 with gdb/config/i386/xm-windows.h.
852
853 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
854
855 * gencode.c (build_instruction): Work around MSVC++ code gen bug
856 that messes up arithmetic shifts.
857
858 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
859
860 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
861 SIGTRAP and SIGQUIT for _WIN32.
862
863 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
864
865 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
866 force a 64 bit multiplication.
867 (build_instruction) [OR]: In mips16 mode, don't do anything if the
868 destination register is 0, since that is the default mips16 nop
869 instruction.
870
871 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
872
873 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
874 (build_endian_shift): Don't check proc64.
875 (build_instruction): Always set memval to uword64. Cast op2 to
876 uword64 when shifting it left in memory instructions. Always use
877 the same code for stores--don't special case proc64.
878
879 * gencode.c (build_mips16_operands): Fix base PC value for PC
880 relative operands.
881 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
882 jal instruction.
883 * interp.c (simJALDELAYSLOT): Define.
884 (JALDELAYSLOT): Define.
885 (INDELAYSLOT, INJALDELAYSLOT): Define.
886 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
887
888 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
889
890 * interp.c (sim_open): add flush_cache as a PMON routine
891 (sim_monitor): handle flush_cache by ignoring it
892
893 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
894
895 * gencode.c (build_instruction): Use !ByteSwapMem instead of
896 BigEndianMem.
897 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
898 (BigEndianMem): Rename to ByteSwapMem and change sense.
899 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
900 BigEndianMem references to !ByteSwapMem.
901 (set_endianness): New function, with prototype.
902 (sim_open): Call set_endianness.
903 (sim_info): Use simBE instead of BigEndianMem.
904 (xfer_direct_word, xfer_direct_long, swap_direct_word,
905 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
906 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
907 ifdefs, keeping the prototype declaration.
908 (swap_word): Rewrite correctly.
909 (ColdReset): Delete references to CONFIG. Delete endianness related
910 code; moved to set_endianness.
911
912 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
913
914 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
915 * interp.c (CHECKHILO): Define away.
916 (simSIGINT): New macro.
917 (membank_size): Increase from 1MB to 2MB.
918 (control_c): New function.
919 (sim_resume): Rename parameter signal to signal_number. Add local
920 variable prev. Call signal before and after simulate.
921 (sim_stop_reason): Add simSIGINT support.
922 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
923 functions always.
924 (sim_warning): Delete call to SignalException. Do call printf_filtered
925 if logfh is NULL.
926 (AddressTranslation): Add #ifdef DEBUG around debugging message and
927 a call to sim_warning.
928
929 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
930
931 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
932 16 bit instructions.
933
934 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
935
936 Add support for mips16 (16 bit MIPS implementation):
937 * gencode.c (inst_type): Add mips16 instruction encoding types.
938 (GETDATASIZEINSN): Define.
939 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
940 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
941 mtlo.
942 (MIPS16_DECODE): New table, for mips16 instructions.
943 (bitmap_val): New static function.
944 (struct mips16_op): Define.
945 (mips16_op_table): New table, for mips16 operands.
946 (build_mips16_operands): New static function.
947 (process_instructions): If PC is odd, decode a mips16
948 instruction. Break out instruction handling into new
949 build_instruction function.
950 (build_instruction): New static function, broken out of
951 process_instructions. Check modifiers rather than flags for SHIFT
952 bit count and m[ft]{hi,lo} direction.
953 (usage): Pass program name to fprintf.
954 (main): Remove unused variable this_option_optind. Change
955 ``*loptarg++'' to ``loptarg++''.
956 (my_strtoul): Parenthesize && within ||.
957 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
958 (simulate): If PC is odd, fetch a 16 bit instruction, and
959 increment PC by 2 rather than 4.
960 * configure.in: Add case for mips16*-*-*.
961 * configure: Rebuild.
962
963 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
964
965 * interp.c: Allow -t to enable tracing in standalone simulator.
966 Fix garbage output in trace file and error messages.
967
968 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
969
970 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
971 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
972 * configure.in: Simplify using macros in ../common/aclocal.m4.
973 * configure: Regenerated.
974 * tconfig.in: New file.
975
976 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
977
978 * interp.c: Fix bugs in 64-bit port.
979 Use ansi function declarations for msvc compiler.
980 Initialize and test file pointer in trace code.
981 Prevent duplicate definition of LAST_EMED_REGNUM.
982
983 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
984
985 * interp.c (xfer_big_long): Prevent unwanted sign extension.
986
987 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
988
989 * interp.c (SignalException): Check for explicit terminating
990 breakpoint value.
991 * gencode.c: Pass instruction value through SignalException()
992 calls for Trap, Breakpoint and Syscall.
993
994 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
995
996 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
997 only used on those hosts that provide it.
998 * configure.in: Add sqrt() to list of functions to be checked for.
999 * config.in: Re-generated.
1000 * configure: Re-generated.
1001
1002 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
1003
1004 * gencode.c (process_instructions): Call build_endian_shift when
1005 expanding STORE RIGHT, to fix swr.
1006 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
1007 clear the high bits.
1008 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
1009 Fix float to int conversions to produce signed values.
1010
1011 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
1012
1013 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
1014 (process_instructions): Correct handling of nor instruction.
1015 Correct shift count for 32 bit shift instructions. Correct sign
1016 extension for arithmetic shifts to not shift the number of bits in
1017 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
1018 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
1019 Fix madd.
1020 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
1021 It's OK to have a mult follow a mult. What's not OK is to have a
1022 mult follow an mfhi.
1023 (Convert): Comment out incorrect rounding code.
1024
1025 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
1026
1027 * interp.c (sim_monitor): Improved monitor printf
1028 simulation. Tidied up simulator warnings, and added "--log" option
1029 for directing warning message output.
1030 * gencode.c: Use sim_warning() rather than WARNING macro.
1031
1032 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
1033
1034 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
1035 getopt1.o, rather than on gencode.c. Link objects together.
1036 Don't link against -liberty.
1037 (gencode.o, getopt.o, getopt1.o): New targets.
1038 * gencode.c: Include <ctype.h> and "ansidecl.h".
1039 (AND): Undefine after including "ansidecl.h".
1040 (ULONG_MAX): Define if not defined.
1041 (OP_*): Don't define macros; now defined in opcode/mips.h.
1042 (main): Call my_strtoul rather than strtoul.
1043 (my_strtoul): New static function.
1044
1045 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
1046
1047 * gencode.c (process_instructions): Generate word64 and uword64
1048 instead of `long long' and `unsigned long long' data types.
1049 * interp.c: #include sysdep.h to get signals, and define default
1050 for SIGBUS.
1051 * (Convert): Work around for Visual-C++ compiler bug with type
1052 conversion.
1053 * support.h: Make things compile under Visual-C++ by using
1054 __int64 instead of `long long'. Change many refs to long long
1055 into word64/uword64 typedefs.
1056
1057 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
1058
1059 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
1060 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
1061 (docdir): Removed.
1062 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
1063 (AC_PROG_INSTALL): Added.
1064 (AC_PROG_CC): Moved to before configure.host call.
1065 * configure: Rebuilt.
1066
1067 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
1068
1069 * configure.in: Define @SIMCONF@ depending on mips target.
1070 * configure: Rebuild.
1071 * Makefile.in (run): Add @SIMCONF@ to control simulator
1072 construction.
1073 * gencode.c: Change LOADDRMASK to 64bit memory model only.
1074 * interp.c: Remove some debugging, provide more detailed error
1075 messages, update memory accesses to use LOADDRMASK.
1076
1077 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
1078
1079 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
1080 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
1081 stamp-h.
1082 * configure: Rebuild.
1083 * config.in: New file, generated by autoheader.
1084 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
1085 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
1086 HAVE_ANINT and HAVE_AINT, as appropriate.
1087 * Makefile.in (run): Use @LIBS@ rather than -lm.
1088 (interp.o): Depend upon config.h.
1089 (Makefile): Just rebuild Makefile.
1090 (clean): Remove stamp-h.
1091 (mostlyclean): Make the same as clean, not as distclean.
1092 (config.h, stamp-h): New targets.
1093
1094 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
1095
1096 * interp.c (ColdReset): Fix boolean test. Make all simulator
1097 globals static.
1098
1099 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
1100
1101 * interp.c (xfer_direct_word, xfer_direct_long,
1102 swap_direct_word, swap_direct_long, xfer_big_word,
1103 xfer_big_long, xfer_little_word, xfer_little_long,
1104 swap_word,swap_long): Added.
1105 * interp.c (ColdReset): Provide function indirection to
1106 host<->simulated_target transfer routines.
1107 * interp.c (sim_store_register, sim_fetch_register): Updated to
1108 make use of indirected transfer routines.
1109
1110 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
1111
1112 * gencode.c (process_instructions): Ensure FP ABS instruction
1113 recognised.
1114 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
1115 system call support.
1116
1117 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
1118
1119 * interp.c (sim_do_command): Complain if callback structure not
1120 initialised.
1121
1122 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
1123
1124 * interp.c (Convert): Provide round-to-nearest and round-to-zero
1125 support for Sun hosts.
1126 * Makefile.in (gencode): Ensure the host compiler and libraries
1127 used for cross-hosted build.
1128
1129 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
1130
1131 * interp.c, gencode.c: Some more (TODO) tidying.
1132
1133 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
1134
1135 * gencode.c, interp.c: Replaced explicit long long references with
1136 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
1137 * support.h (SET64LO, SET64HI): Macros added.
1138
1139 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
1140
1141 * configure: Regenerate with autoconf 2.7.
1142
1143 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
1144
1145 * interp.c (LoadMemory): Enclose text following #endif in /* */.
1146 * support.h: Remove superfluous "1" from #if.
1147 * support.h (CHECKSIM): Remove stray 'a' at end of line.
1148
1149 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
1150
1151 * interp.c (StoreFPR): Control UndefinedResult() call on
1152 WARN_RESULT manifest.
1153
1154 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
1155
1156 * gencode.c: Tidied instruction decoding, and added FP instruction
1157 support.
1158
1159 * interp.c: Added dineroIII, and BSD profiling support. Also
1160 run-time FP handling.
1161
1162 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
1163
1164 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
1165 gencode.c, interp.c, support.h: created.
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