sim/mips/ChangeLog

   1 2021-02-27  Mike Frysinger  <vapier@gentoo.org>
   2
   3         * Makefile.in (SIM_EXTRA_ALL): Delete.
   4         (all): New target.
   5
   6 2021-02-21  Mike Frysinger  <vapier@gentoo.org>
   7
   8         * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
   9         * aclocal.m4, configure: Regenerate.
  10
  11 2021-02-13  Mike Frysinger  <vapier@gentoo.org>
  12
  13         * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
  14         * aclocal.m4, configure: Regenerate.
  15
  16 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  17
  18         * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
  19
  20 2021-02-06  Mike Frysinger  <vapier@gentoo.org>
  21
  22         * configure: Regenerate.
  23
  24 2021-01-30  Mike Frysinger  <vapier@gentoo.org>
  25
  26         * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
  27
  28 2021-01-11  Mike Frysinger  <vapier@gentoo.org>
  29
  30         * config.in, configure: Regenerate.
  31         * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
  32         and strings.h include.
  33
  34 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  35
  36         * configure: Regenerate.
  37
  38 2021-01-09  Mike Frysinger  <vapier@gentoo.org>
  39
  40         * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
  41         * configure: Regenerate.
  42
  43 2021-01-08  Mike Frysinger  <vapier@gentoo.org>
  44
  45         * configure: Regenerate.
  46
  47 2021-01-04  Mike Frysinger  <vapier@gentoo.org>
  48
  49         * configure: Regenerate.
  50
  51 2020-12-31  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  52
  53         *  sim-main.c: Include <stdlib.h>.
  54
  55 2020-12-14  Pavel I. Kryukov  <kryukov@frtk.ru>  (tiny change)
  56
  57         * cp1.c: Include <stdlib.h>.
  58
  59 2020-07-29  Simon Marchi  <simon.marchi@efficios.com>
  60
  61         * configure: Re-generate.
  62
  63 2017-09-06  John Baldwin  <jhb@FreeBSD.org>
  64
  65         * configure: Regenerate.
  66
  67 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  68
  69         PR sim/20808
  70         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
  71         and SD to sd.
  72
  73 2016-11-11  Mike Frysinger  <vapier@gentoo.org>
  74
  75         PR sim/20809
  76         * mips.igen (check_u64): Enable for `r3900'.
  77
  78 2016-02-05  Mike Frysinger  <vapier@gentoo.org>
  79
  80         * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
  81         STATE_PROG_BFD (sd).
  82         * configure: Regenerate.
  83
  84 2016-01-18  Andrew Bennett  <andrew.bennett@imgtec.com>
  85             Maciej W. Rozycki  <macro@imgtec.com>
  86
  87         PR sim/19441
  88         * micromips.igen (delayslot_micromips): Enable for `micromips32',
  89         `micromips64' and `micromipsdsp' only.
  90         (process_isa_mode): Enable for `micromips32' and `micromips64' only.
  91         (do_micromips_jalr, do_micromips_jal): Likewise.
  92         (compute_movep_src_reg): Likewise.
  93         (compute_andi16_imm): Likewise.
  94         (convert_fmt_micromips): Likewise.
  95         (convert_fmt_micromips_cvt_d): Likewise.
  96         (convert_fmt_micromips_cvt_s): Likewise.
  97         (FMT_MICROMIPS): Likewise.
  98         (FMT_MICROMIPS_CVT_D): Likewise.
  99         (FMT_MICROMIPS_CVT_S): Likewise.
 100
 101 2016-01-12  Mike Frysinger  <vapier@gentoo.org>
 102
 103         * interp.c: Include elf-bfd.h.
 104         (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
 105         ELFCLASS32.
 106
 107 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 108
 109         * config.in, configure: Regenerate.
 110
 111 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 112
 113         * configure: Regenerate.
 114
 115 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 116
 117         * configure: Regenerate.
 118
 119 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 120
 121         * configure: Regenerate.
 122
 123 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 124
 125         * configure: Regenerate.
 126
 127 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 128
 129         * configure.ac (SIM_AC_OPTION_SMP): Delete call.
 130         * configure: Regenerate.
 131
 132 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 133
 134         * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
 135         * configure: Regenerate.
 136
 137 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 138
 139         * configure: Regenerate.
 140
 141 2016-01-10  Mike Frysinger  <vapier@gentoo.org>
 142
 143         * configure: Regenerate.
 144
 145 2016-01-09  Mike Frysinger  <vapier@gentoo.org>
 146
 147         * config.in, configure: Regenerate.
 148
 149 2016-01-06  Mike Frysinger  <vapier@gentoo.org>
 150
 151         * interp.c (sim_open): Mark argv const.
 152         (sim_create_inferior): Mark argv and env const.
 153
 154 2016-01-04  Mike Frysinger  <vapier@gentoo.org>
 155
 156         * configure: Regenerate.
 157
 158 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 159
 160         * interp.c (sim_open): Update sim_parse_args comment.
 161
 162 2016-01-03  Mike Frysinger  <vapier@gentoo.org>
 163
 164         * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
 165         * configure: Regenerate.
 166
 167 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 168
 169         * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
 170         (default_endian): Likewise.  Change BIG_ENDIAN to BIG.
 171         * configure: Regenerate.
 172         * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
 173
 174 2016-01-02  Mike Frysinger  <vapier@gentoo.org>
 175
 176         * dv-tx3904cpu.c (CPU, SD): Delete.
 177
 178 2015-12-30  Mike Frysinger  <vapier@gentoo.org>
 179
 180         * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
 181         (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
 182         (sim_store_register): Rename to ...
 183         (mips_reg_store): ... this.  Delete local cpu var.
 184         Update sim_io_eprintf calls.
 185         (sim_fetch_register): Rename to ...
 186         (mips_reg_fetch): ... this.  Delete local cpu var.
 187         Update sim_io_eprintf calls.
 188
 189 2015-12-27  Mike Frysinger  <vapier@gentoo.org>
 190
 191         * Makefile.in (SIM_OBJS): Delete sim-hload.o.
 192
 193 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 194
 195         * config.in, configure: Regenerate.
 196
 197 2015-12-26  Mike Frysinger  <vapier@gentoo.org>
 198
 199         * interp.c (sim_write, sim_read): Delete.
 200         (store_word): Delete call to AddressTranslation and set paddr=vaddr.
 201         (load_word): Likewise.
 202         * micromips.igen (cache): Likewise.
 203         * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
 204         do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
 205         do_store_left, do_store_right, do_load_double, do_store_double):
 206         Likewise.
 207         (do_pref): Delete call to AddressTranslation and stub out Prefetch.
 208         (do_prefx): Likewise.
 209         * sim-main.c (address_translation, prefetch): Delete.
 210         (ifetch32, ifetch16): Delete call to AddressTranslation and set
 211         paddr=vaddr.
 212         * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
 213         address_translation, AddressTranslation, prefetch, Prefetch): Delete.
 214         (LoadMemory, StoreMemory): Delete CCA arg.
 215
 216 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 217
 218         * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
 219         * configure: Regenerated.
 220
 221 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 222
 223         * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
 224         * tconfig.h: Delete.
 225
 226 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 227
 228         * tconfig.h (SIM_HANDLES_LMA): Delete.
 229
 230 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 231
 232         * sim-main.h (WITH_WATCHPOINTS): Delete.
 233
 234 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 235
 236         * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
 237
 238 2015-12-24  Mike Frysinger  <vapier@gentoo.org>
 239
 240         * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
 241
 242 2015-12-15  Dominik Vogt  <vogt@linux.vnet.ibm.com>
 243
 244         * micromips.igen (process_isa_mode): Fix left shift of negative
 245         value.
 246
 247 2015-11-17  Mike Frysinger  <vapier@gentoo.org>
 248
 249         * sim-main.h (WITH_MODULO_MEMORY): Delete.
 250
 251 2015-11-15  Mike Frysinger  <vapier@gentoo.org>
 252
 253         * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
 254
 255 2015-11-14  Mike Frysinger  <vapier@gentoo.org>
 256
 257         * interp.c (sim_close): Rename to ...
 258         (mips_sim_close): ... this.  Delete calls to sim_module_uninstall and
 259         sim_io_shutdown.
 260         * sim-main.h (mips_sim_close): Declare.
 261         (SIM_CLOSE_HOOK): Define.
 262
 263 2015-09-25  Andrew Bennett  <andrew.bennett@imgtec.com>
 264             Ali Lown  <ali.lown@imgtec.com>
 265
 266         * Makefile.in (tmp-micromips): New rule.
 267         (tmp-mach-multi): Add support for micromips.
 268         * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
 269         that works for both mips64 and micromips64.
 270         (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
 271         micromips32.
 272         Add build support for micromips.
 273         * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
 274         do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
 275         do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
 276         do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
 277         do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
 278         do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
 279         do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
 280         do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
 281         Refactored instruction code to use these functions.
 282         * dsp2.igen: Refactored instruction code to use the new functions.
 283         * interp.c (decode_coproc): Refactored to work with any instruction
 284         encoding.
 285         (isa_mode): New variable
 286         (RSVD_INSTRUCTION): Changed to 0x00000039.
 287         * m16.igen (BREAK16): Refactored instruction to use do_break16.
 288         (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
 289         * micromips.dc: New file.
 290         * micromips.igen: New file.
 291         * micromips16.dc: New file.
 292         * micromipsdsp.igen: New file.
 293         * micromipsrun.c: New file.
 294         * mips.igen (do_swc1): Changed to work with any instruction encoding.
 295         (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
 296         do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
 297         do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
 298         do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
 299         do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
 300         do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
 301         do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
 302         do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
 303         do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
 304         do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
 305         do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
 306         do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
 307         do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
 308         do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
 309         do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
 310         do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
 311         do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
 312         do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
 313         instructions.
 314         Refactored instruction code to use these functions.
 315         (RSVD): Changed to use new reserved instruction.
 316         (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
 317         check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
 318         do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
 319         do_store_double):  Added micromips32 and micromips64 models.
 320         Added include for micromips.igen and micromipsdsp.igen
 321         Add micromips32 and micromips64 models.
 322         (DecodeCoproc): Updated to use new macro definition.
 323         * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
 324         do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
 325         do_seb, do_seh do_rdhwr, do_wsbh): New functions.
 326         Refactored instruction code to use these functions.
 327         * sim-main.h (CP0_operation): New enum.
 328         (DecodeCoproc): Updated macro.
 329         (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
 330         MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
 331         MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
 332         ISA_MODE_MICROMIPS): New defines.
 333         (sim_state): Add isa_mode field.
 334
 335 2015-06-23  Mike Frysinger  <vapier@gentoo.org>
 336
 337         * configure: Regenerate.
 338
 339 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 340
 341         * configure.ac: Change configure.in to configure.ac.
 342         * configure: Regenerate.
 343
 344 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 345
 346         * configure: Regenerate.
 347
 348 2015-06-12  Mike Frysinger  <vapier@gentoo.org>
 349
 350         * interp.c [TRACE]: Delete.
 351         (TRACE): Change to WITH_TRACE_ANY_P.
 352         [!WITH_TRACE_ANY_P] (open_trace): Define.
 353         (mips_option_handler, open_trace, sim_close, dotrace):
 354         Change defined(TRACE) to WITH_TRACE_ANY_P.
 355         (sim_open): Delete TRACE ifdef check.
 356         * sim-main.c (load_memory): Delete TRACE ifdef check.
 357         (store_memory): Likewise.
 358         * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
 359         [!WITH_TRACE_ANY_P] (dotrace): Define.
 360
 361 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 362
 363         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
 364         comments.
 365
 366 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 367
 368         * sim-main.h (SIM_CPU): Delete.
 369
 370 2015-04-18  Mike Frysinger  <vapier@gentoo.org>
 371
 372         * sim-main.h (sim_cia): Delete.
 373
 374 2015-04-17  Mike Frysinger  <vapier@gentoo.org>
 375
 376         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
 377         PU_PC_GET.
 378         * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
 379         (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
 380         * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
 381         CIA_SET to CPU_PC_SET.
 382         * sim-main.h (CIA_GET, CIA_SET): Delete.
 383
 384 2015-04-15  Mike Frysinger  <vapier@gentoo.org>
 385
 386         * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
 387         * sim-main.h (STATE_CPU): Delete.
 388
 389 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 390
 391         * configure: Regenerate.
 392
 393 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 394
 395         * Makefile.in (SIM_OBJS): Add sim-cpu.o.
 396         * interp.c (mips_pc_get, mips_pc_set): New functions.
 397         (sim_open): Declare new local var i.  Call sim_cpu_alloc_all.
 398         Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
 399         (sim_pc_get): Delete.
 400         * sim-main.h (SIM_CPU): Define.
 401         (struct sim_state): Change cpu to an array of pointers.
 402         (STATE_CPU): Drop &.
 403
 404 2015-04-13  Mike Frysinger  <vapier@gentoo.org>
 405
 406         * interp.c (mips_option_handler, open_trace, sim_close,
 407         sim_write, sim_read, sim_store_register, sim_fetch_register,
 408         sim_create_inferior, pr_addr, pr_uword64): Convert old style
 409         prototypes.
 410         (sim_open): Convert old style prototype.  Change casts with
 411         sim_write to unsigned char *.
 412         (fetch_str): Change null to unsigned char, and change cast to
 413         unsigned char *.
 414         (sim_monitor): Change c & ch to unsigned char.  Change cast to
 415         unsigned char *.
 416
 417 2015-04-12  Mike Frysinger  <vapier@gentoo.org>
 418
 419         * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
 420
 421 2015-04-06  Mike Frysinger  <vapier@gentoo.org>
 422
 423         * Makefile.in (SIM_OBJS): Delete sim-engine.o.
 424
 425 2015-04-01  Mike Frysinger  <vapier@gentoo.org>
 426
 427         * tconfig.h (SIM_HAVE_PROFILE): Delete.
 428
 429 2015-03-31  Mike Frysinger  <vapier@gentoo.org>
 430
 431         * config.in, configure: Regenerate.
 432
 433 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 434
 435         * interp.c (sim_pc_get): New function.
 436
 437 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 438
 439         * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
 440         * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
 441
 442 2015-03-24  Mike Frysinger  <vapier@gentoo.org>
 443
 444         * configure: Regenerate.
 445
 446 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 447
 448         * configure: Regenerate.
 449
 450 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 451
 452         * configure: Regenerate.
 453         * configure.ac (mips_extra_objs): Delete.
 454         * Makefile.in (MIPS_EXTRA_OBJS): Delete.
 455         (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
 456
 457 2015-03-23  Mike Frysinger  <vapier@gentoo.org>
 458
 459         * configure: Regenerate.
 460         * configure.ac: Delete sim_hw checks for dv-sockser.
 461
 462 2015-03-16  Mike Frysinger  <vapier@gentoo.org>
 463
 464         * config.in, configure: Regenerate.
 465         * tconfig.in: Rename file ...
 466         * tconfig.h: ... here.
 467
 468 2015-03-15  Mike Frysinger  <vapier@gentoo.org>
 469
 470         * tconfig.in: Delete includes.
 471         [HAVE_DV_SOCKSER]: Delete.
 472
 473 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 474
 475         * Makefile.in (SIM_RUN_OBJS): Delete.
 476
 477 2015-03-14  Mike Frysinger  <vapier@gentoo.org>
 478
 479         * configure.ac (AC_CHECK_HEADERS): Delete.
 480         * aclocal.m4, configure: Regenerate.
 481
 482 2014-08-19  Alan Modra  <amodra@gmail.com>
 483
 484         * configure: Regenerate.
 485
 486 2014-08-15  Roland McGrath  <mcgrathr@google.com>
 487
 488         * configure: Regenerate.
 489         * config.in: Regenerate.
 490
 491 2014-03-04  Mike Frysinger  <vapier@gentoo.org>
 492
 493         * configure: Regenerate.
 494
 495 2013-09-23  Alan Modra  <amodra@gmail.com>
 496
 497         * configure: Regenerate.
 498
 499 2013-06-03  Mike Frysinger  <vapier@gentoo.org>
 500
 501         * aclocal.m4, configure: Regenerate.
 502
 503 2013-05-10  Freddie Chopin  <freddie_chopin@op.pl>
 504
 505         * configure: Rebuild.
 506
 507 2013-03-26  Mike Frysinger  <vapier@gentoo.org>
 508
 509         * configure: Regenerate.
 510
 511 2013-03-23  Joel Sherrill  <joel.sherrill@oarcorp.com>
 512
 513         * configure.ac: Address use of dv-sockser.o.
 514         * tconfig.in: Conditionalize use of dv_sockser_install.
 515         * configure: Regenerated.
 516         * config.in: Regenerated.
 517
 518 2012-10-04  Chao-ying Fu  <fu@mips.com>
 519             Steve Ellcey  <sellcey@mips.com>
 520
 521         * mips/mips3264r2.igen (rdhwr): New.
 522
 523 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
 524
 525         * configure.ac: Always link against dv-sockser.o.
 526         * configure: Regenerate.
 527
 528 2012-06-15  Joel Brobecker  <brobecker@adacore.com>
 529
 530         * config.in, configure: Regenerate.
 531
 532 2012-05-18  Nick Clifton  <nickc@redhat.com>
 533
 534         PR 14072
 535         * interp.c: Include config.h before system header files.
 536
 537 2012-03-24  Mike Frysinger  <vapier@gentoo.org>
 538
 539         * aclocal.m4, config.in, configure: Regenerate.
 540
 541 2011-12-03  Mike Frysinger  <vapier@gentoo.org>
 542
 543         * aclocal.m4: New file.
 544         * configure: Regenerate.
 545
 546 2011-10-19  Mike Frysinger  <vapier@gentoo.org>
 547
 548         * configure: Regenerate after common/acinclude.m4 update.
 549
 550 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 551
 552         * configure.ac: Change include to common/acinclude.m4.
 553
 554 2011-10-17  Mike Frysinger  <vapier@gentoo.org>
 555
 556         * configure.ac: Change AC_PREREQ to 2.64.  Delete AC_CONFIG_HEADER
 557         call.  Replace common.m4 include with SIM_AC_COMMON.
 558         * configure: Regenerate.
 559
 560 2011-07-08  Hans-Peter Nilsson  <hp@axis.com>
 561
 562         * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
 563         $(SIM_EXTRA_DEPS).
 564         (tmp-mach-multi): Exit early when igen fails.
 565
 566 2011-07-05  Mike Frysinger  <vapier@gentoo.org>
 567
 568         * interp.c (sim_do_command): Delete.
 569
 570 2011-02-14  Mike Frysinger  <vapier@gentoo.org>
 571
 572         * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
 573         (tx3904sio_fifo_reset): Likewise.
 574         * interp.c (sim_monitor): Likewise.
 575
 576 2010-04-14  Mike Frysinger  <vapier@gentoo.org>
 577
 578         * interp.c (sim_write): Add const to buffer arg.
 579
 580 2010-01-18  Masaki Muranaka  <monaka@monami-software.com>  (tiny change)
 581
 582         * interp.c: Don't include sysdep.h
 583
 584 2010-01-09  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 585
 586         * configure: Regenerate.
 587
 588 2009-08-22  Ralf Wildenhues  <Ralf.Wildenhues@gmx.de>
 589
 590         * config.in: Regenerate.
 591         * configure: Likewise.
 592
 593         * configure: Regenerate.
 594
 595 2008-07-11  Hans-Peter Nilsson  <hp@axis.com>
 596
 597         * configure: Regenerate to track ../common/common.m4 changes.
 598         * config.in: Ditto.
 599
 600 2008-06-06  Vladimir Prus  <vladimir@codesourcery.com>
 601             Daniel Jacobowitz  <dan@codesourcery.com>
 602             Joseph Myers  <joseph@codesourcery.com>
 603
 604         * configure: Regenerate.
 605
 606 2007-10-22  Richard Sandiford  <rsandifo@nildram.co.uk>
 607
 608         * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
 609         that unconditionally allows fmt_ps.
 610         (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
 611         (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
 612         (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
 613         filter from 64,f to 32,f.
 614         (PREFX): Change filter from 64 to 32.
 615         (LDXC1, LUXC1): Provide separate mips32r2 implementations
 616         that use do_load_double instead of do_load.  Make both LUXC1
 617         versions unpredictable if SizeFGR () != 64.
 618         (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
 619         instead of do_store.  Remove unused variable.  Make both SUXC1
 620         versions unpredictable if SizeFGR () != 64.
 621
 622 2007-10-07  Richard Sandiford  <rsandifo@nildram.co.uk>
 623
 624         * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
 625         (sc, swxc1): Likewise.  Also fix big-endian and reverse-endian
 626         shifts for that case.
 627
 628 2007-09-04  Nick Clifton  <nickc@redhat.com>
 629
 630         * interp.c (options enum): Add OPTION_INFO_MEMORY.
 631         (display_mem_info): New static variable.
 632         (mips_option_handler): Handle OPTION_INFO_MEMORY.
 633         (mips_options): Add info-memory and memory-info.
 634         (sim_open): After processing the command line and board
 635         specification, check display_mem_info.  If it is set then
 636         call the real handler for the --memory-info command line
 637         switch.
 638
 639 2007-08-24  Joel Brobecker  <brobecker@adacore.com>
 640
 641         * configure.ac: Change license of multi-run.c to GPL version 3.
 642         * configure: Regenerate.
 643
 644 2007-06-28  Richard Sandiford  <richard@codesourcery.com>
 645
 646         * configure.ac, configure: Revert last patch.
 647
 648 2007-06-26  Richard Sandiford  <richard@codesourcery.com>
 649
 650         * configure.ac (sim_mipsisa3264_configs): New variable.
 651         (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
 652         every configuration support all four targets, using the triplet to
 653         determine the default.
 654         * configure: Regenerate.
 655
 656 2007-06-25  Richard Sandiford  <richard@codesourcery.com>
 657
 658         * Makefile.in (m16run.o): New rule.
 659
 660 2007-05-15  Thiemo Seufer  <ths@mips.com>
 661
 662         * mips3264r2.igen (DSHD): Fix compile warning.
 663
 664 2007-05-14  Thiemo Seufer  <ths@mips.com>
 665
 666         * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
 667         CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
 668         NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
 669         RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
 670         for mips32r2.
 671
 672 2007-03-01  Thiemo Seufer  <ths@mips.com>
 673
 674         * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
 675         and mips64.
 676
 677 2007-02-20  Thiemo Seufer  <ths@mips.com>
 678
 679         * dsp.igen: Update copyright notice.
 680         * dsp2.igen: Fix copyright notice.
 681
 682 2007-02-20  Thiemo Seufer  <ths@mips.com>
 683             Chao-Ying Fu  <fu@mips.com>
 684
 685         * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
 686         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 687         Add dsp2 to sim_igen_machine.
 688         * configure: Regenerate.
 689         * dsp.igen (do_ph_op): Add MUL support when op = 2.
 690         (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
 691         (mulq_rs.ph): Use do_ph_mulq.
 692         (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
 693         * mips.igen: Add dsp2 model and include dsp2.igen.
 694         (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
 695         for *mips32r2, *mips64r2, *dsp.
 696         (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
 697         for *mips32r2, *mips64r2, *dsp2.
 698         * dsp2.igen: New file for MIPS DSP REV 2 ASE.
 699
 700 2007-02-19  Thiemo Seufer  <ths@mips.com>
 701             Nigel Stephens  <nigel@mips.com>
 702
 703         * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
 704         jumps with hazard barrier.
 705
 706 2007-02-19  Thiemo Seufer  <ths@mips.com>
 707             Nigel Stephens  <nigel@mips.com>
 708
 709         * interp.c (sim_monitor): Flush stdout and stderr file descriptors
 710         after each call to sim_io_write.
 711
 712 2007-02-19  Thiemo Seufer  <ths@mips.com>
 713             Nigel Stephens  <nigel@mips.com>
 714
 715         * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
 716         supported by this simulator.
 717         (decode_coproc): Recognise additional CP0 Config registers
 718         correctly.
 719
 720 2007-02-19  Thiemo Seufer  <ths@mips.com>
 721             Nigel Stephens  <nigel@mips.com>
 722             David Ung  <davidu@mips.com>
 723
 724         * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
 725         uninterpreted formats. If fmt is one of the uninterpreted types
 726         don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
 727         fmt_word, and fmt_uninterpreted_64 like fmt_long.
 728         (store_fpr): When writing an invalid odd register, set the
 729         matching even register to fmt_unknown, not the following register.
 730         * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
 731         the the memory window at offset 0 set by --memory-size command
 732         line option.
 733         (sim_store_register): Handle storing 4 bytes to an 8 byte floating
 734         point register.
 735         (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
 736         register.
 737         (sim_monitor): When returning the memory size to the MIPS
 738         application, use the value in STATE_MEM_SIZE, not an arbitrary
 739         hardcoded value.
 740         (cop_lw): Don' mess around with FPR_STATE, just pass
 741         fmt_uninterpreted_32 to StoreFPR.
 742         (cop_sw): Similarly.
 743         (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
 744         (cop_sd): Similarly.
 745         * mips.igen (not_word_value): Single version for mips32, mips64
 746         and mips16.
 747
 748 2007-02-19  Thiemo Seufer <ths@mips.com>
 749             Nigel Stephens  <nigel@mips.com>
 750
 751         * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
 752         MBytes.
 753
 754 2007-02-17  Thiemo Seufer  <ths@mips.com>
 755
 756         * configure.ac (mips*-sde-elf*): Move in front of generic machine
 757         configuration.
 758         * configure: Regenerate.
 759
 760 2007-02-17  Thiemo Seufer  <ths@mips.com>
 761
 762         * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
 763         Add mdmx to sim_igen_machine.
 764         (mipsisa64*-*-*): Likewise. Remove dsp.
 765         (mipsisa32*-*-*): Remove dsp.
 766         * configure: Regenerate.
 767
 768 2007-02-13  Thiemo Seufer  <ths@mips.com>
 769
 770         * configure.ac: Add mips*-sde-elf* target.
 771         * configure: Regenerate.
 772
 773 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
 774
 775         * acconfig.h: Remove.
 776         * config.in, configure: Regenerate.
 777
 778 2006-11-07  Thiemo Seufer  <ths@mips.com>
 779
 780         * dsp.igen (do_w_op): Fix compiler warning.
 781
 782 2006-08-29  Thiemo Seufer  <ths@mips.com>
 783             David Ung  <davidu@mips.com>
 784
 785         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
 786         sim_igen_machine.
 787         * configure: Regenerate.
 788         * mips.igen (model): Add smartmips.
 789         (MADDU): Increment ACX if carry.
 790         (do_mult): Clear ACX.
 791         (ROR,RORV): Add smartmips.
 792         (include): Include smartmips.igen.
 793         * sim-main.h (ACX): Set to REGISTERS[89].
 794         * smartmips.igen: New file.
 795
 796 2006-08-29  Thiemo Seufer  <ths@mips.com>
 797             David Ung  <davidu@mips.com>
 798
 799         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
 800         mips3264r2.igen. Add missing dependency rules.
 801         * m16e.igen: Support for mips16e save/restore instructions.
 802
 803 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
 804
 805         * configure: Regenerated.
 806
 807 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
 808
 809         * configure: Regenerated.
 810
 811 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
 812
 813         * configure: Regenerated.
 814
 815 2006-05-15 Chao-ying Fu  <fu@mips.com>
 816
 817         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
 818
 819 2006-04-18  Nick Clifton  <nickc@redhat.com>
 820
 821         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
 822         statement.
 823
 824 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
 825
 826         * configure: Regenerate.
 827
 828 2005-12-14  Chao-ying Fu  <fu@mips.com>
 829
 830         * Makefile.in (SIM_OBJS): Add dsp.o.
 831         (dsp.o): New dependency.
 832         (IGEN_INCLUDE): Add dsp.igen.
 833         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
 834         mipsisa64*-*-*): Add dsp to sim_igen_machine.
 835         * configure: Regenerate.
 836         * mips.igen: Add dsp model and include dsp.igen.
 837         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
 838         because these instructions are extended in DSP ASE.
 839         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
 840         adding 6 DSP accumulator registers and 1 DSP control register.
 841         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
 842         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
 843         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
 844         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
 845         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
 846         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
 847         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
 848         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
 849         DSPCR_CCOND_SMASK): New define.
 850         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
 851         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
 852
 853 2005-07-08  Ian Lance Taylor  <ian@airs.com>
 854
 855         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
 856
 857 2005-06-16  David Ung  <davidu@mips.com>
 858             Nigel Stephens  <nigel@mips.com>
 859
 860         * mips.igen: New mips16e model and include m16e.igen.
 861         (check_u64): Add mips16e tag.
 862         * m16e.igen: New file for MIPS16e instructions.
 863         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
 864         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
 865         models.
 866         * configure: Regenerate.
 867
 868 2005-05-26  David Ung  <davidu@mips.com>
 869
 870         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 871         tags to all instructions which are applicable to the new ISAs.
 872         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 873         vr.igen.
 874         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 875         instructions.
 876         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 877         to mips.igen.
 878         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 879         * configure: Regenerate.
 880
 881 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 882
 883         * configure: Regenerate.
 884
 885 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 886
 887         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 888         explicit call to AC_CONFIG_HEADER.
 889         * configure: Regenerate.
 890
 891 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 892
 893         * configure.ac: Update to use ../common/common.m4.
 894         * configure: Re-generate.
 895
 896 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 897
 898         * configure: Regenerated to track ../common/aclocal.m4 changes.
 899
 900 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 901
 902         * configure.ac: Rename configure.in, require autoconf 2.59.
 903         * configure: Re-generate.
 904
 905 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 906
 907         * configure: Regenerate for ../common/aclocal.m4 update.
 908
 909 2004-09-24  Monika Chaddha  <monika@acmet.com>
 910
 911         Committed by Andrew Cagney.
 912         * m16.igen (CMP, CMPI): Fix assembler.
 913
 914 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 915
 916         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 917         * configure: Regenerate.
 918
 919 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 920
 921         * configure.in (sim_m16_machine): Include mipsIII.
 922         * configure: Regenerate.
 923
 924 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 925
 926         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 927         from COP0_BADVADDR.
 928         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 929
 930 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 931
 932         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 933
 934 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 935
 936         * mips.igen (check_fmt): Remove.
 937         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 938         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 939         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 940         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 941         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 942         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 943         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 944         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 945         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 946         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 947
 948 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 949
 950         * sb1.igen (check_sbx): New function.
 951         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 952
 953 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 954             Richard Sandiford  <rsandifo@redhat.com>
 955
 956         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 957         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 958         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 959         separate implementations for mipsIV and mipsV.  Use new macros to
 960         determine whether the restrictions apply.
 961
 962 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 963
 964         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 965         (check_mult_hilo): Improve comments.
 966         (check_div_hilo): Likewise.  Also, fork off a new version
 967         to handle mips32/mips64 (since there are no hazards to check
 968         in MIPS32/MIPS64).
 969
 970 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 971
 972         * mips.igen (do_dmultx): Fix check for negative operands.
 973
 974 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 975
 976         * Makefile.in (SHELL): Make sure this is defined.
 977         (various): Use $(SHELL) whenever we invoke move-if-change.
 978
 979 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 980
 981         * cp1.c: Tweak attribution slightly.
 982         * cp1.h: Likewise.
 983         * mdmx.c: Likewise.
 984         * mdmx.igen: Likewise.
 985         * mips3d.igen: Likewise.
 986         * sb1.igen: Likewise.
 987
 988 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 989
 990         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 991         unsigned operands.
 992
 993 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 994
 995         * interp.c (sim_open): Rename _bfd to bfd.
 996         (sim_create_inferior): Ditto.
 997
 998 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 999
1000         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1001
1002 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
1003
1004         * mips.igen (EI, DI): Remove.
1005
1006 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
1007
1008         * Makefile.in (tmp-run-multi): Fix mips16 filter.
1009
1010 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
1011             Andrew Cagney  <ac131313@redhat.com>
1012             Gavin Romig-Koch  <gavin@redhat.com>
1013             Graydon Hoare  <graydon@redhat.com>
1014             Aldy Hernandez  <aldyh@redhat.com>
1015             Dave Brolley  <brolley@redhat.com>
1016             Chris Demetriou  <cgd@broadcom.com>
1017
1018         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1019         (sim_mach_default): New variable.
1020         (mips64vr-*-*, mips64vrel-*-*): New configurations.
1021         Add a new simulator generator, MULTI.
1022         * configure: Regenerate.
1023         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1024         (multi-run.o): New dependency.
1025         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1026         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1027         (tmp-multi): Combine them.
1028         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
1029         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1030         (distclean-extra): New rule.
1031         * sim-main.h: Include bfd.h.
1032         (MIPS_MACH): New macro.
1033         * mips.igen (vr4120, vr5400, vr5500): New models.
1034         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1035         * vr.igen: Replace with new version.
1036
1037 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
1038
1039         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1040         * configure: Regenerate.
1041
1042 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
1043
1044         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1045         * mips.igen: Remove all invocations of check_branch_bug and
1046         mark_branch_bug.
1047
1048 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
1049
1050         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1051
1052 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
1053
1054         * mips.igen (do_load_double, do_store_double): New functions.
1055         (LDC1, SDC1): Rename to...
1056         (LDC1b, SDC1b): respectively.
1057         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1058
1059 2002-07-29  Michael Snyder  <msnyder@redhat.com>
1060
1061         * cp1.c (fp_recip2): Modify initialization expression so that
1062         GCC will recognize it as constant.
1063
1064 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
1065
1066         * mdmx.c (SD_): Delete.
1067         (Unpredictable): Re-define, for now, to directly invoke
1068         unpredictable_action().
1069         (mdmx_acc_op): Fix error in .ob immediate handling.
1070
1071 2002-06-18  Andrew Cagney  <cagney@redhat.com>
1072
1073         * interp.c (sim_firmware_command): Initialize `address'.
1074
1075 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
1076
1077         * configure: Regenerated to track ../common/aclocal.m4 changes.
1078
1079 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
1080             Ed Satterthwaite  <ehs@broadcom.com>
1081
1082         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1083         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1084         * mips.igen: Include mips3d.igen.
1085         (mips3d): New model name for MIPS-3D ASE instructions.
1086         (CVT.W.fmt): Don't use this instruction for word (source) format
1087         instructions.
1088         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1089         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1090         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1091         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1092         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1093         (RSquareRoot1, RSquareRoot2): New macros.
1094         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1095         (fp_rsqrt2): New functions.
1096         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1097         * configure: Regenerate.
1098
1099 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
1100             Ed Satterthwaite  <ehs@broadcom.com>
1101
1102         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1103         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1104         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1105         (convert): Note that this function is not used for paired-single
1106         format conversions.
1107         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1108         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1109         (check_fmt_p): Enable paired-single support.
1110         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1111         (PUU.PS): New instructions.
1112         (CVT.S.fmt): Don't use this instruction for paired-single format
1113         destinations.
1114         * sim-main.h (FP_formats): New value 'fmt_ps.'
1115         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1116         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1117
1118 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1119
1120         * mips.igen: Fix formatting of function calls in
1121         many FP operations.
1122
1123 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1124
1125         * mips.igen (MOVN, MOVZ): Trace result.
1126         (TNEI): Print "tnei" as the opcode name in traces.
1127         (CEIL.W): Add disassembly string for traces.
1128         (RSQRT.fmt): Make location of disassembly string consistent
1129         with other instructions.
1130
1131 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
1132
1133         * mips.igen (X): Delete unused function.
1134
1135 2002-06-08  Andrew Cagney  <cagney@redhat.com>
1136
1137         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1138
1139 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1140             Ed Satterthwaite  <ehs@broadcom.com>
1141
1142         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1143         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1144         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1145         (fp_nmsub): New prototypes.
1146         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1147         (NegMultiplySub): New defines.
1148         * mips.igen (RSQRT.fmt): Use RSquareRoot().
1149         (MADD.D, MADD.S): Replace with...
1150         (MADD.fmt): New instruction.
1151         (MSUB.D, MSUB.S): Replace with...
1152         (MSUB.fmt): New instruction.
1153         (NMADD.D, NMADD.S): Replace with...
1154         (NMADD.fmt): New instruction.
1155         (NMSUB.D, MSUB.S): Replace with...
1156         (NMSUB.fmt): New instruction.
1157
1158 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1159             Ed Satterthwaite  <ehs@broadcom.com>
1160
1161         * cp1.c: Fix more comment spelling and formatting.
1162         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1163         (denorm_mode): New function.
1164         (fpu_unary, fpu_binary): Round results after operation, collect
1165         status from rounding operations, and update the FCSR.
1166         (convert): Collect status from integer conversions and rounding
1167         operations, and update the FCSR.  Adjust NaN values that result
1168         from conversions.  Convert to use sim_io_eprintf rather than
1169         fprintf, and remove some debugging code.
1170         * cp1.h (fenr_FS): New define.
1171
1172 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1173
1174         * cp1.c (convert): Remove unusable debugging code, and move MIPS
1175         rounding mode to sim FP rounding mode flag conversion code into...
1176         (rounding_mode): New function.
1177
1178 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
1179
1180         * cp1.c: Clean up formatting of a few comments.
1181         (value_fpr): Reformat switch statement.
1182
1183 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
1184             Ed Satterthwaite  <ehs@broadcom.com>
1185
1186         * cp1.h: New file.
1187         * sim-main.h: Include cp1.h.
1188         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1189         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1190         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
1191         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1192         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1193         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1194         * cp1.c: Don't include sim-fpu.h; already included by
1195         sim-main.h.  Clean up formatting of some comments.
1196         (NaN, Equal, Less): Remove.
1197         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1198         (fp_cmp): New functions.
1199         * mips.igen (do_c_cond_fmt): Remove.
1200         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1201         Compare.  Add result tracing.
1202         (CxC1): Remove, replace with...
1203         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1204         (DMxC1): Remove, replace with...
1205         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1206         (MxC1): Remove, replace with...
1207         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1208
1209 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1210
1211         * sim-main.h (FGRIDX): Remove, replace all uses with...
1212         (FGR_BASE): New macro.
1213         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1214         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1215         (NR_FGR, FGR): Likewise.
1216         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1217         * mips.igen: Likewise.
1218
1219 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1220
1221         * cp1.c: Add an FSF Copyright notice to this file.
1222
1223 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
1224             Ed Satterthwaite  <ehs@broadcom.com>
1225
1226         * cp1.c (Infinity): Remove.
1227         * sim-main.h (Infinity): Likewise.
1228
1229         * cp1.c (fp_unary, fp_binary): New functions.
1230         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1231         (fp_sqrt): New functions, implemented in terms of the above.
1232         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1233         (Recip, SquareRoot): Remove (replaced by functions above).
1234         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1235         (fp_recip, fp_sqrt): New prototypes.
1236         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1237         (Recip, SquareRoot): Replace prototypes with #defines which
1238         invoke the functions above.
1239
1240 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1241
1242         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1243         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1244         file, remove PARAMS from prototypes.
1245         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
1246         simulator state arguments.
1247         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
1248         pass simulator state arguments.
1249         * cp1.c (SD): Redefine as CPU_STATE(cpu).
1250         (store_fpr, convert): Remove 'sd' argument.
1251         (value_fpr): Likewise.  Convert to use 'SD' instead.
1252
1253 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1254
1255         * cp1.c (Min, Max): Remove #if 0'd functions.
1256         * sim-main.h (Min, Max): Remove.
1257
1258 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1259
1260         * cp1.c: fix formatting of switch case and default labels.
1261         * interp.c: Likewise.
1262         * sim-main.c: Likewise.
1263
1264 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1265
1266         * cp1.c: Clean up comments which describe FP formats.
1267          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1268
1269 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1270             Ed Satterthwaite  <ehs@broadcom.com>
1271
1272         * configure.in (mipsisa64sb1*-*-*): New target for supporting
1273         Broadcom SiByte SB-1 processor configurations.
1274         * configure: Regenerate.
1275         * sb1.igen: New file.
1276         * mips.igen: Include sb1.igen.
1277         (sb1): New model.
1278         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1279         * mdmx.igen: Add "sb1" model to all appropriate functions and
1280         instructions.
1281         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1282         (ob_func, ob_acc): Reference the above.
1283         (qh_acc): Adjust to keep the same size as ob_acc.
1284         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1285         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1286
1287 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
1288
1289         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1290
1291 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
1292             Ed Satterthwaite  <ehs@broadcom.com>
1293
1294         * mips.igen (mdmx): New (pseudo-)model.
1295         * mdmx.c, mdmx.igen: New files.
1296         * Makefile.in (SIM_OBJS): Add mdmx.o.
1297         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1298         New typedefs.
1299         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1300         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1301         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1302         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1303         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1304         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1305         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1306         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1307         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1308         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1309         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1310         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1311         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1312         (qh_fmtsel): New macros.
1313         (_sim_cpu): New member "acc".
1314         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1315         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1316
1317 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1318
1319         * interp.c: Use 'deprecated' rather than 'depreciated.'
1320         * sim-main.h: Likewise.
1321
1322 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
1323
1324         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1325         which wouldn't compile anyway.
1326         * sim-main.h (unpredictable_action): New function prototype.
1327         (Unpredictable): Define to call igen function unpredictable().
1328         (NotWordValue): New macro to call igen function not_word_value().
1329         (UndefinedResult): Remove.
1330         * interp.c (undefined_result): Remove.
1331         (unpredictable_action): New function.
1332         * mips.igen (not_word_value, unpredictable): New functions.
1333         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1334         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1335         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1336         NotWordValue() to check for unpredictable inputs, then
1337         Unpredictable() to handle them.
1338
1339 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
1340
1341         * mips.igen: Fix formatting of calls to Unpredictable().
1342
1343 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
1344
1345         * interp.c (sim_open): Revert previous change.
1346
1347 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
1348
1349         * interp.c (sim_open): Disable chunk of code that wrote code in
1350         vector table entries.
1351
1352 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1353
1354         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1355         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1356         unused definitions.
1357
1358 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
1359
1360         * cp1.c: Fix many formatting issues.
1361
1362 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1363
1364         * cp1.c (fpu_format_name): New function to replace...
1365         (DOFMT): This.  Delete, and update all callers.
1366         (fpu_rounding_mode_name): New function to replace...
1367         (RMMODE): This.  Delete, and update all callers.
1368
1369 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
1370
1371         * interp.c: Move FPU support routines from here to...
1372         * cp1.c: Here.  New file.
1373         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1374         (cp1.o): New target.
1375
1376 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
1377
1378         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1379         * mips.igen (mips32, mips64): New models, add to all instructions
1380         and functions as appropriate.
1381         (loadstore_ea, check_u64): New variant for model mips64.
1382         (check_fmt_p): New variant for models mipsV and mips64, remove
1383         mipsV model marking fro other variant.
1384         (SLL) Rename to...
1385         (SLLa) this.
1386         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1387         for mips32 and mips64.
1388         (DCLO, DCLZ): New instructions for mips64.
1389
1390 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
1391
1392         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1393         immediate or code as a hex value with the "%#lx" format.
1394         (ANDI): Likewise, and fix printed instruction name.
1395
1396 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1397
1398         * sim-main.h (UndefinedResult, Unpredictable): New macros
1399         which currently do nothing.
1400
1401 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1402
1403         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1404         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1405         (status_CU3): New definitions.
1406
1407         * sim-main.h (ExceptionCause): Add new values for MIPS32
1408         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
1409         for DebugBreakPoint and NMIReset to note their status in
1410         MIPS32 and MIPS64.
1411         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1412         (SignalExceptionCacheErr): New exception macros.
1413
1414 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1415
1416         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1417         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1418         is always enabled.
1419         (SignalExceptionCoProcessorUnusable): Take as argument the
1420         unusable coprocessor number.
1421
1422 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1423
1424         * mips.igen: Fix formatting of all SignalException calls.
1425
1426 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
1427
1428         * sim-main.h (SIGNEXTEND): Remove.
1429
1430 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1431
1432         * mips.igen: Remove gencode comment from top of file, fix
1433         spelling in another comment.
1434
1435 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
1436
1437         * mips.igen (check_fmt, check_fmt_p): New functions to check
1438         whether specific floating point formats are usable.
1439         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1440         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1441         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1442         Use the new functions.
1443         (do_c_cond_fmt): Remove format checks...
1444         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1445
1446 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1447
1448         * mips.igen: Fix formatting of check_fpu calls.
1449
1450 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1451
1452         * mips.igen (FLOOR.L.fmt): Store correct destination register.
1453
1454 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
1455
1456         * mips.igen: Remove whitespace at end of lines.
1457
1458 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1459
1460         * mips.igen (loadstore_ea): New function to do effective
1461         address calculations.
1462         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1463         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1464         CACHE): Use loadstore_ea to do effective address computations.
1465
1466 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1467
1468         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1469         * mips.igen (LL, CxC1, MxC1): Likewise.
1470
1471 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
1472
1473         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1474         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1475         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1476         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1477         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1478         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1479         Don't split opcode fields by hand, use the opcode field values
1480         provided by igen.
1481
1482 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1483
1484         * mips.igen (do_divu): Fix spacing.
1485
1486         * mips.igen (do_dsllv): Move to be right before DSLLV,
1487         to match the rest of the do_<shift> functions.
1488
1489 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1490
1491         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1492         DSRL32, do_dsrlv): Trace inputs and results.
1493
1494 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
1495
1496         * mips.igen (CACHE): Provide instruction-printing string.
1497
1498         * interp.c (signal_exception): Comment tokens after #endif.
1499
1500 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1501
1502         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1503         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1504         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1505         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1506         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1507         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1508         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1509         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1510
1511 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1512
1513         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1514         instruction-printing string.
1515         (LWU): Use '64' as the filter flag.
1516
1517 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1518
1519         * mips.igen (SDXC1): Fix instruction-printing string.
1520
1521 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
1522
1523         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1524         filter flags "32,f".
1525
1526 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1527
1528         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1529         as the filter flag.
1530
1531 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1532
1533         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1534         add a comma) so that it more closely match the MIPS ISA
1535         documentation opcode partitioning.
1536         (PREF): Put useful names on opcode fields, and include
1537         instruction-printing string.
1538
1539 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1540
1541         * mips.igen (check_u64): New function which in the future will
1542         check whether 64-bit instructions are usable and signal an
1543         exception if not.  Currently a no-op.
1544         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1545         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1546         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1547         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1548
1549         * mips.igen (check_fpu): New function which in the future will
1550         check whether FPU instructions are usable and signal an exception
1551         if not.  Currently a no-op.
1552         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1553         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1554         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1555         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1556         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1557         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1558         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1559         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1560
1561 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1562
1563         * mips.igen (do_load_left, do_load_right): Move to be immediately
1564         following do_load.
1565         (do_store_left, do_store_right): Move to be immediately following
1566         do_store.
1567
1568 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
1569
1570         * mips.igen (mipsV): New model name.  Also, add it to
1571         all instructions and functions where it is appropriate.
1572
1573 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
1574
1575         * mips.igen: For all functions and instructions, list model
1576         names that support that instruction one per line.
1577
1578 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1579
1580         * mips.igen: Add some additional comments about supported
1581         models, and about which instructions go where.
1582         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1583         order as is used in the rest of the file.
1584
1585 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
1586
1587         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1588         indicating that ALU32_END or ALU64_END are there to check
1589         for overflow.
1590         (DADD): Likewise, but also remove previous comment about
1591         overflow checking.
1592
1593 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1594
1595         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1596         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1597         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1598         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1599         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1600         fields (i.e., add and move commas) so that they more closely
1601         match the MIPS ISA documentation opcode partitioning.
1602
1603 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
1604
1605         * mips.igen (ADDI): Print immediate value.
1606         (BREAK): Print code.
1607         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1608         (SLL): Print "nop" specially, and don't run the code
1609         that does the shift for the "nop" case.
1610
1611 2001-11-17  Fred Fish  <fnf@redhat.com>
1612
1613         * sim-main.h (float_operation): Move enum declaration outside
1614         of _sim_cpu struct declaration.
1615
1616 2001-04-12  Jim Blandy  <jimb@redhat.com>
1617
1618         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1619         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
1620         set of the FCSR.
1621         * sim-main.h (COCIDX): Remove definition; this isn't supported by
1622         PENDING_FILL, and you can get the intended effect gracefully by
1623         calling PENDING_SCHED directly.
1624
1625 2001-02-23  Ben Elliston  <bje@redhat.com>
1626
1627         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1628         already defined elsewhere.
1629
1630 2001-02-19  Ben Elliston  <bje@redhat.com>
1631
1632         * sim-main.h (sim_monitor): Return an int.
1633         * interp.c (sim_monitor): Add return values.
1634         (signal_exception): Handle error conditions from sim_monitor.
1635
1636 2001-02-08  Ben Elliston  <bje@redhat.com>
1637
1638         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1639         (store_memory): Likewise, pass cia to sim_core_write*.
1640
1641 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
1642
1643         On advice from Chris G. Demetriou <cgd@sibyte.com>:
1644         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1645
1646 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1647
1648         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1649         * Makefile.in: Don't delete *.igen when cleaning directory.
1650
1651 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1652
1653         * m16.igen (break): Call SignalException not sim_engine_halt.
1654
1655 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1656
1657         From Jason Eckhardt:
1658         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1659
1660 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1661
1662         * mips.igen (MxC1, DMxC1): Fix printf formatting.
1663
1664 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
1665
1666         * mips.igen (do_dmultx): Fix typo.
1667
1668 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1669
1670         * configure: Regenerated to track ../common/aclocal.m4 changes.
1671
1672 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1673
1674         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1675
1676 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
1677
1678         * sim-main.h (GPR_CLEAR): Define macro.
1679
1680 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
1681
1682         * interp.c (decode_coproc): Output long using %lx and not %s.
1683
1684 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
1685
1686         * interp.c (sim_open): Sort & extend dummy memory regions for
1687         --board=jmr3904 for eCos.
1688
1689 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
1690
1691         * configure: Regenerated.
1692
1693 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
1694
1695         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1696         calls, conditional on the simulator being in verbose mode.
1697
1698 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
1699
1700         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1701         cache don't get ReservedInstruction traps.
1702
1703 1999-11-29  Mark Salter  <msalter@cygnus.com>
1704
1705         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1706         to clear status bits in sdisr register. This is how the hardware works.
1707
1708         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1709         being used by cygmon.
1710
1711 1999-11-11  Andrew Haley  <aph@cygnus.com>
1712
1713         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1714         instructions.
1715
1716 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
1717
1718         * mips.igen (MULT): Correct previous mis-applied patch.
1719
1720 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
1721
1722         * mips.igen (delayslot32): Handle sequence like
1723         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1724         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1725         (MULT): Actually pass the third register...
1726
1727 1999-09-03  Mark Salter  <msalter@cygnus.com>
1728
1729         * interp.c (sim_open): Added more memory aliases for additional
1730         hardware being touched by cygmon on jmr3904 board.
1731
1732 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1733
1734         * configure: Regenerated to track ../common/aclocal.m4 changes.
1735
1736 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1737
1738         * interp.c (sim_store_register): Handle case where client - GDB -
1739         specifies that a 4 byte register is 8 bytes in size.
1740         (sim_fetch_register): Ditto.
1741
1742 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
1743
1744         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
1745         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
1746         (idt_monitor_base): Base address for IDT monitor traps.
1747         (pmon_monitor_base): Ditto for PMON.
1748         (lsipmon_monitor_base): Ditto for LSI PMON.
1749         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
1750         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
1751         (sim_firmware_command): New function.
1752         (mips_option_handler): Call it for OPTION_FIRMWARE.
1753         (sim_open): Allocate memory for idt_monitor region.  If "--board"
1754         option was given, add no monitor by default.  Add BREAK hooks only if
1755         monitors are also there.
1756
1757 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1758
1759         * interp.c (sim_monitor): Flush output before reading input.
1760
1761 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1762
1763         * tconfig.in (SIM_HANDLES_LMA): Always define.
1764
1765 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1766
1767         From Mark Salter <msalter@cygnus.com>:
1768         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1769         (sim_open): Add setup for BSP board.
1770
1771 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1772
1773         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1774         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1775         them as unimplemented.
1776
1777 1999-05-08  Felix Lee  <flee@cygnus.com>
1778
1779         * configure: Regenerated to track ../common/aclocal.m4 changes.
1780
1781 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1782
1783         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1784
1785 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1786
1787         * configure.in: Any mips64vr5*-*-* target should have
1788         -DTARGET_ENABLE_FR=1.
1789         (default_endian): Any mips64vr*el-*-* target should default to
1790         LITTLE_ENDIAN.
1791         * configure: Re-generate.
1792
1793 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1794
1795         * mips.igen (ldl): Extend from _16_, not 32.
1796
1797 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1798
1799         * interp.c (sim_store_register): Force registers written to by GDB
1800         into an un-interpreted state.
1801
1802 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1803
1804         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1805         CPU, start periodic background I/O polls.
1806         (tx3904sio_poll): New function: periodic I/O poller.
1807
1808 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1809
1810         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1811
1812 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1813
1814         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1815         case statement.
1816
1817 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1818
1819         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1820         (load_word): Call SIM_CORE_SIGNAL hook on error.
1821         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1822         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1823         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1824         * sim-main.h (COP0_BADVADDR): Define.
1825         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1826         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1827         (_sim_cpu): Add exc_* fields to store register value snapshots.
1828         * mips.igen (*): Replace memory-related SignalException* calls
1829         with references to SIM_CORE_SIGNAL hook.
1830
1831         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1832         fix.
1833         * sim-main.c (*): Minor warning cleanups.
1834
1835 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1836
1837         * m16.igen (DADDIU5): Correct type-o.
1838
1839 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1840
1841         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1842         variables.
1843
1844 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1845
1846         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1847         to include path.
1848         (interp.o): Add dependency on itable.h
1849         (oengine.c, gencode): Delete remaining references.
1850         (BUILT_SRC_FROM_GEN): Clean up.
1851
1852 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1853
1854         * vr4run.c: New.
1855         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1856         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1857         tmp-run-hack) : New.
1858         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1859         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1860         Drop the "64" qualifier to get the HACK generator working.
1861         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1862         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1863         qualifier to get the hack generator working.
1864         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1865         (DSLL): Use do_dsll.
1866         (DSLLV): Use do_dsllv.
1867         (DSRA): Use do_dsra.
1868         (DSRL): Use do_dsrl.
1869         (DSRLV): Use do_dsrlv.
1870         (BC1): Move *vr4100 to get the HACK generator working.
1871         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1872         get the HACK generator working.
1873         (MACC) Rename to get the HACK generator working.
1874         (DMACC,MACCS,DMACCS): Add the 64.
1875
1876 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1877
1878         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1879         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1880
1881 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1882
1883     * mips/interp.c (DEBUG): Cleanups.
1884
1885 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1886
1887         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1888         (tx3904sio_tickle): fflush after a stdout character output.
1889
1890 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1891
1892         * interp.c (sim_close): Uninstall modules.
1893
1894 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1895
1896         * sim-main.h, interp.c (sim_monitor): Change to global
1897         function.
1898
1899 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1900
1901         * configure.in (vr4100): Only include vr4100 instructions in
1902         simulator.
1903         * configure: Re-generate.
1904         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1905
1906 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1907
1908         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1909         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1910         true alternative.
1911
1912         * configure.in (sim_default_gen, sim_use_gen): Replace with
1913         sim_gen.
1914         (--enable-sim-igen): Delete config option. Always using IGEN.
1915         * configure: Re-generate.
1916
1917         * Makefile.in (gencode): Kill, kill, kill.
1918         * gencode.c: Ditto.
1919
1920 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1921
1922         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1923         bit mips16 igen simulator.
1924         * configure: Re-generate.
1925
1926         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1927         as part of vr4100 ISA.
1928         * vr.igen: Mark all instructions as 64 bit only.
1929
1930 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1931
1932         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1933         Pacify GCC.
1934
1935 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1936
1937         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1938         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1939         * configure: Re-generate.
1940
1941         * m16.igen (BREAK): Define breakpoint instruction.
1942         (JALX32): Mark instruction as mips16 and not r3900.
1943         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1944
1945         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1946
1947 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1948
1949         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1950         insn as a debug breakpoint.
1951
1952         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1953         pending.slot_size.
1954         (PENDING_SCHED): Clean up trace statement.
1955         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1956         (PENDING_FILL): Delay write by only one cycle.
1957         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1958
1959         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1960         of pending writes.
1961         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1962         32 & 64.
1963         (pending_tick): Move incrementing of index to FOR statement.
1964         (pending_tick): Only update PENDING_OUT after a write has occured.
1965
1966         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1967         build simulator.
1968         * configure: Re-generate.
1969
1970         * interp.c (sim_engine_run OLD): Delete explicit call to
1971         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1972
1973 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1974
1975         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1976         interrupt level number to match changed SignalExceptionInterrupt
1977         macro.
1978
1979 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1980
1981         * interp.c: #include "itable.h" if WITH_IGEN.
1982         (get_insn_name): New function.
1983         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1984         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1985
1986 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1987
1988         * configure: Rebuilt to inhale new common/aclocal.m4.
1989
1990 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1991
1992         * dv-tx3904sio.c: Include sim-assert.h.
1993
1994 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1995
1996         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1997         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1998         Reorganize target-specific sim-hardware checks.
1999         * configure: rebuilt.
2000         * interp.c (sim_open): For tx39 target boards, set
2001         OPERATING_ENVIRONMENT, add tx3904sio devices.
2002         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2003         ROM executables.  Install dv-sockser into sim-modules list.
2004
2005         * dv-tx3904irc.c: Compiler warning clean-up.
2006         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
2007         frequent hw-trace messages.
2008
2009 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2010
2011         * vr.igen (MulAcc): Identify as a vr4100 specific function.
2012
2013 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2014
2015         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2016
2017         * vr.igen: New file.
2018         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2019         * mips.igen: Define vr4100 model. Include vr.igen.
2020 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
2021
2022         * mips.igen (check_mf_hilo): Correct check.
2023
2024 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2025
2026         * sim-main.h (interrupt_event): Add prototype.
2027
2028         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2029         register_ptr, register_value.
2030         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2031
2032         * sim-main.h (tracefh): Make extern.
2033
2034 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
2035
2036         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2037         Reduce unnecessarily high timer event frequency.
2038         * dv-tx3904cpu.c: Ditto for interrupt event.
2039
2040 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
2041
2042         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2043         to allay warnings.
2044         (interrupt_event): Made non-static.
2045
2046         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2047         interchange of configuration values for external vs. internal
2048         clock dividers.
2049
2050 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
2051
2052         * mips.igen (BREAK): Moved code to here for
2053         simulator-reserved break instructions.
2054         * gencode.c (build_instruction): Ditto.
2055         * interp.c (signal_exception): Code moved from here.  Non-
2056         reserved instructions now use exception vector, rather
2057         than halting sim.
2058         * sim-main.h: Moved magic constants to here.
2059
2060 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
2061
2062         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2063         register upon non-zero interrupt event level, clear upon zero
2064         event value.
2065         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2066         by passing zero event value.
2067         (*_io_{read,write}_buffer): Endianness fixes.
2068         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2069         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2070
2071         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2072         serial I/O and timer module at base address 0xFFFF0000.
2073
2074 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
2075
2076         * mips.igen (SWC1) : Correct the handling of ReverseEndian
2077         and BigEndianCPU.
2078
2079 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
2080
2081         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2082         parts.
2083         * configure: Update.
2084
2085 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
2086
2087         * dv-tx3904tmr.c: New file - implements tx3904 timer.
2088         * dv-tx3904{irc,cpu}.c: Mild reformatting.
2089         * configure.in: Include tx3904tmr in hw_device list.
2090         * configure: Rebuilt.
2091         * interp.c (sim_open): Instantiate three timer instances.
2092         Fix address typo of tx3904irc instance.
2093
2094 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
2095
2096         * interp.c (signal_exception): SystemCall exception now uses
2097         the exception vector.
2098
2099 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
2100
2101         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2102         to allay warnings.
2103
2104 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2105
2106         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2107
2108 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2109
2110         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2111
2112         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2113         sim-main.h. Declare a struct hw_descriptor instead of struct
2114         hw_device_descriptor.
2115
2116 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2117
2118         * mips.igen (do_store_left, do_load_left): Compute nr of left and
2119         right bits and then re-align left hand bytes to correct byte
2120         lanes.  Fix incorrect computation in do_store_left when loading
2121         bytes from second word.
2122
2123 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2124
2125         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2126         * interp.c (sim_open): Only create a device tree when HW is
2127         enabled.
2128
2129         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2130         * interp.c (signal_exception): Ditto.
2131
2132 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
2133
2134         * gencode.c: Mark BEGEZALL as LIKELY.
2135
2136 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2137
2138         * sim-main.h (ALU32_END): Sign extend 32 bit results.
2139         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2140
2141 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
2142
2143         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2144         modules.  Recognize TX39 target with "mips*tx39" pattern.
2145         * configure: Rebuilt.
2146         * sim-main.h (*): Added many macros defining bits in
2147         TX39 control registers.
2148         (SignalInterrupt): Send actual PC instead of NULL.
2149         (SignalNMIReset): New exception type.
2150         * interp.c (board): New variable for future use to identify
2151         a particular board being simulated.
2152         (mips_option_handler,mips_options): Added "--board" option.
2153         (interrupt_event): Send actual PC.
2154         (sim_open): Make memory layout conditional on board setting.
2155         (signal_exception): Initial implementation of hardware interrupt
2156         handling.  Accept another break instruction variant for simulator
2157         exit.
2158         (decode_coproc): Implement RFE instruction for TX39.
2159         (mips.igen): Decode RFE instruction as such.
2160         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2161         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2162         bbegin to implement memory map.
2163         * dv-tx3904cpu.c: New file.
2164         * dv-tx3904irc.c: New file.
2165
2166 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
2167
2168         * mips.igen (check_mt_hilo): Create a separate r3900 version.
2169
2170 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
2171
2172         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
2173         with calls to check_div_hilo.
2174
2175 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
2176
2177         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2178         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2179         Add special r3900 version of do_mult_hilo.
2180         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2181         with calls to check_mult_hilo.
2182         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2183         with calls to check_div_hilo.
2184
2185 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2186
2187         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2188         Document a replacement.
2189
2190 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
2191
2192         * interp.c (sim_monitor): Make mon_printf work.
2193
2194 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
2195
2196         * sim-main.h (INSN_NAME): New arg `cpu'.
2197
2198 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
2199
2200         * configure: Regenerated to track ../common/aclocal.m4 changes.
2201
2202 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
2203
2204         * configure: Regenerated to track ../common/aclocal.m4 changes.
2205         * config.in: Ditto.
2206
2207 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
2208
2209         * acconfig.h: New file.
2210         * configure.in: Reverted change of Apr 24; use sinclude again.
2211
2212 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
2213
2214         * configure: Regenerated to track ../common/aclocal.m4 changes.
2215         * config.in: Ditto.
2216
2217 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
2218
2219         * configure.in: Don't call sinclude.
2220
2221 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
2222
2223         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2224
2225 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2226
2227         * mips.igen (ERET): Implement.
2228
2229         * interp.c (decode_coproc): Return sign-extended EPC.
2230
2231         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2232
2233         * interp.c (signal_exception): Do not ignore Trap.
2234         (signal_exception): On TRAP, restart at exception address.
2235         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2236         (signal_exception): Update.
2237         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2238         so that TRAP instructions are caught.
2239
2240 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2241
2242         * sim-main.h (struct hilo_access, struct hilo_history): Define,
2243         contains HI/LO access history.
2244         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2245         (HIACCESS, LOACCESS): Delete, replace with
2246         (HIHISTORY, LOHISTORY): New macros.
2247         (CHECKHILO): Delete all, moved to mips.igen
2248
2249         * gencode.c (build_instruction): Do not generate checks for
2250         correct HI/LO register usage.
2251
2252         * interp.c (old_engine_run): Delete checks for correct HI/LO
2253         register usage.
2254
2255         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2256         check_mf_cycles): New functions.
2257         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2258         do_divu, domultx, do_mult, do_multu): Use.
2259
2260         * tx.igen ("madd", "maddu"): Use.
2261
2262 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2263
2264         * mips.igen (DSRAV): Use function do_dsrav.
2265         (SRAV): Use new function do_srav.
2266
2267         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2268         (B): Sign extend 11 bit immediate.
2269         (EXT-B*): Shift 16 bit immediate left by 1.
2270         (ADDIU*): Don't sign extend immediate value.
2271
2272 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2273
2274         * m16run.c (sim_engine_run): Restore CIA after handling an event.
2275
2276         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2277         functions.
2278
2279         * mips.igen (delayslot32, nullify_next_insn): New functions.
2280         (m16.igen): Always include.
2281         (do_*): Add more tracing.
2282
2283         * m16.igen (delayslot16): Add NIA argument, could be called by a
2284         32 bit MIPS16 instruction.
2285
2286         * interp.c (ifetch16): Move function from here.
2287         * sim-main.c (ifetch16): To here.
2288
2289         * sim-main.c (ifetch16, ifetch32): Update to match current
2290         implementations of LH, LW.
2291         (signal_exception): Don't print out incorrect hex value of illegal
2292         instruction.
2293
2294 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2295
2296         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2297         instruction.
2298
2299         * m16.igen: Implement MIPS16 instructions.
2300
2301         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2302         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2303         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2304         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2305         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
2306         bodies of corresponding code from 32 bit insn to these.  Also used
2307         by MIPS16 versions of functions.
2308
2309         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2310         (IMEM16): Drop NR argument from macro.
2311
2312 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2313
2314         * Makefile.in (SIM_OBJS): Add sim-main.o.
2315
2316         * sim-main.h (address_translation, load_memory, store_memory,
2317         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2318         as INLINE_SIM_MAIN.
2319         (pr_addr, pr_uword64): Declare.
2320         (sim-main.c): Include when H_REVEALS_MODULE_P.
2321
2322         * interp.c (address_translation, load_memory, store_memory,
2323         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2324         from here.
2325         * sim-main.c: To here. Fix compilation problems.
2326
2327         * configure.in: Enable inlining.
2328         * configure: Re-config.
2329
2330 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2331
2332         * configure: Regenerated to track ../common/aclocal.m4 changes.
2333
2334 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2335
2336         * mips.igen: Include tx.igen.
2337         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2338         * tx.igen: New file, contains MADD and MADDU.
2339
2340         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2341         the hardwired constant `7'.
2342         (store_memory): Ditto.
2343         (LOADDRMASK): Move definition to sim-main.h.
2344
2345         mips.igen (MTC0): Enable for r3900.
2346         (ADDU): Add trace.
2347
2348         mips.igen (do_load_byte): Delete.
2349         (do_load, do_store, do_load_left, do_load_write, do_store_left,
2350         do_store_right): New functions.
2351         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2352
2353         configure.in: Let the tx39 use igen again.
2354         configure: Update.
2355
2356 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2357
2358         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2359         not an address sized quantity.  Return zero for cache sizes.
2360
2361 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2362
2363         * mips.igen (r3900): r3900 does not support 64 bit integer
2364         operations.
2365
2366 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
2367
2368         * configure.in (mipstx39*-*-*): Use gencode simulator rather
2369         than igen one.
2370         * configure : Rebuild.
2371
2372 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2373
2374         * configure: Regenerated to track ../common/aclocal.m4 changes.
2375
2376 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2377
2378         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2379
2380 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
2381
2382         * configure: Regenerated to track ../common/aclocal.m4 changes.
2383         * config.in: Regenerated to track ../common/aclocal.m4 changes.
2384
2385 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2386
2387         * configure: Regenerated to track ../common/aclocal.m4 changes.
2388
2389 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2390
2391         * interp.c (Max, Min): Comment out functions. Not yet used.
2392
2393 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2394
2395         * configure: Regenerated to track ../common/aclocal.m4 changes.
2396
2397 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
2398
2399         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2400         configurable settings for stand-alone simulator.
2401
2402         * configure.in: Added X11 search, just in case.
2403
2404         * configure: Regenerated.
2405
2406 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2407
2408         * interp.c (sim_write, sim_read, load_memory, store_memory):
2409         Replace sim_core_*_map with read_map, write_map, exec_map resp.
2410
2411 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2412
2413         * sim-main.h (GETFCC): Return an unsigned value.
2414
2415 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2416
2417         * mips.igen (DIV): Fix check for -1 / MIN_INT.
2418         (DADD): Result destination is RD not RT.
2419
2420 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2421
2422         * sim-main.h (HIACCESS, LOACCESS): Always define.
2423
2424         * mdmx.igen (Maxi, Mini): Rename Max, Min.
2425
2426         * interp.c (sim_info): Delete.
2427
2428 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
2429
2430         * interp.c (DECLARE_OPTION_HANDLER): Use it.
2431         (mips_option_handler): New argument `cpu'.
2432         (sim_open): Update call to sim_add_option_table.
2433
2434 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2435
2436         * mips.igen (CxC1): Add tracing.
2437
2438 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2439
2440         * sim-main.h (Max, Min): Declare.
2441
2442         * interp.c (Max, Min): New functions.
2443
2444         * mips.igen (BC1): Add tracing.
2445
2446 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
2447
2448         * interp.c Added memory map for stack in vr4100
2449
2450 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
2451
2452         * interp.c (load_memory): Add missing "break"'s.
2453
2454 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2455
2456         * interp.c (sim_store_register, sim_fetch_register): Pass in
2457         length parameter.  Return -1.
2458
2459 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
2460
2461         * interp.c: Added hardware init hook, fixed warnings.
2462
2463 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2464
2465         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2466
2467 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2468
2469         * interp.c (ifetch16): New function.
2470
2471         * sim-main.h (IMEM32): Rename IMEM.
2472         (IMEM16_IMMED): Define.
2473         (IMEM16): Define.
2474         (DELAY_SLOT): Update.
2475
2476         * m16run.c (sim_engine_run): New file.
2477
2478         * m16.igen: All instructions except LB.
2479         (LB): Call do_load_byte.
2480         * mips.igen (do_load_byte): New function.
2481         (LB): Call do_load_byte.
2482
2483         * mips.igen: Move spec for insn bit size and high bit from here.
2484         * Makefile.in (tmp-igen, tmp-m16): To here.
2485
2486         * m16.dc: New file, decode mips16 instructions.
2487
2488         * Makefile.in (SIM_NO_ALL): Define.
2489         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2490
2491 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2492
2493         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2494         point unit to 32 bit registers.
2495         * configure: Re-generate.
2496
2497 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2498
2499         * configure.in (sim_use_gen): Make IGEN the default simulator
2500         generator for generic 32 and 64 bit mips targets.
2501         * configure: Re-generate.
2502
2503 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2504
2505         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2506         bitsize.
2507
2508         * interp.c (sim_fetch_register, sim_store_register): Read/write
2509         FGR from correct location.
2510         (sim_open): Set size of FGR's according to
2511         WITH_TARGET_FLOATING_POINT_BITSIZE.
2512
2513         * sim-main.h (FGR): Store floating point registers in a separate
2514         array.
2515
2516 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2517
2518         * configure: Regenerated to track ../common/aclocal.m4 changes.
2519
2520 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2521
2522         * interp.c (ColdReset): Call PENDING_INVALIDATE.
2523
2524         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2525
2526         * interp.c (pending_tick): New function.  Deliver pending writes.
2527
2528         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2529         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2530         it can handle mixed sized quantites and single bits.
2531
2532 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2533
2534         * interp.c (oengine.h): Do not include when building with IGEN.
2535         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2536         (sim_info): Ditto for PROCESSOR_64BIT.
2537         (sim_monitor): Replace ut_reg with unsigned_word.
2538         (*): Ditto for t_reg.
2539         (LOADDRMASK): Define.
2540         (sim_open): Remove defunct check that host FP is IEEE compliant,
2541         using software to emulate floating point.
2542         (value_fpr, ...): Always compile, was conditional on HASFPU.
2543
2544 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2545
2546         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2547         size.
2548
2549         * interp.c (SD, CPU): Define.
2550         (mips_option_handler): Set flags in each CPU.
2551         (interrupt_event): Assume CPU 0 is the one being iterrupted.
2552         (sim_close): Do not clear STATE, deleted anyway.
2553         (sim_write, sim_read): Assume CPU zero's vm should be used for
2554         data transfers.
2555         (sim_create_inferior): Set the PC for all processors.
2556         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2557         argument.
2558         (mips16_entry): Pass correct nr of args to store_word, load_word.
2559         (ColdReset): Cold reset all cpu's.
2560         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2561         (sim_monitor, load_memory, store_memory, signal_exception): Use
2562         `CPU' instead of STATE_CPU.
2563
2564
2565         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2566         SD or CPU_.
2567
2568         * sim-main.h (signal_exception): Add sim_cpu arg.
2569         (SignalException*): Pass both SD and CPU to signal_exception.
2570         * interp.c (signal_exception): Update.
2571
2572         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2573         Ditto
2574         (sync_operation, prefetch, cache_op, store_memory, load_memory,
2575         address_translation): Ditto
2576         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2577
2578 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2579
2580         * configure: Regenerated to track ../common/aclocal.m4 changes.
2581
2582 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2583
2584         * interp.c (sim_engine_run): Add `nr_cpus' argument.
2585
2586         * mips.igen (model): Map processor names onto BFD name.
2587
2588         * sim-main.h (CPU_CIA): Delete.
2589         (SET_CIA, GET_CIA): Define
2590
2591 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
2592
2593         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2594         regiser.
2595
2596         * configure.in (default_endian): Configure a big-endian simulator
2597         by default.
2598         * configure: Re-generate.
2599
2600 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
2601
2602         * configure: Regenerated to track ../common/aclocal.m4 changes.
2603
2604 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
2605
2606         * interp.c (sim_monitor): Handle Densan monitor outbyte
2607         and inbyte functions.
2608
2609 1997-12-29  Felix Lee  <flee@cygnus.com>
2610
2611         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2612
2613 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
2614
2615         * Makefile.in (tmp-igen): Arrange for $zero to always be
2616         reset to zero after every instruction.
2617
2618 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2619
2620         * configure: Regenerated to track ../common/aclocal.m4 changes.
2621         * config.in: Ditto.
2622
2623 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
2624
2625         * mips.igen (MSUB): Fix to work like MADD.
2626         * gencode.c (MSUB): Similarly.
2627
2628 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
2629
2630         * configure: Regenerated to track ../common/aclocal.m4 changes.
2631
2632 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2633
2634         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2635
2636 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2637
2638         * sim-main.h (sim-fpu.h): Include.
2639
2640         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2641         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2642         using host independant sim_fpu module.
2643
2644 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2645
2646         * interp.c (signal_exception): Report internal errors with SIGABRT
2647         not SIGQUIT.
2648
2649         * sim-main.h (C0_CONFIG): New register.
2650         (signal.h): No longer include.
2651
2652         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2653
2654 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
2655
2656         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2657
2658 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2659
2660         * mips.igen: Tag vr5000 instructions.
2661         (ANDI): Was missing mipsIV model, fix assembler syntax.
2662         (do_c_cond_fmt): New function.
2663         (C.cond.fmt): Handle mips I-III which do not support CC field
2664         separatly.
2665         (bc1): Handle mips IV which do not have a delaed FCC separatly.
2666         (SDR): Mask paddr when BigEndianMem, not the converse as specified
2667         in IV3.2 spec.
2668         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
2669         vr5000 which saves LO in a GPR separatly.
2670
2671         * configure.in (enable-sim-igen): For vr5000, select vr5000
2672         specific instructions.
2673         * configure: Re-generate.
2674
2675 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2676
2677         * Makefile.in (SIM_OBJS): Add sim-fpu module.
2678
2679         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2680         fmt_uninterpreted_64 bit cases to switch.  Convert to
2681         fmt_formatted,
2682
2683         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2684
2685         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2686         as specified in IV3.2 spec.
2687         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2688
2689 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2690
2691         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2692         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2693         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2694         PENDING_FILL versions of instructions.  Simplify.
2695         (X): New function.
2696         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2697         instructions.
2698         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2699         a signed value.
2700         (MTHI, MFHI): Disable code checking HI-LO.
2701
2702         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2703         global.
2704         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2705
2706 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2707
2708         * gencode.c (build_mips16_operands): Replace IPC with cia.
2709
2710         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2711         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2712         IPC to `cia'.
2713         (UndefinedResult): Replace function with macro/function
2714         combination.
2715         (sim_engine_run): Don't save PC in IPC.
2716
2717         * sim-main.h (IPC): Delete.
2718
2719
2720         * interp.c (signal_exception, store_word, load_word,
2721         address_translation, load_memory, store_memory, cache_op,
2722         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2723         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2724         current instruction address - cia - argument.
2725         (sim_read, sim_write): Call address_translation directly.
2726         (sim_engine_run): Rename variable vaddr to cia.
2727         (signal_exception): Pass cia to sim_monitor
2728
2729         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2730         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2731         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2732
2733         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2734         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2735         SIM_ASSERT.
2736
2737         * interp.c (signal_exception): Pass restart address to
2738         sim_engine_restart.
2739
2740         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
2741         idecode.o): Add dependency.
2742
2743         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
2744         Delete definitions
2745         (DELAY_SLOT): Update NIA not PC with branch address.
2746         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
2747
2748         * mips.igen: Use CIA not PC in branch calculations.
2749         (illegal): Call SignalException.
2750         (BEQ, ADDIU): Fix assembler.
2751
2752 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2753
2754         * m16.igen (JALX): Was missing.
2755
2756         * configure.in (enable-sim-igen): New configuration option.
2757         * configure: Re-generate.
2758
2759         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
2760
2761         * interp.c (load_memory, store_memory): Delete parameter RAW.
2762         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
2763         bypassing {load,store}_memory.
2764
2765         * sim-main.h (ByteSwapMem): Delete definition.
2766
2767         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2768
2769         * interp.c (sim_do_command, sim_commands): Delete mips specific
2770         commands.  Handled by module sim-options.
2771
2772         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2773         (WITH_MODULO_MEMORY): Define.
2774
2775         * interp.c (sim_info): Delete code printing memory size.
2776
2777         * interp.c (mips_size): Nee sim_size, delete function.
2778         (power2): Delete.
2779         (monitor, monitor_base, monitor_size): Delete global variables.
2780         (sim_open, sim_close): Delete code creating monitor and other
2781         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2782         manage memory regions.
2783         (load_memory, store_memory): Use sim-core for memory model.
2784
2785         * interp.c (address_translation): Delete all memory map code
2786         except line forcing 32 bit addresses.
2787
2788 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2789
2790         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2791         trace options.
2792
2793         * interp.c (logfh, logfile): Delete globals.
2794         (sim_open, sim_close): Delete code opening & closing log file.
2795         (mips_option_handler): Delete -l and -n options.
2796         (OPTION mips_options): Ditto.
2797
2798         * interp.c (OPTION mips_options): Rename option trace to dinero.
2799         (mips_option_handler): Update.
2800
2801 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2802
2803         * interp.c (fetch_str): New function.
2804         (sim_monitor): Rewrite using sim_read & sim_write.
2805         (sim_open): Check magic number.
2806         (sim_open): Write monitor vectors into memory using sim_write.
2807         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2808         (sim_read, sim_write): Simplify - transfer data one byte at a
2809         time.
2810         (load_memory, store_memory): Clarify meaning of parameter RAW.
2811
2812         * sim-main.h (isHOST): Defete definition.
2813         (isTARGET): Mark as depreciated.
2814         (address_translation): Delete parameter HOST.
2815
2816         * interp.c (address_translation): Delete parameter HOST.
2817
2818 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2819
2820         * mips.igen:
2821
2822         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2823         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2824
2825 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2826
2827         * mips.igen: Add model filter field to records.
2828
2829 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2830
2831         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2832
2833         interp.c (sim_engine_run): Do not compile function sim_engine_run
2834         when WITH_IGEN == 1.
2835
2836         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2837         target architecture.
2838
2839         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2840         igen. Replace with configuration variables sim_igen_flags /
2841         sim_m16_flags.
2842
2843         * m16.igen: New file.  Copy mips16 insns here.
2844         * mips.igen: From here.
2845
2846 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2847
2848         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2849         to top.
2850         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2851
2852 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2853
2854         * gencode.c (build_instruction): Follow sim_write's lead in using
2855         BigEndianMem instead of !ByteSwapMem.
2856
2857 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2858
2859         * configure.in (sim_gen): Dependent on target, select type of
2860         generator.  Always select old style generator.
2861
2862         configure: Re-generate.
2863
2864         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2865         targets.
2866         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2867         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2868         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2869         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2870         SIM_@sim_gen@_*, set by autoconf.
2871
2872 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2873
2874         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2875
2876         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2877         CURRENT_FLOATING_POINT instead.
2878
2879         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2880         (address_translation): Raise exception InstructionFetch when
2881         translation fails and isINSTRUCTION.
2882
2883         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2884         sim_engine_run): Change type of of vaddr and paddr to
2885         address_word.
2886         (address_translation, prefetch, load_memory, store_memory,
2887         cache_op): Change type of vAddr and pAddr to address_word.
2888
2889         * gencode.c (build_instruction): Change type of vaddr and paddr to
2890         address_word.
2891
2892 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2893
2894         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2895         macro to obtain result of ALU op.
2896
2897 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2898
2899         * interp.c (sim_info): Call profile_print.
2900
2901 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2902
2903         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2904
2905         * sim-main.h (WITH_PROFILE): Do not define, defined in
2906         common/sim-config.h.  Use sim-profile module.
2907         (simPROFILE): Delete defintion.
2908
2909         * interp.c (PROFILE): Delete definition.
2910         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2911         (sim_close): Delete code writing profile histogram.
2912         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2913         Delete.
2914         (sim_engine_run): Delete code profiling the PC.
2915
2916 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2917
2918         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2919
2920         * interp.c (sim_monitor): Make register pointers of type
2921         unsigned_word*.
2922
2923         * sim-main.h: Make registers of type unsigned_word not
2924         signed_word.
2925
2926 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2927
2928         * interp.c (sync_operation): Rename from SyncOperation, make
2929         global, add SD argument.
2930         (prefetch): Rename from Prefetch, make global, add SD argument.
2931         (decode_coproc): Make global.
2932
2933         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2934
2935         * gencode.c (build_instruction): Generate DecodeCoproc not
2936         decode_coproc calls.
2937
2938         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2939         (SizeFGR): Move to sim-main.h
2940         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2941         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2942         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2943         sim-main.h.
2944         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2945         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2946         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2947         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2948         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2949         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2950
2951         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2952         exception.
2953         (sim-alu.h): Include.
2954         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2955         (sim_cia): Typedef to instruction_address.
2956
2957 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2958
2959         * Makefile.in (interp.o): Rename generated file engine.c to
2960         oengine.c.
2961
2962         * interp.c: Update.
2963
2964 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2965
2966         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2967
2968 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2969
2970         * gencode.c (build_instruction): For "FPSQRT", output correct
2971         number of arguments to Recip.
2972
2973 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2974
2975         * Makefile.in (interp.o): Depends on sim-main.h
2976
2977         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2978
2979         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2980         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2981         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2982         STATE, DSSTATE): Define
2983         (GPR, FGRIDX, ..): Define.
2984
2985         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2986         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2987         (GPR, FGRIDX, ...): Delete macros.
2988
2989         * interp.c: Update names to match defines from sim-main.h
2990
2991 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2992
2993         * interp.c (sim_monitor): Add SD argument.
2994         (sim_warning): Delete.  Replace calls with calls to
2995         sim_io_eprintf.
2996         (sim_error): Delete. Replace calls with sim_io_error.
2997         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2998         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2999         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3000         argument.
3001         (mips_size): Rename from sim_size. Add SD argument.
3002
3003         * interp.c (simulator): Delete global variable.
3004         (callback): Delete global variable.
3005         (mips_option_handler, sim_open, sim_write, sim_read,
3006         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3007         sim_size,sim_monitor): Use sim_io_* not callback->*.
3008         (sim_open): ZALLOC simulator struct.
3009         (PROFILE): Do not define.
3010
3011 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3012
3013         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3014         support.h with corresponding code.
3015
3016         * sim-main.h (word64, uword64), support.h: Move definition to
3017         sim-main.h.
3018         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3019
3020         * support.h: Delete
3021         * Makefile.in: Update dependencies
3022         * interp.c: Do not include.
3023
3024 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3025
3026         * interp.c (address_translation, load_memory, store_memory,
3027         cache_op): Rename to from AddressTranslation et.al., make global,
3028         add SD argument
3029
3030         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3031         CacheOp): Define.
3032
3033         * interp.c (SignalException): Rename to signal_exception, make
3034         global.
3035
3036         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3037
3038         * sim-main.h (SignalException, SignalExceptionInterrupt,
3039         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3040         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3041         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3042         Define.
3043
3044         * interp.c, support.h: Use.
3045
3046 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3047
3048         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3049         to value_fpr / store_fpr. Add SD argument.
3050         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3051         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3052
3053         * sim-main.h (ValueFPR, StoreFPR): Define.
3054
3055 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3056
3057         * interp.c (sim_engine_run): Check consistency between configure
3058         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3059         and HASFPU.
3060
3061         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3062         (mips_fpu): Configure WITH_FLOATING_POINT.
3063         (mips_endian): Configure WITH_TARGET_ENDIAN.
3064         * configure: Update.
3065
3066 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3067
3068         * configure: Regenerated to track ../common/aclocal.m4 changes.
3069
3070 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
3071
3072         * configure: Regenerated.
3073
3074 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
3075
3076         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3077
3078 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3079
3080         * gencode.c (print_igen_insn_models): Assume certain architectures
3081         include all mips* instructions.
3082         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3083         instruction.
3084
3085         * Makefile.in (tmp.igen): Add target. Generate igen input from
3086         gencode file.
3087
3088         * gencode.c (FEATURE_IGEN): Define.
3089         (main): Add --igen option.  Generate output in igen format.
3090         (process_instructions): Format output according to igen option.
3091         (print_igen_insn_format): New function.
3092         (print_igen_insn_models): New function.
3093         (process_instructions): Only issue warnings and ignore
3094         instructions when no FEATURE_IGEN.
3095
3096 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3097
3098         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3099         MIPS targets.
3100
3101 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3102
3103         * configure: Regenerated to track ../common/aclocal.m4 changes.
3104
3105 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3106
3107         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3108         SIM_RESERVED_BITS): Delete, moved to common.
3109         (SIM_EXTRA_CFLAGS): Update.
3110
3111 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3112
3113         * configure.in: Configure non-strict memory alignment.
3114         * configure: Regenerated to track ../common/aclocal.m4 changes.
3115
3116 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3117
3118         * configure: Regenerated to track ../common/aclocal.m4 changes.
3119
3120 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
3121
3122         * gencode.c (SDBBP,DERET): Added (3900) insns.
3123         (RFE): Turn on for 3900.
3124         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3125         (dsstate): Made global.
3126         (SUBTARGET_R3900): Added.
3127         (CANCELDELAYSLOT): New.
3128         (SignalException): Ignore SystemCall rather than ignore and
3129         terminate.  Add DebugBreakPoint handling.
3130         (decode_coproc): New insns RFE, DERET; and new registers Debug
3131         and DEPC protected by SUBTARGET_R3900.
3132         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3133         bits explicitly.
3134         * Makefile.in,configure.in: Add mips subtarget option.
3135         * configure: Update.
3136
3137 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
3138
3139         * gencode.c: Add r3900 (tx39).
3140
3141
3142 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
3143
3144         * gencode.c (build_instruction): Don't need to subtract 4 for
3145         JALR, just 2.
3146
3147 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
3148
3149         * interp.c: Correct some HASFPU problems.
3150
3151 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3152
3153         * configure: Regenerated to track ../common/aclocal.m4 changes.
3154
3155 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3156
3157         * interp.c (mips_options): Fix samples option short form, should
3158         be `x'.
3159
3160 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3161
3162         * interp.c (sim_info): Enable info code.  Was just returning.
3163
3164 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3165
3166         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3167         MFC0.
3168
3169 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3170
3171         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3172         constants.
3173         (build_instruction): Ditto for LL.
3174
3175 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
3176
3177         * configure: Regenerated to track ../common/aclocal.m4 changes.
3178
3179 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3180
3181         * configure: Regenerated to track ../common/aclocal.m4 changes.
3182         * config.in: Ditto.
3183
3184 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3185
3186         * interp.c (sim_open): Add call to sim_analyze_program, update
3187         call to sim_config.
3188
3189 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3190
3191         * interp.c (sim_kill): Delete.
3192         (sim_create_inferior): Add ABFD argument. Set PC from same.
3193         (sim_load): Move code initializing trap handlers from here.
3194         (sim_open): To here.
3195         (sim_load): Delete, use sim-hload.c.
3196
3197         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3198
3199 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3200
3201         * configure: Regenerated to track ../common/aclocal.m4 changes.
3202         * config.in: Ditto.
3203
3204 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3205
3206         * interp.c (sim_open): Add ABFD argument.
3207         (sim_load): Move call to sim_config from here.
3208         (sim_open): To here.  Check return status.
3209
3210 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
3211
3212         * gencode.c (build_instruction): Two arg MADD should
3213         not assign result to $0.
3214
3215 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
3216
3217         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3218         * sim/mips/configure.in: Regenerate.
3219
3220 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
3221
3222         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3223         signed8, unsigned8 et.al. types.
3224
3225         * interp.c (SUB_REG_FETCH): Handle both little and big endian
3226         hosts when selecting subreg.
3227
3228 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
3229
3230         * interp.c (sim_engine_run): Reset the ZERO register to zero
3231         regardless of FEATURE_WARN_ZERO.
3232         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3233
3234 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3235
3236         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3237         (SignalException): For BreakPoints ignore any mode bits and just
3238         save the PC.
3239         (SignalException): Always set the CAUSE register.
3240
3241 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3242
3243         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3244         exception has been taken.
3245
3246         * interp.c: Implement the ERET and mt/f sr instructions.
3247
3248 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3249
3250         * interp.c (SignalException): Don't bother restarting an
3251         interrupt.
3252
3253 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3254
3255         * interp.c (SignalException): Really take an interrupt.
3256         (interrupt_event): Only deliver interrupts when enabled.
3257
3258 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3259
3260         * interp.c (sim_info): Only print info when verbose.
3261         (sim_info) Use sim_io_printf for output.
3262
3263 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3264
3265         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3266         mips architectures.
3267
3268 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3269
3270         * interp.c (sim_do_command): Check for common commands if a
3271         simulator specific command fails.
3272
3273 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
3274
3275         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3276         and simBE when DEBUG is defined.
3277
3278 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3279
3280         * interp.c (interrupt_event): New function.  Pass exception event
3281         onto exception handler.
3282
3283         * configure.in: Check for stdlib.h.
3284         * configure: Regenerate.
3285
3286         * gencode.c (build_instruction): Add UNUSED attribute to tempS
3287         variable declaration.
3288         (build_instruction): Initialize memval1.
3289         (build_instruction): Add UNUSED attribute to byte, bigend,
3290         reverse.
3291         (build_operands): Ditto.
3292
3293         * interp.c: Fix GCC warnings.
3294         (sim_get_quit_code): Delete.
3295
3296         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3297         * Makefile.in: Ditto.
3298         * configure: Re-generate.
3299
3300         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3301
3302 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3303
3304         * interp.c (mips_option_handler): New function parse argumes using
3305         sim-options.
3306         (myname): Replace with STATE_MY_NAME.
3307         (sim_open): Delete check for host endianness - performed by
3308         sim_config.
3309         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3310         (sim_open): Move much of the initialization from here.
3311         (sim_load): To here.  After the image has been loaded and
3312         endianness set.
3313         (sim_open): Move ColdReset from here.
3314         (sim_create_inferior): To here.
3315         (sim_open): Make FP check less dependant on host endianness.
3316
3317         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3318         run.
3319         * interp.c (sim_set_callbacks): Delete.
3320
3321         * interp.c (membank, membank_base, membank_size): Replace with
3322         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3323         (sim_open): Remove call to callback->init. gdb/run do this.
3324
3325         * interp.c: Update
3326
3327         * sim-main.h (SIM_HAVE_FLATMEM): Define.
3328
3329         * interp.c (big_endian_p): Delete, replaced by
3330         current_target_byte_order.
3331
3332 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3333
3334         * interp.c (host_read_long, host_read_word, host_swap_word,
3335         host_swap_long): Delete. Using common sim-endian.
3336         (sim_fetch_register, sim_store_register): Use H2T.
3337         (pipeline_ticks): Delete.  Handled by sim-events.
3338         (sim_info): Update.
3339         (sim_engine_run): Update.
3340
3341 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3342
3343         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3344         reason from here.
3345         (SignalException): To here. Signal using sim_engine_halt.
3346         (sim_stop_reason): Delete, moved to common.
3347
3348 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
3349
3350         * interp.c (sim_open): Add callback argument.
3351         (sim_set_callbacks): Delete SIM_DESC argument.
3352         (sim_size): Ditto.
3353
3354 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3355
3356         * Makefile.in (SIM_OBJS): Add common modules.
3357
3358         * interp.c (sim_set_callbacks): Also set SD callback.
3359         (set_endianness, xfer_*, swap_*): Delete.
3360         (host_read_word, host_read_long, host_swap_word, host_swap_long):
3361         Change to functions using sim-endian macros.
3362         (control_c, sim_stop): Delete, use common version.
3363         (simulate): Convert into.
3364         (sim_engine_run): This function.
3365         (sim_resume): Delete.
3366
3367         * interp.c (simulation): New variable - the simulator object.
3368         (sim_kind): Delete global - merged into simulation.
3369         (sim_load): Cleanup.  Move PC assignment from here.
3370         (sim_create_inferior): To here.
3371
3372         * sim-main.h: New file.
3373         * interp.c (sim-main.h): Include.
3374
3375 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
3376
3377         * configure: Regenerated to track ../common/aclocal.m4 changes.
3378
3379 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
3380
3381         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3382
3383 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
3384
3385         * gencode.c (build_instruction): DIV instructions: check
3386         for division by zero and integer overflow before using
3387         host's division operation.
3388
3389 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
3390
3391         * Makefile.in (SIM_OBJS): Add sim-load.o.
3392         * interp.c: #include bfd.h.
3393         (target_byte_order): Delete.
3394         (sim_kind, myname, big_endian_p): New static locals.
3395         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
3396         after argument parsing.  Recognize -E arg, set endianness accordingly.
3397         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
3398         load file into simulator.  Set PC from bfd.
3399         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
3400         (set_endianness): Use big_endian_p instead of target_byte_order.
3401
3402 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
3403
3404         * interp.c (sim_size): Delete prototype - conflicts with
3405         definition in remote-sim.h.  Correct definition.
3406
3407 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3408
3409         * configure: Regenerated to track ../common/aclocal.m4 changes.
3410         * config.in: Ditto.
3411
3412 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
3413
3414         * interp.c (sim_open): New arg `kind'.
3415
3416         * configure: Regenerated to track ../common/aclocal.m4 changes.
3417
3418 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3419
3420         * configure: Regenerated to track ../common/aclocal.m4 changes.
3421
3422 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
3423
3424         * interp.c (sim_open): Set optind to 0 before calling getopt.
3425
3426 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3427
3428         * configure: Regenerated to track ../common/aclocal.m4 changes.
3429
3430 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
3431
3432         * interp.c : Replace uses of pr_addr with pr_uword64
3433         where the bit length is always 64 independent of SIM_ADDR.
3434         (pr_uword64) : added.
3435
3436 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
3437
3438         * configure: Re-generate.
3439
3440 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
3441
3442         * configure: Regenerate to track ../common/aclocal.m4 changes.
3443
3444 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
3445
3446         * interp.c (sim_open): New SIM_DESC result.  Argument is now
3447         in argv form.
3448         (other sim_*): New SIM_DESC argument.
3449
3450 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
3451
3452         * interp.c: Fix printing of addresses for non-64-bit targets.
3453         (pr_addr): Add function to print address based on size.
3454
3455 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
3456
3457         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3458
3459 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
3460
3461         * gencode.c (build_mips16_operands): Correct computation of base
3462         address for extended PC relative instruction.
3463
3464 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
3465
3466         * interp.c (mips16_entry): Add support for floating point cases.
3467         (SignalException): Pass floating point cases to mips16_entry.
3468         (ValueFPR): Don't restrict fmt_single and fmt_word to even
3469         registers.
3470         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
3471         or fmt_word.
3472         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3473         and then set the state to fmt_uninterpreted.
3474         (COP_SW): Temporarily set the state to fmt_word while calling
3475         ValueFPR.
3476
3477 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
3478
3479         * gencode.c (build_instruction): The high order may be set in the
3480         comparison flags at any ISA level, not just ISA 4.
3481
3482 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
3483
3484         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3485         COMMON_{PRE,POST}_CONFIG_FRAG instead.
3486         * configure.in: sinclude ../common/aclocal.m4.
3487         * configure: Regenerated.
3488
3489 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
3490
3491         * configure: Rebuild after change to aclocal.m4.
3492
3493 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
3494
3495         * configure configure.in Makefile.in:  Update to new configure
3496         scheme which is more compatible with WinGDB builds.
3497         * configure.in:  Improve comment on how to run autoconf.
3498         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
3499         * Makefile.in:  Use autoconf substitution to install common
3500         makefile fragment.
3501
3502 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
3503
3504         * gencode.c (build_instruction): Use BigEndianCPU instead of
3505         ByteSwapMem.
3506
3507 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
3508
3509         * interp.c (sim_monitor): Make output to stdout visible in
3510         wingdb's I/O log window.
3511
3512 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
3513
3514         * support.h: Undo previous change to SIGTRAP
3515         and SIGQUIT values.
3516
3517 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
3518
3519         * interp.c (store_word, load_word): New static functions.
3520         (mips16_entry): New static function.
3521         (SignalException): Look for mips16 entry and exit instructions.
3522         (simulate): Use the correct index when setting fpr_state after
3523         doing a pending move.
3524
3525 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
3526
3527         * interp.c: Fix byte-swapping code throughout to work on
3528         both little- and big-endian hosts.
3529
3530 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
3531
3532         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3533         with gdb/config/i386/xm-windows.h.
3534
3535 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
3536
3537         * gencode.c (build_instruction): Work around MSVC++ code gen bug
3538         that messes up arithmetic shifts.
3539
3540 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
3541
3542         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
3543         SIGTRAP and SIGQUIT for _WIN32.
3544
3545 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
3546
3547         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3548         force a 64 bit multiplication.
3549         (build_instruction) [OR]: In mips16 mode, don't do anything if the
3550         destination register is 0, since that is the default mips16 nop
3551         instruction.
3552
3553 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
3554
3555         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3556         (build_endian_shift): Don't check proc64.
3557         (build_instruction): Always set memval to uword64.  Cast op2 to
3558         uword64 when shifting it left in memory instructions.  Always use
3559         the same code for stores--don't special case proc64.
3560
3561         * gencode.c (build_mips16_operands): Fix base PC value for PC
3562         relative operands.
3563         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3564         jal instruction.
3565         * interp.c (simJALDELAYSLOT): Define.
3566         (JALDELAYSLOT): Define.
3567         (INDELAYSLOT, INJALDELAYSLOT): Define.
3568         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3569
3570 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
3571
3572         * interp.c (sim_open): add flush_cache as a PMON routine
3573         (sim_monitor): handle flush_cache by ignoring it
3574
3575 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
3576
3577         * gencode.c (build_instruction): Use !ByteSwapMem instead of
3578         BigEndianMem.
3579         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3580         (BigEndianMem): Rename to ByteSwapMem and change sense.
3581         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3582         BigEndianMem references to !ByteSwapMem.
3583         (set_endianness): New function, with prototype.
3584         (sim_open): Call set_endianness.
3585         (sim_info): Use simBE instead of BigEndianMem.
3586         (xfer_direct_word, xfer_direct_long, swap_direct_word,
3587         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3588         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3589         ifdefs, keeping the prototype declaration.
3590         (swap_word): Rewrite correctly.
3591         (ColdReset): Delete references to CONFIG.  Delete endianness related
3592         code; moved to set_endianness.
3593
3594 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
3595
3596         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3597         * interp.c (CHECKHILO): Define away.
3598         (simSIGINT): New macro.
3599         (membank_size): Increase from 1MB to 2MB.
3600         (control_c): New function.
3601         (sim_resume): Rename parameter signal to signal_number.  Add local
3602         variable prev.  Call signal before and after simulate.
3603         (sim_stop_reason): Add simSIGINT support.
3604         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3605         functions always.
3606         (sim_warning): Delete call to SignalException.  Do call printf_filtered
3607         if logfh is NULL.
3608         (AddressTranslation): Add #ifdef DEBUG around debugging message and
3609         a call to sim_warning.
3610
3611 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
3612
3613         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3614         16 bit instructions.
3615
3616 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3617
3618         Add support for mips16 (16 bit MIPS implementation):
3619         * gencode.c (inst_type): Add mips16 instruction encoding types.
3620         (GETDATASIZEINSN): Define.
3621         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
3622         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
3623         mtlo.
3624         (MIPS16_DECODE): New table, for mips16 instructions.
3625         (bitmap_val): New static function.
3626         (struct mips16_op): Define.
3627         (mips16_op_table): New table, for mips16 operands.
3628         (build_mips16_operands): New static function.
3629         (process_instructions): If PC is odd, decode a mips16
3630         instruction.  Break out instruction handling into new
3631         build_instruction function.
3632         (build_instruction): New static function, broken out of
3633         process_instructions.  Check modifiers rather than flags for SHIFT
3634         bit count and m[ft]{hi,lo} direction.
3635         (usage): Pass program name to fprintf.
3636         (main): Remove unused variable this_option_optind.  Change
3637         ``*loptarg++'' to ``loptarg++''.
3638         (my_strtoul): Parenthesize && within ||.
3639         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3640         (simulate): If PC is odd, fetch a 16 bit instruction, and
3641         increment PC by 2 rather than 4.
3642         * configure.in: Add case for mips16*-*-*.
3643         * configure: Rebuild.
3644
3645 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
3646
3647         * interp.c: Allow -t to enable tracing in standalone simulator.
3648         Fix garbage output in trace file and error messages.
3649
3650 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
3651
3652         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3653         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3654         * configure.in: Simplify using macros in ../common/aclocal.m4.
3655         * configure: Regenerated.
3656         * tconfig.in: New file.
3657
3658 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
3659
3660         * interp.c: Fix bugs in 64-bit port.
3661         Use ansi function declarations for msvc compiler.
3662         Initialize and test file pointer in trace code.
3663         Prevent duplicate definition of LAST_EMED_REGNUM.
3664
3665 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
3666
3667         * interp.c (xfer_big_long): Prevent unwanted sign extension.
3668
3669 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
3670
3671         * interp.c (SignalException): Check for explicit terminating
3672         breakpoint value.
3673         * gencode.c: Pass instruction value through SignalException()
3674         calls for Trap, Breakpoint and Syscall.
3675
3676 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3677
3678         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3679         only used on those hosts that provide it.
3680         * configure.in: Add sqrt() to list of functions to be checked for.
3681         * config.in: Re-generated.
3682         * configure: Re-generated.
3683
3684 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3685
3686         * gencode.c (process_instructions): Call build_endian_shift when
3687         expanding STORE RIGHT, to fix swr.
3688         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3689         clear the high bits.
3690         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3691         Fix float to int conversions to produce signed values.
3692
3693 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
3694
3695         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3696         (process_instructions): Correct handling of nor instruction.
3697         Correct shift count for 32 bit shift instructions. Correct sign
3698         extension for arithmetic shifts to not shift the number of bits in
3699         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
3700         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
3701         Fix madd.
3702         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3703         It's OK to have a mult follow a mult.  What's not OK is to have a
3704         mult follow an mfhi.
3705         (Convert): Comment out incorrect rounding code.
3706
3707 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
3708
3709         * interp.c (sim_monitor): Improved monitor printf
3710         simulation. Tidied up simulator warnings, and added "--log" option
3711         for directing warning message output.
3712         * gencode.c: Use sim_warning() rather than WARNING macro.
3713
3714 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
3715
3716         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3717         getopt1.o, rather than on gencode.c.  Link objects together.
3718         Don't link against -liberty.
3719         (gencode.o, getopt.o, getopt1.o): New targets.
3720         * gencode.c: Include <ctype.h> and "ansidecl.h".
3721         (AND): Undefine after including "ansidecl.h".
3722         (ULONG_MAX): Define if not defined.
3723         (OP_*): Don't define macros; now defined in opcode/mips.h.
3724         (main): Call my_strtoul rather than strtoul.
3725         (my_strtoul): New static function.
3726
3727 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
3728
3729         * gencode.c (process_instructions):  Generate word64 and uword64
3730         instead of `long long' and `unsigned long long' data types.
3731         * interp.c:  #include sysdep.h to get signals, and define default
3732         for SIGBUS.
3733         * (Convert):  Work around for Visual-C++ compiler bug with type
3734         conversion.
3735         * support.h:  Make things compile under Visual-C++ by using
3736         __int64 instead of `long long'.  Change many refs to long long
3737         into word64/uword64 typedefs.
3738
3739 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
3740
3741         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
3742         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
3743         (docdir): Removed.
3744         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
3745         (AC_PROG_INSTALL): Added.
3746         (AC_PROG_CC): Moved to before configure.host call.
3747         * configure: Rebuilt.
3748
3749 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
3750
3751         * configure.in: Define @SIMCONF@ depending on mips target.
3752         * configure: Rebuild.
3753         * Makefile.in (run): Add @SIMCONF@ to control simulator
3754         construction.
3755         * gencode.c: Change LOADDRMASK to 64bit memory model only.
3756         * interp.c: Remove some debugging, provide more detailed error
3757         messages, update memory accesses to use LOADDRMASK.
3758
3759 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
3760
3761         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
3762         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
3763         stamp-h.
3764         * configure: Rebuild.
3765         * config.in: New file, generated by autoheader.
3766         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3767         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3768         HAVE_ANINT and HAVE_AINT, as appropriate.
3769         * Makefile.in (run): Use @LIBS@ rather than -lm.
3770         (interp.o): Depend upon config.h.
3771         (Makefile): Just rebuild Makefile.
3772         (clean): Remove stamp-h.
3773         (mostlyclean): Make the same as clean, not as distclean.
3774         (config.h, stamp-h): New targets.
3775
3776 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3777
3778         * interp.c (ColdReset): Fix boolean test. Make all simulator
3779         globals static.
3780
3781 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3782
3783         * interp.c (xfer_direct_word, xfer_direct_long,
3784         swap_direct_word, swap_direct_long, xfer_big_word,
3785         xfer_big_long, xfer_little_word, xfer_little_long,
3786         swap_word,swap_long): Added.
3787         * interp.c (ColdReset): Provide function indirection to
3788         host<->simulated_target transfer routines.
3789         * interp.c (sim_store_register, sim_fetch_register): Updated to
3790         make use of indirected transfer routines.
3791
3792 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3793
3794         * gencode.c (process_instructions): Ensure FP ABS instruction
3795         recognised.
3796         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3797         system call support.
3798
3799 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3800
3801         * interp.c (sim_do_command): Complain if callback structure not
3802         initialised.
3803
3804 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3805
3806         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3807         support for Sun hosts.
3808         * Makefile.in (gencode): Ensure the host compiler and libraries
3809         used for cross-hosted build.
3810
3811 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3812
3813         * interp.c, gencode.c: Some more (TODO) tidying.
3814
3815 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3816
3817         * gencode.c, interp.c: Replaced explicit long long references with
3818         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3819         * support.h (SET64LO, SET64HI): Macros added.
3820
3821 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3822
3823         * configure: Regenerate with autoconf 2.7.
3824
3825 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3826
3827         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3828         * support.h: Remove superfluous "1" from #if.
3829         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3830
3831 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3832
3833         * interp.c (StoreFPR): Control UndefinedResult() call on
3834         WARN_RESULT manifest.
3835
3836 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3837
3838         * gencode.c: Tidied instruction decoding, and added FP instruction
3839         support.
3840
3841         * interp.c: Added dineroIII, and BSD profiling support. Also
3842         run-time FP handling.
3843
3844 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3845
3846         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3847         gencode.c, interp.c, support.h: created.