1 2021-07-01 Mike Frysinger <vapier@gentoo.org>
3 * configure.ac: Delete SIM_AC_OPTION_RESERVED_BITS call.
4 * aclocal.m4: Regenerate.
5 * configure: Regenerate.
7 2021-06-30 Mike Frysinger <vapier@gentoo.org>
9 * configure: Regenerate.
11 2021-06-22 Mike Frysinger <vapier@gentoo.org>
13 * configure: Regenerate.
15 2021-06-21 Mike Frysinger <vapier@gentoo.org>
17 * aclocal.m4: Regenerate.
18 * configure: Regenerate.
20 2021-06-21 Mike Frysinger <vapier@gentoo.org>
22 * Makefile.in (SIM_EXTRA_HW_DEVICES): Define.
23 * configure.ac (SIM_AC_OPTION_HARDWARE): Delete call.
24 * configure: Regenerate.
26 2021-06-20 Mike Frysinger <vapier@gentoo.org>
28 * configure.ac (SIM_AC_COMMON): Delete.
29 * aclocal.m4, configure: Regenerate.
31 2021-06-20 Mike Frysinger <vapier@gentoo.org>
33 * aclocal.m4: Regenerate.
34 * configure: Regenerate.
36 2021-06-19 Mike Frysinger <vapier@gentoo.org>
38 * aclocal.m4: Regenerate.
39 * configure: Regenerate.
41 2021-06-19 Mike Frysinger <vapier@gentoo.org>
43 * configure.ac: Delete AC_PATH_X call.
44 * configure: Regenerate.
46 2021-06-19 Mike Frysinger <vapier@gentoo.org>
48 * configure.ac: Delete AC_CHECK_LIB calls.
49 * configure: Regenerate.
51 2021-06-18 Mike Frysinger <vapier@gentoo.org>
53 * aclocal.m4, configure: Regenerate.
55 2021-06-18 Mike Frysinger <vapier@gentoo.org>
57 * Makefile.in (SIM_WERROR_CFLAGS): New variable.
58 * configure.ac: Delete call to SIM_AC_OPTION_WARNINGS.
59 * configure: Regenerate.
61 2021-06-18 Mike Frysinger <vapier@gentoo.org>
63 * interp.c: Include sim-signal.h.
65 2021-06-17 Mike Frysinger <vapier@gentoo.org>
67 * configure.ac: Delete SIM_AC_OPTION_ENDIAN call.
68 * aclocal.m4, configure: Regenerate.
70 2021-06-16 Mike Frysinger <vapier@gentoo.org>
72 * interp.c (dotrace): Make comment const.
73 * sim-main.h (dotrace): Likewise. Add ATTRIBUTE_PRINTF.
75 2021-06-16 Mike Frysinger <vapier@gentoo.org>
77 * interp.c (sim_monitor): Change ap type to address_word*.
78 (_P, P): New macros. Rewrite dynamic printf logic to use these.
80 2021-06-16 Mike Frysinger <vapier@gentoo.org>
82 * dv-tx3904sio.c (tx3904sio_fifo_push): Change next_buf to
85 2021-06-16 Mike Frysinger <vapier@gentoo.org>
87 * dv-tx3904irc.c (tx3904irc_io_write_buffer): Initialize
90 2021-06-16 Mike Frysinger <vapier@gentoo.org>
92 * configure: Regenerate.
94 2021-06-16 Mike Frysinger <vapier@gentoo.org>
96 * interp.c (sim_open): Change %lx to %x and PRIx macros.
98 2021-06-16 Mike Frysinger <vapier@gentoo.org>
100 * configure: Regenerate.
101 * config.in: Removed.
103 2021-06-15 Mike Frysinger <vapier@gentoo.org>
105 * config.in, configure: Regenerate.
107 2021-06-12 Mike Frysinger <vapier@gentoo.org>
109 * configure.ac: Delete call to SIM_AC_OPTION_ALIGNMENT.
111 2021-06-12 Mike Frysinger <vapier@gentoo.org>
113 * aclocal.m4, config.in, configure: Regenerate.
115 2021-06-12 Mike Frysinger <vapier@gentoo.org>
117 * configure.ac: Delete call to AC_CHECK_FUNCS.
118 * config.in, configure: Regenerate.
120 2021-06-08 Mike Frysinger <vapier@gentoo.org>
122 * Makefile.in: Replace $(IGEN) with $(IGEN_RUN) and ../igen/igen
125 2021-05-29 Mike Frysinger <vapier@gentoo.org>
127 * interp.c [!HAVE_DV_SOCKSER] (sockser_addr): Define to NULL.
129 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
131 * interp.c (sim_open): Add shadow mappings from 32-bit
132 address space to 64-bit sign-extended address space.
134 2021-05-22 Faraz Shahbazker <fshahbazker@wavecomp.com>
136 * interp.c (sim_create_inferior): Only truncate sign extension
137 bits for 32-bit target models.
139 2021-05-17 Mike Frysinger <vapier@gentoo.org>
141 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Delete.
143 2021-05-17 Mike Frysinger <vapier@gentoo.org>
145 * interp.c (sim_open): Switch to sim_state_alloc_extra.
146 * micromips.igen: Change SD to mips_sim_state.
147 * micromipsrun.c (sim_engine_run): Likewise.
148 * sim-main.h (SIM_HAVE_COMMON_SIM_STATE): Define.
149 (watch_options_install): Delete.
150 (struct swatch): Delete.
151 (struct sim_state): Delete.
152 (struct mips_sim_state): New struct.
153 (MIPS_SIM_STATE): Define.
155 2021-05-16 Mike Frysinger <vapier@gentoo.org>
157 * interp.c: Replace config.h include with defs.h.
158 * cp1.c, dsp.c, dv-tx3904cpu.c, dv-tx3904irc.c, dv-tx3904sio.c,
159 dv-tx3904tmr.c, m16run.c, mdmx.c, micromipsrun.c, sim-main.c:
162 2021-05-16 Mike Frysinger <vapier@gentoo.org>
164 * config.in, configure: Regenerate.
166 2021-05-14 Mike Frysinger <vapier@gentoo.org>
168 * interp.c: Update include path.
170 2021-05-04 Mike Frysinger <vapier@gentoo.org>
172 * dv-tx3904sio.c: Include stdlib.h.
174 2021-05-04 Mike Frysinger <vapier@gentoo.org>
176 * configure.ac (hw_extra_devices): Inline contents into
177 SIM_AC_OPTION_HARDWARE and delete.
178 * configure: Regenerate.
180 2021-05-04 Mike Frysinger <vapier@gentoo.org>
182 * Makefile.in (SIM_IGEN_OBJ): Change @mips_igen_engine@ to engine.o.
183 (MIPS_EXTRA_LIB, SIM_EXTRA_LIBS): Delete.
184 * configure.ac (mips_igen_engine, mips_extra_libs): Delete.
185 * configure: Regenerate.
187 2021-05-04 Mike Frysinger <vapier@gentoo.org>
189 * mdmx.c (qh_acc): Change 2nd AccAddAQH to AccAddLQH.
191 2021-05-04 Mike Frysinger <vapier@gentoo.org>
193 * configure: Regenerate.
195 2021-05-01 Mike Frysinger <vapier@gentoo.org>
197 * cp1.c (store_fcr): Mark static.
199 2021-05-01 Mike Frysinger <vapier@gentoo.org>
201 * config.in, configure: Regenerate.
203 2021-04-23 Mike Frysinger <vapier@gentoo.org>
205 * configure.ac (hw_enabled): Delete.
206 (SIM_AC_OPTION_HARDWARE): Delete first two args.
207 * configure: Regenerate.
209 2021-04-22 Tom Tromey <tom@tromey.com>
211 * configure, config.in: Rebuild.
213 2021-04-22 Tom Tromey <tom@tromey.com>
215 * Makefile.in (interp.o, m16run.o, micromipsrun.o, multi-run.o):
217 (SIM_EXTRA_DEPS): New variable.
219 2021-04-22 Tom Tromey <tom@tromey.com>
221 * configure: Rebuild.
223 2021-04-21 Mike Frysinger <vapier@gentoo.org>
225 * aclocal.m4: Regenerate.
227 2021-04-21 Simon Marchi <simon.marchi@polymtl.ca>
229 * configure: Regenerate.
231 2021-04-18 Mike Frysinger <vapier@gentoo.org>
233 * configure: Regenerate.
235 2021-04-12 Mike Frysinger <vapier@gentoo.org>
237 * interp.c (sim_open): Delete 3rd arg to sim_cpu_alloc_all.
239 2021-04-08 Simon Marchi <simon.marchi@polymtl.ca>
241 * Makefile.in: Set ASAN_OPTIONS when running igen.
243 2021-04-04 Steve Ellcey <sellcey@mips.com>
244 Faraz Shahbazker <fshahbazker@wavecomp.com>
246 * interp.c (sim_monitor): Add switch entries for unlink (13),
247 lseek (14), and stat (15).
249 2021-04-02 Mike Frysinger <vapier@gentoo.org>
251 * Makefile.in (../igen/igen): Delete rule.
252 (tmp-igen, tmp-m16, tmp-micromips): Delete ../igen make.
254 2021-04-02 Mike Frysinger <vapier@gentoo.org>
256 * aclocal.m4, configure: Regenerate.
258 2021-02-28 Mike Frysinger <vapier@gentoo.org>
260 * configure: Regenerate.
262 2021-02-27 Mike Frysinger <vapier@gentoo.org>
264 * Makefile.in (SIM_EXTRA_ALL): Delete.
267 2021-02-21 Mike Frysinger <vapier@gentoo.org>
269 * configure.ac (AC_CONFIG_MACRO_DIRS): Replace common with m4.
270 * aclocal.m4, configure: Regenerate.
272 2021-02-13 Mike Frysinger <vapier@gentoo.org>
274 * configure.ac: Replace sinclude with AC_CONFIG_MACRO_DIRS.
275 * aclocal.m4, configure: Regenerate.
277 2021-02-06 Mike Frysinger <vapier@gentoo.org>
279 * interp.c (sim_open): Delete call to STATE_WATCHPOINTS.
281 2021-02-06 Mike Frysinger <vapier@gentoo.org>
283 * configure: Regenerate.
285 2021-01-30 Mike Frysinger <vapier@gentoo.org>
287 * interp.c (sim_open): Delete STATE_WATCHPOINTS (sd)->sizeof_pc.
289 2021-01-11 Mike Frysinger <vapier@gentoo.org>
291 * config.in, configure: Regenerate.
292 * interp.c: Delete HAVE_STRING_H, HAVE_STRINGS_H, HAVE_STDLIB_H,
293 and strings.h include.
295 2021-01-09 Mike Frysinger <vapier@gentoo.org>
297 * configure: Regenerate.
299 2021-01-09 Mike Frysinger <vapier@gentoo.org>
301 * configure.ac (SIM_AC_OPTION_WARNINGS): Pass "no".
302 * configure: Regenerate.
304 2021-01-08 Mike Frysinger <vapier@gentoo.org>
306 * configure: Regenerate.
308 2021-01-04 Mike Frysinger <vapier@gentoo.org>
310 * configure: Regenerate.
312 2020-12-31 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
314 * sim-main.c: Include <stdlib.h>.
316 2020-12-14 Pavel I. Kryukov <kryukov@frtk.ru> (tiny change)
318 * cp1.c: Include <stdlib.h>.
320 2020-07-29 Simon Marchi <simon.marchi@efficios.com>
322 * configure: Re-generate.
324 2017-09-06 John Baldwin <jhb@FreeBSD.org>
326 * configure: Regenerate.
328 2016-11-11 Mike Frysinger <vapier@gentoo.org>
331 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu
334 2016-11-11 Mike Frysinger <vapier@gentoo.org>
337 * mips.igen (check_u64): Enable for `r3900'.
339 2016-02-05 Mike Frysinger <vapier@gentoo.org>
341 * configure.ac (sim_engine_run): Change sd->base.prog_bfd to
343 * configure: Regenerate.
345 2016-01-18 Andrew Bennett <andrew.bennett@imgtec.com>
346 Maciej W. Rozycki <macro@imgtec.com>
349 * micromips.igen (delayslot_micromips): Enable for `micromips32',
350 `micromips64' and `micromipsdsp' only.
351 (process_isa_mode): Enable for `micromips32' and `micromips64' only.
352 (do_micromips_jalr, do_micromips_jal): Likewise.
353 (compute_movep_src_reg): Likewise.
354 (compute_andi16_imm): Likewise.
355 (convert_fmt_micromips): Likewise.
356 (convert_fmt_micromips_cvt_d): Likewise.
357 (convert_fmt_micromips_cvt_s): Likewise.
358 (FMT_MICROMIPS): Likewise.
359 (FMT_MICROMIPS_CVT_D): Likewise.
360 (FMT_MICROMIPS_CVT_S): Likewise.
362 2016-01-12 Mike Frysinger <vapier@gentoo.org>
364 * interp.c: Include elf-bfd.h.
365 (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is
368 2016-01-10 Mike Frysinger <vapier@gentoo.org>
370 * config.in, configure: Regenerate.
372 2016-01-10 Mike Frysinger <vapier@gentoo.org>
374 * configure: Regenerate.
376 2016-01-10 Mike Frysinger <vapier@gentoo.org>
378 * configure: Regenerate.
380 2016-01-10 Mike Frysinger <vapier@gentoo.org>
382 * configure: Regenerate.
384 2016-01-10 Mike Frysinger <vapier@gentoo.org>
386 * configure: Regenerate.
388 2016-01-10 Mike Frysinger <vapier@gentoo.org>
390 * configure.ac (SIM_AC_OPTION_SMP): Delete call.
391 * configure: Regenerate.
393 2016-01-10 Mike Frysinger <vapier@gentoo.org>
395 * configure.ac (SIM_AC_OPTION_INLINE): Delete call.
396 * configure: Regenerate.
398 2016-01-10 Mike Frysinger <vapier@gentoo.org>
400 * configure: Regenerate.
402 2016-01-10 Mike Frysinger <vapier@gentoo.org>
404 * configure: Regenerate.
406 2016-01-09 Mike Frysinger <vapier@gentoo.org>
408 * config.in, configure: Regenerate.
410 2016-01-06 Mike Frysinger <vapier@gentoo.org>
412 * interp.c (sim_open): Mark argv const.
413 (sim_create_inferior): Mark argv and env const.
415 2016-01-04 Mike Frysinger <vapier@gentoo.org>
417 * configure: Regenerate.
419 2016-01-03 Mike Frysinger <vapier@gentoo.org>
421 * interp.c (sim_open): Update sim_parse_args comment.
423 2016-01-03 Mike Frysinger <vapier@gentoo.org>
425 * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete.
426 * configure: Regenerate.
428 2016-01-02 Mike Frysinger <vapier@gentoo.org>
430 * configure.ac (mips_endian): Change LITTLE_ENDIAN to LITTLE.
431 (default_endian): Likewise. Change BIG_ENDIAN to BIG.
432 * configure: Regenerate.
433 * sim-main.h (BigEndianMem): Change BIG_ENDIAN to BFD_ENDIAN_BIG.
435 2016-01-02 Mike Frysinger <vapier@gentoo.org>
437 * dv-tx3904cpu.c (CPU, SD): Delete.
439 2015-12-30 Mike Frysinger <vapier@gentoo.org>
441 * wrapper.c (mips_reg_store, mips_reg_fetch): Define.
442 (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE.
443 (sim_store_register): Rename to ...
444 (mips_reg_store): ... this. Delete local cpu var.
445 Update sim_io_eprintf calls.
446 (sim_fetch_register): Rename to ...
447 (mips_reg_fetch): ... this. Delete local cpu var.
448 Update sim_io_eprintf calls.
450 2015-12-27 Mike Frysinger <vapier@gentoo.org>
452 * Makefile.in (SIM_OBJS): Delete sim-hload.o.
454 2015-12-26 Mike Frysinger <vapier@gentoo.org>
456 * config.in, configure: Regenerate.
458 2015-12-26 Mike Frysinger <vapier@gentoo.org>
460 * interp.c (sim_write, sim_read): Delete.
461 (store_word): Delete call to AddressTranslation and set paddr=vaddr.
462 (load_word): Likewise.
463 * micromips.igen (cache): Likewise.
464 * mips.igen (do_ll, do_lld, do_sc, do_scd, do_suxc1_32, do_swc1,
465 do_swxc1, cache, do_load, do_load_left, do_load_right, do_store,
466 do_store_left, do_store_right, do_load_double, do_store_double):
468 (do_pref): Delete call to AddressTranslation and stub out Prefetch.
469 (do_prefx): Likewise.
470 * sim-main.c (address_translation, prefetch): Delete.
471 (ifetch32, ifetch16): Delete call to AddressTranslation and set
473 * sim-main.h (Uncached, CachedNoncoherent, CachedCoherent, Cached,
474 address_translation, AddressTranslation, prefetch, Prefetch): Delete.
475 (LoadMemory, StoreMemory): Delete CCA arg.
477 2015-12-24 Mike Frysinger <vapier@gentoo.org>
479 * configure.ac (SIM_SUBTARGET): Drop -DTARGET_TX3904=1.
480 * configure: Regenerated.
482 2015-12-24 Mike Frysinger <vapier@gentoo.org>
484 * sim-main.h (SIM_QUIET_NAN_NEGATED): Move from tconfig.h.
487 2015-12-24 Mike Frysinger <vapier@gentoo.org>
489 * tconfig.h (SIM_HANDLES_LMA): Delete.
491 2015-12-24 Mike Frysinger <vapier@gentoo.org>
493 * sim-main.h (WITH_WATCHPOINTS): Delete.
495 2015-12-24 Mike Frysinger <vapier@gentoo.org>
497 * interp.c [SIM_HAVE_FLATMEM] (sim_open): Delete flatmem code.
499 2015-12-24 Mike Frysinger <vapier@gentoo.org>
501 * tconfig.h (SIM_HAVE_SIMCACHE): Delete.
503 2015-12-15 Dominik Vogt <vogt@linux.vnet.ibm.com>
505 * micromips.igen (process_isa_mode): Fix left shift of negative
508 2015-11-17 Mike Frysinger <vapier@gentoo.org>
510 * sim-main.h (WITH_MODULO_MEMORY): Delete.
512 2015-11-15 Mike Frysinger <vapier@gentoo.org>
514 * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o.
516 2015-11-14 Mike Frysinger <vapier@gentoo.org>
518 * interp.c (sim_close): Rename to ...
519 (mips_sim_close): ... this. Delete calls to sim_module_uninstall and
521 * sim-main.h (mips_sim_close): Declare.
522 (SIM_CLOSE_HOOK): Define.
524 2015-09-25 Andrew Bennett <andrew.bennett@imgtec.com>
525 Ali Lown <ali.lown@imgtec.com>
527 * Makefile.in (tmp-micromips): New rule.
528 (tmp-mach-multi): Add support for micromips.
529 * configure.ac (mips*-sde-elf* | mips*-mti-elf*): Made a multi sim
530 that works for both mips64 and micromips64.
531 (mipsisa32r2*-*-*): Made a multi sim that works for mips32 and
533 Add build support for micromips.
534 * dsp.igen (do_ph_s_absq, do_w_s_absq, do_qb_s_absq, do_addsc,
535 do_addwc, do_bitrev, do_extpv, do_extrv, do_extrv_s_h, do_insv,
536 do_lxx do_modsub, do_mthlip, do_mulsaq_s_w_ph, do_ph_packrl, do_qb_pick
537 do_ph_pick, do_qb_ph_precequ, do_qb_ph_preceu, do_w_preceq
538 do_w_ph_precrq, do_ph_qb_precrq, do_w_ph_rs_precrq do_qb_w_raddu,
539 do_rddsp, do_repl, do_shilov, do_ph_shl, do_qb_shl do_w_s_shllv,
540 do_ph_shrlv, do_w_r_shrav, do_wrdsp, do_qb_shrav, do_append,
541 do_balign, do_ph_w_mulsa, do_ph_qb_precr, do_prepend): New functions.
542 Refactored instruction code to use these functions.
543 * dsp2.igen: Refactored instruction code to use the new functions.
544 * interp.c (decode_coproc): Refactored to work with any instruction
546 (isa_mode): New variable
547 (RSVD_INSTRUCTION): Changed to 0x00000039.
548 * m16.igen (BREAK16): Refactored instruction to use do_break16.
549 (JALX32): Add mips32, mips64, mips32r2 and mips64r2 models.
550 * micromips.dc: New file.
551 * micromips.igen: New file.
552 * micromips16.dc: New file.
553 * micromipsdsp.igen: New file.
554 * micromipsrun.c: New file.
555 * mips.igen (do_swc1): Changed to work with any instruction encoding.
556 (do_add do_addi do_andi do_dadd do_daddi do_dsll32 do_dsra32
557 do_dsrl32, do_dsub, do_break, do_break16, do_clo, do_clz, do_dclo,
558 do_dclz, do_lb, do_lh, do_lwr, do_lwl, do_lwc, do_lw, do_lwu, do_lhu,
559 do_ldc, do_lbu, do_ll, do_lld, do_lui, do_madd, do_dsp_madd, do_maddu,
560 do_dsp_maddu, do_dsp_mfhi, do_dsp_mflo, do_movn, do_movz, do_msub,
561 do_dsp_msub, do_msubu, do_dsp_msubu, do_mthi, do_dsp_mthi, do_mtlo,
562 do_dsp_mtlo, do_mul, do_dsp_mult, do_dsp_multu, do_pref, do_sc,
563 do_scd, do_sub, do_sw, do_teq, do_teqi, do_tge, do_tgei, do_tgeiu,
564 do_tgeu, do_tlt do_tlti, do_tltiu, do_tltu, do_tne, do_tnei, do_abs_fmt,
565 do_add_fmt, do_alnv_ps, do_c_cond_fmt, do_ceil_fmt, do_cfc1, do_ctc1,
566 do_cvt_d_fmt, do_cvt_l_fmt, do_cvt_ps_s, do_cvt_s_fmt, do_cvt_s_pl,
567 do_cvt_s_pu, do_cvt_w_fmt, do_div_fmt, do_dmfc1b, do_dmtc1b, do_floor_fmt,
568 do_luxc1_32, do_luxc1_64, do_lwc1, do_lwxc1, do_madd_fmt, do_mfc1b,
569 do_mov_fmt, do_movtf, do_movtf_fmt, do_movn_fmt, do_movz_fmt, do_msub_fmt,
570 do_mtc1b, do_mul_fmt, do_neg_fmt, do_nmadd_fmt, do_nmsub_fmt, do_pll_ps,
571 do_plu_ps, do_pul_ps, do_puu_ps, do_recip_fmt, do_round_fmt, do_rsqrt_fmt,
572 do_prefx, do_sdc1, do_suxc1_32, do_suxc1_64, do_sqrt_fmt, do_sub_fmt,
573 do_swc1, do_swxc1, do_trunc_fmt): New functions, refactored from existing
575 Refactored instruction code to use these functions.
576 (RSVD): Changed to use new reserved instruction.
577 (loadstore_ea, not_word_value, unpredictable, check_mt_hilo,
578 check_mf_hilo, check_mult_hilo, check_div_hilo, check_u64, do_luxc1_32,
579 do_sdc1, do_suxc1_32, check_fmt_p, check_fpu, do_load_double,
580 do_store_double): Added micromips32 and micromips64 models.
581 Added include for micromips.igen and micromipsdsp.igen
582 Add micromips32 and micromips64 models.
583 (DecodeCoproc): Updated to use new macro definition.
584 * mips3264r2.igen (do_dsbh, do_dshd, do_dext, do_dextm, do_dextu, do_di,
585 do_dins, do_dinsm, do_ei, do_ext, do_mfhc1, do_mthc1, do_ins, do_dinsu,
586 do_seb, do_seh do_rdhwr, do_wsbh): New functions.
587 Refactored instruction code to use these functions.
588 * sim-main.h (CP0_operation): New enum.
589 (DecodeCoproc): Updated macro.
590 (IMEM32_MICROMIPS, IMEM16_MICROMIPS, MICROMIPS_MINOR_OPCODE,
591 MICROMIPS_DELAYSLOT_SIZE_ANY, MICROMIPS_DELAYSLOT_SIZE_16,
592 MICROMIPS_DELAYSLOT_SIZE_32, ISA_MODE_MIPS32 and
593 ISA_MODE_MICROMIPS): New defines.
594 (sim_state): Add isa_mode field.
596 2015-06-23 Mike Frysinger <vapier@gentoo.org>
598 * configure: Regenerate.
600 2015-06-12 Mike Frysinger <vapier@gentoo.org>
602 * configure.ac: Change configure.in to configure.ac.
603 * configure: Regenerate.
605 2015-06-12 Mike Frysinger <vapier@gentoo.org>
607 * configure: Regenerate.
609 2015-06-12 Mike Frysinger <vapier@gentoo.org>
611 * interp.c [TRACE]: Delete.
612 (TRACE): Change to WITH_TRACE_ANY_P.
613 [!WITH_TRACE_ANY_P] (open_trace): Define.
614 (mips_option_handler, open_trace, sim_close, dotrace):
615 Change defined(TRACE) to WITH_TRACE_ANY_P.
616 (sim_open): Delete TRACE ifdef check.
617 * sim-main.c (load_memory): Delete TRACE ifdef check.
618 (store_memory): Likewise.
619 * sim-main.h [WITH_TRACE_ANY_P] (dotrace, tracefh): Protect decls.
620 [!WITH_TRACE_ANY_P] (dotrace): Define.
622 2015-04-18 Mike Frysinger <vapier@gentoo.org>
624 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESTART_HOOK): Delete
627 2015-04-18 Mike Frysinger <vapier@gentoo.org>
629 * sim-main.h (SIM_CPU): Delete.
631 2015-04-18 Mike Frysinger <vapier@gentoo.org>
633 * sim-main.h (sim_cia): Delete.
635 2015-04-17 Mike Frysinger <vapier@gentoo.org>
637 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Change CIA_GET to
639 * interp.c (interrupt_event): Change CIA_GET to CPU_PC_GET.
640 (sim_create_inferior): Change CIA_SET to CPU_PC_SET.
641 * m16run.c (sim_engine_run): Change CIA_GET to CPU_PC_GET and
642 CIA_SET to CPU_PC_SET.
643 * sim-main.h (CIA_GET, CIA_SET): Delete.
645 2015-04-15 Mike Frysinger <vapier@gentoo.org>
647 * Makefile.in (SIM_OBJS): Delete sim-cpu.o.
648 * sim-main.h (STATE_CPU): Delete.
650 2015-04-13 Mike Frysinger <vapier@gentoo.org>
652 * configure: Regenerate.
654 2015-04-13 Mike Frysinger <vapier@gentoo.org>
656 * Makefile.in (SIM_OBJS): Add sim-cpu.o.
657 * interp.c (mips_pc_get, mips_pc_set): New functions.
658 (sim_open): Declare new local var i. Call sim_cpu_alloc_all.
659 Call CPU_PC_FETCH & CPU_PC_STORE for all cpus.
660 (sim_pc_get): Delete.
661 * sim-main.h (SIM_CPU): Define.
662 (struct sim_state): Change cpu to an array of pointers.
665 2015-04-13 Mike Frysinger <vapier@gentoo.org>
667 * interp.c (mips_option_handler, open_trace, sim_close,
668 sim_write, sim_read, sim_store_register, sim_fetch_register,
669 sim_create_inferior, pr_addr, pr_uword64): Convert old style
671 (sim_open): Convert old style prototype. Change casts with
672 sim_write to unsigned char *.
673 (fetch_str): Change null to unsigned char, and change cast to
675 (sim_monitor): Change c & ch to unsigned char. Change cast to
678 2015-04-12 Mike Frysinger <vapier@gentoo.org>
680 * Makefile.in (SIM_OBJS): Move interp.o to the start of the list.
682 2015-04-06 Mike Frysinger <vapier@gentoo.org>
684 * Makefile.in (SIM_OBJS): Delete sim-engine.o.
686 2015-04-01 Mike Frysinger <vapier@gentoo.org>
688 * tconfig.h (SIM_HAVE_PROFILE): Delete.
690 2015-03-31 Mike Frysinger <vapier@gentoo.org>
692 * config.in, configure: Regenerate.
694 2015-03-24 Mike Frysinger <vapier@gentoo.org>
696 * interp.c (sim_pc_get): New function.
698 2015-03-24 Mike Frysinger <vapier@gentoo.org>
700 * sim-main.h (SIM_HAVE_BIENDIAN): Delete.
701 * tconfig.h (SIM_HAVE_BIENDIAN): Delete.
703 2015-03-24 Mike Frysinger <vapier@gentoo.org>
705 * configure: Regenerate.
707 2015-03-23 Mike Frysinger <vapier@gentoo.org>
709 * configure: Regenerate.
711 2015-03-23 Mike Frysinger <vapier@gentoo.org>
713 * configure: Regenerate.
714 * configure.ac (mips_extra_objs): Delete.
715 * Makefile.in (MIPS_EXTRA_OBJS): Delete.
716 (SIM_OBJS): Delete MIPS_EXTRA_OBJS.
718 2015-03-23 Mike Frysinger <vapier@gentoo.org>
720 * configure: Regenerate.
721 * configure.ac: Delete sim_hw checks for dv-sockser.
723 2015-03-16 Mike Frysinger <vapier@gentoo.org>
725 * config.in, configure: Regenerate.
726 * tconfig.in: Rename file ...
727 * tconfig.h: ... here.
729 2015-03-15 Mike Frysinger <vapier@gentoo.org>
731 * tconfig.in: Delete includes.
732 [HAVE_DV_SOCKSER]: Delete.
734 2015-03-14 Mike Frysinger <vapier@gentoo.org>
736 * Makefile.in (SIM_RUN_OBJS): Delete.
738 2015-03-14 Mike Frysinger <vapier@gentoo.org>
740 * configure.ac (AC_CHECK_HEADERS): Delete.
741 * aclocal.m4, configure: Regenerate.
743 2014-08-19 Alan Modra <amodra@gmail.com>
745 * configure: Regenerate.
747 2014-08-15 Roland McGrath <mcgrathr@google.com>
749 * configure: Regenerate.
750 * config.in: Regenerate.
752 2014-03-04 Mike Frysinger <vapier@gentoo.org>
754 * configure: Regenerate.
756 2013-09-23 Alan Modra <amodra@gmail.com>
758 * configure: Regenerate.
760 2013-06-03 Mike Frysinger <vapier@gentoo.org>
762 * aclocal.m4, configure: Regenerate.
764 2013-05-10 Freddie Chopin <freddie_chopin@op.pl>
766 * configure: Rebuild.
768 2013-03-26 Mike Frysinger <vapier@gentoo.org>
770 * configure: Regenerate.
772 2013-03-23 Joel Sherrill <joel.sherrill@oarcorp.com>
774 * configure.ac: Address use of dv-sockser.o.
775 * tconfig.in: Conditionalize use of dv_sockser_install.
776 * configure: Regenerated.
777 * config.in: Regenerated.
779 2012-10-04 Chao-ying Fu <fu@mips.com>
780 Steve Ellcey <sellcey@mips.com>
782 * mips/mips3264r2.igen (rdhwr): New.
784 2012-09-03 Joel Sherrill <joel.sherrill@oarcorp.com>
786 * configure.ac: Always link against dv-sockser.o.
787 * configure: Regenerate.
789 2012-06-15 Joel Brobecker <brobecker@adacore.com>
791 * config.in, configure: Regenerate.
793 2012-05-18 Nick Clifton <nickc@redhat.com>
796 * interp.c: Include config.h before system header files.
798 2012-03-24 Mike Frysinger <vapier@gentoo.org>
800 * aclocal.m4, config.in, configure: Regenerate.
802 2011-12-03 Mike Frysinger <vapier@gentoo.org>
804 * aclocal.m4: New file.
805 * configure: Regenerate.
807 2011-10-19 Mike Frysinger <vapier@gentoo.org>
809 * configure: Regenerate after common/acinclude.m4 update.
811 2011-10-17 Mike Frysinger <vapier@gentoo.org>
813 * configure.ac: Change include to common/acinclude.m4.
815 2011-10-17 Mike Frysinger <vapier@gentoo.org>
817 * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER
818 call. Replace common.m4 include with SIM_AC_COMMON.
819 * configure: Regenerate.
821 2011-07-08 Hans-Peter Nilsson <hp@axis.com>
823 * Makefile.in ($(SIM_MULTI_OBJ)): Depend on sim-main.h
825 (tmp-mach-multi): Exit early when igen fails.
827 2011-07-05 Mike Frysinger <vapier@gentoo.org>
829 * interp.c (sim_do_command): Delete.
831 2011-02-14 Mike Frysinger <vapier@gentoo.org>
833 * dv-tx3904sio.c (tx3904sio_fifo_push): Change zfree to free.
834 (tx3904sio_fifo_reset): Likewise.
835 * interp.c (sim_monitor): Likewise.
837 2010-04-14 Mike Frysinger <vapier@gentoo.org>
839 * interp.c (sim_write): Add const to buffer arg.
841 2010-01-18 Masaki Muranaka <monaka@monami-software.com> (tiny change)
843 * interp.c: Don't include sysdep.h
845 2010-01-09 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
847 * configure: Regenerate.
849 2009-08-22 Ralf Wildenhues <Ralf.Wildenhues@gmx.de>
851 * config.in: Regenerate.
852 * configure: Likewise.
854 * configure: Regenerate.
856 2008-07-11 Hans-Peter Nilsson <hp@axis.com>
858 * configure: Regenerate to track ../common/common.m4 changes.
861 2008-06-06 Vladimir Prus <vladimir@codesourcery.com>
862 Daniel Jacobowitz <dan@codesourcery.com>
863 Joseph Myers <joseph@codesourcery.com>
865 * configure: Regenerate.
867 2007-10-22 Richard Sandiford <rsandifo@nildram.co.uk>
869 * mips.igen (check_fmt_p): Provide a separate mips32r2 definition
870 that unconditionally allows fmt_ps.
871 (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL, CVT.S.PU)
872 (FLOOR.L.fmt, LWXC1, MADD.fmt, MSUB.fmt, NMADD.fmt, NMSUB.fmt)
873 (PLL.PS, PLU.PS, PUL.PS, PUU.PS, ROUND.L.fmt, TRUNC.L.fmt): Change
874 filter from 64,f to 32,f.
875 (PREFX): Change filter from 64 to 32.
876 (LDXC1, LUXC1): Provide separate mips32r2 implementations
877 that use do_load_double instead of do_load. Make both LUXC1
878 versions unpredictable if SizeFGR () != 64.
879 (SDXC1, SUXC1): Extend to mips32r2, using do_store_double
880 instead of do_store. Remove unused variable. Make both SUXC1
881 versions unpredictable if SizeFGR () != 64.
883 2007-10-07 Richard Sandiford <rsandifo@nildram.co.uk>
885 * mips.igen (ll): Fix mask for WITH_TARGET_WORD_BITSIZE == 32.
886 (sc, swxc1): Likewise. Also fix big-endian and reverse-endian
887 shifts for that case.
889 2007-09-04 Nick Clifton <nickc@redhat.com>
891 * interp.c (options enum): Add OPTION_INFO_MEMORY.
892 (display_mem_info): New static variable.
893 (mips_option_handler): Handle OPTION_INFO_MEMORY.
894 (mips_options): Add info-memory and memory-info.
895 (sim_open): After processing the command line and board
896 specification, check display_mem_info. If it is set then
897 call the real handler for the --memory-info command line
900 2007-08-24 Joel Brobecker <brobecker@adacore.com>
902 * configure.ac: Change license of multi-run.c to GPL version 3.
903 * configure: Regenerate.
905 2007-06-28 Richard Sandiford <richard@codesourcery.com>
907 * configure.ac, configure: Revert last patch.
909 2007-06-26 Richard Sandiford <richard@codesourcery.com>
911 * configure.ac (sim_mipsisa3264_configs): New variable.
912 (mipsis32*-*-, mipsisa32r2*-*-*, mips64*-*-*, mips64r2*-*-*): Make
913 every configuration support all four targets, using the triplet to
914 determine the default.
915 * configure: Regenerate.
917 2007-06-25 Richard Sandiford <richard@codesourcery.com>
919 * Makefile.in (m16run.o): New rule.
921 2007-05-15 Thiemo Seufer <ths@mips.com>
923 * mips3264r2.igen (DSHD): Fix compile warning.
925 2007-05-14 Thiemo Seufer <ths@mips.com>
927 * mips.igen (ALNV.PS, CEIL.L.fmt, CVT.L.fmt, CVT.PS.S, CVT.S.PL,
928 CVT.S.PU, FLOOR.L.fmt, LDXC1, LUXC1, LWXC1, MADD.fmt, MSUB.fmt,
929 NMADD.fmt, NMSUB.fmt, PLL.PS, PLU.PS, PREFX, PUL.PS, PUU.PS,
930 RECIP.fmt, ROUND.L.fmt, RSQRT.fmt, SWXC1, TRUNC.L.fmt): Add support
933 2007-03-01 Thiemo Seufer <ths@mips.com>
935 * mips.igen (MFHI, MFLO, MTHI, MTLO): Restore support for mips32
938 2007-02-20 Thiemo Seufer <ths@mips.com>
940 * dsp.igen: Update copyright notice.
941 * dsp2.igen: Fix copyright notice.
943 2007-02-20 Thiemo Seufer <ths@mips.com>
944 Chao-Ying Fu <fu@mips.com>
946 * Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
947 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
948 Add dsp2 to sim_igen_machine.
949 * configure: Regenerate.
950 * dsp.igen (do_ph_op): Add MUL support when op = 2.
951 (do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
952 (mulq_rs.ph): Use do_ph_mulq.
953 (MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
954 * mips.igen: Add dsp2 model and include dsp2.igen.
955 (MFHI, MFLO, MTHI, MTLO): Extend these instructions for
956 for *mips32r2, *mips64r2, *dsp.
957 (MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
958 for *mips32r2, *mips64r2, *dsp2.
959 * dsp2.igen: New file for MIPS DSP REV 2 ASE.
961 2007-02-19 Thiemo Seufer <ths@mips.com>
962 Nigel Stephens <nigel@mips.com>
964 * mips.igen (jalr.hb, jr.hb): Add decoder for mip32r2/mips64r2
965 jumps with hazard barrier.
967 2007-02-19 Thiemo Seufer <ths@mips.com>
968 Nigel Stephens <nigel@mips.com>
970 * interp.c (sim_monitor): Flush stdout and stderr file descriptors
971 after each call to sim_io_write.
973 2007-02-19 Thiemo Seufer <ths@mips.com>
974 Nigel Stephens <nigel@mips.com>
976 * interp.c (ColdReset): Set CP0 Config0 to reflect the address size
977 supported by this simulator.
978 (decode_coproc): Recognise additional CP0 Config registers
981 2007-02-19 Thiemo Seufer <ths@mips.com>
982 Nigel Stephens <nigel@mips.com>
983 David Ung <davidu@mips.com>
985 * cp1.c (value_fpr): Don't inherit existing FPR_STATE for
986 uninterpreted formats. If fmt is one of the uninterpreted types
987 don't update the FPR_STATE. Handle fmt_uninterpreted_32 like
988 fmt_word, and fmt_uninterpreted_64 like fmt_long.
989 (store_fpr): When writing an invalid odd register, set the
990 matching even register to fmt_unknown, not the following register.
991 * interp.c (sim_open): If STATE_MEM_SIZE isn't set then set it to
992 the the memory window at offset 0 set by --memory-size command
994 (sim_store_register): Handle storing 4 bytes to an 8 byte floating
996 (sim_fetch_register): Likewise for reading 4 bytes from an 8 byte
998 (sim_monitor): When returning the memory size to the MIPS
999 application, use the value in STATE_MEM_SIZE, not an arbitrary
1001 (cop_lw): Don' mess around with FPR_STATE, just pass
1002 fmt_uninterpreted_32 to StoreFPR.
1003 (cop_sw): Similarly.
1004 (cop_ld): Pass fmt_uninterpreted_64 not fmt_uninterpreted.
1005 (cop_sd): Similarly.
1006 * mips.igen (not_word_value): Single version for mips32, mips64
1009 2007-02-19 Thiemo Seufer <ths@mips.com>
1010 Nigel Stephens <nigel@mips.com>
1012 * interp.c (MEM_SIZE): Increase default memory size from 2 to 8
1015 2007-02-17 Thiemo Seufer <ths@mips.com>
1017 * configure.ac (mips*-sde-elf*): Move in front of generic machine
1019 * configure: Regenerate.
1021 2007-02-17 Thiemo Seufer <ths@mips.com>
1023 * configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
1024 Add mdmx to sim_igen_machine.
1025 (mipsisa64*-*-*): Likewise. Remove dsp.
1026 (mipsisa32*-*-*): Remove dsp.
1027 * configure: Regenerate.
1029 2007-02-13 Thiemo Seufer <ths@mips.com>
1031 * configure.ac: Add mips*-sde-elf* target.
1032 * configure: Regenerate.
1034 2006-12-21 Hans-Peter Nilsson <hp@axis.com>
1036 * acconfig.h: Remove.
1037 * config.in, configure: Regenerate.
1039 2006-11-07 Thiemo Seufer <ths@mips.com>
1041 * dsp.igen (do_w_op): Fix compiler warning.
1043 2006-08-29 Thiemo Seufer <ths@mips.com>
1044 David Ung <davidu@mips.com>
1046 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
1048 * configure: Regenerate.
1049 * mips.igen (model): Add smartmips.
1050 (MADDU): Increment ACX if carry.
1051 (do_mult): Clear ACX.
1052 (ROR,RORV): Add smartmips.
1053 (include): Include smartmips.igen.
1054 * sim-main.h (ACX): Set to REGISTERS[89].
1055 * smartmips.igen: New file.
1057 2006-08-29 Thiemo Seufer <ths@mips.com>
1058 David Ung <davidu@mips.com>
1060 * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
1061 mips3264r2.igen. Add missing dependency rules.
1062 * m16e.igen: Support for mips16e save/restore instructions.
1064 2006-06-13 Richard Earnshaw <rearnsha@arm.com>
1066 * configure: Regenerated.
1068 2006-06-05 Daniel Jacobowitz <dan@codesourcery.com>
1070 * configure: Regenerated.
1072 2006-05-31 Daniel Jacobowitz <dan@codesourcery.com>
1074 * configure: Regenerated.
1076 2006-05-15 Chao-ying Fu <fu@mips.com>
1078 * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
1080 2006-04-18 Nick Clifton <nickc@redhat.com>
1082 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
1085 2006-03-29 Hans-Peter Nilsson <hp@axis.com>
1087 * configure: Regenerate.
1089 2005-12-14 Chao-ying Fu <fu@mips.com>
1091 * Makefile.in (SIM_OBJS): Add dsp.o.
1092 (dsp.o): New dependency.
1093 (IGEN_INCLUDE): Add dsp.igen.
1094 * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
1095 mipsisa64*-*-*): Add dsp to sim_igen_machine.
1096 * configure: Regenerate.
1097 * mips.igen: Add dsp model and include dsp.igen.
1098 (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
1099 because these instructions are extended in DSP ASE.
1100 * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
1101 adding 6 DSP accumulator registers and 1 DSP control register.
1102 (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
1103 AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
1104 DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
1105 DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
1106 DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
1107 DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
1108 DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
1109 DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
1110 DSPCR_CCOND_SMASK): New define.
1111 (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
1112 * dsp.c, dsp.igen: New files for MIPS DSP ASE.
1114 2005-07-08 Ian Lance Taylor <ian@airs.com>
1116 * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
1118 2005-06-16 David Ung <davidu@mips.com>
1119 Nigel Stephens <nigel@mips.com>
1121 * mips.igen: New mips16e model and include m16e.igen.
1122 (check_u64): Add mips16e tag.
1123 * m16e.igen: New file for MIPS16e instructions.
1124 * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
1125 mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
1127 * configure: Regenerate.
1129 2005-05-26 David Ung <davidu@mips.com>
1131 * mips.igen (mips32r2, mips64r2): New ISA models. Add new model
1132 tags to all instructions which are applicable to the new ISAs.
1133 (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
1135 * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
1137 * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
1139 * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
1140 * configure: Regenerate.
1142 2005-03-23 Mark Kettenis <kettenis@gnu.org>
1144 * configure: Regenerate.
1146 2005-01-14 Andrew Cagney <cagney@gnu.org>
1148 * configure.ac: Sinclude aclocal.m4 before common.m4. Add
1149 explicit call to AC_CONFIG_HEADER.
1150 * configure: Regenerate.
1152 2005-01-12 Andrew Cagney <cagney@gnu.org>
1154 * configure.ac: Update to use ../common/common.m4.
1155 * configure: Re-generate.
1157 2005-01-11 Andrew Cagney <cagney@localhost.localdomain>
1159 * configure: Regenerated to track ../common/aclocal.m4 changes.
1161 2005-01-07 Andrew Cagney <cagney@gnu.org>
1163 * configure.ac: Rename configure.in, require autoconf 2.59.
1164 * configure: Re-generate.
1166 2004-12-08 Hans-Peter Nilsson <hp@axis.com>
1168 * configure: Regenerate for ../common/aclocal.m4 update.
1170 2004-09-24 Monika Chaddha <monika@acmet.com>
1172 Committed by Andrew Cagney.
1173 * m16.igen (CMP, CMPI): Fix assembler.
1175 2004-08-18 Chris Demetriou <cgd@broadcom.com>
1177 * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
1178 * configure: Regenerate.
1180 2004-06-25 Chris Demetriou <cgd@broadcom.com>
1182 * configure.in (sim_m16_machine): Include mipsIII.
1183 * configure: Regenerate.
1185 2004-05-11 Maciej W. Rozycki <macro@ds2.pg.gda.pl>
1187 * mips/interp.c (decode_coproc): Sign-extend the address retrieved
1189 * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
1191 2004-04-10 Chris Demetriou <cgd@broadcom.com>
1193 * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
1195 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1197 * mips.igen (check_fmt): Remove.
1198 (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
1199 (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
1200 (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
1201 (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
1202 (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
1203 (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
1204 (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1205 (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
1206 (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
1207 (C.cnd.fmta): Remove incorrect call to check_fmt_p.
1209 2004-04-09 Chris Demetriou <cgd@broadcom.com>
1211 * sb1.igen (check_sbx): New function.
1212 (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
1214 2004-03-29 Chris Demetriou <cgd@broadcom.com>
1215 Richard Sandiford <rsandifo@redhat.com>
1217 * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
1218 (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
1219 * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
1220 separate implementations for mipsIV and mipsV. Use new macros to
1221 determine whether the restrictions apply.
1223 2004-01-19 Chris Demetriou <cgd@broadcom.com>
1225 * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
1226 (check_mult_hilo): Improve comments.
1227 (check_div_hilo): Likewise. Also, fork off a new version
1228 to handle mips32/mips64 (since there are no hazards to check
1231 2003-06-17 Richard Sandiford <rsandifo@redhat.com>
1233 * mips.igen (do_dmultx): Fix check for negative operands.
1235 2003-05-16 Ian Lance Taylor <ian@airs.com>
1237 * Makefile.in (SHELL): Make sure this is defined.
1238 (various): Use $(SHELL) whenever we invoke move-if-change.
1240 2003-05-03 Chris Demetriou <cgd@broadcom.com>
1242 * cp1.c: Tweak attribution slightly.
1245 * mdmx.igen: Likewise.
1246 * mips3d.igen: Likewise.
1247 * sb1.igen: Likewise.
1249 2003-04-15 Richard Sandiford <rsandifo@redhat.com>
1251 * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
1254 2003-02-27 Andrew Cagney <cagney@redhat.com>
1256 * interp.c (sim_open): Rename _bfd to bfd.
1257 (sim_create_inferior): Ditto.
1259 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1261 * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
1263 2003-01-14 Chris Demetriou <cgd@broadcom.com>
1265 * mips.igen (EI, DI): Remove.
1267 2003-01-05 Richard Sandiford <rsandifo@redhat.com>
1269 * Makefile.in (tmp-run-multi): Fix mips16 filter.
1271 2003-01-04 Richard Sandiford <rsandifo@redhat.com>
1272 Andrew Cagney <ac131313@redhat.com>
1273 Gavin Romig-Koch <gavin@redhat.com>
1274 Graydon Hoare <graydon@redhat.com>
1275 Aldy Hernandez <aldyh@redhat.com>
1276 Dave Brolley <brolley@redhat.com>
1277 Chris Demetriou <cgd@broadcom.com>
1279 * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
1280 (sim_mach_default): New variable.
1281 (mips64vr-*-*, mips64vrel-*-*): New configurations.
1282 Add a new simulator generator, MULTI.
1283 * configure: Regenerate.
1284 * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
1285 (multi-run.o): New dependency.
1286 (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
1287 (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
1288 (tmp-multi): Combine them.
1289 (BUILT_SRC_FROM_MULTI): New variable. Depend on tmp-multi.
1290 (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
1291 (distclean-extra): New rule.
1292 * sim-main.h: Include bfd.h.
1293 (MIPS_MACH): New macro.
1294 * mips.igen (vr4120, vr5400, vr5500): New models.
1295 (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
1296 * vr.igen: Replace with new version.
1298 2003-01-04 Chris Demetriou <cgd@broadcom.com>
1300 * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
1301 * configure: Regenerate.
1303 2002-12-31 Chris Demetriou <cgd@broadcom.com>
1305 * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
1306 * mips.igen: Remove all invocations of check_branch_bug and
1309 2002-12-16 Chris Demetriou <cgd@broadcom.com>
1311 * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
1313 2002-07-30 Chris Demetriou <cgd@broadcom.com>
1315 * mips.igen (do_load_double, do_store_double): New functions.
1316 (LDC1, SDC1): Rename to...
1317 (LDC1b, SDC1b): respectively.
1318 (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
1320 2002-07-29 Michael Snyder <msnyder@redhat.com>
1322 * cp1.c (fp_recip2): Modify initialization expression so that
1323 GCC will recognize it as constant.
1325 2002-06-18 Chris Demetriou <cgd@broadcom.com>
1327 * mdmx.c (SD_): Delete.
1328 (Unpredictable): Re-define, for now, to directly invoke
1329 unpredictable_action().
1330 (mdmx_acc_op): Fix error in .ob immediate handling.
1332 2002-06-18 Andrew Cagney <cagney@redhat.com>
1334 * interp.c (sim_firmware_command): Initialize `address'.
1336 2002-06-16 Andrew Cagney <ac131313@redhat.com>
1338 * configure: Regenerated to track ../common/aclocal.m4 changes.
1340 2002-06-14 Chris Demetriou <cgd@broadcom.com>
1341 Ed Satterthwaite <ehs@broadcom.com>
1343 * mips3d.igen: New file which contains MIPS-3D ASE instructions.
1344 * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
1345 * mips.igen: Include mips3d.igen.
1346 (mips3d): New model name for MIPS-3D ASE instructions.
1347 (CVT.W.fmt): Don't use this instruction for word (source) format
1349 * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
1350 (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
1351 (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
1352 (NR_FRAC_GUARD, IMPLICIT_1): New macros.
1353 * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
1354 (RSquareRoot1, RSquareRoot2): New macros.
1355 (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
1356 (fp_rsqrt2): New functions.
1357 * configure.in: Add MIPS-3D support to mipsisa64 simulator.
1358 * configure: Regenerate.
1360 2002-06-13 Chris Demetriou <cgd@broadcom.com>
1361 Ed Satterthwaite <ehs@broadcom.com>
1363 * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
1364 (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
1365 (fp_inv_sqrt, fpu_format_name): Add paired-single support.
1366 (convert): Note that this function is not used for paired-single
1368 (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
1369 * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
1370 (check_fmt_p): Enable paired-single support.
1371 (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
1372 (PUU.PS): New instructions.
1373 (CVT.S.fmt): Don't use this instruction for paired-single format
1375 * sim-main.h (FP_formats): New value 'fmt_ps.'
1376 (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
1377 (PSLower, PSUpper, PackPS, ConvertPS): New macros.
1379 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1381 * mips.igen: Fix formatting of function calls in
1384 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1386 * mips.igen (MOVN, MOVZ): Trace result.
1387 (TNEI): Print "tnei" as the opcode name in traces.
1388 (CEIL.W): Add disassembly string for traces.
1389 (RSQRT.fmt): Make location of disassembly string consistent
1390 with other instructions.
1392 2002-06-12 Chris Demetriou <cgd@broadcom.com>
1394 * mips.igen (X): Delete unused function.
1396 2002-06-08 Andrew Cagney <cagney@redhat.com>
1398 * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
1400 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1401 Ed Satterthwaite <ehs@broadcom.com>
1403 * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
1404 (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
1405 * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
1406 (fp_nmsub): New prototypes.
1407 (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
1408 (NegMultiplySub): New defines.
1409 * mips.igen (RSQRT.fmt): Use RSquareRoot().
1410 (MADD.D, MADD.S): Replace with...
1411 (MADD.fmt): New instruction.
1412 (MSUB.D, MSUB.S): Replace with...
1413 (MSUB.fmt): New instruction.
1414 (NMADD.D, NMADD.S): Replace with...
1415 (NMADD.fmt): New instruction.
1416 (NMSUB.D, MSUB.S): Replace with...
1417 (NMSUB.fmt): New instruction.
1419 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1420 Ed Satterthwaite <ehs@broadcom.com>
1422 * cp1.c: Fix more comment spelling and formatting.
1423 (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
1424 (denorm_mode): New function.
1425 (fpu_unary, fpu_binary): Round results after operation, collect
1426 status from rounding operations, and update the FCSR.
1427 (convert): Collect status from integer conversions and rounding
1428 operations, and update the FCSR. Adjust NaN values that result
1429 from conversions. Convert to use sim_io_eprintf rather than
1430 fprintf, and remove some debugging code.
1431 * cp1.h (fenr_FS): New define.
1433 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1435 * cp1.c (convert): Remove unusable debugging code, and move MIPS
1436 rounding mode to sim FP rounding mode flag conversion code into...
1437 (rounding_mode): New function.
1439 2002-06-07 Chris Demetriou <cgd@broadcom.com>
1441 * cp1.c: Clean up formatting of a few comments.
1442 (value_fpr): Reformat switch statement.
1444 2002-06-06 Chris Demetriou <cgd@broadcom.com>
1445 Ed Satterthwaite <ehs@broadcom.com>
1448 * sim-main.h: Include cp1.h.
1449 (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
1450 (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
1451 (FP_RM_TOMINF, GETRM): Remove. Moved to cp1.h.
1452 (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
1453 (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
1454 (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
1455 * cp1.c: Don't include sim-fpu.h; already included by
1456 sim-main.h. Clean up formatting of some comments.
1457 (NaN, Equal, Less): Remove.
1458 (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
1459 (fp_cmp): New functions.
1460 * mips.igen (do_c_cond_fmt): Remove.
1461 (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
1462 Compare. Add result tracing.
1463 (CxC1): Remove, replace with...
1464 (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
1465 (DMxC1): Remove, replace with...
1466 (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
1467 (MxC1): Remove, replace with...
1468 (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
1470 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1472 * sim-main.h (FGRIDX): Remove, replace all uses with...
1473 (FGR_BASE): New macro.
1474 (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
1475 (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
1476 (NR_FGR, FGR): Likewise.
1477 * interp.c: Replace all uses of FGRIDX with FGR_BASE.
1478 * mips.igen: Likewise.
1480 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1482 * cp1.c: Add an FSF Copyright notice to this file.
1484 2002-06-04 Chris Demetriou <cgd@broadcom.com>
1485 Ed Satterthwaite <ehs@broadcom.com>
1487 * cp1.c (Infinity): Remove.
1488 * sim-main.h (Infinity): Likewise.
1490 * cp1.c (fp_unary, fp_binary): New functions.
1491 (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
1492 (fp_sqrt): New functions, implemented in terms of the above.
1493 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1494 (Recip, SquareRoot): Remove (replaced by functions above).
1495 * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
1496 (fp_recip, fp_sqrt): New prototypes.
1497 (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
1498 (Recip, SquareRoot): Replace prototypes with #defines which
1499 invoke the functions above.
1501 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1503 * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
1504 (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
1505 file, remove PARAMS from prototypes.
1506 (value_fpr, store_fpr, convert): Likewise. Use SIM_STATE to provide
1507 simulator state arguments.
1508 (ValueFPR, StoreFPR, Convert): Move lower in file. Use SIM_ARGS to
1509 pass simulator state arguments.
1510 * cp1.c (SD): Redefine as CPU_STATE(cpu).
1511 (store_fpr, convert): Remove 'sd' argument.
1512 (value_fpr): Likewise. Convert to use 'SD' instead.
1514 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1516 * cp1.c (Min, Max): Remove #if 0'd functions.
1517 * sim-main.h (Min, Max): Remove.
1519 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1521 * cp1.c: fix formatting of switch case and default labels.
1522 * interp.c: Likewise.
1523 * sim-main.c: Likewise.
1525 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1527 * cp1.c: Clean up comments which describe FP formats.
1528 (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
1530 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1531 Ed Satterthwaite <ehs@broadcom.com>
1533 * configure.in (mipsisa64sb1*-*-*): New target for supporting
1534 Broadcom SiByte SB-1 processor configurations.
1535 * configure: Regenerate.
1536 * sb1.igen: New file.
1537 * mips.igen: Include sb1.igen.
1539 * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
1540 * mdmx.igen: Add "sb1" model to all appropriate functions and
1542 * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
1543 (ob_func, ob_acc): Reference the above.
1544 (qh_acc): Adjust to keep the same size as ob_acc.
1545 * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
1546 (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
1548 2002-06-03 Chris Demetriou <cgd@broadcom.com>
1550 * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
1552 2002-06-02 Chris Demetriou <cgd@broadcom.com>
1553 Ed Satterthwaite <ehs@broadcom.com>
1555 * mips.igen (mdmx): New (pseudo-)model.
1556 * mdmx.c, mdmx.igen: New files.
1557 * Makefile.in (SIM_OBJS): Add mdmx.o.
1558 * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
1560 (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
1561 (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
1562 (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
1563 (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
1564 (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
1565 (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
1566 (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
1567 (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
1568 (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
1569 (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
1570 (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
1571 (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
1572 (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
1573 (qh_fmtsel): New macros.
1574 (_sim_cpu): New member "acc".
1575 (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
1576 (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
1578 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1580 * interp.c: Use 'deprecated' rather than 'depreciated.'
1581 * sim-main.h: Likewise.
1583 2002-05-01 Chris Demetriou <cgd@broadcom.com>
1585 * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
1586 which wouldn't compile anyway.
1587 * sim-main.h (unpredictable_action): New function prototype.
1588 (Unpredictable): Define to call igen function unpredictable().
1589 (NotWordValue): New macro to call igen function not_word_value().
1590 (UndefinedResult): Remove.
1591 * interp.c (undefined_result): Remove.
1592 (unpredictable_action): New function.
1593 * mips.igen (not_word_value, unpredictable): New functions.
1594 (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
1595 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
1596 (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
1597 NotWordValue() to check for unpredictable inputs, then
1598 Unpredictable() to handle them.
1600 2002-02-24 Chris Demetriou <cgd@broadcom.com>
1602 * mips.igen: Fix formatting of calls to Unpredictable().
1604 2002-04-20 Andrew Cagney <ac131313@redhat.com>
1606 * interp.c (sim_open): Revert previous change.
1608 2002-04-18 Alexandre Oliva <aoliva@redhat.com>
1610 * interp.c (sim_open): Disable chunk of code that wrote code in
1611 vector table entries.
1613 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1615 * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
1616 (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
1619 2002-03-19 Chris Demetriou <cgd@broadcom.com>
1621 * cp1.c: Fix many formatting issues.
1623 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1625 * cp1.c (fpu_format_name): New function to replace...
1626 (DOFMT): This. Delete, and update all callers.
1627 (fpu_rounding_mode_name): New function to replace...
1628 (RMMODE): This. Delete, and update all callers.
1630 2002-03-19 Chris G. Demetriou <cgd@broadcom.com>
1632 * interp.c: Move FPU support routines from here to...
1633 * cp1.c: Here. New file.
1634 * Makefile.in (SIM_OBJS): Add cp1.o to object list.
1635 (cp1.o): New target.
1637 2002-03-12 Chris Demetriou <cgd@broadcom.com>
1639 * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
1640 * mips.igen (mips32, mips64): New models, add to all instructions
1641 and functions as appropriate.
1642 (loadstore_ea, check_u64): New variant for model mips64.
1643 (check_fmt_p): New variant for models mipsV and mips64, remove
1644 mipsV model marking fro other variant.
1647 (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
1648 for mips32 and mips64.
1649 (DCLO, DCLZ): New instructions for mips64.
1651 2002-03-07 Chris Demetriou <cgd@broadcom.com>
1653 * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
1654 immediate or code as a hex value with the "%#lx" format.
1655 (ANDI): Likewise, and fix printed instruction name.
1657 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1659 * sim-main.h (UndefinedResult, Unpredictable): New macros
1660 which currently do nothing.
1662 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1664 * sim-main.h (status_UX, status_SX, status_KX, status_TS)
1665 (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
1666 (status_CU3): New definitions.
1668 * sim-main.h (ExceptionCause): Add new values for MIPS32
1669 and MIPS64: MDMX, MCheck, CacheErr. Update comments
1670 for DebugBreakPoint and NMIReset to note their status in
1672 (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
1673 (SignalExceptionCacheErr): New exception macros.
1675 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1677 * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
1678 * sim-main.h (COP_Usable): Define, but for now coprocessor 1
1680 (SignalExceptionCoProcessorUnusable): Take as argument the
1681 unusable coprocessor number.
1683 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1685 * mips.igen: Fix formatting of all SignalException calls.
1687 2002-03-05 Chris Demetriou <cgd@broadcom.com>
1689 * sim-main.h (SIGNEXTEND): Remove.
1691 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1693 * mips.igen: Remove gencode comment from top of file, fix
1694 spelling in another comment.
1696 2002-03-04 Chris Demetriou <cgd@broadcom.com>
1698 * mips.igen (check_fmt, check_fmt_p): New functions to check
1699 whether specific floating point formats are usable.
1700 (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
1701 (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
1702 (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
1703 Use the new functions.
1704 (do_c_cond_fmt): Remove format checks...
1705 (C.cond.fmta, C.cond.fmtb): And move them into all callers.
1707 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1709 * mips.igen: Fix formatting of check_fpu calls.
1711 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1713 * mips.igen (FLOOR.L.fmt): Store correct destination register.
1715 2002-03-03 Chris Demetriou <cgd@broadcom.com>
1717 * mips.igen: Remove whitespace at end of lines.
1719 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1721 * mips.igen (loadstore_ea): New function to do effective
1722 address calculations.
1723 (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
1724 do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
1725 CACHE): Use loadstore_ea to do effective address computations.
1727 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1729 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
1730 * mips.igen (LL, CxC1, MxC1): Likewise.
1732 2002-03-02 Chris Demetriou <cgd@broadcom.com>
1734 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
1735 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
1736 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
1737 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
1738 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
1739 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
1740 Don't split opcode fields by hand, use the opcode field values
1743 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1745 * mips.igen (do_divu): Fix spacing.
1747 * mips.igen (do_dsllv): Move to be right before DSLLV,
1748 to match the rest of the do_<shift> functions.
1750 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1752 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
1753 DSRL32, do_dsrlv): Trace inputs and results.
1755 2002-03-01 Chris Demetriou <cgd@broadcom.com>
1757 * mips.igen (CACHE): Provide instruction-printing string.
1759 * interp.c (signal_exception): Comment tokens after #endif.
1761 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1763 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
1764 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
1765 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
1766 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
1767 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
1768 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
1769 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
1770 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
1772 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1774 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
1775 instruction-printing string.
1776 (LWU): Use '64' as the filter flag.
1778 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1780 * mips.igen (SDXC1): Fix instruction-printing string.
1782 2002-02-28 Chris Demetriou <cgd@broadcom.com>
1784 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
1785 filter flags "32,f".
1787 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1789 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
1792 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1794 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
1795 add a comma) so that it more closely match the MIPS ISA
1796 documentation opcode partitioning.
1797 (PREF): Put useful names on opcode fields, and include
1798 instruction-printing string.
1800 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1802 * mips.igen (check_u64): New function which in the future will
1803 check whether 64-bit instructions are usable and signal an
1804 exception if not. Currently a no-op.
1805 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
1806 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
1807 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
1808 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
1810 * mips.igen (check_fpu): New function which in the future will
1811 check whether FPU instructions are usable and signal an exception
1812 if not. Currently a no-op.
1813 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
1814 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
1815 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
1816 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
1817 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
1818 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
1819 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
1820 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
1822 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1824 * mips.igen (do_load_left, do_load_right): Move to be immediately
1826 (do_store_left, do_store_right): Move to be immediately following
1829 2002-02-27 Chris Demetriou <cgd@broadcom.com>
1831 * mips.igen (mipsV): New model name. Also, add it to
1832 all instructions and functions where it is appropriate.
1834 2002-02-18 Chris Demetriou <cgd@broadcom.com>
1836 * mips.igen: For all functions and instructions, list model
1837 names that support that instruction one per line.
1839 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1841 * mips.igen: Add some additional comments about supported
1842 models, and about which instructions go where.
1843 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
1844 order as is used in the rest of the file.
1846 2002-02-11 Chris Demetriou <cgd@broadcom.com>
1848 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
1849 indicating that ALU32_END or ALU64_END are there to check
1851 (DADD): Likewise, but also remove previous comment about
1854 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1856 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
1857 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
1858 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
1859 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
1860 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
1861 fields (i.e., add and move commas) so that they more closely
1862 match the MIPS ISA documentation opcode partitioning.
1864 2002-02-10 Chris Demetriou <cgd@broadcom.com>
1866 * mips.igen (ADDI): Print immediate value.
1867 (BREAK): Print code.
1868 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
1869 (SLL): Print "nop" specially, and don't run the code
1870 that does the shift for the "nop" case.
1872 2001-11-17 Fred Fish <fnf@redhat.com>
1874 * sim-main.h (float_operation): Move enum declaration outside
1875 of _sim_cpu struct declaration.
1877 2001-04-12 Jim Blandy <jimb@redhat.com>
1879 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
1880 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
1882 * sim-main.h (COCIDX): Remove definition; this isn't supported by
1883 PENDING_FILL, and you can get the intended effect gracefully by
1884 calling PENDING_SCHED directly.
1886 2001-02-23 Ben Elliston <bje@redhat.com>
1888 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
1889 already defined elsewhere.
1891 2001-02-19 Ben Elliston <bje@redhat.com>
1893 * sim-main.h (sim_monitor): Return an int.
1894 * interp.c (sim_monitor): Add return values.
1895 (signal_exception): Handle error conditions from sim_monitor.
1897 2001-02-08 Ben Elliston <bje@redhat.com>
1899 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
1900 (store_memory): Likewise, pass cia to sim_core_write*.
1902 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
1904 On advice from Chris G. Demetriou <cgd@sibyte.com>:
1905 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
1907 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
1909 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
1910 * Makefile.in: Don't delete *.igen when cleaning directory.
1912 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
1914 * m16.igen (break): Call SignalException not sim_engine_halt.
1916 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
1918 From Jason Eckhardt:
1919 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
1921 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
1923 * mips.igen (MxC1, DMxC1): Fix printf formatting.
1925 2000-05-24 Michael Hayes <mhayes@cygnus.com>
1927 * mips.igen (do_dmultx): Fix typo.
1929 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
1931 * configure: Regenerated to track ../common/aclocal.m4 changes.
1933 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
1935 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
1937 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
1939 * sim-main.h (GPR_CLEAR): Define macro.
1941 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
1943 * interp.c (decode_coproc): Output long using %lx and not %s.
1945 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
1947 * interp.c (sim_open): Sort & extend dummy memory regions for
1948 --board=jmr3904 for eCos.
1950 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
1952 * configure: Regenerated.
1954 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
1956 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
1957 calls, conditional on the simulator being in verbose mode.
1959 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
1961 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
1962 cache don't get ReservedInstruction traps.
1964 1999-11-29 Mark Salter <msalter@cygnus.com>
1966 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
1967 to clear status bits in sdisr register. This is how the hardware works.
1969 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
1970 being used by cygmon.
1972 1999-11-11 Andrew Haley <aph@cygnus.com>
1974 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
1977 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
1979 * mips.igen (MULT): Correct previous mis-applied patch.
1981 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
1983 * mips.igen (delayslot32): Handle sequence like
1984 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
1985 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
1986 (MULT): Actually pass the third register...
1988 1999-09-03 Mark Salter <msalter@cygnus.com>
1990 * interp.c (sim_open): Added more memory aliases for additional
1991 hardware being touched by cygmon on jmr3904 board.
1993 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
1995 * configure: Regenerated to track ../common/aclocal.m4 changes.
1997 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
1999 * interp.c (sim_store_register): Handle case where client - GDB -
2000 specifies that a 4 byte register is 8 bytes in size.
2001 (sim_fetch_register): Ditto.
2003 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
2005 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
2006 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
2007 (idt_monitor_base): Base address for IDT monitor traps.
2008 (pmon_monitor_base): Ditto for PMON.
2009 (lsipmon_monitor_base): Ditto for LSI PMON.
2010 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
2011 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
2012 (sim_firmware_command): New function.
2013 (mips_option_handler): Call it for OPTION_FIRMWARE.
2014 (sim_open): Allocate memory for idt_monitor region. If "--board"
2015 option was given, add no monitor by default. Add BREAK hooks only if
2016 monitors are also there.
2018 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
2020 * interp.c (sim_monitor): Flush output before reading input.
2022 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
2024 * tconfig.in (SIM_HANDLES_LMA): Always define.
2026 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
2028 From Mark Salter <msalter@cygnus.com>:
2029 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
2030 (sim_open): Add setup for BSP board.
2032 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
2034 * mips.igen (MULT, MULTU): Add syntax for two operand version.
2035 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
2036 them as unimplemented.
2038 1999-05-08 Felix Lee <flee@cygnus.com>
2040 * configure: Regenerated to track ../common/aclocal.m4 changes.
2042 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
2044 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
2046 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
2048 * configure.in: Any mips64vr5*-*-* target should have
2049 -DTARGET_ENABLE_FR=1.
2050 (default_endian): Any mips64vr*el-*-* target should default to
2052 * configure: Re-generate.
2054 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
2056 * mips.igen (ldl): Extend from _16_, not 32.
2058 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
2060 * interp.c (sim_store_register): Force registers written to by GDB
2061 into an un-interpreted state.
2063 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
2065 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
2066 CPU, start periodic background I/O polls.
2067 (tx3904sio_poll): New function: periodic I/O poller.
2069 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
2071 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
2073 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
2075 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
2078 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
2080 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
2081 (load_word): Call SIM_CORE_SIGNAL hook on error.
2082 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
2083 starting. For exception dispatching, pass PC instead of NULL_CIA.
2084 (decode_coproc): Use COP0_BADVADDR to store faulting address.
2085 * sim-main.h (COP0_BADVADDR): Define.
2086 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
2087 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
2088 (_sim_cpu): Add exc_* fields to store register value snapshots.
2089 * mips.igen (*): Replace memory-related SignalException* calls
2090 with references to SIM_CORE_SIGNAL hook.
2092 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
2094 * sim-main.c (*): Minor warning cleanups.
2096 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
2098 * m16.igen (DADDIU5): Correct type-o.
2100 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
2102 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
2105 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
2107 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
2109 (interp.o): Add dependency on itable.h
2110 (oengine.c, gencode): Delete remaining references.
2111 (BUILT_SRC_FROM_GEN): Clean up.
2113 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
2116 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
2117 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
2118 tmp-run-hack) : New.
2119 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
2120 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
2121 Drop the "64" qualifier to get the HACK generator working.
2122 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
2123 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
2124 qualifier to get the hack generator working.
2125 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
2126 (DSLL): Use do_dsll.
2127 (DSLLV): Use do_dsllv.
2128 (DSRA): Use do_dsra.
2129 (DSRL): Use do_dsrl.
2130 (DSRLV): Use do_dsrlv.
2131 (BC1): Move *vr4100 to get the HACK generator working.
2132 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
2133 get the HACK generator working.
2134 (MACC) Rename to get the HACK generator working.
2135 (DMACC,MACCS,DMACCS): Add the 64.
2137 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
2139 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
2140 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
2142 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
2144 * mips/interp.c (DEBUG): Cleanups.
2146 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
2148 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
2149 (tx3904sio_tickle): fflush after a stdout character output.
2151 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
2153 * interp.c (sim_close): Uninstall modules.
2155 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
2157 * sim-main.h, interp.c (sim_monitor): Change to global
2160 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2162 * configure.in (vr4100): Only include vr4100 instructions in
2164 * configure: Re-generate.
2165 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
2167 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2169 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
2170 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
2173 * configure.in (sim_default_gen, sim_use_gen): Replace with
2175 (--enable-sim-igen): Delete config option. Always using IGEN.
2176 * configure: Re-generate.
2178 * Makefile.in (gencode): Kill, kill, kill.
2181 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
2183 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
2184 bit mips16 igen simulator.
2185 * configure: Re-generate.
2187 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
2188 as part of vr4100 ISA.
2189 * vr.igen: Mark all instructions as 64 bit only.
2191 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2193 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
2196 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
2198 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
2199 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
2200 * configure: Re-generate.
2202 * m16.igen (BREAK): Define breakpoint instruction.
2203 (JALX32): Mark instruction as mips16 and not r3900.
2204 * mips.igen (C.cond.fmt): Fix typo in instruction format.
2206 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
2208 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2210 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
2211 insn as a debug breakpoint.
2213 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
2215 (PENDING_SCHED): Clean up trace statement.
2216 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
2217 (PENDING_FILL): Delay write by only one cycle.
2218 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
2220 * sim-main.c (pending_tick): Clean up trace statements. Add trace
2222 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
2224 (pending_tick): Move incrementing of index to FOR statement.
2225 (pending_tick): Only update PENDING_OUT after a write has occured.
2227 * configure.in: Add explicit mips-lsi-* target. Use gencode to
2229 * configure: Re-generate.
2231 * interp.c (sim_engine_run OLD): Delete explicit call to
2232 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
2234 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
2236 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
2237 interrupt level number to match changed SignalExceptionInterrupt
2240 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
2242 * interp.c: #include "itable.h" if WITH_IGEN.
2243 (get_insn_name): New function.
2244 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
2245 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
2247 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
2249 * configure: Rebuilt to inhale new common/aclocal.m4.
2251 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
2253 * dv-tx3904sio.c: Include sim-assert.h.
2255 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
2257 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
2258 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
2259 Reorganize target-specific sim-hardware checks.
2260 * configure: rebuilt.
2261 * interp.c (sim_open): For tx39 target boards, set
2262 OPERATING_ENVIRONMENT, add tx3904sio devices.
2263 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
2264 ROM executables. Install dv-sockser into sim-modules list.
2266 * dv-tx3904irc.c: Compiler warning clean-up.
2267 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
2268 frequent hw-trace messages.
2270 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
2272 * vr.igen (MulAcc): Identify as a vr4100 specific function.
2274 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2276 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
2278 * vr.igen: New file.
2279 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
2280 * mips.igen: Define vr4100 model. Include vr.igen.
2281 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
2283 * mips.igen (check_mf_hilo): Correct check.
2285 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2287 * sim-main.h (interrupt_event): Add prototype.
2289 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
2290 register_ptr, register_value.
2291 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
2293 * sim-main.h (tracefh): Make extern.
2295 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
2297 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
2298 Reduce unnecessarily high timer event frequency.
2299 * dv-tx3904cpu.c: Ditto for interrupt event.
2301 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
2303 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
2305 (interrupt_event): Made non-static.
2307 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
2308 interchange of configuration values for external vs. internal
2311 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
2313 * mips.igen (BREAK): Moved code to here for
2314 simulator-reserved break instructions.
2315 * gencode.c (build_instruction): Ditto.
2316 * interp.c (signal_exception): Code moved from here. Non-
2317 reserved instructions now use exception vector, rather
2319 * sim-main.h: Moved magic constants to here.
2321 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
2323 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
2324 register upon non-zero interrupt event level, clear upon zero
2326 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
2327 by passing zero event value.
2328 (*_io_{read,write}_buffer): Endianness fixes.
2329 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
2330 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
2332 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
2333 serial I/O and timer module at base address 0xFFFF0000.
2335 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
2337 * mips.igen (SWC1) : Correct the handling of ReverseEndian
2340 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
2342 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
2344 * configure: Update.
2346 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
2348 * dv-tx3904tmr.c: New file - implements tx3904 timer.
2349 * dv-tx3904{irc,cpu}.c: Mild reformatting.
2350 * configure.in: Include tx3904tmr in hw_device list.
2351 * configure: Rebuilt.
2352 * interp.c (sim_open): Instantiate three timer instances.
2353 Fix address typo of tx3904irc instance.
2355 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
2357 * interp.c (signal_exception): SystemCall exception now uses
2358 the exception vector.
2360 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
2362 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
2365 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2367 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
2369 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
2371 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
2373 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
2374 sim-main.h. Declare a struct hw_descriptor instead of struct
2375 hw_device_descriptor.
2377 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
2379 * mips.igen (do_store_left, do_load_left): Compute nr of left and
2380 right bits and then re-align left hand bytes to correct byte
2381 lanes. Fix incorrect computation in do_store_left when loading
2382 bytes from second word.
2384 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2386 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
2387 * interp.c (sim_open): Only create a device tree when HW is
2390 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
2391 * interp.c (signal_exception): Ditto.
2393 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
2395 * gencode.c: Mark BEGEZALL as LIKELY.
2397 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
2399 * sim-main.h (ALU32_END): Sign extend 32 bit results.
2400 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
2402 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
2404 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
2405 modules. Recognize TX39 target with "mips*tx39" pattern.
2406 * configure: Rebuilt.
2407 * sim-main.h (*): Added many macros defining bits in
2408 TX39 control registers.
2409 (SignalInterrupt): Send actual PC instead of NULL.
2410 (SignalNMIReset): New exception type.
2411 * interp.c (board): New variable for future use to identify
2412 a particular board being simulated.
2413 (mips_option_handler,mips_options): Added "--board" option.
2414 (interrupt_event): Send actual PC.
2415 (sim_open): Make memory layout conditional on board setting.
2416 (signal_exception): Initial implementation of hardware interrupt
2417 handling. Accept another break instruction variant for simulator
2419 (decode_coproc): Implement RFE instruction for TX39.
2420 (mips.igen): Decode RFE instruction as such.
2421 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
2422 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
2423 bbegin to implement memory map.
2424 * dv-tx3904cpu.c: New file.
2425 * dv-tx3904irc.c: New file.
2427 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
2429 * mips.igen (check_mt_hilo): Create a separate r3900 version.
2431 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
2433 * tx.igen (madd,maddu): Replace calls to check_op_hilo
2434 with calls to check_div_hilo.
2436 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
2438 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
2439 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
2440 Add special r3900 version of do_mult_hilo.
2441 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
2442 with calls to check_mult_hilo.
2443 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
2444 with calls to check_div_hilo.
2446 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
2448 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
2449 Document a replacement.
2451 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
2453 * interp.c (sim_monitor): Make mon_printf work.
2455 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
2457 * sim-main.h (INSN_NAME): New arg `cpu'.
2459 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
2461 * configure: Regenerated to track ../common/aclocal.m4 changes.
2463 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
2465 * configure: Regenerated to track ../common/aclocal.m4 changes.
2468 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
2470 * acconfig.h: New file.
2471 * configure.in: Reverted change of Apr 24; use sinclude again.
2473 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
2475 * configure: Regenerated to track ../common/aclocal.m4 changes.
2478 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
2480 * configure.in: Don't call sinclude.
2482 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
2484 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
2486 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2488 * mips.igen (ERET): Implement.
2490 * interp.c (decode_coproc): Return sign-extended EPC.
2492 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
2494 * interp.c (signal_exception): Do not ignore Trap.
2495 (signal_exception): On TRAP, restart at exception address.
2496 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
2497 (signal_exception): Update.
2498 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
2499 so that TRAP instructions are caught.
2501 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
2503 * sim-main.h (struct hilo_access, struct hilo_history): Define,
2504 contains HI/LO access history.
2505 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
2506 (HIACCESS, LOACCESS): Delete, replace with
2507 (HIHISTORY, LOHISTORY): New macros.
2508 (CHECKHILO): Delete all, moved to mips.igen
2510 * gencode.c (build_instruction): Do not generate checks for
2511 correct HI/LO register usage.
2513 * interp.c (old_engine_run): Delete checks for correct HI/LO
2516 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
2517 check_mf_cycles): New functions.
2518 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
2519 do_divu, domultx, do_mult, do_multu): Use.
2521 * tx.igen ("madd", "maddu"): Use.
2523 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
2525 * mips.igen (DSRAV): Use function do_dsrav.
2526 (SRAV): Use new function do_srav.
2528 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
2529 (B): Sign extend 11 bit immediate.
2530 (EXT-B*): Shift 16 bit immediate left by 1.
2531 (ADDIU*): Don't sign extend immediate value.
2533 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2535 * m16run.c (sim_engine_run): Restore CIA after handling an event.
2537 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
2540 * mips.igen (delayslot32, nullify_next_insn): New functions.
2541 (m16.igen): Always include.
2542 (do_*): Add more tracing.
2544 * m16.igen (delayslot16): Add NIA argument, could be called by a
2545 32 bit MIPS16 instruction.
2547 * interp.c (ifetch16): Move function from here.
2548 * sim-main.c (ifetch16): To here.
2550 * sim-main.c (ifetch16, ifetch32): Update to match current
2551 implementations of LH, LW.
2552 (signal_exception): Don't print out incorrect hex value of illegal
2555 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2557 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
2560 * m16.igen: Implement MIPS16 instructions.
2562 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
2563 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
2564 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
2565 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
2566 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
2567 bodies of corresponding code from 32 bit insn to these. Also used
2568 by MIPS16 versions of functions.
2570 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
2571 (IMEM16): Drop NR argument from macro.
2573 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2575 * Makefile.in (SIM_OBJS): Add sim-main.o.
2577 * sim-main.h (address_translation, load_memory, store_memory,
2578 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
2580 (pr_addr, pr_uword64): Declare.
2581 (sim-main.c): Include when H_REVEALS_MODULE_P.
2583 * interp.c (address_translation, load_memory, store_memory,
2584 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
2586 * sim-main.c: To here. Fix compilation problems.
2588 * configure.in: Enable inlining.
2589 * configure: Re-config.
2591 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
2593 * configure: Regenerated to track ../common/aclocal.m4 changes.
2595 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2597 * mips.igen: Include tx.igen.
2598 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
2599 * tx.igen: New file, contains MADD and MADDU.
2601 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
2602 the hardwired constant `7'.
2603 (store_memory): Ditto.
2604 (LOADDRMASK): Move definition to sim-main.h.
2606 mips.igen (MTC0): Enable for r3900.
2609 mips.igen (do_load_byte): Delete.
2610 (do_load, do_store, do_load_left, do_load_write, do_store_left,
2611 do_store_right): New functions.
2612 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
2614 configure.in: Let the tx39 use igen again.
2617 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
2619 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
2620 not an address sized quantity. Return zero for cache sizes.
2622 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
2624 * mips.igen (r3900): r3900 does not support 64 bit integer
2627 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
2629 * configure.in (mipstx39*-*-*): Use gencode simulator rather
2631 * configure : Rebuild.
2633 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
2635 * configure: Regenerated to track ../common/aclocal.m4 changes.
2637 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2639 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
2641 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
2643 * configure: Regenerated to track ../common/aclocal.m4 changes.
2644 * config.in: Regenerated to track ../common/aclocal.m4 changes.
2646 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2648 * configure: Regenerated to track ../common/aclocal.m4 changes.
2650 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
2652 * interp.c (Max, Min): Comment out functions. Not yet used.
2654 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
2656 * configure: Regenerated to track ../common/aclocal.m4 changes.
2658 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
2660 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
2661 configurable settings for stand-alone simulator.
2663 * configure.in: Added X11 search, just in case.
2665 * configure: Regenerated.
2667 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
2669 * interp.c (sim_write, sim_read, load_memory, store_memory):
2670 Replace sim_core_*_map with read_map, write_map, exec_map resp.
2672 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
2674 * sim-main.h (GETFCC): Return an unsigned value.
2676 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2678 * mips.igen (DIV): Fix check for -1 / MIN_INT.
2679 (DADD): Result destination is RD not RT.
2681 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
2683 * sim-main.h (HIACCESS, LOACCESS): Always define.
2685 * mdmx.igen (Maxi, Mini): Rename Max, Min.
2687 * interp.c (sim_info): Delete.
2689 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
2691 * interp.c (DECLARE_OPTION_HANDLER): Use it.
2692 (mips_option_handler): New argument `cpu'.
2693 (sim_open): Update call to sim_add_option_table.
2695 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
2697 * mips.igen (CxC1): Add tracing.
2699 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
2701 * sim-main.h (Max, Min): Declare.
2703 * interp.c (Max, Min): New functions.
2705 * mips.igen (BC1): Add tracing.
2707 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
2709 * interp.c Added memory map for stack in vr4100
2711 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
2713 * interp.c (load_memory): Add missing "break"'s.
2715 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
2717 * interp.c (sim_store_register, sim_fetch_register): Pass in
2718 length parameter. Return -1.
2720 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
2722 * interp.c: Added hardware init hook, fixed warnings.
2724 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
2726 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
2728 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
2730 * interp.c (ifetch16): New function.
2732 * sim-main.h (IMEM32): Rename IMEM.
2733 (IMEM16_IMMED): Define.
2735 (DELAY_SLOT): Update.
2737 * m16run.c (sim_engine_run): New file.
2739 * m16.igen: All instructions except LB.
2740 (LB): Call do_load_byte.
2741 * mips.igen (do_load_byte): New function.
2742 (LB): Call do_load_byte.
2744 * mips.igen: Move spec for insn bit size and high bit from here.
2745 * Makefile.in (tmp-igen, tmp-m16): To here.
2747 * m16.dc: New file, decode mips16 instructions.
2749 * Makefile.in (SIM_NO_ALL): Define.
2750 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
2752 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
2754 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
2755 point unit to 32 bit registers.
2756 * configure: Re-generate.
2758 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
2760 * configure.in (sim_use_gen): Make IGEN the default simulator
2761 generator for generic 32 and 64 bit mips targets.
2762 * configure: Re-generate.
2764 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
2766 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
2769 * interp.c (sim_fetch_register, sim_store_register): Read/write
2770 FGR from correct location.
2771 (sim_open): Set size of FGR's according to
2772 WITH_TARGET_FLOATING_POINT_BITSIZE.
2774 * sim-main.h (FGR): Store floating point registers in a separate
2777 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
2779 * configure: Regenerated to track ../common/aclocal.m4 changes.
2781 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
2783 * interp.c (ColdReset): Call PENDING_INVALIDATE.
2785 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
2787 * interp.c (pending_tick): New function. Deliver pending writes.
2789 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
2790 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
2791 it can handle mixed sized quantites and single bits.
2793 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
2795 * interp.c (oengine.h): Do not include when building with IGEN.
2796 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
2797 (sim_info): Ditto for PROCESSOR_64BIT.
2798 (sim_monitor): Replace ut_reg with unsigned_word.
2799 (*): Ditto for t_reg.
2800 (LOADDRMASK): Define.
2801 (sim_open): Remove defunct check that host FP is IEEE compliant,
2802 using software to emulate floating point.
2803 (value_fpr, ...): Always compile, was conditional on HASFPU.
2805 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
2807 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
2810 * interp.c (SD, CPU): Define.
2811 (mips_option_handler): Set flags in each CPU.
2812 (interrupt_event): Assume CPU 0 is the one being iterrupted.
2813 (sim_close): Do not clear STATE, deleted anyway.
2814 (sim_write, sim_read): Assume CPU zero's vm should be used for
2816 (sim_create_inferior): Set the PC for all processors.
2817 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
2819 (mips16_entry): Pass correct nr of args to store_word, load_word.
2820 (ColdReset): Cold reset all cpu's.
2821 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
2822 (sim_monitor, load_memory, store_memory, signal_exception): Use
2823 `CPU' instead of STATE_CPU.
2826 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
2829 * sim-main.h (signal_exception): Add sim_cpu arg.
2830 (SignalException*): Pass both SD and CPU to signal_exception.
2831 * interp.c (signal_exception): Update.
2833 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
2835 (sync_operation, prefetch, cache_op, store_memory, load_memory,
2836 address_translation): Ditto
2837 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
2839 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
2841 * configure: Regenerated to track ../common/aclocal.m4 changes.
2843 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
2845 * interp.c (sim_engine_run): Add `nr_cpus' argument.
2847 * mips.igen (model): Map processor names onto BFD name.
2849 * sim-main.h (CPU_CIA): Delete.
2850 (SET_CIA, GET_CIA): Define
2852 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
2854 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
2857 * configure.in (default_endian): Configure a big-endian simulator
2859 * configure: Re-generate.
2861 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
2863 * configure: Regenerated to track ../common/aclocal.m4 changes.
2865 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
2867 * interp.c (sim_monitor): Handle Densan monitor outbyte
2868 and inbyte functions.
2870 1997-12-29 Felix Lee <flee@cygnus.com>
2872 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
2874 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
2876 * Makefile.in (tmp-igen): Arrange for $zero to always be
2877 reset to zero after every instruction.
2879 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
2881 * configure: Regenerated to track ../common/aclocal.m4 changes.
2884 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
2886 * mips.igen (MSUB): Fix to work like MADD.
2887 * gencode.c (MSUB): Similarly.
2889 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
2891 * configure: Regenerated to track ../common/aclocal.m4 changes.
2893 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2895 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
2897 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
2899 * sim-main.h (sim-fpu.h): Include.
2901 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
2902 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
2903 using host independant sim_fpu module.
2905 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
2907 * interp.c (signal_exception): Report internal errors with SIGABRT
2910 * sim-main.h (C0_CONFIG): New register.
2911 (signal.h): No longer include.
2913 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
2915 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
2917 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
2919 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
2921 * mips.igen: Tag vr5000 instructions.
2922 (ANDI): Was missing mipsIV model, fix assembler syntax.
2923 (do_c_cond_fmt): New function.
2924 (C.cond.fmt): Handle mips I-III which do not support CC field
2926 (bc1): Handle mips IV which do not have a delaed FCC separatly.
2927 (SDR): Mask paddr when BigEndianMem, not the converse as specified
2929 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
2930 vr5000 which saves LO in a GPR separatly.
2932 * configure.in (enable-sim-igen): For vr5000, select vr5000
2933 specific instructions.
2934 * configure: Re-generate.
2936 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
2938 * Makefile.in (SIM_OBJS): Add sim-fpu module.
2940 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
2941 fmt_uninterpreted_64 bit cases to switch. Convert to
2944 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
2946 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
2947 as specified in IV3.2 spec.
2948 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
2950 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
2952 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
2953 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
2954 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
2955 PENDING_FILL versions of instructions. Simplify.
2957 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
2959 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
2961 (MTHI, MFHI): Disable code checking HI-LO.
2963 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
2965 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
2967 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
2969 * gencode.c (build_mips16_operands): Replace IPC with cia.
2971 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
2972 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
2974 (UndefinedResult): Replace function with macro/function
2976 (sim_engine_run): Don't save PC in IPC.
2978 * sim-main.h (IPC): Delete.
2981 * interp.c (signal_exception, store_word, load_word,
2982 address_translation, load_memory, store_memory, cache_op,
2983 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
2984 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
2985 current instruction address - cia - argument.
2986 (sim_read, sim_write): Call address_translation directly.
2987 (sim_engine_run): Rename variable vaddr to cia.
2988 (signal_exception): Pass cia to sim_monitor
2990 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
2991 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
2992 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
2994 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
2995 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
2998 * interp.c (signal_exception): Pass restart address to
3001 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
3002 idecode.o): Add dependency.
3004 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
3006 (DELAY_SLOT): Update NIA not PC with branch address.
3007 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
3009 * mips.igen: Use CIA not PC in branch calculations.
3010 (illegal): Call SignalException.
3011 (BEQ, ADDIU): Fix assembler.
3013 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3015 * m16.igen (JALX): Was missing.
3017 * configure.in (enable-sim-igen): New configuration option.
3018 * configure: Re-generate.
3020 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
3022 * interp.c (load_memory, store_memory): Delete parameter RAW.
3023 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
3024 bypassing {load,store}_memory.
3026 * sim-main.h (ByteSwapMem): Delete definition.
3028 * Makefile.in (SIM_OBJS): Add sim-memopt module.
3030 * interp.c (sim_do_command, sim_commands): Delete mips specific
3031 commands. Handled by module sim-options.
3033 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
3034 (WITH_MODULO_MEMORY): Define.
3036 * interp.c (sim_info): Delete code printing memory size.
3038 * interp.c (mips_size): Nee sim_size, delete function.
3040 (monitor, monitor_base, monitor_size): Delete global variables.
3041 (sim_open, sim_close): Delete code creating monitor and other
3042 memory regions. Use sim-memopts module, via sim_do_commandf, to
3043 manage memory regions.
3044 (load_memory, store_memory): Use sim-core for memory model.
3046 * interp.c (address_translation): Delete all memory map code
3047 except line forcing 32 bit addresses.
3049 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
3051 * sim-main.h (WITH_TRACE): Delete definition. Enables common
3054 * interp.c (logfh, logfile): Delete globals.
3055 (sim_open, sim_close): Delete code opening & closing log file.
3056 (mips_option_handler): Delete -l and -n options.
3057 (OPTION mips_options): Ditto.
3059 * interp.c (OPTION mips_options): Rename option trace to dinero.
3060 (mips_option_handler): Update.
3062 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3064 * interp.c (fetch_str): New function.
3065 (sim_monitor): Rewrite using sim_read & sim_write.
3066 (sim_open): Check magic number.
3067 (sim_open): Write monitor vectors into memory using sim_write.
3068 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
3069 (sim_read, sim_write): Simplify - transfer data one byte at a
3071 (load_memory, store_memory): Clarify meaning of parameter RAW.
3073 * sim-main.h (isHOST): Defete definition.
3074 (isTARGET): Mark as depreciated.
3075 (address_translation): Delete parameter HOST.
3077 * interp.c (address_translation): Delete parameter HOST.
3079 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3083 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
3084 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
3086 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
3088 * mips.igen: Add model filter field to records.
3090 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3092 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
3094 interp.c (sim_engine_run): Do not compile function sim_engine_run
3095 when WITH_IGEN == 1.
3097 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
3098 target architecture.
3100 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
3101 igen. Replace with configuration variables sim_igen_flags /
3104 * m16.igen: New file. Copy mips16 insns here.
3105 * mips.igen: From here.
3107 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
3109 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
3111 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
3113 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
3115 * gencode.c (build_instruction): Follow sim_write's lead in using
3116 BigEndianMem instead of !ByteSwapMem.
3118 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
3120 * configure.in (sim_gen): Dependent on target, select type of
3121 generator. Always select old style generator.
3123 configure: Re-generate.
3125 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
3127 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
3128 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
3129 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
3130 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
3131 SIM_@sim_gen@_*, set by autoconf.
3133 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3135 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
3137 * interp.c (ColdReset): Remove #ifdef HASFPU, check
3138 CURRENT_FLOATING_POINT instead.
3140 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
3141 (address_translation): Raise exception InstructionFetch when
3142 translation fails and isINSTRUCTION.
3144 * interp.c (sim_open, sim_write, sim_monitor, store_word,
3145 sim_engine_run): Change type of of vaddr and paddr to
3147 (address_translation, prefetch, load_memory, store_memory,
3148 cache_op): Change type of vAddr and pAddr to address_word.
3150 * gencode.c (build_instruction): Change type of vaddr and paddr to
3153 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
3155 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
3156 macro to obtain result of ALU op.
3158 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3160 * interp.c (sim_info): Call profile_print.
3162 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3164 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
3166 * sim-main.h (WITH_PROFILE): Do not define, defined in
3167 common/sim-config.h. Use sim-profile module.
3168 (simPROFILE): Delete defintion.
3170 * interp.c (PROFILE): Delete definition.
3171 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
3172 (sim_close): Delete code writing profile histogram.
3173 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
3175 (sim_engine_run): Delete code profiling the PC.
3177 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3179 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
3181 * interp.c (sim_monitor): Make register pointers of type
3184 * sim-main.h: Make registers of type unsigned_word not
3187 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3189 * interp.c (sync_operation): Rename from SyncOperation, make
3190 global, add SD argument.
3191 (prefetch): Rename from Prefetch, make global, add SD argument.
3192 (decode_coproc): Make global.
3194 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
3196 * gencode.c (build_instruction): Generate DecodeCoproc not
3197 decode_coproc calls.
3199 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
3200 (SizeFGR): Move to sim-main.h
3201 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
3202 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
3203 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
3205 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
3206 FP_RM_TOMINF, GETRM): Move to sim-main.h.
3207 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
3208 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
3209 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
3210 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
3212 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
3214 (sim-alu.h): Include.
3215 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
3216 (sim_cia): Typedef to instruction_address.
3218 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
3220 * Makefile.in (interp.o): Rename generated file engine.c to
3225 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
3227 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
3229 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3231 * gencode.c (build_instruction): For "FPSQRT", output correct
3232 number of arguments to Recip.
3234 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
3236 * Makefile.in (interp.o): Depends on sim-main.h
3238 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
3240 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
3241 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
3242 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
3243 STATE, DSSTATE): Define
3244 (GPR, FGRIDX, ..): Define.
3246 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
3247 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
3248 (GPR, FGRIDX, ...): Delete macros.
3250 * interp.c: Update names to match defines from sim-main.h
3252 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
3254 * interp.c (sim_monitor): Add SD argument.
3255 (sim_warning): Delete. Replace calls with calls to
3257 (sim_error): Delete. Replace calls with sim_io_error.
3258 (open_trace, writeout32, writeout16, getnum): Add SD argument.
3259 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
3260 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
3262 (mips_size): Rename from sim_size. Add SD argument.
3264 * interp.c (simulator): Delete global variable.
3265 (callback): Delete global variable.
3266 (mips_option_handler, sim_open, sim_write, sim_read,
3267 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
3268 sim_size,sim_monitor): Use sim_io_* not callback->*.
3269 (sim_open): ZALLOC simulator struct.
3270 (PROFILE): Do not define.
3272 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3274 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
3275 support.h with corresponding code.
3277 * sim-main.h (word64, uword64), support.h: Move definition to
3279 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
3282 * Makefile.in: Update dependencies
3283 * interp.c: Do not include.
3285 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3287 * interp.c (address_translation, load_memory, store_memory,
3288 cache_op): Rename to from AddressTranslation et.al., make global,
3291 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
3294 * interp.c (SignalException): Rename to signal_exception, make
3297 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
3299 * sim-main.h (SignalException, SignalExceptionInterrupt,
3300 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
3301 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
3302 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
3305 * interp.c, support.h: Use.
3307 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3309 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
3310 to value_fpr / store_fpr. Add SD argument.
3311 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
3312 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
3314 * sim-main.h (ValueFPR, StoreFPR): Define.
3316 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
3318 * interp.c (sim_engine_run): Check consistency between configure
3319 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
3322 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
3323 (mips_fpu): Configure WITH_FLOATING_POINT.
3324 (mips_endian): Configure WITH_TARGET_ENDIAN.
3325 * configure: Update.
3327 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3329 * configure: Regenerated to track ../common/aclocal.m4 changes.
3331 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
3333 * configure: Regenerated.
3335 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
3337 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
3339 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3341 * gencode.c (print_igen_insn_models): Assume certain architectures
3342 include all mips* instructions.
3343 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
3346 * Makefile.in (tmp.igen): Add target. Generate igen input from
3349 * gencode.c (FEATURE_IGEN): Define.
3350 (main): Add --igen option. Generate output in igen format.
3351 (process_instructions): Format output according to igen option.
3352 (print_igen_insn_format): New function.
3353 (print_igen_insn_models): New function.
3354 (process_instructions): Only issue warnings and ignore
3355 instructions when no FEATURE_IGEN.
3357 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3359 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
3362 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3364 * configure: Regenerated to track ../common/aclocal.m4 changes.
3366 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
3368 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
3369 SIM_RESERVED_BITS): Delete, moved to common.
3370 (SIM_EXTRA_CFLAGS): Update.
3372 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
3374 * configure.in: Configure non-strict memory alignment.
3375 * configure: Regenerated to track ../common/aclocal.m4 changes.
3377 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
3379 * configure: Regenerated to track ../common/aclocal.m4 changes.
3381 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
3383 * gencode.c (SDBBP,DERET): Added (3900) insns.
3384 (RFE): Turn on for 3900.
3385 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
3386 (dsstate): Made global.
3387 (SUBTARGET_R3900): Added.
3388 (CANCELDELAYSLOT): New.
3389 (SignalException): Ignore SystemCall rather than ignore and
3390 terminate. Add DebugBreakPoint handling.
3391 (decode_coproc): New insns RFE, DERET; and new registers Debug
3392 and DEPC protected by SUBTARGET_R3900.
3393 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
3395 * Makefile.in,configure.in: Add mips subtarget option.
3396 * configure: Update.
3398 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
3400 * gencode.c: Add r3900 (tx39).
3403 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
3405 * gencode.c (build_instruction): Don't need to subtract 4 for
3408 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
3410 * interp.c: Correct some HASFPU problems.
3412 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
3414 * configure: Regenerated to track ../common/aclocal.m4 changes.
3416 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
3418 * interp.c (mips_options): Fix samples option short form, should
3421 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
3423 * interp.c (sim_info): Enable info code. Was just returning.
3425 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
3427 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
3430 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
3432 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
3434 (build_instruction): Ditto for LL.
3436 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
3438 * configure: Regenerated to track ../common/aclocal.m4 changes.
3440 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3442 * configure: Regenerated to track ../common/aclocal.m4 changes.
3445 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
3447 * interp.c (sim_open): Add call to sim_analyze_program, update
3450 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
3452 * interp.c (sim_kill): Delete.
3453 (sim_create_inferior): Add ABFD argument. Set PC from same.
3454 (sim_load): Move code initializing trap handlers from here.
3455 (sim_open): To here.
3456 (sim_load): Delete, use sim-hload.c.
3458 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
3460 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
3462 * configure: Regenerated to track ../common/aclocal.m4 changes.
3465 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3467 * interp.c (sim_open): Add ABFD argument.
3468 (sim_load): Move call to sim_config from here.
3469 (sim_open): To here. Check return status.
3471 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
3473 * gencode.c (build_instruction): Two arg MADD should
3474 not assign result to $0.
3476 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
3478 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
3479 * sim/mips/configure.in: Regenerate.
3481 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
3483 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
3484 signed8, unsigned8 et.al. types.
3486 * interp.c (SUB_REG_FETCH): Handle both little and big endian
3487 hosts when selecting subreg.
3489 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
3491 * interp.c (sim_engine_run): Reset the ZERO register to zero
3492 regardless of FEATURE_WARN_ZERO.
3493 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
3495 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
3497 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
3498 (SignalException): For BreakPoints ignore any mode bits and just
3500 (SignalException): Always set the CAUSE register.
3502 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
3504 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
3505 exception has been taken.
3507 * interp.c: Implement the ERET and mt/f sr instructions.
3509 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
3511 * interp.c (SignalException): Don't bother restarting an
3514 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
3516 * interp.c (SignalException): Really take an interrupt.
3517 (interrupt_event): Only deliver interrupts when enabled.
3519 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
3521 * interp.c (sim_info): Only print info when verbose.
3522 (sim_info) Use sim_io_printf for output.
3524 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3526 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
3529 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
3531 * interp.c (sim_do_command): Check for common commands if a
3532 simulator specific command fails.
3534 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
3536 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
3537 and simBE when DEBUG is defined.
3539 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
3541 * interp.c (interrupt_event): New function. Pass exception event
3542 onto exception handler.
3544 * configure.in: Check for stdlib.h.
3545 * configure: Regenerate.
3547 * gencode.c (build_instruction): Add UNUSED attribute to tempS
3548 variable declaration.
3549 (build_instruction): Initialize memval1.
3550 (build_instruction): Add UNUSED attribute to byte, bigend,
3552 (build_operands): Ditto.
3554 * interp.c: Fix GCC warnings.
3555 (sim_get_quit_code): Delete.
3557 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
3558 * Makefile.in: Ditto.
3559 * configure: Re-generate.
3561 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
3563 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
3565 * interp.c (mips_option_handler): New function parse argumes using
3567 (myname): Replace with STATE_MY_NAME.
3568 (sim_open): Delete check for host endianness - performed by
3570 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
3571 (sim_open): Move much of the initialization from here.
3572 (sim_load): To here. After the image has been loaded and
3574 (sim_open): Move ColdReset from here.
3575 (sim_create_inferior): To here.
3576 (sim_open): Make FP check less dependant on host endianness.
3578 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
3580 * interp.c (sim_set_callbacks): Delete.
3582 * interp.c (membank, membank_base, membank_size): Replace with
3583 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
3584 (sim_open): Remove call to callback->init. gdb/run do this.
3588 * sim-main.h (SIM_HAVE_FLATMEM): Define.
3590 * interp.c (big_endian_p): Delete, replaced by
3591 current_target_byte_order.
3593 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
3595 * interp.c (host_read_long, host_read_word, host_swap_word,
3596 host_swap_long): Delete. Using common sim-endian.
3597 (sim_fetch_register, sim_store_register): Use H2T.
3598 (pipeline_ticks): Delete. Handled by sim-events.
3600 (sim_engine_run): Update.
3602 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
3604 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
3606 (SignalException): To here. Signal using sim_engine_halt.
3607 (sim_stop_reason): Delete, moved to common.
3609 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
3611 * interp.c (sim_open): Add callback argument.
3612 (sim_set_callbacks): Delete SIM_DESC argument.
3615 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
3617 * Makefile.in (SIM_OBJS): Add common modules.
3619 * interp.c (sim_set_callbacks): Also set SD callback.
3620 (set_endianness, xfer_*, swap_*): Delete.
3621 (host_read_word, host_read_long, host_swap_word, host_swap_long):
3622 Change to functions using sim-endian macros.
3623 (control_c, sim_stop): Delete, use common version.
3624 (simulate): Convert into.
3625 (sim_engine_run): This function.
3626 (sim_resume): Delete.
3628 * interp.c (simulation): New variable - the simulator object.
3629 (sim_kind): Delete global - merged into simulation.
3630 (sim_load): Cleanup. Move PC assignment from here.
3631 (sim_create_inferior): To here.
3633 * sim-main.h: New file.
3634 * interp.c (sim-main.h): Include.
3636 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
3638 * configure: Regenerated to track ../common/aclocal.m4 changes.
3640 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
3642 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
3644 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
3646 * gencode.c (build_instruction): DIV instructions: check
3647 for division by zero and integer overflow before using
3648 host's division operation.
3650 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
3652 * Makefile.in (SIM_OBJS): Add sim-load.o.
3653 * interp.c: #include bfd.h.
3654 (target_byte_order): Delete.
3655 (sim_kind, myname, big_endian_p): New static locals.
3656 (sim_open): Set sim_kind, myname. Move call to set_endianness to
3657 after argument parsing. Recognize -E arg, set endianness accordingly.
3658 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
3659 load file into simulator. Set PC from bfd.
3660 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
3661 (set_endianness): Use big_endian_p instead of target_byte_order.
3663 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
3665 * interp.c (sim_size): Delete prototype - conflicts with
3666 definition in remote-sim.h. Correct definition.
3668 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3670 * configure: Regenerated to track ../common/aclocal.m4 changes.
3673 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
3675 * interp.c (sim_open): New arg `kind'.
3677 * configure: Regenerated to track ../common/aclocal.m4 changes.
3679 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3681 * configure: Regenerated to track ../common/aclocal.m4 changes.
3683 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
3685 * interp.c (sim_open): Set optind to 0 before calling getopt.
3687 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3689 * configure: Regenerated to track ../common/aclocal.m4 changes.
3691 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
3693 * interp.c : Replace uses of pr_addr with pr_uword64
3694 where the bit length is always 64 independent of SIM_ADDR.
3695 (pr_uword64) : added.
3697 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
3699 * configure: Re-generate.
3701 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
3703 * configure: Regenerate to track ../common/aclocal.m4 changes.
3705 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
3707 * interp.c (sim_open): New SIM_DESC result. Argument is now
3709 (other sim_*): New SIM_DESC argument.
3711 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
3713 * interp.c: Fix printing of addresses for non-64-bit targets.
3714 (pr_addr): Add function to print address based on size.
3716 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
3718 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
3720 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
3722 * gencode.c (build_mips16_operands): Correct computation of base
3723 address for extended PC relative instruction.
3725 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
3727 * interp.c (mips16_entry): Add support for floating point cases.
3728 (SignalException): Pass floating point cases to mips16_entry.
3729 (ValueFPR): Don't restrict fmt_single and fmt_word to even
3731 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
3733 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
3734 and then set the state to fmt_uninterpreted.
3735 (COP_SW): Temporarily set the state to fmt_word while calling
3738 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
3740 * gencode.c (build_instruction): The high order may be set in the
3741 comparison flags at any ISA level, not just ISA 4.
3743 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
3745 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
3746 COMMON_{PRE,POST}_CONFIG_FRAG instead.
3747 * configure.in: sinclude ../common/aclocal.m4.
3748 * configure: Regenerated.
3750 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
3752 * configure: Rebuild after change to aclocal.m4.
3754 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
3756 * configure configure.in Makefile.in: Update to new configure
3757 scheme which is more compatible with WinGDB builds.
3758 * configure.in: Improve comment on how to run autoconf.
3759 * configure: Re-run autoconf to get new ../common/aclocal.m4.
3760 * Makefile.in: Use autoconf substitution to install common
3763 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
3765 * gencode.c (build_instruction): Use BigEndianCPU instead of
3768 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
3770 * interp.c (sim_monitor): Make output to stdout visible in
3771 wingdb's I/O log window.
3773 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
3775 * support.h: Undo previous change to SIGTRAP
3778 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
3780 * interp.c (store_word, load_word): New static functions.
3781 (mips16_entry): New static function.
3782 (SignalException): Look for mips16 entry and exit instructions.
3783 (simulate): Use the correct index when setting fpr_state after
3784 doing a pending move.
3786 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
3788 * interp.c: Fix byte-swapping code throughout to work on
3789 both little- and big-endian hosts.
3791 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
3793 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
3794 with gdb/config/i386/xm-windows.h.
3796 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
3798 * gencode.c (build_instruction): Work around MSVC++ code gen bug
3799 that messes up arithmetic shifts.
3801 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
3803 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
3804 SIGTRAP and SIGQUIT for _WIN32.
3806 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
3808 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
3809 force a 64 bit multiplication.
3810 (build_instruction) [OR]: In mips16 mode, don't do anything if the
3811 destination register is 0, since that is the default mips16 nop
3814 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
3816 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
3817 (build_endian_shift): Don't check proc64.
3818 (build_instruction): Always set memval to uword64. Cast op2 to
3819 uword64 when shifting it left in memory instructions. Always use
3820 the same code for stores--don't special case proc64.
3822 * gencode.c (build_mips16_operands): Fix base PC value for PC
3824 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
3826 * interp.c (simJALDELAYSLOT): Define.
3827 (JALDELAYSLOT): Define.
3828 (INDELAYSLOT, INJALDELAYSLOT): Define.
3829 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
3831 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
3833 * interp.c (sim_open): add flush_cache as a PMON routine
3834 (sim_monitor): handle flush_cache by ignoring it
3836 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
3838 * gencode.c (build_instruction): Use !ByteSwapMem instead of
3840 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
3841 (BigEndianMem): Rename to ByteSwapMem and change sense.
3842 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
3843 BigEndianMem references to !ByteSwapMem.
3844 (set_endianness): New function, with prototype.
3845 (sim_open): Call set_endianness.
3846 (sim_info): Use simBE instead of BigEndianMem.
3847 (xfer_direct_word, xfer_direct_long, swap_direct_word,
3848 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
3849 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
3850 ifdefs, keeping the prototype declaration.
3851 (swap_word): Rewrite correctly.
3852 (ColdReset): Delete references to CONFIG. Delete endianness related
3853 code; moved to set_endianness.
3855 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
3857 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
3858 * interp.c (CHECKHILO): Define away.
3859 (simSIGINT): New macro.
3860 (membank_size): Increase from 1MB to 2MB.
3861 (control_c): New function.
3862 (sim_resume): Rename parameter signal to signal_number. Add local
3863 variable prev. Call signal before and after simulate.
3864 (sim_stop_reason): Add simSIGINT support.
3865 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
3867 (sim_warning): Delete call to SignalException. Do call printf_filtered
3869 (AddressTranslation): Add #ifdef DEBUG around debugging message and
3870 a call to sim_warning.
3872 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
3874 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
3875 16 bit instructions.
3877 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
3879 Add support for mips16 (16 bit MIPS implementation):
3880 * gencode.c (inst_type): Add mips16 instruction encoding types.
3881 (GETDATASIZEINSN): Define.
3882 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
3883 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
3885 (MIPS16_DECODE): New table, for mips16 instructions.
3886 (bitmap_val): New static function.
3887 (struct mips16_op): Define.
3888 (mips16_op_table): New table, for mips16 operands.
3889 (build_mips16_operands): New static function.
3890 (process_instructions): If PC is odd, decode a mips16
3891 instruction. Break out instruction handling into new
3892 build_instruction function.
3893 (build_instruction): New static function, broken out of
3894 process_instructions. Check modifiers rather than flags for SHIFT
3895 bit count and m[ft]{hi,lo} direction.
3896 (usage): Pass program name to fprintf.
3897 (main): Remove unused variable this_option_optind. Change
3898 ``*loptarg++'' to ``loptarg++''.
3899 (my_strtoul): Parenthesize && within ||.
3900 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
3901 (simulate): If PC is odd, fetch a 16 bit instruction, and
3902 increment PC by 2 rather than 4.
3903 * configure.in: Add case for mips16*-*-*.
3904 * configure: Rebuild.
3906 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
3908 * interp.c: Allow -t to enable tracing in standalone simulator.
3909 Fix garbage output in trace file and error messages.
3911 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
3913 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
3914 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
3915 * configure.in: Simplify using macros in ../common/aclocal.m4.
3916 * configure: Regenerated.
3917 * tconfig.in: New file.
3919 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
3921 * interp.c: Fix bugs in 64-bit port.
3922 Use ansi function declarations for msvc compiler.
3923 Initialize and test file pointer in trace code.
3924 Prevent duplicate definition of LAST_EMED_REGNUM.
3926 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
3928 * interp.c (xfer_big_long): Prevent unwanted sign extension.
3930 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
3932 * interp.c (SignalException): Check for explicit terminating
3934 * gencode.c: Pass instruction value through SignalException()
3935 calls for Trap, Breakpoint and Syscall.
3937 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
3939 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
3940 only used on those hosts that provide it.
3941 * configure.in: Add sqrt() to list of functions to be checked for.
3942 * config.in: Re-generated.
3943 * configure: Re-generated.
3945 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
3947 * gencode.c (process_instructions): Call build_endian_shift when
3948 expanding STORE RIGHT, to fix swr.
3949 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
3950 clear the high bits.
3951 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
3952 Fix float to int conversions to produce signed values.
3954 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
3956 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
3957 (process_instructions): Correct handling of nor instruction.
3958 Correct shift count for 32 bit shift instructions. Correct sign
3959 extension for arithmetic shifts to not shift the number of bits in
3960 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
3961 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
3963 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
3964 It's OK to have a mult follow a mult. What's not OK is to have a
3965 mult follow an mfhi.
3966 (Convert): Comment out incorrect rounding code.
3968 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
3970 * interp.c (sim_monitor): Improved monitor printf
3971 simulation. Tidied up simulator warnings, and added "--log" option
3972 for directing warning message output.
3973 * gencode.c: Use sim_warning() rather than WARNING macro.
3975 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
3977 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
3978 getopt1.o, rather than on gencode.c. Link objects together.
3979 Don't link against -liberty.
3980 (gencode.o, getopt.o, getopt1.o): New targets.
3981 * gencode.c: Include <ctype.h> and "ansidecl.h".
3982 (AND): Undefine after including "ansidecl.h".
3983 (ULONG_MAX): Define if not defined.
3984 (OP_*): Don't define macros; now defined in opcode/mips.h.
3985 (main): Call my_strtoul rather than strtoul.
3986 (my_strtoul): New static function.
3988 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
3990 * gencode.c (process_instructions): Generate word64 and uword64
3991 instead of `long long' and `unsigned long long' data types.
3992 * interp.c: #include sysdep.h to get signals, and define default
3994 * (Convert): Work around for Visual-C++ compiler bug with type
3996 * support.h: Make things compile under Visual-C++ by using
3997 __int64 instead of `long long'. Change many refs to long long
3998 into word64/uword64 typedefs.
4000 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
4002 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
4003 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
4005 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
4006 (AC_PROG_INSTALL): Added.
4007 (AC_PROG_CC): Moved to before configure.host call.
4008 * configure: Rebuilt.
4010 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
4012 * configure.in: Define @SIMCONF@ depending on mips target.
4013 * configure: Rebuild.
4014 * Makefile.in (run): Add @SIMCONF@ to control simulator
4016 * gencode.c: Change LOADDRMASK to 64bit memory model only.
4017 * interp.c: Remove some debugging, provide more detailed error
4018 messages, update memory accesses to use LOADDRMASK.
4020 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
4022 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
4023 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
4025 * configure: Rebuild.
4026 * config.in: New file, generated by autoheader.
4027 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
4028 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
4029 HAVE_ANINT and HAVE_AINT, as appropriate.
4030 * Makefile.in (run): Use @LIBS@ rather than -lm.
4031 (interp.o): Depend upon config.h.
4032 (Makefile): Just rebuild Makefile.
4033 (clean): Remove stamp-h.
4034 (mostlyclean): Make the same as clean, not as distclean.
4035 (config.h, stamp-h): New targets.
4037 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
4039 * interp.c (ColdReset): Fix boolean test. Make all simulator
4042 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
4044 * interp.c (xfer_direct_word, xfer_direct_long,
4045 swap_direct_word, swap_direct_long, xfer_big_word,
4046 xfer_big_long, xfer_little_word, xfer_little_long,
4047 swap_word,swap_long): Added.
4048 * interp.c (ColdReset): Provide function indirection to
4049 host<->simulated_target transfer routines.
4050 * interp.c (sim_store_register, sim_fetch_register): Updated to
4051 make use of indirected transfer routines.
4053 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
4055 * gencode.c (process_instructions): Ensure FP ABS instruction
4057 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
4058 system call support.
4060 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
4062 * interp.c (sim_do_command): Complain if callback structure not
4065 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
4067 * interp.c (Convert): Provide round-to-nearest and round-to-zero
4068 support for Sun hosts.
4069 * Makefile.in (gencode): Ensure the host compiler and libraries
4070 used for cross-hosted build.
4072 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
4074 * interp.c, gencode.c: Some more (TODO) tidying.
4076 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
4078 * gencode.c, interp.c: Replaced explicit long long references with
4079 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
4080 * support.h (SET64LO, SET64HI): Macros added.
4082 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
4084 * configure: Regenerate with autoconf 2.7.
4086 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
4088 * interp.c (LoadMemory): Enclose text following #endif in /* */.
4089 * support.h: Remove superfluous "1" from #if.
4090 * support.h (CHECKSIM): Remove stray 'a' at end of line.
4092 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
4094 * interp.c (StoreFPR): Control UndefinedResult() call on
4095 WARN_RESULT manifest.
4097 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
4099 * gencode.c: Tidied instruction decoding, and added FP instruction
4102 * interp.c: Added dineroIII, and BSD profiling support. Also
4103 run-time FP handling.
4105 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
4107 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
4108 gencode.c, interp.c, support.h: created.
projects / deliverable / binutils-gdb.git / blob