sim/mips/ChangeLog

   1 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
   2
   3         * mips.igen: Fix formatting of all SignalException calls.
   4
   5 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
   6
   7         * sim-main.h (SIGNEXTEND): Remove.
   8
   9 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
  10
  11         * mips.igen: Remove gencode comment from top of file, fix
  12         spelling in another comment.
  13
  14 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
  15
  16         * mips.igen (check_fmt, check_fmt_p): New functions to check
  17         whether specific floating point formats are usable.
  18         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
  19         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
  20         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
  21         Use the new functions.
  22         (do_c_cond_fmt): Remove format checks...
  23         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
  24
  25 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
  26
  27         * mips.igen: Fix formatting of check_fpu calls.
  28
  29 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
  30
  31         * mips.igen (FLOOR.L.fmt): Store correct destination register.
  32
  33 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
  34
  35         * mips.igen: Remove whitespace at end of lines.
  36
  37 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
  38
  39         * mips.igen (loadstore_ea): New function to do effective
  40         address calculations.
  41         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
  42         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
  43         CACHE): Use loadstore_ea to do effective address computations.
  44
  45 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
  46
  47         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
  48         * mips.igen (LL, CxC1, MxC1): Likewise.
  49
  50 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
  51
  52         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
  53         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
  54         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
  55         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
  56         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
  57         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
  58         Don't split opcode fields by hand, use the opcode field values
  59         provided by igen.
  60
  61 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
  62
  63         * mips.igen (do_divu): Fix spacing.
  64
  65         * mips.igen (do_dsllv): Move to be right before DSLLV,
  66         to match the rest of the do_<shift> functions.
  67
  68 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
  69
  70         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
  71         DSRL32, do_dsrlv): Trace inputs and results.
  72
  73 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
  74
  75         * mips.igen (CACHE): Provide instruction-printing string.
  76
  77         * interp.c (signal_exception): Comment tokens after #endif.
  78
  79 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
  80
  81         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
  82         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
  83         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
  84         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
  85         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
  86         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
  87         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
  88         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
  89
  90 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
  91
  92         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
  93         instruction-printing string.
  94         (LWU): Use '64' as the filter flag.
  95
  96 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
  97
  98         * mips.igen (SDXC1): Fix instruction-printing string.
  99
 100 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 101
 102         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 103         filter flags "32,f".
 104
 105 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 106
 107         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 108         as the filter flag.
 109
 110 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 111
 112         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 113         add a comma) so that it more closely match the MIPS ISA
 114         documentation opcode partitioning.
 115         (PREF): Put useful names on opcode fields, and include
 116         instruction-printing string.
 117
 118 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 119
 120         * mips.igen (check_u64): New function which in the future will
 121         check whether 64-bit instructions are usable and signal an
 122         exception if not.  Currently a no-op.
 123         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 124         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 125         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 126         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 127
 128         * mips.igen (check_fpu): New function which in the future will
 129         check whether FPU instructions are usable and signal an exception
 130         if not.  Currently a no-op.
 131         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 132         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 133         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 134         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 135         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 136         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 137         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 138         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 139
 140 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 141
 142         * mips.igen (do_load_left, do_load_right): Move to be immediately
 143         following do_load.
 144         (do_store_left, do_store_right): Move to be immediately following
 145         do_store.
 146
 147 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 148
 149         * mips.igen (mipsV): New model name.  Also, add it to
 150         all instructions and functions where it is appropriate.
 151
 152 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 153
 154         * mips.igen: For all functions and instructions, list model
 155         names that support that instruction one per line.
 156
 157 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 158
 159         * mips.igen: Add some additional comments about supported
 160         models, and about which instructions go where.
 161         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 162         order as is used in the rest of the file.
 163
 164 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 165
 166         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 167         indicating that ALU32_END or ALU64_END are there to check
 168         for overflow.
 169         (DADD): Likewise, but also remove previous comment about
 170         overflow checking.
 171
 172 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 173
 174         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
 175         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
 176         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
 177         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
 178         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
 179         fields (i.e., add and move commas) so that they more closely
 180         match the MIPS ISA documentation opcode partitioning.
 181
 182 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 183
 184         * mips.igen (ADDI): Print immediate value.
 185         (BREAK): Print code.
 186         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
 187         (SLL): Print "nop" specially, and don't run the code
 188         that does the shift for the "nop" case.
 189
 190 2001-11-17  Fred Fish  <fnf@redhat.com>
 191
 192         * sim-main.h (float_operation): Move enum declaration outside
 193         of _sim_cpu struct declaration.
 194
 195 2001-04-12  Jim Blandy  <jimb@redhat.com>
 196
 197         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
 198         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
 199         set of the FCSR.
 200         * sim-main.h (COCIDX): Remove definition; this isn't supported by
 201         PENDING_FILL, and you can get the intended effect gracefully by
 202         calling PENDING_SCHED directly.
 203
 204 2001-02-23  Ben Elliston  <bje@redhat.com>
 205
 206         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
 207         already defined elsewhere.
 208
 209 2001-02-19  Ben Elliston  <bje@redhat.com>
 210
 211         * sim-main.h (sim_monitor): Return an int.
 212         * interp.c (sim_monitor): Add return values.
 213         (signal_exception): Handle error conditions from sim_monitor.
 214
 215 2001-02-08  Ben Elliston  <bje@redhat.com>
 216
 217         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
 218         (store_memory): Likewise, pass cia to sim_core_write*.
 219
 220 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
 221
 222         On advice from Chris G. Demetriou <cgd@sibyte.com>:
 223         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
 224
 225 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 226
 227         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
 228         * Makefile.in: Don't delete *.igen when cleaning directory.
 229
 230 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 231
 232         * m16.igen (break): Call SignalException not sim_engine_halt.
 233
 234 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 235
 236         From Jason Eckhardt:
 237         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
 238
 239 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 240
 241         * mips.igen (MxC1, DMxC1): Fix printf formatting.
 242
 243 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
 244
 245         * mips.igen (do_dmultx): Fix typo.
 246
 247 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 248
 249         * configure: Regenerated to track ../common/aclocal.m4 changes.
 250
 251 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 252
 253         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
 254
 255 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
 256
 257         * sim-main.h (GPR_CLEAR): Define macro.
 258
 259 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 260
 261         * interp.c (decode_coproc): Output long using %lx and not %s.
 262
 263 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
 264
 265         * interp.c (sim_open): Sort & extend dummy memory regions for
 266         --board=jmr3904 for eCos.
 267
 268 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
 269
 270         * configure: Regenerated.
 271
 272 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 273
 274         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
 275         calls, conditional on the simulator being in verbose mode.
 276
 277 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
 278
 279         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
 280         cache don't get ReservedInstruction traps.
 281
 282 1999-11-29  Mark Salter  <msalter@cygnus.com>
 283
 284         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
 285         to clear status bits in sdisr register. This is how the hardware works.
 286
 287         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
 288         being used by cygmon.
 289
 290 1999-11-11  Andrew Haley  <aph@cygnus.com>
 291
 292         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
 293         instructions.
 294
 295 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
 296
 297         * mips.igen (MULT): Correct previous mis-applied patch.
 298
 299 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
 300
 301         * mips.igen (delayslot32): Handle sequence like
 302         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
 303         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
 304         (MULT): Actually pass the third register...
 305
 306 1999-09-03  Mark Salter  <msalter@cygnus.com>
 307
 308         * interp.c (sim_open): Added more memory aliases for additional
 309         hardware being touched by cygmon on jmr3904 board.
 310
 311 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 312
 313         * configure: Regenerated to track ../common/aclocal.m4 changes.
 314
 315 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 316
 317         * interp.c (sim_store_register): Handle case where client - GDB -
 318         specifies that a 4 byte register is 8 bytes in size.
 319         (sim_fetch_register): Ditto.
 320
 321 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
 322
 323         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
 324         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
 325         (idt_monitor_base): Base address for IDT monitor traps.
 326         (pmon_monitor_base): Ditto for PMON.
 327         (lsipmon_monitor_base): Ditto for LSI PMON.
 328         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
 329         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
 330         (sim_firmware_command): New function.
 331         (mips_option_handler): Call it for OPTION_FIRMWARE.
 332         (sim_open): Allocate memory for idt_monitor region.  If "--board"
 333         option was given, add no monitor by default.  Add BREAK hooks only if
 334         monitors are also there.
 335
 336 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 337
 338         * interp.c (sim_monitor): Flush output before reading input.
 339
 340 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 341
 342         * tconfig.in (SIM_HANDLES_LMA): Always define.
 343
 344 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 345
 346         From Mark Salter <msalter@cygnus.com>:
 347         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
 348         (sim_open): Add setup for BSP board.
 349
 350 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 351
 352         * mips.igen (MULT, MULTU): Add syntax for two operand version.
 353         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
 354         them as unimplemented.
 355
 356 1999-05-08  Felix Lee  <flee@cygnus.com>
 357
 358         * configure: Regenerated to track ../common/aclocal.m4 changes.
 359
 360 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
 361
 362         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
 363
 364 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 365
 366         * configure.in: Any mips64vr5*-*-* target should have
 367         -DTARGET_ENABLE_FR=1.
 368         (default_endian): Any mips64vr*el-*-* target should default to
 369         LITTLE_ENDIAN.
 370         * configure: Re-generate.
 371
 372 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
 373
 374         * mips.igen (ldl): Extend from _16_, not 32.
 375
 376 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
 377
 378         * interp.c (sim_store_register): Force registers written to by GDB
 379         into an un-interpreted state.
 380
 381 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
 382
 383         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
 384         CPU, start periodic background I/O polls.
 385         (tx3904sio_poll): New function: periodic I/O poller.
 386
 387 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
 388
 389         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
 390
 391 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
 392
 393         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
 394         case statement.
 395
 396 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
 397
 398         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
 399         (load_word): Call SIM_CORE_SIGNAL hook on error.
 400         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
 401         starting.  For exception dispatching, pass PC instead of NULL_CIA.
 402         (decode_coproc): Use COP0_BADVADDR to store faulting address.
 403         * sim-main.h (COP0_BADVADDR): Define.
 404         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
 405         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
 406         (_sim_cpu): Add exc_* fields to store register value snapshots.
 407         * mips.igen (*): Replace memory-related SignalException* calls
 408         with references to SIM_CORE_SIGNAL hook.
 409
 410         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
 411         fix.
 412         * sim-main.c (*): Minor warning cleanups.
 413
 414 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
 415
 416         * m16.igen (DADDIU5): Correct type-o.
 417
 418 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
 419
 420         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
 421         variables.
 422
 423 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
 424
 425         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
 426         to include path.
 427         (interp.o): Add dependency on itable.h
 428         (oengine.c, gencode): Delete remaining references.
 429         (BUILT_SRC_FROM_GEN): Clean up.
 430
 431 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
 432
 433         * vr4run.c: New.
 434         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
 435         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
 436         tmp-run-hack) : New.
 437         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
 438         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
 439         Drop the "64" qualifier to get the HACK generator working.
 440         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
 441         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
 442         qualifier to get the hack generator working.
 443         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
 444         (DSLL): Use do_dsll.
 445         (DSLLV): Use do_dsllv.
 446         (DSRA): Use do_dsra.
 447         (DSRL): Use do_dsrl.
 448         (DSRLV): Use do_dsrlv.
 449         (BC1): Move *vr4100 to get the HACK generator working.
 450         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
 451         get the HACK generator working.
 452         (MACC) Rename to get the HACK generator working.
 453         (DMACC,MACCS,DMACCS): Add the 64.
 454
 455 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
 456
 457         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
 458         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
 459
 460 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
 461
 462     * mips/interp.c (DEBUG): Cleanups.
 463
 464 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
 465
 466         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
 467         (tx3904sio_tickle): fflush after a stdout character output.
 468
 469 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
 470
 471         * interp.c (sim_close): Uninstall modules.
 472
 473 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 474
 475         * sim-main.h, interp.c (sim_monitor): Change to global
 476         function.
 477
 478 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 479
 480         * configure.in (vr4100): Only include vr4100 instructions in
 481         simulator.
 482         * configure: Re-generate.
 483         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
 484
 485 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 486
 487         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
 488         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
 489         true alternative.
 490
 491         * configure.in (sim_default_gen, sim_use_gen): Replace with
 492         sim_gen.
 493         (--enable-sim-igen): Delete config option. Always using IGEN.
 494         * configure: Re-generate.
 495
 496         * Makefile.in (gencode): Kill, kill, kill.
 497         * gencode.c: Ditto.
 498
 499 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 500
 501         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
 502         bit mips16 igen simulator.
 503         * configure: Re-generate.
 504
 505         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
 506         as part of vr4100 ISA.
 507         * vr.igen: Mark all instructions as 64 bit only.
 508
 509 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 510
 511         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
 512         Pacify GCC.
 513
 514 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 515
 516         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
 517         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
 518         * configure: Re-generate.
 519
 520         * m16.igen (BREAK): Define breakpoint instruction.
 521         (JALX32): Mark instruction as mips16 and not r3900.
 522         * mips.igen (C.cond.fmt): Fix typo in instruction format.
 523
 524         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
 525
 526 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 527
 528         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
 529         insn as a debug breakpoint.
 530
 531         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
 532         pending.slot_size.
 533         (PENDING_SCHED): Clean up trace statement.
 534         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
 535         (PENDING_FILL): Delay write by only one cycle.
 536         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
 537
 538         * sim-main.c (pending_tick): Clean up trace statements. Add trace
 539         of pending writes.
 540         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
 541         32 & 64.
 542         (pending_tick): Move incrementing of index to FOR statement.
 543         (pending_tick): Only update PENDING_OUT after a write has occured.
 544
 545         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
 546         build simulator.
 547         * configure: Re-generate.
 548
 549         * interp.c (sim_engine_run OLD): Delete explicit call to
 550         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
 551
 552 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
 553
 554         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
 555         interrupt level number to match changed SignalExceptionInterrupt
 556         macro.
 557
 558 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
 559
 560         * interp.c: #include "itable.h" if WITH_IGEN.
 561         (get_insn_name): New function.
 562         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
 563         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
 564
 565 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
 566
 567         * configure: Rebuilt to inhale new common/aclocal.m4.
 568
 569 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
 570
 571         * dv-tx3904sio.c: Include sim-assert.h.
 572
 573 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
 574
 575         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
 576         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
 577         Reorganize target-specific sim-hardware checks.
 578         * configure: rebuilt.
 579         * interp.c (sim_open): For tx39 target boards, set
 580         OPERATING_ENVIRONMENT, add tx3904sio devices.
 581         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
 582         ROM executables.  Install dv-sockser into sim-modules list.
 583
 584         * dv-tx3904irc.c: Compiler warning clean-up.
 585         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
 586         frequent hw-trace messages.
 587
 588 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 589
 590         * vr.igen (MulAcc): Identify as a vr4100 specific function.
 591
 592 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 593
 594         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
 595
 596         * vr.igen: New file.
 597         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
 598         * mips.igen: Define vr4100 model. Include vr.igen.
 599 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
 600
 601         * mips.igen (check_mf_hilo): Correct check.
 602
 603 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 604
 605         * sim-main.h (interrupt_event): Add prototype.
 606
 607         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
 608         register_ptr, register_value.
 609         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
 610
 611         * sim-main.h (tracefh): Make extern.
 612
 613 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
 614
 615         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
 616         Reduce unnecessarily high timer event frequency.
 617         * dv-tx3904cpu.c: Ditto for interrupt event.
 618
 619 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
 620
 621         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
 622         to allay warnings.
 623         (interrupt_event): Made non-static.
 624
 625         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
 626         interchange of configuration values for external vs. internal
 627         clock dividers.
 628
 629 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
 630
 631         * mips.igen (BREAK): Moved code to here for
 632         simulator-reserved break instructions.
 633         * gencode.c (build_instruction): Ditto.
 634         * interp.c (signal_exception): Code moved from here.  Non-
 635         reserved instructions now use exception vector, rather
 636         than halting sim.
 637         * sim-main.h: Moved magic constants to here.
 638
 639 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
 640
 641         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
 642         register upon non-zero interrupt event level, clear upon zero
 643         event value.
 644         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
 645         by passing zero event value.
 646         (*_io_{read,write}_buffer): Endianness fixes.
 647         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
 648         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
 649
 650         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
 651         serial I/O and timer module at base address 0xFFFF0000.
 652
 653 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
 654
 655         * mips.igen (SWC1) : Correct the handling of ReverseEndian
 656         and BigEndianCPU.
 657
 658 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
 659
 660         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
 661         parts.
 662         * configure: Update.
 663
 664 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
 665
 666         * dv-tx3904tmr.c: New file - implements tx3904 timer.
 667         * dv-tx3904{irc,cpu}.c: Mild reformatting.
 668         * configure.in: Include tx3904tmr in hw_device list.
 669         * configure: Rebuilt.
 670         * interp.c (sim_open): Instantiate three timer instances.
 671         Fix address typo of tx3904irc instance.
 672
 673 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
 674
 675         * interp.c (signal_exception): SystemCall exception now uses
 676         the exception vector.
 677
 678 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
 679
 680         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
 681         to allay warnings.
 682
 683 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 684
 685         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
 686
 687 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 688
 689         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
 690
 691         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
 692         sim-main.h. Declare a struct hw_descriptor instead of struct
 693         hw_device_descriptor.
 694
 695 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 696
 697         * mips.igen (do_store_left, do_load_left): Compute nr of left and
 698         right bits and then re-align left hand bytes to correct byte
 699         lanes.  Fix incorrect computation in do_store_left when loading
 700         bytes from second word.
 701
 702 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 703
 704         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
 705         * interp.c (sim_open): Only create a device tree when HW is
 706         enabled.
 707
 708         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
 709         * interp.c (signal_exception): Ditto.
 710
 711 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
 712
 713         * gencode.c: Mark BEGEZALL as LIKELY.
 714
 715 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 716
 717         * sim-main.h (ALU32_END): Sign extend 32 bit results.
 718         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
 719
 720 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
 721
 722         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
 723         modules.  Recognize TX39 target with "mips*tx39" pattern.
 724         * configure: Rebuilt.
 725         * sim-main.h (*): Added many macros defining bits in
 726         TX39 control registers.
 727         (SignalInterrupt): Send actual PC instead of NULL.
 728         (SignalNMIReset): New exception type.
 729         * interp.c (board): New variable for future use to identify
 730         a particular board being simulated.
 731         (mips_option_handler,mips_options): Added "--board" option.
 732         (interrupt_event): Send actual PC.
 733         (sim_open): Make memory layout conditional on board setting.
 734         (signal_exception): Initial implementation of hardware interrupt
 735         handling.  Accept another break instruction variant for simulator
 736         exit.
 737         (decode_coproc): Implement RFE instruction for TX39.
 738         (mips.igen): Decode RFE instruction as such.
 739         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
 740         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
 741         bbegin to implement memory map.
 742         * dv-tx3904cpu.c: New file.
 743         * dv-tx3904irc.c: New file.
 744
 745 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
 746
 747         * mips.igen (check_mt_hilo): Create a separate r3900 version.
 748
 749 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
 750
 751         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
 752         with calls to check_div_hilo.
 753
 754 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
 755
 756         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
 757         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
 758         Add special r3900 version of do_mult_hilo.
 759         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
 760         with calls to check_mult_hilo.
 761         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
 762         with calls to check_div_hilo.
 763
 764 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 765
 766         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
 767         Document a replacement.
 768
 769 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
 770
 771         * interp.c (sim_monitor): Make mon_printf work.
 772
 773 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
 774
 775         * sim-main.h (INSN_NAME): New arg `cpu'.
 776
 777 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
 778
 779         * configure: Regenerated to track ../common/aclocal.m4 changes.
 780
 781 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
 782
 783         * configure: Regenerated to track ../common/aclocal.m4 changes.
 784         * config.in: Ditto.
 785
 786 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
 787
 788         * acconfig.h: New file.
 789         * configure.in: Reverted change of Apr 24; use sinclude again.
 790
 791 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
 792
 793         * configure: Regenerated to track ../common/aclocal.m4 changes.
 794         * config.in: Ditto.
 795
 796 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
 797
 798         * configure.in: Don't call sinclude.
 799
 800 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
 801
 802         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
 803
 804 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 805
 806         * mips.igen (ERET): Implement.
 807
 808         * interp.c (decode_coproc): Return sign-extended EPC.
 809
 810         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
 811
 812         * interp.c (signal_exception): Do not ignore Trap.
 813         (signal_exception): On TRAP, restart at exception address.
 814         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
 815         (signal_exception): Update.
 816         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
 817         so that TRAP instructions are caught.
 818
 819 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 820
 821         * sim-main.h (struct hilo_access, struct hilo_history): Define,
 822         contains HI/LO access history.
 823         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
 824         (HIACCESS, LOACCESS): Delete, replace with
 825         (HIHISTORY, LOHISTORY): New macros.
 826         (CHECKHILO): Delete all, moved to mips.igen
 827
 828         * gencode.c (build_instruction): Do not generate checks for
 829         correct HI/LO register usage.
 830
 831         * interp.c (old_engine_run): Delete checks for correct HI/LO
 832         register usage.
 833
 834         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
 835         check_mf_cycles): New functions.
 836         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
 837         do_divu, domultx, do_mult, do_multu): Use.
 838
 839         * tx.igen ("madd", "maddu"): Use.
 840
 841 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 842
 843         * mips.igen (DSRAV): Use function do_dsrav.
 844         (SRAV): Use new function do_srav.
 845
 846         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
 847         (B): Sign extend 11 bit immediate.
 848         (EXT-B*): Shift 16 bit immediate left by 1.
 849         (ADDIU*): Don't sign extend immediate value.
 850
 851 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 852
 853         * m16run.c (sim_engine_run): Restore CIA after handling an event.
 854
 855         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
 856         functions.
 857
 858         * mips.igen (delayslot32, nullify_next_insn): New functions.
 859         (m16.igen): Always include.
 860         (do_*): Add more tracing.
 861
 862         * m16.igen (delayslot16): Add NIA argument, could be called by a
 863         32 bit MIPS16 instruction.
 864
 865         * interp.c (ifetch16): Move function from here.
 866         * sim-main.c (ifetch16): To here.
 867
 868         * sim-main.c (ifetch16, ifetch32): Update to match current
 869         implementations of LH, LW.
 870         (signal_exception): Don't print out incorrect hex value of illegal
 871         instruction.
 872
 873 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 874
 875         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
 876         instruction.
 877
 878         * m16.igen: Implement MIPS16 instructions.
 879
 880         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
 881         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
 882         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
 883         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
 884         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
 885         bodies of corresponding code from 32 bit insn to these.  Also used
 886         by MIPS16 versions of functions.
 887
 888         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
 889         (IMEM16): Drop NR argument from macro.
 890
 891 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 892
 893         * Makefile.in (SIM_OBJS): Add sim-main.o.
 894
 895         * sim-main.h (address_translation, load_memory, store_memory,
 896         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
 897         as INLINE_SIM_MAIN.
 898         (pr_addr, pr_uword64): Declare.
 899         (sim-main.c): Include when H_REVEALS_MODULE_P.
 900
 901         * interp.c (address_translation, load_memory, store_memory,
 902         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
 903         from here.
 904         * sim-main.c: To here. Fix compilation problems.
 905
 906         * configure.in: Enable inlining.
 907         * configure: Re-config.
 908
 909 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 910
 911         * configure: Regenerated to track ../common/aclocal.m4 changes.
 912
 913 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 914
 915         * mips.igen: Include tx.igen.
 916         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
 917         * tx.igen: New file, contains MADD and MADDU.
 918
 919         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
 920         the hardwired constant `7'.
 921         (store_memory): Ditto.
 922         (LOADDRMASK): Move definition to sim-main.h.
 923
 924         mips.igen (MTC0): Enable for r3900.
 925         (ADDU): Add trace.
 926
 927         mips.igen (do_load_byte): Delete.
 928         (do_load, do_store, do_load_left, do_load_write, do_store_left,
 929         do_store_right): New functions.
 930         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
 931
 932         configure.in: Let the tx39 use igen again.
 933         configure: Update.
 934
 935 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 936
 937         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
 938         not an address sized quantity.  Return zero for cache sizes.
 939
 940 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 941
 942         * mips.igen (r3900): r3900 does not support 64 bit integer
 943         operations.
 944
 945 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
 946
 947         * configure.in (mipstx39*-*-*): Use gencode simulator rather
 948         than igen one.
 949         * configure : Rebuild.
 950
 951 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 952
 953         * configure: Regenerated to track ../common/aclocal.m4 changes.
 954
 955 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 956
 957         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
 958
 959 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
 960
 961         * configure: Regenerated to track ../common/aclocal.m4 changes.
 962         * config.in: Regenerated to track ../common/aclocal.m4 changes.
 963
 964 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 965
 966         * configure: Regenerated to track ../common/aclocal.m4 changes.
 967
 968 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 969
 970         * interp.c (Max, Min): Comment out functions. Not yet used.
 971
 972 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 973
 974         * configure: Regenerated to track ../common/aclocal.m4 changes.
 975
 976 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
 977
 978         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
 979         configurable settings for stand-alone simulator.
 980
 981         * configure.in: Added X11 search, just in case.
 982
 983         * configure: Regenerated.
 984
 985 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 986
 987         * interp.c (sim_write, sim_read, load_memory, store_memory):
 988         Replace sim_core_*_map with read_map, write_map, exec_map resp.
 989
 990 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 991
 992         * sim-main.h (GETFCC): Return an unsigned value.
 993
 994 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
 995
 996         * mips.igen (DIV): Fix check for -1 / MIN_INT.
 997         (DADD): Result destination is RD not RT.
 998
 999 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1000
1001         * sim-main.h (HIACCESS, LOACCESS): Always define.
1002
1003         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1004
1005         * interp.c (sim_info): Delete.
1006
1007 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1008
1009         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1010         (mips_option_handler): New argument `cpu'.
1011         (sim_open): Update call to sim_add_option_table.
1012
1013 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1014
1015         * mips.igen (CxC1): Add tracing.
1016
1017 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1018
1019         * sim-main.h (Max, Min): Declare.
1020
1021         * interp.c (Max, Min): New functions.
1022
1023         * mips.igen (BC1): Add tracing.
1024
1025 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1026
1027         * interp.c Added memory map for stack in vr4100
1028
1029 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1030
1031         * interp.c (load_memory): Add missing "break"'s.
1032
1033 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1034
1035         * interp.c (sim_store_register, sim_fetch_register): Pass in
1036         length parameter.  Return -1.
1037
1038 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1039
1040         * interp.c: Added hardware init hook, fixed warnings.
1041
1042 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1043
1044         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1045
1046 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1047
1048         * interp.c (ifetch16): New function.
1049
1050         * sim-main.h (IMEM32): Rename IMEM.
1051         (IMEM16_IMMED): Define.
1052         (IMEM16): Define.
1053         (DELAY_SLOT): Update.
1054
1055         * m16run.c (sim_engine_run): New file.
1056
1057         * m16.igen: All instructions except LB.
1058         (LB): Call do_load_byte.
1059         * mips.igen (do_load_byte): New function.
1060         (LB): Call do_load_byte.
1061
1062         * mips.igen: Move spec for insn bit size and high bit from here.
1063         * Makefile.in (tmp-igen, tmp-m16): To here.
1064
1065         * m16.dc: New file, decode mips16 instructions.
1066
1067         * Makefile.in (SIM_NO_ALL): Define.
1068         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1069
1070 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1071
1072         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1073         point unit to 32 bit registers.
1074         * configure: Re-generate.
1075
1076 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1077
1078         * configure.in (sim_use_gen): Make IGEN the default simulator
1079         generator for generic 32 and 64 bit mips targets.
1080         * configure: Re-generate.
1081
1082 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1083
1084         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1085         bitsize.
1086
1087         * interp.c (sim_fetch_register, sim_store_register): Read/write
1088         FGR from correct location.
1089         (sim_open): Set size of FGR's according to
1090         WITH_TARGET_FLOATING_POINT_BITSIZE.
1091
1092         * sim-main.h (FGR): Store floating point registers in a separate
1093         array.
1094
1095 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1096
1097         * configure: Regenerated to track ../common/aclocal.m4 changes.
1098
1099 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1100
1101         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1102
1103         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1104
1105         * interp.c (pending_tick): New function.  Deliver pending writes.
1106
1107         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1108         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1109         it can handle mixed sized quantites and single bits.
1110
1111 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1112
1113         * interp.c (oengine.h): Do not include when building with IGEN.
1114         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1115         (sim_info): Ditto for PROCESSOR_64BIT.
1116         (sim_monitor): Replace ut_reg with unsigned_word.
1117         (*): Ditto for t_reg.
1118         (LOADDRMASK): Define.
1119         (sim_open): Remove defunct check that host FP is IEEE compliant,
1120         using software to emulate floating point.
1121         (value_fpr, ...): Always compile, was conditional on HASFPU.
1122
1123 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1124
1125         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1126         size.
1127
1128         * interp.c (SD, CPU): Define.
1129         (mips_option_handler): Set flags in each CPU.
1130         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1131         (sim_close): Do not clear STATE, deleted anyway.
1132         (sim_write, sim_read): Assume CPU zero's vm should be used for
1133         data transfers.
1134         (sim_create_inferior): Set the PC for all processors.
1135         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1136         argument.
1137         (mips16_entry): Pass correct nr of args to store_word, load_word.
1138         (ColdReset): Cold reset all cpu's.
1139         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1140         (sim_monitor, load_memory, store_memory, signal_exception): Use
1141         `CPU' instead of STATE_CPU.
1142
1143
1144         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1145         SD or CPU_.
1146
1147         * sim-main.h (signal_exception): Add sim_cpu arg.
1148         (SignalException*): Pass both SD and CPU to signal_exception.
1149         * interp.c (signal_exception): Update.
1150
1151         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1152         Ditto
1153         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1154         address_translation): Ditto
1155         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1156
1157 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1158
1159         * configure: Regenerated to track ../common/aclocal.m4 changes.
1160
1161 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1162
1163         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1164
1165         * mips.igen (model): Map processor names onto BFD name.
1166
1167         * sim-main.h (CPU_CIA): Delete.
1168         (SET_CIA, GET_CIA): Define
1169
1170 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1171
1172         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1173         regiser.
1174
1175         * configure.in (default_endian): Configure a big-endian simulator
1176         by default.
1177         * configure: Re-generate.
1178
1179 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1180
1181         * configure: Regenerated to track ../common/aclocal.m4 changes.
1182
1183 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1184
1185         * interp.c (sim_monitor): Handle Densan monitor outbyte
1186         and inbyte functions.
1187
1188 1997-12-29  Felix Lee  <flee@cygnus.com>
1189
1190         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1191
1192 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1193
1194         * Makefile.in (tmp-igen): Arrange for $zero to always be
1195         reset to zero after every instruction.
1196
1197 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1198
1199         * configure: Regenerated to track ../common/aclocal.m4 changes.
1200         * config.in: Ditto.
1201
1202 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1203
1204         * mips.igen (MSUB): Fix to work like MADD.
1205         * gencode.c (MSUB): Similarly.
1206
1207 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1208
1209         * configure: Regenerated to track ../common/aclocal.m4 changes.
1210
1211 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1212
1213         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1214
1215 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1216
1217         * sim-main.h (sim-fpu.h): Include.
1218
1219         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1220         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1221         using host independant sim_fpu module.
1222
1223 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1224
1225         * interp.c (signal_exception): Report internal errors with SIGABRT
1226         not SIGQUIT.
1227
1228         * sim-main.h (C0_CONFIG): New register.
1229         (signal.h): No longer include.
1230
1231         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1232
1233 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1234
1235         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1236
1237 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1238
1239         * mips.igen: Tag vr5000 instructions.
1240         (ANDI): Was missing mipsIV model, fix assembler syntax.
1241         (do_c_cond_fmt): New function.
1242         (C.cond.fmt): Handle mips I-III which do not support CC field
1243         separatly.
1244         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1245         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1246         in IV3.2 spec.
1247         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1248         vr5000 which saves LO in a GPR separatly.
1249
1250         * configure.in (enable-sim-igen): For vr5000, select vr5000
1251         specific instructions.
1252         * configure: Re-generate.
1253
1254 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1255
1256         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1257
1258         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1259         fmt_uninterpreted_64 bit cases to switch.  Convert to
1260         fmt_formatted,
1261
1262         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1263
1264         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1265         as specified in IV3.2 spec.
1266         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1267
1268 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1269
1270         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1271         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1272         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1273         PENDING_FILL versions of instructions.  Simplify.
1274         (X): New function.
1275         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1276         instructions.
1277         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1278         a signed value.
1279         (MTHI, MFHI): Disable code checking HI-LO.
1280
1281         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1282         global.
1283         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1284
1285 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1286
1287         * gencode.c (build_mips16_operands): Replace IPC with cia.
1288
1289         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1290         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1291         IPC to `cia'.
1292         (UndefinedResult): Replace function with macro/function
1293         combination.
1294         (sim_engine_run): Don't save PC in IPC.
1295
1296         * sim-main.h (IPC): Delete.
1297
1298
1299         * interp.c (signal_exception, store_word, load_word,
1300         address_translation, load_memory, store_memory, cache_op,
1301         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1302         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1303         current instruction address - cia - argument.
1304         (sim_read, sim_write): Call address_translation directly.
1305         (sim_engine_run): Rename variable vaddr to cia.
1306         (signal_exception): Pass cia to sim_monitor
1307
1308         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1309         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1310         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1311
1312         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1313         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1314         SIM_ASSERT.
1315
1316         * interp.c (signal_exception): Pass restart address to
1317         sim_engine_restart.
1318
1319         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1320         idecode.o): Add dependency.
1321
1322         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1323         Delete definitions
1324         (DELAY_SLOT): Update NIA not PC with branch address.
1325         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1326
1327         * mips.igen: Use CIA not PC in branch calculations.
1328         (illegal): Call SignalException.
1329         (BEQ, ADDIU): Fix assembler.
1330
1331 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1332
1333         * m16.igen (JALX): Was missing.
1334
1335         * configure.in (enable-sim-igen): New configuration option.
1336         * configure: Re-generate.
1337
1338         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1339
1340         * interp.c (load_memory, store_memory): Delete parameter RAW.
1341         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1342         bypassing {load,store}_memory.
1343
1344         * sim-main.h (ByteSwapMem): Delete definition.
1345
1346         * Makefile.in (SIM_OBJS): Add sim-memopt module.
1347
1348         * interp.c (sim_do_command, sim_commands): Delete mips specific
1349         commands.  Handled by module sim-options.
1350
1351         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1352         (WITH_MODULO_MEMORY): Define.
1353
1354         * interp.c (sim_info): Delete code printing memory size.
1355
1356         * interp.c (mips_size): Nee sim_size, delete function.
1357         (power2): Delete.
1358         (monitor, monitor_base, monitor_size): Delete global variables.
1359         (sim_open, sim_close): Delete code creating monitor and other
1360         memory regions.  Use sim-memopts module, via sim_do_commandf, to
1361         manage memory regions.
1362         (load_memory, store_memory): Use sim-core for memory model.
1363
1364         * interp.c (address_translation): Delete all memory map code
1365         except line forcing 32 bit addresses.
1366
1367 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1368
1369         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
1370         trace options.
1371
1372         * interp.c (logfh, logfile): Delete globals.
1373         (sim_open, sim_close): Delete code opening & closing log file.
1374         (mips_option_handler): Delete -l and -n options.
1375         (OPTION mips_options): Ditto.
1376
1377         * interp.c (OPTION mips_options): Rename option trace to dinero.
1378         (mips_option_handler): Update.
1379
1380 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1381
1382         * interp.c (fetch_str): New function.
1383         (sim_monitor): Rewrite using sim_read & sim_write.
1384         (sim_open): Check magic number.
1385         (sim_open): Write monitor vectors into memory using sim_write.
1386         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1387         (sim_read, sim_write): Simplify - transfer data one byte at a
1388         time.
1389         (load_memory, store_memory): Clarify meaning of parameter RAW.
1390
1391         * sim-main.h (isHOST): Defete definition.
1392         (isTARGET): Mark as depreciated.
1393         (address_translation): Delete parameter HOST.
1394
1395         * interp.c (address_translation): Delete parameter HOST.
1396
1397 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1398
1399         * mips.igen:
1400
1401         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1402         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1403
1404 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1405
1406         * mips.igen: Add model filter field to records.
1407
1408 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1409
1410         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
1411
1412         interp.c (sim_engine_run): Do not compile function sim_engine_run
1413         when WITH_IGEN == 1.
1414
1415         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1416         target architecture.
1417
1418         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1419         igen. Replace with configuration variables sim_igen_flags /
1420         sim_m16_flags.
1421
1422         * m16.igen: New file.  Copy mips16 insns here.
1423         * mips.igen: From here.
1424
1425 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1426
1427         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1428         to top.
1429         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1430
1431 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
1432
1433         * gencode.c (build_instruction): Follow sim_write's lead in using
1434         BigEndianMem instead of !ByteSwapMem.
1435
1436 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1437
1438         * configure.in (sim_gen): Dependent on target, select type of
1439         generator.  Always select old style generator.
1440
1441         configure: Re-generate.
1442
1443         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1444         targets.
1445         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1446         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1447         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1448         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1449         SIM_@sim_gen@_*, set by autoconf.
1450
1451 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1452
1453         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1454
1455         * interp.c (ColdReset): Remove #ifdef HASFPU, check
1456         CURRENT_FLOATING_POINT instead.
1457
1458         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1459         (address_translation): Raise exception InstructionFetch when
1460         translation fails and isINSTRUCTION.
1461
1462         * interp.c (sim_open, sim_write, sim_monitor, store_word,
1463         sim_engine_run): Change type of of vaddr and paddr to
1464         address_word.
1465         (address_translation, prefetch, load_memory, store_memory,
1466         cache_op): Change type of vAddr and pAddr to address_word.
1467
1468         * gencode.c (build_instruction): Change type of vaddr and paddr to
1469         address_word.
1470
1471 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1472
1473         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1474         macro to obtain result of ALU op.
1475
1476 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1477
1478         * interp.c (sim_info): Call profile_print.
1479
1480 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1481
1482         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1483
1484         * sim-main.h (WITH_PROFILE): Do not define, defined in
1485         common/sim-config.h.  Use sim-profile module.
1486         (simPROFILE): Delete defintion.
1487
1488         * interp.c (PROFILE): Delete definition.
1489         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1490         (sim_close): Delete code writing profile histogram.
1491         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1492         Delete.
1493         (sim_engine_run): Delete code profiling the PC.
1494
1495 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1496
1497         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1498
1499         * interp.c (sim_monitor): Make register pointers of type
1500         unsigned_word*.
1501
1502         * sim-main.h: Make registers of type unsigned_word not
1503         signed_word.
1504
1505 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1506
1507         * interp.c (sync_operation): Rename from SyncOperation, make
1508         global, add SD argument.
1509         (prefetch): Rename from Prefetch, make global, add SD argument.
1510         (decode_coproc): Make global.
1511
1512         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1513
1514         * gencode.c (build_instruction): Generate DecodeCoproc not
1515         decode_coproc calls.
1516
1517         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1518         (SizeFGR): Move to sim-main.h
1519         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1520         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1521         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1522         sim-main.h.
1523         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1524         FP_RM_TOMINF, GETRM): Move to sim-main.h.
1525         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1526         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1527         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1528         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1529
1530         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1531         exception.
1532         (sim-alu.h): Include.
1533         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1534         (sim_cia): Typedef to instruction_address.
1535
1536 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1537
1538         * Makefile.in (interp.o): Rename generated file engine.c to
1539         oengine.c.
1540
1541         * interp.c: Update.
1542
1543 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1544
1545         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1546
1547 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1548
1549         * gencode.c (build_instruction): For "FPSQRT", output correct
1550         number of arguments to Recip.
1551
1552 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1553
1554         * Makefile.in (interp.o): Depends on sim-main.h
1555
1556         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1557
1558         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1559         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1560         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1561         STATE, DSSTATE): Define
1562         (GPR, FGRIDX, ..): Define.
1563
1564         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1565         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1566         (GPR, FGRIDX, ...): Delete macros.
1567
1568         * interp.c: Update names to match defines from sim-main.h
1569
1570 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1571
1572         * interp.c (sim_monitor): Add SD argument.
1573         (sim_warning): Delete.  Replace calls with calls to
1574         sim_io_eprintf.
1575         (sim_error): Delete. Replace calls with sim_io_error.
1576         (open_trace, writeout32, writeout16, getnum): Add SD argument.
1577         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1578         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1579         argument.
1580         (mips_size): Rename from sim_size. Add SD argument.
1581
1582         * interp.c (simulator): Delete global variable.
1583         (callback): Delete global variable.
1584         (mips_option_handler, sim_open, sim_write, sim_read,
1585         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1586         sim_size,sim_monitor): Use sim_io_* not callback->*.
1587         (sim_open): ZALLOC simulator struct.
1588         (PROFILE): Do not define.
1589
1590 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1591
1592         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1593         support.h with corresponding code.
1594
1595         * sim-main.h (word64, uword64), support.h: Move definition to
1596         sim-main.h.
1597         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1598
1599         * support.h: Delete
1600         * Makefile.in: Update dependencies
1601         * interp.c: Do not include.
1602
1603 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1604
1605         * interp.c (address_translation, load_memory, store_memory,
1606         cache_op): Rename to from AddressTranslation et.al., make global,
1607         add SD argument
1608
1609         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1610         CacheOp): Define.
1611
1612         * interp.c (SignalException): Rename to signal_exception, make
1613         global.
1614
1615         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1616
1617         * sim-main.h (SignalException, SignalExceptionInterrupt,
1618         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1619         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1620         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1621         Define.
1622
1623         * interp.c, support.h: Use.
1624
1625 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1626
1627         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1628         to value_fpr / store_fpr. Add SD argument.
1629         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1630         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1631
1632         * sim-main.h (ValueFPR, StoreFPR): Define.
1633
1634 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1635
1636         * interp.c (sim_engine_run): Check consistency between configure
1637         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1638         and HASFPU.
1639
1640         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1641         (mips_fpu): Configure WITH_FLOATING_POINT.
1642         (mips_endian): Configure WITH_TARGET_ENDIAN.
1643         * configure: Update.
1644
1645 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1646
1647         * configure: Regenerated to track ../common/aclocal.m4 changes.
1648
1649 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
1650
1651         * configure: Regenerated.
1652
1653 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
1654
1655         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1656
1657 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1658
1659         * gencode.c (print_igen_insn_models): Assume certain architectures
1660         include all mips* instructions.
1661         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1662         instruction.
1663
1664         * Makefile.in (tmp.igen): Add target. Generate igen input from
1665         gencode file.
1666
1667         * gencode.c (FEATURE_IGEN): Define.
1668         (main): Add --igen option.  Generate output in igen format.
1669         (process_instructions): Format output according to igen option.
1670         (print_igen_insn_format): New function.
1671         (print_igen_insn_models): New function.
1672         (process_instructions): Only issue warnings and ignore
1673         instructions when no FEATURE_IGEN.
1674
1675 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1676
1677         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1678         MIPS targets.
1679
1680 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1681
1682         * configure: Regenerated to track ../common/aclocal.m4 changes.
1683
1684 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1685
1686         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1687         SIM_RESERVED_BITS): Delete, moved to common.
1688         (SIM_EXTRA_CFLAGS): Update.
1689
1690 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1691
1692         * configure.in: Configure non-strict memory alignment.
1693         * configure: Regenerated to track ../common/aclocal.m4 changes.
1694
1695 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1696
1697         * configure: Regenerated to track ../common/aclocal.m4 changes.
1698
1699 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
1700
1701         * gencode.c (SDBBP,DERET): Added (3900) insns.
1702         (RFE): Turn on for 3900.
1703         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1704         (dsstate): Made global.
1705         (SUBTARGET_R3900): Added.
1706         (CANCELDELAYSLOT): New.
1707         (SignalException): Ignore SystemCall rather than ignore and
1708         terminate.  Add DebugBreakPoint handling.
1709         (decode_coproc): New insns RFE, DERET; and new registers Debug
1710         and DEPC protected by SUBTARGET_R3900.
1711         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1712         bits explicitly.
1713         * Makefile.in,configure.in: Add mips subtarget option.
1714         * configure: Update.
1715
1716 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
1717
1718         * gencode.c: Add r3900 (tx39).
1719
1720
1721 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
1722
1723         * gencode.c (build_instruction): Don't need to subtract 4 for
1724         JALR, just 2.
1725
1726 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
1727
1728         * interp.c: Correct some HASFPU problems.
1729
1730 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1731
1732         * configure: Regenerated to track ../common/aclocal.m4 changes.
1733
1734 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1735
1736         * interp.c (mips_options): Fix samples option short form, should
1737         be `x'.
1738
1739 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1740
1741         * interp.c (sim_info): Enable info code.  Was just returning.
1742
1743 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1744
1745         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1746         MFC0.
1747
1748 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1749
1750         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1751         constants.
1752         (build_instruction): Ditto for LL.
1753
1754 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
1755
1756         * configure: Regenerated to track ../common/aclocal.m4 changes.
1757
1758 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1759
1760         * configure: Regenerated to track ../common/aclocal.m4 changes.
1761         * config.in: Ditto.
1762
1763 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1764
1765         * interp.c (sim_open): Add call to sim_analyze_program, update
1766         call to sim_config.
1767
1768 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1769
1770         * interp.c (sim_kill): Delete.
1771         (sim_create_inferior): Add ABFD argument. Set PC from same.
1772         (sim_load): Move code initializing trap handlers from here.
1773         (sim_open): To here.
1774         (sim_load): Delete, use sim-hload.c.
1775
1776         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1777
1778 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1779
1780         * configure: Regenerated to track ../common/aclocal.m4 changes.
1781         * config.in: Ditto.
1782
1783 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1784
1785         * interp.c (sim_open): Add ABFD argument.
1786         (sim_load): Move call to sim_config from here.
1787         (sim_open): To here.  Check return status.
1788
1789 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
1790
1791         * gencode.c (build_instruction): Two arg MADD should
1792         not assign result to $0.
1793
1794 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
1795
1796         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1797         * sim/mips/configure.in: Regenerate.
1798
1799 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
1800
1801         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1802         signed8, unsigned8 et.al. types.
1803
1804         * interp.c (SUB_REG_FETCH): Handle both little and big endian
1805         hosts when selecting subreg.
1806
1807 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
1808
1809         * interp.c (sim_engine_run): Reset the ZERO register to zero
1810         regardless of FEATURE_WARN_ZERO.
1811         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1812
1813 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1814
1815         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1816         (SignalException): For BreakPoints ignore any mode bits and just
1817         save the PC.
1818         (SignalException): Always set the CAUSE register.
1819
1820 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1821
1822         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1823         exception has been taken.
1824
1825         * interp.c: Implement the ERET and mt/f sr instructions.
1826
1827 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1828
1829         * interp.c (SignalException): Don't bother restarting an
1830         interrupt.
1831
1832 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1833
1834         * interp.c (SignalException): Really take an interrupt.
1835         (interrupt_event): Only deliver interrupts when enabled.
1836
1837 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1838
1839         * interp.c (sim_info): Only print info when verbose.
1840         (sim_info) Use sim_io_printf for output.
1841
1842 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1843
1844         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1845         mips architectures.
1846
1847 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1848
1849         * interp.c (sim_do_command): Check for common commands if a
1850         simulator specific command fails.
1851
1852 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
1853
1854         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1855         and simBE when DEBUG is defined.
1856
1857 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1858
1859         * interp.c (interrupt_event): New function.  Pass exception event
1860         onto exception handler.
1861
1862         * configure.in: Check for stdlib.h.
1863         * configure: Regenerate.
1864
1865         * gencode.c (build_instruction): Add UNUSED attribute to tempS
1866         variable declaration.
1867         (build_instruction): Initialize memval1.
1868         (build_instruction): Add UNUSED attribute to byte, bigend,
1869         reverse.
1870         (build_operands): Ditto.
1871
1872         * interp.c: Fix GCC warnings.
1873         (sim_get_quit_code): Delete.
1874
1875         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1876         * Makefile.in: Ditto.
1877         * configure: Re-generate.
1878
1879         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1880
1881 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1882
1883         * interp.c (mips_option_handler): New function parse argumes using
1884         sim-options.
1885         (myname): Replace with STATE_MY_NAME.
1886         (sim_open): Delete check for host endianness - performed by
1887         sim_config.
1888         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1889         (sim_open): Move much of the initialization from here.
1890         (sim_load): To here.  After the image has been loaded and
1891         endianness set.
1892         (sim_open): Move ColdReset from here.
1893         (sim_create_inferior): To here.
1894         (sim_open): Make FP check less dependant on host endianness.
1895
1896         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1897         run.
1898         * interp.c (sim_set_callbacks): Delete.
1899
1900         * interp.c (membank, membank_base, membank_size): Replace with
1901         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1902         (sim_open): Remove call to callback->init. gdb/run do this.
1903
1904         * interp.c: Update
1905
1906         * sim-main.h (SIM_HAVE_FLATMEM): Define.
1907
1908         * interp.c (big_endian_p): Delete, replaced by
1909         current_target_byte_order.
1910
1911 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1912
1913         * interp.c (host_read_long, host_read_word, host_swap_word,
1914         host_swap_long): Delete. Using common sim-endian.
1915         (sim_fetch_register, sim_store_register): Use H2T.
1916         (pipeline_ticks): Delete.  Handled by sim-events.
1917         (sim_info): Update.
1918         (sim_engine_run): Update.
1919
1920 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1921
1922         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1923         reason from here.
1924         (SignalException): To here. Signal using sim_engine_halt.
1925         (sim_stop_reason): Delete, moved to common.
1926
1927 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
1928
1929         * interp.c (sim_open): Add callback argument.
1930         (sim_set_callbacks): Delete SIM_DESC argument.
1931         (sim_size): Ditto.
1932
1933 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1934
1935         * Makefile.in (SIM_OBJS): Add common modules.
1936
1937         * interp.c (sim_set_callbacks): Also set SD callback.
1938         (set_endianness, xfer_*, swap_*): Delete.
1939         (host_read_word, host_read_long, host_swap_word, host_swap_long):
1940         Change to functions using sim-endian macros.
1941         (control_c, sim_stop): Delete, use common version.
1942         (simulate): Convert into.
1943         (sim_engine_run): This function.
1944         (sim_resume): Delete.
1945
1946         * interp.c (simulation): New variable - the simulator object.
1947         (sim_kind): Delete global - merged into simulation.
1948         (sim_load): Cleanup.  Move PC assignment from here.
1949         (sim_create_inferior): To here.
1950
1951         * sim-main.h: New file.
1952         * interp.c (sim-main.h): Include.
1953
1954 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
1955
1956         * configure: Regenerated to track ../common/aclocal.m4 changes.
1957
1958 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
1959
1960         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1961
1962 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
1963
1964         * gencode.c (build_instruction): DIV instructions: check
1965         for division by zero and integer overflow before using
1966         host's division operation.
1967
1968 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
1969
1970         * Makefile.in (SIM_OBJS): Add sim-load.o.
1971         * interp.c: #include bfd.h.
1972         (target_byte_order): Delete.
1973         (sim_kind, myname, big_endian_p): New static locals.
1974         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
1975         after argument parsing.  Recognize -E arg, set endianness accordingly.
1976         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
1977         load file into simulator.  Set PC from bfd.
1978         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
1979         (set_endianness): Use big_endian_p instead of target_byte_order.
1980
1981 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1982
1983         * interp.c (sim_size): Delete prototype - conflicts with
1984         definition in remote-sim.h.  Correct definition.
1985
1986 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
1987
1988         * configure: Regenerated to track ../common/aclocal.m4 changes.
1989         * config.in: Ditto.
1990
1991 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
1992
1993         * interp.c (sim_open): New arg `kind'.
1994
1995         * configure: Regenerated to track ../common/aclocal.m4 changes.
1996
1997 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1998
1999         * configure: Regenerated to track ../common/aclocal.m4 changes.
2000
2001 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2002
2003         * interp.c (sim_open): Set optind to 0 before calling getopt.
2004
2005 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2006
2007         * configure: Regenerated to track ../common/aclocal.m4 changes.
2008
2009 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2010
2011         * interp.c : Replace uses of pr_addr with pr_uword64
2012         where the bit length is always 64 independent of SIM_ADDR.
2013         (pr_uword64) : added.
2014
2015 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2016
2017         * configure: Re-generate.
2018
2019 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2020
2021         * configure: Regenerate to track ../common/aclocal.m4 changes.
2022
2023 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2024
2025         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2026         in argv form.
2027         (other sim_*): New SIM_DESC argument.
2028
2029 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2030
2031         * interp.c: Fix printing of addresses for non-64-bit targets.
2032         (pr_addr): Add function to print address based on size.
2033
2034 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2035
2036         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2037
2038 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2039
2040         * gencode.c (build_mips16_operands): Correct computation of base
2041         address for extended PC relative instruction.
2042
2043 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2044
2045         * interp.c (mips16_entry): Add support for floating point cases.
2046         (SignalException): Pass floating point cases to mips16_entry.
2047         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2048         registers.
2049         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2050         or fmt_word.
2051         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2052         and then set the state to fmt_uninterpreted.
2053         (COP_SW): Temporarily set the state to fmt_word while calling
2054         ValueFPR.
2055
2056 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2057
2058         * gencode.c (build_instruction): The high order may be set in the
2059         comparison flags at any ISA level, not just ISA 4.
2060
2061 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2062
2063         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2064         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2065         * configure.in: sinclude ../common/aclocal.m4.
2066         * configure: Regenerated.
2067
2068 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2069
2070         * configure: Rebuild after change to aclocal.m4.
2071
2072 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2073
2074         * configure configure.in Makefile.in:  Update to new configure
2075         scheme which is more compatible with WinGDB builds.
2076         * configure.in:  Improve comment on how to run autoconf.
2077         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2078         * Makefile.in:  Use autoconf substitution to install common
2079         makefile fragment.
2080
2081 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2082
2083         * gencode.c (build_instruction): Use BigEndianCPU instead of
2084         ByteSwapMem.
2085
2086 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2087
2088         * interp.c (sim_monitor): Make output to stdout visible in
2089         wingdb's I/O log window.
2090
2091 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2092
2093         * support.h: Undo previous change to SIGTRAP
2094         and SIGQUIT values.
2095
2096 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2097
2098         * interp.c (store_word, load_word): New static functions.
2099         (mips16_entry): New static function.
2100         (SignalException): Look for mips16 entry and exit instructions.
2101         (simulate): Use the correct index when setting fpr_state after
2102         doing a pending move.
2103
2104 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2105
2106         * interp.c: Fix byte-swapping code throughout to work on
2107         both little- and big-endian hosts.
2108
2109 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2110
2111         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2112         with gdb/config/i386/xm-windows.h.
2113
2114 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2115
2116         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2117         that messes up arithmetic shifts.
2118
2119 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2120
2121         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2122         SIGTRAP and SIGQUIT for _WIN32.
2123
2124 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2125
2126         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2127         force a 64 bit multiplication.
2128         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2129         destination register is 0, since that is the default mips16 nop
2130         instruction.
2131
2132 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2133
2134         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2135         (build_endian_shift): Don't check proc64.
2136         (build_instruction): Always set memval to uword64.  Cast op2 to
2137         uword64 when shifting it left in memory instructions.  Always use
2138         the same code for stores--don't special case proc64.
2139
2140         * gencode.c (build_mips16_operands): Fix base PC value for PC
2141         relative operands.
2142         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2143         jal instruction.
2144         * interp.c (simJALDELAYSLOT): Define.
2145         (JALDELAYSLOT): Define.
2146         (INDELAYSLOT, INJALDELAYSLOT): Define.
2147         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2148
2149 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2150
2151         * interp.c (sim_open): add flush_cache as a PMON routine
2152         (sim_monitor): handle flush_cache by ignoring it
2153
2154 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2155
2156         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2157         BigEndianMem.
2158         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2159         (BigEndianMem): Rename to ByteSwapMem and change sense.
2160         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2161         BigEndianMem references to !ByteSwapMem.
2162         (set_endianness): New function, with prototype.
2163         (sim_open): Call set_endianness.
2164         (sim_info): Use simBE instead of BigEndianMem.
2165         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2166         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2167         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2168         ifdefs, keeping the prototype declaration.
2169         (swap_word): Rewrite correctly.
2170         (ColdReset): Delete references to CONFIG.  Delete endianness related
2171         code; moved to set_endianness.
2172
2173 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2174
2175         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2176         * interp.c (CHECKHILO): Define away.
2177         (simSIGINT): New macro.
2178         (membank_size): Increase from 1MB to 2MB.
2179         (control_c): New function.
2180         (sim_resume): Rename parameter signal to signal_number.  Add local
2181         variable prev.  Call signal before and after simulate.
2182         (sim_stop_reason): Add simSIGINT support.
2183         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2184         functions always.
2185         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2186         if logfh is NULL.
2187         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2188         a call to sim_warning.
2189
2190 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2191
2192         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2193         16 bit instructions.
2194
2195 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2196
2197         Add support for mips16 (16 bit MIPS implementation):
2198         * gencode.c (inst_type): Add mips16 instruction encoding types.
2199         (GETDATASIZEINSN): Define.
2200         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2201         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2202         mtlo.
2203         (MIPS16_DECODE): New table, for mips16 instructions.
2204         (bitmap_val): New static function.
2205         (struct mips16_op): Define.
2206         (mips16_op_table): New table, for mips16 operands.
2207         (build_mips16_operands): New static function.
2208         (process_instructions): If PC is odd, decode a mips16
2209         instruction.  Break out instruction handling into new
2210         build_instruction function.
2211         (build_instruction): New static function, broken out of
2212         process_instructions.  Check modifiers rather than flags for SHIFT
2213         bit count and m[ft]{hi,lo} direction.
2214         (usage): Pass program name to fprintf.
2215         (main): Remove unused variable this_option_optind.  Change
2216         ``*loptarg++'' to ``loptarg++''.
2217         (my_strtoul): Parenthesize && within ||.
2218         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2219         (simulate): If PC is odd, fetch a 16 bit instruction, and
2220         increment PC by 2 rather than 4.
2221         * configure.in: Add case for mips16*-*-*.
2222         * configure: Rebuild.
2223
2224 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2225
2226         * interp.c: Allow -t to enable tracing in standalone simulator.
2227         Fix garbage output in trace file and error messages.
2228
2229 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2230
2231         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2232         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2233         * configure.in: Simplify using macros in ../common/aclocal.m4.
2234         * configure: Regenerated.
2235         * tconfig.in: New file.
2236
2237 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2238
2239         * interp.c: Fix bugs in 64-bit port.
2240         Use ansi function declarations for msvc compiler.
2241         Initialize and test file pointer in trace code.
2242         Prevent duplicate definition of LAST_EMED_REGNUM.
2243
2244 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2245
2246         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2247
2248 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2249
2250         * interp.c (SignalException): Check for explicit terminating
2251         breakpoint value.
2252         * gencode.c: Pass instruction value through SignalException()
2253         calls for Trap, Breakpoint and Syscall.
2254
2255 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2256
2257         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2258         only used on those hosts that provide it.
2259         * configure.in: Add sqrt() to list of functions to be checked for.
2260         * config.in: Re-generated.
2261         * configure: Re-generated.
2262
2263 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2264
2265         * gencode.c (process_instructions): Call build_endian_shift when
2266         expanding STORE RIGHT, to fix swr.
2267         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2268         clear the high bits.
2269         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2270         Fix float to int conversions to produce signed values.
2271
2272 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2273
2274         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2275         (process_instructions): Correct handling of nor instruction.
2276         Correct shift count for 32 bit shift instructions. Correct sign
2277         extension for arithmetic shifts to not shift the number of bits in
2278         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2279         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2280         Fix madd.
2281         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2282         It's OK to have a mult follow a mult.  What's not OK is to have a
2283         mult follow an mfhi.
2284         (Convert): Comment out incorrect rounding code.
2285
2286 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2287
2288         * interp.c (sim_monitor): Improved monitor printf
2289         simulation. Tidied up simulator warnings, and added "--log" option
2290         for directing warning message output.
2291         * gencode.c: Use sim_warning() rather than WARNING macro.
2292
2293 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2294
2295         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2296         getopt1.o, rather than on gencode.c.  Link objects together.
2297         Don't link against -liberty.
2298         (gencode.o, getopt.o, getopt1.o): New targets.
2299         * gencode.c: Include <ctype.h> and "ansidecl.h".
2300         (AND): Undefine after including "ansidecl.h".
2301         (ULONG_MAX): Define if not defined.
2302         (OP_*): Don't define macros; now defined in opcode/mips.h.
2303         (main): Call my_strtoul rather than strtoul.
2304         (my_strtoul): New static function.
2305
2306 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2307
2308         * gencode.c (process_instructions):  Generate word64 and uword64
2309         instead of `long long' and `unsigned long long' data types.
2310         * interp.c:  #include sysdep.h to get signals, and define default
2311         for SIGBUS.
2312         * (Convert):  Work around for Visual-C++ compiler bug with type
2313         conversion.
2314         * support.h:  Make things compile under Visual-C++ by using
2315         __int64 instead of `long long'.  Change many refs to long long
2316         into word64/uword64 typedefs.
2317
2318 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2319
2320         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2321         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2322         (docdir): Removed.
2323         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2324         (AC_PROG_INSTALL): Added.
2325         (AC_PROG_CC): Moved to before configure.host call.
2326         * configure: Rebuilt.
2327
2328 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2329
2330         * configure.in: Define @SIMCONF@ depending on mips target.
2331         * configure: Rebuild.
2332         * Makefile.in (run): Add @SIMCONF@ to control simulator
2333         construction.
2334         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2335         * interp.c: Remove some debugging, provide more detailed error
2336         messages, update memory accesses to use LOADDRMASK.
2337
2338 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2339
2340         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2341         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2342         stamp-h.
2343         * configure: Rebuild.
2344         * config.in: New file, generated by autoheader.
2345         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
2346         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
2347         HAVE_ANINT and HAVE_AINT, as appropriate.
2348         * Makefile.in (run): Use @LIBS@ rather than -lm.
2349         (interp.o): Depend upon config.h.
2350         (Makefile): Just rebuild Makefile.
2351         (clean): Remove stamp-h.
2352         (mostlyclean): Make the same as clean, not as distclean.
2353         (config.h, stamp-h): New targets.
2354
2355 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2356
2357         * interp.c (ColdReset): Fix boolean test. Make all simulator
2358         globals static.
2359
2360 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
2361
2362         * interp.c (xfer_direct_word, xfer_direct_long,
2363         swap_direct_word, swap_direct_long, xfer_big_word,
2364         xfer_big_long, xfer_little_word, xfer_little_long,
2365         swap_word,swap_long): Added.
2366         * interp.c (ColdReset): Provide function indirection to
2367         host<->simulated_target transfer routines.
2368         * interp.c (sim_store_register, sim_fetch_register): Updated to
2369         make use of indirected transfer routines.
2370
2371 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
2372
2373         * gencode.c (process_instructions): Ensure FP ABS instruction
2374         recognised.
2375         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2376         system call support.
2377
2378 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
2379
2380         * interp.c (sim_do_command): Complain if callback structure not
2381         initialised.
2382
2383 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
2384
2385         * interp.c (Convert): Provide round-to-nearest and round-to-zero
2386         support for Sun hosts.
2387         * Makefile.in (gencode): Ensure the host compiler and libraries
2388         used for cross-hosted build.
2389
2390 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
2391
2392         * interp.c, gencode.c: Some more (TODO) tidying.
2393
2394 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
2395
2396         * gencode.c, interp.c: Replaced explicit long long references with
2397         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2398         * support.h (SET64LO, SET64HI): Macros added.
2399
2400 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
2401
2402         * configure: Regenerate with autoconf 2.7.
2403
2404 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
2405
2406         * interp.c (LoadMemory): Enclose text following #endif in /* */.
2407         * support.h: Remove superfluous "1" from #if.
2408         * support.h (CHECKSIM): Remove stray 'a' at end of line.
2409
2410 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
2411
2412         * interp.c (StoreFPR): Control UndefinedResult() call on
2413         WARN_RESULT manifest.
2414
2415 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
2416
2417         * gencode.c: Tidied instruction decoding, and added FP instruction
2418         support.
2419
2420         * interp.c: Added dineroIII, and BSD profiling support. Also
2421         run-time FP handling.
2422
2423 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
2424
2425         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2426         gencode.c, interp.c, support.h: created.