1 2002-03-02 Chris Demetriou <cgd@broadcom.com>
3 * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
4 * mips.igen (LL, CxC1, MxC1): Likewise.
6 2002-03-02 Chris Demetriou <cgd@broadcom.com>
8 * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
9 CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
10 FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
11 MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
12 NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
13 SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
14 Don't split opcode fields by hand, use the opcode field values
17 2002-03-01 Chris Demetriou <cgd@broadcom.com>
19 * mips.igen (do_divu): Fix spacing.
21 * mips.igen (do_dsllv): Move to be right before DSLLV,
22 to match the rest of the do_<shift> functions.
24 2002-03-01 Chris Demetriou <cgd@broadcom.com>
26 * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
27 DSRL32, do_dsrlv): Trace inputs and results.
29 2002-03-01 Chris Demetriou <cgd@broadcom.com>
31 * mips.igen (CACHE): Provide instruction-printing string.
33 * interp.c (signal_exception): Comment tokens after #endif.
35 2002-02-28 Chris Demetriou <cgd@broadcom.com>
37 * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
38 (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
39 NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
40 ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
41 CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
42 C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
43 SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
44 LWC1, SWC1): Add "f" to filter, since these are FP instructions.
46 2002-02-28 Chris Demetriou <cgd@broadcom.com>
48 * mips.igen (DSRA32, DSRAV): Fix order of arguments in
49 instruction-printing string.
50 (LWU): Use '64' as the filter flag.
52 2002-02-28 Chris Demetriou <cgd@broadcom.com>
54 * mips.igen (SDXC1): Fix instruction-printing string.
56 2002-02-28 Chris Demetriou <cgd@broadcom.com>
58 * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
61 2002-02-27 Chris Demetriou <cgd@broadcom.com>
63 * mips.igen (PREFX): This is a 64-bit instruction, use '64'
66 2002-02-27 Chris Demetriou <cgd@broadcom.com>
68 * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
69 add a comma) so that it more closely match the MIPS ISA
70 documentation opcode partitioning.
71 (PREF): Put useful names on opcode fields, and include
72 instruction-printing string.
74 2002-02-27 Chris Demetriou <cgd@broadcom.com>
76 * mips.igen (check_u64): New function which in the future will
77 check whether 64-bit instructions are usable and signal an
78 exception if not. Currently a no-op.
79 (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
80 DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
81 DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
82 LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
84 * mips.igen (check_fpu): New function which in the future will
85 check whether FPU instructions are usable and signal an exception
86 if not. Currently a no-op.
87 (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
88 CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
89 CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
90 LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
91 MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
92 NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
93 ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
94 SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
96 2002-02-27 Chris Demetriou <cgd@broadcom.com>
98 * mips.igen (do_load_left, do_load_right): Move to be immediately
100 (do_store_left, do_store_right): Move to be immediately following
103 2002-02-27 Chris Demetriou <cgd@broadcom.com>
105 * mips.igen (mipsV): New model name. Also, add it to
106 all instructions and functions where it is appropriate.
108 2002-02-18 Chris Demetriou <cgd@broadcom.com>
110 * mips.igen: For all functions and instructions, list model
111 names that support that instruction one per line.
113 2002-02-11 Chris Demetriou <cgd@broadcom.com>
115 * mips.igen: Add some additional comments about supported
116 models, and about which instructions go where.
117 (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
118 order as is used in the rest of the file.
120 2002-02-11 Chris Demetriou <cgd@broadcom.com>
122 * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
123 indicating that ALU32_END or ALU64_END are there to check
125 (DADD): Likewise, but also remove previous comment about
128 2002-02-10 Chris Demetriou <cgd@broadcom.com>
130 * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
131 DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
132 JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
133 SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
134 ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
135 fields (i.e., add and move commas) so that they more closely
136 match the MIPS ISA documentation opcode partitioning.
138 2002-02-10 Chris Demetriou <cgd@broadcom.com>
140 * mips.igen (ADDI): Print immediate value.
142 (DADDIU, DSRAV, DSRLV): Print correct instruction name.
143 (SLL): Print "nop" specially, and don't run the code
144 that does the shift for the "nop" case.
146 2001-11-17 Fred Fish <fnf@redhat.com>
148 * sim-main.h (float_operation): Move enum declaration outside
149 of _sim_cpu struct declaration.
151 2001-04-12 Jim Blandy <jimb@redhat.com>
153 * mips.igen (CFC1, CTC1): Pass the correct register numbers to
154 PENDING_FILL. Use PENDING_SCHED directly to handle the pending
156 * sim-main.h (COCIDX): Remove definition; this isn't supported by
157 PENDING_FILL, and you can get the intended effect gracefully by
158 calling PENDING_SCHED directly.
160 2001-02-23 Ben Elliston <bje@redhat.com>
162 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
163 already defined elsewhere.
165 2001-02-19 Ben Elliston <bje@redhat.com>
167 * sim-main.h (sim_monitor): Return an int.
168 * interp.c (sim_monitor): Add return values.
169 (signal_exception): Handle error conditions from sim_monitor.
171 2001-02-08 Ben Elliston <bje@redhat.com>
173 * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
174 (store_memory): Likewise, pass cia to sim_core_write*.
176 2000-10-19 Frank Ch. Eigler <fche@redhat.com>
178 On advice from Chris G. Demetriou <cgd@sibyte.com>:
179 * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
181 Thu Jul 27 22:02:05 2000 Andrew Cagney <cagney@b1.cygnus.com>
183 From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
184 * Makefile.in: Don't delete *.igen when cleaning directory.
186 Wed Jul 19 18:50:51 2000 Andrew Cagney <cagney@b1.cygnus.com>
188 * m16.igen (break): Call SignalException not sim_engine_halt.
190 Mon Jul 3 11:13:20 2000 Andrew Cagney <cagney@b1.cygnus.com>
193 * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
195 Tue Jun 13 20:52:07 2000 Andrew Cagney <cagney@b1.cygnus.com>
197 * mips.igen (MxC1, DMxC1): Fix printf formatting.
199 2000-05-24 Michael Hayes <mhayes@cygnus.com>
201 * mips.igen (do_dmultx): Fix typo.
203 Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com>
205 * configure: Regenerated to track ../common/aclocal.m4 changes.
207 Fri Apr 28 20:48:36 2000 Andrew Cagney <cagney@b1.cygnus.com>
209 * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
211 2000-04-12 Frank Ch. Eigler <fche@redhat.com>
213 * sim-main.h (GPR_CLEAR): Define macro.
215 Mon Apr 10 00:07:09 2000 Andrew Cagney <cagney@b1.cygnus.com>
217 * interp.c (decode_coproc): Output long using %lx and not %s.
219 2000-03-21 Frank Ch. Eigler <fche@redhat.com>
221 * interp.c (sim_open): Sort & extend dummy memory regions for
222 --board=jmr3904 for eCos.
224 2000-03-02 Frank Ch. Eigler <fche@redhat.com>
226 * configure: Regenerated.
228 Tue Feb 8 18:35:01 2000 Donald Lindsay <dlindsay@hound.cygnus.com>
230 * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
231 calls, conditional on the simulator being in verbose mode.
233 Fri Feb 4 09:45:15 2000 Donald Lindsay <dlindsay@cygnus.com>
235 * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
236 cache don't get ReservedInstruction traps.
238 1999-11-29 Mark Salter <msalter@cygnus.com>
240 * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
241 to clear status bits in sdisr register. This is how the hardware works.
243 * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
244 being used by cygmon.
246 1999-11-11 Andrew Haley <aph@cygnus.com>
248 * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
251 Thu Sep 9 15:12:08 1999 Geoffrey Keating <geoffk@cygnus.com>
253 * mips.igen (MULT): Correct previous mis-applied patch.
255 Tue Sep 7 13:34:54 1999 Geoffrey Keating <geoffk@cygnus.com>
257 * mips.igen (delayslot32): Handle sequence like
258 mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
259 correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
260 (MULT): Actually pass the third register...
262 1999-09-03 Mark Salter <msalter@cygnus.com>
264 * interp.c (sim_open): Added more memory aliases for additional
265 hardware being touched by cygmon on jmr3904 board.
267 Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com>
269 * configure: Regenerated to track ../common/aclocal.m4 changes.
271 Tue Jul 27 16:36:51 1999 Andrew Cagney <cagney@amy.cygnus.com>
273 * interp.c (sim_store_register): Handle case where client - GDB -
274 specifies that a 4 byte register is 8 bytes in size.
275 (sim_fetch_register): Ditto.
277 1999-07-14 Frank Ch. Eigler <fche@cygnus.com>
279 Implement "sim firmware" option, inspired by jimb's version of 1998-01.
280 * interp.c (firmware_option_p): New global flag: "sim firmware" given.
281 (idt_monitor_base): Base address for IDT monitor traps.
282 (pmon_monitor_base): Ditto for PMON.
283 (lsipmon_monitor_base): Ditto for LSI PMON.
284 (MONITOR_BASE, MONITOR_SIZE): Removed macros.
285 (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
286 (sim_firmware_command): New function.
287 (mips_option_handler): Call it for OPTION_FIRMWARE.
288 (sim_open): Allocate memory for idt_monitor region. If "--board"
289 option was given, add no monitor by default. Add BREAK hooks only if
290 monitors are also there.
292 Mon Jul 12 00:02:27 1999 Andrew Cagney <cagney@amy.cygnus.com>
294 * interp.c (sim_monitor): Flush output before reading input.
296 Sun Jul 11 19:28:11 1999 Andrew Cagney <cagney@b1.cygnus.com>
298 * tconfig.in (SIM_HANDLES_LMA): Always define.
300 Thu Jul 8 16:06:59 1999 Andrew Cagney <cagney@b1.cygnus.com>
302 From Mark Salter <msalter@cygnus.com>:
303 * interp.c (BOARD_BSP): Define. Add to list of possible boards.
304 (sim_open): Add setup for BSP board.
306 Wed Jul 7 12:45:58 1999 Andrew Cagney <cagney@b1.cygnus.com>
308 * mips.igen (MULT, MULTU): Add syntax for two operand version.
309 (DMFC0, DMTC0): Recognize. Call DecodeCoproc which will report
310 them as unimplemented.
312 1999-05-08 Felix Lee <flee@cygnus.com>
314 * configure: Regenerated to track ../common/aclocal.m4 changes.
316 1999-04-21 Frank Ch. Eigler <fche@cygnus.com>
318 * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
320 Thu Apr 15 14:15:17 1999 Andrew Cagney <cagney@amy.cygnus.com>
322 * configure.in: Any mips64vr5*-*-* target should have
323 -DTARGET_ENABLE_FR=1.
324 (default_endian): Any mips64vr*el-*-* target should default to
326 * configure: Re-generate.
328 1999-02-19 Gavin Romig-Koch <gavin@cygnus.com>
330 * mips.igen (ldl): Extend from _16_, not 32.
332 Wed Jan 27 18:51:38 1999 Andrew Cagney <cagney@chook.cygnus.com>
334 * interp.c (sim_store_register): Force registers written to by GDB
335 into an un-interpreted state.
337 1999-02-05 Frank Ch. Eigler <fche@cygnus.com>
339 * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
340 CPU, start periodic background I/O polls.
341 (tx3904sio_poll): New function: periodic I/O poller.
343 1998-12-30 Frank Ch. Eigler <fche@cygnus.com>
345 * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
347 Tue Dec 29 16:03:53 1998 Rainer Orth <ro@TechFak.Uni-Bielefeld.DE>
349 * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
352 1998-12-29 Frank Ch. Eigler <fche@cygnus.com>
354 * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
355 (load_word): Call SIM_CORE_SIGNAL hook on error.
356 (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
357 starting. For exception dispatching, pass PC instead of NULL_CIA.
358 (decode_coproc): Use COP0_BADVADDR to store faulting address.
359 * sim-main.h (COP0_BADVADDR): Define.
360 (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
361 (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
362 (_sim_cpu): Add exc_* fields to store register value snapshots.
363 * mips.igen (*): Replace memory-related SignalException* calls
364 with references to SIM_CORE_SIGNAL hook.
366 * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
368 * sim-main.c (*): Minor warning cleanups.
370 1998-12-24 Gavin Romig-Koch <gavin@cygnus.com>
372 * m16.igen (DADDIU5): Correct type-o.
374 Mon Dec 21 10:34:48 1998 Andrew Cagney <cagney@chook>
376 * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
379 Wed Dec 16 18:20:28 1998 Andrew Cagney <cagney@chook>
381 * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
383 (interp.o): Add dependency on itable.h
384 (oengine.c, gencode): Delete remaining references.
385 (BUILT_SRC_FROM_GEN): Clean up.
387 1998-12-16 Gavin Romig-Koch <gavin@cygnus.com>
390 * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
391 tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
393 * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
394 DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
395 Drop the "64" qualifier to get the HACK generator working.
396 Use IMMEDIATE rather than IMMED. Use SHAMT rather than SHIFT.
397 * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
398 qualifier to get the hack generator working.
399 (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
401 (DSLLV): Use do_dsllv.
404 (DSRLV): Use do_dsrlv.
405 (BC1): Move *vr4100 to get the HACK generator working.
406 (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
407 get the HACK generator working.
408 (MACC) Rename to get the HACK generator working.
409 (DMACC,MACCS,DMACCS): Add the 64.
411 1998-12-12 Gavin Romig-Koch <gavin@cygnus.com>
413 * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
414 * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
416 1998-12-11 Gavin Romig-Koch <gavin@cygnus.com>
418 * mips/interp.c (DEBUG): Cleanups.
420 1998-12-10 Frank Ch. Eigler <fche@cygnus.com>
422 * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
423 (tx3904sio_tickle): fflush after a stdout character output.
425 1998-12-03 Frank Ch. Eigler <fche@cygnus.com>
427 * interp.c (sim_close): Uninstall modules.
429 Wed Nov 25 13:41:03 1998 Andrew Cagney <cagney@b1.cygnus.com>
431 * sim-main.h, interp.c (sim_monitor): Change to global
434 Wed Nov 25 17:33:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
436 * configure.in (vr4100): Only include vr4100 instructions in
438 * configure: Re-generate.
439 * m16.igen (*): Tag all mips16 instructions as also being vr4100.
441 Mon Nov 23 18:20:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
443 * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
444 * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
447 * configure.in (sim_default_gen, sim_use_gen): Replace with
449 (--enable-sim-igen): Delete config option. Always using IGEN.
450 * configure: Re-generate.
452 * Makefile.in (gencode): Kill, kill, kill.
455 Mon Nov 23 18:07:36 1998 Andrew Cagney <cagney@b1.cygnus.com>
457 * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
458 bit mips16 igen simulator.
459 * configure: Re-generate.
461 * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
462 as part of vr4100 ISA.
463 * vr.igen: Mark all instructions as 64 bit only.
465 Mon Nov 23 17:07:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
467 * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
470 Mon Nov 23 13:23:40 1998 Andrew Cagney <cagney@b1.cygnus.com>
472 * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
473 mipsIII/mips16 igen simulator. Fix sim_gen VS sim_igen typos.
474 * configure: Re-generate.
476 * m16.igen (BREAK): Define breakpoint instruction.
477 (JALX32): Mark instruction as mips16 and not r3900.
478 * mips.igen (C.cond.fmt): Fix typo in instruction format.
480 * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
482 Sat Nov 7 09:54:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
484 * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
485 insn as a debug breakpoint.
487 * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
489 (PENDING_SCHED): Clean up trace statement.
490 (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
491 (PENDING_FILL): Delay write by only one cycle.
492 (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
494 * sim-main.c (pending_tick): Clean up trace statements. Add trace
496 (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
498 (pending_tick): Move incrementing of index to FOR statement.
499 (pending_tick): Only update PENDING_OUT after a write has occured.
501 * configure.in: Add explicit mips-lsi-* target. Use gencode to
503 * configure: Re-generate.
505 * interp.c (sim_engine_run OLD): Delete explicit call to
506 PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
508 Sat Oct 30 09:49:10 1998 Frank Ch. Eigler <fche@cygnus.com>
510 * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
511 interrupt level number to match changed SignalExceptionInterrupt
514 Fri Oct 9 18:02:25 1998 Doug Evans <devans@canuck.cygnus.com>
516 * interp.c: #include "itable.h" if WITH_IGEN.
517 (get_insn_name): New function.
518 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
519 * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
521 Mon Sep 14 12:36:44 1998 Frank Ch. Eigler <fche@cygnus.com>
523 * configure: Rebuilt to inhale new common/aclocal.m4.
525 Tue Sep 1 15:39:18 1998 Frank Ch. Eigler <fche@cygnus.com>
527 * dv-tx3904sio.c: Include sim-assert.h.
529 Tue Aug 25 12:49:46 1998 Frank Ch. Eigler <fche@cygnus.com>
531 * dv-tx3904sio.c: New file: tx3904 serial I/O module.
532 * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
533 Reorganize target-specific sim-hardware checks.
534 * configure: rebuilt.
535 * interp.c (sim_open): For tx39 target boards, set
536 OPERATING_ENVIRONMENT, add tx3904sio devices.
537 * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
538 ROM executables. Install dv-sockser into sim-modules list.
540 * dv-tx3904irc.c: Compiler warning clean-up.
541 * dv-tx3904tmr.c: Compiler warning clean-up. Remove particularly
542 frequent hw-trace messages.
544 Fri Jul 31 18:14:16 1998 Andrew Cagney <cagney@b1.cygnus.com>
546 * vr.igen (MulAcc): Identify as a vr4100 specific function.
548 Sat Jul 25 16:03:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
550 * Makefile.in (IGEN_INCLUDE): Add vr.igen.
553 (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
554 * mips.igen: Define vr4100 model. Include vr.igen.
555 Mon Jun 29 09:21:07 1998 Gavin Koch <gavin@cygnus.com>
557 * mips.igen (check_mf_hilo): Correct check.
559 Wed Jun 17 12:20:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
561 * sim-main.h (interrupt_event): Add prototype.
563 * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
564 register_ptr, register_value.
565 (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
567 * sim-main.h (tracefh): Make extern.
569 Tue Jun 16 14:39:00 1998 Frank Ch. Eigler <fche@cygnus.com>
571 * dv-tx3904tmr.c: Deschedule timer event after dispatching.
572 Reduce unnecessarily high timer event frequency.
573 * dv-tx3904cpu.c: Ditto for interrupt event.
575 Wed Jun 10 13:22:32 1998 Frank Ch. Eigler <fche@cygnus.com>
577 * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
579 (interrupt_event): Made non-static.
581 * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
582 interchange of configuration values for external vs. internal
585 Tue Jun 9 12:46:24 1998 Ian Carmichael <iancarm@cygnus.com>
587 * mips.igen (BREAK): Moved code to here for
588 simulator-reserved break instructions.
589 * gencode.c (build_instruction): Ditto.
590 * interp.c (signal_exception): Code moved from here. Non-
591 reserved instructions now use exception vector, rather
593 * sim-main.h: Moved magic constants to here.
595 Tue Jun 9 12:29:50 1998 Frank Ch. Eigler <fche@cygnus.com>
597 * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
598 register upon non-zero interrupt event level, clear upon zero
600 * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
601 by passing zero event value.
602 (*_io_{read,write}_buffer): Endianness fixes.
603 * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
604 (deliver_*_tick): Reduce sim event interval to 75% of count interval.
606 * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
607 serial I/O and timer module at base address 0xFFFF0000.
609 Tue Jun 9 11:52:29 1998 Gavin Koch <gavin@cygnus.com>
611 * mips.igen (SWC1) : Correct the handling of ReverseEndian
614 Tue Jun 9 11:40:57 1998 Gavin Koch <gavin@cygnus.com>
616 * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
620 Thu Jun 4 15:37:33 1998 Frank Ch. Eigler <fche@cygnus.com>
622 * dv-tx3904tmr.c: New file - implements tx3904 timer.
623 * dv-tx3904{irc,cpu}.c: Mild reformatting.
624 * configure.in: Include tx3904tmr in hw_device list.
625 * configure: Rebuilt.
626 * interp.c (sim_open): Instantiate three timer instances.
627 Fix address typo of tx3904irc instance.
629 Tue Jun 2 15:48:02 1998 Ian Carmichael <iancarm@cygnus.com>
631 * interp.c (signal_exception): SystemCall exception now uses
632 the exception vector.
634 Mon Jun 1 18:18:26 1998 Frank Ch. Eigler <fche@cygnus.com>
636 * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
639 Fri May 29 11:40:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
641 * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
643 Mon May 25 20:47:45 1998 Andrew Cagney <cagney@b1.cygnus.com>
645 * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
647 * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
648 sim-main.h. Declare a struct hw_descriptor instead of struct
649 hw_device_descriptor.
651 Mon May 25 12:41:38 1998 Andrew Cagney <cagney@b1.cygnus.com>
653 * mips.igen (do_store_left, do_load_left): Compute nr of left and
654 right bits and then re-align left hand bytes to correct byte
655 lanes. Fix incorrect computation in do_store_left when loading
656 bytes from second word.
658 Fri May 22 13:34:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
660 * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
661 * interp.c (sim_open): Only create a device tree when HW is
664 * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
665 * interp.c (signal_exception): Ditto.
667 Thu May 21 14:24:11 1998 Gavin Koch <gavin@cygnus.com>
669 * gencode.c: Mark BEGEZALL as LIKELY.
671 Thu May 21 18:57:19 1998 Andrew Cagney <cagney@b1.cygnus.com>
673 * sim-main.h (ALU32_END): Sign extend 32 bit results.
674 * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
676 Mon May 18 18:22:42 1998 Frank Ch. Eigler <fche@cygnus.com>
678 * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
679 modules. Recognize TX39 target with "mips*tx39" pattern.
680 * configure: Rebuilt.
681 * sim-main.h (*): Added many macros defining bits in
682 TX39 control registers.
683 (SignalInterrupt): Send actual PC instead of NULL.
684 (SignalNMIReset): New exception type.
685 * interp.c (board): New variable for future use to identify
686 a particular board being simulated.
687 (mips_option_handler,mips_options): Added "--board" option.
688 (interrupt_event): Send actual PC.
689 (sim_open): Make memory layout conditional on board setting.
690 (signal_exception): Initial implementation of hardware interrupt
691 handling. Accept another break instruction variant for simulator
693 (decode_coproc): Implement RFE instruction for TX39.
694 (mips.igen): Decode RFE instruction as such.
695 * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
696 * interp.c: Define "jmr3904" and "jmr3904debug" board types and
697 bbegin to implement memory map.
698 * dv-tx3904cpu.c: New file.
699 * dv-tx3904irc.c: New file.
701 Wed May 13 14:40:11 1998 Gavin Koch <gavin@cygnus.com>
703 * mips.igen (check_mt_hilo): Create a separate r3900 version.
705 Wed May 13 14:11:46 1998 Gavin Koch <gavin@cygnus.com>
707 * tx.igen (madd,maddu): Replace calls to check_op_hilo
708 with calls to check_div_hilo.
710 Wed May 13 09:59:27 1998 Gavin Koch <gavin@cygnus.com>
712 * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
713 Replace check_op_hilo with check_mult_hilo and check_div_hilo.
714 Add special r3900 version of do_mult_hilo.
715 (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
716 with calls to check_mult_hilo.
717 (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
718 with calls to check_div_hilo.
720 Tue May 12 15:22:11 1998 Andrew Cagney <cagney@b1.cygnus.com>
722 * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
723 Document a replacement.
725 Fri May 8 17:48:19 1998 Ian Carmichael <iancarm@cygnus.com>
727 * interp.c (sim_monitor): Make mon_printf work.
729 Wed May 6 19:42:19 1998 Doug Evans <devans@canuck.cygnus.com>
731 * sim-main.h (INSN_NAME): New arg `cpu'.
733 Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com>
735 * configure: Regenerated to track ../common/aclocal.m4 changes.
737 Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche>
739 * configure: Regenerated to track ../common/aclocal.m4 changes.
742 Sun Apr 26 15:20:01 1998 Tom Tromey <tromey@cygnus.com>
744 * acconfig.h: New file.
745 * configure.in: Reverted change of Apr 24; use sinclude again.
747 Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche>
749 * configure: Regenerated to track ../common/aclocal.m4 changes.
752 Fri Apr 24 11:19:20 1998 Tom Tromey <tromey@cygnus.com>
754 * configure.in: Don't call sinclude.
756 Fri Apr 24 11:35:01 1998 Andrew Cagney <cagney@chook.cygnus.com>
758 * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
760 Tue Apr 21 11:59:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
762 * mips.igen (ERET): Implement.
764 * interp.c (decode_coproc): Return sign-extended EPC.
766 * mips.igen (ANDI, LUI, MFC0): Add tracing code.
768 * interp.c (signal_exception): Do not ignore Trap.
769 (signal_exception): On TRAP, restart at exception address.
770 (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
771 (signal_exception): Update.
772 (sim_open): Patch V_COMMON interrupt vector with an abort sequence
773 so that TRAP instructions are caught.
775 Mon Apr 20 11:26:55 1998 Andrew Cagney <cagney@b1.cygnus.com>
777 * sim-main.h (struct hilo_access, struct hilo_history): Define,
778 contains HI/LO access history.
779 (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
780 (HIACCESS, LOACCESS): Delete, replace with
781 (HIHISTORY, LOHISTORY): New macros.
782 (CHECKHILO): Delete all, moved to mips.igen
784 * gencode.c (build_instruction): Do not generate checks for
785 correct HI/LO register usage.
787 * interp.c (old_engine_run): Delete checks for correct HI/LO
790 * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
791 check_mf_cycles): New functions.
792 (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
793 do_divu, domultx, do_mult, do_multu): Use.
795 * tx.igen ("madd", "maddu"): Use.
797 Wed Apr 15 18:31:54 1998 Andrew Cagney <cagney@b1.cygnus.com>
799 * mips.igen (DSRAV): Use function do_dsrav.
800 (SRAV): Use new function do_srav.
802 * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
803 (B): Sign extend 11 bit immediate.
804 (EXT-B*): Shift 16 bit immediate left by 1.
805 (ADDIU*): Don't sign extend immediate value.
807 Wed Apr 15 10:32:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
809 * m16run.c (sim_engine_run): Restore CIA after handling an event.
811 * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
814 * mips.igen (delayslot32, nullify_next_insn): New functions.
815 (m16.igen): Always include.
816 (do_*): Add more tracing.
818 * m16.igen (delayslot16): Add NIA argument, could be called by a
819 32 bit MIPS16 instruction.
821 * interp.c (ifetch16): Move function from here.
822 * sim-main.c (ifetch16): To here.
824 * sim-main.c (ifetch16, ifetch32): Update to match current
825 implementations of LH, LW.
826 (signal_exception): Don't print out incorrect hex value of illegal
829 Wed Apr 15 00:17:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
831 * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
834 * m16.igen: Implement MIPS16 instructions.
836 * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
837 do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
838 do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
839 do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
840 do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move
841 bodies of corresponding code from 32 bit insn to these. Also used
842 by MIPS16 versions of functions.
844 * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
845 (IMEM16): Drop NR argument from macro.
847 Sat Apr 4 22:39:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
849 * Makefile.in (SIM_OBJS): Add sim-main.o.
851 * sim-main.h (address_translation, load_memory, store_memory,
852 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
854 (pr_addr, pr_uword64): Declare.
855 (sim-main.c): Include when H_REVEALS_MODULE_P.
857 * interp.c (address_translation, load_memory, store_memory,
858 cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
860 * sim-main.c: To here. Fix compilation problems.
862 * configure.in: Enable inlining.
863 * configure: Re-config.
865 Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com>
867 * configure: Regenerated to track ../common/aclocal.m4 changes.
869 Fri Apr 3 04:32:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
871 * mips.igen: Include tx.igen.
872 * Makefile.in (IGEN_INCLUDE): Add tx.igen.
873 * tx.igen: New file, contains MADD and MADDU.
875 * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
876 the hardwired constant `7'.
877 (store_memory): Ditto.
878 (LOADDRMASK): Move definition to sim-main.h.
880 mips.igen (MTC0): Enable for r3900.
883 mips.igen (do_load_byte): Delete.
884 (do_load, do_store, do_load_left, do_load_write, do_store_left,
885 do_store_right): New functions.
886 (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
888 configure.in: Let the tx39 use igen again.
891 Thu Apr 2 10:59:39 1998 Andrew Cagney <cagney@b1.cygnus.com>
893 * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
894 not an address sized quantity. Return zero for cache sizes.
896 Wed Apr 1 23:47:53 1998 Andrew Cagney <cagney@b1.cygnus.com>
898 * mips.igen (r3900): r3900 does not support 64 bit integer
901 Mon Mar 30 14:46:05 1998 Gavin Koch <gavin@cygnus.com>
903 * configure.in (mipstx39*-*-*): Use gencode simulator rather
905 * configure : Rebuild.
907 Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com>
909 * configure: Regenerated to track ../common/aclocal.m4 changes.
911 Fri Mar 27 15:01:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
913 * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
915 Wed Mar 25 16:44:27 1998 Ian Carmichael <iancarm@cygnus.com>
917 * configure: Regenerated to track ../common/aclocal.m4 changes.
918 * config.in: Regenerated to track ../common/aclocal.m4 changes.
920 Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
922 * configure: Regenerated to track ../common/aclocal.m4 changes.
924 Wed Mar 25 10:05:46 1998 Andrew Cagney <cagney@b1.cygnus.com>
926 * interp.c (Max, Min): Comment out functions. Not yet used.
928 Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com>
930 * configure: Regenerated to track ../common/aclocal.m4 changes.
932 Tue Mar 17 19:05:20 1998 Frank Ch. Eigler <fche@cygnus.com>
934 * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
935 configurable settings for stand-alone simulator.
937 * configure.in: Added X11 search, just in case.
939 * configure: Regenerated.
941 Wed Mar 11 14:09:10 1998 Andrew Cagney <cagney@b1.cygnus.com>
943 * interp.c (sim_write, sim_read, load_memory, store_memory):
944 Replace sim_core_*_map with read_map, write_map, exec_map resp.
946 Tue Mar 3 13:58:43 1998 Andrew Cagney <cagney@b1.cygnus.com>
948 * sim-main.h (GETFCC): Return an unsigned value.
950 Tue Mar 3 13:21:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
952 * mips.igen (DIV): Fix check for -1 / MIN_INT.
953 (DADD): Result destination is RD not RT.
955 Fri Feb 27 13:49:49 1998 Andrew Cagney <cagney@b1.cygnus.com>
957 * sim-main.h (HIACCESS, LOACCESS): Always define.
959 * mdmx.igen (Maxi, Mini): Rename Max, Min.
961 * interp.c (sim_info): Delete.
963 Fri Feb 27 18:41:01 1998 Doug Evans <devans@canuck.cygnus.com>
965 * interp.c (DECLARE_OPTION_HANDLER): Use it.
966 (mips_option_handler): New argument `cpu'.
967 (sim_open): Update call to sim_add_option_table.
969 Wed Feb 25 18:56:22 1998 Andrew Cagney <cagney@b1.cygnus.com>
971 * mips.igen (CxC1): Add tracing.
973 Fri Feb 20 17:43:21 1998 Andrew Cagney <cagney@b1.cygnus.com>
975 * sim-main.h (Max, Min): Declare.
977 * interp.c (Max, Min): New functions.
979 * mips.igen (BC1): Add tracing.
981 Thu Feb 19 14:50:00 1998 John Metzler <jmetzler@cygnus.com>
983 * interp.c Added memory map for stack in vr4100
985 Thu Feb 19 10:21:21 1998 Gavin Koch <gavin@cygnus.com>
987 * interp.c (load_memory): Add missing "break"'s.
989 Tue Feb 17 12:45:35 1998 Andrew Cagney <cagney@b1.cygnus.com>
991 * interp.c (sim_store_register, sim_fetch_register): Pass in
992 length parameter. Return -1.
994 Tue Feb 10 11:57:40 1998 Ian Carmichael <iancarm@cygnus.com>
996 * interp.c: Added hardware init hook, fixed warnings.
998 Sat Feb 7 17:16:20 1998 Andrew Cagney <cagney@b1.cygnus.com>
1000 * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1002 Tue Feb 3 11:36:02 1998 Andrew Cagney <cagney@b1.cygnus.com>
1004 * interp.c (ifetch16): New function.
1006 * sim-main.h (IMEM32): Rename IMEM.
1007 (IMEM16_IMMED): Define.
1009 (DELAY_SLOT): Update.
1011 * m16run.c (sim_engine_run): New file.
1013 * m16.igen: All instructions except LB.
1014 (LB): Call do_load_byte.
1015 * mips.igen (do_load_byte): New function.
1016 (LB): Call do_load_byte.
1018 * mips.igen: Move spec for insn bit size and high bit from here.
1019 * Makefile.in (tmp-igen, tmp-m16): To here.
1021 * m16.dc: New file, decode mips16 instructions.
1023 * Makefile.in (SIM_NO_ALL): Define.
1024 (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1026 Tue Feb 3 11:28:00 1998 Andrew Cagney <cagney@b1.cygnus.com>
1028 * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1029 point unit to 32 bit registers.
1030 * configure: Re-generate.
1032 Sun Feb 1 15:47:14 1998 Andrew Cagney <cagney@b1.cygnus.com>
1034 * configure.in (sim_use_gen): Make IGEN the default simulator
1035 generator for generic 32 and 64 bit mips targets.
1036 * configure: Re-generate.
1038 Sun Feb 1 16:52:37 1998 Andrew Cagney <cagney@b1.cygnus.com>
1040 * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1043 * interp.c (sim_fetch_register, sim_store_register): Read/write
1044 FGR from correct location.
1045 (sim_open): Set size of FGR's according to
1046 WITH_TARGET_FLOATING_POINT_BITSIZE.
1048 * sim-main.h (FGR): Store floating point registers in a separate
1051 Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com>
1053 * configure: Regenerated to track ../common/aclocal.m4 changes.
1055 Tue Feb 3 00:10:50 1998 Andrew Cagney <cagney@b1.cygnus.com>
1057 * interp.c (ColdReset): Call PENDING_INVALIDATE.
1059 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1061 * interp.c (pending_tick): New function. Deliver pending writes.
1063 * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1064 PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1065 it can handle mixed sized quantites and single bits.
1067 Mon Feb 2 17:43:15 1998 Andrew Cagney <cagney@b1.cygnus.com>
1069 * interp.c (oengine.h): Do not include when building with IGEN.
1070 (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1071 (sim_info): Ditto for PROCESSOR_64BIT.
1072 (sim_monitor): Replace ut_reg with unsigned_word.
1073 (*): Ditto for t_reg.
1074 (LOADDRMASK): Define.
1075 (sim_open): Remove defunct check that host FP is IEEE compliant,
1076 using software to emulate floating point.
1077 (value_fpr, ...): Always compile, was conditional on HASFPU.
1079 Sun Feb 1 11:15:29 1998 Andrew Cagney <cagney@b1.cygnus.com>
1081 * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1084 * interp.c (SD, CPU): Define.
1085 (mips_option_handler): Set flags in each CPU.
1086 (interrupt_event): Assume CPU 0 is the one being iterrupted.
1087 (sim_close): Do not clear STATE, deleted anyway.
1088 (sim_write, sim_read): Assume CPU zero's vm should be used for
1090 (sim_create_inferior): Set the PC for all processors.
1091 (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1093 (mips16_entry): Pass correct nr of args to store_word, load_word.
1094 (ColdReset): Cold reset all cpu's.
1095 (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1096 (sim_monitor, load_memory, store_memory, signal_exception): Use
1097 `CPU' instead of STATE_CPU.
1100 * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1103 * sim-main.h (signal_exception): Add sim_cpu arg.
1104 (SignalException*): Pass both SD and CPU to signal_exception.
1105 * interp.c (signal_exception): Update.
1107 * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1109 (sync_operation, prefetch, cache_op, store_memory, load_memory,
1110 address_translation): Ditto
1111 (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1113 Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com>
1115 * configure: Regenerated to track ../common/aclocal.m4 changes.
1117 Sat Jan 31 14:49:24 1998 Andrew Cagney <cagney@b1.cygnus.com>
1119 * interp.c (sim_engine_run): Add `nr_cpus' argument.
1121 * mips.igen (model): Map processor names onto BFD name.
1123 * sim-main.h (CPU_CIA): Delete.
1124 (SET_CIA, GET_CIA): Define
1126 Wed Jan 21 16:16:27 1998 Andrew Cagney <cagney@b1.cygnus.com>
1128 * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1131 * configure.in (default_endian): Configure a big-endian simulator
1133 * configure: Re-generate.
1135 Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba>
1137 * configure: Regenerated to track ../common/aclocal.m4 changes.
1139 Mon Jan 5 20:38:54 1998 Mark Alexander <marka@cygnus.com>
1141 * interp.c (sim_monitor): Handle Densan monitor outbyte
1142 and inbyte functions.
1144 1997-12-29 Felix Lee <flee@cygnus.com>
1146 * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1148 Wed Dec 17 14:48:20 1997 Jeffrey A Law (law@cygnus.com)
1150 * Makefile.in (tmp-igen): Arrange for $zero to always be
1151 reset to zero after every instruction.
1153 Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1155 * configure: Regenerated to track ../common/aclocal.m4 changes.
1158 Wed Dec 10 17:10:45 1997 Jeffrey A Law (law@cygnus.com)
1160 * mips.igen (MSUB): Fix to work like MADD.
1161 * gencode.c (MSUB): Similarly.
1163 Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com>
1165 * configure: Regenerated to track ../common/aclocal.m4 changes.
1167 Wed Nov 26 11:00:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1169 * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1171 Sun Nov 23 01:45:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1173 * sim-main.h (sim-fpu.h): Include.
1175 * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1176 Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1177 using host independant sim_fpu module.
1179 Thu Nov 20 19:56:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1181 * interp.c (signal_exception): Report internal errors with SIGABRT
1184 * sim-main.h (C0_CONFIG): New register.
1185 (signal.h): No longer include.
1187 * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1189 Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com>
1191 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1193 Fri Nov 14 11:56:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1195 * mips.igen: Tag vr5000 instructions.
1196 (ANDI): Was missing mipsIV model, fix assembler syntax.
1197 (do_c_cond_fmt): New function.
1198 (C.cond.fmt): Handle mips I-III which do not support CC field
1200 (bc1): Handle mips IV which do not have a delaed FCC separatly.
1201 (SDR): Mask paddr when BigEndianMem, not the converse as specified
1203 (DMULT, DMULTU): Force use of hosts 64bit multiplication. Handle
1204 vr5000 which saves LO in a GPR separatly.
1206 * configure.in (enable-sim-igen): For vr5000, select vr5000
1207 specific instructions.
1208 * configure: Re-generate.
1210 Wed Nov 12 14:42:52 1997 Andrew Cagney <cagney@b1.cygnus.com>
1212 * Makefile.in (SIM_OBJS): Add sim-fpu module.
1214 * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1215 fmt_uninterpreted_64 bit cases to switch. Convert to
1218 * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1220 * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1221 as specified in IV3.2 spec.
1222 (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1224 Tue Nov 11 12:38:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1226 * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1227 (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1228 (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1229 PENDING_FILL versions of instructions. Simplify.
1231 (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1233 (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1235 (MTHI, MFHI): Disable code checking HI-LO.
1237 * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1239 (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1241 Thu Nov 6 16:36:35 1997 Andrew Cagney <cagney@b1.cygnus.com>
1243 * gencode.c (build_mips16_operands): Replace IPC with cia.
1245 * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1246 value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1248 (UndefinedResult): Replace function with macro/function
1250 (sim_engine_run): Don't save PC in IPC.
1252 * sim-main.h (IPC): Delete.
1255 * interp.c (signal_exception, store_word, load_word,
1256 address_translation, load_memory, store_memory, cache_op,
1257 prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1258 cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1259 current instruction address - cia - argument.
1260 (sim_read, sim_write): Call address_translation directly.
1261 (sim_engine_run): Rename variable vaddr to cia.
1262 (signal_exception): Pass cia to sim_monitor
1264 * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1265 Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1266 COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1268 * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1269 * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1272 * interp.c (signal_exception): Pass restart address to
1275 * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1276 idecode.o): Add dependency.
1278 * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1280 (DELAY_SLOT): Update NIA not PC with branch address.
1281 (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1283 * mips.igen: Use CIA not PC in branch calculations.
1284 (illegal): Call SignalException.
1285 (BEQ, ADDIU): Fix assembler.
1287 Wed Nov 5 12:19:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1289 * m16.igen (JALX): Was missing.
1291 * configure.in (enable-sim-igen): New configuration option.
1292 * configure: Re-generate.
1294 * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1296 * interp.c (load_memory, store_memory): Delete parameter RAW.
1297 (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1298 bypassing {load,store}_memory.
1300 * sim-main.h (ByteSwapMem): Delete definition.
1302 * Makefile.in (SIM_OBJS): Add sim-memopt module.
1304 * interp.c (sim_do_command, sim_commands): Delete mips specific
1305 commands. Handled by module sim-options.
1307 * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
1308 (WITH_MODULO_MEMORY): Define.
1310 * interp.c (sim_info): Delete code printing memory size.
1312 * interp.c (mips_size): Nee sim_size, delete function.
1314 (monitor, monitor_base, monitor_size): Delete global variables.
1315 (sim_open, sim_close): Delete code creating monitor and other
1316 memory regions. Use sim-memopts module, via sim_do_commandf, to
1317 manage memory regions.
1318 (load_memory, store_memory): Use sim-core for memory model.
1320 * interp.c (address_translation): Delete all memory map code
1321 except line forcing 32 bit addresses.
1323 Wed Nov 5 11:21:11 1997 Andrew Cagney <cagney@b1.cygnus.com>
1325 * sim-main.h (WITH_TRACE): Delete definition. Enables common
1328 * interp.c (logfh, logfile): Delete globals.
1329 (sim_open, sim_close): Delete code opening & closing log file.
1330 (mips_option_handler): Delete -l and -n options.
1331 (OPTION mips_options): Ditto.
1333 * interp.c (OPTION mips_options): Rename option trace to dinero.
1334 (mips_option_handler): Update.
1336 Wed Nov 5 09:35:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1338 * interp.c (fetch_str): New function.
1339 (sim_monitor): Rewrite using sim_read & sim_write.
1340 (sim_open): Check magic number.
1341 (sim_open): Write monitor vectors into memory using sim_write.
1342 (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
1343 (sim_read, sim_write): Simplify - transfer data one byte at a
1345 (load_memory, store_memory): Clarify meaning of parameter RAW.
1347 * sim-main.h (isHOST): Defete definition.
1348 (isTARGET): Mark as depreciated.
1349 (address_translation): Delete parameter HOST.
1351 * interp.c (address_translation): Delete parameter HOST.
1353 Wed Oct 29 11:13:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1357 * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
1358 (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
1360 Tue Oct 28 11:06:47 1997 Andrew Cagney <cagney@b1.cygnus.com>
1362 * mips.igen: Add model filter field to records.
1364 Mon Oct 27 17:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1366 * Makefile.in (SIM_NO_CFLAGS): Define. Define WITH_IGEN=0.
1368 interp.c (sim_engine_run): Do not compile function sim_engine_run
1369 when WITH_IGEN == 1.
1371 * configure.in (sim_igen_flags, sim_m16_flags): Set according to
1372 target architecture.
1374 Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
1375 igen. Replace with configuration variables sim_igen_flags /
1378 * m16.igen: New file. Copy mips16 insns here.
1379 * mips.igen: From here.
1381 Mon Oct 27 13:53:59 1997 Andrew Cagney <cagney@b1.cygnus.com>
1383 * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
1385 (tmp-igen, tmp-m16): Pass -I srcdir to igen.
1387 Sat Oct 25 16:51:40 1997 Gavin Koch <gavin@cygnus.com>
1389 * gencode.c (build_instruction): Follow sim_write's lead in using
1390 BigEndianMem instead of !ByteSwapMem.
1392 Fri Oct 24 17:41:49 1997 Andrew Cagney <cagney@b1.cygnus.com>
1394 * configure.in (sim_gen): Dependent on target, select type of
1395 generator. Always select old style generator.
1397 configure: Re-generate.
1399 Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
1401 (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
1402 SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
1403 IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
1404 (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
1405 SIM_@sim_gen@_*, set by autoconf.
1407 Wed Oct 22 12:52:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1409 * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
1411 * interp.c (ColdReset): Remove #ifdef HASFPU, check
1412 CURRENT_FLOATING_POINT instead.
1414 * interp.c (ifetch32): New function. Fetch 32 bit instruction.
1415 (address_translation): Raise exception InstructionFetch when
1416 translation fails and isINSTRUCTION.
1418 * interp.c (sim_open, sim_write, sim_monitor, store_word,
1419 sim_engine_run): Change type of of vaddr and paddr to
1421 (address_translation, prefetch, load_memory, store_memory,
1422 cache_op): Change type of vAddr and pAddr to address_word.
1424 * gencode.c (build_instruction): Change type of vaddr and paddr to
1427 Mon Oct 20 15:29:04 1997 Andrew Cagney <cagney@b1.cygnus.com>
1429 * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
1430 macro to obtain result of ALU op.
1432 Tue Oct 21 17:39:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1434 * interp.c (sim_info): Call profile_print.
1436 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1438 * Makefile.in (SIM_OBJS): Add sim-profile.o module.
1440 * sim-main.h (WITH_PROFILE): Do not define, defined in
1441 common/sim-config.h. Use sim-profile module.
1442 (simPROFILE): Delete defintion.
1444 * interp.c (PROFILE): Delete definition.
1445 (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
1446 (sim_close): Delete code writing profile histogram.
1447 (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
1449 (sim_engine_run): Delete code profiling the PC.
1451 Mon Oct 20 13:31:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1453 * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
1455 * interp.c (sim_monitor): Make register pointers of type
1458 * sim-main.h: Make registers of type unsigned_word not
1461 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1463 * interp.c (sync_operation): Rename from SyncOperation, make
1464 global, add SD argument.
1465 (prefetch): Rename from Prefetch, make global, add SD argument.
1466 (decode_coproc): Make global.
1468 * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
1470 * gencode.c (build_instruction): Generate DecodeCoproc not
1471 decode_coproc calls.
1473 * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
1474 (SizeFGR): Move to sim-main.h
1475 (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
1476 simSIGINT, simJALDELAYSLOT): Move to sim-main.h
1477 (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
1479 (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
1480 FP_RM_TOMINF, GETRM): Move to sim-main.h.
1481 (Uncached, CachedNoncoherent, CachedCoherent, Cached,
1482 isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
1483 (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
1484 BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
1486 * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
1488 (sim-alu.h): Include.
1489 (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
1490 (sim_cia): Typedef to instruction_address.
1492 Thu Oct 16 10:31:41 1997 Andrew Cagney <cagney@b1.cygnus.com>
1494 * Makefile.in (interp.o): Rename generated file engine.c to
1499 Thu Oct 16 10:31:40 1997 Andrew Cagney <cagney@b1.cygnus.com>
1501 * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
1503 Thu Oct 16 10:31:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1505 * gencode.c (build_instruction): For "FPSQRT", output correct
1506 number of arguments to Recip.
1508 Tue Oct 14 17:38:18 1997 Andrew Cagney <cagney@b1.cygnus.com>
1510 * Makefile.in (interp.o): Depends on sim-main.h
1512 * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
1514 * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
1515 ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
1516 (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
1517 STATE, DSSTATE): Define
1518 (GPR, FGRIDX, ..): Define.
1520 * interp.c (registers, register_widths, fpr_state, ipc, dspc,
1521 pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
1522 (GPR, FGRIDX, ...): Delete macros.
1524 * interp.c: Update names to match defines from sim-main.h
1526 Tue Oct 14 15:11:45 1997 Andrew Cagney <cagney@b1.cygnus.com>
1528 * interp.c (sim_monitor): Add SD argument.
1529 (sim_warning): Delete. Replace calls with calls to
1531 (sim_error): Delete. Replace calls with sim_io_error.
1532 (open_trace, writeout32, writeout16, getnum): Add SD argument.
1533 (mips_set_profile): Rename from sim_set_profile. Add SD argument.
1534 (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
1536 (mips_size): Rename from sim_size. Add SD argument.
1538 * interp.c (simulator): Delete global variable.
1539 (callback): Delete global variable.
1540 (mips_option_handler, sim_open, sim_write, sim_read,
1541 sim_store_register, sim_fetch_register, sim_info, sim_do_command,
1542 sim_size,sim_monitor): Use sim_io_* not callback->*.
1543 (sim_open): ZALLOC simulator struct.
1544 (PROFILE): Do not define.
1546 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1548 * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
1549 support.h with corresponding code.
1551 * sim-main.h (word64, uword64), support.h: Move definition to
1553 (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
1556 * Makefile.in: Update dependencies
1557 * interp.c: Do not include.
1559 Tue Oct 14 13:35:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1561 * interp.c (address_translation, load_memory, store_memory,
1562 cache_op): Rename to from AddressTranslation et.al., make global,
1565 * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
1568 * interp.c (SignalException): Rename to signal_exception, make
1571 * interp.c (Interrupt, ...): Move definitions to sim-main.h.
1573 * sim-main.h (SignalException, SignalExceptionInterrupt,
1574 SignalExceptionInstructionFetch, SignalExceptionAddressStore,
1575 SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
1576 SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
1579 * interp.c, support.h: Use.
1581 Tue Oct 14 13:19:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1583 * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
1584 to value_fpr / store_fpr. Add SD argument.
1585 (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
1586 Multiply, Divide, Recip, SquareRoot, Convert): Make global.
1588 * sim-main.h (ValueFPR, StoreFPR): Define.
1590 Tue Oct 14 13:06:55 1997 Andrew Cagney <cagney@b1.cygnus.com>
1592 * interp.c (sim_engine_run): Check consistency between configure
1593 WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
1596 * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
1597 (mips_fpu): Configure WITH_FLOATING_POINT.
1598 (mips_endian): Configure WITH_TARGET_ENDIAN.
1599 * configure: Update.
1601 Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1603 * configure: Regenerated to track ../common/aclocal.m4 changes.
1605 Mon Sep 29 14:45:00 1997 Bob Manson <manson@charmed.cygnus.com>
1607 * configure: Regenerated.
1609 Fri Sep 26 12:48:18 1997 Mark Alexander <marka@cygnus.com>
1611 * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
1613 Thu Sep 25 11:15:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1615 * gencode.c (print_igen_insn_models): Assume certain architectures
1616 include all mips* instructions.
1617 (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
1620 * Makefile.in (tmp.igen): Add target. Generate igen input from
1623 * gencode.c (FEATURE_IGEN): Define.
1624 (main): Add --igen option. Generate output in igen format.
1625 (process_instructions): Format output according to igen option.
1626 (print_igen_insn_format): New function.
1627 (print_igen_insn_models): New function.
1628 (process_instructions): Only issue warnings and ignore
1629 instructions when no FEATURE_IGEN.
1631 Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1633 * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
1636 Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1638 * configure: Regenerated to track ../common/aclocal.m4 changes.
1640 Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com>
1642 * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
1643 SIM_RESERVED_BITS): Delete, moved to common.
1644 (SIM_EXTRA_CFLAGS): Update.
1646 Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com>
1648 * configure.in: Configure non-strict memory alignment.
1649 * configure: Regenerated to track ../common/aclocal.m4 changes.
1651 Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com>
1653 * configure: Regenerated to track ../common/aclocal.m4 changes.
1655 Sat Sep 20 14:07:28 1997 Gavin Koch <gavin@cygnus.com>
1657 * gencode.c (SDBBP,DERET): Added (3900) insns.
1658 (RFE): Turn on for 3900.
1659 * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
1660 (dsstate): Made global.
1661 (SUBTARGET_R3900): Added.
1662 (CANCELDELAYSLOT): New.
1663 (SignalException): Ignore SystemCall rather than ignore and
1664 terminate. Add DebugBreakPoint handling.
1665 (decode_coproc): New insns RFE, DERET; and new registers Debug
1666 and DEPC protected by SUBTARGET_R3900.
1667 (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
1669 * Makefile.in,configure.in: Add mips subtarget option.
1670 * configure: Update.
1672 Fri Sep 19 09:33:27 1997 Gavin Koch <gavin@cygnus.com>
1674 * gencode.c: Add r3900 (tx39).
1677 Tue Sep 16 15:52:04 1997 Gavin Koch <gavin@cygnus.com>
1679 * gencode.c (build_instruction): Don't need to subtract 4 for
1682 Tue Sep 16 11:32:28 1997 Gavin Koch <gavin@cygnus.com>
1684 * interp.c: Correct some HASFPU problems.
1686 Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com>
1688 * configure: Regenerated to track ../common/aclocal.m4 changes.
1690 Fri Sep 12 12:01:39 1997 Andrew Cagney <cagney@b1.cygnus.com>
1692 * interp.c (mips_options): Fix samples option short form, should
1695 Thu Sep 11 09:35:29 1997 Andrew Cagney <cagney@b1.cygnus.com>
1697 * interp.c (sim_info): Enable info code. Was just returning.
1699 Tue Sep 9 17:30:57 1997 Andrew Cagney <cagney@b1.cygnus.com>
1701 * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
1704 Tue Sep 9 16:28:28 1997 Andrew Cagney <cagney@b1.cygnus.com>
1706 * gencode.c (build_instruction): Use SIGNED64 for 64 bit
1708 (build_instruction): Ditto for LL.
1710 Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba>
1712 * configure: Regenerated to track ../common/aclocal.m4 changes.
1714 Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1716 * configure: Regenerated to track ../common/aclocal.m4 changes.
1719 Wed Aug 27 14:12:27 1997 Andrew Cagney <cagney@b1.cygnus.com>
1721 * interp.c (sim_open): Add call to sim_analyze_program, update
1724 Tue Aug 26 10:40:07 1997 Andrew Cagney <cagney@b1.cygnus.com>
1726 * interp.c (sim_kill): Delete.
1727 (sim_create_inferior): Add ABFD argument. Set PC from same.
1728 (sim_load): Move code initializing trap handlers from here.
1729 (sim_open): To here.
1730 (sim_load): Delete, use sim-hload.c.
1732 * Makefile.in (SIM_OBJS): Add sim-hload.o module.
1734 Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com>
1736 * configure: Regenerated to track ../common/aclocal.m4 changes.
1739 Mon Aug 25 15:59:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1741 * interp.c (sim_open): Add ABFD argument.
1742 (sim_load): Move call to sim_config from here.
1743 (sim_open): To here. Check return status.
1745 Fri Jul 25 15:00:45 1997 Gavin Koch <gavin@cygnus.com>
1747 * gencode.c (build_instruction): Two arg MADD should
1748 not assign result to $0.
1750 Thu Jun 26 12:13:17 1997 Angela Marie Thomas (angela@cygnus.com)
1752 * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
1753 * sim/mips/configure.in: Regenerate.
1755 Wed Jul 9 10:29:21 1997 Andrew Cagney <cagney@critters.cygnus.com>
1757 * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
1758 signed8, unsigned8 et.al. types.
1760 * interp.c (SUB_REG_FETCH): Handle both little and big endian
1761 hosts when selecting subreg.
1763 Wed Jul 2 11:54:10 1997 Jeffrey A Law (law@cygnus.com)
1765 * interp.c (sim_engine_run): Reset the ZERO register to zero
1766 regardless of FEATURE_WARN_ZERO.
1767 * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
1769 Wed Jun 4 10:43:14 1997 Andrew Cagney <cagney@b1.cygnus.com>
1771 * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
1772 (SignalException): For BreakPoints ignore any mode bits and just
1774 (SignalException): Always set the CAUSE register.
1776 Tue Jun 3 05:00:33 1997 Andrew Cagney <cagney@b1.cygnus.com>
1778 * interp.c (SignalException): Clear the simDELAYSLOT flag when an
1779 exception has been taken.
1781 * interp.c: Implement the ERET and mt/f sr instructions.
1783 Sat May 31 00:44:16 1997 Andrew Cagney <cagney@b1.cygnus.com>
1785 * interp.c (SignalException): Don't bother restarting an
1788 Fri May 30 23:41:48 1997 Andrew Cagney <cagney@b1.cygnus.com>
1790 * interp.c (SignalException): Really take an interrupt.
1791 (interrupt_event): Only deliver interrupts when enabled.
1793 Tue May 27 20:08:06 1997 Andrew Cagney <cagney@b1.cygnus.com>
1795 * interp.c (sim_info): Only print info when verbose.
1796 (sim_info) Use sim_io_printf for output.
1798 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1800 * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
1803 Tue May 27 14:22:23 1997 Andrew Cagney <cagney@b1.cygnus.com>
1805 * interp.c (sim_do_command): Check for common commands if a
1806 simulator specific command fails.
1808 Thu May 22 09:32:03 1997 Gavin Koch <gavin@cygnus.com>
1810 * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
1811 and simBE when DEBUG is defined.
1813 Wed May 21 09:08:10 1997 Andrew Cagney <cagney@b1.cygnus.com>
1815 * interp.c (interrupt_event): New function. Pass exception event
1816 onto exception handler.
1818 * configure.in: Check for stdlib.h.
1819 * configure: Regenerate.
1821 * gencode.c (build_instruction): Add UNUSED attribute to tempS
1822 variable declaration.
1823 (build_instruction): Initialize memval1.
1824 (build_instruction): Add UNUSED attribute to byte, bigend,
1826 (build_operands): Ditto.
1828 * interp.c: Fix GCC warnings.
1829 (sim_get_quit_code): Delete.
1831 * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
1832 * Makefile.in: Ditto.
1833 * configure: Re-generate.
1835 * Makefile.in (SIM_OBJS): Add sim-watch.o module.
1837 Tue May 20 15:08:56 1997 Andrew Cagney <cagney@b1.cygnus.com>
1839 * interp.c (mips_option_handler): New function parse argumes using
1841 (myname): Replace with STATE_MY_NAME.
1842 (sim_open): Delete check for host endianness - performed by
1844 (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
1845 (sim_open): Move much of the initialization from here.
1846 (sim_load): To here. After the image has been loaded and
1848 (sim_open): Move ColdReset from here.
1849 (sim_create_inferior): To here.
1850 (sim_open): Make FP check less dependant on host endianness.
1852 * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
1854 * interp.c (sim_set_callbacks): Delete.
1856 * interp.c (membank, membank_base, membank_size): Replace with
1857 STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
1858 (sim_open): Remove call to callback->init. gdb/run do this.
1862 * sim-main.h (SIM_HAVE_FLATMEM): Define.
1864 * interp.c (big_endian_p): Delete, replaced by
1865 current_target_byte_order.
1867 Tue May 20 13:55:00 1997 Andrew Cagney <cagney@b1.cygnus.com>
1869 * interp.c (host_read_long, host_read_word, host_swap_word,
1870 host_swap_long): Delete. Using common sim-endian.
1871 (sim_fetch_register, sim_store_register): Use H2T.
1872 (pipeline_ticks): Delete. Handled by sim-events.
1874 (sim_engine_run): Update.
1876 Tue May 20 13:42:03 1997 Andrew Cagney <cagney@b1.cygnus.com>
1878 * interp.c (sim_stop_reason): Move code determining simEXCEPTION
1880 (SignalException): To here. Signal using sim_engine_halt.
1881 (sim_stop_reason): Delete, moved to common.
1883 Tue May 20 10:19:48 1997 Andrew Cagney <cagney@b2.cygnus.com>
1885 * interp.c (sim_open): Add callback argument.
1886 (sim_set_callbacks): Delete SIM_DESC argument.
1889 Mon May 19 18:20:38 1997 Andrew Cagney <cagney@b1.cygnus.com>
1891 * Makefile.in (SIM_OBJS): Add common modules.
1893 * interp.c (sim_set_callbacks): Also set SD callback.
1894 (set_endianness, xfer_*, swap_*): Delete.
1895 (host_read_word, host_read_long, host_swap_word, host_swap_long):
1896 Change to functions using sim-endian macros.
1897 (control_c, sim_stop): Delete, use common version.
1898 (simulate): Convert into.
1899 (sim_engine_run): This function.
1900 (sim_resume): Delete.
1902 * interp.c (simulation): New variable - the simulator object.
1903 (sim_kind): Delete global - merged into simulation.
1904 (sim_load): Cleanup. Move PC assignment from here.
1905 (sim_create_inferior): To here.
1907 * sim-main.h: New file.
1908 * interp.c (sim-main.h): Include.
1910 Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com>
1912 * configure: Regenerated to track ../common/aclocal.m4 changes.
1914 Wed Apr 23 17:32:19 1997 Doug Evans <dje@canuck.cygnus.com>
1916 * tconfig.in (SIM_HAVE_BIENDIAN): Define.
1918 Mon Apr 21 17:16:13 1997 Gavin Koch <gavin@cygnus.com>
1920 * gencode.c (build_instruction): DIV instructions: check
1921 for division by zero and integer overflow before using
1922 host's division operation.
1924 Thu Apr 17 03:18:14 1997 Doug Evans <dje@canuck.cygnus.com>
1926 * Makefile.in (SIM_OBJS): Add sim-load.o.
1927 * interp.c: #include bfd.h.
1928 (target_byte_order): Delete.
1929 (sim_kind, myname, big_endian_p): New static locals.
1930 (sim_open): Set sim_kind, myname. Move call to set_endianness to
1931 after argument parsing. Recognize -E arg, set endianness accordingly.
1932 (sim_load): Return SIM_RC. New arg abfd. Call sim_load_file to
1933 load file into simulator. Set PC from bfd.
1934 (sim_create_inferior): Return SIM_RC. Delete arg start_address.
1935 (set_endianness): Use big_endian_p instead of target_byte_order.
1937 Wed Apr 16 17:55:37 1997 Andrew Cagney <cagney@b1.cygnus.com>
1939 * interp.c (sim_size): Delete prototype - conflicts with
1940 definition in remote-sim.h. Correct definition.
1942 Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1944 * configure: Regenerated to track ../common/aclocal.m4 changes.
1947 Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com>
1949 * interp.c (sim_open): New arg `kind'.
1951 * configure: Regenerated to track ../common/aclocal.m4 changes.
1953 Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1955 * configure: Regenerated to track ../common/aclocal.m4 changes.
1957 Tue Mar 25 11:38:22 1997 Doug Evans <dje@canuck.cygnus.com>
1959 * interp.c (sim_open): Set optind to 0 before calling getopt.
1961 Wed Mar 19 01:14:00 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1963 * configure: Regenerated to track ../common/aclocal.m4 changes.
1965 Mon Mar 17 10:52:59 1997 Gavin Koch <gavin@cetus.cygnus.com>
1967 * interp.c : Replace uses of pr_addr with pr_uword64
1968 where the bit length is always 64 independent of SIM_ADDR.
1969 (pr_uword64) : added.
1971 Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
1973 * configure: Re-generate.
1975 Fri Mar 14 10:34:11 1997 Michael Meissner <meissner@cygnus.com>
1977 * configure: Regenerate to track ../common/aclocal.m4 changes.
1979 Thu Mar 13 12:51:36 1997 Doug Evans <dje@canuck.cygnus.com>
1981 * interp.c (sim_open): New SIM_DESC result. Argument is now
1983 (other sim_*): New SIM_DESC argument.
1985 Mon Feb 24 22:47:14 1997 Dawn Perchik <dawn@cygnus.com>
1987 * interp.c: Fix printing of addresses for non-64-bit targets.
1988 (pr_addr): Add function to print address based on size.
1990 Wed Feb 19 14:42:09 1997 Mark Alexander <marka@cygnus.com>
1992 * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
1994 Thu Feb 13 14:08:30 1997 Ian Lance Taylor <ian@cygnus.com>
1996 * gencode.c (build_mips16_operands): Correct computation of base
1997 address for extended PC relative instruction.
1999 Thu Feb 6 17:16:15 1997 Ian Lance Taylor <ian@cygnus.com>
2001 * interp.c (mips16_entry): Add support for floating point cases.
2002 (SignalException): Pass floating point cases to mips16_entry.
2003 (ValueFPR): Don't restrict fmt_single and fmt_word to even
2005 (StoreFPR): Likewise. Also, don't clobber fpr + 1 for fmt_single
2007 (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2008 and then set the state to fmt_uninterpreted.
2009 (COP_SW): Temporarily set the state to fmt_word while calling
2012 Tue Feb 4 16:48:25 1997 Ian Lance Taylor <ian@cygnus.com>
2014 * gencode.c (build_instruction): The high order may be set in the
2015 comparison flags at any ISA level, not just ISA 4.
2017 Tue Feb 4 13:33:30 1997 Doug Evans <dje@canuck.cygnus.com>
2019 * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2020 COMMON_{PRE,POST}_CONFIG_FRAG instead.
2021 * configure.in: sinclude ../common/aclocal.m4.
2022 * configure: Regenerated.
2024 Fri Jan 31 11:11:45 1997 Ian Lance Taylor <ian@cygnus.com>
2026 * configure: Rebuild after change to aclocal.m4.
2028 Thu Jan 23 11:46:23 1997 Stu Grossman (grossman@critters.cygnus.com)
2030 * configure configure.in Makefile.in: Update to new configure
2031 scheme which is more compatible with WinGDB builds.
2032 * configure.in: Improve comment on how to run autoconf.
2033 * configure: Re-run autoconf to get new ../common/aclocal.m4.
2034 * Makefile.in: Use autoconf substitution to install common
2037 Wed Jan 8 12:39:03 1997 Jim Wilson <wilson@cygnus.com>
2039 * gencode.c (build_instruction): Use BigEndianCPU instead of
2042 Thu Jan 02 22:23:04 1997 Mark Alexander <marka@cygnus.com>
2044 * interp.c (sim_monitor): Make output to stdout visible in
2045 wingdb's I/O log window.
2047 Tue Dec 31 07:04:00 1996 Mark Alexander <marka@cygnus.com>
2049 * support.h: Undo previous change to SIGTRAP
2052 Mon Dec 30 17:36:06 1996 Ian Lance Taylor <ian@cygnus.com>
2054 * interp.c (store_word, load_word): New static functions.
2055 (mips16_entry): New static function.
2056 (SignalException): Look for mips16 entry and exit instructions.
2057 (simulate): Use the correct index when setting fpr_state after
2058 doing a pending move.
2060 Sun Dec 29 09:37:18 1996 Mark Alexander <marka@cygnus.com>
2062 * interp.c: Fix byte-swapping code throughout to work on
2063 both little- and big-endian hosts.
2065 Sun Dec 29 09:18:32 1996 Mark Alexander <marka@cygnus.com>
2067 * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2068 with gdb/config/i386/xm-windows.h.
2070 Fri Dec 27 22:48:51 1996 Mark Alexander <marka@cygnus.com>
2072 * gencode.c (build_instruction): Work around MSVC++ code gen bug
2073 that messes up arithmetic shifts.
2075 Fri Dec 20 11:04:05 1996 Stu Grossman (grossman@critters.cygnus.com)
2077 * support.h: Use _WIN32 instead of __WIN32__. Also add defs for
2078 SIGTRAP and SIGQUIT for _WIN32.
2080 Thu Dec 19 14:07:27 1996 Ian Lance Taylor <ian@cygnus.com>
2082 * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2083 force a 64 bit multiplication.
2084 (build_instruction) [OR]: In mips16 mode, don't do anything if the
2085 destination register is 0, since that is the default mips16 nop
2088 Mon Dec 16 14:59:38 1996 Ian Lance Taylor <ian@cygnus.com>
2090 * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2091 (build_endian_shift): Don't check proc64.
2092 (build_instruction): Always set memval to uword64. Cast op2 to
2093 uword64 when shifting it left in memory instructions. Always use
2094 the same code for stores--don't special case proc64.
2096 * gencode.c (build_mips16_operands): Fix base PC value for PC
2098 (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2100 * interp.c (simJALDELAYSLOT): Define.
2101 (JALDELAYSLOT): Define.
2102 (INDELAYSLOT, INJALDELAYSLOT): Define.
2103 (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2105 Tue Dec 24 22:11:20 1996 Angela Marie Thomas (angela@cygnus.com)
2107 * interp.c (sim_open): add flush_cache as a PMON routine
2108 (sim_monitor): handle flush_cache by ignoring it
2110 Wed Dec 11 13:53:51 1996 Jim Wilson <wilson@cygnus.com>
2112 * gencode.c (build_instruction): Use !ByteSwapMem instead of
2114 * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2115 (BigEndianMem): Rename to ByteSwapMem and change sense.
2116 (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2117 BigEndianMem references to !ByteSwapMem.
2118 (set_endianness): New function, with prototype.
2119 (sim_open): Call set_endianness.
2120 (sim_info): Use simBE instead of BigEndianMem.
2121 (xfer_direct_word, xfer_direct_long, swap_direct_word,
2122 swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2123 xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2124 ifdefs, keeping the prototype declaration.
2125 (swap_word): Rewrite correctly.
2126 (ColdReset): Delete references to CONFIG. Delete endianness related
2127 code; moved to set_endianness.
2129 Tue Dec 10 11:32:04 1996 Jim Wilson <wilson@cygnus.com>
2131 * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2132 * interp.c (CHECKHILO): Define away.
2133 (simSIGINT): New macro.
2134 (membank_size): Increase from 1MB to 2MB.
2135 (control_c): New function.
2136 (sim_resume): Rename parameter signal to signal_number. Add local
2137 variable prev. Call signal before and after simulate.
2138 (sim_stop_reason): Add simSIGINT support.
2139 (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2141 (sim_warning): Delete call to SignalException. Do call printf_filtered
2143 (AddressTranslation): Add #ifdef DEBUG around debugging message and
2144 a call to sim_warning.
2146 Wed Nov 27 11:53:50 1996 Ian Lance Taylor <ian@cygnus.com>
2148 * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2149 16 bit instructions.
2151 Tue Nov 26 11:53:12 1996 Ian Lance Taylor <ian@cygnus.com>
2153 Add support for mips16 (16 bit MIPS implementation):
2154 * gencode.c (inst_type): Add mips16 instruction encoding types.
2155 (GETDATASIZEINSN): Define.
2156 (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv. Add
2157 jalx. Add LEFT flag to mfhi and mflo. Add RIGHT flag to mthi and
2159 (MIPS16_DECODE): New table, for mips16 instructions.
2160 (bitmap_val): New static function.
2161 (struct mips16_op): Define.
2162 (mips16_op_table): New table, for mips16 operands.
2163 (build_mips16_operands): New static function.
2164 (process_instructions): If PC is odd, decode a mips16
2165 instruction. Break out instruction handling into new
2166 build_instruction function.
2167 (build_instruction): New static function, broken out of
2168 process_instructions. Check modifiers rather than flags for SHIFT
2169 bit count and m[ft]{hi,lo} direction.
2170 (usage): Pass program name to fprintf.
2171 (main): Remove unused variable this_option_optind. Change
2172 ``*loptarg++'' to ``loptarg++''.
2173 (my_strtoul): Parenthesize && within ||.
2174 * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2175 (simulate): If PC is odd, fetch a 16 bit instruction, and
2176 increment PC by 2 rather than 4.
2177 * configure.in: Add case for mips16*-*-*.
2178 * configure: Rebuild.
2180 Fri Nov 22 08:49:36 1996 Mark Alexander <marka@cygnus.com>
2182 * interp.c: Allow -t to enable tracing in standalone simulator.
2183 Fix garbage output in trace file and error messages.
2185 Wed Nov 20 01:54:37 1996 Doug Evans <dje@canuck.cygnus.com>
2187 * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2188 (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2189 * configure.in: Simplify using macros in ../common/aclocal.m4.
2190 * configure: Regenerated.
2191 * tconfig.in: New file.
2193 Tue Nov 12 13:34:00 1996 Dawn Perchik <dawn@cygnus.com>
2195 * interp.c: Fix bugs in 64-bit port.
2196 Use ansi function declarations for msvc compiler.
2197 Initialize and test file pointer in trace code.
2198 Prevent duplicate definition of LAST_EMED_REGNUM.
2200 Tue Oct 15 11:07:06 1996 Mark Alexander <marka@cygnus.com>
2202 * interp.c (xfer_big_long): Prevent unwanted sign extension.
2204 Thu Sep 26 17:35:00 1996 James G. Smith <jsmith@cygnus.co.uk>
2206 * interp.c (SignalException): Check for explicit terminating
2208 * gencode.c: Pass instruction value through SignalException()
2209 calls for Trap, Breakpoint and Syscall.
2211 Thu Sep 26 11:35:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2213 * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2214 only used on those hosts that provide it.
2215 * configure.in: Add sqrt() to list of functions to be checked for.
2216 * config.in: Re-generated.
2217 * configure: Re-generated.
2219 Fri Sep 20 15:47:12 1996 Ian Lance Taylor <ian@cygnus.com>
2221 * gencode.c (process_instructions): Call build_endian_shift when
2222 expanding STORE RIGHT, to fix swr.
2223 * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2224 clear the high bits.
2225 * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2226 Fix float to int conversions to produce signed values.
2228 Thu Sep 19 15:34:17 1996 Ian Lance Taylor <ian@cygnus.com>
2230 * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2231 (process_instructions): Correct handling of nor instruction.
2232 Correct shift count for 32 bit shift instructions. Correct sign
2233 extension for arithmetic shifts to not shift the number of bits in
2234 the type. Fix 64 bit multiply high word calculation. Fix 32 bit
2235 unsigned multiply. Fix ldxc1 and friends to use coprocessor 1.
2237 * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2238 It's OK to have a mult follow a mult. What's not OK is to have a
2239 mult follow an mfhi.
2240 (Convert): Comment out incorrect rounding code.
2242 Mon Sep 16 11:38:16 1996 James G. Smith <jsmith@cygnus.co.uk>
2244 * interp.c (sim_monitor): Improved monitor printf
2245 simulation. Tidied up simulator warnings, and added "--log" option
2246 for directing warning message output.
2247 * gencode.c: Use sim_warning() rather than WARNING macro.
2249 Thu Aug 22 15:03:12 1996 Ian Lance Taylor <ian@cygnus.com>
2251 * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2252 getopt1.o, rather than on gencode.c. Link objects together.
2253 Don't link against -liberty.
2254 (gencode.o, getopt.o, getopt1.o): New targets.
2255 * gencode.c: Include <ctype.h> and "ansidecl.h".
2256 (AND): Undefine after including "ansidecl.h".
2257 (ULONG_MAX): Define if not defined.
2258 (OP_*): Don't define macros; now defined in opcode/mips.h.
2259 (main): Call my_strtoul rather than strtoul.
2260 (my_strtoul): New static function.
2262 Wed Jul 17 18:12:38 1996 Stu Grossman (grossman@critters.cygnus.com)
2264 * gencode.c (process_instructions): Generate word64 and uword64
2265 instead of `long long' and `unsigned long long' data types.
2266 * interp.c: #include sysdep.h to get signals, and define default
2268 * (Convert): Work around for Visual-C++ compiler bug with type
2270 * support.h: Make things compile under Visual-C++ by using
2271 __int64 instead of `long long'. Change many refs to long long
2272 into word64/uword64 typedefs.
2274 Wed Jun 26 12:24:55 1996 Jason Molenda (crash@godzilla.cygnus.co.jp)
2276 * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2277 INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2279 * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2280 (AC_PROG_INSTALL): Added.
2281 (AC_PROG_CC): Moved to before configure.host call.
2282 * configure: Rebuilt.
2284 Wed Jun 5 08:28:13 1996 James G. Smith <jsmith@cygnus.co.uk>
2286 * configure.in: Define @SIMCONF@ depending on mips target.
2287 * configure: Rebuild.
2288 * Makefile.in (run): Add @SIMCONF@ to control simulator
2290 * gencode.c: Change LOADDRMASK to 64bit memory model only.
2291 * interp.c: Remove some debugging, provide more detailed error
2292 messages, update memory accesses to use LOADDRMASK.
2294 Mon Jun 3 11:55:03 1996 Ian Lance Taylor <ian@cygnus.com>
2296 * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2297 AC_CHECK_LIB, and AC_CHECK_FUNCS. Change AC_OUTPUT to set
2299 * configure: Rebuild.
2300 * config.in: New file, generated by autoheader.
2301 * interp.c: Include "config.h". Include <stdlib.h>, <string.h>,
2302 and <strings.h> if they exist. Replace #ifdef sun with #ifdef
2303 HAVE_ANINT and HAVE_AINT, as appropriate.
2304 * Makefile.in (run): Use @LIBS@ rather than -lm.
2305 (interp.o): Depend upon config.h.
2306 (Makefile): Just rebuild Makefile.
2307 (clean): Remove stamp-h.
2308 (mostlyclean): Make the same as clean, not as distclean.
2309 (config.h, stamp-h): New targets.
2311 Fri May 10 00:41:17 1996 James G. Smith <jsmith@cygnus.co.uk>
2313 * interp.c (ColdReset): Fix boolean test. Make all simulator
2316 Wed May 8 15:12:58 1996 James G. Smith <jsmith@cygnus.co.uk>
2318 * interp.c (xfer_direct_word, xfer_direct_long,
2319 swap_direct_word, swap_direct_long, xfer_big_word,
2320 xfer_big_long, xfer_little_word, xfer_little_long,
2321 swap_word,swap_long): Added.
2322 * interp.c (ColdReset): Provide function indirection to
2323 host<->simulated_target transfer routines.
2324 * interp.c (sim_store_register, sim_fetch_register): Updated to
2325 make use of indirected transfer routines.
2327 Fri Apr 19 15:48:24 1996 James G. Smith <jsmith@cygnus.co.uk>
2329 * gencode.c (process_instructions): Ensure FP ABS instruction
2331 * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
2332 system call support.
2334 Wed Apr 10 09:51:38 1996 James G. Smith <jsmith@cygnus.co.uk>
2336 * interp.c (sim_do_command): Complain if callback structure not
2339 Thu Mar 28 13:50:51 1996 James G. Smith <jsmith@cygnus.co.uk>
2341 * interp.c (Convert): Provide round-to-nearest and round-to-zero
2342 support for Sun hosts.
2343 * Makefile.in (gencode): Ensure the host compiler and libraries
2344 used for cross-hosted build.
2346 Wed Mar 27 14:42:12 1996 James G. Smith <jsmith@cygnus.co.uk>
2348 * interp.c, gencode.c: Some more (TODO) tidying.
2350 Thu Mar 7 11:19:33 1996 James G. Smith <jsmith@cygnus.co.uk>
2352 * gencode.c, interp.c: Replaced explicit long long references with
2353 WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
2354 * support.h (SET64LO, SET64HI): Macros added.
2356 Wed Feb 21 12:16:21 1996 Ian Lance Taylor <ian@cygnus.com>
2358 * configure: Regenerate with autoconf 2.7.
2360 Tue Jan 30 08:48:18 1996 Fred Fish <fnf@cygnus.com>
2362 * interp.c (LoadMemory): Enclose text following #endif in /* */.
2363 * support.h: Remove superfluous "1" from #if.
2364 * support.h (CHECKSIM): Remove stray 'a' at end of line.
2366 Mon Dec 4 11:44:40 1995 Jamie Smith <jsmith@cygnus.com>
2368 * interp.c (StoreFPR): Control UndefinedResult() call on
2369 WARN_RESULT manifest.
2371 Fri Dec 1 16:37:19 1995 James G. Smith <jsmith@cygnus.co.uk>
2373 * gencode.c: Tidied instruction decoding, and added FP instruction
2376 * interp.c: Added dineroIII, and BSD profiling support. Also
2377 run-time FP handling.
2379 Sun Oct 22 00:57:18 1995 James G. Smith <jsmith@pasanda.cygnus.co.uk>
2381 * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
2382 gencode.c, interp.c, support.h: created.