sim/mips/ChangeLog

   1 2007-02-13  Thiemo Seufer  <ths@mips.com>
   2
   3         * configure.ac: Add mips*-sde-elf* target.
   4         * configure: Regenerate.
   5
   6 2006-12-21  Hans-Peter Nilsson  <hp@axis.com>
   7
   8         * acconfig.h: Remove.
   9         * config.in, configure: Regenerate.
  10
  11 2006-11-07  Thiemo Seufer  <ths@mips.com>
  12
  13         * dsp.igen (do_w_op): Fix compiler warning.
  14
  15 2006-08-29  Thiemo Seufer  <ths@mips.com>
  16             David Ung  <davidu@mips.com>
  17
  18         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*): Add smartmips to
  19         sim_igen_machine.
  20         * configure: Regenerate.
  21         * mips.igen (model): Add smartmips.
  22         (MADDU): Increment ACX if carry.
  23         (do_mult): Clear ACX.
  24         (ROR,RORV): Add smartmips.
  25         (include): Include smartmips.igen.
  26         * sim-main.h (ACX): Set to REGISTERS[89].
  27         * smartmips.igen: New file.
  28
  29 2006-08-29  Thiemo Seufer  <ths@mips.com>
  30             David Ung  <davidu@mips.com>
  31
  32         * Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
  33         mips3264r2.igen. Add missing dependency rules.
  34         * m16e.igen: Support for mips16e save/restore instructions.
  35
  36 2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
  37
  38         * configure: Regenerated.
  39
  40 2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
  41
  42         * configure: Regenerated.
  43
  44 2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
  45
  46         * configure: Regenerated.
  47
  48 2006-05-15 Chao-ying Fu  <fu@mips.com>
  49
  50         * dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
  51
  52 2006-04-18  Nick Clifton  <nickc@redhat.com>
  53
  54         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
  55         statement.
  56
  57 2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
  58
  59         * configure: Regenerate.
  60
  61 2005-12-14  Chao-ying Fu  <fu@mips.com>
  62
  63         * Makefile.in (SIM_OBJS): Add dsp.o.
  64         (dsp.o): New dependency.
  65         (IGEN_INCLUDE): Add dsp.igen.
  66         * configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
  67         mipsisa64*-*-*): Add dsp to sim_igen_machine.
  68         * configure: Regenerate.
  69         * mips.igen: Add dsp model and include dsp.igen.
  70         (MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
  71         because these instructions are extended in DSP ASE.
  72         * sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
  73         adding 6 DSP accumulator registers and 1 DSP control register.
  74         (AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
  75         AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
  76         DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
  77         DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
  78         DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
  79         DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
  80         DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
  81         DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
  82         DSPCR_CCOND_SMASK): New define.
  83         (DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
  84         * dsp.c, dsp.igen: New files for MIPS DSP ASE.
  85
  86 2005-07-08  Ian Lance Taylor  <ian@airs.com>
  87
  88         * tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
  89
  90 2005-06-16  David Ung  <davidu@mips.com>
  91             Nigel Stephens  <nigel@mips.com>
  92
  93         * mips.igen: New mips16e model and include m16e.igen.
  94         (check_u64): Add mips16e tag.
  95         * m16e.igen: New file for MIPS16e instructions.
  96         * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
  97         mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
  98         models.
  99         * configure: Regenerate.
 100
 101 2005-05-26  David Ung  <davidu@mips.com>
 102
 103         * mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
 104         tags to all instructions which are applicable to the new ISAs.
 105         (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
 106         vr.igen.
 107         * mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
 108         instructions.
 109         * vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
 110         to mips.igen.
 111         * configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
 112         * configure: Regenerate.
 113
 114 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 115
 116         * configure: Regenerate.
 117
 118 2005-01-14  Andrew Cagney  <cagney@gnu.org>
 119
 120         * configure.ac: Sinclude aclocal.m4 before common.m4.  Add
 121         explicit call to AC_CONFIG_HEADER.
 122         * configure: Regenerate.
 123
 124 2005-01-12  Andrew Cagney  <cagney@gnu.org>
 125
 126         * configure.ac: Update to use ../common/common.m4.
 127         * configure: Re-generate.
 128
 129 2005-01-11  Andrew Cagney  <cagney@localhost.localdomain>
 130
 131         * configure: Regenerated to track ../common/aclocal.m4 changes.
 132
 133 2005-01-07  Andrew Cagney  <cagney@gnu.org>
 134
 135         * configure.ac: Rename configure.in, require autoconf 2.59.
 136         * configure: Re-generate.
 137
 138 2004-12-08  Hans-Peter Nilsson  <hp@axis.com>
 139
 140         * configure: Regenerate for ../common/aclocal.m4 update.
 141
 142 2004-09-24  Monika Chaddha  <monika@acmet.com>
 143
 144         Committed by Andrew Cagney.
 145         * m16.igen (CMP, CMPI): Fix assembler.
 146
 147 2004-08-18  Chris Demetriou  <cgd@broadcom.com>
 148
 149         * configure.in (mipsisa64sb1*-*-*): Add mips3d to sim_igen_machine.
 150         * configure: Regenerate.
 151
 152 2004-06-25  Chris Demetriou  <cgd@broadcom.com>
 153
 154         * configure.in (sim_m16_machine): Include mipsIII.
 155         * configure: Regenerate.
 156
 157 2004-05-11  Maciej W. Rozycki  <macro@ds2.pg.gda.pl>
 158
 159         * mips/interp.c (decode_coproc): Sign-extend the address retrieved
 160         from COP0_BADVADDR.
 161         * mips/sim-main.h (COP0_BADVADDR): Remove a cast.
 162
 163 2004-04-10  Chris Demetriou  <cgd@broadcom.com>
 164
 165         * sb1.igen (DIV.PS, RECIP.PS, RSQRT.PS, SQRT.PS): New.
 166
 167 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 168
 169         * mips.igen (check_fmt): Remove.
 170         (ABS.fmt, ADD.fmt, C.cond.fmta, C.cond.fmtb, CEIL.L.fmt, CEIL.W)
 171         (CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt, FLOOR.L.fmt)
 172         (FLOOR.W.fmt, MADD.fmt, MOV.fmt, MOVtf.fmt, MOVN.fmt, MOVZ.fmt)
 173         (MSUB.fmt, MUL.fmt, NEG.fmt, NMADD.fmt, NMSUB.fmt, RECIP.fmt)
 174         (ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt)
 175         (TRUNC.L.fmt, TRUNC.W): Explicitly specify allowed FPU formats.
 176         (check_fmt_p, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 177         (FLOOR.W.fmt, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt)
 178         (SQRT.fmt, TRUNC.L.fmt, TRUNC.W): Remove all uses of check_fmt.
 179         (C.cnd.fmta): Remove incorrect call to check_fmt_p.
 180
 181 2004-04-09  Chris Demetriou  <cgd@broadcom.com>
 182
 183         * sb1.igen (check_sbx): New function.
 184         (PABSDIFF.fmt, PABSDIFC.fmt, PAVG.fmt): Use check_sbx.
 185
 186 2004-03-29  Chris Demetriou  <cgd@broadcom.com>
 187             Richard Sandiford  <rsandifo@redhat.com>
 188
 189         * sim-main.h (MIPS_MACH_HAS_MT_HILO_HAZARD)
 190         (MIPS_MACH_HAS_MULT_HILO_HAZARD, MIPS_MACH_HAS_DIV_HILO_HAZARD): New.
 191         * mips.igen (check_mt_hilo, check_mult_hilo, check_div_hilo): Provide
 192         separate implementations for mipsIV and mipsV.  Use new macros to
 193         determine whether the restrictions apply.
 194
 195 2004-01-19  Chris Demetriou  <cgd@broadcom.com>
 196
 197         * mips.igen (check_mf_cycles, check_mt_hilo, check_mf_hilo)
 198         (check_mult_hilo): Improve comments.
 199         (check_div_hilo): Likewise.  Also, fork off a new version
 200         to handle mips32/mips64 (since there are no hazards to check
 201         in MIPS32/MIPS64).
 202
 203 2003-06-17  Richard Sandiford  <rsandifo@redhat.com>
 204
 205         * mips.igen (do_dmultx): Fix check for negative operands.
 206
 207 2003-05-16  Ian Lance Taylor  <ian@airs.com>
 208
 209         * Makefile.in (SHELL): Make sure this is defined.
 210         (various): Use $(SHELL) whenever we invoke move-if-change.
 211
 212 2003-05-03  Chris Demetriou  <cgd@broadcom.com>
 213
 214         * cp1.c: Tweak attribution slightly.
 215         * cp1.h: Likewise.
 216         * mdmx.c: Likewise.
 217         * mdmx.igen: Likewise.
 218         * mips3d.igen: Likewise.
 219         * sb1.igen: Likewise.
 220
 221 2003-04-15  Richard Sandiford  <rsandifo@redhat.com>
 222
 223         * vr.igen (do_vr_mul_op): Zero-extend the low 32 bits of
 224         unsigned operands.
 225
 226 2003-02-27  Andrew Cagney  <cagney@redhat.com>
 227
 228         * interp.c (sim_open): Rename _bfd to bfd.
 229         (sim_create_inferior): Ditto.
 230
 231 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 232
 233         * mips.igen (LUXC1, SUXC1): New, for mipsV and mips64.
 234
 235 2003-01-14  Chris Demetriou  <cgd@broadcom.com>
 236
 237         * mips.igen (EI, DI): Remove.
 238
 239 2003-01-05  Richard Sandiford  <rsandifo@redhat.com>
 240
 241         * Makefile.in (tmp-run-multi): Fix mips16 filter.
 242
 243 2003-01-04  Richard Sandiford  <rsandifo@redhat.com>
 244             Andrew Cagney  <ac131313@redhat.com>
 245             Gavin Romig-Koch  <gavin@redhat.com>
 246             Graydon Hoare  <graydon@redhat.com>
 247             Aldy Hernandez  <aldyh@redhat.com>
 248             Dave Brolley  <brolley@redhat.com>
 249             Chris Demetriou  <cgd@broadcom.com>
 250
 251         * configure.in (mips64vr*): Define TARGET_ENABLE_FR to 1.
 252         (sim_mach_default): New variable.
 253         (mips64vr-*-*, mips64vrel-*-*): New configurations.
 254         Add a new simulator generator, MULTI.
 255         * configure: Regenerate.
 256         * Makefile.in (SIM_MULTI_OBJ, SIM_EXTRA_DISTCLEAN): New variables.
 257         (multi-run.o): New dependency.
 258         (SIM_MULTI_ALL, SIM_MULTI_IGEN_CONFIGS): New variables.
 259         (tmp-mach-multi, tmp-itable-multi, tmp-run-multi): New rules.
 260         (tmp-multi): Combine them.
 261         (BUILT_SRC_FROM_MULTI): New variable.  Depend on tmp-multi.
 262         (clean-extra): Remove sources in BUILT_SRC_FROM_MULTI.
 263         (distclean-extra): New rule.
 264         * sim-main.h: Include bfd.h.
 265         (MIPS_MACH): New macro.
 266         * mips.igen (vr4120, vr5400, vr5500): New models.
 267         (clo, clz, dclo, dclz, madd, maddu, msub, msub, mul): Add *vr5500.
 268         * vr.igen: Replace with new version.
 269
 270 2003-01-04  Chris Demetriou  <cgd@broadcom.com>
 271
 272         * configure.in: Use SIM_AC_OPTION_RESERVED_BITS(1).
 273         * configure: Regenerate.
 274
 275 2002-12-31  Chris Demetriou  <cgd@broadcom.com>
 276
 277         * sim-main.h (check_branch_bug, mark_branch_bug): Remove.
 278         * mips.igen: Remove all invocations of check_branch_bug and
 279         mark_branch_bug.
 280
 281 2002-12-16  Chris Demetriou  <cgd@broadcom.com>
 282
 283         * tconfig.in: Include "gdb/callback.h" and "gdb/remote-sim.h".
 284
 285 2002-07-30  Chris Demetriou  <cgd@broadcom.com>
 286
 287         * mips.igen (do_load_double, do_store_double): New functions.
 288         (LDC1, SDC1): Rename to...
 289         (LDC1b, SDC1b): respectively.
 290         (LDC1a, SDC1a): New instructions for MIPS II and MIPS32 support.
 291
 292 2002-07-29  Michael Snyder  <msnyder@redhat.com>
 293
 294         * cp1.c (fp_recip2): Modify initialization expression so that
 295         GCC will recognize it as constant.
 296
 297 2002-06-18  Chris Demetriou  <cgd@broadcom.com>
 298
 299         * mdmx.c (SD_): Delete.
 300         (Unpredictable): Re-define, for now, to directly invoke
 301         unpredictable_action().
 302         (mdmx_acc_op): Fix error in .ob immediate handling.
 303
 304 2002-06-18  Andrew Cagney  <cagney@redhat.com>
 305
 306         * interp.c (sim_firmware_command): Initialize `address'.
 307
 308 2002-06-16  Andrew Cagney  <ac131313@redhat.com>
 309
 310         * configure: Regenerated to track ../common/aclocal.m4 changes.
 311
 312 2002-06-14  Chris Demetriou  <cgd@broadcom.com>
 313             Ed Satterthwaite  <ehs@broadcom.com>
 314
 315         * mips3d.igen: New file which contains MIPS-3D ASE instructions.
 316         * Makefile.in (IGEN_INCLUDE): Add mips3d.igen.
 317         * mips.igen: Include mips3d.igen.
 318         (mips3d): New model name for MIPS-3D ASE instructions.
 319         (CVT.W.fmt): Don't use this instruction for word (source) format
 320         instructions.
 321         * cp1.c (fp_binary_r, fp_add_r, fp_mul_r, fpu_inv1, fpu_inv1_32)
 322         (fpu_inv1_64, fp_recip1, fp_recip2, fpu_inv_sqrt1, fpu_inv_sqrt1_32)
 323         (fpu_inv_sqrt1_64, fp_rsqrt1, fp_rsqrt2): New functions.
 324         (NR_FRAC_GUARD, IMPLICIT_1): New macros.
 325         * sim-main.h (fmt_pw, CompareAbs, AddR, MultiplyR, Recip1, Recip2)
 326         (RSquareRoot1, RSquareRoot2): New macros.
 327         (fp_add_r, fp_mul_r, fp_recip1, fp_recip2, fp_rsqrt1)
 328         (fp_rsqrt2): New functions.
 329         * configure.in: Add MIPS-3D support to mipsisa64 simulator.
 330         * configure: Regenerate.
 331
 332 2002-06-13  Chris Demetriou  <cgd@broadcom.com>
 333             Ed Satterthwaite  <ehs@broadcom.com>
 334
 335         * cp1.c (FP_PS_upper, FP_PS_lower, FP_PS_cat, FPQNaN_PS): New macros.
 336         (value_fpr, store_fpr, fp_cmp, fp_unary, fp_binary, fp_mac)
 337         (fp_inv_sqrt, fpu_format_name): Add paired-single support.
 338         (convert): Note that this function is not used for paired-single
 339         format conversions.
 340         (ps_lower, ps_upper, pack_ps, convert_ps): New functions.
 341         * mips.igen (FMT, MOVtf.fmt): Add paired-single support.
 342         (check_fmt_p): Enable paired-single support.
 343         (ALNV.PS, CVT.PS.S, CVT.S.PL, CVT.S.PU, PLL.PS, PLU.PS, PUL.PS)
 344         (PUU.PS): New instructions.
 345         (CVT.S.fmt): Don't use this instruction for paired-single format
 346         destinations.
 347         * sim-main.h (FP_formats): New value 'fmt_ps.'
 348         (ps_lower, ps_upper, pack_ps, convert_ps): New prototypes.
 349         (PSLower, PSUpper, PackPS, ConvertPS): New macros.
 350
 351 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 352
 353         * mips.igen: Fix formatting of function calls in
 354         many FP operations.
 355
 356 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 357
 358         * mips.igen (MOVN, MOVZ): Trace result.
 359         (TNEI): Print "tnei" as the opcode name in traces.
 360         (CEIL.W): Add disassembly string for traces.
 361         (RSQRT.fmt): Make location of disassembly string consistent
 362         with other instructions.
 363
 364 2002-06-12  Chris Demetriou  <cgd@broadcom.com>
 365
 366         * mips.igen (X): Delete unused function.
 367
 368 2002-06-08  Andrew Cagney  <cagney@redhat.com>
 369
 370         * interp.c: Include "gdb/callback.h" and "gdb/remote-sim.h".
 371
 372 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 373             Ed Satterthwaite  <ehs@broadcom.com>
 374
 375         * cp1.c (inner_mac, fp_mac, inner_rsqrt, fp_inv_sqrt)
 376         (fp_rsqrt, fp_madd, fp_msub, fp_nmadd, fp_nmsub): New functions.
 377         * sim-main.h (fp_rsqrt, fp_madd, fp_msub, fp_nmadd)
 378         (fp_nmsub): New prototypes.
 379         (RSquareRoot, MultiplyAdd, MultiplySub, NegMultiplyAdd)
 380         (NegMultiplySub): New defines.
 381         * mips.igen (RSQRT.fmt): Use RSquareRoot().
 382         (MADD.D, MADD.S): Replace with...
 383         (MADD.fmt): New instruction.
 384         (MSUB.D, MSUB.S): Replace with...
 385         (MSUB.fmt): New instruction.
 386         (NMADD.D, NMADD.S): Replace with...
 387         (NMADD.fmt): New instruction.
 388         (NMSUB.D, MSUB.S): Replace with...
 389         (NMSUB.fmt): New instruction.
 390
 391 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 392             Ed Satterthwaite  <ehs@broadcom.com>
 393
 394         * cp1.c: Fix more comment spelling and formatting.
 395         (value_fcr, store_fcr): Use fenr_FS rather than hard-coding value.
 396         (denorm_mode): New function.
 397         (fpu_unary, fpu_binary): Round results after operation, collect
 398         status from rounding operations, and update the FCSR.
 399         (convert): Collect status from integer conversions and rounding
 400         operations, and update the FCSR.  Adjust NaN values that result
 401         from conversions.  Convert to use sim_io_eprintf rather than
 402         fprintf, and remove some debugging code.
 403         * cp1.h (fenr_FS): New define.
 404
 405 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 406
 407         * cp1.c (convert): Remove unusable debugging code, and move MIPS
 408         rounding mode to sim FP rounding mode flag conversion code into...
 409         (rounding_mode): New function.
 410
 411 2002-06-07  Chris Demetriou  <cgd@broadcom.com>
 412
 413         * cp1.c: Clean up formatting of a few comments.
 414         (value_fpr): Reformat switch statement.
 415
 416 2002-06-06  Chris Demetriou  <cgd@broadcom.com>
 417             Ed Satterthwaite  <ehs@broadcom.com>
 418
 419         * cp1.h: New file.
 420         * sim-main.h: Include cp1.h.
 421         (SETFCC, GETFCC, IR, UF, OF, DX, IO, UO, FP_FLAGS, FP_ENABLE)
 422         (FP_CAUSE, GETFS, FP_RM_NEAREST, FP_RM_TOZERO, FP_RM_TOPINF)
 423         (FP_RM_TOMINF, GETRM): Remove.  Moved to cp1.h.
 424         (FP_FS, FP_MASK_RM, FP_SH_RM, Nan, Less, Equal): Remove.
 425         (value_fcr, store_fcr, test_fcsr, fp_cmp): New prototypes.
 426         (ValueFCR, StoreFCR, TestFCSR, Compare): New macros.
 427         * cp1.c: Don't include sim-fpu.h; already included by
 428         sim-main.h.  Clean up formatting of some comments.
 429         (NaN, Equal, Less): Remove.
 430         (test_fcsr, value_fcr, store_fcr, update_fcsr, fp_test)
 431         (fp_cmp): New functions.
 432         * mips.igen (do_c_cond_fmt): Remove.
 433         (C.cond.fmta, C.cond.fmtb): Replace uses of do_c_cond_fmt_a with
 434         Compare.  Add result tracing.
 435         (CxC1): Remove, replace with...
 436         (CFC1a, CFC1b, CFC1c, CTC1a, CTC1b, CTC1c): New instructions.
 437         (DMxC1): Remove, replace with...
 438         (DMFC1a, DMFC1b, DMTC1a, DMTC1b): New instructions.
 439         (MxC1): Remove, replace with...
 440         (MFC1a, MFC1b, MTC1a, MTC1b): New instructions.
 441
 442 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 443
 444         * sim-main.h (FGRIDX): Remove, replace all uses with...
 445         (FGR_BASE): New macro.
 446         (FP0_REGNUM, FCRCS_REGNUM, FCRIR_REGNUM): New macros.
 447         (_sim_cpu): Move 'fgr' member to be right before 'fpr_state' member.
 448         (NR_FGR, FGR): Likewise.
 449         * interp.c: Replace all uses of FGRIDX with FGR_BASE.
 450         * mips.igen: Likewise.
 451
 452 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 453
 454         * cp1.c: Add an FSF Copyright notice to this file.
 455
 456 2002-06-04  Chris Demetriou  <cgd@broadcom.com>
 457             Ed Satterthwaite  <ehs@broadcom.com>
 458
 459         * cp1.c (Infinity): Remove.
 460         * sim-main.h (Infinity): Likewise.
 461
 462         * cp1.c (fp_unary, fp_binary): New functions.
 463         (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div, fp_recip)
 464         (fp_sqrt): New functions, implemented in terms of the above.
 465         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 466         (Recip, SquareRoot): Remove (replaced by functions above).
 467         * sim-main.h (fp_abs, fp_neg, fp_add, fp_sub, fp_mul, fp_div)
 468         (fp_recip, fp_sqrt): New prototypes.
 469         (AbsoluteValue, Negate, Add, Sub, Multiply, Divide)
 470         (Recip, SquareRoot): Replace prototypes with #defines which
 471         invoke the functions above.
 472
 473 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 474
 475         * sim-main.h (Nan, Infinity, Less, Equal, AbsoluteValue, Negate)
 476         (Add, Sub, Multiply, Divide, Recip, SquareRoot): Move lower in
 477         file, remove PARAMS from prototypes.
 478         (value_fpr, store_fpr, convert): Likewise.  Use SIM_STATE to provide
 479         simulator state arguments.
 480         (ValueFPR, StoreFPR, Convert): Move lower in file.  Use SIM_ARGS to
 481         pass simulator state arguments.
 482         * cp1.c (SD): Redefine as CPU_STATE(cpu).
 483         (store_fpr, convert): Remove 'sd' argument.
 484         (value_fpr): Likewise.  Convert to use 'SD' instead.
 485
 486 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 487
 488         * cp1.c (Min, Max): Remove #if 0'd functions.
 489         * sim-main.h (Min, Max): Remove.
 490
 491 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 492
 493         * cp1.c: fix formatting of switch case and default labels.
 494         * interp.c: Likewise.
 495         * sim-main.c: Likewise.
 496
 497 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 498
 499         * cp1.c: Clean up comments which describe FP formats.
 500          (FPQNaN_DOUBLE, FPQNaN_LONG): Generate using UNSIGNED64.
 501
 502 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 503             Ed Satterthwaite  <ehs@broadcom.com>
 504
 505         * configure.in (mipsisa64sb1*-*-*): New target for supporting
 506         Broadcom SiByte SB-1 processor configurations.
 507         * configure: Regenerate.
 508         * sb1.igen: New file.
 509         * mips.igen: Include sb1.igen.
 510         (sb1): New model.
 511         * Makefile.in (IGEN_INCLUDE): Add sb1.igen.
 512         * mdmx.igen: Add "sb1" model to all appropriate functions and
 513         instructions.
 514         * mdmx.c (AbsDiffOB, AvgOB, AccAbsDiffOB): New functions.
 515         (ob_func, ob_acc): Reference the above.
 516         (qh_acc): Adjust to keep the same size as ob_acc.
 517         * sim-main.h (status_SBX, MX_VECT_ABSD, MX_VECT_AVG, MX_AbsDiff)
 518         (MX_Avg, MX_VECT_ABSDA, MX_AbsDiffC): New macros.
 519
 520 2002-06-03  Chris Demetriou  <cgd@broadcom.com>
 521
 522         * Makefile.in (IGEN_INCLUDE): Add mdmx.igen.
 523
 524 2002-06-02  Chris Demetriou  <cgd@broadcom.com>
 525             Ed Satterthwaite  <ehs@broadcom.com>
 526
 527         * mips.igen (mdmx): New (pseudo-)model.
 528         * mdmx.c, mdmx.igen: New files.
 529         * Makefile.in (SIM_OBJS): Add mdmx.o.
 530         * sim-main.h (MDMX_accumulator, MX_fmtsel, signed24, signed48):
 531         New typedefs.
 532         (ACC, MX_Add, MX_AddA, MX_AddL, MX_And, MX_C_EQ, MX_C_LT, MX_Comp)
 533         (MX_FMT_OB, MX_FMT_QH, MX_Max, MX_Min, MX_Msgn, MX_Mul, MX_MulA)
 534         (MX_MulL, MX_MulS, MX_MulSL, MX_Nor, MX_Or, MX_Pick, MX_RAC)
 535         (MX_RAC_H, MX_RAC_L, MX_RAC_M, MX_RNAS, MX_RNAU, MX_RND_AS)
 536         (MX_RND_AU, MX_RND_ES, MX_RND_EU, MX_RND_ZS, MX_RND_ZU, MX_RNES)
 537         (MX_RNEU, MX_RZS, MX_RZU, MX_SHFL, MX_ShiftLeftLogical)
 538         (MX_ShiftRightArith, MX_ShiftRightLogical, MX_Sub, MX_SubA, MX_SubL)
 539         (MX_VECT_ADD, MX_VECT_ADDA, MX_VECT_ADDL, MX_VECT_AND)
 540         (MX_VECT_MAX, MX_VECT_MIN, MX_VECT_MSGN, MX_VECT_MUL, MX_VECT_MULA)
 541         (MX_VECT_MULL, MX_VECT_MULS, MX_VECT_MULSL, MX_VECT_NOR)
 542         (MX_VECT_OR, MX_VECT_SLL, MX_VECT_SRA, MX_VECT_SRL, MX_VECT_SUB)
 543         (MX_VECT_SUBA, MX_VECT_SUBL, MX_VECT_XOR, MX_WACH, MX_WACL, MX_Xor)
 544         (SIM_ARGS, SIM_STATE, UnpredictableResult, fmt_mdmx, ob_fmtsel)
 545         (qh_fmtsel): New macros.
 546         (_sim_cpu): New member "acc".
 547         (mdmx_acc_op, mdmx_cc_op, mdmx_cpr_op, mdmx_pick_op, mdmx_rac_op)
 548         (mdmx_round_op, mdmx_shuffle, mdmx_wach, mdmx_wacl): New functions.
 549
 550 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 551
 552         * interp.c: Use 'deprecated' rather than 'depreciated.'
 553         * sim-main.h: Likewise.
 554
 555 2002-05-01  Chris Demetriou  <cgd@broadcom.com>
 556
 557         * cp1.c (store_fpr): Remove #ifdef'd out call to UndefinedResult
 558         which wouldn't compile anyway.
 559         * sim-main.h (unpredictable_action): New function prototype.
 560         (Unpredictable): Define to call igen function unpredictable().
 561         (NotWordValue): New macro to call igen function not_word_value().
 562         (UndefinedResult): Remove.
 563         * interp.c (undefined_result): Remove.
 564         (unpredictable_action): New function.
 565         * mips.igen (not_word_value, unpredictable): New functions.
 566         (ADD, ADDI, do_addiu, do_addu, BGEZAL, BGEZALL, BLTZAL, BLTZALL)
 567         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, do_mult, do_multu)
 568         (do_sra, do_srav, do_srl, do_srlv, SUB, do_subu): Invoke
 569         NotWordValue() to check for unpredictable inputs, then
 570         Unpredictable() to handle them.
 571
 572 2002-02-24  Chris Demetriou  <cgd@broadcom.com>
 573
 574         * mips.igen: Fix formatting of calls to Unpredictable().
 575
 576 2002-04-20  Andrew Cagney  <ac131313@redhat.com>
 577
 578         * interp.c (sim_open): Revert previous change.
 579
 580 2002-04-18  Alexandre Oliva  <aoliva@redhat.com>
 581
 582         * interp.c (sim_open): Disable chunk of code that wrote code in
 583         vector table entries.
 584
 585 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 586
 587         * cp1.c (FP_S_s, FP_D_s, FP_S_be, FP_D_be, FP_S_e, FP_D_e, FP_S_f)
 588         (FP_D_f, FP_S_fb, FP_D_fb, FPINF_SINGLE, FPINF_DOUBLE): Remove
 589         unused definitions.
 590
 591 2002-03-19  Chris Demetriou  <cgd@broadcom.com>
 592
 593         * cp1.c: Fix many formatting issues.
 594
 595 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 596
 597         * cp1.c (fpu_format_name): New function to replace...
 598         (DOFMT): This.  Delete, and update all callers.
 599         (fpu_rounding_mode_name): New function to replace...
 600         (RMMODE): This.  Delete, and update all callers.
 601
 602 2002-03-19  Chris G. Demetriou  <cgd@broadcom.com>
 603
 604         * interp.c: Move FPU support routines from here to...
 605         * cp1.c: Here.  New file.
 606         * Makefile.in (SIM_OBJS): Add cp1.o to object list.
 607         (cp1.o): New target.
 608
 609 2002-03-12  Chris Demetriou  <cgd@broadcom.com>
 610
 611         * configure.in (mipsisa32*-*-*, mipsisa64*-*-*): New targets.
 612         * mips.igen (mips32, mips64): New models, add to all instructions
 613         and functions as appropriate.
 614         (loadstore_ea, check_u64): New variant for model mips64.
 615         (check_fmt_p): New variant for models mipsV and mips64, remove
 616         mipsV model marking fro other variant.
 617         (SLL) Rename to...
 618         (SLLa) this.
 619         (CLO, CLZ, MADD, MADDU, MSUB, MSUBU, MUL, SLLb): New instructions
 620         for mips32 and mips64.
 621         (DCLO, DCLZ): New instructions for mips64.
 622
 623 2002-03-07  Chris Demetriou  <cgd@broadcom.com>
 624
 625         * mips.igen (BREAK, LUI, ORI, SYSCALL, XORI): Print
 626         immediate or code as a hex value with the "%#lx" format.
 627         (ANDI): Likewise, and fix printed instruction name.
 628
 629 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 630
 631         * sim-main.h (UndefinedResult, Unpredictable): New macros
 632         which currently do nothing.
 633
 634 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 635
 636         * sim-main.h (status_UX, status_SX, status_KX, status_TS)
 637         (status_PX, status_MX, status_CU0, status_CU1, status_CU2)
 638         (status_CU3): New definitions.
 639
 640         * sim-main.h (ExceptionCause): Add new values for MIPS32
 641         and MIPS64: MDMX, MCheck, CacheErr.  Update comments
 642         for DebugBreakPoint and NMIReset to note their status in
 643         MIPS32 and MIPS64.
 644         (SignalExceptionMDMX, SignalExceptionWatch, SignalExceptionMCheck)
 645         (SignalExceptionCacheErr): New exception macros.
 646
 647 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 648
 649         * mips.igen (check_fpu): Enable check for coprocessor 1 usability.
 650         * sim-main.h (COP_Usable): Define, but for now coprocessor 1
 651         is always enabled.
 652         (SignalExceptionCoProcessorUnusable): Take as argument the
 653         unusable coprocessor number.
 654
 655 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 656
 657         * mips.igen: Fix formatting of all SignalException calls.
 658
 659 2002-03-05  Chris Demetriou  <cgd@broadcom.com>
 660
 661         * sim-main.h (SIGNEXTEND): Remove.
 662
 663 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 664
 665         * mips.igen: Remove gencode comment from top of file, fix
 666         spelling in another comment.
 667
 668 2002-03-04  Chris Demetriou  <cgd@broadcom.com>
 669
 670         * mips.igen (check_fmt, check_fmt_p): New functions to check
 671         whether specific floating point formats are usable.
 672         (ABS.fmt, ADD.fmt, CEIL.L.fmt, CEIL.W, DIV.fmt, FLOOR.L.fmt)
 673         (FLOOR.W.fmt, MOV.fmt, MUL.fmt, NEG.fmt, RECIP.fmt, ROUND.L.fmt)
 674         (ROUND.W.fmt, RSQRT.fmt, SQRT.fmt, SUB.fmt, TRUNC.L.fmt, TRUNC.W):
 675         Use the new functions.
 676         (do_c_cond_fmt): Remove format checks...
 677         (C.cond.fmta, C.cond.fmtb): And move them into all callers.
 678
 679 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 680
 681         * mips.igen: Fix formatting of check_fpu calls.
 682
 683 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 684
 685         * mips.igen (FLOOR.L.fmt): Store correct destination register.
 686
 687 2002-03-03  Chris Demetriou  <cgd@broadcom.com>
 688
 689         * mips.igen: Remove whitespace at end of lines.
 690
 691 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 692
 693         * mips.igen (loadstore_ea): New function to do effective
 694         address calculations.
 695         (do_load, do_load_left, do_load_right, LL, LDD, PREF, do_store,
 696         do_store_left, do_store_right, SC, SCD, PREFX, SWC1, SWXC1,
 697         CACHE): Use loadstore_ea to do effective address computations.
 698
 699 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 700
 701         * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
 702         * mips.igen (LL, CxC1, MxC1): Likewise.
 703
 704 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 705
 706         * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,
 707         CEIL.W, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt, CVT.W.fmt, DIV.fmt,
 708         FLOOR.L.fmt, FLOOR.W.fmt, MADD.D, MADD.S, MOV.fmt, MOVtf.fmt,
 709         MSUB.D, MSUB.S, MUL.fmt, NEG.fmt, NMADD.D, NMADD.S, NMSUB.D,
 710         NMSUB.S, PREFX, RECIP.fmt, ROUND.L.fmt, ROUND.W.fmt, RSQRT.fmt,
 711         SQRT.fmt, SUB.fmt, SWC1, SWXC1, TRUNC.L.fmt, TRUNC.W, CACHE):
 712         Don't split opcode fields by hand, use the opcode field values
 713         provided by igen.
 714
 715 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 716
 717         * mips.igen (do_divu): Fix spacing.
 718
 719         * mips.igen (do_dsllv): Move to be right before DSLLV,
 720         to match the rest of the do_<shift> functions.
 721
 722 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 723
 724         * mips.igen (do_dsll, do_dsllv, DSLL32, do_dsra, DSRA32, do_dsrl,
 725         DSRL32, do_dsrlv): Trace inputs and results.
 726
 727 2002-03-01  Chris Demetriou  <cgd@broadcom.com>
 728
 729         * mips.igen (CACHE): Provide instruction-printing string.
 730
 731         * interp.c (signal_exception): Comment tokens after #endif.
 732
 733 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 734
 735         * mips.igen (LWXC1): Mark with filter "64,f", rather than just "32".
 736         (MOVtf, MxC1, MxC1, DMxC1, DMxC1, CxC1, CxC1, SQRT.fmt, MOV.fmt,
 737         NEG.fmt, ROUND.L.fmt, TRUNC.L.fmt, CEIL.L.fmt, FLOOR.L.fmt,
 738         ROUND.W.fmt, TRUNC.W, CEIL.W, FLOOR.W.fmt, RECIP.fmt, RSQRT.fmt,
 739         CVT.S.fmt, CVT.D.fmt, CVT.W.fmt, CVT.L.fmt, MOVtf.fmt, C.cond.fmta,
 740         C.cond.fmtb, SUB.fmt, MUL.fmt, DIV.fmt, MOVZ.fmt, MOVN.fmt, LDXC1,
 741         SWXC1, SDXC1, MSUB.D, MSUB.S, NMADD.S, NMADD.D, NMSUB.S, NMSUB.D,
 742         LWC1, SWC1): Add "f" to filter, since these are FP instructions.
 743
 744 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 745
 746         * mips.igen (DSRA32, DSRAV): Fix order of arguments in
 747         instruction-printing string.
 748         (LWU): Use '64' as the filter flag.
 749
 750 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 751
 752         * mips.igen (SDXC1): Fix instruction-printing string.
 753
 754 2002-02-28  Chris Demetriou  <cgd@broadcom.com>
 755
 756         * mips.igen (LDC1, SDC1): Remove mipsI model, and mark with
 757         filter flags "32,f".
 758
 759 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 760
 761         * mips.igen (PREFX): This is a 64-bit instruction, use '64'
 762         as the filter flag.
 763
 764 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 765
 766         * mips.igen (PREFX): Tweak instruction opcode fields (i.e.,
 767         add a comma) so that it more closely match the MIPS ISA
 768         documentation opcode partitioning.
 769         (PREF): Put useful names on opcode fields, and include
 770         instruction-printing string.
 771
 772 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 773
 774         * mips.igen (check_u64): New function which in the future will
 775         check whether 64-bit instructions are usable and signal an
 776         exception if not.  Currently a no-op.
 777         (DADD, DADDI, DADDIU, DADDU, DDIV, DDIVU, DMULT, DMULTU, DSLL,
 778         DSLL32, DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB,
 779         DSUBU, LD, LDL, LDR, LLD, LWU, SCD, SD, SDL, SDR, DMxC1, LDXC1,
 780         LWXC1, SDXC1, SWXC1, DMFC0, DMTC0): Use check_u64.
 781
 782         * mips.igen (check_fpu): New function which in the future will
 783         check whether FPU instructions are usable and signal an exception
 784         if not.  Currently a no-op.
 785         (ABS.fmt, ADD.fmt, BC1a, BC1b, C.cond.fmta, C.cond.fmtb,
 786         CEIL.L.fmt, CEIL.W, CxC1, CVT.D.fmt, CVT.L.fmt, CVT.S.fmt,
 787         CVT.W.fmt, DIV.fmt, DMxC1, DMxC1, FLOOR.L.fmt, FLOOR.W.fmt, LDC1,
 788         LDXC1, LWC1, LWXC1, MADD.D, MADD.S, MxC1, MOV.fmt, MOVtf,
 789         MOVtf.fmt, MOVN.fmt, MOVZ.fmt, MSUB.D, MSUB.S, MUL.fmt, NEG.fmt,
 790         NMADD.D, NMADD.S, NMSUB.D, NMSUB.S, RECIP.fmt, ROUND.L.fmt,
 791         ROUND.W.fmt, RSQRT.fmt, SDC1, SDXC1, SQRT.fmt, SUB.fmt, SWC1,
 792         SWXC1, TRUNC.L.fmt, TRUNC.W): Use check_fpu.
 793
 794 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 795
 796         * mips.igen (do_load_left, do_load_right): Move to be immediately
 797         following do_load.
 798         (do_store_left, do_store_right): Move to be immediately following
 799         do_store.
 800
 801 2002-02-27  Chris Demetriou  <cgd@broadcom.com>
 802
 803         * mips.igen (mipsV): New model name.  Also, add it to
 804         all instructions and functions where it is appropriate.
 805
 806 2002-02-18  Chris Demetriou  <cgd@broadcom.com>
 807
 808         * mips.igen: For all functions and instructions, list model
 809         names that support that instruction one per line.
 810
 811 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 812
 813         * mips.igen: Add some additional comments about supported
 814         models, and about which instructions go where.
 815         (BC1b, MFC0, MTC0, RFE): Sort supported models in the same
 816         order as is used in the rest of the file.
 817
 818 2002-02-11  Chris Demetriou  <cgd@broadcom.com>
 819
 820         * mips.igen (ADD, ADDI, DADDI, DSUB, SUB): Add comment
 821         indicating that ALU32_END or ALU64_END are there to check
 822         for overflow.
 823         (DADD): Likewise, but also remove previous comment about
 824         overflow checking.
 825
 826 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 827
 828         * mips.igen (DDIV, DIV, DIVU, DMULT, DMULTU, DSLL, DSLL32,
 829         DSLLV, DSRA, DSRA32, DSRAV, DSRL, DSRL32, DSRLV, DSUB, DSUBU,
 830         JALR, JR, MOVN, MOVZ, MTLO, MULT, MULTU, SLL, SLLV, SLT, SLTU,
 831         SRAV, SRLV, SUB, SUBU, SYNC, XOR, MOVtf, DI, DMFC0, DMTC0, EI,
 832         ERET, RFE, TLBP, TLBR, TLBWI, TLBWR): Tweak instruction opcode
 833         fields (i.e., add and move commas) so that they more closely
 834         match the MIPS ISA documentation opcode partitioning.
 835
 836 2002-02-10  Chris Demetriou  <cgd@broadcom.com>
 837
 838         * mips.igen (ADDI): Print immediate value.
 839         (BREAK): Print code.
 840         (DADDIU, DSRAV, DSRLV): Print correct instruction name.
 841         (SLL): Print "nop" specially, and don't run the code
 842         that does the shift for the "nop" case.
 843
 844 2001-11-17  Fred Fish  <fnf@redhat.com>
 845
 846         * sim-main.h (float_operation): Move enum declaration outside
 847         of _sim_cpu struct declaration.
 848
 849 2001-04-12  Jim Blandy  <jimb@redhat.com>
 850
 851         * mips.igen (CFC1, CTC1): Pass the correct register numbers to
 852         PENDING_FILL.  Use PENDING_SCHED directly to handle the pending
 853         set of the FCSR.
 854         * sim-main.h (COCIDX): Remove definition; this isn't supported by
 855         PENDING_FILL, and you can get the intended effect gracefully by
 856         calling PENDING_SCHED directly.
 857
 858 2001-02-23  Ben Elliston  <bje@redhat.com>
 859
 860         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Only define if not
 861         already defined elsewhere.
 862
 863 2001-02-19  Ben Elliston  <bje@redhat.com>
 864
 865         * sim-main.h (sim_monitor): Return an int.
 866         * interp.c (sim_monitor): Add return values.
 867         (signal_exception): Handle error conditions from sim_monitor.
 868
 869 2001-02-08  Ben Elliston  <bje@redhat.com>
 870
 871         * sim-main.c (load_memory): Pass cia to sim_core_read* functions.
 872         (store_memory): Likewise, pass cia to sim_core_write*.
 873
 874 2000-10-19  Frank Ch. Eigler  <fche@redhat.com>
 875
 876         On advice from Chris G. Demetriou <cgd@sibyte.com>:
 877         * sim-main.h (GPR_CLEAR): Remove unused alternative macro.
 878
 879 Thu Jul 27 22:02:05 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 880
 881         From Maciej W. Rozycki <macro@ds2.pg.gda.pl>:
 882         * Makefile.in: Don't delete *.igen when cleaning directory.
 883
 884 Wed Jul 19 18:50:51 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 885
 886         * m16.igen (break): Call SignalException not sim_engine_halt.
 887
 888 Mon Jul  3 11:13:20 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 889
 890         From Jason Eckhardt:
 891         * mips.igen (MOVZ.fmt, MOVN.fmt): Move conditional on GPR[RT].
 892
 893 Tue Jun 13 20:52:07 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 894
 895         * mips.igen (MxC1, DMxC1): Fix printf formatting.
 896
 897 2000-05-24  Michael Hayes  <mhayes@cygnus.com>
 898
 899         * mips.igen (do_dmultx): Fix typo.
 900
 901 Tue May 23 21:39:23 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 902
 903         * configure: Regenerated to track ../common/aclocal.m4 changes.
 904
 905 Fri Apr 28 20:48:36 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 906
 907         * mips.igen (DMxC1): Fix format arguments for sim_io_eprintf call.
 908
 909 2000-04-12  Frank Ch. Eigler  <fche@redhat.com>
 910
 911         * sim-main.h (GPR_CLEAR): Define macro.
 912
 913 Mon Apr 10 00:07:09 2000  Andrew Cagney  <cagney@b1.cygnus.com>
 914
 915         * interp.c (decode_coproc): Output long using %lx and not %s.
 916
 917 2000-03-21  Frank Ch. Eigler  <fche@redhat.com>
 918
 919         * interp.c (sim_open): Sort & extend dummy memory regions for
 920         --board=jmr3904 for eCos.
 921
 922 2000-03-02  Frank Ch. Eigler  <fche@redhat.com>
 923
 924         * configure: Regenerated.
 925
 926 Tue Feb  8 18:35:01 2000  Donald Lindsay  <dlindsay@hound.cygnus.com>
 927
 928         * interp.c, mips.igen: all 5 DEADC0DE situations now have sim_io_eprintf
 929         calls, conditional on the simulator being in verbose mode.
 930
 931 Fri Feb  4 09:45:15 2000  Donald Lindsay  <dlindsay@cygnus.com>
 932
 933         * sim-main.c (cache_op): Added case arm so that CACHE ops to a secondary
 934         cache don't get ReservedInstruction traps.
 935
 936 1999-11-29  Mark Salter  <msalter@cygnus.com>
 937
 938         * dv-tx3904sio.c (tx3904sio_io_write_buffer): Use write value as a mask
 939         to clear status bits in sdisr register. This is how the hardware works.
 940
 941         * interp.c (sim_open): Added more memory aliases for jmr3904 hardware
 942         being used by cygmon.
 943
 944 1999-11-11  Andrew Haley  <aph@cygnus.com>
 945
 946         * interp.c (decode_coproc): Correctly handle DMFC0 and DMTC0
 947         instructions.
 948
 949 Thu Sep  9 15:12:08 1999  Geoffrey Keating  <geoffk@cygnus.com>
 950
 951         * mips.igen (MULT): Correct previous mis-applied patch.
 952
 953 Tue Sep  7 13:34:54 1999  Geoffrey Keating  <geoffk@cygnus.com>
 954
 955         * mips.igen (delayslot32): Handle sequence like
 956         mtc1 $at,$f12 ; jal fp_add ; mov.s $f13,$f12
 957         correctly by calling ENGINE_ISSUE_PREFIX_HOOK() before issue.
 958         (MULT): Actually pass the third register...
 959
 960 1999-09-03  Mark Salter  <msalter@cygnus.com>
 961
 962         * interp.c (sim_open): Added more memory aliases for additional
 963         hardware being touched by cygmon on jmr3904 board.
 964
 965 Thu Sep  2 18:15:53 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 966
 967         * configure: Regenerated to track ../common/aclocal.m4 changes.
 968
 969 Tue Jul 27 16:36:51 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 970
 971         * interp.c (sim_store_register): Handle case where client - GDB -
 972         specifies that a 4 byte register is 8 bytes in size.
 973         (sim_fetch_register): Ditto.
 974
 975 1999-07-14  Frank Ch. Eigler  <fche@cygnus.com>
 976
 977         Implement "sim firmware" option, inspired by jimb's version of 1998-01.
 978         * interp.c (firmware_option_p): New global flag: "sim firmware" given.
 979         (idt_monitor_base): Base address for IDT monitor traps.
 980         (pmon_monitor_base): Ditto for PMON.
 981         (lsipmon_monitor_base): Ditto for LSI PMON.
 982         (MONITOR_BASE, MONITOR_SIZE): Removed macros.
 983         (mips_option): Add "firmware" option with new OPTION_FIRMWARE key.
 984         (sim_firmware_command): New function.
 985         (mips_option_handler): Call it for OPTION_FIRMWARE.
 986         (sim_open): Allocate memory for idt_monitor region.  If "--board"
 987         option was given, add no monitor by default.  Add BREAK hooks only if
 988         monitors are also there.
 989
 990 Mon Jul 12 00:02:27 1999  Andrew Cagney  <cagney@amy.cygnus.com>
 991
 992         * interp.c (sim_monitor): Flush output before reading input.
 993
 994 Sun Jul 11 19:28:11 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 995
 996         * tconfig.in (SIM_HANDLES_LMA): Always define.
 997
 998 Thu Jul  8 16:06:59 1999  Andrew Cagney  <cagney@b1.cygnus.com>
 999
1000         From Mark Salter <msalter@cygnus.com>:
1001         * interp.c (BOARD_BSP): Define.  Add to list of possible boards.
1002         (sim_open): Add setup for BSP board.
1003
1004 Wed Jul  7 12:45:58 1999  Andrew Cagney  <cagney@b1.cygnus.com>
1005
1006         * mips.igen (MULT, MULTU): Add syntax for two operand version.
1007         (DMFC0, DMTC0): Recognize.  Call DecodeCoproc which will report
1008         them as unimplemented.
1009
1010 1999-05-08  Felix Lee  <flee@cygnus.com>
1011
1012         * configure: Regenerated to track ../common/aclocal.m4 changes.
1013
1014 1999-04-21  Frank Ch. Eigler  <fche@cygnus.com>
1015
1016         * mips.igen (bc0f): For the TX39 only, decode this as a no-op stub.
1017
1018 Thu Apr 15 14:15:17 1999  Andrew Cagney  <cagney@amy.cygnus.com>
1019
1020         * configure.in: Any mips64vr5*-*-* target should have
1021         -DTARGET_ENABLE_FR=1.
1022         (default_endian): Any mips64vr*el-*-* target should default to
1023         LITTLE_ENDIAN.
1024         * configure: Re-generate.
1025
1026 1999-02-19  Gavin Romig-Koch  <gavin@cygnus.com>
1027
1028         * mips.igen (ldl): Extend from _16_, not 32.
1029
1030 Wed Jan 27 18:51:38 1999  Andrew Cagney  <cagney@chook.cygnus.com>
1031
1032         * interp.c (sim_store_register): Force registers written to by GDB
1033         into an un-interpreted state.
1034
1035 1999-02-05  Frank Ch. Eigler  <fche@cygnus.com>
1036
1037         * dv-tx3904sio.c (tx3904sio_tickle): After a polled I/O from the
1038         CPU, start periodic background I/O polls.
1039         (tx3904sio_poll): New function: periodic I/O poller.
1040
1041 1998-12-30  Frank Ch. Eigler  <fche@cygnus.com>
1042
1043         * mips.igen (BREAK): Call signal_exception instead of sim_engine_halt.
1044
1045 Tue Dec 29 16:03:53 1998  Rainer Orth  <ro@TechFak.Uni-Bielefeld.DE>
1046
1047         * configure.in, configure (mips64vr5*-*-*): Added missing ;; in
1048         case statement.
1049
1050 1998-12-29  Frank Ch. Eigler  <fche@cygnus.com>
1051
1052         * interp.c (sim_open): Allocate jm3904 memory in smaller chunks.
1053         (load_word): Call SIM_CORE_SIGNAL hook on error.
1054         (signal_exception): Call SIM_CPU_EXCEPTION_TRIGGER hook before
1055         starting.  For exception dispatching, pass PC instead of NULL_CIA.
1056         (decode_coproc): Use COP0_BADVADDR to store faulting address.
1057         * sim-main.h (COP0_BADVADDR): Define.
1058         (SIM_CORE_SIGNAL): Define hook to call mips_core_signal.
1059         (SIM_CPU_EXCEPTION*): Define hooks to call mips_cpu_exception*().
1060         (_sim_cpu): Add exc_* fields to store register value snapshots.
1061         * mips.igen (*): Replace memory-related SignalException* calls
1062         with references to SIM_CORE_SIGNAL hook.
1063
1064         * dv-tx3904irc.c (tx3904irc_port_event): printf format warning
1065         fix.
1066         * sim-main.c (*): Minor warning cleanups.
1067
1068 1998-12-24  Gavin Romig-Koch  <gavin@cygnus.com>
1069
1070         * m16.igen (DADDIU5): Correct type-o.
1071
1072 Mon Dec 21 10:34:48 1998  Andrew Cagney  <cagney@chook>
1073
1074         * mips.igen (do_ddiv, do_ddivu): Pacify GCC. Update hi/lo via tmp
1075         variables.
1076
1077 Wed Dec 16 18:20:28 1998  Andrew Cagney  <cagney@chook>
1078
1079         * Makefile.in (SIM_EXTRA_CFLAGS): No longer need to add .../newlib
1080         to include path.
1081         (interp.o): Add dependency on itable.h
1082         (oengine.c, gencode): Delete remaining references.
1083         (BUILT_SRC_FROM_GEN): Clean up.
1084
1085 1998-12-16  Gavin Romig-Koch  <gavin@cygnus.com>
1086
1087         * vr4run.c: New.
1088         * Makefile.in (SIM_HACK_OBJ,HACK_OBJS,HACK_GEN_SRCS,libhack.a,
1089         tmp-hack,tmp-m32-hack,tmp-m16-hack,tmp-itable-hack,
1090         tmp-run-hack) : New.
1091         * m16.igen (LD,DADDIU,DADDUI5,DADJSP,DADDIUSP,DADDI,DADDU,DSUBU,
1092         DSLL,DSRL,DSRA,DSLLV,DSRAV,DMULT,DMULTU,DDIV,DDIVU,JALX32,JALX):
1093         Drop the "64" qualifier to get the HACK generator working.
1094         Use IMMEDIATE rather than IMMED.  Use SHAMT rather than SHIFT.
1095         * mips.igen (do_daddiu,do_ddiv,do_divu): Remove the 64-only
1096         qualifier to get the hack generator working.
1097         (do_dsll,do_dsllv,do_dsra,do_dsrl,do_dsrlv): New.
1098         (DSLL): Use do_dsll.
1099         (DSLLV): Use do_dsllv.
1100         (DSRA): Use do_dsra.
1101         (DSRL): Use do_dsrl.
1102         (DSRLV): Use do_dsrlv.
1103         (BC1): Move *vr4100 to get the HACK generator working.
1104         (CxC1, DMxC1, MxC1,MACCU,MACCHI,MACCHIU): Rename to
1105         get the HACK generator working.
1106         (MACC) Rename to get the HACK generator working.
1107         (DMACC,MACCS,DMACCS): Add the 64.
1108
1109 1998-12-12  Gavin Romig-Koch  <gavin@cygnus.com>
1110
1111         * mips.igen (BC1): Renamed to BC1a and BC1b to avoid conflicts.
1112         * sim-main.h (SizeFGR): Handle TARGET_ENABLE_FR.
1113
1114 1998-12-11  Gavin Romig-Koch  <gavin@cygnus.com>
1115
1116     * mips/interp.c (DEBUG): Cleanups.
1117
1118 1998-12-10  Frank Ch. Eigler  <fche@cygnus.com>
1119
1120         * dv-tx3904sio.c (tx3904sio_io_read_buffer): Endianness fixes.
1121         (tx3904sio_tickle): fflush after a stdout character output.
1122
1123 1998-12-03  Frank Ch. Eigler  <fche@cygnus.com>
1124
1125         * interp.c (sim_close): Uninstall modules.
1126
1127 Wed Nov 25 13:41:03 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1128
1129         * sim-main.h, interp.c (sim_monitor): Change to global
1130         function.
1131
1132 Wed Nov 25 17:33:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1133
1134         * configure.in (vr4100): Only include vr4100 instructions in
1135         simulator.
1136         * configure: Re-generate.
1137         * m16.igen (*): Tag all mips16 instructions as also being vr4100.
1138
1139 Mon Nov 23 18:20:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1140
1141         * Makefile.in (SIM_CFLAGS): Do not define WITH_IGEN.
1142         * sim-main.h, sim-main.c, interp.c: Delete #if WITH_IGEN keeping
1143         true alternative.
1144
1145         * configure.in (sim_default_gen, sim_use_gen): Replace with
1146         sim_gen.
1147         (--enable-sim-igen): Delete config option. Always using IGEN.
1148         * configure: Re-generate.
1149
1150         * Makefile.in (gencode): Kill, kill, kill.
1151         * gencode.c: Ditto.
1152
1153 Mon Nov 23 18:07:36 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1154
1155         * configure.in: Configure mips64vr4100-elf nee mips64vr41* as a 64
1156         bit mips16 igen simulator.
1157         * configure: Re-generate.
1158
1159         * mips.igen (check_div_hilo, check_mult_hilo, check_mf_hilo): Mark
1160         as part of vr4100 ISA.
1161         * vr.igen: Mark all instructions as 64 bit only.
1162
1163 Mon Nov 23 17:07:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1164
1165         * interp.c (get_cell, sim_monitor, fetch_str, CoProcPresent):
1166         Pacify GCC.
1167
1168 Mon Nov 23 13:23:40 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1169
1170         * configure.in: Configure mips-lsi-elf nee mips*lsi* as a
1171         mipsIII/mips16 igen simulator.  Fix sim_gen VS sim_igen typos.
1172         * configure: Re-generate.
1173
1174         * m16.igen (BREAK): Define breakpoint instruction.
1175         (JALX32): Mark instruction as mips16 and not r3900.
1176         * mips.igen (C.cond.fmt): Fix typo in instruction format.
1177
1178         * sim-main.h (PENDING_FILL): Wrap C statements in do/while.
1179
1180 Sat Nov  7 09:54:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1181
1182         * gencode.c (build_instruction - BREAK): For MIPS16, handle BREAK
1183         insn as a debug breakpoint.
1184
1185         * sim-main.h (PENDING_SLOT_BIT): Fix, was incorrectly defined as
1186         pending.slot_size.
1187         (PENDING_SCHED): Clean up trace statement.
1188         (PENDING_SCHED): Increment PENDING_IN and PENDING_TOTAL.
1189         (PENDING_FILL): Delay write by only one cycle.
1190         (PENDING_FILL): For FSRs, write fmt_uninterpreted to FPR_STATE.
1191
1192         * sim-main.c (pending_tick): Clean up trace statements. Add trace
1193         of pending writes.
1194         (pending_tick): Fix sizes in switch statements, 4 & 8 instead of
1195         32 & 64.
1196         (pending_tick): Move incrementing of index to FOR statement.
1197         (pending_tick): Only update PENDING_OUT after a write has occured.
1198
1199         * configure.in: Add explicit mips-lsi-* target.  Use gencode to
1200         build simulator.
1201         * configure: Re-generate.
1202
1203         * interp.c (sim_engine_run OLD): Delete explicit call to
1204         PENDING_TICK. Now called via ENGINE_ISSUE_PREFIX_HOOK.
1205
1206 Sat Oct 30 09:49:10 1998  Frank Ch. Eigler  <fche@cygnus.com>
1207
1208         * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Add dummy
1209         interrupt level number to match changed SignalExceptionInterrupt
1210         macro.
1211
1212 Fri Oct  9 18:02:25 1998  Doug Evans  <devans@canuck.cygnus.com>
1213
1214         * interp.c: #include "itable.h" if WITH_IGEN.
1215         (get_insn_name): New function.
1216         (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS.
1217         * sim-main.h (MAX_INSNS,INSN_NAME): Delete.
1218
1219 Mon Sep 14 12:36:44 1998  Frank Ch. Eigler  <fche@cygnus.com>
1220
1221         * configure: Rebuilt to inhale new common/aclocal.m4.
1222
1223 Tue Sep  1 15:39:18 1998  Frank Ch. Eigler  <fche@cygnus.com>
1224
1225         * dv-tx3904sio.c: Include sim-assert.h.
1226
1227 Tue Aug 25 12:49:46 1998  Frank Ch. Eigler  <fche@cygnus.com>
1228
1229         * dv-tx3904sio.c: New file: tx3904 serial I/O module.
1230         * configure.in: Add dv-tx3904sio, dv-sockser for tx39 target.
1231         Reorganize target-specific sim-hardware checks.
1232         * configure: rebuilt.
1233         * interp.c (sim_open): For tx39 target boards, set
1234         OPERATING_ENVIRONMENT, add tx3904sio devices.
1235         * tconfig.in: For tx39 target, set SIM_HANDLES_LMA for loading
1236         ROM executables.  Install dv-sockser into sim-modules list.
1237
1238         * dv-tx3904irc.c: Compiler warning clean-up.
1239         * dv-tx3904tmr.c: Compiler warning clean-up.  Remove particularly
1240         frequent hw-trace messages.
1241
1242 Fri Jul 31 18:14:16 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1243
1244         * vr.igen (MulAcc): Identify as a vr4100 specific function.
1245
1246 Sat Jul 25 16:03:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1247
1248         * Makefile.in (IGEN_INCLUDE): Add vr.igen.
1249
1250         * vr.igen: New file.
1251         (MAC/MADD16, DMAC/DMADD16): Implement using code from gencode.c.
1252         * mips.igen: Define vr4100 model. Include vr.igen.
1253 Mon Jun 29 09:21:07 1998  Gavin Koch  <gavin@cygnus.com>
1254
1255         * mips.igen (check_mf_hilo): Correct check.
1256
1257 Wed Jun 17 12:20:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1258
1259         * sim-main.h (interrupt_event): Add prototype.
1260
1261         * dv-tx3904tmr.c (tx3904tmr_io_write_buffer): Delete unused
1262         register_ptr, register_value.
1263         (deliver_tx3904tmr_tick): Fix types passed to printf fmt.
1264
1265         * sim-main.h (tracefh): Make extern.
1266
1267 Tue Jun 16 14:39:00 1998  Frank Ch. Eigler  <fche@cygnus.com>
1268
1269         * dv-tx3904tmr.c: Deschedule timer event after dispatching.
1270         Reduce unnecessarily high timer event frequency.
1271         * dv-tx3904cpu.c: Ditto for interrupt event.
1272
1273 Wed Jun 10 13:22:32 1998  Frank Ch. Eigler  <fche@cygnus.com>
1274
1275         * interp.c (decode_coproc): For TX39, add stub COP0 register #7,
1276         to allay warnings.
1277         (interrupt_event): Made non-static.
1278
1279         * dv-tx3904tmr.c (deliver_tx3904tmr_tick): Correct accidental
1280         interchange of configuration values for external vs. internal
1281         clock dividers.
1282
1283 Tue Jun  9 12:46:24 1998  Ian Carmichael  <iancarm@cygnus.com>
1284
1285         * mips.igen (BREAK): Moved code to here for
1286         simulator-reserved break instructions.
1287         * gencode.c (build_instruction): Ditto.
1288         * interp.c (signal_exception): Code moved from here.  Non-
1289         reserved instructions now use exception vector, rather
1290         than halting sim.
1291         * sim-main.h: Moved magic constants to here.
1292
1293 Tue Jun  9 12:29:50 1998  Frank Ch. Eigler  <fche@cygnus.com>
1294
1295         * dv-tx3904cpu.c (deliver_*_interrupt,*_port_event): Set the CAUSE
1296         register upon non-zero interrupt event level, clear upon zero
1297         event value.
1298         * dv-tx3904irc.c (*_port_event): Handle deactivated interrupt signal
1299         by passing zero event value.
1300         (*_io_{read,write}_buffer): Endianness fixes.
1301         * dv-tx3904tmr.c (*_io_{read,write}_buffer): Endianness fixes.
1302         (deliver_*_tick): Reduce sim event interval to 75% of count interval.
1303
1304         * interp.c (sim_open): Added jmr3904pal board type that adds PAL-based
1305         serial I/O and timer module at base address 0xFFFF0000.
1306
1307 Tue Jun  9 11:52:29 1998  Gavin Koch  <gavin@cygnus.com>
1308
1309         * mips.igen (SWC1) : Correct the handling of ReverseEndian
1310         and BigEndianCPU.
1311
1312 Tue Jun  9 11:40:57 1998  Gavin Koch  <gavin@cygnus.com>
1313
1314         * configure.in (mips_fpu_bitsize) : Set this correctly for 32-bit mips
1315         parts.
1316         * configure: Update.
1317
1318 Thu Jun  4 15:37:33 1998  Frank Ch. Eigler  <fche@cygnus.com>
1319
1320         * dv-tx3904tmr.c: New file - implements tx3904 timer.
1321         * dv-tx3904{irc,cpu}.c: Mild reformatting.
1322         * configure.in: Include tx3904tmr in hw_device list.
1323         * configure: Rebuilt.
1324         * interp.c (sim_open): Instantiate three timer instances.
1325         Fix address typo of tx3904irc instance.
1326
1327 Tue Jun  2 15:48:02 1998  Ian Carmichael  <iancarm@cygnus.com>
1328
1329         * interp.c (signal_exception): SystemCall exception now uses
1330         the exception vector.
1331
1332 Mon Jun  1 18:18:26 1998  Frank Ch. Eigler  <fche@cygnus.com>
1333
1334         * interp.c (decode_coproc): For TX39, add stub COP0 register #3,
1335         to allay warnings.
1336
1337 Fri May 29 11:40:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1338
1339         * configure.in (sim_igen_filter): Match mips*tx39 not mipst*tx39.
1340
1341 Mon May 25 20:47:45 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1342
1343         * dv-tx3904cpu.c, dv-tx3904irc.c: Rename *_callback to *_method.
1344
1345         * dv-tx3904cpu.c, dv-tx3904irc.c: Include hw-main.h and
1346         sim-main.h. Declare a struct hw_descriptor instead of struct
1347         hw_device_descriptor.
1348
1349 Mon May 25 12:41:38 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1350
1351         * mips.igen (do_store_left, do_load_left): Compute nr of left and
1352         right bits and then re-align left hand bytes to correct byte
1353         lanes.  Fix incorrect computation in do_store_left when loading
1354         bytes from second word.
1355
1356 Fri May 22 13:34:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1357
1358         * configure.in (SIM_AC_OPTION_HARDWARE): Only enable when tx3904.
1359         * interp.c (sim_open): Only create a device tree when HW is
1360         enabled.
1361
1362         * dv-tx3904irc.c (tx3904irc_finish): Pacify GCC.
1363         * interp.c (signal_exception): Ditto.
1364
1365 Thu May 21 14:24:11 1998  Gavin Koch  <gavin@cygnus.com>
1366
1367         * gencode.c: Mark BEGEZALL as LIKELY.
1368
1369 Thu May 21 18:57:19 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1370
1371         * sim-main.h (ALU32_END): Sign extend 32 bit results.
1372         * mips.igen (ADD, SUB, ADDI, DADD, DSUB): Trace.
1373
1374 Mon May 18 18:22:42 1998  Frank Ch. Eigler  <fche@cygnus.com>
1375
1376         * configure.in (SIM_AC_OPTION_HARDWARE): Added common hardware
1377         modules.  Recognize TX39 target with "mips*tx39" pattern.
1378         * configure: Rebuilt.
1379         * sim-main.h (*): Added many macros defining bits in
1380         TX39 control registers.
1381         (SignalInterrupt): Send actual PC instead of NULL.
1382         (SignalNMIReset): New exception type.
1383         * interp.c (board): New variable for future use to identify
1384         a particular board being simulated.
1385         (mips_option_handler,mips_options): Added "--board" option.
1386         (interrupt_event): Send actual PC.
1387         (sim_open): Make memory layout conditional on board setting.
1388         (signal_exception): Initial implementation of hardware interrupt
1389         handling.  Accept another break instruction variant for simulator
1390         exit.
1391         (decode_coproc): Implement RFE instruction for TX39.
1392         (mips.igen): Decode RFE instruction as such.
1393         * configure.in (tx3904cpu,tx3904irc): Added devices for tx3904.
1394         * interp.c: Define "jmr3904" and "jmr3904debug" board types and
1395         bbegin to implement memory map.
1396         * dv-tx3904cpu.c: New file.
1397         * dv-tx3904irc.c: New file.
1398
1399 Wed May 13 14:40:11 1998  Gavin Koch  <gavin@cygnus.com>
1400
1401         * mips.igen (check_mt_hilo): Create a separate r3900 version.
1402
1403 Wed May 13 14:11:46 1998  Gavin Koch  <gavin@cygnus.com>
1404
1405         * tx.igen (madd,maddu):  Replace calls to check_op_hilo
1406         with calls to check_div_hilo.
1407
1408 Wed May 13 09:59:27 1998  Gavin Koch  <gavin@cygnus.com>
1409
1410         * mips/mips.igen (check_op_hilo,check_mult_hilo,check_div_hilo):
1411         Replace check_op_hilo with check_mult_hilo and check_div_hilo.
1412         Add special r3900 version of do_mult_hilo.
1413         (do_dmultx,do_mult,do_multu): Replace calls to check_op_hilo
1414         with calls to check_mult_hilo.
1415         (do_ddiv,do_ddivu,do_div,do_divu): Replace calls to check_op_hilo
1416         with calls to check_div_hilo.
1417
1418 Tue May 12 15:22:11 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1419
1420         * configure.in (SUBTARGET_R3900): Define for mipstx39 target.
1421         Document a replacement.
1422
1423 Fri May  8 17:48:19 1998  Ian Carmichael  <iancarm@cygnus.com>
1424
1425         * interp.c (sim_monitor): Make mon_printf work.
1426
1427 Wed May  6 19:42:19 1998  Doug Evans  <devans@canuck.cygnus.com>
1428
1429         * sim-main.h (INSN_NAME): New arg `cpu'.
1430
1431 Tue Apr 28 18:33:31 1998  Geoffrey Noer  <noer@cygnus.com>
1432
1433         * configure: Regenerated to track ../common/aclocal.m4 changes.
1434
1435 Sun Apr 26 15:31:55 1998  Tom Tromey  <tromey@creche>
1436
1437         * configure: Regenerated to track ../common/aclocal.m4 changes.
1438         * config.in: Ditto.
1439
1440 Sun Apr 26 15:20:01 1998  Tom Tromey  <tromey@cygnus.com>
1441
1442         * acconfig.h: New file.
1443         * configure.in: Reverted change of Apr 24; use sinclude again.
1444
1445 Fri Apr 24 14:16:40 1998  Tom Tromey  <tromey@creche>
1446
1447         * configure: Regenerated to track ../common/aclocal.m4 changes.
1448         * config.in: Ditto.
1449
1450 Fri Apr 24 11:19:20 1998  Tom Tromey  <tromey@cygnus.com>
1451
1452         * configure.in: Don't call sinclude.
1453
1454 Fri Apr 24 11:35:01 1998  Andrew Cagney  <cagney@chook.cygnus.com>
1455
1456         * mips.igen (do_store_left): Pass 0 not NULL to store_memory.
1457
1458 Tue Apr 21 11:59:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1459
1460         * mips.igen (ERET): Implement.
1461
1462         * interp.c (decode_coproc): Return sign-extended EPC.
1463
1464         * mips.igen (ANDI, LUI, MFC0): Add tracing code.
1465
1466         * interp.c (signal_exception): Do not ignore Trap.
1467         (signal_exception): On TRAP, restart at exception address.
1468         (HALT_INSTRUCTION, HALT_INSTRUCTION_MASK): Define.
1469         (signal_exception): Update.
1470         (sim_open): Patch V_COMMON interrupt vector with an abort sequence
1471         so that TRAP instructions are caught.
1472
1473 Mon Apr 20 11:26:55 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1474
1475         * sim-main.h (struct hilo_access, struct hilo_history): Define,
1476         contains HI/LO access history.
1477         (struct _sim_cpu): Make hiaccess and loaccess of type hilo_access.
1478         (HIACCESS, LOACCESS): Delete, replace with
1479         (HIHISTORY, LOHISTORY): New macros.
1480         (CHECKHILO): Delete all, moved to mips.igen
1481
1482         * gencode.c (build_instruction): Do not generate checks for
1483         correct HI/LO register usage.
1484
1485         * interp.c (old_engine_run): Delete checks for correct HI/LO
1486         register usage.
1487
1488         * mips.igen (check_mt_hilo, check_mf_hilo, check_op_hilo,
1489         check_mf_cycles): New functions.
1490         (do_mfhi, do_mflo, "mthi", "mtlo", do_ddiv, do_ddivu, do_div,
1491         do_divu, domultx, do_mult, do_multu): Use.
1492
1493         * tx.igen ("madd", "maddu"): Use.
1494
1495 Wed Apr 15 18:31:54 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1496
1497         * mips.igen (DSRAV): Use function do_dsrav.
1498         (SRAV): Use new function do_srav.
1499
1500         * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX].
1501         (B): Sign extend 11 bit immediate.
1502         (EXT-B*): Shift 16 bit immediate left by 1.
1503         (ADDIU*): Don't sign extend immediate value.
1504
1505 Wed Apr 15 10:32:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1506
1507         * m16run.c (sim_engine_run): Restore CIA after handling an event.
1508
1509         * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use
1510         functions.
1511
1512         * mips.igen (delayslot32, nullify_next_insn): New functions.
1513         (m16.igen): Always include.
1514         (do_*): Add more tracing.
1515
1516         * m16.igen (delayslot16): Add NIA argument, could be called by a
1517         32 bit MIPS16 instruction.
1518
1519         * interp.c (ifetch16): Move function from here.
1520         * sim-main.c (ifetch16): To here.
1521
1522         * sim-main.c (ifetch16, ifetch32): Update to match current
1523         implementations of LH, LW.
1524         (signal_exception): Don't print out incorrect hex value of illegal
1525         instruction.
1526
1527 Wed Apr 15 00:17:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1528
1529         * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an
1530         instruction.
1531
1532         * m16.igen: Implement MIPS16 instructions.
1533
1534         * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu,
1535         do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav,
1536         do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or,
1537         do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra,
1538         do_srl, do_srlv, do_subu, do_xor, do_xori): New functions.  Move
1539         bodies of corresponding code from 32 bit insn to these.  Also used
1540         by MIPS16 versions of functions.
1541
1542         * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define.
1543         (IMEM16): Drop NR argument from macro.
1544
1545 Sat Apr  4 22:39:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1546
1547         * Makefile.in (SIM_OBJS): Add sim-main.o.
1548
1549         * sim-main.h (address_translation, load_memory, store_memory,
1550         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark
1551         as INLINE_SIM_MAIN.
1552         (pr_addr, pr_uword64): Declare.
1553         (sim-main.c): Include when H_REVEALS_MODULE_P.
1554
1555         * interp.c (address_translation, load_memory, store_memory,
1556         cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move
1557         from here.
1558         * sim-main.c: To here. Fix compilation problems.
1559
1560         * configure.in: Enable inlining.
1561         * configure: Re-config.
1562
1563 Sat Apr  4 20:36:25 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1564
1565         * configure: Regenerated to track ../common/aclocal.m4 changes.
1566
1567 Fri Apr  3 04:32:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1568
1569         * mips.igen: Include tx.igen.
1570         * Makefile.in (IGEN_INCLUDE): Add tx.igen.
1571         * tx.igen: New file, contains MADD and MADDU.
1572
1573         * interp.c (load_memory): When shifting bytes, use LOADDRMASK not
1574         the hardwired constant `7'.
1575         (store_memory): Ditto.
1576         (LOADDRMASK): Move definition to sim-main.h.
1577
1578         mips.igen (MTC0): Enable for r3900.
1579         (ADDU): Add trace.
1580
1581         mips.igen (do_load_byte): Delete.
1582         (do_load, do_store, do_load_left, do_load_write, do_store_left,
1583         do_store_right): New functions.
1584         (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use.
1585
1586         configure.in: Let the tx39 use igen again.
1587         configure: Update.
1588
1589 Thu Apr  2 10:59:39 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1590
1591         * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity,
1592         not an address sized quantity.  Return zero for cache sizes.
1593
1594 Wed Apr  1 23:47:53 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1595
1596         * mips.igen (r3900): r3900 does not support 64 bit integer
1597         operations.
1598
1599 Mon Mar 30 14:46:05 1998  Gavin Koch  <gavin@cygnus.com>
1600
1601         * configure.in (mipstx39*-*-*): Use gencode simulator rather
1602         than igen one.
1603         * configure : Rebuild.
1604
1605 Fri Mar 27 16:15:52 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1606
1607         * configure: Regenerated to track ../common/aclocal.m4 changes.
1608
1609 Fri Mar 27 15:01:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1610
1611         * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS.
1612
1613 Wed Mar 25 16:44:27 1998  Ian Carmichael  <iancarm@cygnus.com>
1614
1615         * configure: Regenerated to track ../common/aclocal.m4 changes.
1616         * config.in: Regenerated to track ../common/aclocal.m4 changes.
1617
1618 Wed Mar 25 12:35:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1619
1620         * configure: Regenerated to track ../common/aclocal.m4 changes.
1621
1622 Wed Mar 25 10:05:46 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1623
1624         * interp.c (Max, Min): Comment out functions. Not yet used.
1625
1626 Wed Mar 18 12:38:12 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1627
1628         * configure: Regenerated to track ../common/aclocal.m4 changes.
1629
1630 Tue Mar 17 19:05:20 1998  Frank Ch. Eigler  <fche@cygnus.com>
1631
1632         * Makefile.in (MIPS_EXTRA_LIBS, SIM_EXTRA_LIBS): Added
1633         configurable settings for stand-alone simulator.
1634
1635         * configure.in: Added X11 search, just in case.
1636
1637         * configure: Regenerated.
1638
1639 Wed Mar 11 14:09:10 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1640
1641         * interp.c (sim_write, sim_read, load_memory, store_memory):
1642         Replace sim_core_*_map with read_map, write_map, exec_map resp.
1643
1644 Tue Mar  3 13:58:43 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1645
1646         * sim-main.h (GETFCC): Return an unsigned value.
1647
1648 Tue Mar  3 13:21:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1649
1650         * mips.igen (DIV): Fix check for -1 / MIN_INT.
1651         (DADD): Result destination is RD not RT.
1652
1653 Fri Feb 27 13:49:49 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1654
1655         * sim-main.h (HIACCESS, LOACCESS): Always define.
1656
1657         * mdmx.igen (Maxi, Mini): Rename Max, Min.
1658
1659         * interp.c (sim_info): Delete.
1660
1661 Fri Feb 27 18:41:01 1998  Doug Evans  <devans@canuck.cygnus.com>
1662
1663         * interp.c (DECLARE_OPTION_HANDLER): Use it.
1664         (mips_option_handler): New argument `cpu'.
1665         (sim_open): Update call to sim_add_option_table.
1666
1667 Wed Feb 25 18:56:22 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1668
1669         * mips.igen (CxC1): Add tracing.
1670
1671 Fri Feb 20 17:43:21 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1672
1673         * sim-main.h (Max, Min): Declare.
1674
1675         * interp.c (Max, Min): New functions.
1676
1677         * mips.igen (BC1): Add tracing.
1678
1679 Thu Feb 19 14:50:00 1998  John Metzler  <jmetzler@cygnus.com>
1680
1681         * interp.c Added memory map for stack in vr4100
1682
1683 Thu Feb 19 10:21:21 1998  Gavin Koch  <gavin@cygnus.com>
1684
1685         * interp.c (load_memory): Add missing "break"'s.
1686
1687 Tue Feb 17 12:45:35 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1688
1689         * interp.c (sim_store_register, sim_fetch_register): Pass in
1690         length parameter.  Return -1.
1691
1692 Tue Feb 10 11:57:40 1998  Ian Carmichael  <iancarm@cygnus.com>
1693
1694         * interp.c: Added hardware init hook, fixed warnings.
1695
1696 Sat Feb  7 17:16:20 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1697
1698         * Makefile.in (itable.h itable.c): Depend on SIM_@sim_gen@_ALL.
1699
1700 Tue Feb  3 11:36:02 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1701
1702         * interp.c (ifetch16): New function.
1703
1704         * sim-main.h (IMEM32): Rename IMEM.
1705         (IMEM16_IMMED): Define.
1706         (IMEM16): Define.
1707         (DELAY_SLOT): Update.
1708
1709         * m16run.c (sim_engine_run): New file.
1710
1711         * m16.igen: All instructions except LB.
1712         (LB): Call do_load_byte.
1713         * mips.igen (do_load_byte): New function.
1714         (LB): Call do_load_byte.
1715
1716         * mips.igen: Move spec for insn bit size and high bit from here.
1717         * Makefile.in (tmp-igen, tmp-m16): To here.
1718
1719         * m16.dc: New file, decode mips16 instructions.
1720
1721         * Makefile.in (SIM_NO_ALL): Define.
1722         (tmp-m16): Generate both 16 bit and 32 bit simulator engines.
1723
1724 Tue Feb  3 11:28:00 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1725
1726         * configure.in (mips_fpu_bitsize): For tx39, restrict floating
1727         point unit to 32 bit registers.
1728         * configure: Re-generate.
1729
1730 Sun Feb  1 15:47:14 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1731
1732         * configure.in (sim_use_gen): Make IGEN the default simulator
1733         generator for generic 32 and 64 bit mips targets.
1734         * configure: Re-generate.
1735
1736 Sun Feb  1 16:52:37 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1737
1738         * sim-main.h (SizeFGR): Determine from floating-point and not gpr
1739         bitsize.
1740
1741         * interp.c (sim_fetch_register, sim_store_register): Read/write
1742         FGR from correct location.
1743         (sim_open): Set size of FGR's according to
1744         WITH_TARGET_FLOATING_POINT_BITSIZE.
1745
1746         * sim-main.h (FGR): Store floating point registers in a separate
1747         array.
1748
1749 Sun Feb  1 16:47:51 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1750
1751         * configure: Regenerated to track ../common/aclocal.m4 changes.
1752
1753 Tue Feb  3 00:10:50 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1754
1755         * interp.c (ColdReset): Call PENDING_INVALIDATE.
1756
1757         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Call PENDING_TICK.
1758
1759         * interp.c (pending_tick): New function.  Deliver pending writes.
1760
1761         * sim-main.h (PENDING_FILL, PENDING_TICK, PENDING_SCHED,
1762         PENDING_BIT, PENDING_INVALIDATE): Re-write pipeline code so that
1763         it can handle mixed sized quantites and single bits.
1764
1765 Mon Feb  2 17:43:15 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1766
1767         * interp.c (oengine.h): Do not include when building with IGEN.
1768         (sim_open): Replace GPRLEN by WITH_TARGET_WORD_BITSIZE.
1769         (sim_info): Ditto for PROCESSOR_64BIT.
1770         (sim_monitor): Replace ut_reg with unsigned_word.
1771         (*): Ditto for t_reg.
1772         (LOADDRMASK): Define.
1773         (sim_open): Remove defunct check that host FP is IEEE compliant,
1774         using software to emulate floating point.
1775         (value_fpr, ...): Always compile, was conditional on HASFPU.
1776
1777 Sun Feb  1 11:15:29 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1778
1779         * sim-main.h (sim_state): Make the cpu array MAX_NR_PROCESSORS in
1780         size.
1781
1782         * interp.c (SD, CPU): Define.
1783         (mips_option_handler): Set flags in each CPU.
1784         (interrupt_event): Assume CPU 0 is the one being iterrupted.
1785         (sim_close): Do not clear STATE, deleted anyway.
1786         (sim_write, sim_read): Assume CPU zero's vm should be used for
1787         data transfers.
1788         (sim_create_inferior): Set the PC for all processors.
1789         (sim_monitor, store_word, load_word, mips16_entry): Add cpu
1790         argument.
1791         (mips16_entry): Pass correct nr of args to store_word, load_word.
1792         (ColdReset): Cold reset all cpu's.
1793         (signal_exception): Pass cpu to sim_monitor & mips16_entry.
1794         (sim_monitor, load_memory, store_memory, signal_exception): Use
1795         `CPU' instead of STATE_CPU.
1796
1797
1798         * sim-main.h: Replace uses of STATE_CPU with CPU. Replace sd with
1799         SD or CPU_.
1800
1801         * sim-main.h (signal_exception): Add sim_cpu arg.
1802         (SignalException*): Pass both SD and CPU to signal_exception.
1803         * interp.c (signal_exception): Update.
1804
1805         * sim-main.h (value_fpr, store_fpr, dotrace, ifetch32), interp.c:
1806         Ditto
1807         (sync_operation, prefetch, cache_op, store_memory, load_memory,
1808         address_translation): Ditto
1809         (decode_coproc, cop_lw, cop_ld, cop_sw, cop_sd): Ditto.
1810
1811 Sat Jan 31 18:15:41 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1812
1813         * configure: Regenerated to track ../common/aclocal.m4 changes.
1814
1815 Sat Jan 31 14:49:24 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1816
1817         * interp.c (sim_engine_run): Add `nr_cpus' argument.
1818
1819         * mips.igen (model): Map processor names onto BFD name.
1820
1821         * sim-main.h (CPU_CIA): Delete.
1822         (SET_CIA, GET_CIA): Define
1823
1824 Wed Jan 21 16:16:27 1998  Andrew Cagney  <cagney@b1.cygnus.com>
1825
1826         * sim-main.h (GPR_SET): Define, used by igen when zeroing a
1827         regiser.
1828
1829         * configure.in (default_endian): Configure a big-endian simulator
1830         by default.
1831         * configure: Re-generate.
1832
1833 Mon Jan 19 22:26:29 1998  Doug Evans  <devans@seba>
1834
1835         * configure: Regenerated to track ../common/aclocal.m4 changes.
1836
1837 Mon Jan  5 20:38:54 1998  Mark Alexander  <marka@cygnus.com>
1838
1839         * interp.c (sim_monitor): Handle Densan monitor outbyte
1840         and inbyte functions.
1841
1842 1997-12-29  Felix Lee  <flee@cygnus.com>
1843
1844         * interp.c (sim_engine_run): msvc cpp barfs on #if (a==b!=c).
1845
1846 Wed Dec 17 14:48:20 1997  Jeffrey A Law  (law@cygnus.com)
1847
1848         * Makefile.in (tmp-igen): Arrange for $zero to always be
1849         reset to zero after every instruction.
1850
1851 Mon Dec 15 23:17:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1852
1853         * configure: Regenerated to track ../common/aclocal.m4 changes.
1854         * config.in: Ditto.
1855
1856 Wed Dec 10 17:10:45 1997  Jeffrey A Law  (law@cygnus.com)
1857
1858         * mips.igen (MSUB): Fix to work like MADD.
1859         * gencode.c (MSUB): Similarly.
1860
1861 Thu Dec  4 09:21:05 1997  Doug Evans  <devans@canuck.cygnus.com>
1862
1863         * configure: Regenerated to track ../common/aclocal.m4 changes.
1864
1865 Wed Nov 26 11:00:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1866
1867         * mips.igen (LWC1): Correct assembler - lwc1 not swc1.
1868
1869 Sun Nov 23 01:45:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1870
1871         * sim-main.h (sim-fpu.h): Include.
1872
1873         * interp.c (convert, SquareRoot, Recip, Divide, Multiply, Sub,
1874         Add, Negate, AbsoluteValue, Equal, Less, Infinity, NaN): Rewrite
1875         using host independant sim_fpu module.
1876
1877 Thu Nov 20 19:56:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1878
1879         * interp.c (signal_exception): Report internal errors with SIGABRT
1880         not SIGQUIT.
1881
1882         * sim-main.h (C0_CONFIG): New register.
1883         (signal.h): No longer include.
1884
1885         * interp.c (decode_coproc): Allow access C0_CONFIG to register.
1886
1887 Tue Nov 18 15:33:48 1997  Doug Evans  <devans@canuck.cygnus.com>
1888
1889         * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS).
1890
1891 Fri Nov 14 11:56:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1892
1893         * mips.igen: Tag vr5000 instructions.
1894         (ANDI): Was missing mipsIV model, fix assembler syntax.
1895         (do_c_cond_fmt): New function.
1896         (C.cond.fmt): Handle mips I-III which do not support CC field
1897         separatly.
1898         (bc1): Handle mips IV which do not have a delaed FCC separatly.
1899         (SDR): Mask paddr when BigEndianMem, not the converse as specified
1900         in IV3.2 spec.
1901         (DMULT, DMULTU): Force use of hosts 64bit multiplication.  Handle
1902         vr5000 which saves LO in a GPR separatly.
1903
1904         * configure.in (enable-sim-igen): For vr5000, select vr5000
1905         specific instructions.
1906         * configure: Re-generate.
1907
1908 Wed Nov 12 14:42:52 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1909
1910         * Makefile.in (SIM_OBJS): Add sim-fpu module.
1911
1912         * interp.c (store_fpr), sim-main.h: Add separate fmt_uninterpreted_32 and
1913         fmt_uninterpreted_64 bit cases to switch.  Convert to
1914         fmt_formatted,
1915
1916         * sim-main.h (ENGINE_ISSUE_PREFIX_HOOK): Define,
1917
1918         * mips.igen (SWR): Mask paddr when BigEndianMem, not the converse
1919         as specified in IV3.2 spec.
1920         (MTC1, DMTC1): Call StoreFPR to store the GPR in the FPR.
1921
1922 Tue Nov 11 12:38:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1923
1924         * mips.igen: Delay slot branches add OFFSET to NIA not CIA.
1925         (MFC0, MTC0, SWC1, LWC1, SDC1, LDC1): Implement.
1926         (MTC1, MFC1, DMTC1, DMFC1, CFC1, CTC1): Implement separate non
1927         PENDING_FILL versions of instructions.  Simplify.
1928         (X): New function.
1929         (MULT, MULTU): Implement separate RD==0 and RD!=0 versions of
1930         instructions.
1931         (BEQZ, ..., SLT, SLTI, TLT, TLE, TLI, ...): Explicitly cast GPR to
1932         a signed value.
1933         (MTHI, MFHI): Disable code checking HI-LO.
1934
1935         * sim-main.h (dotrace,tracefh), interp.c: Make dotrace & tracefh
1936         global.
1937         (NULLIFY_NEXT_INSTRUCTION): Call dotrace.
1938
1939 Thu Nov  6 16:36:35 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1940
1941         * gencode.c (build_mips16_operands): Replace IPC with cia.
1942
1943         * interp.c (sim_monitor, signal_exception, cache_op, store_fpr,
1944         value_fpr, cop_ld, cop_lw, cop_sw, cop_sd, decode_coproc): Replace
1945         IPC to `cia'.
1946         (UndefinedResult): Replace function with macro/function
1947         combination.
1948         (sim_engine_run): Don't save PC in IPC.
1949
1950         * sim-main.h (IPC): Delete.
1951
1952
1953         * interp.c (signal_exception, store_word, load_word,
1954         address_translation, load_memory, store_memory, cache_op,
1955         prefetch, sync_operation, ifetch, value_fpr, store_fpr, convert,
1956         cop_lw, cop_ld, cop_sw, cop_sd, decode_coproc, sim_monitor): Add
1957         current instruction address - cia - argument.
1958         (sim_read, sim_write): Call address_translation directly.
1959         (sim_engine_run): Rename variable vaddr to cia.
1960         (signal_exception): Pass cia to sim_monitor
1961
1962         * sim-main.h (SignalException, LoadWord, StoreWord, CacheOp,
1963         Prefetch, SyncOperation, ValueFPR, StoreFPR, Convert, COP_LW,
1964         COP_LD, COP_SW, COP_SD, DecodeCoproc): Update.
1965
1966         * sim-main.h (SignalExceptionSimulatorFault): Delete definition.
1967         * interp.c (sim_open): Replace SignalExceptionSimulatorFault with
1968         SIM_ASSERT.
1969
1970         * interp.c (signal_exception): Pass restart address to
1971         sim_engine_restart.
1972
1973         * Makefile.in (semantics.o, engine.o, support.o, itable.o,
1974         idecode.o): Add dependency.
1975
1976         * sim-main.h (SIM_ENGINE_HALT_HOOK, SIM_ENGINE_RESUME_HOOK):
1977         Delete definitions
1978         (DELAY_SLOT): Update NIA not PC with branch address.
1979         (NULLIFY_NEXT_INSTRUCTION): Set NIA to instruction after next.
1980
1981         * mips.igen: Use CIA not PC in branch calculations.
1982         (illegal): Call SignalException.
1983         (BEQ, ADDIU): Fix assembler.
1984
1985 Wed Nov  5 12:19:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
1986
1987         * m16.igen (JALX): Was missing.
1988
1989         * configure.in (enable-sim-igen): New configuration option.
1990         * configure: Re-generate.
1991
1992         * sim-main.h (MAX_INSNS, INSN_NAME): Define.
1993
1994         * interp.c (load_memory, store_memory): Delete parameter RAW.
1995         (sim_read, sim_write): Use sim_core_{read,write}_buffer directly
1996         bypassing {load,store}_memory.
1997
1998         * sim-main.h (ByteSwapMem): Delete definition.
1999
2000         * Makefile.in (SIM_OBJS): Add sim-memopt module.
2001
2002         * interp.c (sim_do_command, sim_commands): Delete mips specific
2003         commands.  Handled by module sim-options.
2004
2005         * sim-main.h (SIM_HAVE_FLATMEM): Undefine, use sim-core.o module.
2006         (WITH_MODULO_MEMORY): Define.
2007
2008         * interp.c (sim_info): Delete code printing memory size.
2009
2010         * interp.c (mips_size): Nee sim_size, delete function.
2011         (power2): Delete.
2012         (monitor, monitor_base, monitor_size): Delete global variables.
2013         (sim_open, sim_close): Delete code creating monitor and other
2014         memory regions.  Use sim-memopts module, via sim_do_commandf, to
2015         manage memory regions.
2016         (load_memory, store_memory): Use sim-core for memory model.
2017
2018         * interp.c (address_translation): Delete all memory map code
2019         except line forcing 32 bit addresses.
2020
2021 Wed Nov  5 11:21:11 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2022
2023         * sim-main.h (WITH_TRACE): Delete definition.  Enables common
2024         trace options.
2025
2026         * interp.c (logfh, logfile): Delete globals.
2027         (sim_open, sim_close): Delete code opening & closing log file.
2028         (mips_option_handler): Delete -l and -n options.
2029         (OPTION mips_options): Ditto.
2030
2031         * interp.c (OPTION mips_options): Rename option trace to dinero.
2032         (mips_option_handler): Update.
2033
2034 Wed Nov  5 09:35:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2035
2036         * interp.c (fetch_str): New function.
2037         (sim_monitor): Rewrite using sim_read & sim_write.
2038         (sim_open): Check magic number.
2039         (sim_open): Write monitor vectors into memory using sim_write.
2040         (MONITOR_BASE, MONITOR_SIZE, MEM_SIZE): Define.
2041         (sim_read, sim_write): Simplify - transfer data one byte at a
2042         time.
2043         (load_memory, store_memory): Clarify meaning of parameter RAW.
2044
2045         * sim-main.h (isHOST): Defete definition.
2046         (isTARGET): Mark as depreciated.
2047         (address_translation): Delete parameter HOST.
2048
2049         * interp.c (address_translation): Delete parameter HOST.
2050
2051 Wed Oct 29 11:13:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2052
2053         * mips.igen:
2054
2055         * Makefile.in (IGEN_INCLUDE): Files included by mips.igen.
2056         (tmp-igen, tmp-m16): Depend on IGEN_INCLUDE.
2057
2058 Tue Oct 28 11:06:47 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2059
2060         * mips.igen: Add model filter field to records.
2061
2062 Mon Oct 27 17:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2063
2064         * Makefile.in (SIM_NO_CFLAGS): Define.  Define WITH_IGEN=0.
2065
2066         interp.c (sim_engine_run): Do not compile function sim_engine_run
2067         when WITH_IGEN == 1.
2068
2069         * configure.in (sim_igen_flags, sim_m16_flags): Set according to
2070         target architecture.
2071
2072         Makefile.in (tmp-igen, tmp-m16): Drop -F and -M options to
2073         igen. Replace with configuration variables sim_igen_flags /
2074         sim_m16_flags.
2075
2076         * m16.igen: New file.  Copy mips16 insns here.
2077         * mips.igen: From here.
2078
2079 Mon Oct 27 13:53:59 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2080
2081         * Makefile.in (SIM_NO_OBJ): Define, move SIM_M16_OBJ, SIM_IGEN_OBJ
2082         to top.
2083         (tmp-igen, tmp-m16): Pass -I srcdir to igen.
2084
2085 Sat Oct 25 16:51:40 1997  Gavin Koch  <gavin@cygnus.com>
2086
2087         * gencode.c (build_instruction): Follow sim_write's lead in using
2088         BigEndianMem instead of !ByteSwapMem.
2089
2090 Fri Oct 24 17:41:49 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2091
2092         * configure.in (sim_gen): Dependent on target, select type of
2093         generator.  Always select old style generator.
2094
2095         configure: Re-generate.
2096
2097         Makefile.in (tmp-igen, tmp-m16, clean-m16, clean-igen): New
2098         targets.
2099         (SIM_M16_CFLAGS, SIM_M16_ALL, SIM_M16_OBJ, BUILT_SRC_FROM_M16,
2100         SIM_IGEN_CFLAGS, SIM_IGEN_ALL, SIM_IGEN_OBJ, BUILT_SRC_FROM_IGEN,
2101         IGEN_TRACE, IGEN_INSN, IGEN_DC): Define
2102         (SIM_EXTRA_CFLAGS, SIM_EXTRA_ALL, SIM_OBJS): Add member
2103         SIM_@sim_gen@_*, set by autoconf.
2104
2105 Wed Oct 22 12:52:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2106
2107         * sim-main.h (NULLIFY_NEXT_INSTRUCTION, DELAY_SLOT): Define.
2108
2109         * interp.c (ColdReset): Remove #ifdef HASFPU, check
2110         CURRENT_FLOATING_POINT instead.
2111
2112         * interp.c (ifetch32): New function. Fetch 32 bit instruction.
2113         (address_translation): Raise exception InstructionFetch when
2114         translation fails and isINSTRUCTION.
2115
2116         * interp.c (sim_open, sim_write, sim_monitor, store_word,
2117         sim_engine_run): Change type of of vaddr and paddr to
2118         address_word.
2119         (address_translation, prefetch, load_memory, store_memory,
2120         cache_op): Change type of vAddr and pAddr to address_word.
2121
2122         * gencode.c (build_instruction): Change type of vaddr and paddr to
2123         address_word.
2124
2125 Mon Oct 20 15:29:04 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2126
2127         * sim-main.h (ALU64_END, ALU32_END): Use ALU*_OVERFLOW_RESULT
2128         macro to obtain result of ALU op.
2129
2130 Tue Oct 21 17:39:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2131
2132         * interp.c (sim_info): Call profile_print.
2133
2134 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2135
2136         * Makefile.in (SIM_OBJS): Add sim-profile.o module.
2137
2138         * sim-main.h (WITH_PROFILE): Do not define, defined in
2139         common/sim-config.h.  Use sim-profile module.
2140         (simPROFILE): Delete defintion.
2141
2142         * interp.c (PROFILE): Delete definition.
2143         (mips_option_handler): Delete 'p', 'y' and 'x' profile options.
2144         (sim_close): Delete code writing profile histogram.
2145         (mips_set_profile, mips_set_profile_size, writeout16, writeout32):
2146         Delete.
2147         (sim_engine_run): Delete code profiling the PC.
2148
2149 Mon Oct 20 13:31:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2150
2151         * sim-main.h (SIGNEXTEND): Force type of result to unsigned_word.
2152
2153         * interp.c (sim_monitor): Make register pointers of type
2154         unsigned_word*.
2155
2156         * sim-main.h: Make registers of type unsigned_word not
2157         signed_word.
2158
2159 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2160
2161         * interp.c (sync_operation): Rename from SyncOperation, make
2162         global, add SD argument.
2163         (prefetch): Rename from Prefetch, make global, add SD argument.
2164         (decode_coproc): Make global.
2165
2166         * sim-main.h (SyncOperation, DecodeCoproc, Pefetch): Define.
2167
2168         * gencode.c (build_instruction): Generate DecodeCoproc not
2169         decode_coproc calls.
2170
2171         * interp.c (SETFCC, GETFCC, PREVCOC1): Move to sim-main.h
2172         (SizeFGR): Move to sim-main.h
2173         (simHALTEX, simHALTIN, simTRACE, simPROFILE, simDELAYSLOT,
2174         simSIGINT, simJALDELAYSLOT): Move to sim-main.h
2175         (FP_FLAGS, FP_ENABLE, FP_CAUSE, IR, UF, OF, DZ, IO, UO): Move to
2176         sim-main.h.
2177         (FP_FS, FP_MASK_RM, FP_SH_RM, FP_RM_NEAREST, FP_RM_TOPINF,
2178         FP_RM_TOMINF, GETRM): Move to sim-main.h.
2179         (Uncached, CachedNoncoherent, CachedCoherent, Cached,
2180         isINSTRUCTION, ..., AccessLength_BYTE, ...): Move to sim-main.h.
2181         (UserMode, BigEndianMem, ByteSwapMem, ReverseEndian,
2182         BigEndianCPU, status_KSU_mask, ...). Moved to sim-main.h
2183
2184         * sim-main.h (ALU32_END, ALU64_END): Define. When overflow raise
2185         exception.
2186         (sim-alu.h): Include.
2187         (NULLIFY_NIA, NULL_CIA, CPU_CIA): Define.
2188         (sim_cia): Typedef to instruction_address.
2189
2190 Thu Oct 16 10:31:41 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2191
2192         * Makefile.in (interp.o): Rename generated file engine.c to
2193         oengine.c.
2194
2195         * interp.c: Update.
2196
2197 Thu Oct 16 10:31:40 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2198
2199         * gencode.c (build_instruction): Use FPR_STATE not fpr_state.
2200
2201 Thu Oct 16 10:31:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2202
2203         * gencode.c (build_instruction): For "FPSQRT", output correct
2204         number of arguments to Recip.
2205
2206 Tue Oct 14 17:38:18 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2207
2208         * Makefile.in (interp.o): Depends on sim-main.h
2209
2210         * interp.c (mips16_entry, ColdReset,dotrace): Add SD argument. Use GPR not registers.
2211
2212         * sim-main.h (sim_cpu): Add registers, register_widths, fpr_state,
2213         ipc, dspc, pending_*, hiaccess, loaccess, state, dsstate fields.
2214         (REGISTERS, REGISTER_WIDTHS, FPR_STATE, IPC, DSPC, PENDING_*,
2215         STATE, DSSTATE): Define
2216         (GPR, FGRIDX, ..): Define.
2217
2218         * interp.c (registers, register_widths, fpr_state, ipc, dspc,
2219         pending_*, hiaccess, loaccess, state, dsstate): Delete globals.
2220         (GPR, FGRIDX, ...): Delete macros.
2221
2222         * interp.c: Update names to match defines from sim-main.h
2223
2224 Tue Oct 14 15:11:45 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2225
2226         * interp.c (sim_monitor): Add SD argument.
2227         (sim_warning): Delete.  Replace calls with calls to
2228         sim_io_eprintf.
2229         (sim_error): Delete. Replace calls with sim_io_error.
2230         (open_trace, writeout32, writeout16, getnum): Add SD argument.
2231         (mips_set_profile): Rename from sim_set_profile. Add SD argument.
2232         (mips_set_profile_size): Rename from sim_set_profile_size. Add SD
2233         argument.
2234         (mips_size): Rename from sim_size. Add SD argument.
2235
2236         * interp.c (simulator): Delete global variable.
2237         (callback): Delete global variable.
2238         (mips_option_handler, sim_open, sim_write, sim_read,
2239         sim_store_register, sim_fetch_register, sim_info, sim_do_command,
2240         sim_size,sim_monitor): Use sim_io_* not callback->*.
2241         (sim_open): ZALLOC simulator struct.
2242         (PROFILE): Do not define.
2243
2244 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2245
2246         * interp.c (sim_open), support.h: Replace CHECKSIM macro found in
2247         support.h with corresponding code.
2248
2249         * sim-main.h (word64, uword64), support.h: Move definition to
2250         sim-main.h.
2251         (WORD64LO, WORD64HI, SET64LO, SET64HI, WORD64, UWORD64): Ditto.
2252
2253         * support.h: Delete
2254         * Makefile.in: Update dependencies
2255         * interp.c: Do not include.
2256
2257 Tue Oct 14 13:35:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2258
2259         * interp.c (address_translation, load_memory, store_memory,
2260         cache_op): Rename to from AddressTranslation et.al., make global,
2261         add SD argument
2262
2263         * sim-main.h (AddressTranslation, LoadMemory, StoreMemory,
2264         CacheOp): Define.
2265
2266         * interp.c (SignalException): Rename to signal_exception, make
2267         global.
2268
2269         * interp.c (Interrupt, ...): Move definitions to sim-main.h.
2270
2271         * sim-main.h (SignalException, SignalExceptionInterrupt,
2272         SignalExceptionInstructionFetch, SignalExceptionAddressStore,
2273         SignalExceptionAddressLoad, SignalExceptionSimulatorFault,
2274         SignalExceptionIntegerOverflow, SignalExceptionCoProcessorUnusable):
2275         Define.
2276
2277         * interp.c, support.h: Use.
2278
2279 Tue Oct 14 13:19:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2280
2281         * interp.c (ValueFPR, StoreFPR), sim-main.h: Make global, rename
2282         to value_fpr / store_fpr. Add SD argument.
2283         (NaN, Infinity, Less, Equal, AbsoluteValue, Negate, Add, Sub,
2284         Multiply, Divide, Recip, SquareRoot, Convert): Make global.
2285
2286         * sim-main.h (ValueFPR, StoreFPR): Define.
2287
2288 Tue Oct 14 13:06:55 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2289
2290         * interp.c (sim_engine_run): Check consistency between configure
2291         WITH_TARGET_WORD_BITSIZE and WITH_FLOATING_POINT and gensim GPRLEN
2292         and HASFPU.
2293
2294         * configure.in (mips_bitsize): Configure WITH_TARGET_WORD_BITSIZE.
2295         (mips_fpu): Configure WITH_FLOATING_POINT.
2296         (mips_endian): Configure WITH_TARGET_ENDIAN.
2297         * configure: Update.
2298
2299 Fri Oct  3 09:28:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2300
2301         * configure: Regenerated to track ../common/aclocal.m4 changes.
2302
2303 Mon Sep 29 14:45:00 1997  Bob Manson  <manson@charmed.cygnus.com>
2304
2305         * configure: Regenerated.
2306
2307 Fri Sep 26 12:48:18 1997  Mark Alexander  <marka@cygnus.com>
2308
2309         * interp.c: Allow Debug, DEPC, and EPC registers to be examined in GDB.
2310
2311 Thu Sep 25 11:15:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2312
2313         * gencode.c (print_igen_insn_models): Assume certain architectures
2314         include all mips* instructions.
2315         (print_igen_insn_format): Use data_size==-1 as marker for MIPS16
2316         instruction.
2317
2318         * Makefile.in (tmp.igen): Add target. Generate igen input from
2319         gencode file.
2320
2321         * gencode.c (FEATURE_IGEN): Define.
2322         (main): Add --igen option.  Generate output in igen format.
2323         (process_instructions): Format output according to igen option.
2324         (print_igen_insn_format): New function.
2325         (print_igen_insn_models): New function.
2326         (process_instructions): Only issue warnings and ignore
2327         instructions when no FEATURE_IGEN.
2328
2329 Wed Sep 24 17:38:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2330
2331         * interp.c (COP_SD, COP_LD): Add UNUSED to pacify GCC for some
2332         MIPS targets.
2333
2334 Tue Sep 23 11:04:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2335
2336         * configure: Regenerated to track ../common/aclocal.m4 changes.
2337
2338 Tue Sep 23 10:19:51 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2339
2340         * Makefile.in (SIM_ALIGNMENT, SIM_ENDIAN, SIM_HOSTENDIAN,
2341         SIM_RESERVED_BITS): Delete, moved to common.
2342         (SIM_EXTRA_CFLAGS): Update.
2343
2344 Mon Sep 22 11:46:20 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2345
2346         * configure.in: Configure non-strict memory alignment.
2347         * configure: Regenerated to track ../common/aclocal.m4 changes.
2348
2349 Fri Sep 19 17:45:25 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2350
2351         * configure: Regenerated to track ../common/aclocal.m4 changes.
2352
2353 Sat Sep 20 14:07:28 1997  Gavin Koch  <gavin@cygnus.com>
2354
2355         * gencode.c (SDBBP,DERET): Added (3900) insns.
2356         (RFE): Turn on for 3900.
2357         * interp.c (DebugBreakPoint,DEPC,Debug,Debug_*): Added.
2358         (dsstate): Made global.
2359         (SUBTARGET_R3900): Added.
2360         (CANCELDELAYSLOT): New.
2361         (SignalException): Ignore SystemCall rather than ignore and
2362         terminate.  Add DebugBreakPoint handling.
2363         (decode_coproc): New insns RFE, DERET; and new registers Debug
2364         and DEPC protected by SUBTARGET_R3900.
2365         (sim_engine_run): Use CANCELDELAYSLOT rather than clearing
2366         bits explicitly.
2367         * Makefile.in,configure.in: Add mips subtarget option.
2368         * configure: Update.
2369
2370 Fri Sep 19 09:33:27 1997  Gavin Koch  <gavin@cygnus.com>
2371
2372         * gencode.c: Add r3900 (tx39).
2373
2374
2375 Tue Sep 16 15:52:04 1997  Gavin Koch  <gavin@cygnus.com>
2376
2377         * gencode.c (build_instruction): Don't need to subtract 4 for
2378         JALR, just 2.
2379
2380 Tue Sep 16 11:32:28 1997  Gavin Koch  <gavin@cygnus.com>
2381
2382         * interp.c: Correct some HASFPU problems.
2383
2384 Mon Sep 15 17:36:15 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2385
2386         * configure: Regenerated to track ../common/aclocal.m4 changes.
2387
2388 Fri Sep 12 12:01:39 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2389
2390         * interp.c (mips_options): Fix samples option short form, should
2391         be `x'.
2392
2393 Thu Sep 11 09:35:29 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2394
2395         * interp.c (sim_info): Enable info code.  Was just returning.
2396
2397 Tue Sep  9 17:30:57 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2398
2399         * interp.c (decode_coproc): Clarify warning about unsuported MTC0,
2400         MFC0.
2401
2402 Tue Sep  9 16:28:28 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2403
2404         * gencode.c (build_instruction): Use SIGNED64 for 64 bit
2405         constants.
2406         (build_instruction): Ditto for LL.
2407
2408 Thu Sep  4 17:21:23 1997  Doug Evans  <dje@seba>
2409
2410         * configure: Regenerated to track ../common/aclocal.m4 changes.
2411
2412 Wed Aug 27 18:13:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2413
2414         * configure: Regenerated to track ../common/aclocal.m4 changes.
2415         * config.in: Ditto.
2416
2417 Wed Aug 27 14:12:27 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2418
2419         * interp.c (sim_open): Add call to sim_analyze_program, update
2420         call to sim_config.
2421
2422 Tue Aug 26 10:40:07 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2423
2424         * interp.c (sim_kill): Delete.
2425         (sim_create_inferior): Add ABFD argument. Set PC from same.
2426         (sim_load): Move code initializing trap handlers from here.
2427         (sim_open): To here.
2428         (sim_load): Delete, use sim-hload.c.
2429
2430         * Makefile.in (SIM_OBJS): Add sim-hload.o module.
2431
2432 Mon Aug 25 17:50:22 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2433
2434         * configure: Regenerated to track ../common/aclocal.m4 changes.
2435         * config.in: Ditto.
2436
2437 Mon Aug 25 15:59:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2438
2439         * interp.c (sim_open): Add ABFD argument.
2440         (sim_load): Move call to sim_config from here.
2441         (sim_open): To here.  Check return status.
2442
2443 Fri Jul 25 15:00:45 1997  Gavin Koch  <gavin@cygnus.com>
2444
2445         * gencode.c (build_instruction): Two arg MADD should
2446         not assign result to $0.
2447
2448 Thu Jun 26 12:13:17 1997  Angela Marie Thomas (angela@cygnus.com)
2449
2450         * sim/mips/configure: Change default_sim_endian to 0 (bi-endian)
2451         * sim/mips/configure.in: Regenerate.
2452
2453 Wed Jul  9 10:29:21 1997  Andrew Cagney  <cagney@critters.cygnus.com>
2454
2455         * interp.c (SUB_REG_UW, SUB_REG_SW, SUB_REG_*): Use more explicit
2456         signed8, unsigned8 et.al. types.
2457
2458         * interp.c (SUB_REG_FETCH): Handle both little and big endian
2459         hosts when selecting subreg.
2460
2461 Wed Jul  2 11:54:10 1997  Jeffrey A Law  (law@cygnus.com)
2462
2463         * interp.c (sim_engine_run): Reset the ZERO register to zero
2464         regardless of FEATURE_WARN_ZERO.
2465         * gencode.c (FEATURE_WARNINGS): Remove FEATURE_WARN_ZERO.
2466
2467 Wed Jun  4 10:43:14 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2468
2469         * interp.c (decode_coproc): Implement MTC0 N, CAUSE.
2470         (SignalException): For BreakPoints ignore any mode bits and just
2471         save the PC.
2472         (SignalException): Always set the CAUSE register.
2473
2474 Tue Jun  3 05:00:33 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2475
2476         * interp.c (SignalException): Clear the simDELAYSLOT flag when an
2477         exception has been taken.
2478
2479         * interp.c: Implement the ERET and mt/f sr instructions.
2480
2481 Sat May 31 00:44:16 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2482
2483         * interp.c (SignalException): Don't bother restarting an
2484         interrupt.
2485
2486 Fri May 30 23:41:48 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2487
2488         * interp.c (SignalException): Really take an interrupt.
2489         (interrupt_event): Only deliver interrupts when enabled.
2490
2491 Tue May 27 20:08:06 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2492
2493         * interp.c (sim_info): Only print info when verbose.
2494         (sim_info) Use sim_io_printf for output.
2495
2496 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2497
2498         * interp.c (CoProcPresent): Add UNUSED attribute - not used by all
2499         mips architectures.
2500
2501 Tue May 27 14:22:23 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2502
2503         * interp.c (sim_do_command): Check for common commands if a
2504         simulator specific command fails.
2505
2506 Thu May 22 09:32:03 1997  Gavin Koch  <gavin@cygnus.com>
2507
2508         * interp.c (sim_engine_run): ifdef out uses of simSTOP, simSTEP
2509         and simBE when DEBUG is defined.
2510
2511 Wed May 21 09:08:10 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2512
2513         * interp.c (interrupt_event): New function.  Pass exception event
2514         onto exception handler.
2515
2516         * configure.in: Check for stdlib.h.
2517         * configure: Regenerate.
2518
2519         * gencode.c (build_instruction): Add UNUSED attribute to tempS
2520         variable declaration.
2521         (build_instruction): Initialize memval1.
2522         (build_instruction): Add UNUSED attribute to byte, bigend,
2523         reverse.
2524         (build_operands): Ditto.
2525
2526         * interp.c: Fix GCC warnings.
2527         (sim_get_quit_code): Delete.
2528
2529         * configure.in: Add INLINE, ENDIAN, HOSTENDIAN and WARNINGS.
2530         * Makefile.in: Ditto.
2531         * configure: Re-generate.
2532
2533         * Makefile.in (SIM_OBJS): Add sim-watch.o module.
2534
2535 Tue May 20 15:08:56 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2536
2537         * interp.c (mips_option_handler): New function parse argumes using
2538         sim-options.
2539         (myname): Replace with STATE_MY_NAME.
2540         (sim_open): Delete check for host endianness - performed by
2541         sim_config.
2542         (simHOSTBE, simBE): Delete, replaced by sim-endian flags.
2543         (sim_open): Move much of the initialization from here.
2544         (sim_load): To here.  After the image has been loaded and
2545         endianness set.
2546         (sim_open): Move ColdReset from here.
2547         (sim_create_inferior): To here.
2548         (sim_open): Make FP check less dependant on host endianness.
2549
2550         * Makefile.in (SIM_RUN_OBJS): Set to nrun.o - use new version or
2551         run.
2552         * interp.c (sim_set_callbacks): Delete.
2553
2554         * interp.c (membank, membank_base, membank_size): Replace with
2555         STATE_MEMORY, STATE_MEM_SIZE, STATE_MEM_BASE.
2556         (sim_open): Remove call to callback->init. gdb/run do this.
2557
2558         * interp.c: Update
2559
2560         * sim-main.h (SIM_HAVE_FLATMEM): Define.
2561
2562         * interp.c (big_endian_p): Delete, replaced by
2563         current_target_byte_order.
2564
2565 Tue May 20 13:55:00 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2566
2567         * interp.c (host_read_long, host_read_word, host_swap_word,
2568         host_swap_long): Delete. Using common sim-endian.
2569         (sim_fetch_register, sim_store_register): Use H2T.
2570         (pipeline_ticks): Delete.  Handled by sim-events.
2571         (sim_info): Update.
2572         (sim_engine_run): Update.
2573
2574 Tue May 20 13:42:03 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2575
2576         * interp.c (sim_stop_reason): Move code determining simEXCEPTION
2577         reason from here.
2578         (SignalException): To here. Signal using sim_engine_halt.
2579         (sim_stop_reason): Delete, moved to common.
2580
2581 Tue May 20 10:19:48 1997  Andrew Cagney  <cagney@b2.cygnus.com>
2582
2583         * interp.c (sim_open): Add callback argument.
2584         (sim_set_callbacks): Delete SIM_DESC argument.
2585         (sim_size): Ditto.
2586
2587 Mon May 19 18:20:38 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2588
2589         * Makefile.in (SIM_OBJS): Add common modules.
2590
2591         * interp.c (sim_set_callbacks): Also set SD callback.
2592         (set_endianness, xfer_*, swap_*): Delete.
2593         (host_read_word, host_read_long, host_swap_word, host_swap_long):
2594         Change to functions using sim-endian macros.
2595         (control_c, sim_stop): Delete, use common version.
2596         (simulate): Convert into.
2597         (sim_engine_run): This function.
2598         (sim_resume): Delete.
2599
2600         * interp.c (simulation): New variable - the simulator object.
2601         (sim_kind): Delete global - merged into simulation.
2602         (sim_load): Cleanup.  Move PC assignment from here.
2603         (sim_create_inferior): To here.
2604
2605         * sim-main.h: New file.
2606         * interp.c (sim-main.h): Include.
2607
2608 Thu Apr 24 00:39:51 1997  Doug Evans  <dje@canuck.cygnus.com>
2609
2610         * configure: Regenerated to track ../common/aclocal.m4 changes.
2611
2612 Wed Apr 23 17:32:19 1997  Doug Evans  <dje@canuck.cygnus.com>
2613
2614         * tconfig.in (SIM_HAVE_BIENDIAN): Define.
2615
2616 Mon Apr 21 17:16:13 1997  Gavin Koch  <gavin@cygnus.com>
2617
2618         * gencode.c (build_instruction): DIV instructions: check
2619         for division by zero and integer overflow before using
2620         host's division operation.
2621
2622 Thu Apr 17 03:18:14 1997  Doug Evans  <dje@canuck.cygnus.com>
2623
2624         * Makefile.in (SIM_OBJS): Add sim-load.o.
2625         * interp.c: #include bfd.h.
2626         (target_byte_order): Delete.
2627         (sim_kind, myname, big_endian_p): New static locals.
2628         (sim_open): Set sim_kind, myname.  Move call to set_endianness to
2629         after argument parsing.  Recognize -E arg, set endianness accordingly.
2630         (sim_load): Return SIM_RC.  New arg abfd.  Call sim_load_file to
2631         load file into simulator.  Set PC from bfd.
2632         (sim_create_inferior): Return SIM_RC.  Delete arg start_address.
2633         (set_endianness): Use big_endian_p instead of target_byte_order.
2634
2635 Wed Apr 16 17:55:37 1997  Andrew Cagney  <cagney@b1.cygnus.com>
2636
2637         * interp.c (sim_size): Delete prototype - conflicts with
2638         definition in remote-sim.h.  Correct definition.
2639
2640 Mon Apr  7 15:45:02 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2641
2642         * configure: Regenerated to track ../common/aclocal.m4 changes.
2643         * config.in: Ditto.
2644
2645 Wed Apr  2 15:06:28 1997  Doug Evans  <dje@canuck.cygnus.com>
2646
2647         * interp.c (sim_open): New arg `kind'.
2648
2649         * configure: Regenerated to track ../common/aclocal.m4 changes.
2650
2651 Wed Apr  2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com>
2652
2653         * configure: Regenerated to track ../common/aclocal.m4 changes.
2654
2655 Tue Mar 25 11:38:22 1997  Doug Evans  <dje@canuck.cygnus.com>
2656
2657         * interp.c (sim_open): Set optind to 0 before calling getopt.
2658
2659 Wed Mar 19 01:14:00 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2660
2661         * configure: Regenerated to track ../common/aclocal.m4 changes.
2662
2663 Mon Mar 17 10:52:59 1997  Gavin Koch  <gavin@cetus.cygnus.com>
2664
2665         * interp.c : Replace uses of pr_addr with pr_uword64
2666         where the bit length is always 64 independent of SIM_ADDR.
2667         (pr_uword64) : added.
2668
2669 Mon Mar 17 15:10:07 1997  Andrew Cagney  <cagney@kremvax.cygnus.com>
2670
2671         * configure: Re-generate.
2672
2673 Fri Mar 14 10:34:11 1997  Michael Meissner  <meissner@cygnus.com>
2674
2675         * configure: Regenerate to track ../common/aclocal.m4 changes.
2676
2677 Thu Mar 13 12:51:36 1997  Doug Evans  <dje@canuck.cygnus.com>
2678
2679         * interp.c (sim_open): New SIM_DESC result.  Argument is now
2680         in argv form.
2681         (other sim_*): New SIM_DESC argument.
2682
2683 Mon Feb 24 22:47:14 1997  Dawn Perchik  <dawn@cygnus.com>
2684
2685         * interp.c: Fix printing of addresses for non-64-bit targets.
2686         (pr_addr): Add function to print address based on size.
2687
2688 Wed Feb 19 14:42:09 1997  Mark Alexander  <marka@cygnus.com>
2689
2690         * interp.c (simopen): Add support for LSI MiniRISC PMON vectors.
2691
2692 Thu Feb 13 14:08:30 1997  Ian Lance Taylor  <ian@cygnus.com>
2693
2694         * gencode.c (build_mips16_operands): Correct computation of base
2695         address for extended PC relative instruction.
2696
2697 Thu Feb  6 17:16:15 1997  Ian Lance Taylor  <ian@cygnus.com>
2698
2699         * interp.c (mips16_entry): Add support for floating point cases.
2700         (SignalException): Pass floating point cases to mips16_entry.
2701         (ValueFPR): Don't restrict fmt_single and fmt_word to even
2702         registers.
2703         (StoreFPR): Likewise.  Also, don't clobber fpr + 1 for fmt_single
2704         or fmt_word.
2705         (COP_LW): Pass fmt_word rather than fmt_uninterpreted to StoreFPR,
2706         and then set the state to fmt_uninterpreted.
2707         (COP_SW): Temporarily set the state to fmt_word while calling
2708         ValueFPR.
2709
2710 Tue Feb  4 16:48:25 1997  Ian Lance Taylor  <ian@cygnus.com>
2711
2712         * gencode.c (build_instruction): The high order may be set in the
2713         comparison flags at any ISA level, not just ISA 4.
2714
2715 Tue Feb  4 13:33:30 1997  Doug Evans  <dje@canuck.cygnus.com>
2716
2717         * Makefile.in (@COMMON_MAKEFILE_FRAG): Use
2718         COMMON_{PRE,POST}_CONFIG_FRAG instead.
2719         * configure.in: sinclude ../common/aclocal.m4.
2720         * configure: Regenerated.
2721
2722 Fri Jan 31 11:11:45 1997  Ian Lance Taylor  <ian@cygnus.com>
2723
2724         * configure: Rebuild after change to aclocal.m4.
2725
2726 Thu Jan 23 11:46:23 1997  Stu Grossman  (grossman@critters.cygnus.com)
2727
2728         * configure configure.in Makefile.in:  Update to new configure
2729         scheme which is more compatible with WinGDB builds.
2730         * configure.in:  Improve comment on how to run autoconf.
2731         * configure:  Re-run autoconf to get new ../common/aclocal.m4.
2732         * Makefile.in:  Use autoconf substitution to install common
2733         makefile fragment.
2734
2735 Wed Jan  8 12:39:03 1997  Jim Wilson  <wilson@cygnus.com>
2736
2737         * gencode.c (build_instruction): Use BigEndianCPU instead of
2738         ByteSwapMem.
2739
2740 Thu Jan 02 22:23:04 1997  Mark Alexander  <marka@cygnus.com>
2741
2742         * interp.c (sim_monitor): Make output to stdout visible in
2743         wingdb's I/O log window.
2744
2745 Tue Dec 31 07:04:00 1996  Mark Alexander  <marka@cygnus.com>
2746
2747         * support.h: Undo previous change to SIGTRAP
2748         and SIGQUIT values.
2749
2750 Mon Dec 30 17:36:06 1996  Ian Lance Taylor  <ian@cygnus.com>
2751
2752         * interp.c (store_word, load_word): New static functions.
2753         (mips16_entry): New static function.
2754         (SignalException): Look for mips16 entry and exit instructions.
2755         (simulate): Use the correct index when setting fpr_state after
2756         doing a pending move.
2757
2758 Sun Dec 29 09:37:18 1996  Mark Alexander  <marka@cygnus.com>
2759
2760         * interp.c: Fix byte-swapping code throughout to work on
2761         both little- and big-endian hosts.
2762
2763 Sun Dec 29 09:18:32 1996  Mark Alexander  <marka@cygnus.com>
2764
2765         * support.h: Make definitions of SIGTRAP and SIGQUIT consistent
2766         with gdb/config/i386/xm-windows.h.
2767
2768 Fri Dec 27 22:48:51 1996  Mark Alexander  <marka@cygnus.com>
2769
2770         * gencode.c (build_instruction): Work around MSVC++ code gen bug
2771         that messes up arithmetic shifts.
2772
2773 Fri Dec 20 11:04:05 1996  Stu Grossman  (grossman@critters.cygnus.com)
2774
2775         * support.h:  Use _WIN32 instead of __WIN32__.  Also add defs for
2776         SIGTRAP and SIGQUIT for _WIN32.
2777
2778 Thu Dec 19 14:07:27 1996  Ian Lance Taylor  <ian@cygnus.com>
2779
2780         * gencode.c (build_instruction) [MUL]: Cast operands to word64, to
2781         force a 64 bit multiplication.
2782         (build_instruction) [OR]: In mips16 mode, don't do anything if the
2783         destination register is 0, since that is the default mips16 nop
2784         instruction.
2785
2786 Mon Dec 16 14:59:38 1996  Ian Lance Taylor  <ian@cygnus.com>
2787
2788         * gencode.c (MIPS16_DECODE): SWRASP is I8, not RI.
2789         (build_endian_shift): Don't check proc64.
2790         (build_instruction): Always set memval to uword64.  Cast op2 to
2791         uword64 when shifting it left in memory instructions.  Always use
2792         the same code for stores--don't special case proc64.
2793
2794         * gencode.c (build_mips16_operands): Fix base PC value for PC
2795         relative operands.
2796         (build_instruction): Call JALDELAYSLOT rather than DELAYSLOT for a
2797         jal instruction.
2798         * interp.c (simJALDELAYSLOT): Define.
2799         (JALDELAYSLOT): Define.
2800         (INDELAYSLOT, INJALDELAYSLOT): Define.
2801         (simulate): Clear simJALDELAYSLOT when simDELAYSLOT is cleared.
2802
2803 Tue Dec 24 22:11:20 1996  Angela Marie Thomas (angela@cygnus.com)
2804
2805         * interp.c (sim_open): add flush_cache as a PMON routine
2806         (sim_monitor): handle flush_cache by ignoring it
2807
2808 Wed Dec 11 13:53:51 1996  Jim Wilson  <wilson@cygnus.com>
2809
2810         * gencode.c (build_instruction): Use !ByteSwapMem instead of
2811         BigEndianMem.
2812         * interp.c (CONFIG, config_EP_{mask,shift,D,DxxDxx, config_BE): Delete.
2813         (BigEndianMem): Rename to ByteSwapMem and change sense.
2814         (BigEndianCPU, sim_write, LoadMemory, StoreMemory): Change
2815         BigEndianMem references to !ByteSwapMem.
2816         (set_endianness): New function, with prototype.
2817         (sim_open): Call set_endianness.
2818         (sim_info): Use simBE instead of BigEndianMem.
2819         (xfer_direct_word, xfer_direct_long, swap_direct_word,
2820         swap_direct_long, xfer_big_word, xfer_big_long, xfer_little_word,
2821         xfer_little_long, swap_word, swap_long): Delete unnecessary MSC_VER
2822         ifdefs, keeping the prototype declaration.
2823         (swap_word): Rewrite correctly.
2824         (ColdReset): Delete references to CONFIG.  Delete endianness related
2825         code; moved to set_endianness.
2826
2827 Tue Dec 10 11:32:04 1996  Jim Wilson  <wilson@cygnus.com>
2828
2829         * gencode.c (build_instruction, case JUMP): Truncate PC to 32 bits.
2830         * interp.c (CHECKHILO): Define away.
2831         (simSIGINT): New macro.
2832         (membank_size): Increase from 1MB to 2MB.
2833         (control_c): New function.
2834         (sim_resume): Rename parameter signal to signal_number.  Add local
2835         variable prev.  Call signal before and after simulate.
2836         (sim_stop_reason): Add simSIGINT support.
2837         (sim_warning, sim_error, dotrace, SignalException): Define as stdarg
2838         functions always.
2839         (sim_warning): Delete call to SignalException.  Do call printf_filtered
2840         if logfh is NULL.
2841         (AddressTranslation): Add #ifdef DEBUG around debugging message and
2842         a call to sim_warning.
2843
2844 Wed Nov 27 11:53:50 1996  Ian Lance Taylor  <ian@cygnus.com>
2845
2846         * gencode.c (process_instructions): If ! proc64, skip DOUBLEWORD
2847         16 bit instructions.
2848
2849 Tue Nov 26 11:53:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2850
2851         Add support for mips16 (16 bit MIPS implementation):
2852         * gencode.c (inst_type): Add mips16 instruction encoding types.
2853         (GETDATASIZEINSN): Define.
2854         (MIPS_DECODE): Add REG flag to dsllv, dsrav, and dsrlv.  Add
2855         jalx.  Add LEFT flag to mfhi and mflo.  Add RIGHT flag to mthi and
2856         mtlo.
2857         (MIPS16_DECODE): New table, for mips16 instructions.
2858         (bitmap_val): New static function.
2859         (struct mips16_op): Define.
2860         (mips16_op_table): New table, for mips16 operands.
2861         (build_mips16_operands): New static function.
2862         (process_instructions): If PC is odd, decode a mips16
2863         instruction.  Break out instruction handling into new
2864         build_instruction function.
2865         (build_instruction): New static function, broken out of
2866         process_instructions.  Check modifiers rather than flags for SHIFT
2867         bit count and m[ft]{hi,lo} direction.
2868         (usage): Pass program name to fprintf.
2869         (main): Remove unused variable this_option_optind.  Change
2870         ``*loptarg++'' to ``loptarg++''.
2871         (my_strtoul): Parenthesize && within ||.
2872         * interp.c (LoadMemory): Accept a halfword pAddr if vAddr is odd.
2873         (simulate): If PC is odd, fetch a 16 bit instruction, and
2874         increment PC by 2 rather than 4.
2875         * configure.in: Add case for mips16*-*-*.
2876         * configure: Rebuild.
2877
2878 Fri Nov 22 08:49:36 1996  Mark Alexander  <marka@cygnus.com>
2879
2880         * interp.c: Allow -t to enable tracing in standalone simulator.
2881         Fix garbage output in trace file and error messages.
2882
2883 Wed Nov 20 01:54:37 1996  Doug Evans  <dje@canuck.cygnus.com>
2884
2885         * Makefile.in: Delete stuff moved to ../common/Make-common.in.
2886         (SIM_{OBJS,EXTRA_CFLAGS,EXTRA_CLEAN}): Define.
2887         * configure.in: Simplify using macros in ../common/aclocal.m4.
2888         * configure: Regenerated.
2889         * tconfig.in: New file.
2890
2891 Tue Nov 12 13:34:00 1996  Dawn Perchik  <dawn@cygnus.com>
2892
2893         * interp.c: Fix bugs in 64-bit port.
2894         Use ansi function declarations for msvc compiler.
2895         Initialize and test file pointer in trace code.
2896         Prevent duplicate definition of LAST_EMED_REGNUM.
2897
2898 Tue Oct 15 11:07:06 1996  Mark Alexander  <marka@cygnus.com>
2899
2900         * interp.c (xfer_big_long): Prevent unwanted sign extension.
2901
2902 Thu Sep 26 17:35:00 1996  James G. Smith  <jsmith@cygnus.co.uk>
2903
2904         * interp.c (SignalException): Check for explicit terminating
2905         breakpoint value.
2906         * gencode.c: Pass instruction value through SignalException()
2907         calls for Trap, Breakpoint and Syscall.
2908
2909 Thu Sep 26 11:35:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
2910
2911         * interp.c (SquareRoot): Add HAVE_SQRT check to ensure sqrt() is
2912         only used on those hosts that provide it.
2913         * configure.in: Add sqrt() to list of functions to be checked for.
2914         * config.in: Re-generated.
2915         * configure: Re-generated.
2916
2917 Fri Sep 20 15:47:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2918
2919         * gencode.c (process_instructions): Call build_endian_shift when
2920         expanding STORE RIGHT, to fix swr.
2921         * support.h (SIGNEXTEND): If the sign bit is not set, explicitly
2922         clear the high bits.
2923         * interp.c (Convert): Fix fmt_single to fmt_long to not truncate.
2924         Fix float to int conversions to produce signed values.
2925
2926 Thu Sep 19 15:34:17 1996  Ian Lance Taylor  <ian@cygnus.com>
2927
2928         * gencode.c (MIPS_DECODE): Set UNSIGNED for multu instruction.
2929         (process_instructions): Correct handling of nor instruction.
2930         Correct shift count for 32 bit shift instructions. Correct sign
2931         extension for arithmetic shifts to not shift the number of bits in
2932         the type.  Fix 64 bit multiply high word calculation.  Fix 32 bit
2933         unsigned multiply.  Fix ldxc1 and friends to use coprocessor 1.
2934         Fix madd.
2935         * interp.c (CHECKHILO): Don't set HIACCESS, LOACCESS, or HLPC.
2936         It's OK to have a mult follow a mult.  What's not OK is to have a
2937         mult follow an mfhi.
2938         (Convert): Comment out incorrect rounding code.
2939
2940 Mon Sep 16 11:38:16 1996  James G. Smith  <jsmith@cygnus.co.uk>
2941
2942         * interp.c (sim_monitor): Improved monitor printf
2943         simulation. Tidied up simulator warnings, and added "--log" option
2944         for directing warning message output.
2945         * gencode.c: Use sim_warning() rather than WARNING macro.
2946
2947 Thu Aug 22 15:03:12 1996  Ian Lance Taylor  <ian@cygnus.com>
2948
2949         * Makefile.in (gencode): Depend upon gencode.o, getopt.o, and
2950         getopt1.o, rather than on gencode.c.  Link objects together.
2951         Don't link against -liberty.
2952         (gencode.o, getopt.o, getopt1.o): New targets.
2953         * gencode.c: Include <ctype.h> and "ansidecl.h".
2954         (AND): Undefine after including "ansidecl.h".
2955         (ULONG_MAX): Define if not defined.
2956         (OP_*): Don't define macros; now defined in opcode/mips.h.
2957         (main): Call my_strtoul rather than strtoul.
2958         (my_strtoul): New static function.
2959
2960 Wed Jul 17 18:12:38 1996  Stu Grossman  (grossman@critters.cygnus.com)
2961
2962         * gencode.c (process_instructions):  Generate word64 and uword64
2963         instead of `long long' and `unsigned long long' data types.
2964         * interp.c:  #include sysdep.h to get signals, and define default
2965         for SIGBUS.
2966         * (Convert):  Work around for Visual-C++ compiler bug with type
2967         conversion.
2968         * support.h:  Make things compile under Visual-C++ by using
2969         __int64 instead of `long long'.  Change many refs to long long
2970         into word64/uword64 typedefs.
2971
2972 Wed Jun 26 12:24:55 1996  Jason Molenda  (crash@godzilla.cygnus.co.jp)
2973
2974         * Makefile.in (bindir, libdir, datadir, mandir, infodir, includedir,
2975         INSTALL_PROGRAM, INSTALL_DATA): Use autoconf-set values.
2976         (docdir): Removed.
2977         * configure.in (AC_PREREQ): autoconf 2.5 or higher.
2978         (AC_PROG_INSTALL): Added.
2979         (AC_PROG_CC): Moved to before configure.host call.
2980         * configure: Rebuilt.
2981
2982 Wed Jun  5 08:28:13 1996  James G. Smith  <jsmith@cygnus.co.uk>
2983
2984         * configure.in: Define @SIMCONF@ depending on mips target.
2985         * configure: Rebuild.
2986         * Makefile.in (run): Add @SIMCONF@ to control simulator
2987         construction.
2988         * gencode.c: Change LOADDRMASK to 64bit memory model only.
2989         * interp.c: Remove some debugging, provide more detailed error
2990         messages, update memory accesses to use LOADDRMASK.
2991
2992 Mon Jun  3 11:55:03 1996  Ian Lance Taylor  <ian@cygnus.com>
2993
2994         * configure.in: Add calls to AC_CONFIG_HEADER, AC_CHECK_HEADERS,
2995         AC_CHECK_LIB, and AC_CHECK_FUNCS.  Change AC_OUTPUT to set
2996         stamp-h.
2997         * configure: Rebuild.
2998         * config.in: New file, generated by autoheader.
2999         * interp.c: Include "config.h".  Include <stdlib.h>, <string.h>,
3000         and <strings.h> if they exist.  Replace #ifdef sun with #ifdef
3001         HAVE_ANINT and HAVE_AINT, as appropriate.
3002         * Makefile.in (run): Use @LIBS@ rather than -lm.
3003         (interp.o): Depend upon config.h.
3004         (Makefile): Just rebuild Makefile.
3005         (clean): Remove stamp-h.
3006         (mostlyclean): Make the same as clean, not as distclean.
3007         (config.h, stamp-h): New targets.
3008
3009 Fri May 10 00:41:17 1996  James G. Smith  <jsmith@cygnus.co.uk>
3010
3011         * interp.c (ColdReset): Fix boolean test. Make all simulator
3012         globals static.
3013
3014 Wed May  8 15:12:58 1996  James G. Smith  <jsmith@cygnus.co.uk>
3015
3016         * interp.c (xfer_direct_word, xfer_direct_long,
3017         swap_direct_word, swap_direct_long, xfer_big_word,
3018         xfer_big_long, xfer_little_word, xfer_little_long,
3019         swap_word,swap_long): Added.
3020         * interp.c (ColdReset): Provide function indirection to
3021         host<->simulated_target transfer routines.
3022         * interp.c (sim_store_register, sim_fetch_register): Updated to
3023         make use of indirected transfer routines.
3024
3025 Fri Apr 19 15:48:24 1996  James G. Smith  <jsmith@cygnus.co.uk>
3026
3027         * gencode.c (process_instructions): Ensure FP ABS instruction
3028         recognised.
3029         * interp.c (AbsoluteValue): Add routine. Also provide simple PMON
3030         system call support.
3031
3032 Wed Apr 10 09:51:38 1996  James G. Smith  <jsmith@cygnus.co.uk>
3033
3034         * interp.c (sim_do_command): Complain if callback structure not
3035         initialised.
3036
3037 Thu Mar 28 13:50:51 1996  James G. Smith  <jsmith@cygnus.co.uk>
3038
3039         * interp.c (Convert): Provide round-to-nearest and round-to-zero
3040         support for Sun hosts.
3041         * Makefile.in (gencode): Ensure the host compiler and libraries
3042         used for cross-hosted build.
3043
3044 Wed Mar 27 14:42:12 1996  James G. Smith  <jsmith@cygnus.co.uk>
3045
3046         * interp.c, gencode.c: Some more (TODO) tidying.
3047
3048 Thu Mar  7 11:19:33 1996  James G. Smith  <jsmith@cygnus.co.uk>
3049
3050         * gencode.c, interp.c: Replaced explicit long long references with
3051         WORD64HI, WORD64LO, SET64HI and SET64LO macro calls.
3052         * support.h (SET64LO, SET64HI): Macros added.
3053
3054 Wed Feb 21 12:16:21 1996  Ian Lance Taylor  <ian@cygnus.com>
3055
3056         * configure: Regenerate with autoconf 2.7.
3057
3058 Tue Jan 30 08:48:18 1996  Fred Fish  <fnf@cygnus.com>
3059
3060         * interp.c (LoadMemory): Enclose text following #endif in /* */.
3061         * support.h: Remove superfluous "1" from #if.
3062         * support.h (CHECKSIM): Remove stray 'a' at end of line.
3063
3064 Mon Dec  4 11:44:40 1995  Jamie Smith  <jsmith@cygnus.com>
3065
3066         * interp.c (StoreFPR): Control UndefinedResult() call on
3067         WARN_RESULT manifest.
3068
3069 Fri Dec  1 16:37:19 1995  James G. Smith  <jsmith@cygnus.co.uk>
3070
3071         * gencode.c: Tidied instruction decoding, and added FP instruction
3072         support.
3073
3074         * interp.c: Added dineroIII, and BSD profiling support. Also
3075         run-time FP handling.
3076
3077 Sun Oct 22 00:57:18 1995  James G. Smith  <jsmith@pasanda.cygnus.co.uk>
3078
3079         * Changelog, Makefile.in, README.Cygnus, configure, configure.in,
3080         gencode.c, interp.c, support.h: created.